1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (c) 2019 Intel Corporation. 3 4 #include <asm/unaligned.h> 5 #include <linux/acpi.h> 6 #include <linux/clk.h> 7 #include <linux/delay.h> 8 #include <linux/gpio/consumer.h> 9 #include <linux/i2c.h> 10 #include <linux/module.h> 11 #include <linux/pm_runtime.h> 12 #include <linux/regulator/consumer.h> 13 #include <media/v4l2-ctrls.h> 14 #include <media/v4l2-device.h> 15 #include <media/v4l2-fwnode.h> 16 17 #define OV8856_REG_VALUE_08BIT 1 18 #define OV8856_REG_VALUE_16BIT 2 19 #define OV8856_REG_VALUE_24BIT 3 20 21 #define OV8856_LINK_FREQ_360MHZ 360000000ULL 22 #define OV8856_LINK_FREQ_180MHZ 180000000ULL 23 #define OV8856_SCLK 144000000ULL 24 #define OV8856_XVCLK_19_2 19200000 25 #define OV8856_DATA_LANES 4 26 #define OV8856_RGB_DEPTH 10 27 28 #define OV8856_REG_CHIP_ID 0x300a 29 #define OV8856_CHIP_ID 0x00885a 30 31 #define OV8856_REG_MODE_SELECT 0x0100 32 #define OV8856_MODE_STANDBY 0x00 33 #define OV8856_MODE_STREAMING 0x01 34 35 /* module revisions */ 36 #define OV8856_2A_MODULE 0x01 37 #define OV8856_1B_MODULE 0x02 38 39 /* the OTP read-out buffer is at 0x7000 and 0xf is the offset 40 * of the byte in the OTP that means the module revision 41 */ 42 #define OV8856_MODULE_REVISION 0x700f 43 #define OV8856_OTP_MODE_CTRL 0x3d84 44 #define OV8856_OTP_LOAD_CTRL 0x3d81 45 #define OV8856_OTP_MODE_AUTO 0x00 46 #define OV8856_OTP_LOAD_CTRL_ENABLE BIT(0) 47 48 /* vertical-timings from sensor */ 49 #define OV8856_REG_VTS 0x380e 50 #define OV8856_VTS_MAX 0x7fff 51 52 /* horizontal-timings from sensor */ 53 #define OV8856_REG_HTS 0x380c 54 55 /* Exposure controls from sensor */ 56 #define OV8856_REG_EXPOSURE 0x3500 57 #define OV8856_EXPOSURE_MIN 6 58 #define OV8856_EXPOSURE_MAX_MARGIN 6 59 #define OV8856_EXPOSURE_STEP 1 60 61 /* Analog gain controls from sensor */ 62 #define OV8856_REG_ANALOG_GAIN 0x3508 63 #define OV8856_ANAL_GAIN_MIN 128 64 #define OV8856_ANAL_GAIN_MAX 2047 65 #define OV8856_ANAL_GAIN_STEP 1 66 67 /* Digital gain controls from sensor */ 68 #define OV8856_REG_MWB_R_GAIN 0x5019 69 #define OV8856_REG_MWB_G_GAIN 0x501b 70 #define OV8856_REG_MWB_B_GAIN 0x501d 71 #define OV8856_DGTL_GAIN_MIN 0 72 #define OV8856_DGTL_GAIN_MAX 4095 73 #define OV8856_DGTL_GAIN_STEP 1 74 #define OV8856_DGTL_GAIN_DEFAULT 1024 75 76 /* Test Pattern Control */ 77 #define OV8856_REG_TEST_PATTERN 0x5e00 78 #define OV8856_TEST_PATTERN_ENABLE BIT(7) 79 #define OV8856_TEST_PATTERN_BAR_SHIFT 2 80 81 #define to_ov8856(_sd) container_of(_sd, struct ov8856, sd) 82 83 static const char * const ov8856_supply_names[] = { 84 "dovdd", /* Digital I/O power */ 85 "avdd", /* Analog power */ 86 "dvdd", /* Digital core power */ 87 }; 88 89 enum { 90 OV8856_LINK_FREQ_720MBPS, 91 OV8856_LINK_FREQ_360MBPS, 92 }; 93 94 struct ov8856_reg { 95 u16 address; 96 u8 val; 97 }; 98 99 struct ov8856_reg_list { 100 u32 num_of_regs; 101 const struct ov8856_reg *regs; 102 }; 103 104 struct ov8856_link_freq_config { 105 const struct ov8856_reg_list reg_list; 106 }; 107 108 struct ov8856_mode { 109 /* Frame width in pixels */ 110 u32 width; 111 112 /* Frame height in pixels */ 113 u32 height; 114 115 /* Horizontal timining size */ 116 u32 hts; 117 118 /* Default vertical timining size */ 119 u32 vts_def; 120 121 /* Min vertical timining size */ 122 u32 vts_min; 123 124 /* Link frequency needed for this resolution */ 125 u32 link_freq_index; 126 127 /* Sensor register settings for this resolution */ 128 const struct ov8856_reg_list reg_list; 129 }; 130 131 static const struct ov8856_reg mipi_data_rate_720mbps[] = { 132 {0x0103, 0x01}, 133 {0x0100, 0x00}, 134 {0x0302, 0x4b}, 135 {0x0303, 0x01}, 136 {0x030b, 0x02}, 137 {0x030d, 0x4b}, 138 {0x031e, 0x0c}, 139 }; 140 141 static const struct ov8856_reg mipi_data_rate_360mbps[] = { 142 {0x0103, 0x01}, 143 {0x0100, 0x00}, 144 {0x0302, 0x4b}, 145 {0x0303, 0x03}, 146 {0x030b, 0x02}, 147 {0x030d, 0x4b}, 148 {0x031e, 0x0c}, 149 }; 150 151 static const struct ov8856_reg mode_3280x2464_regs[] = { 152 {0x3000, 0x20}, 153 {0x3003, 0x08}, 154 {0x300e, 0x20}, 155 {0x3010, 0x00}, 156 {0x3015, 0x84}, 157 {0x3018, 0x72}, 158 {0x3021, 0x23}, 159 {0x3033, 0x24}, 160 {0x3500, 0x00}, 161 {0x3501, 0x9a}, 162 {0x3502, 0x20}, 163 {0x3503, 0x08}, 164 {0x3505, 0x83}, 165 {0x3508, 0x01}, 166 {0x3509, 0x80}, 167 {0x350c, 0x00}, 168 {0x350d, 0x80}, 169 {0x350e, 0x04}, 170 {0x350f, 0x00}, 171 {0x3510, 0x00}, 172 {0x3511, 0x02}, 173 {0x3512, 0x00}, 174 {0x3600, 0x72}, 175 {0x3601, 0x40}, 176 {0x3602, 0x30}, 177 {0x3610, 0xc5}, 178 {0x3611, 0x58}, 179 {0x3612, 0x5c}, 180 {0x3613, 0xca}, 181 {0x3614, 0x20}, 182 {0x3628, 0xff}, 183 {0x3629, 0xff}, 184 {0x362a, 0xff}, 185 {0x3633, 0x10}, 186 {0x3634, 0x10}, 187 {0x3635, 0x10}, 188 {0x3636, 0x10}, 189 {0x3663, 0x08}, 190 {0x3669, 0x34}, 191 {0x366e, 0x10}, 192 {0x3706, 0x86}, 193 {0x370b, 0x7e}, 194 {0x3714, 0x23}, 195 {0x3730, 0x12}, 196 {0x3733, 0x10}, 197 {0x3764, 0x00}, 198 {0x3765, 0x00}, 199 {0x3769, 0x62}, 200 {0x376a, 0x2a}, 201 {0x376b, 0x30}, 202 {0x3780, 0x00}, 203 {0x3781, 0x24}, 204 {0x3782, 0x00}, 205 {0x3783, 0x23}, 206 {0x3798, 0x2f}, 207 {0x37a1, 0x60}, 208 {0x37a8, 0x6a}, 209 {0x37ab, 0x3f}, 210 {0x37c2, 0x04}, 211 {0x37c3, 0xf1}, 212 {0x37c9, 0x80}, 213 {0x37cb, 0x16}, 214 {0x37cc, 0x16}, 215 {0x37cd, 0x16}, 216 {0x37ce, 0x16}, 217 {0x3800, 0x00}, 218 {0x3801, 0x00}, 219 {0x3802, 0x00}, 220 {0x3803, 0x06}, 221 {0x3804, 0x0c}, 222 {0x3805, 0xdf}, 223 {0x3806, 0x09}, 224 {0x3807, 0xa7}, 225 {0x3808, 0x0c}, 226 {0x3809, 0xd0}, 227 {0x380a, 0x09}, 228 {0x380b, 0xa0}, 229 {0x380c, 0x07}, 230 {0x380d, 0x88}, 231 {0x380e, 0x09}, 232 {0x380f, 0xb8}, 233 {0x3810, 0x00}, 234 {0x3811, 0x00}, 235 {0x3812, 0x00}, 236 {0x3813, 0x01}, 237 {0x3814, 0x01}, 238 {0x3815, 0x01}, 239 {0x3816, 0x00}, 240 {0x3817, 0x00}, 241 {0x3818, 0x00}, 242 {0x3819, 0x10}, 243 {0x3820, 0x80}, 244 {0x3821, 0x46}, 245 {0x382a, 0x01}, 246 {0x382b, 0x01}, 247 {0x3830, 0x06}, 248 {0x3836, 0x02}, 249 {0x3862, 0x04}, 250 {0x3863, 0x08}, 251 {0x3cc0, 0x33}, 252 {0x3d85, 0x17}, 253 {0x3d8c, 0x73}, 254 {0x3d8d, 0xde}, 255 {0x4001, 0xe0}, 256 {0x4003, 0x40}, 257 {0x4008, 0x00}, 258 {0x4009, 0x0b}, 259 {0x400a, 0x00}, 260 {0x400b, 0x84}, 261 {0x400f, 0x80}, 262 {0x4010, 0xf0}, 263 {0x4011, 0xff}, 264 {0x4012, 0x02}, 265 {0x4013, 0x01}, 266 {0x4014, 0x01}, 267 {0x4015, 0x01}, 268 {0x4042, 0x00}, 269 {0x4043, 0x80}, 270 {0x4044, 0x00}, 271 {0x4045, 0x80}, 272 {0x4046, 0x00}, 273 {0x4047, 0x80}, 274 {0x4048, 0x00}, 275 {0x4049, 0x80}, 276 {0x4041, 0x03}, 277 {0x404c, 0x20}, 278 {0x404d, 0x00}, 279 {0x404e, 0x20}, 280 {0x4203, 0x80}, 281 {0x4307, 0x30}, 282 {0x4317, 0x00}, 283 {0x4503, 0x08}, 284 {0x4601, 0x80}, 285 {0x4800, 0x44}, 286 {0x4816, 0x53}, 287 {0x481b, 0x58}, 288 {0x481f, 0x27}, 289 {0x4837, 0x16}, 290 {0x483c, 0x0f}, 291 {0x484b, 0x05}, 292 {0x5000, 0x57}, 293 {0x5001, 0x0a}, 294 {0x5004, 0x04}, 295 {0x502e, 0x03}, 296 {0x5030, 0x41}, 297 {0x5780, 0x14}, 298 {0x5781, 0x0f}, 299 {0x5782, 0x44}, 300 {0x5783, 0x02}, 301 {0x5784, 0x01}, 302 {0x5785, 0x01}, 303 {0x5786, 0x00}, 304 {0x5787, 0x04}, 305 {0x5788, 0x02}, 306 {0x5789, 0x0f}, 307 {0x578a, 0xfd}, 308 {0x578b, 0xf5}, 309 {0x578c, 0xf5}, 310 {0x578d, 0x03}, 311 {0x578e, 0x08}, 312 {0x578f, 0x0c}, 313 {0x5790, 0x08}, 314 {0x5791, 0x04}, 315 {0x5792, 0x00}, 316 {0x5793, 0x52}, 317 {0x5794, 0xa3}, 318 {0x5795, 0x02}, 319 {0x5796, 0x20}, 320 {0x5797, 0x20}, 321 {0x5798, 0xd5}, 322 {0x5799, 0xd5}, 323 {0x579a, 0x00}, 324 {0x579b, 0x50}, 325 {0x579c, 0x00}, 326 {0x579d, 0x2c}, 327 {0x579e, 0x0c}, 328 {0x579f, 0x40}, 329 {0x57a0, 0x09}, 330 {0x57a1, 0x40}, 331 {0x59f8, 0x3d}, 332 {0x5a08, 0x02}, 333 {0x5b00, 0x02}, 334 {0x5b01, 0x10}, 335 {0x5b02, 0x03}, 336 {0x5b03, 0xcf}, 337 {0x5b05, 0x6c}, 338 {0x5e00, 0x00} 339 }; 340 341 static const struct ov8856_reg mode_1640x1232_regs[] = { 342 {0x3000, 0x20}, 343 {0x3003, 0x08}, 344 {0x300e, 0x20}, 345 {0x3010, 0x00}, 346 {0x3015, 0x84}, 347 {0x3018, 0x72}, 348 {0x3021, 0x23}, 349 {0x3033, 0x24}, 350 {0x3500, 0x00}, 351 {0x3501, 0x4c}, 352 {0x3502, 0xe0}, 353 {0x3503, 0x08}, 354 {0x3505, 0x83}, 355 {0x3508, 0x01}, 356 {0x3509, 0x80}, 357 {0x350c, 0x00}, 358 {0x350d, 0x80}, 359 {0x350e, 0x04}, 360 {0x350f, 0x00}, 361 {0x3510, 0x00}, 362 {0x3511, 0x02}, 363 {0x3512, 0x00}, 364 {0x3600, 0x72}, 365 {0x3601, 0x40}, 366 {0x3602, 0x30}, 367 {0x3610, 0xc5}, 368 {0x3611, 0x58}, 369 {0x3612, 0x5c}, 370 {0x3613, 0xca}, 371 {0x3614, 0x20}, 372 {0x3628, 0xff}, 373 {0x3629, 0xff}, 374 {0x362a, 0xff}, 375 {0x3633, 0x10}, 376 {0x3634, 0x10}, 377 {0x3635, 0x10}, 378 {0x3636, 0x10}, 379 {0x3663, 0x08}, 380 {0x3669, 0x34}, 381 {0x366e, 0x08}, 382 {0x3706, 0x86}, 383 {0x370b, 0x7e}, 384 {0x3714, 0x27}, 385 {0x3730, 0x12}, 386 {0x3733, 0x10}, 387 {0x3764, 0x00}, 388 {0x3765, 0x00}, 389 {0x3769, 0x62}, 390 {0x376a, 0x2a}, 391 {0x376b, 0x30}, 392 {0x3780, 0x00}, 393 {0x3781, 0x24}, 394 {0x3782, 0x00}, 395 {0x3783, 0x23}, 396 {0x3798, 0x2f}, 397 {0x37a1, 0x60}, 398 {0x37a8, 0x6a}, 399 {0x37ab, 0x3f}, 400 {0x37c2, 0x14}, 401 {0x37c3, 0xf1}, 402 {0x37c9, 0x80}, 403 {0x37cb, 0x16}, 404 {0x37cc, 0x16}, 405 {0x37cd, 0x16}, 406 {0x37ce, 0x16}, 407 {0x3800, 0x00}, 408 {0x3801, 0x00}, 409 {0x3802, 0x00}, 410 {0x3803, 0x06}, 411 {0x3804, 0x0c}, 412 {0x3805, 0xdf}, 413 {0x3806, 0x09}, 414 {0x3807, 0xa7}, 415 {0x3808, 0x06}, 416 {0x3809, 0x68}, 417 {0x380a, 0x04}, 418 {0x380b, 0xd0}, 419 {0x380c, 0x0e}, 420 {0x380d, 0xec}, 421 {0x380e, 0x04}, 422 {0x380f, 0xe8}, 423 {0x3810, 0x00}, 424 {0x3811, 0x00}, 425 {0x3812, 0x00}, 426 {0x3813, 0x01}, 427 {0x3814, 0x03}, 428 {0x3815, 0x01}, 429 {0x3816, 0x00}, 430 {0x3817, 0x00}, 431 {0x3818, 0x00}, 432 {0x3819, 0x10}, 433 {0x3820, 0x90}, 434 {0x3821, 0x67}, 435 {0x382a, 0x03}, 436 {0x382b, 0x01}, 437 {0x3830, 0x06}, 438 {0x3836, 0x02}, 439 {0x3862, 0x04}, 440 {0x3863, 0x08}, 441 {0x3cc0, 0x33}, 442 {0x3d85, 0x17}, 443 {0x3d8c, 0x73}, 444 {0x3d8d, 0xde}, 445 {0x4001, 0xe0}, 446 {0x4003, 0x40}, 447 {0x4008, 0x00}, 448 {0x4009, 0x05}, 449 {0x400a, 0x00}, 450 {0x400b, 0x84}, 451 {0x400f, 0x80}, 452 {0x4010, 0xf0}, 453 {0x4011, 0xff}, 454 {0x4012, 0x02}, 455 {0x4013, 0x01}, 456 {0x4014, 0x01}, 457 {0x4015, 0x01}, 458 {0x4042, 0x00}, 459 {0x4043, 0x80}, 460 {0x4044, 0x00}, 461 {0x4045, 0x80}, 462 {0x4046, 0x00}, 463 {0x4047, 0x80}, 464 {0x4048, 0x00}, 465 {0x4049, 0x80}, 466 {0x4041, 0x03}, 467 {0x404c, 0x20}, 468 {0x404d, 0x00}, 469 {0x404e, 0x20}, 470 {0x4203, 0x80}, 471 {0x4307, 0x30}, 472 {0x4317, 0x00}, 473 {0x4503, 0x08}, 474 {0x4601, 0x80}, 475 {0x4800, 0x44}, 476 {0x4816, 0x53}, 477 {0x481b, 0x58}, 478 {0x481f, 0x27}, 479 {0x4837, 0x16}, 480 {0x483c, 0x0f}, 481 {0x484b, 0x05}, 482 {0x5000, 0x57}, 483 {0x5001, 0x0a}, 484 {0x5004, 0x04}, 485 {0x502e, 0x03}, 486 {0x5030, 0x41}, 487 {0x5780, 0x14}, 488 {0x5781, 0x0f}, 489 {0x5782, 0x44}, 490 {0x5783, 0x02}, 491 {0x5784, 0x01}, 492 {0x5785, 0x01}, 493 {0x5786, 0x00}, 494 {0x5787, 0x04}, 495 {0x5788, 0x02}, 496 {0x5789, 0x0f}, 497 {0x578a, 0xfd}, 498 {0x578b, 0xf5}, 499 {0x578c, 0xf5}, 500 {0x578d, 0x03}, 501 {0x578e, 0x08}, 502 {0x578f, 0x0c}, 503 {0x5790, 0x08}, 504 {0x5791, 0x04}, 505 {0x5792, 0x00}, 506 {0x5793, 0x52}, 507 {0x5794, 0xa3}, 508 {0x5795, 0x00}, 509 {0x5796, 0x10}, 510 {0x5797, 0x10}, 511 {0x5798, 0x73}, 512 {0x5799, 0x73}, 513 {0x579a, 0x00}, 514 {0x579b, 0x28}, 515 {0x579c, 0x00}, 516 {0x579d, 0x16}, 517 {0x579e, 0x06}, 518 {0x579f, 0x20}, 519 {0x57a0, 0x04}, 520 {0x57a1, 0xa0}, 521 {0x59f8, 0x3d}, 522 {0x5a08, 0x02}, 523 {0x5b00, 0x02}, 524 {0x5b01, 0x10}, 525 {0x5b02, 0x03}, 526 {0x5b03, 0xcf}, 527 {0x5b05, 0x6c}, 528 {0x5e00, 0x00} 529 }; 530 531 static const char * const ov8856_test_pattern_menu[] = { 532 "Disabled", 533 "Standard Color Bar", 534 "Top-Bottom Darker Color Bar", 535 "Right-Left Darker Color Bar", 536 "Bottom-Top Darker Color Bar" 537 }; 538 539 static const s64 link_freq_menu_items[] = { 540 OV8856_LINK_FREQ_360MHZ, 541 OV8856_LINK_FREQ_180MHZ 542 }; 543 544 static const struct ov8856_link_freq_config link_freq_configs[] = { 545 [OV8856_LINK_FREQ_720MBPS] = { 546 .reg_list = { 547 .num_of_regs = ARRAY_SIZE(mipi_data_rate_720mbps), 548 .regs = mipi_data_rate_720mbps, 549 } 550 }, 551 [OV8856_LINK_FREQ_360MBPS] = { 552 .reg_list = { 553 .num_of_regs = ARRAY_SIZE(mipi_data_rate_360mbps), 554 .regs = mipi_data_rate_360mbps, 555 } 556 } 557 }; 558 559 static const struct ov8856_mode supported_modes[] = { 560 { 561 .width = 3280, 562 .height = 2464, 563 .hts = 1928, 564 .vts_def = 2488, 565 .vts_min = 2488, 566 .reg_list = { 567 .num_of_regs = ARRAY_SIZE(mode_3280x2464_regs), 568 .regs = mode_3280x2464_regs, 569 }, 570 .link_freq_index = OV8856_LINK_FREQ_720MBPS, 571 }, 572 { 573 .width = 1640, 574 .height = 1232, 575 .hts = 3820, 576 .vts_def = 1256, 577 .vts_min = 1256, 578 .reg_list = { 579 .num_of_regs = ARRAY_SIZE(mode_1640x1232_regs), 580 .regs = mode_1640x1232_regs, 581 }, 582 .link_freq_index = OV8856_LINK_FREQ_360MBPS, 583 } 584 }; 585 586 struct ov8856 { 587 struct v4l2_subdev sd; 588 struct media_pad pad; 589 struct v4l2_ctrl_handler ctrl_handler; 590 591 struct clk *xvclk; 592 struct gpio_desc *reset_gpio; 593 struct regulator_bulk_data supplies[ARRAY_SIZE(ov8856_supply_names)]; 594 595 /* V4L2 Controls */ 596 struct v4l2_ctrl *link_freq; 597 struct v4l2_ctrl *pixel_rate; 598 struct v4l2_ctrl *vblank; 599 struct v4l2_ctrl *hblank; 600 struct v4l2_ctrl *exposure; 601 602 /* Current mode */ 603 const struct ov8856_mode *cur_mode; 604 605 /* To serialize asynchronus callbacks */ 606 struct mutex mutex; 607 608 /* Streaming on/off */ 609 bool streaming; 610 }; 611 612 static u64 to_pixel_rate(u32 f_index) 613 { 614 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV8856_DATA_LANES; 615 616 do_div(pixel_rate, OV8856_RGB_DEPTH); 617 618 return pixel_rate; 619 } 620 621 static u64 to_pixels_per_line(u32 hts, u32 f_index) 622 { 623 u64 ppl = hts * to_pixel_rate(f_index); 624 625 do_div(ppl, OV8856_SCLK); 626 627 return ppl; 628 } 629 630 static int ov8856_read_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 *val) 631 { 632 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 633 struct i2c_msg msgs[2]; 634 u8 addr_buf[2]; 635 u8 data_buf[4] = {0}; 636 int ret; 637 638 if (len > 4) 639 return -EINVAL; 640 641 put_unaligned_be16(reg, addr_buf); 642 msgs[0].addr = client->addr; 643 msgs[0].flags = 0; 644 msgs[0].len = sizeof(addr_buf); 645 msgs[0].buf = addr_buf; 646 msgs[1].addr = client->addr; 647 msgs[1].flags = I2C_M_RD; 648 msgs[1].len = len; 649 msgs[1].buf = &data_buf[4 - len]; 650 651 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 652 if (ret != ARRAY_SIZE(msgs)) 653 return -EIO; 654 655 *val = get_unaligned_be32(data_buf); 656 657 return 0; 658 } 659 660 static int ov8856_write_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 val) 661 { 662 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 663 u8 buf[6]; 664 665 if (len > 4) 666 return -EINVAL; 667 668 put_unaligned_be16(reg, buf); 669 put_unaligned_be32(val << 8 * (4 - len), buf + 2); 670 if (i2c_master_send(client, buf, len + 2) != len + 2) 671 return -EIO; 672 673 return 0; 674 } 675 676 static int ov8856_write_reg_list(struct ov8856 *ov8856, 677 const struct ov8856_reg_list *r_list) 678 { 679 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 680 unsigned int i; 681 int ret; 682 683 for (i = 0; i < r_list->num_of_regs; i++) { 684 ret = ov8856_write_reg(ov8856, r_list->regs[i].address, 1, 685 r_list->regs[i].val); 686 if (ret) { 687 dev_err_ratelimited(&client->dev, 688 "failed to write reg 0x%4.4x. error = %d", 689 r_list->regs[i].address, ret); 690 return ret; 691 } 692 } 693 694 return 0; 695 } 696 697 static int ov8856_update_digital_gain(struct ov8856 *ov8856, u32 d_gain) 698 { 699 int ret; 700 701 ret = ov8856_write_reg(ov8856, OV8856_REG_MWB_R_GAIN, 702 OV8856_REG_VALUE_16BIT, d_gain); 703 if (ret) 704 return ret; 705 706 ret = ov8856_write_reg(ov8856, OV8856_REG_MWB_G_GAIN, 707 OV8856_REG_VALUE_16BIT, d_gain); 708 if (ret) 709 return ret; 710 711 return ov8856_write_reg(ov8856, OV8856_REG_MWB_B_GAIN, 712 OV8856_REG_VALUE_16BIT, d_gain); 713 } 714 715 static int ov8856_test_pattern(struct ov8856 *ov8856, u32 pattern) 716 { 717 if (pattern) 718 pattern = (pattern - 1) << OV8856_TEST_PATTERN_BAR_SHIFT | 719 OV8856_TEST_PATTERN_ENABLE; 720 721 return ov8856_write_reg(ov8856, OV8856_REG_TEST_PATTERN, 722 OV8856_REG_VALUE_08BIT, pattern); 723 } 724 725 static int ov8856_set_ctrl(struct v4l2_ctrl *ctrl) 726 { 727 struct ov8856 *ov8856 = container_of(ctrl->handler, 728 struct ov8856, ctrl_handler); 729 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 730 s64 exposure_max; 731 int ret = 0; 732 733 /* Propagate change of current control to all related controls */ 734 if (ctrl->id == V4L2_CID_VBLANK) { 735 /* Update max exposure while meeting expected vblanking */ 736 exposure_max = ov8856->cur_mode->height + ctrl->val - 737 OV8856_EXPOSURE_MAX_MARGIN; 738 __v4l2_ctrl_modify_range(ov8856->exposure, 739 ov8856->exposure->minimum, 740 exposure_max, ov8856->exposure->step, 741 exposure_max); 742 } 743 744 /* V4L2 controls values will be applied only when power is already up */ 745 if (!pm_runtime_get_if_in_use(&client->dev)) 746 return 0; 747 748 switch (ctrl->id) { 749 case V4L2_CID_ANALOGUE_GAIN: 750 ret = ov8856_write_reg(ov8856, OV8856_REG_ANALOG_GAIN, 751 OV8856_REG_VALUE_16BIT, ctrl->val); 752 break; 753 754 case V4L2_CID_DIGITAL_GAIN: 755 ret = ov8856_update_digital_gain(ov8856, ctrl->val); 756 break; 757 758 case V4L2_CID_EXPOSURE: 759 /* 4 least significant bits of expsoure are fractional part */ 760 ret = ov8856_write_reg(ov8856, OV8856_REG_EXPOSURE, 761 OV8856_REG_VALUE_24BIT, ctrl->val << 4); 762 break; 763 764 case V4L2_CID_VBLANK: 765 ret = ov8856_write_reg(ov8856, OV8856_REG_VTS, 766 OV8856_REG_VALUE_16BIT, 767 ov8856->cur_mode->height + ctrl->val); 768 break; 769 770 case V4L2_CID_TEST_PATTERN: 771 ret = ov8856_test_pattern(ov8856, ctrl->val); 772 break; 773 774 default: 775 ret = -EINVAL; 776 break; 777 } 778 779 pm_runtime_put(&client->dev); 780 781 return ret; 782 } 783 784 static const struct v4l2_ctrl_ops ov8856_ctrl_ops = { 785 .s_ctrl = ov8856_set_ctrl, 786 }; 787 788 static int ov8856_init_controls(struct ov8856 *ov8856) 789 { 790 struct v4l2_ctrl_handler *ctrl_hdlr; 791 s64 exposure_max, h_blank; 792 int ret; 793 794 ctrl_hdlr = &ov8856->ctrl_handler; 795 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8); 796 if (ret) 797 return ret; 798 799 ctrl_hdlr->lock = &ov8856->mutex; 800 ov8856->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov8856_ctrl_ops, 801 V4L2_CID_LINK_FREQ, 802 ARRAY_SIZE(link_freq_menu_items) - 1, 803 0, link_freq_menu_items); 804 if (ov8856->link_freq) 805 ov8856->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; 806 807 ov8856->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 808 V4L2_CID_PIXEL_RATE, 0, 809 to_pixel_rate(OV8856_LINK_FREQ_720MBPS), 810 1, 811 to_pixel_rate(OV8856_LINK_FREQ_720MBPS)); 812 ov8856->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 813 V4L2_CID_VBLANK, 814 ov8856->cur_mode->vts_min - ov8856->cur_mode->height, 815 OV8856_VTS_MAX - ov8856->cur_mode->height, 1, 816 ov8856->cur_mode->vts_def - ov8856->cur_mode->height); 817 h_blank = to_pixels_per_line(ov8856->cur_mode->hts, 818 ov8856->cur_mode->link_freq_index) - ov8856->cur_mode->width; 819 ov8856->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 820 V4L2_CID_HBLANK, h_blank, h_blank, 1, 821 h_blank); 822 if (ov8856->hblank) 823 ov8856->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; 824 825 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, 826 OV8856_ANAL_GAIN_MIN, OV8856_ANAL_GAIN_MAX, 827 OV8856_ANAL_GAIN_STEP, OV8856_ANAL_GAIN_MIN); 828 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_DIGITAL_GAIN, 829 OV8856_DGTL_GAIN_MIN, OV8856_DGTL_GAIN_MAX, 830 OV8856_DGTL_GAIN_STEP, OV8856_DGTL_GAIN_DEFAULT); 831 exposure_max = ov8856->cur_mode->vts_def - OV8856_EXPOSURE_MAX_MARGIN; 832 ov8856->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 833 V4L2_CID_EXPOSURE, 834 OV8856_EXPOSURE_MIN, exposure_max, 835 OV8856_EXPOSURE_STEP, 836 exposure_max); 837 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov8856_ctrl_ops, 838 V4L2_CID_TEST_PATTERN, 839 ARRAY_SIZE(ov8856_test_pattern_menu) - 1, 840 0, 0, ov8856_test_pattern_menu); 841 if (ctrl_hdlr->error) 842 return ctrl_hdlr->error; 843 844 ov8856->sd.ctrl_handler = ctrl_hdlr; 845 846 return 0; 847 } 848 849 static void ov8856_update_pad_format(const struct ov8856_mode *mode, 850 struct v4l2_mbus_framefmt *fmt) 851 { 852 fmt->width = mode->width; 853 fmt->height = mode->height; 854 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; 855 fmt->field = V4L2_FIELD_NONE; 856 } 857 858 static int ov8856_start_streaming(struct ov8856 *ov8856) 859 { 860 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 861 const struct ov8856_reg_list *reg_list; 862 int link_freq_index, ret; 863 864 link_freq_index = ov8856->cur_mode->link_freq_index; 865 reg_list = &link_freq_configs[link_freq_index].reg_list; 866 ret = ov8856_write_reg_list(ov8856, reg_list); 867 if (ret) { 868 dev_err(&client->dev, "failed to set plls"); 869 return ret; 870 } 871 872 reg_list = &ov8856->cur_mode->reg_list; 873 ret = ov8856_write_reg_list(ov8856, reg_list); 874 if (ret) { 875 dev_err(&client->dev, "failed to set mode"); 876 return ret; 877 } 878 879 ret = __v4l2_ctrl_handler_setup(ov8856->sd.ctrl_handler); 880 if (ret) 881 return ret; 882 883 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, 884 OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING); 885 if (ret) { 886 dev_err(&client->dev, "failed to set stream"); 887 return ret; 888 } 889 890 return 0; 891 } 892 893 static void ov8856_stop_streaming(struct ov8856 *ov8856) 894 { 895 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 896 897 if (ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, 898 OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY)) 899 dev_err(&client->dev, "failed to set stream"); 900 } 901 902 static int ov8856_set_stream(struct v4l2_subdev *sd, int enable) 903 { 904 struct ov8856 *ov8856 = to_ov8856(sd); 905 struct i2c_client *client = v4l2_get_subdevdata(sd); 906 int ret = 0; 907 908 if (ov8856->streaming == enable) 909 return 0; 910 911 mutex_lock(&ov8856->mutex); 912 if (enable) { 913 ret = pm_runtime_get_sync(&client->dev); 914 if (ret < 0) { 915 pm_runtime_put_noidle(&client->dev); 916 mutex_unlock(&ov8856->mutex); 917 return ret; 918 } 919 920 ret = ov8856_start_streaming(ov8856); 921 if (ret) { 922 enable = 0; 923 ov8856_stop_streaming(ov8856); 924 pm_runtime_put(&client->dev); 925 } 926 } else { 927 ov8856_stop_streaming(ov8856); 928 pm_runtime_put(&client->dev); 929 } 930 931 ov8856->streaming = enable; 932 mutex_unlock(&ov8856->mutex); 933 934 return ret; 935 } 936 937 static int __ov8856_power_on(struct ov8856 *ov8856) 938 { 939 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 940 int ret; 941 942 if (is_acpi_node(dev_fwnode(&client->dev))) 943 return 0; 944 945 ret = clk_prepare_enable(ov8856->xvclk); 946 if (ret < 0) { 947 dev_err(&client->dev, "failed to enable xvclk\n"); 948 return ret; 949 } 950 951 if (ov8856->reset_gpio) { 952 gpiod_set_value_cansleep(ov8856->reset_gpio, 1); 953 usleep_range(1000, 2000); 954 } 955 956 ret = regulator_bulk_enable(ARRAY_SIZE(ov8856_supply_names), 957 ov8856->supplies); 958 if (ret < 0) { 959 dev_err(&client->dev, "failed to enable regulators\n"); 960 goto disable_clk; 961 } 962 963 gpiod_set_value_cansleep(ov8856->reset_gpio, 0); 964 usleep_range(1500, 1800); 965 966 return 0; 967 968 disable_clk: 969 gpiod_set_value_cansleep(ov8856->reset_gpio, 1); 970 clk_disable_unprepare(ov8856->xvclk); 971 972 return ret; 973 } 974 975 static void __ov8856_power_off(struct ov8856 *ov8856) 976 { 977 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 978 979 if (is_acpi_node(dev_fwnode(&client->dev))) 980 return; 981 982 gpiod_set_value_cansleep(ov8856->reset_gpio, 1); 983 regulator_bulk_disable(ARRAY_SIZE(ov8856_supply_names), 984 ov8856->supplies); 985 clk_disable_unprepare(ov8856->xvclk); 986 } 987 988 static int __maybe_unused ov8856_suspend(struct device *dev) 989 { 990 struct i2c_client *client = to_i2c_client(dev); 991 struct v4l2_subdev *sd = i2c_get_clientdata(client); 992 struct ov8856 *ov8856 = to_ov8856(sd); 993 994 mutex_lock(&ov8856->mutex); 995 if (ov8856->streaming) 996 ov8856_stop_streaming(ov8856); 997 998 __ov8856_power_off(ov8856); 999 mutex_unlock(&ov8856->mutex); 1000 1001 return 0; 1002 } 1003 1004 static int __maybe_unused ov8856_resume(struct device *dev) 1005 { 1006 struct i2c_client *client = to_i2c_client(dev); 1007 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1008 struct ov8856 *ov8856 = to_ov8856(sd); 1009 int ret; 1010 1011 mutex_lock(&ov8856->mutex); 1012 1013 __ov8856_power_on(ov8856); 1014 if (ov8856->streaming) { 1015 ret = ov8856_start_streaming(ov8856); 1016 if (ret) { 1017 ov8856->streaming = false; 1018 ov8856_stop_streaming(ov8856); 1019 mutex_unlock(&ov8856->mutex); 1020 return ret; 1021 } 1022 } 1023 1024 mutex_unlock(&ov8856->mutex); 1025 1026 return 0; 1027 } 1028 1029 static int ov8856_set_format(struct v4l2_subdev *sd, 1030 struct v4l2_subdev_pad_config *cfg, 1031 struct v4l2_subdev_format *fmt) 1032 { 1033 struct ov8856 *ov8856 = to_ov8856(sd); 1034 const struct ov8856_mode *mode; 1035 s32 vblank_def, h_blank; 1036 1037 mode = v4l2_find_nearest_size(supported_modes, 1038 ARRAY_SIZE(supported_modes), width, 1039 height, fmt->format.width, 1040 fmt->format.height); 1041 1042 mutex_lock(&ov8856->mutex); 1043 ov8856_update_pad_format(mode, &fmt->format); 1044 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 1045 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format; 1046 } else { 1047 ov8856->cur_mode = mode; 1048 __v4l2_ctrl_s_ctrl(ov8856->link_freq, mode->link_freq_index); 1049 __v4l2_ctrl_s_ctrl_int64(ov8856->pixel_rate, 1050 to_pixel_rate(mode->link_freq_index)); 1051 1052 /* Update limits and set FPS to default */ 1053 vblank_def = mode->vts_def - mode->height; 1054 __v4l2_ctrl_modify_range(ov8856->vblank, 1055 mode->vts_min - mode->height, 1056 OV8856_VTS_MAX - mode->height, 1, 1057 vblank_def); 1058 __v4l2_ctrl_s_ctrl(ov8856->vblank, vblank_def); 1059 h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) - 1060 mode->width; 1061 __v4l2_ctrl_modify_range(ov8856->hblank, h_blank, h_blank, 1, 1062 h_blank); 1063 } 1064 1065 mutex_unlock(&ov8856->mutex); 1066 1067 return 0; 1068 } 1069 1070 static int ov8856_get_format(struct v4l2_subdev *sd, 1071 struct v4l2_subdev_pad_config *cfg, 1072 struct v4l2_subdev_format *fmt) 1073 { 1074 struct ov8856 *ov8856 = to_ov8856(sd); 1075 1076 mutex_lock(&ov8856->mutex); 1077 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) 1078 fmt->format = *v4l2_subdev_get_try_format(&ov8856->sd, cfg, 1079 fmt->pad); 1080 else 1081 ov8856_update_pad_format(ov8856->cur_mode, &fmt->format); 1082 1083 mutex_unlock(&ov8856->mutex); 1084 1085 return 0; 1086 } 1087 1088 static int ov8856_enum_mbus_code(struct v4l2_subdev *sd, 1089 struct v4l2_subdev_pad_config *cfg, 1090 struct v4l2_subdev_mbus_code_enum *code) 1091 { 1092 /* Only one bayer order GRBG is supported */ 1093 if (code->index > 0) 1094 return -EINVAL; 1095 1096 code->code = MEDIA_BUS_FMT_SGRBG10_1X10; 1097 1098 return 0; 1099 } 1100 1101 static int ov8856_enum_frame_size(struct v4l2_subdev *sd, 1102 struct v4l2_subdev_pad_config *cfg, 1103 struct v4l2_subdev_frame_size_enum *fse) 1104 { 1105 if (fse->index >= ARRAY_SIZE(supported_modes)) 1106 return -EINVAL; 1107 1108 if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10) 1109 return -EINVAL; 1110 1111 fse->min_width = supported_modes[fse->index].width; 1112 fse->max_width = fse->min_width; 1113 fse->min_height = supported_modes[fse->index].height; 1114 fse->max_height = fse->min_height; 1115 1116 return 0; 1117 } 1118 1119 static int ov8856_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) 1120 { 1121 struct ov8856 *ov8856 = to_ov8856(sd); 1122 1123 mutex_lock(&ov8856->mutex); 1124 ov8856_update_pad_format(&supported_modes[0], 1125 v4l2_subdev_get_try_format(sd, fh->pad, 0)); 1126 mutex_unlock(&ov8856->mutex); 1127 1128 return 0; 1129 } 1130 1131 static const struct v4l2_subdev_video_ops ov8856_video_ops = { 1132 .s_stream = ov8856_set_stream, 1133 }; 1134 1135 static const struct v4l2_subdev_pad_ops ov8856_pad_ops = { 1136 .set_fmt = ov8856_set_format, 1137 .get_fmt = ov8856_get_format, 1138 .enum_mbus_code = ov8856_enum_mbus_code, 1139 .enum_frame_size = ov8856_enum_frame_size, 1140 }; 1141 1142 static const struct v4l2_subdev_ops ov8856_subdev_ops = { 1143 .video = &ov8856_video_ops, 1144 .pad = &ov8856_pad_ops, 1145 }; 1146 1147 static const struct media_entity_operations ov8856_subdev_entity_ops = { 1148 .link_validate = v4l2_subdev_link_validate, 1149 }; 1150 1151 static const struct v4l2_subdev_internal_ops ov8856_internal_ops = { 1152 .open = ov8856_open, 1153 }; 1154 1155 static int ov8856_identify_module(struct ov8856 *ov8856) 1156 { 1157 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 1158 int ret; 1159 u32 val; 1160 1161 ret = ov8856_read_reg(ov8856, OV8856_REG_CHIP_ID, 1162 OV8856_REG_VALUE_24BIT, &val); 1163 if (ret) 1164 return ret; 1165 1166 if (val != OV8856_CHIP_ID) { 1167 dev_err(&client->dev, "chip id mismatch: %x!=%x", 1168 OV8856_CHIP_ID, val); 1169 return -ENXIO; 1170 } 1171 1172 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, 1173 OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING); 1174 if (ret) 1175 return ret; 1176 1177 ret = ov8856_write_reg(ov8856, OV8856_OTP_MODE_CTRL, 1178 OV8856_REG_VALUE_08BIT, OV8856_OTP_MODE_AUTO); 1179 if (ret) { 1180 dev_err(&client->dev, "failed to set otp mode"); 1181 return ret; 1182 } 1183 1184 ret = ov8856_write_reg(ov8856, OV8856_OTP_LOAD_CTRL, 1185 OV8856_REG_VALUE_08BIT, 1186 OV8856_OTP_LOAD_CTRL_ENABLE); 1187 if (ret) { 1188 dev_err(&client->dev, "failed to enable load control"); 1189 return ret; 1190 } 1191 1192 ret = ov8856_read_reg(ov8856, OV8856_MODULE_REVISION, 1193 OV8856_REG_VALUE_08BIT, &val); 1194 if (ret) { 1195 dev_err(&client->dev, "failed to read module revision"); 1196 return ret; 1197 } 1198 1199 dev_info(&client->dev, "OV8856 revision %x (%s) at address 0x%02x\n", 1200 val, 1201 val == OV8856_2A_MODULE ? "2A" : 1202 val == OV8856_1B_MODULE ? "1B" : "unknown revision", 1203 client->addr); 1204 1205 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, 1206 OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY); 1207 if (ret) { 1208 dev_err(&client->dev, "failed to exit streaming mode"); 1209 return ret; 1210 } 1211 1212 return 0; 1213 } 1214 1215 static int ov8856_get_hwcfg(struct ov8856 *ov8856, struct device *dev) 1216 { 1217 struct fwnode_handle *ep; 1218 struct fwnode_handle *fwnode = dev_fwnode(dev); 1219 struct v4l2_fwnode_endpoint bus_cfg = { 1220 .bus_type = V4L2_MBUS_CSI2_DPHY 1221 }; 1222 u32 xvclk_rate; 1223 int ret; 1224 unsigned int i, j; 1225 1226 if (!fwnode) 1227 return -ENXIO; 1228 1229 ret = fwnode_property_read_u32(fwnode, "clock-frequency", &xvclk_rate); 1230 if (ret) 1231 return ret; 1232 1233 if (!is_acpi_node(fwnode)) { 1234 ov8856->xvclk = devm_clk_get(dev, "xvclk"); 1235 if (IS_ERR(ov8856->xvclk)) { 1236 dev_err(dev, "could not get xvclk clock (%pe)\n", 1237 ov8856->xvclk); 1238 return PTR_ERR(ov8856->xvclk); 1239 } 1240 1241 clk_set_rate(ov8856->xvclk, xvclk_rate); 1242 xvclk_rate = clk_get_rate(ov8856->xvclk); 1243 } 1244 1245 if (xvclk_rate != OV8856_XVCLK_19_2) 1246 dev_warn(dev, "external clock rate %u is unsupported", 1247 xvclk_rate); 1248 1249 ov8856->reset_gpio = devm_gpiod_get_optional(dev, "reset", 1250 GPIOD_OUT_LOW); 1251 if (IS_ERR(ov8856->reset_gpio)) 1252 return PTR_ERR(ov8856->reset_gpio); 1253 1254 for (i = 0; i < ARRAY_SIZE(ov8856_supply_names); i++) 1255 ov8856->supplies[i].supply = ov8856_supply_names[i]; 1256 1257 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ov8856_supply_names), 1258 ov8856->supplies); 1259 if (ret) 1260 return ret; 1261 1262 ep = fwnode_graph_get_next_endpoint(fwnode, NULL); 1263 if (!ep) 1264 return -ENXIO; 1265 1266 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg); 1267 fwnode_handle_put(ep); 1268 if (ret) 1269 return ret; 1270 1271 if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV8856_DATA_LANES) { 1272 dev_err(dev, "number of CSI2 data lanes %d is not supported", 1273 bus_cfg.bus.mipi_csi2.num_data_lanes); 1274 ret = -EINVAL; 1275 goto check_hwcfg_error; 1276 } 1277 1278 if (!bus_cfg.nr_of_link_frequencies) { 1279 dev_err(dev, "no link frequencies defined"); 1280 ret = -EINVAL; 1281 goto check_hwcfg_error; 1282 } 1283 1284 for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) { 1285 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) { 1286 if (link_freq_menu_items[i] == 1287 bus_cfg.link_frequencies[j]) 1288 break; 1289 } 1290 1291 if (j == bus_cfg.nr_of_link_frequencies) { 1292 dev_err(dev, "no link frequency %lld supported", 1293 link_freq_menu_items[i]); 1294 ret = -EINVAL; 1295 goto check_hwcfg_error; 1296 } 1297 } 1298 1299 check_hwcfg_error: 1300 v4l2_fwnode_endpoint_free(&bus_cfg); 1301 1302 return ret; 1303 } 1304 1305 static int ov8856_remove(struct i2c_client *client) 1306 { 1307 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1308 struct ov8856 *ov8856 = to_ov8856(sd); 1309 1310 v4l2_async_unregister_subdev(sd); 1311 media_entity_cleanup(&sd->entity); 1312 v4l2_ctrl_handler_free(sd->ctrl_handler); 1313 pm_runtime_disable(&client->dev); 1314 mutex_destroy(&ov8856->mutex); 1315 1316 __ov8856_power_off(ov8856); 1317 1318 return 0; 1319 } 1320 1321 static int ov8856_probe(struct i2c_client *client) 1322 { 1323 struct ov8856 *ov8856; 1324 int ret; 1325 1326 ov8856 = devm_kzalloc(&client->dev, sizeof(*ov8856), GFP_KERNEL); 1327 if (!ov8856) 1328 return -ENOMEM; 1329 1330 ret = ov8856_get_hwcfg(ov8856, &client->dev); 1331 if (ret) { 1332 dev_err(&client->dev, "failed to get HW configuration: %d", 1333 ret); 1334 return ret; 1335 } 1336 1337 v4l2_i2c_subdev_init(&ov8856->sd, client, &ov8856_subdev_ops); 1338 1339 ret = __ov8856_power_on(ov8856); 1340 if (ret) { 1341 dev_err(&client->dev, "failed to power on\n"); 1342 return ret; 1343 } 1344 1345 ret = ov8856_identify_module(ov8856); 1346 if (ret) { 1347 dev_err(&client->dev, "failed to find sensor: %d", ret); 1348 goto probe_power_off; 1349 } 1350 1351 mutex_init(&ov8856->mutex); 1352 ov8856->cur_mode = &supported_modes[0]; 1353 ret = ov8856_init_controls(ov8856); 1354 if (ret) { 1355 dev_err(&client->dev, "failed to init controls: %d", ret); 1356 goto probe_error_v4l2_ctrl_handler_free; 1357 } 1358 1359 ov8856->sd.internal_ops = &ov8856_internal_ops; 1360 ov8856->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 1361 ov8856->sd.entity.ops = &ov8856_subdev_entity_ops; 1362 ov8856->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1363 ov8856->pad.flags = MEDIA_PAD_FL_SOURCE; 1364 ret = media_entity_pads_init(&ov8856->sd.entity, 1, &ov8856->pad); 1365 if (ret) { 1366 dev_err(&client->dev, "failed to init entity pads: %d", ret); 1367 goto probe_error_v4l2_ctrl_handler_free; 1368 } 1369 1370 ret = v4l2_async_register_subdev_sensor_common(&ov8856->sd); 1371 if (ret < 0) { 1372 dev_err(&client->dev, "failed to register V4L2 subdev: %d", 1373 ret); 1374 goto probe_error_media_entity_cleanup; 1375 } 1376 1377 /* 1378 * Device is already turned on by i2c-core with ACPI domain PM. 1379 * Enable runtime PM and turn off the device. 1380 */ 1381 pm_runtime_set_active(&client->dev); 1382 pm_runtime_enable(&client->dev); 1383 pm_runtime_idle(&client->dev); 1384 1385 return 0; 1386 1387 probe_error_media_entity_cleanup: 1388 media_entity_cleanup(&ov8856->sd.entity); 1389 1390 probe_error_v4l2_ctrl_handler_free: 1391 v4l2_ctrl_handler_free(ov8856->sd.ctrl_handler); 1392 mutex_destroy(&ov8856->mutex); 1393 1394 probe_power_off: 1395 __ov8856_power_off(ov8856); 1396 1397 return ret; 1398 } 1399 1400 static const struct dev_pm_ops ov8856_pm_ops = { 1401 SET_SYSTEM_SLEEP_PM_OPS(ov8856_suspend, ov8856_resume) 1402 }; 1403 1404 #ifdef CONFIG_ACPI 1405 static const struct acpi_device_id ov8856_acpi_ids[] = { 1406 {"OVTI8856"}, 1407 {} 1408 }; 1409 1410 MODULE_DEVICE_TABLE(acpi, ov8856_acpi_ids); 1411 #endif 1412 1413 static const struct of_device_id ov8856_of_match[] = { 1414 { .compatible = "ovti,ov8856" }, 1415 { /* sentinel */ } 1416 }; 1417 MODULE_DEVICE_TABLE(of, ov8856_of_match); 1418 1419 static struct i2c_driver ov8856_i2c_driver = { 1420 .driver = { 1421 .name = "ov8856", 1422 .pm = &ov8856_pm_ops, 1423 .acpi_match_table = ACPI_PTR(ov8856_acpi_ids), 1424 .of_match_table = ov8856_of_match, 1425 }, 1426 .probe_new = ov8856_probe, 1427 .remove = ov8856_remove, 1428 }; 1429 1430 module_i2c_driver(ov8856_i2c_driver); 1431 1432 MODULE_AUTHOR("Ben Kao <ben.kao@intel.com>"); 1433 MODULE_DESCRIPTION("OmniVision OV8856 sensor driver"); 1434 MODULE_LICENSE("GPL v2"); 1435