1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (c) 2019 Intel Corporation. 3 4 #include <asm/unaligned.h> 5 #include <linux/acpi.h> 6 #include <linux/clk.h> 7 #include <linux/delay.h> 8 #include <linux/gpio/consumer.h> 9 #include <linux/i2c.h> 10 #include <linux/module.h> 11 #include <linux/pm_runtime.h> 12 #include <linux/regulator/consumer.h> 13 #include <media/v4l2-ctrls.h> 14 #include <media/v4l2-device.h> 15 #include <media/v4l2-fwnode.h> 16 17 #define OV8856_REG_VALUE_08BIT 1 18 #define OV8856_REG_VALUE_16BIT 2 19 #define OV8856_REG_VALUE_24BIT 3 20 21 #define OV8856_SCLK 144000000ULL 22 #define OV8856_XVCLK_19_2 19200000 23 #define OV8856_DATA_LANES 4 24 #define OV8856_RGB_DEPTH 10 25 26 #define OV8856_REG_CHIP_ID 0x300a 27 #define OV8856_CHIP_ID 0x00885a 28 29 #define OV8856_REG_MODE_SELECT 0x0100 30 #define OV8856_MODE_STANDBY 0x00 31 #define OV8856_MODE_STREAMING 0x01 32 33 /* module revisions */ 34 #define OV8856_2A_MODULE 0x01 35 #define OV8856_1B_MODULE 0x02 36 37 /* the OTP read-out buffer is at 0x7000 and 0xf is the offset 38 * of the byte in the OTP that means the module revision 39 */ 40 #define OV8856_MODULE_REVISION 0x700f 41 #define OV8856_OTP_MODE_CTRL 0x3d84 42 #define OV8856_OTP_LOAD_CTRL 0x3d81 43 #define OV8856_OTP_MODE_AUTO 0x00 44 #define OV8856_OTP_LOAD_CTRL_ENABLE BIT(0) 45 46 /* vertical-timings from sensor */ 47 #define OV8856_REG_VTS 0x380e 48 #define OV8856_VTS_MAX 0x7fff 49 50 /* horizontal-timings from sensor */ 51 #define OV8856_REG_HTS 0x380c 52 53 /* Exposure controls from sensor */ 54 #define OV8856_REG_EXPOSURE 0x3500 55 #define OV8856_EXPOSURE_MIN 6 56 #define OV8856_EXPOSURE_MAX_MARGIN 6 57 #define OV8856_EXPOSURE_STEP 1 58 59 /* Analog gain controls from sensor */ 60 #define OV8856_REG_ANALOG_GAIN 0x3508 61 #define OV8856_ANAL_GAIN_MIN 128 62 #define OV8856_ANAL_GAIN_MAX 2047 63 #define OV8856_ANAL_GAIN_STEP 1 64 65 /* Digital gain controls from sensor */ 66 #define OV8856_REG_MWB_R_GAIN 0x5019 67 #define OV8856_REG_MWB_G_GAIN 0x501b 68 #define OV8856_REG_MWB_B_GAIN 0x501d 69 #define OV8856_DGTL_GAIN_MIN 0 70 #define OV8856_DGTL_GAIN_MAX 4095 71 #define OV8856_DGTL_GAIN_STEP 1 72 #define OV8856_DGTL_GAIN_DEFAULT 1024 73 74 /* Test Pattern Control */ 75 #define OV8856_REG_TEST_PATTERN 0x5e00 76 #define OV8856_TEST_PATTERN_ENABLE BIT(7) 77 #define OV8856_TEST_PATTERN_BAR_SHIFT 2 78 79 #define NUM_REGS 7 80 #define NUM_MODE_REGS 187 81 #define NUM_MODE_REGS_2 200 82 83 /* Flip Mirror Controls from sensor */ 84 #define OV8856_REG_FORMAT1 0x3820 85 #define OV8856_REG_FORMAT2 0x3821 86 #define OV8856_REG_FORMAT1_OP_1 BIT(1) 87 #define OV8856_REG_FORMAT1_OP_2 BIT(2) 88 #define OV8856_REG_FORMAT1_OP_3 BIT(6) 89 #define OV8856_REG_FORMAT2_OP_1 BIT(1) 90 #define OV8856_REG_FORMAT2_OP_2 BIT(2) 91 #define OV8856_REG_FORMAT2_OP_3 BIT(6) 92 #define OV8856_REG_FLIP_OPT_1 0x376b 93 #define OV8856_REG_FLIP_OPT_2 0x5001 94 #define OV8856_REG_FLIP_OPT_3 0x502e 95 #define OV8856_REG_MIRROR_OPT_1 0x5004 96 #define OV8856_REG_FLIP_OP_0 BIT(0) 97 #define OV8856_REG_FLIP_OP_1 BIT(1) 98 #define OV8856_REG_FLIP_OP_2 BIT(2) 99 #define OV8856_REG_MIRROR_OP_1 BIT(1) 100 #define OV8856_REG_MIRROR_OP_2 BIT(2) 101 102 #define to_ov8856(_sd) container_of(_sd, struct ov8856, sd) 103 104 static const char * const ov8856_supply_names[] = { 105 "dovdd", /* Digital I/O power */ 106 "avdd", /* Analog power */ 107 "dvdd", /* Digital core power */ 108 }; 109 110 enum { 111 OV8856_MEDIA_BUS_FMT_SBGGR10_1X10, 112 OV8856_MEDIA_BUS_FMT_SGRBG10_1X10, 113 }; 114 115 struct ov8856_reg { 116 u16 address; 117 u8 val; 118 }; 119 120 struct ov8856_reg_list { 121 u32 num_of_regs; 122 const struct ov8856_reg *regs; 123 }; 124 125 struct ov8856_link_freq_config { 126 const struct ov8856_reg_list reg_list; 127 }; 128 129 struct ov8856_mode { 130 /* Frame width in pixels */ 131 u32 width; 132 133 /* Frame height in pixels */ 134 u32 height; 135 136 /* Horizontal timining size */ 137 u32 hts; 138 139 /* Default vertical timining size */ 140 u32 vts_def; 141 142 /* Min vertical timining size */ 143 u32 vts_min; 144 145 /* Link frequency needed for this resolution */ 146 u32 link_freq_index; 147 148 /* Sensor register settings for this resolution */ 149 const struct ov8856_reg_list reg_list; 150 151 /* Number of data lanes */ 152 u8 data_lanes; 153 154 /* Default MEDIA_BUS_FMT for this mode */ 155 u32 default_mbus_index; 156 }; 157 158 struct ov8856_mipi_data_rates { 159 const struct ov8856_reg regs_0[NUM_REGS]; 160 const struct ov8856_reg regs_1[NUM_REGS]; 161 }; 162 163 static const struct ov8856_mipi_data_rates mipi_data_rate_lane_2 = { 164 //mipi_data_rate_1440mbps 165 { 166 {0x0103, 0x01}, 167 {0x0100, 0x00}, 168 {0x0302, 0x43}, 169 {0x0303, 0x00}, 170 {0x030b, 0x02}, 171 {0x030d, 0x4b}, 172 {0x031e, 0x0c} 173 }, 174 //mipi_data_rate_720mbps 175 { 176 {0x0103, 0x01}, 177 {0x0100, 0x00}, 178 {0x0302, 0x4b}, 179 {0x0303, 0x01}, 180 {0x030b, 0x02}, 181 {0x030d, 0x4b}, 182 {0x031e, 0x0c} 183 } 184 }; 185 186 static const struct ov8856_mipi_data_rates mipi_data_rate_lane_4 = { 187 //mipi_data_rate_720mbps 188 { 189 {0x0103, 0x01}, 190 {0x0100, 0x00}, 191 {0x0302, 0x4b}, 192 {0x0303, 0x01}, 193 {0x030b, 0x02}, 194 {0x030d, 0x4b}, 195 {0x031e, 0x0c} 196 }, 197 //mipi_data_rate_360mbps 198 { 199 {0x0103, 0x01}, 200 {0x0100, 0x00}, 201 {0x0302, 0x4b}, 202 {0x0303, 0x03}, 203 {0x030b, 0x02}, 204 {0x030d, 0x4b}, 205 {0x031e, 0x0c} 206 } 207 }; 208 209 static const struct ov8856_reg lane_2_mode_3280x2464[] = { 210 /* 3280x2464 resolution */ 211 {0x3000, 0x20}, 212 {0x3003, 0x08}, 213 {0x300e, 0x20}, 214 {0x3010, 0x00}, 215 {0x3015, 0x84}, 216 {0x3018, 0x32}, 217 {0x3021, 0x23}, 218 {0x3033, 0x24}, 219 {0x3500, 0x00}, 220 {0x3501, 0x9a}, 221 {0x3502, 0x20}, 222 {0x3503, 0x08}, 223 {0x3505, 0x83}, 224 {0x3508, 0x01}, 225 {0x3509, 0x80}, 226 {0x350c, 0x00}, 227 {0x350d, 0x80}, 228 {0x350e, 0x04}, 229 {0x350f, 0x00}, 230 {0x3510, 0x00}, 231 {0x3511, 0x02}, 232 {0x3512, 0x00}, 233 {0x3600, 0x72}, 234 {0x3601, 0x40}, 235 {0x3602, 0x30}, 236 {0x3610, 0xc5}, 237 {0x3611, 0x58}, 238 {0x3612, 0x5c}, 239 {0x3613, 0xca}, 240 {0x3614, 0x50}, 241 {0x3628, 0xff}, 242 {0x3629, 0xff}, 243 {0x362a, 0xff}, 244 {0x3633, 0x10}, 245 {0x3634, 0x10}, 246 {0x3635, 0x10}, 247 {0x3636, 0x10}, 248 {0x3663, 0x08}, 249 {0x3669, 0x34}, 250 {0x366e, 0x10}, 251 {0x3706, 0x86}, 252 {0x370b, 0x7e}, 253 {0x3714, 0x23}, 254 {0x3730, 0x12}, 255 {0x3733, 0x10}, 256 {0x3764, 0x00}, 257 {0x3765, 0x00}, 258 {0x3769, 0x62}, 259 {0x376a, 0x2a}, 260 {0x376b, 0x30}, 261 {0x3780, 0x00}, 262 {0x3781, 0x24}, 263 {0x3782, 0x00}, 264 {0x3783, 0x23}, 265 {0x3798, 0x2f}, 266 {0x37a1, 0x60}, 267 {0x37a8, 0x6a}, 268 {0x37ab, 0x3f}, 269 {0x37c2, 0x04}, 270 {0x37c3, 0xf1}, 271 {0x37c9, 0x80}, 272 {0x37cb, 0x16}, 273 {0x37cc, 0x16}, 274 {0x37cd, 0x16}, 275 {0x37ce, 0x16}, 276 {0x3800, 0x00}, 277 {0x3801, 0x00}, 278 {0x3802, 0x00}, 279 {0x3803, 0x06}, 280 {0x3804, 0x0c}, 281 {0x3805, 0xdf}, 282 {0x3806, 0x09}, 283 {0x3807, 0xa7}, 284 {0x3808, 0x0c}, 285 {0x3809, 0xd0}, 286 {0x380a, 0x09}, 287 {0x380b, 0xa0}, 288 {0x380c, 0x07}, 289 {0x380d, 0x88}, 290 {0x380e, 0x09}, 291 {0x380f, 0xb8}, 292 {0x3810, 0x00}, 293 {0x3811, 0x00}, 294 {0x3812, 0x00}, 295 {0x3813, 0x01}, 296 {0x3814, 0x01}, 297 {0x3815, 0x01}, 298 {0x3816, 0x00}, 299 {0x3817, 0x00}, 300 {0x3818, 0x00}, 301 {0x3819, 0x00}, 302 {0x3820, 0x80}, 303 {0x3821, 0x46}, 304 {0x382a, 0x01}, 305 {0x382b, 0x01}, 306 {0x3830, 0x06}, 307 {0x3836, 0x02}, 308 {0x3837, 0x10}, 309 {0x3862, 0x04}, 310 {0x3863, 0x08}, 311 {0x3cc0, 0x33}, 312 {0x3d85, 0x14}, 313 {0x3d8c, 0x73}, 314 {0x3d8d, 0xde}, 315 {0x4001, 0xe0}, 316 {0x4003, 0x40}, 317 {0x4008, 0x00}, 318 {0x4009, 0x0b}, 319 {0x400a, 0x00}, 320 {0x400b, 0x84}, 321 {0x400f, 0x80}, 322 {0x4010, 0xf0}, 323 {0x4011, 0xff}, 324 {0x4012, 0x02}, 325 {0x4013, 0x01}, 326 {0x4014, 0x01}, 327 {0x4015, 0x01}, 328 {0x4042, 0x00}, 329 {0x4043, 0x80}, 330 {0x4044, 0x00}, 331 {0x4045, 0x80}, 332 {0x4046, 0x00}, 333 {0x4047, 0x80}, 334 {0x4048, 0x00}, 335 {0x4049, 0x80}, 336 {0x4041, 0x03}, 337 {0x404c, 0x20}, 338 {0x404d, 0x00}, 339 {0x404e, 0x20}, 340 {0x4203, 0x80}, 341 {0x4307, 0x30}, 342 {0x4317, 0x00}, 343 {0x4503, 0x08}, 344 {0x4601, 0x80}, 345 {0x4800, 0x44}, 346 {0x4816, 0x53}, 347 {0x481b, 0x58}, 348 {0x481f, 0x27}, 349 {0x4837, 0x0c}, 350 {0x483c, 0x0f}, 351 {0x484b, 0x05}, 352 {0x5000, 0x57}, 353 {0x5001, 0x0a}, 354 {0x5004, 0x04}, 355 {0x502e, 0x03}, 356 {0x5030, 0x41}, 357 {0x5795, 0x02}, 358 {0x5796, 0x20}, 359 {0x5797, 0x20}, 360 {0x5798, 0xd5}, 361 {0x5799, 0xd5}, 362 {0x579a, 0x00}, 363 {0x579b, 0x50}, 364 {0x579c, 0x00}, 365 {0x579d, 0x2c}, 366 {0x579e, 0x0c}, 367 {0x579f, 0x40}, 368 {0x57a0, 0x09}, 369 {0x57a1, 0x40}, 370 {0x5780, 0x14}, 371 {0x5781, 0x0f}, 372 {0x5782, 0x44}, 373 {0x5783, 0x02}, 374 {0x5784, 0x01}, 375 {0x5785, 0x01}, 376 {0x5786, 0x00}, 377 {0x5787, 0x04}, 378 {0x5788, 0x02}, 379 {0x5789, 0x0f}, 380 {0x578a, 0xfd}, 381 {0x578b, 0xf5}, 382 {0x578c, 0xf5}, 383 {0x578d, 0x03}, 384 {0x578e, 0x08}, 385 {0x578f, 0x0c}, 386 {0x5790, 0x08}, 387 {0x5791, 0x04}, 388 {0x5792, 0x00}, 389 {0x5793, 0x52}, 390 {0x5794, 0xa3}, 391 {0x59f8, 0x3d}, 392 {0x5a08, 0x02}, 393 {0x5b00, 0x02}, 394 {0x5b01, 0x10}, 395 {0x5b02, 0x03}, 396 {0x5b03, 0xcf}, 397 {0x5b05, 0x6c}, 398 {0x5e00, 0x00} 399 }; 400 401 static const struct ov8856_reg lane_2_mode_1640x1232[] = { 402 /* 1640x1232 resolution */ 403 {0x3000, 0x20}, 404 {0x3003, 0x08}, 405 {0x300e, 0x20}, 406 {0x3010, 0x00}, 407 {0x3015, 0x84}, 408 {0x3018, 0x32}, 409 {0x3021, 0x23}, 410 {0x3033, 0x24}, 411 {0x3500, 0x00}, 412 {0x3501, 0x4c}, 413 {0x3502, 0xe0}, 414 {0x3503, 0x08}, 415 {0x3505, 0x83}, 416 {0x3508, 0x01}, 417 {0x3509, 0x80}, 418 {0x350c, 0x00}, 419 {0x350d, 0x80}, 420 {0x350e, 0x04}, 421 {0x350f, 0x00}, 422 {0x3510, 0x00}, 423 {0x3511, 0x02}, 424 {0x3512, 0x00}, 425 {0x3600, 0x72}, 426 {0x3601, 0x40}, 427 {0x3602, 0x30}, 428 {0x3610, 0xc5}, 429 {0x3611, 0x58}, 430 {0x3612, 0x5c}, 431 {0x3613, 0xca}, 432 {0x3614, 0x50}, 433 {0x3628, 0xff}, 434 {0x3629, 0xff}, 435 {0x362a, 0xff}, 436 {0x3633, 0x10}, 437 {0x3634, 0x10}, 438 {0x3635, 0x10}, 439 {0x3636, 0x10}, 440 {0x3663, 0x08}, 441 {0x3669, 0x34}, 442 {0x366e, 0x08}, 443 {0x3706, 0x86}, 444 {0x370b, 0x7e}, 445 {0x3714, 0x27}, 446 {0x3730, 0x12}, 447 {0x3733, 0x10}, 448 {0x3764, 0x00}, 449 {0x3765, 0x00}, 450 {0x3769, 0x62}, 451 {0x376a, 0x2a}, 452 {0x376b, 0x30}, 453 {0x3780, 0x00}, 454 {0x3781, 0x24}, 455 {0x3782, 0x00}, 456 {0x3783, 0x23}, 457 {0x3798, 0x2f}, 458 {0x37a1, 0x60}, 459 {0x37a8, 0x6a}, 460 {0x37ab, 0x3f}, 461 {0x37c2, 0x14}, 462 {0x37c3, 0xf1}, 463 {0x37c9, 0x80}, 464 {0x37cb, 0x16}, 465 {0x37cc, 0x16}, 466 {0x37cd, 0x16}, 467 {0x37ce, 0x16}, 468 {0x3800, 0x00}, 469 {0x3801, 0x00}, 470 {0x3802, 0x00}, 471 {0x3803, 0x00}, 472 {0x3804, 0x0c}, 473 {0x3805, 0xdf}, 474 {0x3806, 0x09}, 475 {0x3807, 0xaf}, 476 {0x3808, 0x06}, 477 {0x3809, 0x68}, 478 {0x380a, 0x04}, 479 {0x380b, 0xd0}, 480 {0x380c, 0x0c}, 481 {0x380d, 0x60}, 482 {0x380e, 0x05}, 483 {0x380f, 0xea}, 484 {0x3810, 0x00}, 485 {0x3811, 0x04}, 486 {0x3812, 0x00}, 487 {0x3813, 0x05}, 488 {0x3814, 0x03}, 489 {0x3815, 0x01}, 490 {0x3816, 0x00}, 491 {0x3817, 0x00}, 492 {0x3818, 0x00}, 493 {0x3819, 0x00}, 494 {0x3820, 0x90}, 495 {0x3821, 0x67}, 496 {0x382a, 0x03}, 497 {0x382b, 0x01}, 498 {0x3830, 0x06}, 499 {0x3836, 0x02}, 500 {0x3837, 0x10}, 501 {0x3862, 0x04}, 502 {0x3863, 0x08}, 503 {0x3cc0, 0x33}, 504 {0x3d85, 0x14}, 505 {0x3d8c, 0x73}, 506 {0x3d8d, 0xde}, 507 {0x4001, 0xe0}, 508 {0x4003, 0x40}, 509 {0x4008, 0x00}, 510 {0x4009, 0x05}, 511 {0x400a, 0x00}, 512 {0x400b, 0x84}, 513 {0x400f, 0x80}, 514 {0x4010, 0xf0}, 515 {0x4011, 0xff}, 516 {0x4012, 0x02}, 517 {0x4013, 0x01}, 518 {0x4014, 0x01}, 519 {0x4015, 0x01}, 520 {0x4042, 0x00}, 521 {0x4043, 0x80}, 522 {0x4044, 0x00}, 523 {0x4045, 0x80}, 524 {0x4046, 0x00}, 525 {0x4047, 0x80}, 526 {0x4048, 0x00}, 527 {0x4049, 0x80}, 528 {0x4041, 0x03}, 529 {0x404c, 0x20}, 530 {0x404d, 0x00}, 531 {0x404e, 0x20}, 532 {0x4203, 0x80}, 533 {0x4307, 0x30}, 534 {0x4317, 0x00}, 535 {0x4503, 0x08}, 536 {0x4601, 0x80}, 537 {0x4800, 0x44}, 538 {0x4816, 0x53}, 539 {0x481b, 0x58}, 540 {0x481f, 0x27}, 541 {0x4837, 0x16}, 542 {0x483c, 0x0f}, 543 {0x484b, 0x05}, 544 {0x5000, 0x57}, 545 {0x5001, 0x0a}, 546 {0x5004, 0x04}, 547 {0x502e, 0x03}, 548 {0x5030, 0x41}, 549 {0x5795, 0x00}, 550 {0x5796, 0x10}, 551 {0x5797, 0x10}, 552 {0x5798, 0x73}, 553 {0x5799, 0x73}, 554 {0x579a, 0x00}, 555 {0x579b, 0x28}, 556 {0x579c, 0x00}, 557 {0x579d, 0x16}, 558 {0x579e, 0x06}, 559 {0x579f, 0x20}, 560 {0x57a0, 0x04}, 561 {0x57a1, 0xa0}, 562 {0x5780, 0x14}, 563 {0x5781, 0x0f}, 564 {0x5782, 0x44}, 565 {0x5783, 0x02}, 566 {0x5784, 0x01}, 567 {0x5785, 0x01}, 568 {0x5786, 0x00}, 569 {0x5787, 0x04}, 570 {0x5788, 0x02}, 571 {0x5789, 0x0f}, 572 {0x578a, 0xfd}, 573 {0x578b, 0xf5}, 574 {0x578c, 0xf5}, 575 {0x578d, 0x03}, 576 {0x578e, 0x08}, 577 {0x578f, 0x0c}, 578 {0x5790, 0x08}, 579 {0x5791, 0x04}, 580 {0x5792, 0x00}, 581 {0x5793, 0x52}, 582 {0x5794, 0xa3}, 583 {0x59f8, 0x3d}, 584 {0x5a08, 0x02}, 585 {0x5b00, 0x02}, 586 {0x5b01, 0x10}, 587 {0x5b02, 0x03}, 588 {0x5b03, 0xcf}, 589 {0x5b05, 0x6c}, 590 {0x5e00, 0x00} 591 }; 592 593 static const struct ov8856_reg lane_4_mode_3280x2464[] = { 594 /* 3280x2464 resolution */ 595 {0x3000, 0x20}, 596 {0x3003, 0x08}, 597 {0x300e, 0x20}, 598 {0x3010, 0x00}, 599 {0x3015, 0x84}, 600 {0x3018, 0x72}, 601 {0x3021, 0x23}, 602 {0x3033, 0x24}, 603 {0x3500, 0x00}, 604 {0x3501, 0x9a}, 605 {0x3502, 0x20}, 606 {0x3503, 0x08}, 607 {0x3505, 0x83}, 608 {0x3508, 0x01}, 609 {0x3509, 0x80}, 610 {0x350c, 0x00}, 611 {0x350d, 0x80}, 612 {0x350e, 0x04}, 613 {0x350f, 0x00}, 614 {0x3510, 0x00}, 615 {0x3511, 0x02}, 616 {0x3512, 0x00}, 617 {0x3600, 0x72}, 618 {0x3601, 0x40}, 619 {0x3602, 0x30}, 620 {0x3610, 0xc5}, 621 {0x3611, 0x58}, 622 {0x3612, 0x5c}, 623 {0x3613, 0xca}, 624 {0x3614, 0x20}, 625 {0x3628, 0xff}, 626 {0x3629, 0xff}, 627 {0x362a, 0xff}, 628 {0x3633, 0x10}, 629 {0x3634, 0x10}, 630 {0x3635, 0x10}, 631 {0x3636, 0x10}, 632 {0x3663, 0x08}, 633 {0x3669, 0x34}, 634 {0x366e, 0x10}, 635 {0x3706, 0x86}, 636 {0x370b, 0x7e}, 637 {0x3714, 0x23}, 638 {0x3730, 0x12}, 639 {0x3733, 0x10}, 640 {0x3764, 0x00}, 641 {0x3765, 0x00}, 642 {0x3769, 0x62}, 643 {0x376a, 0x2a}, 644 {0x376b, 0x30}, 645 {0x3780, 0x00}, 646 {0x3781, 0x24}, 647 {0x3782, 0x00}, 648 {0x3783, 0x23}, 649 {0x3798, 0x2f}, 650 {0x37a1, 0x60}, 651 {0x37a8, 0x6a}, 652 {0x37ab, 0x3f}, 653 {0x37c2, 0x04}, 654 {0x37c3, 0xf1}, 655 {0x37c9, 0x80}, 656 {0x37cb, 0x16}, 657 {0x37cc, 0x16}, 658 {0x37cd, 0x16}, 659 {0x37ce, 0x16}, 660 {0x3800, 0x00}, 661 {0x3801, 0x00}, 662 {0x3802, 0x00}, 663 {0x3803, 0x06}, 664 {0x3804, 0x0c}, 665 {0x3805, 0xdf}, 666 {0x3806, 0x09}, 667 {0x3807, 0xa7}, 668 {0x3808, 0x0c}, 669 {0x3809, 0xd0}, 670 {0x380a, 0x09}, 671 {0x380b, 0xa0}, 672 {0x380c, 0x07}, 673 {0x380d, 0x88}, 674 {0x380e, 0x09}, 675 {0x380f, 0xb8}, 676 {0x3810, 0x00}, 677 {0x3811, 0x00}, 678 {0x3812, 0x00}, 679 {0x3813, 0x01}, 680 {0x3814, 0x01}, 681 {0x3815, 0x01}, 682 {0x3816, 0x00}, 683 {0x3817, 0x00}, 684 {0x3818, 0x00}, 685 {0x3819, 0x10}, 686 {0x3820, 0x80}, 687 {0x3821, 0x46}, 688 {0x382a, 0x01}, 689 {0x382b, 0x01}, 690 {0x3830, 0x06}, 691 {0x3836, 0x02}, 692 {0x3862, 0x04}, 693 {0x3863, 0x08}, 694 {0x3cc0, 0x33}, 695 {0x3d85, 0x17}, 696 {0x3d8c, 0x73}, 697 {0x3d8d, 0xde}, 698 {0x4001, 0xe0}, 699 {0x4003, 0x40}, 700 {0x4008, 0x00}, 701 {0x4009, 0x0b}, 702 {0x400a, 0x00}, 703 {0x400b, 0x84}, 704 {0x400f, 0x80}, 705 {0x4010, 0xf0}, 706 {0x4011, 0xff}, 707 {0x4012, 0x02}, 708 {0x4013, 0x01}, 709 {0x4014, 0x01}, 710 {0x4015, 0x01}, 711 {0x4042, 0x00}, 712 {0x4043, 0x80}, 713 {0x4044, 0x00}, 714 {0x4045, 0x80}, 715 {0x4046, 0x00}, 716 {0x4047, 0x80}, 717 {0x4048, 0x00}, 718 {0x4049, 0x80}, 719 {0x4041, 0x03}, 720 {0x404c, 0x20}, 721 {0x404d, 0x00}, 722 {0x404e, 0x20}, 723 {0x4203, 0x80}, 724 {0x4307, 0x30}, 725 {0x4317, 0x00}, 726 {0x4503, 0x08}, 727 {0x4601, 0x80}, 728 {0x4800, 0x44}, 729 {0x4816, 0x53}, 730 {0x481b, 0x58}, 731 {0x481f, 0x27}, 732 {0x4837, 0x16}, 733 {0x483c, 0x0f}, 734 {0x484b, 0x05}, 735 {0x5000, 0x57}, 736 {0x5001, 0x0a}, 737 {0x5004, 0x04}, 738 {0x502e, 0x03}, 739 {0x5030, 0x41}, 740 {0x5780, 0x14}, 741 {0x5781, 0x0f}, 742 {0x5782, 0x44}, 743 {0x5783, 0x02}, 744 {0x5784, 0x01}, 745 {0x5785, 0x01}, 746 {0x5786, 0x00}, 747 {0x5787, 0x04}, 748 {0x5788, 0x02}, 749 {0x5789, 0x0f}, 750 {0x578a, 0xfd}, 751 {0x578b, 0xf5}, 752 {0x578c, 0xf5}, 753 {0x578d, 0x03}, 754 {0x578e, 0x08}, 755 {0x578f, 0x0c}, 756 {0x5790, 0x08}, 757 {0x5791, 0x04}, 758 {0x5792, 0x00}, 759 {0x5793, 0x52}, 760 {0x5794, 0xa3}, 761 {0x5795, 0x02}, 762 {0x5796, 0x20}, 763 {0x5797, 0x20}, 764 {0x5798, 0xd5}, 765 {0x5799, 0xd5}, 766 {0x579a, 0x00}, 767 {0x579b, 0x50}, 768 {0x579c, 0x00}, 769 {0x579d, 0x2c}, 770 {0x579e, 0x0c}, 771 {0x579f, 0x40}, 772 {0x57a0, 0x09}, 773 {0x57a1, 0x40}, 774 {0x59f8, 0x3d}, 775 {0x5a08, 0x02}, 776 {0x5b00, 0x02}, 777 {0x5b01, 0x10}, 778 {0x5b02, 0x03}, 779 {0x5b03, 0xcf}, 780 {0x5b05, 0x6c}, 781 {0x5e00, 0x00} 782 }; 783 784 static const struct ov8856_reg lane_4_mode_1640x1232[] = { 785 /* 1640x1232 resolution */ 786 {0x3000, 0x20}, 787 {0x3003, 0x08}, 788 {0x300e, 0x20}, 789 {0x3010, 0x00}, 790 {0x3015, 0x84}, 791 {0x3018, 0x72}, 792 {0x3021, 0x23}, 793 {0x3033, 0x24}, 794 {0x3500, 0x00}, 795 {0x3501, 0x4c}, 796 {0x3502, 0xe0}, 797 {0x3503, 0x08}, 798 {0x3505, 0x83}, 799 {0x3508, 0x01}, 800 {0x3509, 0x80}, 801 {0x350c, 0x00}, 802 {0x350d, 0x80}, 803 {0x350e, 0x04}, 804 {0x350f, 0x00}, 805 {0x3510, 0x00}, 806 {0x3511, 0x02}, 807 {0x3512, 0x00}, 808 {0x3600, 0x72}, 809 {0x3601, 0x40}, 810 {0x3602, 0x30}, 811 {0x3610, 0xc5}, 812 {0x3611, 0x58}, 813 {0x3612, 0x5c}, 814 {0x3613, 0xca}, 815 {0x3614, 0x20}, 816 {0x3628, 0xff}, 817 {0x3629, 0xff}, 818 {0x362a, 0xff}, 819 {0x3633, 0x10}, 820 {0x3634, 0x10}, 821 {0x3635, 0x10}, 822 {0x3636, 0x10}, 823 {0x3663, 0x08}, 824 {0x3669, 0x34}, 825 {0x366e, 0x08}, 826 {0x3706, 0x86}, 827 {0x370b, 0x7e}, 828 {0x3714, 0x27}, 829 {0x3730, 0x12}, 830 {0x3733, 0x10}, 831 {0x3764, 0x00}, 832 {0x3765, 0x00}, 833 {0x3769, 0x62}, 834 {0x376a, 0x2a}, 835 {0x376b, 0x30}, 836 {0x3780, 0x00}, 837 {0x3781, 0x24}, 838 {0x3782, 0x00}, 839 {0x3783, 0x23}, 840 {0x3798, 0x2f}, 841 {0x37a1, 0x60}, 842 {0x37a8, 0x6a}, 843 {0x37ab, 0x3f}, 844 {0x37c2, 0x14}, 845 {0x37c3, 0xf1}, 846 {0x37c9, 0x80}, 847 {0x37cb, 0x16}, 848 {0x37cc, 0x16}, 849 {0x37cd, 0x16}, 850 {0x37ce, 0x16}, 851 {0x3800, 0x00}, 852 {0x3801, 0x00}, 853 {0x3802, 0x00}, 854 {0x3803, 0x00}, 855 {0x3804, 0x0c}, 856 {0x3805, 0xdf}, 857 {0x3806, 0x09}, 858 {0x3807, 0xaf}, 859 {0x3808, 0x06}, 860 {0x3809, 0x68}, 861 {0x380a, 0x04}, 862 {0x380b, 0xd0}, 863 {0x380c, 0x0e}, 864 {0x380d, 0xec}, 865 {0x380e, 0x04}, 866 {0x380f, 0xe8}, 867 {0x3810, 0x00}, 868 {0x3811, 0x04}, 869 {0x3812, 0x00}, 870 {0x3813, 0x05}, 871 {0x3814, 0x03}, 872 {0x3815, 0x01}, 873 {0x3816, 0x00}, 874 {0x3817, 0x00}, 875 {0x3818, 0x00}, 876 {0x3819, 0x10}, 877 {0x3820, 0x90}, 878 {0x3821, 0x67}, 879 {0x382a, 0x03}, 880 {0x382b, 0x01}, 881 {0x3830, 0x06}, 882 {0x3836, 0x02}, 883 {0x3862, 0x04}, 884 {0x3863, 0x08}, 885 {0x3cc0, 0x33}, 886 {0x3d85, 0x17}, 887 {0x3d8c, 0x73}, 888 {0x3d8d, 0xde}, 889 {0x4001, 0xe0}, 890 {0x4003, 0x40}, 891 {0x4008, 0x00}, 892 {0x4009, 0x05}, 893 {0x400a, 0x00}, 894 {0x400b, 0x84}, 895 {0x400f, 0x80}, 896 {0x4010, 0xf0}, 897 {0x4011, 0xff}, 898 {0x4012, 0x02}, 899 {0x4013, 0x01}, 900 {0x4014, 0x01}, 901 {0x4015, 0x01}, 902 {0x4042, 0x00}, 903 {0x4043, 0x80}, 904 {0x4044, 0x00}, 905 {0x4045, 0x80}, 906 {0x4046, 0x00}, 907 {0x4047, 0x80}, 908 {0x4048, 0x00}, 909 {0x4049, 0x80}, 910 {0x4041, 0x03}, 911 {0x404c, 0x20}, 912 {0x404d, 0x00}, 913 {0x404e, 0x20}, 914 {0x4203, 0x80}, 915 {0x4307, 0x30}, 916 {0x4317, 0x00}, 917 {0x4503, 0x08}, 918 {0x4601, 0x80}, 919 {0x4800, 0x44}, 920 {0x4816, 0x53}, 921 {0x481b, 0x58}, 922 {0x481f, 0x27}, 923 {0x4837, 0x16}, 924 {0x483c, 0x0f}, 925 {0x484b, 0x05}, 926 {0x5000, 0x57}, 927 {0x5001, 0x0a}, 928 {0x5004, 0x04}, 929 {0x502e, 0x03}, 930 {0x5030, 0x41}, 931 {0x5780, 0x14}, 932 {0x5781, 0x0f}, 933 {0x5782, 0x44}, 934 {0x5783, 0x02}, 935 {0x5784, 0x01}, 936 {0x5785, 0x01}, 937 {0x5786, 0x00}, 938 {0x5787, 0x04}, 939 {0x5788, 0x02}, 940 {0x5789, 0x0f}, 941 {0x578a, 0xfd}, 942 {0x578b, 0xf5}, 943 {0x578c, 0xf5}, 944 {0x578d, 0x03}, 945 {0x578e, 0x08}, 946 {0x578f, 0x0c}, 947 {0x5790, 0x08}, 948 {0x5791, 0x04}, 949 {0x5792, 0x00}, 950 {0x5793, 0x52}, 951 {0x5794, 0xa3}, 952 {0x5795, 0x00}, 953 {0x5796, 0x10}, 954 {0x5797, 0x10}, 955 {0x5798, 0x73}, 956 {0x5799, 0x73}, 957 {0x579a, 0x00}, 958 {0x579b, 0x28}, 959 {0x579c, 0x00}, 960 {0x579d, 0x16}, 961 {0x579e, 0x06}, 962 {0x579f, 0x20}, 963 {0x57a0, 0x04}, 964 {0x57a1, 0xa0}, 965 {0x59f8, 0x3d}, 966 {0x5a08, 0x02}, 967 {0x5b00, 0x02}, 968 {0x5b01, 0x10}, 969 {0x5b02, 0x03}, 970 {0x5b03, 0xcf}, 971 {0x5b05, 0x6c}, 972 {0x5e00, 0x00} 973 }; 974 975 static const struct ov8856_reg lane_4_mode_3264x2448[] = { 976 /* 3264x2448 resolution */ 977 {0x0103, 0x01}, 978 {0x0302, 0x3c}, 979 {0x0303, 0x01}, 980 {0x031e, 0x0c}, 981 {0x3000, 0x20}, 982 {0x3003, 0x08}, 983 {0x300e, 0x20}, 984 {0x3010, 0x00}, 985 {0x3015, 0x84}, 986 {0x3018, 0x72}, 987 {0x3021, 0x23}, 988 {0x3033, 0x24}, 989 {0x3500, 0x00}, 990 {0x3501, 0x9a}, 991 {0x3502, 0x20}, 992 {0x3503, 0x08}, 993 {0x3505, 0x83}, 994 {0x3508, 0x01}, 995 {0x3509, 0x80}, 996 {0x350c, 0x00}, 997 {0x350d, 0x80}, 998 {0x350e, 0x04}, 999 {0x350f, 0x00}, 1000 {0x3510, 0x00}, 1001 {0x3511, 0x02}, 1002 {0x3512, 0x00}, 1003 {0x3600, 0x72}, 1004 {0x3601, 0x40}, 1005 {0x3602, 0x30}, 1006 {0x3610, 0xc5}, 1007 {0x3611, 0x58}, 1008 {0x3612, 0x5c}, 1009 {0x3613, 0xca}, 1010 {0x3614, 0x60}, 1011 {0x3628, 0xff}, 1012 {0x3629, 0xff}, 1013 {0x362a, 0xff}, 1014 {0x3633, 0x10}, 1015 {0x3634, 0x10}, 1016 {0x3635, 0x10}, 1017 {0x3636, 0x10}, 1018 {0x3663, 0x08}, 1019 {0x3669, 0x34}, 1020 {0x366d, 0x00}, 1021 {0x366e, 0x10}, 1022 {0x3706, 0x86}, 1023 {0x370b, 0x7e}, 1024 {0x3714, 0x23}, 1025 {0x3730, 0x12}, 1026 {0x3733, 0x10}, 1027 {0x3764, 0x00}, 1028 {0x3765, 0x00}, 1029 {0x3769, 0x62}, 1030 {0x376a, 0x2a}, 1031 {0x376b, 0x30}, 1032 {0x3780, 0x00}, 1033 {0x3781, 0x24}, 1034 {0x3782, 0x00}, 1035 {0x3783, 0x23}, 1036 {0x3798, 0x2f}, 1037 {0x37a1, 0x60}, 1038 {0x37a8, 0x6a}, 1039 {0x37ab, 0x3f}, 1040 {0x37c2, 0x04}, 1041 {0x37c3, 0xf1}, 1042 {0x37c9, 0x80}, 1043 {0x37cb, 0x16}, 1044 {0x37cc, 0x16}, 1045 {0x37cd, 0x16}, 1046 {0x37ce, 0x16}, 1047 {0x3800, 0x00}, 1048 {0x3801, 0x00}, 1049 {0x3802, 0x00}, 1050 {0x3803, 0x0c}, 1051 {0x3804, 0x0c}, 1052 {0x3805, 0xdf}, 1053 {0x3806, 0x09}, 1054 {0x3807, 0xa3}, 1055 {0x3808, 0x0c}, 1056 {0x3809, 0xc0}, 1057 {0x380a, 0x09}, 1058 {0x380b, 0x90}, 1059 {0x380c, 0x07}, 1060 {0x380d, 0x8c}, 1061 {0x380e, 0x09}, 1062 {0x380f, 0xb2}, 1063 {0x3810, 0x00}, 1064 {0x3811, 0x04}, 1065 {0x3812, 0x00}, 1066 {0x3813, 0x02}, 1067 {0x3814, 0x01}, 1068 {0x3815, 0x01}, 1069 {0x3816, 0x00}, 1070 {0x3817, 0x00}, 1071 {0x3818, 0x00}, 1072 {0x3819, 0x10}, 1073 {0x3820, 0x80}, 1074 {0x3821, 0x46}, 1075 {0x382a, 0x01}, 1076 {0x382b, 0x01}, 1077 {0x3830, 0x06}, 1078 {0x3836, 0x02}, 1079 {0x3862, 0x04}, 1080 {0x3863, 0x08}, 1081 {0x3cc0, 0x33}, 1082 {0x3d85, 0x17}, 1083 {0x3d8c, 0x73}, 1084 {0x3d8d, 0xde}, 1085 {0x4001, 0xe0}, 1086 {0x4003, 0x40}, 1087 {0x4008, 0x00}, 1088 {0x4009, 0x0b}, 1089 {0x400a, 0x00}, 1090 {0x400b, 0x84}, 1091 {0x400f, 0x80}, 1092 {0x4010, 0xf0}, 1093 {0x4011, 0xff}, 1094 {0x4012, 0x02}, 1095 {0x4013, 0x01}, 1096 {0x4014, 0x01}, 1097 {0x4015, 0x01}, 1098 {0x4042, 0x00}, 1099 {0x4043, 0x80}, 1100 {0x4044, 0x00}, 1101 {0x4045, 0x80}, 1102 {0x4046, 0x00}, 1103 {0x4047, 0x80}, 1104 {0x4048, 0x00}, 1105 {0x4049, 0x80}, 1106 {0x4041, 0x03}, 1107 {0x404c, 0x20}, 1108 {0x404d, 0x00}, 1109 {0x404e, 0x20}, 1110 {0x4203, 0x80}, 1111 {0x4307, 0x30}, 1112 {0x4317, 0x00}, 1113 {0x4502, 0x50}, 1114 {0x4503, 0x08}, 1115 {0x4601, 0x80}, 1116 {0x4800, 0x44}, 1117 {0x4816, 0x53}, 1118 {0x481b, 0x50}, 1119 {0x481f, 0x27}, 1120 {0x4823, 0x3c}, 1121 {0x482b, 0x00}, 1122 {0x4831, 0x66}, 1123 {0x4837, 0x16}, 1124 {0x483c, 0x0f}, 1125 {0x484b, 0x05}, 1126 {0x5000, 0x77}, 1127 {0x5001, 0x0a}, 1128 {0x5003, 0xc8}, 1129 {0x5004, 0x04}, 1130 {0x5006, 0x00}, 1131 {0x5007, 0x00}, 1132 {0x502e, 0x03}, 1133 {0x5030, 0x41}, 1134 {0x5780, 0x14}, 1135 {0x5781, 0x0f}, 1136 {0x5782, 0x44}, 1137 {0x5783, 0x02}, 1138 {0x5784, 0x01}, 1139 {0x5785, 0x01}, 1140 {0x5786, 0x00}, 1141 {0x5787, 0x04}, 1142 {0x5788, 0x02}, 1143 {0x5789, 0x0f}, 1144 {0x578a, 0xfd}, 1145 {0x578b, 0xf5}, 1146 {0x578c, 0xf5}, 1147 {0x578d, 0x03}, 1148 {0x578e, 0x08}, 1149 {0x578f, 0x0c}, 1150 {0x5790, 0x08}, 1151 {0x5791, 0x04}, 1152 {0x5792, 0x00}, 1153 {0x5793, 0x52}, 1154 {0x5794, 0xa3}, 1155 {0x5795, 0x02}, 1156 {0x5796, 0x20}, 1157 {0x5797, 0x20}, 1158 {0x5798, 0xd5}, 1159 {0x5799, 0xd5}, 1160 {0x579a, 0x00}, 1161 {0x579b, 0x50}, 1162 {0x579c, 0x00}, 1163 {0x579d, 0x2c}, 1164 {0x579e, 0x0c}, 1165 {0x579f, 0x40}, 1166 {0x57a0, 0x09}, 1167 {0x57a1, 0x40}, 1168 {0x59f8, 0x3d}, 1169 {0x5a08, 0x02}, 1170 {0x5b00, 0x02}, 1171 {0x5b01, 0x10}, 1172 {0x5b02, 0x03}, 1173 {0x5b03, 0xcf}, 1174 {0x5b05, 0x6c}, 1175 {0x5e00, 0x00}, 1176 {0x5e10, 0xfc} 1177 }; 1178 1179 static const struct ov8856_reg lane_4_mode_1632x1224[] = { 1180 /* 1632x1224 resolution */ 1181 {0x0103, 0x01}, 1182 {0x0302, 0x3c}, 1183 {0x0303, 0x01}, 1184 {0x031e, 0x0c}, 1185 {0x3000, 0x20}, 1186 {0x3003, 0x08}, 1187 {0x300e, 0x20}, 1188 {0x3010, 0x00}, 1189 {0x3015, 0x84}, 1190 {0x3018, 0x72}, 1191 {0x3021, 0x23}, 1192 {0x3033, 0x24}, 1193 {0x3500, 0x00}, 1194 {0x3501, 0x4c}, 1195 {0x3502, 0xe0}, 1196 {0x3503, 0x08}, 1197 {0x3505, 0x83}, 1198 {0x3508, 0x01}, 1199 {0x3509, 0x80}, 1200 {0x350c, 0x00}, 1201 {0x350d, 0x80}, 1202 {0x350e, 0x04}, 1203 {0x350f, 0x00}, 1204 {0x3510, 0x00}, 1205 {0x3511, 0x02}, 1206 {0x3512, 0x00}, 1207 {0x3600, 0x72}, 1208 {0x3601, 0x40}, 1209 {0x3602, 0x30}, 1210 {0x3610, 0xc5}, 1211 {0x3611, 0x58}, 1212 {0x3612, 0x5c}, 1213 {0x3613, 0xca}, 1214 {0x3614, 0x60}, 1215 {0x3628, 0xff}, 1216 {0x3629, 0xff}, 1217 {0x362a, 0xff}, 1218 {0x3633, 0x10}, 1219 {0x3634, 0x10}, 1220 {0x3635, 0x10}, 1221 {0x3636, 0x10}, 1222 {0x3663, 0x08}, 1223 {0x3669, 0x34}, 1224 {0x366d, 0x00}, 1225 {0x366e, 0x08}, 1226 {0x3706, 0x86}, 1227 {0x370b, 0x7e}, 1228 {0x3714, 0x27}, 1229 {0x3730, 0x12}, 1230 {0x3733, 0x10}, 1231 {0x3764, 0x00}, 1232 {0x3765, 0x00}, 1233 {0x3769, 0x62}, 1234 {0x376a, 0x2a}, 1235 {0x376b, 0x30}, 1236 {0x3780, 0x00}, 1237 {0x3781, 0x24}, 1238 {0x3782, 0x00}, 1239 {0x3783, 0x23}, 1240 {0x3798, 0x2f}, 1241 {0x37a1, 0x60}, 1242 {0x37a8, 0x6a}, 1243 {0x37ab, 0x3f}, 1244 {0x37c2, 0x14}, 1245 {0x37c3, 0xf1}, 1246 {0x37c9, 0x80}, 1247 {0x37cb, 0x16}, 1248 {0x37cc, 0x16}, 1249 {0x37cd, 0x16}, 1250 {0x37ce, 0x16}, 1251 {0x3800, 0x00}, 1252 {0x3801, 0x00}, 1253 {0x3802, 0x00}, 1254 {0x3803, 0x0c}, 1255 {0x3804, 0x0c}, 1256 {0x3805, 0xdf}, 1257 {0x3806, 0x09}, 1258 {0x3807, 0xa3}, 1259 {0x3808, 0x06}, 1260 {0x3809, 0x60}, 1261 {0x380a, 0x04}, 1262 {0x380b, 0xc8}, 1263 {0x380c, 0x07}, 1264 {0x380d, 0x8c}, 1265 {0x380e, 0x09}, 1266 {0x380f, 0xb2}, 1267 {0x3810, 0x00}, 1268 {0x3811, 0x02}, 1269 {0x3812, 0x00}, 1270 {0x3813, 0x02}, 1271 {0x3814, 0x03}, 1272 {0x3815, 0x01}, 1273 {0x3816, 0x00}, 1274 {0x3817, 0x00}, 1275 {0x3818, 0x00}, 1276 {0x3819, 0x10}, 1277 {0x3820, 0x80}, 1278 {0x3821, 0x47}, 1279 {0x382a, 0x03}, 1280 {0x382b, 0x01}, 1281 {0x3830, 0x06}, 1282 {0x3836, 0x02}, 1283 {0x3862, 0x04}, 1284 {0x3863, 0x08}, 1285 {0x3cc0, 0x33}, 1286 {0x3d85, 0x17}, 1287 {0x3d8c, 0x73}, 1288 {0x3d8d, 0xde}, 1289 {0x4001, 0xe0}, 1290 {0x4003, 0x40}, 1291 {0x4008, 0x00}, 1292 {0x4009, 0x05}, 1293 {0x400a, 0x00}, 1294 {0x400b, 0x84}, 1295 {0x400f, 0x80}, 1296 {0x4010, 0xf0}, 1297 {0x4011, 0xff}, 1298 {0x4012, 0x02}, 1299 {0x4013, 0x01}, 1300 {0x4014, 0x01}, 1301 {0x4015, 0x01}, 1302 {0x4042, 0x00}, 1303 {0x4043, 0x80}, 1304 {0x4044, 0x00}, 1305 {0x4045, 0x80}, 1306 {0x4046, 0x00}, 1307 {0x4047, 0x80}, 1308 {0x4048, 0x00}, 1309 {0x4049, 0x80}, 1310 {0x4041, 0x03}, 1311 {0x404c, 0x20}, 1312 {0x404d, 0x00}, 1313 {0x404e, 0x20}, 1314 {0x4203, 0x80}, 1315 {0x4307, 0x30}, 1316 {0x4317, 0x00}, 1317 {0x4502, 0x50}, 1318 {0x4503, 0x08}, 1319 {0x4601, 0x80}, 1320 {0x4800, 0x44}, 1321 {0x4816, 0x53}, 1322 {0x481b, 0x50}, 1323 {0x481f, 0x27}, 1324 {0x4823, 0x3c}, 1325 {0x482b, 0x00}, 1326 {0x4831, 0x66}, 1327 {0x4837, 0x16}, 1328 {0x483c, 0x0f}, 1329 {0x484b, 0x05}, 1330 {0x5000, 0x77}, 1331 {0x5001, 0x0a}, 1332 {0x5003, 0xc8}, 1333 {0x5004, 0x04}, 1334 {0x5006, 0x00}, 1335 {0x5007, 0x00}, 1336 {0x502e, 0x03}, 1337 {0x5030, 0x41}, 1338 {0x5795, 0x00}, 1339 {0x5796, 0x10}, 1340 {0x5797, 0x10}, 1341 {0x5798, 0x73}, 1342 {0x5799, 0x73}, 1343 {0x579a, 0x00}, 1344 {0x579b, 0x28}, 1345 {0x579c, 0x00}, 1346 {0x579d, 0x16}, 1347 {0x579e, 0x06}, 1348 {0x579f, 0x20}, 1349 {0x57a0, 0x04}, 1350 {0x57a1, 0xa0}, 1351 {0x5780, 0x14}, 1352 {0x5781, 0x0f}, 1353 {0x5782, 0x44}, 1354 {0x5783, 0x02}, 1355 {0x5784, 0x01}, 1356 {0x5785, 0x01}, 1357 {0x5786, 0x00}, 1358 {0x5787, 0x04}, 1359 {0x5788, 0x02}, 1360 {0x5789, 0x0f}, 1361 {0x578a, 0xfd}, 1362 {0x578b, 0xf5}, 1363 {0x578c, 0xf5}, 1364 {0x578d, 0x03}, 1365 {0x578e, 0x08}, 1366 {0x578f, 0x0c}, 1367 {0x5790, 0x08}, 1368 {0x5791, 0x04}, 1369 {0x5792, 0x00}, 1370 {0x5793, 0x52}, 1371 {0x5794, 0xa3}, 1372 {0x59f8, 0x3d}, 1373 {0x5a08, 0x02}, 1374 {0x5b00, 0x02}, 1375 {0x5b01, 0x10}, 1376 {0x5b02, 0x03}, 1377 {0x5b03, 0xcf}, 1378 {0x5b05, 0x6c}, 1379 {0x5e00, 0x00}, 1380 {0x5e10, 0xfc} 1381 }; 1382 1383 static const struct ov8856_reg mipi_data_mbus_sbggr10_1x10[] = { 1384 {0x3813, 0x02}, 1385 }; 1386 1387 static const struct ov8856_reg mipi_data_mbus_sgrbg10_1x10[] = { 1388 {0x3813, 0x01}, 1389 }; 1390 1391 static const u32 ov8856_mbus_codes[] = { 1392 MEDIA_BUS_FMT_SBGGR10_1X10, 1393 MEDIA_BUS_FMT_SGRBG10_1X10 1394 }; 1395 1396 static const char * const ov8856_test_pattern_menu[] = { 1397 "Disabled", 1398 "Standard Color Bar", 1399 "Top-Bottom Darker Color Bar", 1400 "Right-Left Darker Color Bar", 1401 "Bottom-Top Darker Color Bar" 1402 }; 1403 1404 static const struct ov8856_reg_list bayer_offset_configs[] = { 1405 [OV8856_MEDIA_BUS_FMT_SBGGR10_1X10] = { 1406 .num_of_regs = ARRAY_SIZE(mipi_data_mbus_sbggr10_1x10), 1407 .regs = mipi_data_mbus_sbggr10_1x10, 1408 }, 1409 [OV8856_MEDIA_BUS_FMT_SGRBG10_1X10] = { 1410 .num_of_regs = ARRAY_SIZE(mipi_data_mbus_sgrbg10_1x10), 1411 .regs = mipi_data_mbus_sgrbg10_1x10, 1412 } 1413 }; 1414 1415 struct ov8856 { 1416 struct v4l2_subdev sd; 1417 struct media_pad pad; 1418 struct v4l2_ctrl_handler ctrl_handler; 1419 1420 struct clk *xvclk; 1421 struct gpio_desc *reset_gpio; 1422 struct regulator_bulk_data supplies[ARRAY_SIZE(ov8856_supply_names)]; 1423 1424 /* V4L2 Controls */ 1425 struct v4l2_ctrl *link_freq; 1426 struct v4l2_ctrl *pixel_rate; 1427 struct v4l2_ctrl *vblank; 1428 struct v4l2_ctrl *hblank; 1429 struct v4l2_ctrl *exposure; 1430 1431 /* Current mode */ 1432 const struct ov8856_mode *cur_mode; 1433 1434 /* Application specified mbus format */ 1435 u32 cur_mbus_index; 1436 1437 /* To serialize asynchronus callbacks */ 1438 struct mutex mutex; 1439 1440 /* Streaming on/off */ 1441 bool streaming; 1442 1443 /* lanes index */ 1444 u8 nlanes; 1445 1446 const struct ov8856_lane_cfg *priv_lane; 1447 u8 modes_size; 1448 }; 1449 1450 struct ov8856_lane_cfg { 1451 const s64 link_freq_menu_items[2]; 1452 const struct ov8856_link_freq_config link_freq_configs[2]; 1453 const struct ov8856_mode supported_modes[4]; 1454 }; 1455 1456 static const struct ov8856_lane_cfg lane_cfg_2 = { 1457 { 1458 720000000, 1459 360000000, 1460 }, 1461 {{ 1462 .reg_list = { 1463 .num_of_regs = 1464 ARRAY_SIZE(mipi_data_rate_lane_2.regs_0), 1465 .regs = mipi_data_rate_lane_2.regs_0, 1466 } 1467 }, 1468 { 1469 .reg_list = { 1470 .num_of_regs = 1471 ARRAY_SIZE(mipi_data_rate_lane_2.regs_1), 1472 .regs = mipi_data_rate_lane_2.regs_1, 1473 } 1474 }}, 1475 {{ 1476 .width = 3280, 1477 .height = 2464, 1478 .hts = 1928, 1479 .vts_def = 2488, 1480 .vts_min = 2488, 1481 .reg_list = { 1482 .num_of_regs = 1483 ARRAY_SIZE(lane_2_mode_3280x2464), 1484 .regs = lane_2_mode_3280x2464, 1485 }, 1486 .link_freq_index = 0, 1487 .data_lanes = 2, 1488 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10, 1489 }, 1490 { 1491 .width = 1640, 1492 .height = 1232, 1493 .hts = 3168, 1494 .vts_def = 1514, 1495 .vts_min = 1514, 1496 .reg_list = { 1497 .num_of_regs = 1498 ARRAY_SIZE(lane_2_mode_1640x1232), 1499 .regs = lane_2_mode_1640x1232, 1500 }, 1501 .link_freq_index = 1, 1502 .data_lanes = 2, 1503 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10, 1504 }} 1505 }; 1506 1507 static const struct ov8856_lane_cfg lane_cfg_4 = { 1508 { 1509 360000000, 1510 180000000, 1511 }, 1512 {{ 1513 .reg_list = { 1514 .num_of_regs = 1515 ARRAY_SIZE(mipi_data_rate_lane_4.regs_0), 1516 .regs = mipi_data_rate_lane_4.regs_0, 1517 } 1518 }, 1519 { 1520 .reg_list = { 1521 .num_of_regs = 1522 ARRAY_SIZE(mipi_data_rate_lane_4.regs_1), 1523 .regs = mipi_data_rate_lane_4.regs_1, 1524 } 1525 }}, 1526 {{ 1527 .width = 3280, 1528 .height = 2464, 1529 .hts = 1928, 1530 .vts_def = 2488, 1531 .vts_min = 2488, 1532 .reg_list = { 1533 .num_of_regs = 1534 ARRAY_SIZE(lane_4_mode_3280x2464), 1535 .regs = lane_4_mode_3280x2464, 1536 }, 1537 .link_freq_index = 0, 1538 .data_lanes = 4, 1539 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10, 1540 }, 1541 { 1542 .width = 1640, 1543 .height = 1232, 1544 .hts = 3820, 1545 .vts_def = 1256, 1546 .vts_min = 1256, 1547 .reg_list = { 1548 .num_of_regs = 1549 ARRAY_SIZE(lane_4_mode_1640x1232), 1550 .regs = lane_4_mode_1640x1232, 1551 }, 1552 .link_freq_index = 1, 1553 .data_lanes = 4, 1554 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10, 1555 }, 1556 { 1557 .width = 3264, 1558 .height = 2448, 1559 .hts = 1932, 1560 .vts_def = 2482, 1561 .vts_min = 2482, 1562 .reg_list = { 1563 .num_of_regs = 1564 ARRAY_SIZE(lane_4_mode_3264x2448), 1565 .regs = lane_4_mode_3264x2448, 1566 }, 1567 .link_freq_index = 0, 1568 .data_lanes = 4, 1569 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SBGGR10_1X10, 1570 }, 1571 { 1572 .width = 1632, 1573 .height = 1224, 1574 .hts = 1932, 1575 .vts_def = 2482, 1576 .vts_min = 2482, 1577 .reg_list = { 1578 .num_of_regs = 1579 ARRAY_SIZE(lane_4_mode_1632x1224), 1580 .regs = lane_4_mode_1632x1224, 1581 }, 1582 .link_freq_index = 1, 1583 .data_lanes = 4, 1584 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SBGGR10_1X10, 1585 }} 1586 }; 1587 1588 static unsigned int ov8856_modes_num(const struct ov8856 *ov8856) 1589 { 1590 unsigned int i, count = 0; 1591 1592 for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->supported_modes); i++) { 1593 if (ov8856->priv_lane->supported_modes[i].width == 0) 1594 break; 1595 count++; 1596 } 1597 1598 return count; 1599 } 1600 1601 static u64 to_rate(const s64 *link_freq_menu_items, 1602 u32 f_index, u8 nlanes) 1603 { 1604 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * nlanes; 1605 1606 do_div(pixel_rate, OV8856_RGB_DEPTH); 1607 1608 return pixel_rate; 1609 } 1610 1611 static u64 to_pixels_per_line(const s64 *link_freq_menu_items, u32 hts, 1612 u32 f_index, u8 nlanes) 1613 { 1614 u64 ppl = hts * to_rate(link_freq_menu_items, f_index, nlanes); 1615 1616 do_div(ppl, OV8856_SCLK); 1617 1618 return ppl; 1619 } 1620 1621 static int ov8856_read_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 *val) 1622 { 1623 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 1624 struct i2c_msg msgs[2]; 1625 u8 addr_buf[2]; 1626 u8 data_buf[4] = {0}; 1627 int ret; 1628 1629 if (len > 4) 1630 return -EINVAL; 1631 1632 put_unaligned_be16(reg, addr_buf); 1633 msgs[0].addr = client->addr; 1634 msgs[0].flags = 0; 1635 msgs[0].len = sizeof(addr_buf); 1636 msgs[0].buf = addr_buf; 1637 msgs[1].addr = client->addr; 1638 msgs[1].flags = I2C_M_RD; 1639 msgs[1].len = len; 1640 msgs[1].buf = &data_buf[4 - len]; 1641 1642 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 1643 if (ret != ARRAY_SIZE(msgs)) 1644 return -EIO; 1645 1646 *val = get_unaligned_be32(data_buf); 1647 1648 return 0; 1649 } 1650 1651 static int ov8856_write_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 val) 1652 { 1653 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 1654 u8 buf[6]; 1655 1656 if (len > 4) 1657 return -EINVAL; 1658 1659 put_unaligned_be16(reg, buf); 1660 put_unaligned_be32(val << 8 * (4 - len), buf + 2); 1661 if (i2c_master_send(client, buf, len + 2) != len + 2) 1662 return -EIO; 1663 1664 return 0; 1665 } 1666 1667 static int ov8856_write_reg_list(struct ov8856 *ov8856, 1668 const struct ov8856_reg_list *r_list) 1669 { 1670 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 1671 unsigned int i; 1672 int ret; 1673 1674 for (i = 0; i < r_list->num_of_regs; i++) { 1675 ret = ov8856_write_reg(ov8856, r_list->regs[i].address, 1, 1676 r_list->regs[i].val); 1677 if (ret) { 1678 dev_err_ratelimited(&client->dev, 1679 "failed to write reg 0x%4.4x. error = %d", 1680 r_list->regs[i].address, ret); 1681 return ret; 1682 } 1683 } 1684 1685 return 0; 1686 } 1687 1688 static int ov8856_update_digital_gain(struct ov8856 *ov8856, u32 d_gain) 1689 { 1690 int ret; 1691 1692 ret = ov8856_write_reg(ov8856, OV8856_REG_MWB_R_GAIN, 1693 OV8856_REG_VALUE_16BIT, d_gain); 1694 if (ret) 1695 return ret; 1696 1697 ret = ov8856_write_reg(ov8856, OV8856_REG_MWB_G_GAIN, 1698 OV8856_REG_VALUE_16BIT, d_gain); 1699 if (ret) 1700 return ret; 1701 1702 return ov8856_write_reg(ov8856, OV8856_REG_MWB_B_GAIN, 1703 OV8856_REG_VALUE_16BIT, d_gain); 1704 } 1705 1706 static int ov8856_test_pattern(struct ov8856 *ov8856, u32 pattern) 1707 { 1708 if (pattern) 1709 pattern = (pattern - 1) << OV8856_TEST_PATTERN_BAR_SHIFT | 1710 OV8856_TEST_PATTERN_ENABLE; 1711 1712 return ov8856_write_reg(ov8856, OV8856_REG_TEST_PATTERN, 1713 OV8856_REG_VALUE_08BIT, pattern); 1714 } 1715 1716 static int ov8856_set_ctrl_hflip(struct ov8856 *ov8856, u32 ctrl_val) 1717 { 1718 int ret; 1719 u32 val; 1720 1721 ret = ov8856_read_reg(ov8856, OV8856_REG_MIRROR_OPT_1, 1722 OV8856_REG_VALUE_08BIT, &val); 1723 if (ret) 1724 return ret; 1725 1726 ret = ov8856_write_reg(ov8856, OV8856_REG_MIRROR_OPT_1, 1727 OV8856_REG_VALUE_08BIT, 1728 ctrl_val ? val & ~OV8856_REG_MIRROR_OP_2 : 1729 val | OV8856_REG_MIRROR_OP_2); 1730 1731 if (ret) 1732 return ret; 1733 1734 ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT2, 1735 OV8856_REG_VALUE_08BIT, &val); 1736 if (ret) 1737 return ret; 1738 1739 return ov8856_write_reg(ov8856, OV8856_REG_FORMAT2, 1740 OV8856_REG_VALUE_08BIT, 1741 ctrl_val ? val & ~OV8856_REG_FORMAT2_OP_1 & 1742 ~OV8856_REG_FORMAT2_OP_2 & 1743 ~OV8856_REG_FORMAT2_OP_3 : 1744 val | OV8856_REG_FORMAT2_OP_1 | 1745 OV8856_REG_FORMAT2_OP_2 | 1746 OV8856_REG_FORMAT2_OP_3); 1747 } 1748 1749 static int ov8856_set_ctrl_vflip(struct ov8856 *ov8856, u8 ctrl_val) 1750 { 1751 int ret; 1752 u32 val; 1753 1754 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_1, 1755 OV8856_REG_VALUE_08BIT, &val); 1756 if (ret) 1757 return ret; 1758 1759 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_1, 1760 OV8856_REG_VALUE_08BIT, 1761 ctrl_val ? val | OV8856_REG_FLIP_OP_1 | 1762 OV8856_REG_FLIP_OP_2 : 1763 val & ~OV8856_REG_FLIP_OP_1 & 1764 ~OV8856_REG_FLIP_OP_2); 1765 1766 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_2, 1767 OV8856_REG_VALUE_08BIT, &val); 1768 if (ret) 1769 return ret; 1770 1771 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_2, 1772 OV8856_REG_VALUE_08BIT, 1773 ctrl_val ? val | OV8856_REG_FLIP_OP_2 : 1774 val & ~OV8856_REG_FLIP_OP_2); 1775 1776 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_3, 1777 OV8856_REG_VALUE_08BIT, &val); 1778 if (ret) 1779 return ret; 1780 1781 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_3, 1782 OV8856_REG_VALUE_08BIT, 1783 ctrl_val ? val & ~OV8856_REG_FLIP_OP_0 & 1784 ~OV8856_REG_FLIP_OP_1 : 1785 val | OV8856_REG_FLIP_OP_0 | 1786 OV8856_REG_FLIP_OP_1); 1787 1788 ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT1, 1789 OV8856_REG_VALUE_08BIT, &val); 1790 if (ret) 1791 return ret; 1792 1793 return ov8856_write_reg(ov8856, OV8856_REG_FORMAT1, 1794 OV8856_REG_VALUE_08BIT, 1795 ctrl_val ? val | OV8856_REG_FORMAT1_OP_1 | 1796 OV8856_REG_FORMAT1_OP_3 | 1797 OV8856_REG_FORMAT1_OP_2 : 1798 val & ~OV8856_REG_FORMAT1_OP_1 & 1799 ~OV8856_REG_FORMAT1_OP_3 & 1800 ~OV8856_REG_FORMAT1_OP_2); 1801 } 1802 1803 static int ov8856_set_ctrl(struct v4l2_ctrl *ctrl) 1804 { 1805 struct ov8856 *ov8856 = container_of(ctrl->handler, 1806 struct ov8856, ctrl_handler); 1807 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 1808 s64 exposure_max; 1809 int ret = 0; 1810 1811 /* Propagate change of current control to all related controls */ 1812 if (ctrl->id == V4L2_CID_VBLANK) { 1813 /* Update max exposure while meeting expected vblanking */ 1814 exposure_max = ov8856->cur_mode->height + ctrl->val - 1815 OV8856_EXPOSURE_MAX_MARGIN; 1816 __v4l2_ctrl_modify_range(ov8856->exposure, 1817 ov8856->exposure->minimum, 1818 exposure_max, ov8856->exposure->step, 1819 exposure_max); 1820 } 1821 1822 /* V4L2 controls values will be applied only when power is already up */ 1823 if (!pm_runtime_get_if_in_use(&client->dev)) 1824 return 0; 1825 1826 switch (ctrl->id) { 1827 case V4L2_CID_ANALOGUE_GAIN: 1828 ret = ov8856_write_reg(ov8856, OV8856_REG_ANALOG_GAIN, 1829 OV8856_REG_VALUE_16BIT, ctrl->val); 1830 break; 1831 1832 case V4L2_CID_DIGITAL_GAIN: 1833 ret = ov8856_update_digital_gain(ov8856, ctrl->val); 1834 break; 1835 1836 case V4L2_CID_EXPOSURE: 1837 /* 4 least significant bits of expsoure are fractional part */ 1838 ret = ov8856_write_reg(ov8856, OV8856_REG_EXPOSURE, 1839 OV8856_REG_VALUE_24BIT, ctrl->val << 4); 1840 break; 1841 1842 case V4L2_CID_VBLANK: 1843 ret = ov8856_write_reg(ov8856, OV8856_REG_VTS, 1844 OV8856_REG_VALUE_16BIT, 1845 ov8856->cur_mode->height + ctrl->val); 1846 break; 1847 1848 case V4L2_CID_TEST_PATTERN: 1849 ret = ov8856_test_pattern(ov8856, ctrl->val); 1850 break; 1851 1852 case V4L2_CID_HFLIP: 1853 ret = ov8856_set_ctrl_hflip(ov8856, ctrl->val); 1854 break; 1855 1856 case V4L2_CID_VFLIP: 1857 ret = ov8856_set_ctrl_vflip(ov8856, ctrl->val); 1858 break; 1859 1860 default: 1861 ret = -EINVAL; 1862 break; 1863 } 1864 1865 pm_runtime_put(&client->dev); 1866 1867 return ret; 1868 } 1869 1870 static const struct v4l2_ctrl_ops ov8856_ctrl_ops = { 1871 .s_ctrl = ov8856_set_ctrl, 1872 }; 1873 1874 static int ov8856_init_controls(struct ov8856 *ov8856) 1875 { 1876 struct v4l2_ctrl_handler *ctrl_hdlr; 1877 s64 exposure_max, h_blank; 1878 int ret; 1879 1880 ctrl_hdlr = &ov8856->ctrl_handler; 1881 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8); 1882 if (ret) 1883 return ret; 1884 1885 ctrl_hdlr->lock = &ov8856->mutex; 1886 ov8856->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov8856_ctrl_ops, 1887 V4L2_CID_LINK_FREQ, 1888 ARRAY_SIZE 1889 (ov8856->priv_lane->link_freq_menu_items) 1890 - 1, 1891 0, ov8856->priv_lane->link_freq_menu_items); 1892 if (ov8856->link_freq) 1893 ov8856->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1894 1895 ov8856->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 1896 V4L2_CID_PIXEL_RATE, 0, 1897 to_rate(ov8856->priv_lane->link_freq_menu_items, 1898 0, 1899 ov8856->cur_mode->data_lanes), 1, 1900 to_rate(ov8856->priv_lane->link_freq_menu_items, 1901 0, 1902 ov8856->cur_mode->data_lanes)); 1903 ov8856->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 1904 V4L2_CID_VBLANK, 1905 ov8856->cur_mode->vts_min - ov8856->cur_mode->height, 1906 OV8856_VTS_MAX - ov8856->cur_mode->height, 1, 1907 ov8856->cur_mode->vts_def - 1908 ov8856->cur_mode->height); 1909 h_blank = to_pixels_per_line(ov8856->priv_lane->link_freq_menu_items, 1910 ov8856->cur_mode->hts, 1911 ov8856->cur_mode->link_freq_index, 1912 ov8856->cur_mode->data_lanes) - 1913 ov8856->cur_mode->width; 1914 ov8856->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 1915 V4L2_CID_HBLANK, h_blank, h_blank, 1, 1916 h_blank); 1917 if (ov8856->hblank) 1918 ov8856->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1919 1920 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, 1921 OV8856_ANAL_GAIN_MIN, OV8856_ANAL_GAIN_MAX, 1922 OV8856_ANAL_GAIN_STEP, OV8856_ANAL_GAIN_MIN); 1923 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_DIGITAL_GAIN, 1924 OV8856_DGTL_GAIN_MIN, OV8856_DGTL_GAIN_MAX, 1925 OV8856_DGTL_GAIN_STEP, OV8856_DGTL_GAIN_DEFAULT); 1926 exposure_max = ov8856->cur_mode->vts_def - OV8856_EXPOSURE_MAX_MARGIN; 1927 ov8856->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 1928 V4L2_CID_EXPOSURE, 1929 OV8856_EXPOSURE_MIN, exposure_max, 1930 OV8856_EXPOSURE_STEP, 1931 exposure_max); 1932 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov8856_ctrl_ops, 1933 V4L2_CID_TEST_PATTERN, 1934 ARRAY_SIZE(ov8856_test_pattern_menu) - 1, 1935 0, 0, ov8856_test_pattern_menu); 1936 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 1937 V4L2_CID_HFLIP, 0, 1, 1, 0); 1938 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 1939 V4L2_CID_VFLIP, 0, 1, 1, 0); 1940 if (ctrl_hdlr->error) 1941 return ctrl_hdlr->error; 1942 1943 ov8856->sd.ctrl_handler = ctrl_hdlr; 1944 1945 return 0; 1946 } 1947 1948 static void ov8856_update_pad_format(struct ov8856 *ov8856, 1949 const struct ov8856_mode *mode, 1950 struct v4l2_mbus_framefmt *fmt) 1951 { 1952 int index; 1953 1954 fmt->width = mode->width; 1955 fmt->height = mode->height; 1956 for (index = 0; index < ARRAY_SIZE(ov8856_mbus_codes); ++index) 1957 if (ov8856_mbus_codes[index] == fmt->code) 1958 break; 1959 if (index == ARRAY_SIZE(ov8856_mbus_codes)) 1960 index = mode->default_mbus_index; 1961 fmt->code = ov8856_mbus_codes[index]; 1962 ov8856->cur_mbus_index = index; 1963 fmt->field = V4L2_FIELD_NONE; 1964 } 1965 1966 static int ov8856_start_streaming(struct ov8856 *ov8856) 1967 { 1968 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 1969 const struct ov8856_reg_list *reg_list; 1970 int link_freq_index, ret; 1971 1972 link_freq_index = ov8856->cur_mode->link_freq_index; 1973 reg_list = &ov8856->priv_lane->link_freq_configs[link_freq_index].reg_list; 1974 1975 ret = ov8856_write_reg_list(ov8856, reg_list); 1976 if (ret) { 1977 dev_err(&client->dev, "failed to set plls"); 1978 return ret; 1979 } 1980 1981 reg_list = &ov8856->cur_mode->reg_list; 1982 ret = ov8856_write_reg_list(ov8856, reg_list); 1983 if (ret) { 1984 dev_err(&client->dev, "failed to set mode"); 1985 return ret; 1986 } 1987 1988 reg_list = &bayer_offset_configs[ov8856->cur_mbus_index]; 1989 ret = ov8856_write_reg_list(ov8856, reg_list); 1990 if (ret) { 1991 dev_err(&client->dev, "failed to set mbus format"); 1992 return ret; 1993 } 1994 1995 ret = __v4l2_ctrl_handler_setup(ov8856->sd.ctrl_handler); 1996 if (ret) 1997 return ret; 1998 1999 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, 2000 OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING); 2001 if (ret) { 2002 dev_err(&client->dev, "failed to set stream"); 2003 return ret; 2004 } 2005 2006 return 0; 2007 } 2008 2009 static void ov8856_stop_streaming(struct ov8856 *ov8856) 2010 { 2011 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 2012 2013 if (ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, 2014 OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY)) 2015 dev_err(&client->dev, "failed to set stream"); 2016 } 2017 2018 static int ov8856_set_stream(struct v4l2_subdev *sd, int enable) 2019 { 2020 struct ov8856 *ov8856 = to_ov8856(sd); 2021 struct i2c_client *client = v4l2_get_subdevdata(sd); 2022 int ret = 0; 2023 2024 if (ov8856->streaming == enable) 2025 return 0; 2026 2027 mutex_lock(&ov8856->mutex); 2028 if (enable) { 2029 ret = pm_runtime_resume_and_get(&client->dev); 2030 if (ret < 0) { 2031 mutex_unlock(&ov8856->mutex); 2032 return ret; 2033 } 2034 2035 ret = ov8856_start_streaming(ov8856); 2036 if (ret) { 2037 enable = 0; 2038 ov8856_stop_streaming(ov8856); 2039 pm_runtime_put(&client->dev); 2040 } 2041 } else { 2042 ov8856_stop_streaming(ov8856); 2043 pm_runtime_put(&client->dev); 2044 } 2045 2046 ov8856->streaming = enable; 2047 mutex_unlock(&ov8856->mutex); 2048 2049 return ret; 2050 } 2051 2052 static int __ov8856_power_on(struct ov8856 *ov8856) 2053 { 2054 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 2055 int ret; 2056 2057 if (is_acpi_node(dev_fwnode(&client->dev))) 2058 return 0; 2059 2060 ret = clk_prepare_enable(ov8856->xvclk); 2061 if (ret < 0) { 2062 dev_err(&client->dev, "failed to enable xvclk\n"); 2063 return ret; 2064 } 2065 2066 if (ov8856->reset_gpio) { 2067 gpiod_set_value_cansleep(ov8856->reset_gpio, 1); 2068 usleep_range(1000, 2000); 2069 } 2070 2071 ret = regulator_bulk_enable(ARRAY_SIZE(ov8856_supply_names), 2072 ov8856->supplies); 2073 if (ret < 0) { 2074 dev_err(&client->dev, "failed to enable regulators\n"); 2075 goto disable_clk; 2076 } 2077 2078 gpiod_set_value_cansleep(ov8856->reset_gpio, 0); 2079 usleep_range(1500, 1800); 2080 2081 return 0; 2082 2083 disable_clk: 2084 gpiod_set_value_cansleep(ov8856->reset_gpio, 1); 2085 clk_disable_unprepare(ov8856->xvclk); 2086 2087 return ret; 2088 } 2089 2090 static void __ov8856_power_off(struct ov8856 *ov8856) 2091 { 2092 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 2093 2094 if (is_acpi_node(dev_fwnode(&client->dev))) 2095 return; 2096 2097 gpiod_set_value_cansleep(ov8856->reset_gpio, 1); 2098 regulator_bulk_disable(ARRAY_SIZE(ov8856_supply_names), 2099 ov8856->supplies); 2100 clk_disable_unprepare(ov8856->xvclk); 2101 } 2102 2103 static int __maybe_unused ov8856_suspend(struct device *dev) 2104 { 2105 struct v4l2_subdev *sd = dev_get_drvdata(dev); 2106 struct ov8856 *ov8856 = to_ov8856(sd); 2107 2108 mutex_lock(&ov8856->mutex); 2109 if (ov8856->streaming) 2110 ov8856_stop_streaming(ov8856); 2111 2112 __ov8856_power_off(ov8856); 2113 mutex_unlock(&ov8856->mutex); 2114 2115 return 0; 2116 } 2117 2118 static int __maybe_unused ov8856_resume(struct device *dev) 2119 { 2120 struct v4l2_subdev *sd = dev_get_drvdata(dev); 2121 struct ov8856 *ov8856 = to_ov8856(sd); 2122 int ret; 2123 2124 mutex_lock(&ov8856->mutex); 2125 2126 __ov8856_power_on(ov8856); 2127 if (ov8856->streaming) { 2128 ret = ov8856_start_streaming(ov8856); 2129 if (ret) { 2130 ov8856->streaming = false; 2131 ov8856_stop_streaming(ov8856); 2132 mutex_unlock(&ov8856->mutex); 2133 return ret; 2134 } 2135 } 2136 2137 mutex_unlock(&ov8856->mutex); 2138 2139 return 0; 2140 } 2141 2142 static int ov8856_set_format(struct v4l2_subdev *sd, 2143 struct v4l2_subdev_state *sd_state, 2144 struct v4l2_subdev_format *fmt) 2145 { 2146 struct ov8856 *ov8856 = to_ov8856(sd); 2147 const struct ov8856_mode *mode; 2148 s32 vblank_def, h_blank; 2149 2150 mode = v4l2_find_nearest_size(ov8856->priv_lane->supported_modes, 2151 ov8856->modes_size, 2152 width, height, fmt->format.width, 2153 fmt->format.height); 2154 2155 mutex_lock(&ov8856->mutex); 2156 ov8856_update_pad_format(ov8856, mode, &fmt->format); 2157 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 2158 *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format; 2159 } else { 2160 ov8856->cur_mode = mode; 2161 __v4l2_ctrl_s_ctrl(ov8856->link_freq, mode->link_freq_index); 2162 __v4l2_ctrl_s_ctrl_int64(ov8856->pixel_rate, 2163 to_rate(ov8856->priv_lane->link_freq_menu_items, 2164 mode->link_freq_index, 2165 ov8856->cur_mode->data_lanes)); 2166 2167 /* Update limits and set FPS to default */ 2168 vblank_def = mode->vts_def - mode->height; 2169 __v4l2_ctrl_modify_range(ov8856->vblank, 2170 mode->vts_min - mode->height, 2171 OV8856_VTS_MAX - mode->height, 1, 2172 vblank_def); 2173 __v4l2_ctrl_s_ctrl(ov8856->vblank, vblank_def); 2174 h_blank = to_pixels_per_line(ov8856->priv_lane->link_freq_menu_items, 2175 mode->hts, 2176 mode->link_freq_index, 2177 ov8856->cur_mode->data_lanes) 2178 - mode->width; 2179 __v4l2_ctrl_modify_range(ov8856->hblank, h_blank, h_blank, 1, 2180 h_blank); 2181 } 2182 2183 mutex_unlock(&ov8856->mutex); 2184 2185 return 0; 2186 } 2187 2188 static int ov8856_get_format(struct v4l2_subdev *sd, 2189 struct v4l2_subdev_state *sd_state, 2190 struct v4l2_subdev_format *fmt) 2191 { 2192 struct ov8856 *ov8856 = to_ov8856(sd); 2193 2194 mutex_lock(&ov8856->mutex); 2195 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) 2196 fmt->format = *v4l2_subdev_get_try_format(&ov8856->sd, 2197 sd_state, 2198 fmt->pad); 2199 else 2200 ov8856_update_pad_format(ov8856, ov8856->cur_mode, &fmt->format); 2201 2202 mutex_unlock(&ov8856->mutex); 2203 2204 return 0; 2205 } 2206 2207 static int ov8856_enum_mbus_code(struct v4l2_subdev *sd, 2208 struct v4l2_subdev_state *sd_state, 2209 struct v4l2_subdev_mbus_code_enum *code) 2210 { 2211 if (code->index >= ARRAY_SIZE(ov8856_mbus_codes)) 2212 return -EINVAL; 2213 2214 code->code = ov8856_mbus_codes[code->index]; 2215 2216 return 0; 2217 } 2218 2219 static int ov8856_enum_frame_size(struct v4l2_subdev *sd, 2220 struct v4l2_subdev_state *sd_state, 2221 struct v4l2_subdev_frame_size_enum *fse) 2222 { 2223 struct ov8856 *ov8856 = to_ov8856(sd); 2224 int index; 2225 2226 if (fse->index >= ov8856->modes_size) 2227 return -EINVAL; 2228 2229 for (index = 0; index < ARRAY_SIZE(ov8856_mbus_codes); ++index) 2230 if (fse->code == ov8856_mbus_codes[index]) 2231 break; 2232 if (index == ARRAY_SIZE(ov8856_mbus_codes)) 2233 return -EINVAL; 2234 2235 fse->min_width = ov8856->priv_lane->supported_modes[fse->index].width; 2236 fse->max_width = fse->min_width; 2237 fse->min_height = ov8856->priv_lane->supported_modes[fse->index].height; 2238 fse->max_height = fse->min_height; 2239 2240 return 0; 2241 } 2242 2243 static int ov8856_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) 2244 { 2245 struct ov8856 *ov8856 = to_ov8856(sd); 2246 2247 mutex_lock(&ov8856->mutex); 2248 ov8856_update_pad_format(ov8856, &ov8856->priv_lane->supported_modes[0], 2249 v4l2_subdev_get_try_format(sd, fh->state, 0)); 2250 mutex_unlock(&ov8856->mutex); 2251 2252 return 0; 2253 } 2254 2255 static const struct v4l2_subdev_video_ops ov8856_video_ops = { 2256 .s_stream = ov8856_set_stream, 2257 }; 2258 2259 static const struct v4l2_subdev_pad_ops ov8856_pad_ops = { 2260 .set_fmt = ov8856_set_format, 2261 .get_fmt = ov8856_get_format, 2262 .enum_mbus_code = ov8856_enum_mbus_code, 2263 .enum_frame_size = ov8856_enum_frame_size, 2264 }; 2265 2266 static const struct v4l2_subdev_ops ov8856_subdev_ops = { 2267 .video = &ov8856_video_ops, 2268 .pad = &ov8856_pad_ops, 2269 }; 2270 2271 static const struct media_entity_operations ov8856_subdev_entity_ops = { 2272 .link_validate = v4l2_subdev_link_validate, 2273 }; 2274 2275 static const struct v4l2_subdev_internal_ops ov8856_internal_ops = { 2276 .open = ov8856_open, 2277 }; 2278 2279 static int ov8856_identify_module(struct ov8856 *ov8856) 2280 { 2281 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 2282 int ret; 2283 u32 val; 2284 2285 ret = ov8856_read_reg(ov8856, OV8856_REG_CHIP_ID, 2286 OV8856_REG_VALUE_24BIT, &val); 2287 if (ret) 2288 return ret; 2289 2290 if (val != OV8856_CHIP_ID) { 2291 dev_err(&client->dev, "chip id mismatch: %x!=%x", 2292 OV8856_CHIP_ID, val); 2293 return -ENXIO; 2294 } 2295 2296 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, 2297 OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING); 2298 if (ret) 2299 return ret; 2300 2301 ret = ov8856_write_reg(ov8856, OV8856_OTP_MODE_CTRL, 2302 OV8856_REG_VALUE_08BIT, OV8856_OTP_MODE_AUTO); 2303 if (ret) { 2304 dev_err(&client->dev, "failed to set otp mode"); 2305 return ret; 2306 } 2307 2308 ret = ov8856_write_reg(ov8856, OV8856_OTP_LOAD_CTRL, 2309 OV8856_REG_VALUE_08BIT, 2310 OV8856_OTP_LOAD_CTRL_ENABLE); 2311 if (ret) { 2312 dev_err(&client->dev, "failed to enable load control"); 2313 return ret; 2314 } 2315 2316 ret = ov8856_read_reg(ov8856, OV8856_MODULE_REVISION, 2317 OV8856_REG_VALUE_08BIT, &val); 2318 if (ret) { 2319 dev_err(&client->dev, "failed to read module revision"); 2320 return ret; 2321 } 2322 2323 dev_info(&client->dev, "OV8856 revision %x (%s) at address 0x%02x\n", 2324 val, 2325 val == OV8856_2A_MODULE ? "2A" : 2326 val == OV8856_1B_MODULE ? "1B" : "unknown revision", 2327 client->addr); 2328 2329 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, 2330 OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY); 2331 if (ret) { 2332 dev_err(&client->dev, "failed to exit streaming mode"); 2333 return ret; 2334 } 2335 2336 return 0; 2337 } 2338 2339 static int ov8856_get_hwcfg(struct ov8856 *ov8856, struct device *dev) 2340 { 2341 struct fwnode_handle *ep; 2342 struct fwnode_handle *fwnode = dev_fwnode(dev); 2343 struct v4l2_fwnode_endpoint bus_cfg = { 2344 .bus_type = V4L2_MBUS_CSI2_DPHY 2345 }; 2346 u32 xvclk_rate; 2347 int ret; 2348 unsigned int i, j; 2349 2350 if (!fwnode) 2351 return -ENXIO; 2352 2353 ret = fwnode_property_read_u32(fwnode, "clock-frequency", &xvclk_rate); 2354 if (ret) 2355 return ret; 2356 2357 if (!is_acpi_node(fwnode)) { 2358 ov8856->xvclk = devm_clk_get(dev, "xvclk"); 2359 if (IS_ERR(ov8856->xvclk)) { 2360 dev_err(dev, "could not get xvclk clock (%pe)\n", 2361 ov8856->xvclk); 2362 return PTR_ERR(ov8856->xvclk); 2363 } 2364 2365 clk_set_rate(ov8856->xvclk, xvclk_rate); 2366 xvclk_rate = clk_get_rate(ov8856->xvclk); 2367 2368 ov8856->reset_gpio = devm_gpiod_get_optional(dev, "reset", 2369 GPIOD_OUT_LOW); 2370 if (IS_ERR(ov8856->reset_gpio)) 2371 return PTR_ERR(ov8856->reset_gpio); 2372 2373 for (i = 0; i < ARRAY_SIZE(ov8856_supply_names); i++) 2374 ov8856->supplies[i].supply = ov8856_supply_names[i]; 2375 2376 ret = devm_regulator_bulk_get(dev, 2377 ARRAY_SIZE(ov8856_supply_names), 2378 ov8856->supplies); 2379 if (ret) 2380 return ret; 2381 } 2382 2383 if (xvclk_rate != OV8856_XVCLK_19_2) 2384 dev_warn(dev, "external clock rate %u is unsupported", 2385 xvclk_rate); 2386 2387 ep = fwnode_graph_get_next_endpoint(fwnode, NULL); 2388 if (!ep) 2389 return -ENXIO; 2390 2391 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg); 2392 fwnode_handle_put(ep); 2393 if (ret) 2394 return ret; 2395 2396 /* Get number of data lanes */ 2397 if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2 && 2398 bus_cfg.bus.mipi_csi2.num_data_lanes != 4) { 2399 dev_err(dev, "number of CSI2 data lanes %d is not supported", 2400 bus_cfg.bus.mipi_csi2.num_data_lanes); 2401 ret = -EINVAL; 2402 goto check_hwcfg_error; 2403 } 2404 2405 dev_dbg(dev, "Using %u data lanes\n", ov8856->cur_mode->data_lanes); 2406 2407 if (bus_cfg.bus.mipi_csi2.num_data_lanes == 2) 2408 ov8856->priv_lane = &lane_cfg_2; 2409 else 2410 ov8856->priv_lane = &lane_cfg_4; 2411 2412 ov8856->modes_size = ov8856_modes_num(ov8856); 2413 2414 if (!bus_cfg.nr_of_link_frequencies) { 2415 dev_err(dev, "no link frequencies defined"); 2416 ret = -EINVAL; 2417 goto check_hwcfg_error; 2418 } 2419 2420 for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->link_freq_menu_items); i++) { 2421 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) { 2422 if (ov8856->priv_lane->link_freq_menu_items[i] == 2423 bus_cfg.link_frequencies[j]) 2424 break; 2425 } 2426 2427 if (j == bus_cfg.nr_of_link_frequencies) { 2428 dev_err(dev, "no link frequency %lld supported", 2429 ov8856->priv_lane->link_freq_menu_items[i]); 2430 ret = -EINVAL; 2431 goto check_hwcfg_error; 2432 } 2433 } 2434 2435 check_hwcfg_error: 2436 v4l2_fwnode_endpoint_free(&bus_cfg); 2437 2438 return ret; 2439 } 2440 2441 static int ov8856_remove(struct i2c_client *client) 2442 { 2443 struct v4l2_subdev *sd = i2c_get_clientdata(client); 2444 struct ov8856 *ov8856 = to_ov8856(sd); 2445 2446 v4l2_async_unregister_subdev(sd); 2447 media_entity_cleanup(&sd->entity); 2448 v4l2_ctrl_handler_free(sd->ctrl_handler); 2449 pm_runtime_disable(&client->dev); 2450 mutex_destroy(&ov8856->mutex); 2451 2452 __ov8856_power_off(ov8856); 2453 2454 return 0; 2455 } 2456 2457 static int ov8856_probe(struct i2c_client *client) 2458 { 2459 struct ov8856 *ov8856; 2460 int ret; 2461 2462 ov8856 = devm_kzalloc(&client->dev, sizeof(*ov8856), GFP_KERNEL); 2463 if (!ov8856) 2464 return -ENOMEM; 2465 2466 ret = ov8856_get_hwcfg(ov8856, &client->dev); 2467 if (ret) { 2468 dev_err(&client->dev, "failed to get HW configuration: %d", 2469 ret); 2470 return ret; 2471 } 2472 2473 v4l2_i2c_subdev_init(&ov8856->sd, client, &ov8856_subdev_ops); 2474 2475 ret = __ov8856_power_on(ov8856); 2476 if (ret) { 2477 dev_err(&client->dev, "failed to power on\n"); 2478 return ret; 2479 } 2480 2481 ret = ov8856_identify_module(ov8856); 2482 if (ret) { 2483 dev_err(&client->dev, "failed to find sensor: %d", ret); 2484 goto probe_power_off; 2485 } 2486 2487 mutex_init(&ov8856->mutex); 2488 ov8856->cur_mode = &ov8856->priv_lane->supported_modes[0]; 2489 ov8856->cur_mbus_index = ov8856->cur_mode->default_mbus_index; 2490 ret = ov8856_init_controls(ov8856); 2491 if (ret) { 2492 dev_err(&client->dev, "failed to init controls: %d", ret); 2493 goto probe_error_v4l2_ctrl_handler_free; 2494 } 2495 2496 ov8856->sd.internal_ops = &ov8856_internal_ops; 2497 ov8856->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 2498 ov8856->sd.entity.ops = &ov8856_subdev_entity_ops; 2499 ov8856->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 2500 ov8856->pad.flags = MEDIA_PAD_FL_SOURCE; 2501 ret = media_entity_pads_init(&ov8856->sd.entity, 1, &ov8856->pad); 2502 if (ret) { 2503 dev_err(&client->dev, "failed to init entity pads: %d", ret); 2504 goto probe_error_v4l2_ctrl_handler_free; 2505 } 2506 2507 ret = v4l2_async_register_subdev_sensor(&ov8856->sd); 2508 if (ret < 0) { 2509 dev_err(&client->dev, "failed to register V4L2 subdev: %d", 2510 ret); 2511 goto probe_error_media_entity_cleanup; 2512 } 2513 2514 /* 2515 * Device is already turned on by i2c-core with ACPI domain PM. 2516 * Enable runtime PM and turn off the device. 2517 */ 2518 pm_runtime_set_active(&client->dev); 2519 pm_runtime_enable(&client->dev); 2520 pm_runtime_idle(&client->dev); 2521 2522 return 0; 2523 2524 probe_error_media_entity_cleanup: 2525 media_entity_cleanup(&ov8856->sd.entity); 2526 2527 probe_error_v4l2_ctrl_handler_free: 2528 v4l2_ctrl_handler_free(ov8856->sd.ctrl_handler); 2529 mutex_destroy(&ov8856->mutex); 2530 2531 probe_power_off: 2532 __ov8856_power_off(ov8856); 2533 2534 return ret; 2535 } 2536 2537 static const struct dev_pm_ops ov8856_pm_ops = { 2538 SET_SYSTEM_SLEEP_PM_OPS(ov8856_suspend, ov8856_resume) 2539 }; 2540 2541 #ifdef CONFIG_ACPI 2542 static const struct acpi_device_id ov8856_acpi_ids[] = { 2543 {"OVTI8856"}, 2544 {} 2545 }; 2546 2547 MODULE_DEVICE_TABLE(acpi, ov8856_acpi_ids); 2548 #endif 2549 2550 static const struct of_device_id ov8856_of_match[] = { 2551 { .compatible = "ovti,ov8856" }, 2552 { /* sentinel */ } 2553 }; 2554 MODULE_DEVICE_TABLE(of, ov8856_of_match); 2555 2556 static struct i2c_driver ov8856_i2c_driver = { 2557 .driver = { 2558 .name = "ov8856", 2559 .pm = &ov8856_pm_ops, 2560 .acpi_match_table = ACPI_PTR(ov8856_acpi_ids), 2561 .of_match_table = ov8856_of_match, 2562 }, 2563 .probe_new = ov8856_probe, 2564 .remove = ov8856_remove, 2565 }; 2566 2567 module_i2c_driver(ov8856_i2c_driver); 2568 2569 MODULE_AUTHOR("Ben Kao <ben.kao@intel.com>"); 2570 MODULE_DESCRIPTION("OmniVision OV8856 sensor driver"); 2571 MODULE_LICENSE("GPL v2"); 2572