1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2013 Intel Corporation. All Rights Reserved. 4 * 5 * Adapted from the atomisp-ov5693 driver, with contributions from: 6 * 7 * Daniel Scally 8 * Jean-Michel Hautbois 9 * Fabian Wuthrich 10 * Tsuchiya Yuto 11 * Jordan Hand 12 * Jake Day 13 */ 14 15 #include <asm/unaligned.h> 16 #include <linux/acpi.h> 17 #include <linux/clk.h> 18 #include <linux/delay.h> 19 #include <linux/device.h> 20 #include <linux/i2c.h> 21 #include <linux/module.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/regulator/consumer.h> 24 #include <linux/slab.h> 25 #include <linux/types.h> 26 #include <media/v4l2-ctrls.h> 27 #include <media/v4l2-device.h> 28 #include <media/v4l2-fwnode.h> 29 30 #define OV5693_REG_8BIT(n) ((1 << 16) | (n)) 31 #define OV5693_REG_16BIT(n) ((2 << 16) | (n)) 32 #define OV5693_REG_24BIT(n) ((3 << 16) | (n)) 33 #define OV5693_REG_SIZE_SHIFT 16 34 #define OV5693_REG_ADDR_MASK 0xffff 35 36 /* System Control */ 37 #define OV5693_SW_RESET_REG OV5693_REG_8BIT(0x0103) 38 #define OV5693_SW_STREAM_REG OV5693_REG_8BIT(0x0100) 39 #define OV5693_START_STREAMING 0x01 40 #define OV5693_STOP_STREAMING 0x00 41 #define OV5693_SW_RESET 0x01 42 43 #define OV5693_REG_CHIP_ID OV5693_REG_16BIT(0x300a) 44 /* Yes, this is right. The datasheet for the OV5693 gives its ID as 0x5690 */ 45 #define OV5693_CHIP_ID 0x5690 46 47 /* Exposure */ 48 #define OV5693_EXPOSURE_CTRL_REG OV5693_REG_24BIT(0x3500) 49 #define OV5693_EXPOSURE_CTRL_MASK GENMASK(19, 4) 50 #define OV5693_INTEGRATION_TIME_MARGIN 8 51 #define OV5693_EXPOSURE_MIN 1 52 #define OV5693_EXPOSURE_STEP 1 53 54 /* Analogue Gain */ 55 #define OV5693_GAIN_CTRL_REG OV5693_REG_16BIT(0x350a) 56 #define OV5693_GAIN_CTRL_MASK GENMASK(10, 4) 57 #define OV5693_GAIN_MIN 1 58 #define OV5693_GAIN_MAX 127 59 #define OV5693_GAIN_DEF 8 60 #define OV5693_GAIN_STEP 1 61 62 /* Digital Gain */ 63 #define OV5693_MWB_RED_GAIN_REG OV5693_REG_16BIT(0x3400) 64 #define OV5693_MWB_GREEN_GAIN_REG OV5693_REG_16BIT(0x3402) 65 #define OV5693_MWB_BLUE_GAIN_REG OV5693_REG_16BIT(0x3404) 66 #define OV5693_MWB_GAIN_MASK GENMASK(11, 0) 67 #define OV5693_MWB_GAIN_MAX 0x0fff 68 #define OV5693_DIGITAL_GAIN_MIN 1 69 #define OV5693_DIGITAL_GAIN_MAX 4095 70 #define OV5693_DIGITAL_GAIN_DEF 1024 71 #define OV5693_DIGITAL_GAIN_STEP 1 72 73 /* Timing and Format */ 74 #define OV5693_CROP_START_X_REG OV5693_REG_16BIT(0x3800) 75 #define OV5693_CROP_START_Y_REG OV5693_REG_16BIT(0x3802) 76 #define OV5693_CROP_END_X_REG OV5693_REG_16BIT(0x3804) 77 #define OV5693_CROP_END_Y_REG OV5693_REG_16BIT(0x3806) 78 #define OV5693_OUTPUT_SIZE_X_REG OV5693_REG_16BIT(0x3808) 79 #define OV5693_OUTPUT_SIZE_Y_REG OV5693_REG_16BIT(0x380a) 80 81 #define OV5693_TIMING_HTS_REG OV5693_REG_16BIT(0x380c) 82 #define OV5693_FIXED_PPL 2688U 83 #define OV5693_TIMING_VTS_REG OV5693_REG_16BIT(0x380e) 84 #define OV5693_TIMING_MAX_VTS 0xffff 85 #define OV5693_TIMING_MIN_VTS 0x04 86 87 #define OV5693_OFFSET_START_X_REG OV5693_REG_16BIT(0x3810) 88 #define OV5693_OFFSET_START_Y_REG OV5693_REG_16BIT(0x3812) 89 90 #define OV5693_SUB_INC_X_REG OV5693_REG_8BIT(0x3814) 91 #define OV5693_SUB_INC_Y_REG OV5693_REG_8BIT(0x3815) 92 93 #define OV5693_FORMAT1_REG OV5693_REG_8BIT(0x3820) 94 #define OV5693_FORMAT1_FLIP_VERT_ISP_EN BIT(6) 95 #define OV5693_FORMAT1_FLIP_VERT_SENSOR_EN BIT(1) 96 #define OV5693_FORMAT1_VBIN_EN BIT(0) 97 #define OV5693_FORMAT2_REG OV5693_REG_8BIT(0x3821) 98 #define OV5693_FORMAT2_HDR_EN BIT(7) 99 #define OV5693_FORMAT2_FLIP_HORZ_ISP_EN BIT(2) 100 #define OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN BIT(1) 101 #define OV5693_FORMAT2_HBIN_EN BIT(0) 102 103 #define OV5693_ISP_CTRL2_REG OV5693_REG_8BIT(0x5002) 104 #define OV5693_ISP_SCALE_ENABLE BIT(7) 105 106 /* Pixel Array */ 107 #define OV5693_NATIVE_WIDTH 2624 108 #define OV5693_NATIVE_HEIGHT 1956 109 #define OV5693_NATIVE_START_LEFT 0 110 #define OV5693_NATIVE_START_TOP 0 111 #define OV5693_ACTIVE_WIDTH 2592 112 #define OV5693_ACTIVE_HEIGHT 1944 113 #define OV5693_ACTIVE_START_LEFT 16 114 #define OV5693_ACTIVE_START_TOP 6 115 #define OV5693_MIN_CROP_WIDTH 2 116 #define OV5693_MIN_CROP_HEIGHT 2 117 118 /* Test Pattern */ 119 #define OV5693_TEST_PATTERN_REG OV5693_REG_8BIT(0x5e00) 120 #define OV5693_TEST_PATTERN_ENABLE BIT(7) 121 #define OV5693_TEST_PATTERN_ROLLING BIT(6) 122 #define OV5693_TEST_PATTERN_RANDOM 0x01 123 #define OV5693_TEST_PATTERN_BARS 0x00 124 125 /* System Frequencies */ 126 #define OV5693_XVCLK_FREQ 19200000 127 #define OV5693_LINK_FREQ_419_2MHZ 419200000 128 #define OV5693_PIXEL_RATE 167680000 129 130 #define to_ov5693_sensor(x) container_of(x, struct ov5693_device, sd) 131 132 static const char * const ov5693_supply_names[] = { 133 "avdd", /* Analog power */ 134 "dovdd", /* Digital I/O power */ 135 }; 136 137 #define OV5693_NUM_SUPPLIES ARRAY_SIZE(ov5693_supply_names) 138 139 struct ov5693_reg { 140 u32 reg; 141 u8 val; 142 }; 143 144 struct ov5693_reg_list { 145 u32 num_regs; 146 const struct ov5693_reg *regs; 147 }; 148 149 struct ov5693_device { 150 struct i2c_client *client; 151 struct device *dev; 152 153 /* Protect against concurrent changes to controls */ 154 struct mutex lock; 155 156 struct gpio_desc *reset; 157 struct gpio_desc *powerdown; 158 struct regulator_bulk_data supplies[OV5693_NUM_SUPPLIES]; 159 struct clk *clk; 160 161 struct ov5693_mode { 162 struct v4l2_rect crop; 163 struct v4l2_mbus_framefmt format; 164 bool binning_x; 165 bool binning_y; 166 unsigned int inc_x_odd; 167 unsigned int inc_y_odd; 168 unsigned int vts; 169 } mode; 170 bool streaming; 171 172 struct v4l2_subdev sd; 173 struct media_pad pad; 174 175 struct ov5693_v4l2_ctrls { 176 struct v4l2_ctrl_handler handler; 177 struct v4l2_ctrl *link_freq; 178 struct v4l2_ctrl *pixel_rate; 179 struct v4l2_ctrl *exposure; 180 struct v4l2_ctrl *analogue_gain; 181 struct v4l2_ctrl *digital_gain; 182 struct v4l2_ctrl *hflip; 183 struct v4l2_ctrl *vflip; 184 struct v4l2_ctrl *hblank; 185 struct v4l2_ctrl *vblank; 186 struct v4l2_ctrl *test_pattern; 187 } ctrls; 188 }; 189 190 static const struct ov5693_reg ov5693_global_regs[] = { 191 {OV5693_REG_8BIT(0x3016), 0xf0}, 192 {OV5693_REG_8BIT(0x3017), 0xf0}, 193 {OV5693_REG_8BIT(0x3018), 0xf0}, 194 {OV5693_REG_8BIT(0x3022), 0x01}, 195 {OV5693_REG_8BIT(0x3028), 0x44}, 196 {OV5693_REG_8BIT(0x3098), 0x02}, 197 {OV5693_REG_8BIT(0x3099), 0x19}, 198 {OV5693_REG_8BIT(0x309a), 0x02}, 199 {OV5693_REG_8BIT(0x309b), 0x01}, 200 {OV5693_REG_8BIT(0x309c), 0x00}, 201 {OV5693_REG_8BIT(0x30a0), 0xd2}, 202 {OV5693_REG_8BIT(0x30a2), 0x01}, 203 {OV5693_REG_8BIT(0x30b2), 0x00}, 204 {OV5693_REG_8BIT(0x30b3), 0x83}, 205 {OV5693_REG_8BIT(0x30b4), 0x03}, 206 {OV5693_REG_8BIT(0x30b5), 0x04}, 207 {OV5693_REG_8BIT(0x30b6), 0x01}, 208 {OV5693_REG_8BIT(0x3080), 0x01}, 209 {OV5693_REG_8BIT(0x3104), 0x21}, 210 {OV5693_REG_8BIT(0x3106), 0x00}, 211 {OV5693_REG_8BIT(0x3406), 0x01}, 212 {OV5693_REG_8BIT(0x3503), 0x07}, 213 {OV5693_REG_8BIT(0x350b), 0x40}, 214 {OV5693_REG_8BIT(0x3601), 0x0a}, 215 {OV5693_REG_8BIT(0x3602), 0x38}, 216 {OV5693_REG_8BIT(0x3612), 0x80}, 217 {OV5693_REG_8BIT(0x3620), 0x54}, 218 {OV5693_REG_8BIT(0x3621), 0xc7}, 219 {OV5693_REG_8BIT(0x3622), 0x0f}, 220 {OV5693_REG_8BIT(0x3625), 0x10}, 221 {OV5693_REG_8BIT(0x3630), 0x55}, 222 {OV5693_REG_8BIT(0x3631), 0xf4}, 223 {OV5693_REG_8BIT(0x3632), 0x00}, 224 {OV5693_REG_8BIT(0x3633), 0x34}, 225 {OV5693_REG_8BIT(0x3634), 0x02}, 226 {OV5693_REG_8BIT(0x364d), 0x0d}, 227 {OV5693_REG_8BIT(0x364f), 0xdd}, 228 {OV5693_REG_8BIT(0x3660), 0x04}, 229 {OV5693_REG_8BIT(0x3662), 0x10}, 230 {OV5693_REG_8BIT(0x3663), 0xf1}, 231 {OV5693_REG_8BIT(0x3665), 0x00}, 232 {OV5693_REG_8BIT(0x3666), 0x20}, 233 {OV5693_REG_8BIT(0x3667), 0x00}, 234 {OV5693_REG_8BIT(0x366a), 0x80}, 235 {OV5693_REG_8BIT(0x3680), 0xe0}, 236 {OV5693_REG_8BIT(0x3681), 0x00}, 237 {OV5693_REG_8BIT(0x3700), 0x42}, 238 {OV5693_REG_8BIT(0x3701), 0x14}, 239 {OV5693_REG_8BIT(0x3702), 0xa0}, 240 {OV5693_REG_8BIT(0x3703), 0xd8}, 241 {OV5693_REG_8BIT(0x3704), 0x78}, 242 {OV5693_REG_8BIT(0x3705), 0x02}, 243 {OV5693_REG_8BIT(0x370a), 0x00}, 244 {OV5693_REG_8BIT(0x370b), 0x20}, 245 {OV5693_REG_8BIT(0x370c), 0x0c}, 246 {OV5693_REG_8BIT(0x370d), 0x11}, 247 {OV5693_REG_8BIT(0x370e), 0x00}, 248 {OV5693_REG_8BIT(0x370f), 0x40}, 249 {OV5693_REG_8BIT(0x3710), 0x00}, 250 {OV5693_REG_8BIT(0x371a), 0x1c}, 251 {OV5693_REG_8BIT(0x371b), 0x05}, 252 {OV5693_REG_8BIT(0x371c), 0x01}, 253 {OV5693_REG_8BIT(0x371e), 0xa1}, 254 {OV5693_REG_8BIT(0x371f), 0x0c}, 255 {OV5693_REG_8BIT(0x3721), 0x00}, 256 {OV5693_REG_8BIT(0x3724), 0x10}, 257 {OV5693_REG_8BIT(0x3726), 0x00}, 258 {OV5693_REG_8BIT(0x372a), 0x01}, 259 {OV5693_REG_8BIT(0x3730), 0x10}, 260 {OV5693_REG_8BIT(0x3738), 0x22}, 261 {OV5693_REG_8BIT(0x3739), 0xe5}, 262 {OV5693_REG_8BIT(0x373a), 0x50}, 263 {OV5693_REG_8BIT(0x373b), 0x02}, 264 {OV5693_REG_8BIT(0x373c), 0x41}, 265 {OV5693_REG_8BIT(0x373f), 0x02}, 266 {OV5693_REG_8BIT(0x3740), 0x42}, 267 {OV5693_REG_8BIT(0x3741), 0x02}, 268 {OV5693_REG_8BIT(0x3742), 0x18}, 269 {OV5693_REG_8BIT(0x3743), 0x01}, 270 {OV5693_REG_8BIT(0x3744), 0x02}, 271 {OV5693_REG_8BIT(0x3747), 0x10}, 272 {OV5693_REG_8BIT(0x374c), 0x04}, 273 {OV5693_REG_8BIT(0x3751), 0xf0}, 274 {OV5693_REG_8BIT(0x3752), 0x00}, 275 {OV5693_REG_8BIT(0x3753), 0x00}, 276 {OV5693_REG_8BIT(0x3754), 0xc0}, 277 {OV5693_REG_8BIT(0x3755), 0x00}, 278 {OV5693_REG_8BIT(0x3756), 0x1a}, 279 {OV5693_REG_8BIT(0x3758), 0x00}, 280 {OV5693_REG_8BIT(0x3759), 0x0f}, 281 {OV5693_REG_8BIT(0x376b), 0x44}, 282 {OV5693_REG_8BIT(0x375c), 0x04}, 283 {OV5693_REG_8BIT(0x3774), 0x10}, 284 {OV5693_REG_8BIT(0x3776), 0x00}, 285 {OV5693_REG_8BIT(0x377f), 0x08}, 286 {OV5693_REG_8BIT(0x3780), 0x22}, 287 {OV5693_REG_8BIT(0x3781), 0x0c}, 288 {OV5693_REG_8BIT(0x3784), 0x2c}, 289 {OV5693_REG_8BIT(0x3785), 0x1e}, 290 {OV5693_REG_8BIT(0x378f), 0xf5}, 291 {OV5693_REG_8BIT(0x3791), 0xb0}, 292 {OV5693_REG_8BIT(0x3795), 0x00}, 293 {OV5693_REG_8BIT(0x3796), 0x64}, 294 {OV5693_REG_8BIT(0x3797), 0x11}, 295 {OV5693_REG_8BIT(0x3798), 0x30}, 296 {OV5693_REG_8BIT(0x3799), 0x41}, 297 {OV5693_REG_8BIT(0x379a), 0x07}, 298 {OV5693_REG_8BIT(0x379b), 0xb0}, 299 {OV5693_REG_8BIT(0x379c), 0x0c}, 300 {OV5693_REG_8BIT(0x3a04), 0x06}, 301 {OV5693_REG_8BIT(0x3a05), 0x14}, 302 {OV5693_REG_8BIT(0x3e07), 0x20}, 303 {OV5693_REG_8BIT(0x4000), 0x08}, 304 {OV5693_REG_8BIT(0x4001), 0x04}, 305 {OV5693_REG_8BIT(0x4004), 0x08}, 306 {OV5693_REG_8BIT(0x4006), 0x20}, 307 {OV5693_REG_8BIT(0x4008), 0x24}, 308 {OV5693_REG_8BIT(0x4009), 0x10}, 309 {OV5693_REG_8BIT(0x4058), 0x00}, 310 {OV5693_REG_8BIT(0x4101), 0xb2}, 311 {OV5693_REG_8BIT(0x4307), 0x31}, 312 {OV5693_REG_8BIT(0x4511), 0x05}, 313 {OV5693_REG_8BIT(0x4512), 0x01}, 314 {OV5693_REG_8BIT(0x481f), 0x30}, 315 {OV5693_REG_8BIT(0x4826), 0x2c}, 316 {OV5693_REG_8BIT(0x4d02), 0xfd}, 317 {OV5693_REG_8BIT(0x4d03), 0xf5}, 318 {OV5693_REG_8BIT(0x4d04), 0x0c}, 319 {OV5693_REG_8BIT(0x4d05), 0xcc}, 320 {OV5693_REG_8BIT(0x4837), 0x0a}, 321 {OV5693_REG_8BIT(0x5003), 0x20}, 322 {OV5693_REG_8BIT(0x5013), 0x00}, 323 {OV5693_REG_8BIT(0x5842), 0x01}, 324 {OV5693_REG_8BIT(0x5843), 0x2b}, 325 {OV5693_REG_8BIT(0x5844), 0x01}, 326 {OV5693_REG_8BIT(0x5845), 0x92}, 327 {OV5693_REG_8BIT(0x5846), 0x01}, 328 {OV5693_REG_8BIT(0x5847), 0x8f}, 329 {OV5693_REG_8BIT(0x5848), 0x01}, 330 {OV5693_REG_8BIT(0x5849), 0x0c}, 331 {OV5693_REG_8BIT(0x5e10), 0x0c}, 332 {OV5693_REG_8BIT(0x3820), 0x00}, 333 {OV5693_REG_8BIT(0x3821), 0x1e}, 334 {OV5693_REG_8BIT(0x5041), 0x14} 335 }; 336 337 static const struct ov5693_reg_list ov5693_global_setting = { 338 .num_regs = ARRAY_SIZE(ov5693_global_regs), 339 .regs = ov5693_global_regs, 340 }; 341 342 static const struct v4l2_rect ov5693_default_crop = { 343 .left = OV5693_ACTIVE_START_LEFT, 344 .top = OV5693_ACTIVE_START_TOP, 345 .width = OV5693_ACTIVE_WIDTH, 346 .height = OV5693_ACTIVE_HEIGHT, 347 }; 348 349 static const struct v4l2_mbus_framefmt ov5693_default_fmt = { 350 .width = OV5693_ACTIVE_WIDTH, 351 .height = OV5693_ACTIVE_HEIGHT, 352 .code = MEDIA_BUS_FMT_SBGGR10_1X10, 353 }; 354 355 static const s64 link_freq_menu_items[] = { 356 OV5693_LINK_FREQ_419_2MHZ 357 }; 358 359 static const char * const ov5693_test_pattern_menu[] = { 360 "Disabled", 361 "Random Data", 362 "Colour Bars", 363 "Colour Bars with Rolling Bar" 364 }; 365 366 static const u8 ov5693_test_pattern_bits[] = { 367 0, 368 OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_RANDOM, 369 OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS, 370 OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS | 371 OV5693_TEST_PATTERN_ROLLING, 372 }; 373 374 /* I2C I/O Operations */ 375 376 static int ov5693_read_reg(struct ov5693_device *ov5693, u32 addr, u32 *value) 377 { 378 struct i2c_client *client = ov5693->client; 379 __be16 reg; 380 u8 val[4]; 381 struct i2c_msg msg[] = { 382 { 383 .addr = client->addr, 384 .flags = 0, 385 .len = 2, 386 .buf = (u8 *)®, 387 }, 388 { 389 .addr = client->addr, 390 .flags = I2C_M_RD, 391 .buf = (u8 *)&val, 392 }, 393 }; 394 unsigned int len = ((addr >> OV5693_REG_SIZE_SHIFT) & 3); 395 unsigned int i; 396 int ret; 397 398 reg = cpu_to_be16(addr & OV5693_REG_ADDR_MASK); 399 400 msg[1].len = len; 401 402 ret = i2c_transfer(client->adapter, msg, 2); 403 if (ret < 0) 404 return dev_err_probe(&client->dev, ret, 405 "Failed to read register 0x%04x: %d\n", 406 addr & OV5693_REG_ADDR_MASK, ret); 407 408 *value = 0; 409 for (i = 0; i < len; ++i) { 410 *value <<= 8; 411 *value |= val[i]; 412 } 413 414 return 0; 415 } 416 417 static void ov5693_write_reg(struct ov5693_device *ov5693, u32 addr, u32 value, 418 int *error) 419 { 420 struct i2c_client *client = ov5693->client; 421 struct { 422 __be16 reg; 423 u8 val[4]; 424 } __packed buf; 425 struct i2c_msg msg = { 426 .addr = client->addr, 427 .buf = (u8 *)&buf, 428 }; 429 unsigned int len = ((addr >> OV5693_REG_SIZE_SHIFT) & 3); 430 unsigned int i; 431 int ret; 432 433 if (*error < 0) 434 return; 435 436 buf.reg = cpu_to_be16(addr & OV5693_REG_ADDR_MASK); 437 for (i = 0; i < len; ++i) { 438 buf.val[len - i - 1] = value & 0xff; 439 value >>= 8; 440 } 441 442 msg.len = len + 2; 443 444 ret = i2c_transfer(client->adapter, &msg, 1); 445 if (ret < 0) { 446 dev_err(&client->dev, "Failed to write register 0x%04x: %d\n", 447 addr & OV5693_REG_ADDR_MASK, ret); 448 *error = ret; 449 } 450 } 451 452 static int ov5693_write_reg_array(struct ov5693_device *ov5693, 453 const struct ov5693_reg_list *reglist) 454 { 455 unsigned int i; 456 int ret = 0; 457 458 for (i = 0; i < reglist->num_regs; i++) 459 ov5693_write_reg(ov5693, reglist->regs[i].reg, 460 reglist->regs[i].val, &ret); 461 462 return ret; 463 } 464 465 static int ov5693_update_bits(struct ov5693_device *ov5693, u32 address, 466 u32 mask, u32 bits) 467 { 468 u32 value = 0; 469 int ret; 470 471 ret = ov5693_read_reg(ov5693, address, &value); 472 if (ret) 473 return ret; 474 475 value &= ~mask; 476 value |= bits; 477 478 ov5693_write_reg(ov5693, address, value, &ret); 479 480 return ret; 481 } 482 483 /* V4L2 Controls Functions */ 484 485 static int ov5693_flip_vert_configure(struct ov5693_device *ov5693, 486 bool enable) 487 { 488 u8 bits = OV5693_FORMAT1_FLIP_VERT_ISP_EN | 489 OV5693_FORMAT1_FLIP_VERT_SENSOR_EN; 490 int ret; 491 492 ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG, bits, 493 enable ? bits : 0); 494 if (ret) 495 return ret; 496 497 return 0; 498 } 499 500 static int ov5693_flip_horz_configure(struct ov5693_device *ov5693, 501 bool enable) 502 { 503 u8 bits = OV5693_FORMAT2_FLIP_HORZ_ISP_EN | 504 OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN; 505 int ret; 506 507 ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG, bits, 508 enable ? bits : 0); 509 if (ret) 510 return ret; 511 512 return 0; 513 } 514 515 static int ov5693_get_exposure(struct ov5693_device *ov5693, s32 *value) 516 { 517 u32 exposure; 518 int ret; 519 520 ret = ov5693_read_reg(ov5693, OV5693_EXPOSURE_CTRL_REG, &exposure); 521 if (ret) 522 return ret; 523 524 /* The lowest 4 bits are unsupported fractional bits */ 525 *value = exposure >> 4; 526 527 return 0; 528 } 529 530 static int ov5693_exposure_configure(struct ov5693_device *ov5693, 531 u32 exposure) 532 { 533 int ret = 0; 534 535 exposure = (exposure << 4) & OV5693_EXPOSURE_CTRL_MASK; 536 537 ov5693_write_reg(ov5693, OV5693_EXPOSURE_CTRL_REG, exposure, &ret); 538 539 return ret; 540 } 541 542 static int ov5693_get_gain(struct ov5693_device *ov5693, u32 *gain) 543 { 544 u32 value; 545 int ret; 546 547 ret = ov5693_read_reg(ov5693, OV5693_GAIN_CTRL_REG, &value); 548 if (ret) 549 return ret; 550 551 /* As with exposure, the lowest 4 bits are fractional bits. */ 552 *gain = value >> 4; 553 554 return ret; 555 } 556 557 static int ov5693_digital_gain_configure(struct ov5693_device *ov5693, 558 u32 gain) 559 { 560 int ret = 0; 561 562 gain &= OV5693_MWB_GAIN_MASK; 563 564 ov5693_write_reg(ov5693, OV5693_MWB_RED_GAIN_REG, gain, &ret); 565 ov5693_write_reg(ov5693, OV5693_MWB_GREEN_GAIN_REG, gain, &ret); 566 ov5693_write_reg(ov5693, OV5693_MWB_BLUE_GAIN_REG, gain, &ret); 567 568 return ret; 569 } 570 571 static int ov5693_analog_gain_configure(struct ov5693_device *ov5693, u32 gain) 572 { 573 int ret = 0; 574 575 gain = (gain << 4) & OV5693_GAIN_CTRL_MASK; 576 577 ov5693_write_reg(ov5693, OV5693_GAIN_CTRL_REG, gain, &ret); 578 579 return ret; 580 } 581 582 static int ov5693_vts_configure(struct ov5693_device *ov5693, u32 vblank) 583 { 584 u16 vts = ov5693->mode.format.height + vblank; 585 int ret = 0; 586 587 ov5693_write_reg(ov5693, OV5693_TIMING_VTS_REG, vts, &ret); 588 589 return ret; 590 } 591 592 static int ov5693_test_pattern_configure(struct ov5693_device *ov5693, u32 idx) 593 { 594 int ret = 0; 595 596 ov5693_write_reg(ov5693, OV5693_TEST_PATTERN_REG, 597 ov5693_test_pattern_bits[idx], &ret); 598 599 return ret; 600 } 601 602 static int ov5693_s_ctrl(struct v4l2_ctrl *ctrl) 603 { 604 struct ov5693_device *ov5693 = 605 container_of(ctrl->handler, struct ov5693_device, ctrls.handler); 606 int ret = 0; 607 608 /* If VBLANK is altered we need to update exposure to compensate */ 609 if (ctrl->id == V4L2_CID_VBLANK) { 610 int exposure_max; 611 612 exposure_max = ov5693->mode.format.height + ctrl->val - 613 OV5693_INTEGRATION_TIME_MARGIN; 614 __v4l2_ctrl_modify_range(ov5693->ctrls.exposure, 615 ov5693->ctrls.exposure->minimum, 616 exposure_max, 617 ov5693->ctrls.exposure->step, 618 min(ov5693->ctrls.exposure->val, 619 exposure_max)); 620 } 621 622 /* Only apply changes to the controls if the device is powered up */ 623 if (!pm_runtime_get_if_in_use(ov5693->dev)) 624 return 0; 625 626 switch (ctrl->id) { 627 case V4L2_CID_EXPOSURE: 628 ret = ov5693_exposure_configure(ov5693, ctrl->val); 629 break; 630 case V4L2_CID_ANALOGUE_GAIN: 631 ret = ov5693_analog_gain_configure(ov5693, ctrl->val); 632 break; 633 case V4L2_CID_DIGITAL_GAIN: 634 ret = ov5693_digital_gain_configure(ov5693, ctrl->val); 635 break; 636 case V4L2_CID_HFLIP: 637 ret = ov5693_flip_horz_configure(ov5693, !!ctrl->val); 638 break; 639 case V4L2_CID_VFLIP: 640 ret = ov5693_flip_vert_configure(ov5693, !!ctrl->val); 641 break; 642 case V4L2_CID_VBLANK: 643 ret = ov5693_vts_configure(ov5693, ctrl->val); 644 break; 645 case V4L2_CID_TEST_PATTERN: 646 ret = ov5693_test_pattern_configure(ov5693, ctrl->val); 647 break; 648 default: 649 ret = -EINVAL; 650 } 651 652 pm_runtime_put(ov5693->dev); 653 654 return ret; 655 } 656 657 static int ov5693_g_volatile_ctrl(struct v4l2_ctrl *ctrl) 658 { 659 struct ov5693_device *ov5693 = container_of(ctrl->handler, 660 struct ov5693_device, 661 ctrls.handler); 662 663 switch (ctrl->id) { 664 case V4L2_CID_EXPOSURE_ABSOLUTE: 665 return ov5693_get_exposure(ov5693, &ctrl->val); 666 case V4L2_CID_AUTOGAIN: 667 return ov5693_get_gain(ov5693, &ctrl->val); 668 default: 669 return -EINVAL; 670 } 671 } 672 673 static const struct v4l2_ctrl_ops ov5693_ctrl_ops = { 674 .s_ctrl = ov5693_s_ctrl, 675 .g_volatile_ctrl = ov5693_g_volatile_ctrl 676 }; 677 678 /* System Control Functions */ 679 680 static int ov5693_mode_configure(struct ov5693_device *ov5693) 681 { 682 const struct ov5693_mode *mode = &ov5693->mode; 683 int ret = 0; 684 685 /* Crop Start X */ 686 ov5693_write_reg(ov5693, OV5693_CROP_START_X_REG, mode->crop.left, 687 &ret); 688 689 /* Offset X */ 690 ov5693_write_reg(ov5693, OV5693_OFFSET_START_X_REG, 0, &ret); 691 692 /* Output Size X */ 693 ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_X_REG, mode->format.width, 694 &ret); 695 696 /* Crop End X */ 697 ov5693_write_reg(ov5693, OV5693_CROP_END_X_REG, 698 mode->crop.left + mode->crop.width, &ret); 699 700 /* Horizontal Total Size */ 701 ov5693_write_reg(ov5693, OV5693_TIMING_HTS_REG, OV5693_FIXED_PPL, 702 &ret); 703 704 /* Crop Start Y */ 705 ov5693_write_reg(ov5693, OV5693_CROP_START_Y_REG, mode->crop.top, 706 &ret); 707 708 /* Offset Y */ 709 ov5693_write_reg(ov5693, OV5693_OFFSET_START_Y_REG, 0, &ret); 710 711 /* Output Size Y */ 712 ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_Y_REG, mode->format.height, 713 &ret); 714 715 /* Crop End Y */ 716 ov5693_write_reg(ov5693, OV5693_CROP_END_Y_REG, 717 mode->crop.top + mode->crop.height, &ret); 718 719 /* Subsample X increase */ 720 ov5693_write_reg(ov5693, OV5693_SUB_INC_X_REG, 721 ((mode->inc_x_odd << 4) & 0xf0) | 0x01, &ret); 722 /* Subsample Y increase */ 723 ov5693_write_reg(ov5693, OV5693_SUB_INC_Y_REG, 724 ((mode->inc_y_odd << 4) & 0xf0) | 0x01, &ret); 725 726 if (ret) 727 return ret; 728 729 /* Binning */ 730 ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG, 731 OV5693_FORMAT1_VBIN_EN, 732 mode->binning_y ? OV5693_FORMAT1_VBIN_EN : 0); 733 if (ret) 734 return ret; 735 736 ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG, 737 OV5693_FORMAT2_HBIN_EN, 738 mode->binning_x ? OV5693_FORMAT2_HBIN_EN : 0); 739 740 return ret; 741 } 742 743 static int ov5693_enable_streaming(struct ov5693_device *ov5693, bool enable) 744 { 745 int ret = 0; 746 747 ov5693_write_reg(ov5693, OV5693_SW_STREAM_REG, 748 enable ? OV5693_START_STREAMING : 749 OV5693_STOP_STREAMING, &ret); 750 751 return ret; 752 } 753 754 static int ov5693_sw_reset(struct ov5693_device *ov5693) 755 { 756 int ret = 0; 757 758 ov5693_write_reg(ov5693, OV5693_SW_RESET_REG, OV5693_SW_RESET, &ret); 759 760 return ret; 761 } 762 763 static int ov5693_sensor_init(struct ov5693_device *ov5693) 764 { 765 int ret; 766 767 ret = ov5693_sw_reset(ov5693); 768 if (ret) 769 return dev_err_probe(ov5693->dev, ret, 770 "software reset error\n"); 771 772 ret = ov5693_write_reg_array(ov5693, &ov5693_global_setting); 773 if (ret) 774 return dev_err_probe(ov5693->dev, ret, 775 "global settings error\n"); 776 777 ret = ov5693_mode_configure(ov5693); 778 if (ret) 779 return dev_err_probe(ov5693->dev, ret, 780 "mode configure error\n"); 781 782 ret = ov5693_enable_streaming(ov5693, false); 783 if (ret) 784 dev_err(ov5693->dev, "stop streaming error\n"); 785 786 return ret; 787 } 788 789 static void ov5693_sensor_powerdown(struct ov5693_device *ov5693) 790 { 791 gpiod_set_value_cansleep(ov5693->reset, 1); 792 gpiod_set_value_cansleep(ov5693->powerdown, 1); 793 794 regulator_bulk_disable(OV5693_NUM_SUPPLIES, ov5693->supplies); 795 796 clk_disable_unprepare(ov5693->clk); 797 } 798 799 static int ov5693_sensor_powerup(struct ov5693_device *ov5693) 800 { 801 int ret; 802 803 gpiod_set_value_cansleep(ov5693->reset, 1); 804 gpiod_set_value_cansleep(ov5693->powerdown, 1); 805 806 ret = clk_prepare_enable(ov5693->clk); 807 if (ret) { 808 dev_err(ov5693->dev, "Failed to enable clk\n"); 809 goto fail_power; 810 } 811 812 ret = regulator_bulk_enable(OV5693_NUM_SUPPLIES, ov5693->supplies); 813 if (ret) { 814 dev_err(ov5693->dev, "Failed to enable regulators\n"); 815 goto fail_power; 816 } 817 818 gpiod_set_value_cansleep(ov5693->powerdown, 0); 819 gpiod_set_value_cansleep(ov5693->reset, 0); 820 821 usleep_range(5000, 7500); 822 823 return 0; 824 825 fail_power: 826 ov5693_sensor_powerdown(ov5693); 827 return ret; 828 } 829 830 static int __maybe_unused ov5693_sensor_suspend(struct device *dev) 831 { 832 struct v4l2_subdev *sd = dev_get_drvdata(dev); 833 struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 834 835 ov5693_sensor_powerdown(ov5693); 836 837 return 0; 838 } 839 840 static int __maybe_unused ov5693_sensor_resume(struct device *dev) 841 { 842 struct v4l2_subdev *sd = dev_get_drvdata(dev); 843 struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 844 int ret; 845 846 mutex_lock(&ov5693->lock); 847 848 ret = ov5693_sensor_powerup(ov5693); 849 if (ret) 850 goto out_unlock; 851 852 ret = ov5693_sensor_init(ov5693); 853 if (ret) { 854 dev_err(dev, "ov5693 sensor init failure\n"); 855 goto err_power; 856 } 857 858 goto out_unlock; 859 860 err_power: 861 ov5693_sensor_powerdown(ov5693); 862 out_unlock: 863 mutex_unlock(&ov5693->lock); 864 return ret; 865 } 866 867 static int ov5693_detect(struct ov5693_device *ov5693) 868 { 869 int ret; 870 u32 id; 871 872 ret = ov5693_read_reg(ov5693, OV5693_REG_CHIP_ID, &id); 873 if (ret) 874 return ret; 875 876 if (id != OV5693_CHIP_ID) 877 return dev_err_probe(ov5693->dev, -ENODEV, 878 "sensor ID mismatch. Found 0x%04x\n", id); 879 880 return 0; 881 } 882 883 /* V4L2 Framework callbacks */ 884 885 static unsigned int __ov5693_calc_vts(u32 height) 886 { 887 /* 888 * We need to set a sensible default VTS for whatever format height we 889 * happen to be given from set_fmt(). This function just targets 890 * an even multiple of 30fps. 891 */ 892 893 unsigned int tgt_fps; 894 895 tgt_fps = rounddown(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / height, 30); 896 897 return ALIGN_DOWN(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / tgt_fps, 2); 898 } 899 900 static struct v4l2_mbus_framefmt * 901 __ov5693_get_pad_format(struct ov5693_device *ov5693, 902 struct v4l2_subdev_state *state, 903 unsigned int pad, enum v4l2_subdev_format_whence which) 904 { 905 switch (which) { 906 case V4L2_SUBDEV_FORMAT_TRY: 907 return v4l2_subdev_get_try_format(&ov5693->sd, state, pad); 908 case V4L2_SUBDEV_FORMAT_ACTIVE: 909 return &ov5693->mode.format; 910 default: 911 return NULL; 912 } 913 } 914 915 static struct v4l2_rect * 916 __ov5693_get_pad_crop(struct ov5693_device *ov5693, 917 struct v4l2_subdev_state *state, 918 unsigned int pad, enum v4l2_subdev_format_whence which) 919 { 920 switch (which) { 921 case V4L2_SUBDEV_FORMAT_TRY: 922 return v4l2_subdev_get_try_crop(&ov5693->sd, state, pad); 923 case V4L2_SUBDEV_FORMAT_ACTIVE: 924 return &ov5693->mode.crop; 925 } 926 927 return NULL; 928 } 929 930 static int ov5693_get_fmt(struct v4l2_subdev *sd, 931 struct v4l2_subdev_state *state, 932 struct v4l2_subdev_format *format) 933 { 934 struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 935 936 format->format = ov5693->mode.format; 937 938 return 0; 939 } 940 941 static int ov5693_set_fmt(struct v4l2_subdev *sd, 942 struct v4l2_subdev_state *state, 943 struct v4l2_subdev_format *format) 944 { 945 struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 946 const struct v4l2_rect *crop; 947 struct v4l2_mbus_framefmt *fmt; 948 unsigned int hratio, vratio; 949 unsigned int width, height; 950 unsigned int hblank; 951 int exposure_max; 952 953 crop = __ov5693_get_pad_crop(ov5693, state, format->pad, format->which); 954 955 /* 956 * Align to two to simplify the binning calculations below, and clamp 957 * the requested format at the crop rectangle 958 */ 959 width = clamp_t(unsigned int, ALIGN(format->format.width, 2), 960 OV5693_MIN_CROP_WIDTH, crop->width); 961 height = clamp_t(unsigned int, ALIGN(format->format.height, 2), 962 OV5693_MIN_CROP_HEIGHT, crop->height); 963 964 /* 965 * We can only support setting either the dimensions of the crop rect 966 * or those dimensions binned (separately) by a factor of two. 967 */ 968 hratio = clamp_t(unsigned int, 969 DIV_ROUND_CLOSEST(crop->width, width), 1, 2); 970 vratio = clamp_t(unsigned int, 971 DIV_ROUND_CLOSEST(crop->height, height), 1, 2); 972 973 fmt = __ov5693_get_pad_format(ov5693, state, format->pad, 974 format->which); 975 976 fmt->width = crop->width / hratio; 977 fmt->height = crop->height / vratio; 978 fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; 979 980 format->format = *fmt; 981 982 if (format->which == V4L2_SUBDEV_FORMAT_TRY) 983 return 0; 984 985 mutex_lock(&ov5693->lock); 986 987 ov5693->mode.binning_x = hratio > 1; 988 ov5693->mode.inc_x_odd = hratio > 1 ? 3 : 1; 989 ov5693->mode.binning_y = vratio > 1; 990 ov5693->mode.inc_y_odd = vratio > 1 ? 3 : 1; 991 992 ov5693->mode.vts = __ov5693_calc_vts(fmt->height); 993 994 __v4l2_ctrl_modify_range(ov5693->ctrls.vblank, 995 OV5693_TIMING_MIN_VTS, 996 OV5693_TIMING_MAX_VTS - fmt->height, 997 1, ov5693->mode.vts - fmt->height); 998 __v4l2_ctrl_s_ctrl(ov5693->ctrls.vblank, 999 ov5693->mode.vts - fmt->height); 1000 1001 hblank = OV5693_FIXED_PPL - fmt->width; 1002 __v4l2_ctrl_modify_range(ov5693->ctrls.hblank, hblank, hblank, 1, 1003 hblank); 1004 1005 exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN; 1006 __v4l2_ctrl_modify_range(ov5693->ctrls.exposure, 1007 ov5693->ctrls.exposure->minimum, exposure_max, 1008 ov5693->ctrls.exposure->step, 1009 min(ov5693->ctrls.exposure->val, 1010 exposure_max)); 1011 1012 mutex_unlock(&ov5693->lock); 1013 return 0; 1014 } 1015 1016 static int ov5693_get_selection(struct v4l2_subdev *sd, 1017 struct v4l2_subdev_state *state, 1018 struct v4l2_subdev_selection *sel) 1019 { 1020 struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 1021 1022 switch (sel->target) { 1023 case V4L2_SEL_TGT_CROP: 1024 mutex_lock(&ov5693->lock); 1025 sel->r = *__ov5693_get_pad_crop(ov5693, state, sel->pad, 1026 sel->which); 1027 mutex_unlock(&ov5693->lock); 1028 break; 1029 case V4L2_SEL_TGT_NATIVE_SIZE: 1030 sel->r.top = 0; 1031 sel->r.left = 0; 1032 sel->r.width = OV5693_NATIVE_WIDTH; 1033 sel->r.height = OV5693_NATIVE_HEIGHT; 1034 break; 1035 case V4L2_SEL_TGT_CROP_BOUNDS: 1036 case V4L2_SEL_TGT_CROP_DEFAULT: 1037 sel->r.top = OV5693_ACTIVE_START_TOP; 1038 sel->r.left = OV5693_ACTIVE_START_LEFT; 1039 sel->r.width = OV5693_ACTIVE_WIDTH; 1040 sel->r.height = OV5693_ACTIVE_HEIGHT; 1041 break; 1042 default: 1043 return -EINVAL; 1044 } 1045 1046 return 0; 1047 } 1048 1049 static int ov5693_set_selection(struct v4l2_subdev *sd, 1050 struct v4l2_subdev_state *state, 1051 struct v4l2_subdev_selection *sel) 1052 { 1053 struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 1054 struct v4l2_mbus_framefmt *format; 1055 struct v4l2_rect *__crop; 1056 struct v4l2_rect rect; 1057 1058 if (sel->target != V4L2_SEL_TGT_CROP) 1059 return -EINVAL; 1060 1061 /* 1062 * Clamp the boundaries of the crop rectangle to the size of the sensor 1063 * pixel array. Align to multiples of 2 to ensure Bayer pattern isn't 1064 * disrupted. 1065 */ 1066 rect.left = clamp(ALIGN(sel->r.left, 2), OV5693_NATIVE_START_LEFT, 1067 OV5693_NATIVE_WIDTH); 1068 rect.top = clamp(ALIGN(sel->r.top, 2), OV5693_NATIVE_START_TOP, 1069 OV5693_NATIVE_HEIGHT); 1070 rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 2), 1071 OV5693_MIN_CROP_WIDTH, OV5693_NATIVE_WIDTH); 1072 rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 2), 1073 OV5693_MIN_CROP_HEIGHT, OV5693_NATIVE_HEIGHT); 1074 1075 /* Make sure the crop rectangle isn't outside the bounds of the array */ 1076 rect.width = min_t(unsigned int, rect.width, 1077 OV5693_NATIVE_WIDTH - rect.left); 1078 rect.height = min_t(unsigned int, rect.height, 1079 OV5693_NATIVE_HEIGHT - rect.top); 1080 1081 __crop = __ov5693_get_pad_crop(ov5693, state, sel->pad, sel->which); 1082 1083 if (rect.width != __crop->width || rect.height != __crop->height) { 1084 /* 1085 * Reset the output image size if the crop rectangle size has 1086 * been modified. 1087 */ 1088 format = __ov5693_get_pad_format(ov5693, state, sel->pad, 1089 sel->which); 1090 format->width = rect.width; 1091 format->height = rect.height; 1092 } 1093 1094 *__crop = rect; 1095 sel->r = rect; 1096 1097 return 0; 1098 } 1099 1100 static int ov5693_s_stream(struct v4l2_subdev *sd, int enable) 1101 { 1102 struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 1103 int ret; 1104 1105 if (enable) { 1106 ret = pm_runtime_get_sync(ov5693->dev); 1107 if (ret < 0) 1108 goto err_power_down; 1109 1110 mutex_lock(&ov5693->lock); 1111 ret = __v4l2_ctrl_handler_setup(&ov5693->ctrls.handler); 1112 if (ret) { 1113 mutex_unlock(&ov5693->lock); 1114 goto err_power_down; 1115 } 1116 1117 ret = ov5693_enable_streaming(ov5693, true); 1118 mutex_unlock(&ov5693->lock); 1119 } else { 1120 mutex_lock(&ov5693->lock); 1121 ret = ov5693_enable_streaming(ov5693, false); 1122 mutex_unlock(&ov5693->lock); 1123 } 1124 if (ret) 1125 goto err_power_down; 1126 1127 ov5693->streaming = !!enable; 1128 1129 if (!enable) 1130 pm_runtime_put(ov5693->dev); 1131 1132 return 0; 1133 err_power_down: 1134 pm_runtime_put_noidle(ov5693->dev); 1135 return ret; 1136 } 1137 1138 static int ov5693_g_frame_interval(struct v4l2_subdev *sd, 1139 struct v4l2_subdev_frame_interval *interval) 1140 { 1141 struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 1142 unsigned int framesize = OV5693_FIXED_PPL * (ov5693->mode.format.height + 1143 ov5693->ctrls.vblank->val); 1144 unsigned int fps = DIV_ROUND_CLOSEST(OV5693_PIXEL_RATE, framesize); 1145 1146 interval->interval.numerator = 1; 1147 interval->interval.denominator = fps; 1148 1149 return 0; 1150 } 1151 1152 static int ov5693_enum_mbus_code(struct v4l2_subdev *sd, 1153 struct v4l2_subdev_state *state, 1154 struct v4l2_subdev_mbus_code_enum *code) 1155 { 1156 /* Only a single mbus format is supported */ 1157 if (code->index > 0) 1158 return -EINVAL; 1159 1160 code->code = MEDIA_BUS_FMT_SBGGR10_1X10; 1161 return 0; 1162 } 1163 1164 static int ov5693_enum_frame_size(struct v4l2_subdev *sd, 1165 struct v4l2_subdev_state *state, 1166 struct v4l2_subdev_frame_size_enum *fse) 1167 { 1168 struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 1169 struct v4l2_rect *__crop; 1170 1171 if (fse->index > 1 || fse->code != MEDIA_BUS_FMT_SBGGR10_1X10) 1172 return -EINVAL; 1173 1174 __crop = __ov5693_get_pad_crop(ov5693, state, fse->pad, fse->which); 1175 if (!__crop) 1176 return -EINVAL; 1177 1178 fse->min_width = __crop->width / (fse->index + 1); 1179 fse->min_height = __crop->height / (fse->index + 1); 1180 fse->max_width = fse->min_width; 1181 fse->max_height = fse->min_height; 1182 1183 return 0; 1184 } 1185 1186 static const struct v4l2_subdev_video_ops ov5693_video_ops = { 1187 .s_stream = ov5693_s_stream, 1188 .g_frame_interval = ov5693_g_frame_interval, 1189 }; 1190 1191 static const struct v4l2_subdev_pad_ops ov5693_pad_ops = { 1192 .enum_mbus_code = ov5693_enum_mbus_code, 1193 .enum_frame_size = ov5693_enum_frame_size, 1194 .get_fmt = ov5693_get_fmt, 1195 .set_fmt = ov5693_set_fmt, 1196 .get_selection = ov5693_get_selection, 1197 .set_selection = ov5693_set_selection, 1198 }; 1199 1200 static const struct v4l2_subdev_ops ov5693_ops = { 1201 .video = &ov5693_video_ops, 1202 .pad = &ov5693_pad_ops, 1203 }; 1204 1205 /* Sensor and Driver Configuration Functions */ 1206 1207 static int ov5693_init_controls(struct ov5693_device *ov5693) 1208 { 1209 const struct v4l2_ctrl_ops *ops = &ov5693_ctrl_ops; 1210 struct ov5693_v4l2_ctrls *ctrls = &ov5693->ctrls; 1211 struct v4l2_fwnode_device_properties props; 1212 int vblank_max, vblank_def; 1213 int exposure_max; 1214 int hblank; 1215 int ret; 1216 1217 ret = v4l2_ctrl_handler_init(&ctrls->handler, 12); 1218 if (ret) 1219 return ret; 1220 1221 /* link freq */ 1222 ctrls->link_freq = v4l2_ctrl_new_int_menu(&ctrls->handler, 1223 NULL, V4L2_CID_LINK_FREQ, 1224 0, 0, link_freq_menu_items); 1225 if (ctrls->link_freq) 1226 ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1227 1228 /* pixel rate */ 1229 ctrls->pixel_rate = v4l2_ctrl_new_std(&ctrls->handler, NULL, 1230 V4L2_CID_PIXEL_RATE, 0, 1231 OV5693_PIXEL_RATE, 1, 1232 OV5693_PIXEL_RATE); 1233 1234 /* Exposure */ 1235 exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN; 1236 ctrls->exposure = v4l2_ctrl_new_std(&ctrls->handler, ops, 1237 V4L2_CID_EXPOSURE, 1238 OV5693_EXPOSURE_MIN, exposure_max, 1239 OV5693_EXPOSURE_STEP, exposure_max); 1240 1241 /* Gain */ 1242 ctrls->analogue_gain = v4l2_ctrl_new_std(&ctrls->handler, 1243 ops, V4L2_CID_ANALOGUE_GAIN, 1244 OV5693_GAIN_MIN, 1245 OV5693_GAIN_MAX, 1246 OV5693_GAIN_STEP, 1247 OV5693_GAIN_DEF); 1248 1249 ctrls->digital_gain = v4l2_ctrl_new_std(&ctrls->handler, ops, 1250 V4L2_CID_DIGITAL_GAIN, 1251 OV5693_DIGITAL_GAIN_MIN, 1252 OV5693_DIGITAL_GAIN_MAX, 1253 OV5693_DIGITAL_GAIN_STEP, 1254 OV5693_DIGITAL_GAIN_DEF); 1255 1256 /* Flip */ 1257 ctrls->hflip = v4l2_ctrl_new_std(&ctrls->handler, ops, 1258 V4L2_CID_HFLIP, 0, 1, 1, 0); 1259 1260 ctrls->vflip = v4l2_ctrl_new_std(&ctrls->handler, ops, 1261 V4L2_CID_VFLIP, 0, 1, 1, 0); 1262 1263 hblank = OV5693_FIXED_PPL - ov5693->mode.format.width; 1264 ctrls->hblank = v4l2_ctrl_new_std(&ctrls->handler, ops, 1265 V4L2_CID_HBLANK, hblank, 1266 hblank, 1, hblank); 1267 1268 if (ctrls->hblank) 1269 ctrls->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1270 1271 vblank_max = OV5693_TIMING_MAX_VTS - ov5693->mode.format.height; 1272 vblank_def = ov5693->mode.vts - ov5693->mode.format.height; 1273 ctrls->vblank = v4l2_ctrl_new_std(&ctrls->handler, ops, 1274 V4L2_CID_VBLANK, 1275 OV5693_TIMING_MIN_VTS, 1276 vblank_max, 1, vblank_def); 1277 1278 ctrls->test_pattern = v4l2_ctrl_new_std_menu_items( 1279 &ctrls->handler, ops, 1280 V4L2_CID_TEST_PATTERN, 1281 ARRAY_SIZE(ov5693_test_pattern_menu) - 1, 1282 0, 0, ov5693_test_pattern_menu); 1283 1284 if (ctrls->handler.error) { 1285 dev_err(ov5693->dev, "Error initialising v4l2 ctrls\n"); 1286 ret = ctrls->handler.error; 1287 goto err_free_handler; 1288 } 1289 1290 /* set properties from fwnode (e.g. rotation, orientation) */ 1291 ret = v4l2_fwnode_device_parse(ov5693->dev, &props); 1292 if (ret) 1293 goto err_free_handler; 1294 1295 ret = v4l2_ctrl_new_fwnode_properties(&ctrls->handler, ops, 1296 &props); 1297 if (ret) 1298 goto err_free_handler; 1299 1300 /* Use same lock for controls as for everything else. */ 1301 ctrls->handler.lock = &ov5693->lock; 1302 ov5693->sd.ctrl_handler = &ctrls->handler; 1303 1304 return 0; 1305 1306 err_free_handler: 1307 v4l2_ctrl_handler_free(&ctrls->handler); 1308 return ret; 1309 } 1310 1311 static int ov5693_configure_gpios(struct ov5693_device *ov5693) 1312 { 1313 ov5693->reset = devm_gpiod_get_optional(ov5693->dev, "reset", 1314 GPIOD_OUT_HIGH); 1315 if (IS_ERR(ov5693->reset)) { 1316 dev_err(ov5693->dev, "Error fetching reset GPIO\n"); 1317 return PTR_ERR(ov5693->reset); 1318 } 1319 1320 ov5693->powerdown = devm_gpiod_get_optional(ov5693->dev, "powerdown", 1321 GPIOD_OUT_HIGH); 1322 if (IS_ERR(ov5693->powerdown)) { 1323 dev_err(ov5693->dev, "Error fetching powerdown GPIO\n"); 1324 return PTR_ERR(ov5693->powerdown); 1325 } 1326 1327 return 0; 1328 } 1329 1330 static int ov5693_get_regulators(struct ov5693_device *ov5693) 1331 { 1332 unsigned int i; 1333 1334 for (i = 0; i < OV5693_NUM_SUPPLIES; i++) 1335 ov5693->supplies[i].supply = ov5693_supply_names[i]; 1336 1337 return devm_regulator_bulk_get(ov5693->dev, OV5693_NUM_SUPPLIES, 1338 ov5693->supplies); 1339 } 1340 1341 static int ov5693_check_hwcfg(struct ov5693_device *ov5693) 1342 { 1343 struct fwnode_handle *fwnode = dev_fwnode(ov5693->dev); 1344 struct v4l2_fwnode_endpoint bus_cfg = { 1345 .bus_type = V4L2_MBUS_CSI2_DPHY, 1346 }; 1347 struct fwnode_handle *endpoint; 1348 unsigned int i; 1349 int ret; 1350 1351 endpoint = fwnode_graph_get_next_endpoint(fwnode, NULL); 1352 if (!endpoint) 1353 return -EPROBE_DEFER; /* Could be provided by cio2-bridge */ 1354 1355 ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &bus_cfg); 1356 fwnode_handle_put(endpoint); 1357 if (ret) 1358 return ret; 1359 1360 if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2) { 1361 dev_err(ov5693->dev, "only a 2-lane CSI2 config is supported"); 1362 ret = -EINVAL; 1363 goto out_free_bus_cfg; 1364 } 1365 1366 if (!bus_cfg.nr_of_link_frequencies) { 1367 dev_err(ov5693->dev, "no link frequencies defined\n"); 1368 ret = -EINVAL; 1369 goto out_free_bus_cfg; 1370 } 1371 1372 for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++) 1373 if (bus_cfg.link_frequencies[i] == OV5693_LINK_FREQ_419_2MHZ) 1374 break; 1375 1376 if (i == bus_cfg.nr_of_link_frequencies) { 1377 dev_err(ov5693->dev, "supported link freq %ull not found\n", 1378 OV5693_LINK_FREQ_419_2MHZ); 1379 ret = -EINVAL; 1380 goto out_free_bus_cfg; 1381 } 1382 1383 out_free_bus_cfg: 1384 v4l2_fwnode_endpoint_free(&bus_cfg); 1385 1386 return ret; 1387 } 1388 1389 static int ov5693_probe(struct i2c_client *client) 1390 { 1391 struct ov5693_device *ov5693; 1392 u32 clk_rate; 1393 int ret = 0; 1394 1395 ov5693 = devm_kzalloc(&client->dev, sizeof(*ov5693), GFP_KERNEL); 1396 if (!ov5693) 1397 return -ENOMEM; 1398 1399 ov5693->client = client; 1400 ov5693->dev = &client->dev; 1401 1402 ret = ov5693_check_hwcfg(ov5693); 1403 if (ret) 1404 return ret; 1405 1406 mutex_init(&ov5693->lock); 1407 1408 v4l2_i2c_subdev_init(&ov5693->sd, client, &ov5693_ops); 1409 1410 ov5693->clk = devm_clk_get(&client->dev, "xvclk"); 1411 if (IS_ERR(ov5693->clk)) { 1412 dev_err(&client->dev, "Error getting clock\n"); 1413 return PTR_ERR(ov5693->clk); 1414 } 1415 1416 clk_rate = clk_get_rate(ov5693->clk); 1417 if (clk_rate != OV5693_XVCLK_FREQ) 1418 dev_warn(&client->dev, "Found clk freq %u, expected %u\n", 1419 clk_rate, OV5693_XVCLK_FREQ); 1420 1421 ret = ov5693_configure_gpios(ov5693); 1422 if (ret) 1423 return ret; 1424 1425 ret = ov5693_get_regulators(ov5693); 1426 if (ret) 1427 return dev_err_probe(&client->dev, ret, 1428 "Error fetching regulators\n"); 1429 1430 ov5693->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 1431 ov5693->pad.flags = MEDIA_PAD_FL_SOURCE; 1432 ov5693->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1433 1434 ov5693->mode.crop = ov5693_default_crop; 1435 ov5693->mode.format = ov5693_default_fmt; 1436 ov5693->mode.vts = __ov5693_calc_vts(ov5693->mode.format.height); 1437 1438 ret = ov5693_init_controls(ov5693); 1439 if (ret) 1440 return ret; 1441 1442 ret = media_entity_pads_init(&ov5693->sd.entity, 1, &ov5693->pad); 1443 if (ret) 1444 goto err_ctrl_handler_free; 1445 1446 /* 1447 * We need the driver to work in the event that pm runtime is disable in 1448 * the kernel, so power up and verify the chip now. In the event that 1449 * runtime pm is disabled this will leave the chip on, so that streaming 1450 * will work. 1451 */ 1452 1453 ret = ov5693_sensor_powerup(ov5693); 1454 if (ret) 1455 goto err_media_entity_cleanup; 1456 1457 ret = ov5693_detect(ov5693); 1458 if (ret) 1459 goto err_powerdown; 1460 1461 pm_runtime_set_active(&client->dev); 1462 pm_runtime_get_noresume(&client->dev); 1463 pm_runtime_enable(&client->dev); 1464 1465 ret = v4l2_async_register_subdev_sensor(&ov5693->sd); 1466 if (ret) { 1467 dev_err(&client->dev, "failed to register V4L2 subdev: %d", 1468 ret); 1469 goto err_pm_runtime; 1470 } 1471 1472 pm_runtime_set_autosuspend_delay(&client->dev, 1000); 1473 pm_runtime_use_autosuspend(&client->dev); 1474 pm_runtime_put_autosuspend(&client->dev); 1475 1476 return ret; 1477 1478 err_pm_runtime: 1479 pm_runtime_disable(&client->dev); 1480 pm_runtime_put_noidle(&client->dev); 1481 err_powerdown: 1482 ov5693_sensor_powerdown(ov5693); 1483 err_media_entity_cleanup: 1484 media_entity_cleanup(&ov5693->sd.entity); 1485 err_ctrl_handler_free: 1486 v4l2_ctrl_handler_free(&ov5693->ctrls.handler); 1487 1488 return ret; 1489 } 1490 1491 static int ov5693_remove(struct i2c_client *client) 1492 { 1493 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1494 struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 1495 1496 v4l2_async_unregister_subdev(sd); 1497 media_entity_cleanup(&ov5693->sd.entity); 1498 v4l2_ctrl_handler_free(&ov5693->ctrls.handler); 1499 mutex_destroy(&ov5693->lock); 1500 1501 /* 1502 * Disable runtime PM. In case runtime PM is disabled in the kernel, 1503 * make sure to turn power off manually. 1504 */ 1505 pm_runtime_disable(&client->dev); 1506 if (!pm_runtime_status_suspended(&client->dev)) 1507 ov5693_sensor_powerdown(ov5693); 1508 pm_runtime_set_suspended(&client->dev); 1509 1510 return 0; 1511 } 1512 1513 static const struct dev_pm_ops ov5693_pm_ops = { 1514 SET_RUNTIME_PM_OPS(ov5693_sensor_suspend, ov5693_sensor_resume, NULL) 1515 }; 1516 1517 static const struct acpi_device_id ov5693_acpi_match[] = { 1518 {"INT33BE"}, 1519 {}, 1520 }; 1521 MODULE_DEVICE_TABLE(acpi, ov5693_acpi_match); 1522 1523 static struct i2c_driver ov5693_driver = { 1524 .driver = { 1525 .name = "ov5693", 1526 .acpi_match_table = ov5693_acpi_match, 1527 .pm = &ov5693_pm_ops, 1528 }, 1529 .probe_new = ov5693_probe, 1530 .remove = ov5693_remove, 1531 }; 1532 module_i2c_driver(ov5693_driver); 1533 1534 MODULE_DESCRIPTION("A low-level driver for OmniVision 5693 sensors"); 1535 MODULE_LICENSE("GPL"); 1536