189aef879SDaniel Scally // SPDX-License-Identifier: GPL-2.0 289aef879SDaniel Scally /* 389aef879SDaniel Scally * Copyright (c) 2013 Intel Corporation. All Rights Reserved. 489aef879SDaniel Scally * 589aef879SDaniel Scally * Adapted from the atomisp-ov5693 driver, with contributions from: 689aef879SDaniel Scally * 789aef879SDaniel Scally * Daniel Scally 889aef879SDaniel Scally * Jean-Michel Hautbois 989aef879SDaniel Scally * Fabian Wuthrich 1089aef879SDaniel Scally * Tsuchiya Yuto 1189aef879SDaniel Scally * Jordan Hand 1289aef879SDaniel Scally * Jake Day 1389aef879SDaniel Scally */ 1489aef879SDaniel Scally 1589aef879SDaniel Scally #include <asm/unaligned.h> 1689aef879SDaniel Scally #include <linux/acpi.h> 1789aef879SDaniel Scally #include <linux/clk.h> 1889aef879SDaniel Scally #include <linux/delay.h> 1989aef879SDaniel Scally #include <linux/device.h> 2089aef879SDaniel Scally #include <linux/i2c.h> 2189aef879SDaniel Scally #include <linux/module.h> 2289aef879SDaniel Scally #include <linux/pm_runtime.h> 2389aef879SDaniel Scally #include <linux/regulator/consumer.h> 2489aef879SDaniel Scally #include <linux/slab.h> 2589aef879SDaniel Scally #include <linux/types.h> 2689aef879SDaniel Scally #include <media/v4l2-ctrls.h> 2789aef879SDaniel Scally #include <media/v4l2-device.h> 2889aef879SDaniel Scally #include <media/v4l2-fwnode.h> 2989aef879SDaniel Scally 3089aef879SDaniel Scally #define OV5693_REG_8BIT(n) ((1 << 16) | (n)) 3189aef879SDaniel Scally #define OV5693_REG_16BIT(n) ((2 << 16) | (n)) 3289aef879SDaniel Scally #define OV5693_REG_24BIT(n) ((3 << 16) | (n)) 3389aef879SDaniel Scally #define OV5693_REG_SIZE_SHIFT 16 3489aef879SDaniel Scally #define OV5693_REG_ADDR_MASK 0xffff 3589aef879SDaniel Scally 3689aef879SDaniel Scally /* System Control */ 3789aef879SDaniel Scally #define OV5693_SW_RESET_REG OV5693_REG_8BIT(0x0103) 3889aef879SDaniel Scally #define OV5693_SW_STREAM_REG OV5693_REG_8BIT(0x0100) 3989aef879SDaniel Scally #define OV5693_START_STREAMING 0x01 4089aef879SDaniel Scally #define OV5693_STOP_STREAMING 0x00 4189aef879SDaniel Scally #define OV5693_SW_RESET 0x01 4289aef879SDaniel Scally 4389aef879SDaniel Scally #define OV5693_REG_CHIP_ID OV5693_REG_16BIT(0x300a) 4489aef879SDaniel Scally /* Yes, this is right. The datasheet for the OV5693 gives its ID as 0x5690 */ 4589aef879SDaniel Scally #define OV5693_CHIP_ID 0x5690 4689aef879SDaniel Scally 4789aef879SDaniel Scally /* Exposure */ 4889aef879SDaniel Scally #define OV5693_EXPOSURE_CTRL_REG OV5693_REG_24BIT(0x3500) 4989aef879SDaniel Scally #define OV5693_EXPOSURE_CTRL_MASK GENMASK(19, 4) 5089aef879SDaniel Scally #define OV5693_INTEGRATION_TIME_MARGIN 8 5189aef879SDaniel Scally #define OV5693_EXPOSURE_MIN 1 5289aef879SDaniel Scally #define OV5693_EXPOSURE_STEP 1 5389aef879SDaniel Scally 5489aef879SDaniel Scally /* Analogue Gain */ 5589aef879SDaniel Scally #define OV5693_GAIN_CTRL_REG OV5693_REG_16BIT(0x350a) 5689aef879SDaniel Scally #define OV5693_GAIN_CTRL_MASK GENMASK(10, 4) 5789aef879SDaniel Scally #define OV5693_GAIN_MIN 1 5889aef879SDaniel Scally #define OV5693_GAIN_MAX 127 5989aef879SDaniel Scally #define OV5693_GAIN_DEF 8 6089aef879SDaniel Scally #define OV5693_GAIN_STEP 1 6189aef879SDaniel Scally 6289aef879SDaniel Scally /* Digital Gain */ 6389aef879SDaniel Scally #define OV5693_MWB_RED_GAIN_REG OV5693_REG_16BIT(0x3400) 6489aef879SDaniel Scally #define OV5693_MWB_GREEN_GAIN_REG OV5693_REG_16BIT(0x3402) 6589aef879SDaniel Scally #define OV5693_MWB_BLUE_GAIN_REG OV5693_REG_16BIT(0x3404) 6689aef879SDaniel Scally #define OV5693_MWB_GAIN_MASK GENMASK(11, 0) 6789aef879SDaniel Scally #define OV5693_MWB_GAIN_MAX 0x0fff 6889aef879SDaniel Scally #define OV5693_DIGITAL_GAIN_MIN 1 6989aef879SDaniel Scally #define OV5693_DIGITAL_GAIN_MAX 4095 7089aef879SDaniel Scally #define OV5693_DIGITAL_GAIN_DEF 1024 7189aef879SDaniel Scally #define OV5693_DIGITAL_GAIN_STEP 1 7289aef879SDaniel Scally 7389aef879SDaniel Scally /* Timing and Format */ 7489aef879SDaniel Scally #define OV5693_CROP_START_X_REG OV5693_REG_16BIT(0x3800) 7589aef879SDaniel Scally #define OV5693_CROP_START_Y_REG OV5693_REG_16BIT(0x3802) 7689aef879SDaniel Scally #define OV5693_CROP_END_X_REG OV5693_REG_16BIT(0x3804) 7789aef879SDaniel Scally #define OV5693_CROP_END_Y_REG OV5693_REG_16BIT(0x3806) 7889aef879SDaniel Scally #define OV5693_OUTPUT_SIZE_X_REG OV5693_REG_16BIT(0x3808) 7989aef879SDaniel Scally #define OV5693_OUTPUT_SIZE_Y_REG OV5693_REG_16BIT(0x380a) 8089aef879SDaniel Scally 8189aef879SDaniel Scally #define OV5693_TIMING_HTS_REG OV5693_REG_16BIT(0x380c) 8289aef879SDaniel Scally #define OV5693_FIXED_PPL 2688U 8389aef879SDaniel Scally #define OV5693_TIMING_VTS_REG OV5693_REG_16BIT(0x380e) 8489aef879SDaniel Scally #define OV5693_TIMING_MAX_VTS 0xffff 8589aef879SDaniel Scally #define OV5693_TIMING_MIN_VTS 0x04 8689aef879SDaniel Scally 8789aef879SDaniel Scally #define OV5693_OFFSET_START_X_REG OV5693_REG_16BIT(0x3810) 8889aef879SDaniel Scally #define OV5693_OFFSET_START_Y_REG OV5693_REG_16BIT(0x3812) 8989aef879SDaniel Scally 9089aef879SDaniel Scally #define OV5693_SUB_INC_X_REG OV5693_REG_8BIT(0x3814) 9189aef879SDaniel Scally #define OV5693_SUB_INC_Y_REG OV5693_REG_8BIT(0x3815) 9289aef879SDaniel Scally 9389aef879SDaniel Scally #define OV5693_FORMAT1_REG OV5693_REG_8BIT(0x3820) 9489aef879SDaniel Scally #define OV5693_FORMAT1_FLIP_VERT_ISP_EN BIT(6) 9589aef879SDaniel Scally #define OV5693_FORMAT1_FLIP_VERT_SENSOR_EN BIT(1) 9689aef879SDaniel Scally #define OV5693_FORMAT1_VBIN_EN BIT(0) 9789aef879SDaniel Scally #define OV5693_FORMAT2_REG OV5693_REG_8BIT(0x3821) 9889aef879SDaniel Scally #define OV5693_FORMAT2_HDR_EN BIT(7) 9989aef879SDaniel Scally #define OV5693_FORMAT2_FLIP_HORZ_ISP_EN BIT(2) 10089aef879SDaniel Scally #define OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN BIT(1) 10189aef879SDaniel Scally #define OV5693_FORMAT2_HBIN_EN BIT(0) 10289aef879SDaniel Scally 10389aef879SDaniel Scally #define OV5693_ISP_CTRL2_REG OV5693_REG_8BIT(0x5002) 10489aef879SDaniel Scally #define OV5693_ISP_SCALE_ENABLE BIT(7) 10589aef879SDaniel Scally 10689aef879SDaniel Scally /* Pixel Array */ 10789aef879SDaniel Scally #define OV5693_NATIVE_WIDTH 2624 10889aef879SDaniel Scally #define OV5693_NATIVE_HEIGHT 1956 10989aef879SDaniel Scally #define OV5693_NATIVE_START_LEFT 0 11089aef879SDaniel Scally #define OV5693_NATIVE_START_TOP 0 11189aef879SDaniel Scally #define OV5693_ACTIVE_WIDTH 2592 11289aef879SDaniel Scally #define OV5693_ACTIVE_HEIGHT 1944 11389aef879SDaniel Scally #define OV5693_ACTIVE_START_LEFT 16 11489aef879SDaniel Scally #define OV5693_ACTIVE_START_TOP 6 11589aef879SDaniel Scally #define OV5693_MIN_CROP_WIDTH 2 11689aef879SDaniel Scally #define OV5693_MIN_CROP_HEIGHT 2 11789aef879SDaniel Scally 11889aef879SDaniel Scally /* Test Pattern */ 11989aef879SDaniel Scally #define OV5693_TEST_PATTERN_REG OV5693_REG_8BIT(0x5e00) 12089aef879SDaniel Scally #define OV5693_TEST_PATTERN_ENABLE BIT(7) 12189aef879SDaniel Scally #define OV5693_TEST_PATTERN_ROLLING BIT(6) 12289aef879SDaniel Scally #define OV5693_TEST_PATTERN_RANDOM 0x01 12389aef879SDaniel Scally #define OV5693_TEST_PATTERN_BARS 0x00 12489aef879SDaniel Scally 12589aef879SDaniel Scally /* System Frequencies */ 12689aef879SDaniel Scally #define OV5693_XVCLK_FREQ 19200000 12789aef879SDaniel Scally #define OV5693_LINK_FREQ_419_2MHZ 419200000 12889aef879SDaniel Scally #define OV5693_PIXEL_RATE 167680000 12989aef879SDaniel Scally 13089aef879SDaniel Scally #define to_ov5693_sensor(x) container_of(x, struct ov5693_device, sd) 13189aef879SDaniel Scally 132cfdb1954STommaso Merciai static const char * const ov5693_supply_names[] = { 133cfdb1954STommaso Merciai "avdd", /* Analog power */ 134cfdb1954STommaso Merciai "dovdd", /* Digital I/O power */ 1356ae8701fSTommaso Merciai "dvdd", /* Digital circuit power */ 136cfdb1954STommaso Merciai }; 137cfdb1954STommaso Merciai 138cfdb1954STommaso Merciai #define OV5693_NUM_SUPPLIES ARRAY_SIZE(ov5693_supply_names) 139cfdb1954STommaso Merciai 14089aef879SDaniel Scally struct ov5693_reg { 14189aef879SDaniel Scally u32 reg; 14289aef879SDaniel Scally u8 val; 14389aef879SDaniel Scally }; 14489aef879SDaniel Scally 14589aef879SDaniel Scally struct ov5693_reg_list { 14689aef879SDaniel Scally u32 num_regs; 14789aef879SDaniel Scally const struct ov5693_reg *regs; 14889aef879SDaniel Scally }; 14989aef879SDaniel Scally 15089aef879SDaniel Scally struct ov5693_device { 15189aef879SDaniel Scally struct i2c_client *client; 15289aef879SDaniel Scally struct device *dev; 15389aef879SDaniel Scally 15489aef879SDaniel Scally /* Protect against concurrent changes to controls */ 15589aef879SDaniel Scally struct mutex lock; 15689aef879SDaniel Scally 15789aef879SDaniel Scally struct gpio_desc *reset; 15889aef879SDaniel Scally struct gpio_desc *powerdown; 15989aef879SDaniel Scally struct regulator_bulk_data supplies[OV5693_NUM_SUPPLIES]; 1608a47d09eSTommaso Merciai struct clk *xvclk; 16189aef879SDaniel Scally 16289aef879SDaniel Scally struct ov5693_mode { 16389aef879SDaniel Scally struct v4l2_rect crop; 16489aef879SDaniel Scally struct v4l2_mbus_framefmt format; 16589aef879SDaniel Scally bool binning_x; 16689aef879SDaniel Scally bool binning_y; 16789aef879SDaniel Scally unsigned int inc_x_odd; 16889aef879SDaniel Scally unsigned int inc_y_odd; 16989aef879SDaniel Scally unsigned int vts; 17089aef879SDaniel Scally } mode; 17189aef879SDaniel Scally bool streaming; 17289aef879SDaniel Scally 17389aef879SDaniel Scally struct v4l2_subdev sd; 17489aef879SDaniel Scally struct media_pad pad; 17589aef879SDaniel Scally 17689aef879SDaniel Scally struct ov5693_v4l2_ctrls { 17789aef879SDaniel Scally struct v4l2_ctrl_handler handler; 17889aef879SDaniel Scally struct v4l2_ctrl *link_freq; 17989aef879SDaniel Scally struct v4l2_ctrl *pixel_rate; 18089aef879SDaniel Scally struct v4l2_ctrl *exposure; 18189aef879SDaniel Scally struct v4l2_ctrl *analogue_gain; 18289aef879SDaniel Scally struct v4l2_ctrl *digital_gain; 18389aef879SDaniel Scally struct v4l2_ctrl *hflip; 18489aef879SDaniel Scally struct v4l2_ctrl *vflip; 18589aef879SDaniel Scally struct v4l2_ctrl *hblank; 18689aef879SDaniel Scally struct v4l2_ctrl *vblank; 18789aef879SDaniel Scally struct v4l2_ctrl *test_pattern; 18889aef879SDaniel Scally } ctrls; 18989aef879SDaniel Scally }; 19089aef879SDaniel Scally 19189aef879SDaniel Scally static const struct ov5693_reg ov5693_global_regs[] = { 19289aef879SDaniel Scally {OV5693_REG_8BIT(0x3016), 0xf0}, 19389aef879SDaniel Scally {OV5693_REG_8BIT(0x3017), 0xf0}, 19489aef879SDaniel Scally {OV5693_REG_8BIT(0x3018), 0xf0}, 19589aef879SDaniel Scally {OV5693_REG_8BIT(0x3022), 0x01}, 19689aef879SDaniel Scally {OV5693_REG_8BIT(0x3028), 0x44}, 19789aef879SDaniel Scally {OV5693_REG_8BIT(0x3098), 0x02}, 19889aef879SDaniel Scally {OV5693_REG_8BIT(0x3099), 0x19}, 19989aef879SDaniel Scally {OV5693_REG_8BIT(0x309a), 0x02}, 20089aef879SDaniel Scally {OV5693_REG_8BIT(0x309b), 0x01}, 20189aef879SDaniel Scally {OV5693_REG_8BIT(0x309c), 0x00}, 20289aef879SDaniel Scally {OV5693_REG_8BIT(0x30a0), 0xd2}, 20389aef879SDaniel Scally {OV5693_REG_8BIT(0x30a2), 0x01}, 20489aef879SDaniel Scally {OV5693_REG_8BIT(0x30b2), 0x00}, 20589aef879SDaniel Scally {OV5693_REG_8BIT(0x30b3), 0x83}, 20689aef879SDaniel Scally {OV5693_REG_8BIT(0x30b4), 0x03}, 20789aef879SDaniel Scally {OV5693_REG_8BIT(0x30b5), 0x04}, 20889aef879SDaniel Scally {OV5693_REG_8BIT(0x30b6), 0x01}, 20989aef879SDaniel Scally {OV5693_REG_8BIT(0x3080), 0x01}, 21089aef879SDaniel Scally {OV5693_REG_8BIT(0x3104), 0x21}, 21189aef879SDaniel Scally {OV5693_REG_8BIT(0x3106), 0x00}, 21289aef879SDaniel Scally {OV5693_REG_8BIT(0x3406), 0x01}, 21389aef879SDaniel Scally {OV5693_REG_8BIT(0x3503), 0x07}, 21489aef879SDaniel Scally {OV5693_REG_8BIT(0x350b), 0x40}, 21589aef879SDaniel Scally {OV5693_REG_8BIT(0x3601), 0x0a}, 21689aef879SDaniel Scally {OV5693_REG_8BIT(0x3602), 0x38}, 21789aef879SDaniel Scally {OV5693_REG_8BIT(0x3612), 0x80}, 21889aef879SDaniel Scally {OV5693_REG_8BIT(0x3620), 0x54}, 21989aef879SDaniel Scally {OV5693_REG_8BIT(0x3621), 0xc7}, 22089aef879SDaniel Scally {OV5693_REG_8BIT(0x3622), 0x0f}, 22189aef879SDaniel Scally {OV5693_REG_8BIT(0x3625), 0x10}, 22289aef879SDaniel Scally {OV5693_REG_8BIT(0x3630), 0x55}, 22389aef879SDaniel Scally {OV5693_REG_8BIT(0x3631), 0xf4}, 22489aef879SDaniel Scally {OV5693_REG_8BIT(0x3632), 0x00}, 22589aef879SDaniel Scally {OV5693_REG_8BIT(0x3633), 0x34}, 22689aef879SDaniel Scally {OV5693_REG_8BIT(0x3634), 0x02}, 22789aef879SDaniel Scally {OV5693_REG_8BIT(0x364d), 0x0d}, 22889aef879SDaniel Scally {OV5693_REG_8BIT(0x364f), 0xdd}, 22989aef879SDaniel Scally {OV5693_REG_8BIT(0x3660), 0x04}, 23089aef879SDaniel Scally {OV5693_REG_8BIT(0x3662), 0x10}, 23189aef879SDaniel Scally {OV5693_REG_8BIT(0x3663), 0xf1}, 23289aef879SDaniel Scally {OV5693_REG_8BIT(0x3665), 0x00}, 23389aef879SDaniel Scally {OV5693_REG_8BIT(0x3666), 0x20}, 23489aef879SDaniel Scally {OV5693_REG_8BIT(0x3667), 0x00}, 23589aef879SDaniel Scally {OV5693_REG_8BIT(0x366a), 0x80}, 23689aef879SDaniel Scally {OV5693_REG_8BIT(0x3680), 0xe0}, 23789aef879SDaniel Scally {OV5693_REG_8BIT(0x3681), 0x00}, 23889aef879SDaniel Scally {OV5693_REG_8BIT(0x3700), 0x42}, 23989aef879SDaniel Scally {OV5693_REG_8BIT(0x3701), 0x14}, 24089aef879SDaniel Scally {OV5693_REG_8BIT(0x3702), 0xa0}, 24189aef879SDaniel Scally {OV5693_REG_8BIT(0x3703), 0xd8}, 24289aef879SDaniel Scally {OV5693_REG_8BIT(0x3704), 0x78}, 24389aef879SDaniel Scally {OV5693_REG_8BIT(0x3705), 0x02}, 24489aef879SDaniel Scally {OV5693_REG_8BIT(0x370a), 0x00}, 24589aef879SDaniel Scally {OV5693_REG_8BIT(0x370b), 0x20}, 24689aef879SDaniel Scally {OV5693_REG_8BIT(0x370c), 0x0c}, 24789aef879SDaniel Scally {OV5693_REG_8BIT(0x370d), 0x11}, 24889aef879SDaniel Scally {OV5693_REG_8BIT(0x370e), 0x00}, 24989aef879SDaniel Scally {OV5693_REG_8BIT(0x370f), 0x40}, 25089aef879SDaniel Scally {OV5693_REG_8BIT(0x3710), 0x00}, 25189aef879SDaniel Scally {OV5693_REG_8BIT(0x371a), 0x1c}, 25289aef879SDaniel Scally {OV5693_REG_8BIT(0x371b), 0x05}, 25389aef879SDaniel Scally {OV5693_REG_8BIT(0x371c), 0x01}, 25489aef879SDaniel Scally {OV5693_REG_8BIT(0x371e), 0xa1}, 25589aef879SDaniel Scally {OV5693_REG_8BIT(0x371f), 0x0c}, 25689aef879SDaniel Scally {OV5693_REG_8BIT(0x3721), 0x00}, 25789aef879SDaniel Scally {OV5693_REG_8BIT(0x3724), 0x10}, 25889aef879SDaniel Scally {OV5693_REG_8BIT(0x3726), 0x00}, 25989aef879SDaniel Scally {OV5693_REG_8BIT(0x372a), 0x01}, 26089aef879SDaniel Scally {OV5693_REG_8BIT(0x3730), 0x10}, 26189aef879SDaniel Scally {OV5693_REG_8BIT(0x3738), 0x22}, 26289aef879SDaniel Scally {OV5693_REG_8BIT(0x3739), 0xe5}, 26389aef879SDaniel Scally {OV5693_REG_8BIT(0x373a), 0x50}, 26489aef879SDaniel Scally {OV5693_REG_8BIT(0x373b), 0x02}, 26589aef879SDaniel Scally {OV5693_REG_8BIT(0x373c), 0x41}, 26689aef879SDaniel Scally {OV5693_REG_8BIT(0x373f), 0x02}, 26789aef879SDaniel Scally {OV5693_REG_8BIT(0x3740), 0x42}, 26889aef879SDaniel Scally {OV5693_REG_8BIT(0x3741), 0x02}, 26989aef879SDaniel Scally {OV5693_REG_8BIT(0x3742), 0x18}, 27089aef879SDaniel Scally {OV5693_REG_8BIT(0x3743), 0x01}, 27189aef879SDaniel Scally {OV5693_REG_8BIT(0x3744), 0x02}, 27289aef879SDaniel Scally {OV5693_REG_8BIT(0x3747), 0x10}, 27389aef879SDaniel Scally {OV5693_REG_8BIT(0x374c), 0x04}, 27489aef879SDaniel Scally {OV5693_REG_8BIT(0x3751), 0xf0}, 27589aef879SDaniel Scally {OV5693_REG_8BIT(0x3752), 0x00}, 27689aef879SDaniel Scally {OV5693_REG_8BIT(0x3753), 0x00}, 27789aef879SDaniel Scally {OV5693_REG_8BIT(0x3754), 0xc0}, 27889aef879SDaniel Scally {OV5693_REG_8BIT(0x3755), 0x00}, 27989aef879SDaniel Scally {OV5693_REG_8BIT(0x3756), 0x1a}, 28089aef879SDaniel Scally {OV5693_REG_8BIT(0x3758), 0x00}, 28189aef879SDaniel Scally {OV5693_REG_8BIT(0x3759), 0x0f}, 28289aef879SDaniel Scally {OV5693_REG_8BIT(0x376b), 0x44}, 28389aef879SDaniel Scally {OV5693_REG_8BIT(0x375c), 0x04}, 28489aef879SDaniel Scally {OV5693_REG_8BIT(0x3774), 0x10}, 28589aef879SDaniel Scally {OV5693_REG_8BIT(0x3776), 0x00}, 28689aef879SDaniel Scally {OV5693_REG_8BIT(0x377f), 0x08}, 28789aef879SDaniel Scally {OV5693_REG_8BIT(0x3780), 0x22}, 28889aef879SDaniel Scally {OV5693_REG_8BIT(0x3781), 0x0c}, 28989aef879SDaniel Scally {OV5693_REG_8BIT(0x3784), 0x2c}, 29089aef879SDaniel Scally {OV5693_REG_8BIT(0x3785), 0x1e}, 29189aef879SDaniel Scally {OV5693_REG_8BIT(0x378f), 0xf5}, 29289aef879SDaniel Scally {OV5693_REG_8BIT(0x3791), 0xb0}, 29389aef879SDaniel Scally {OV5693_REG_8BIT(0x3795), 0x00}, 29489aef879SDaniel Scally {OV5693_REG_8BIT(0x3796), 0x64}, 29589aef879SDaniel Scally {OV5693_REG_8BIT(0x3797), 0x11}, 29689aef879SDaniel Scally {OV5693_REG_8BIT(0x3798), 0x30}, 29789aef879SDaniel Scally {OV5693_REG_8BIT(0x3799), 0x41}, 29889aef879SDaniel Scally {OV5693_REG_8BIT(0x379a), 0x07}, 29989aef879SDaniel Scally {OV5693_REG_8BIT(0x379b), 0xb0}, 30089aef879SDaniel Scally {OV5693_REG_8BIT(0x379c), 0x0c}, 30189aef879SDaniel Scally {OV5693_REG_8BIT(0x3a04), 0x06}, 30289aef879SDaniel Scally {OV5693_REG_8BIT(0x3a05), 0x14}, 30389aef879SDaniel Scally {OV5693_REG_8BIT(0x3e07), 0x20}, 30489aef879SDaniel Scally {OV5693_REG_8BIT(0x4000), 0x08}, 30589aef879SDaniel Scally {OV5693_REG_8BIT(0x4001), 0x04}, 30689aef879SDaniel Scally {OV5693_REG_8BIT(0x4004), 0x08}, 30789aef879SDaniel Scally {OV5693_REG_8BIT(0x4006), 0x20}, 30889aef879SDaniel Scally {OV5693_REG_8BIT(0x4008), 0x24}, 30989aef879SDaniel Scally {OV5693_REG_8BIT(0x4009), 0x10}, 31089aef879SDaniel Scally {OV5693_REG_8BIT(0x4058), 0x00}, 31189aef879SDaniel Scally {OV5693_REG_8BIT(0x4101), 0xb2}, 31289aef879SDaniel Scally {OV5693_REG_8BIT(0x4307), 0x31}, 31389aef879SDaniel Scally {OV5693_REG_8BIT(0x4511), 0x05}, 31489aef879SDaniel Scally {OV5693_REG_8BIT(0x4512), 0x01}, 31589aef879SDaniel Scally {OV5693_REG_8BIT(0x481f), 0x30}, 31689aef879SDaniel Scally {OV5693_REG_8BIT(0x4826), 0x2c}, 31789aef879SDaniel Scally {OV5693_REG_8BIT(0x4d02), 0xfd}, 31889aef879SDaniel Scally {OV5693_REG_8BIT(0x4d03), 0xf5}, 31989aef879SDaniel Scally {OV5693_REG_8BIT(0x4d04), 0x0c}, 32089aef879SDaniel Scally {OV5693_REG_8BIT(0x4d05), 0xcc}, 32189aef879SDaniel Scally {OV5693_REG_8BIT(0x4837), 0x0a}, 32289aef879SDaniel Scally {OV5693_REG_8BIT(0x5003), 0x20}, 32389aef879SDaniel Scally {OV5693_REG_8BIT(0x5013), 0x00}, 32489aef879SDaniel Scally {OV5693_REG_8BIT(0x5842), 0x01}, 32589aef879SDaniel Scally {OV5693_REG_8BIT(0x5843), 0x2b}, 32689aef879SDaniel Scally {OV5693_REG_8BIT(0x5844), 0x01}, 32789aef879SDaniel Scally {OV5693_REG_8BIT(0x5845), 0x92}, 32889aef879SDaniel Scally {OV5693_REG_8BIT(0x5846), 0x01}, 32989aef879SDaniel Scally {OV5693_REG_8BIT(0x5847), 0x8f}, 33089aef879SDaniel Scally {OV5693_REG_8BIT(0x5848), 0x01}, 33189aef879SDaniel Scally {OV5693_REG_8BIT(0x5849), 0x0c}, 33289aef879SDaniel Scally {OV5693_REG_8BIT(0x5e10), 0x0c}, 33389aef879SDaniel Scally {OV5693_REG_8BIT(0x3820), 0x00}, 33489aef879SDaniel Scally {OV5693_REG_8BIT(0x3821), 0x1e}, 33589aef879SDaniel Scally {OV5693_REG_8BIT(0x5041), 0x14} 33689aef879SDaniel Scally }; 33789aef879SDaniel Scally 33889aef879SDaniel Scally static const struct ov5693_reg_list ov5693_global_setting = { 33989aef879SDaniel Scally .num_regs = ARRAY_SIZE(ov5693_global_regs), 34089aef879SDaniel Scally .regs = ov5693_global_regs, 34189aef879SDaniel Scally }; 34289aef879SDaniel Scally 34389aef879SDaniel Scally static const struct v4l2_rect ov5693_default_crop = { 34489aef879SDaniel Scally .left = OV5693_ACTIVE_START_LEFT, 34589aef879SDaniel Scally .top = OV5693_ACTIVE_START_TOP, 34689aef879SDaniel Scally .width = OV5693_ACTIVE_WIDTH, 34789aef879SDaniel Scally .height = OV5693_ACTIVE_HEIGHT, 34889aef879SDaniel Scally }; 34989aef879SDaniel Scally 35089aef879SDaniel Scally static const struct v4l2_mbus_framefmt ov5693_default_fmt = { 35189aef879SDaniel Scally .width = OV5693_ACTIVE_WIDTH, 35289aef879SDaniel Scally .height = OV5693_ACTIVE_HEIGHT, 35389aef879SDaniel Scally .code = MEDIA_BUS_FMT_SBGGR10_1X10, 35489aef879SDaniel Scally }; 35589aef879SDaniel Scally 35689aef879SDaniel Scally static const s64 link_freq_menu_items[] = { 35789aef879SDaniel Scally OV5693_LINK_FREQ_419_2MHZ 35889aef879SDaniel Scally }; 35989aef879SDaniel Scally 36089aef879SDaniel Scally static const char * const ov5693_test_pattern_menu[] = { 36189aef879SDaniel Scally "Disabled", 36289aef879SDaniel Scally "Random Data", 36389aef879SDaniel Scally "Colour Bars", 36489aef879SDaniel Scally "Colour Bars with Rolling Bar" 36589aef879SDaniel Scally }; 36689aef879SDaniel Scally 36789aef879SDaniel Scally static const u8 ov5693_test_pattern_bits[] = { 36889aef879SDaniel Scally 0, 36989aef879SDaniel Scally OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_RANDOM, 37089aef879SDaniel Scally OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS, 37189aef879SDaniel Scally OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS | 37289aef879SDaniel Scally OV5693_TEST_PATTERN_ROLLING, 37389aef879SDaniel Scally }; 37489aef879SDaniel Scally 37589aef879SDaniel Scally /* I2C I/O Operations */ 37689aef879SDaniel Scally 37789aef879SDaniel Scally static int ov5693_read_reg(struct ov5693_device *ov5693, u32 addr, u32 *value) 37889aef879SDaniel Scally { 37989aef879SDaniel Scally struct i2c_client *client = ov5693->client; 38089aef879SDaniel Scally __be16 reg; 38189aef879SDaniel Scally u8 val[4]; 38289aef879SDaniel Scally struct i2c_msg msg[] = { 38389aef879SDaniel Scally { 38489aef879SDaniel Scally .addr = client->addr, 38589aef879SDaniel Scally .flags = 0, 38689aef879SDaniel Scally .len = 2, 38789aef879SDaniel Scally .buf = (u8 *)®, 38889aef879SDaniel Scally }, 38989aef879SDaniel Scally { 39089aef879SDaniel Scally .addr = client->addr, 39189aef879SDaniel Scally .flags = I2C_M_RD, 39289aef879SDaniel Scally .buf = (u8 *)&val, 39389aef879SDaniel Scally }, 39489aef879SDaniel Scally }; 39589aef879SDaniel Scally unsigned int len = ((addr >> OV5693_REG_SIZE_SHIFT) & 3); 39689aef879SDaniel Scally unsigned int i; 39789aef879SDaniel Scally int ret; 39889aef879SDaniel Scally 39989aef879SDaniel Scally reg = cpu_to_be16(addr & OV5693_REG_ADDR_MASK); 40089aef879SDaniel Scally 40189aef879SDaniel Scally msg[1].len = len; 40289aef879SDaniel Scally 40389aef879SDaniel Scally ret = i2c_transfer(client->adapter, msg, 2); 40489aef879SDaniel Scally if (ret < 0) 40589aef879SDaniel Scally return dev_err_probe(&client->dev, ret, 40689aef879SDaniel Scally "Failed to read register 0x%04x: %d\n", 40789aef879SDaniel Scally addr & OV5693_REG_ADDR_MASK, ret); 40889aef879SDaniel Scally 40989aef879SDaniel Scally *value = 0; 41089aef879SDaniel Scally for (i = 0; i < len; ++i) { 41189aef879SDaniel Scally *value <<= 8; 41289aef879SDaniel Scally *value |= val[i]; 41389aef879SDaniel Scally } 41489aef879SDaniel Scally 41589aef879SDaniel Scally return 0; 41689aef879SDaniel Scally } 41789aef879SDaniel Scally 41889aef879SDaniel Scally static void ov5693_write_reg(struct ov5693_device *ov5693, u32 addr, u32 value, 41989aef879SDaniel Scally int *error) 42089aef879SDaniel Scally { 42189aef879SDaniel Scally struct i2c_client *client = ov5693->client; 42289aef879SDaniel Scally struct { 42389aef879SDaniel Scally __be16 reg; 42489aef879SDaniel Scally u8 val[4]; 42589aef879SDaniel Scally } __packed buf; 42689aef879SDaniel Scally struct i2c_msg msg = { 42789aef879SDaniel Scally .addr = client->addr, 42889aef879SDaniel Scally .buf = (u8 *)&buf, 42989aef879SDaniel Scally }; 43089aef879SDaniel Scally unsigned int len = ((addr >> OV5693_REG_SIZE_SHIFT) & 3); 43189aef879SDaniel Scally unsigned int i; 43289aef879SDaniel Scally int ret; 43389aef879SDaniel Scally 43489aef879SDaniel Scally if (*error < 0) 43589aef879SDaniel Scally return; 43689aef879SDaniel Scally 43789aef879SDaniel Scally buf.reg = cpu_to_be16(addr & OV5693_REG_ADDR_MASK); 43889aef879SDaniel Scally for (i = 0; i < len; ++i) { 43989aef879SDaniel Scally buf.val[len - i - 1] = value & 0xff; 44089aef879SDaniel Scally value >>= 8; 44189aef879SDaniel Scally } 44289aef879SDaniel Scally 44389aef879SDaniel Scally msg.len = len + 2; 44489aef879SDaniel Scally 44589aef879SDaniel Scally ret = i2c_transfer(client->adapter, &msg, 1); 44689aef879SDaniel Scally if (ret < 0) { 44789aef879SDaniel Scally dev_err(&client->dev, "Failed to write register 0x%04x: %d\n", 44889aef879SDaniel Scally addr & OV5693_REG_ADDR_MASK, ret); 44989aef879SDaniel Scally *error = ret; 45089aef879SDaniel Scally } 45189aef879SDaniel Scally } 45289aef879SDaniel Scally 45389aef879SDaniel Scally static int ov5693_write_reg_array(struct ov5693_device *ov5693, 45489aef879SDaniel Scally const struct ov5693_reg_list *reglist) 45589aef879SDaniel Scally { 45689aef879SDaniel Scally unsigned int i; 45789aef879SDaniel Scally int ret = 0; 45889aef879SDaniel Scally 45989aef879SDaniel Scally for (i = 0; i < reglist->num_regs; i++) 46089aef879SDaniel Scally ov5693_write_reg(ov5693, reglist->regs[i].reg, 46189aef879SDaniel Scally reglist->regs[i].val, &ret); 46289aef879SDaniel Scally 46389aef879SDaniel Scally return ret; 46489aef879SDaniel Scally } 46589aef879SDaniel Scally 46689aef879SDaniel Scally static int ov5693_update_bits(struct ov5693_device *ov5693, u32 address, 46789aef879SDaniel Scally u32 mask, u32 bits) 46889aef879SDaniel Scally { 46989aef879SDaniel Scally u32 value = 0; 47089aef879SDaniel Scally int ret; 47189aef879SDaniel Scally 47289aef879SDaniel Scally ret = ov5693_read_reg(ov5693, address, &value); 47389aef879SDaniel Scally if (ret) 47489aef879SDaniel Scally return ret; 47589aef879SDaniel Scally 47689aef879SDaniel Scally value &= ~mask; 47789aef879SDaniel Scally value |= bits; 47889aef879SDaniel Scally 47989aef879SDaniel Scally ov5693_write_reg(ov5693, address, value, &ret); 48089aef879SDaniel Scally 48189aef879SDaniel Scally return ret; 48289aef879SDaniel Scally } 48389aef879SDaniel Scally 48489aef879SDaniel Scally /* V4L2 Controls Functions */ 48589aef879SDaniel Scally 48689aef879SDaniel Scally static int ov5693_flip_vert_configure(struct ov5693_device *ov5693, 48789aef879SDaniel Scally bool enable) 48889aef879SDaniel Scally { 48989aef879SDaniel Scally u8 bits = OV5693_FORMAT1_FLIP_VERT_ISP_EN | 49089aef879SDaniel Scally OV5693_FORMAT1_FLIP_VERT_SENSOR_EN; 49189aef879SDaniel Scally int ret; 49289aef879SDaniel Scally 49389aef879SDaniel Scally ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG, bits, 49489aef879SDaniel Scally enable ? bits : 0); 49589aef879SDaniel Scally if (ret) 49689aef879SDaniel Scally return ret; 49789aef879SDaniel Scally 49889aef879SDaniel Scally return 0; 49989aef879SDaniel Scally } 50089aef879SDaniel Scally 50189aef879SDaniel Scally static int ov5693_flip_horz_configure(struct ov5693_device *ov5693, 50289aef879SDaniel Scally bool enable) 50389aef879SDaniel Scally { 50489aef879SDaniel Scally u8 bits = OV5693_FORMAT2_FLIP_HORZ_ISP_EN | 50589aef879SDaniel Scally OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN; 50689aef879SDaniel Scally int ret; 50789aef879SDaniel Scally 50889aef879SDaniel Scally ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG, bits, 50989aef879SDaniel Scally enable ? bits : 0); 51089aef879SDaniel Scally if (ret) 51189aef879SDaniel Scally return ret; 51289aef879SDaniel Scally 51389aef879SDaniel Scally return 0; 51489aef879SDaniel Scally } 51589aef879SDaniel Scally 51689aef879SDaniel Scally static int ov5693_get_exposure(struct ov5693_device *ov5693, s32 *value) 51789aef879SDaniel Scally { 51889aef879SDaniel Scally u32 exposure; 51989aef879SDaniel Scally int ret; 52089aef879SDaniel Scally 52189aef879SDaniel Scally ret = ov5693_read_reg(ov5693, OV5693_EXPOSURE_CTRL_REG, &exposure); 52289aef879SDaniel Scally if (ret) 52389aef879SDaniel Scally return ret; 52489aef879SDaniel Scally 52589aef879SDaniel Scally /* The lowest 4 bits are unsupported fractional bits */ 52689aef879SDaniel Scally *value = exposure >> 4; 52789aef879SDaniel Scally 52889aef879SDaniel Scally return 0; 52989aef879SDaniel Scally } 53089aef879SDaniel Scally 53189aef879SDaniel Scally static int ov5693_exposure_configure(struct ov5693_device *ov5693, 53289aef879SDaniel Scally u32 exposure) 53389aef879SDaniel Scally { 53489aef879SDaniel Scally int ret = 0; 53589aef879SDaniel Scally 53689aef879SDaniel Scally exposure = (exposure << 4) & OV5693_EXPOSURE_CTRL_MASK; 53789aef879SDaniel Scally 53889aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_EXPOSURE_CTRL_REG, exposure, &ret); 53989aef879SDaniel Scally 54089aef879SDaniel Scally return ret; 54189aef879SDaniel Scally } 54289aef879SDaniel Scally 54389aef879SDaniel Scally static int ov5693_get_gain(struct ov5693_device *ov5693, u32 *gain) 54489aef879SDaniel Scally { 54589aef879SDaniel Scally u32 value; 54689aef879SDaniel Scally int ret; 54789aef879SDaniel Scally 54889aef879SDaniel Scally ret = ov5693_read_reg(ov5693, OV5693_GAIN_CTRL_REG, &value); 54989aef879SDaniel Scally if (ret) 55089aef879SDaniel Scally return ret; 55189aef879SDaniel Scally 55289aef879SDaniel Scally /* As with exposure, the lowest 4 bits are fractional bits. */ 55389aef879SDaniel Scally *gain = value >> 4; 55489aef879SDaniel Scally 55589aef879SDaniel Scally return ret; 55689aef879SDaniel Scally } 55789aef879SDaniel Scally 55889aef879SDaniel Scally static int ov5693_digital_gain_configure(struct ov5693_device *ov5693, 55989aef879SDaniel Scally u32 gain) 56089aef879SDaniel Scally { 56189aef879SDaniel Scally int ret = 0; 56289aef879SDaniel Scally 56389aef879SDaniel Scally gain &= OV5693_MWB_GAIN_MASK; 56489aef879SDaniel Scally 56589aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_MWB_RED_GAIN_REG, gain, &ret); 56689aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_MWB_GREEN_GAIN_REG, gain, &ret); 56789aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_MWB_BLUE_GAIN_REG, gain, &ret); 56889aef879SDaniel Scally 56989aef879SDaniel Scally return ret; 57089aef879SDaniel Scally } 57189aef879SDaniel Scally 57289aef879SDaniel Scally static int ov5693_analog_gain_configure(struct ov5693_device *ov5693, u32 gain) 57389aef879SDaniel Scally { 57489aef879SDaniel Scally int ret = 0; 57589aef879SDaniel Scally 57689aef879SDaniel Scally gain = (gain << 4) & OV5693_GAIN_CTRL_MASK; 57789aef879SDaniel Scally 57889aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_GAIN_CTRL_REG, gain, &ret); 57989aef879SDaniel Scally 58089aef879SDaniel Scally return ret; 58189aef879SDaniel Scally } 58289aef879SDaniel Scally 58389aef879SDaniel Scally static int ov5693_vts_configure(struct ov5693_device *ov5693, u32 vblank) 58489aef879SDaniel Scally { 58589aef879SDaniel Scally u16 vts = ov5693->mode.format.height + vblank; 58689aef879SDaniel Scally int ret = 0; 58789aef879SDaniel Scally 58889aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_TIMING_VTS_REG, vts, &ret); 58989aef879SDaniel Scally 59089aef879SDaniel Scally return ret; 59189aef879SDaniel Scally } 59289aef879SDaniel Scally 59389aef879SDaniel Scally static int ov5693_test_pattern_configure(struct ov5693_device *ov5693, u32 idx) 59489aef879SDaniel Scally { 59589aef879SDaniel Scally int ret = 0; 59689aef879SDaniel Scally 59789aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_TEST_PATTERN_REG, 59889aef879SDaniel Scally ov5693_test_pattern_bits[idx], &ret); 59989aef879SDaniel Scally 60089aef879SDaniel Scally return ret; 60189aef879SDaniel Scally } 60289aef879SDaniel Scally 60389aef879SDaniel Scally static int ov5693_s_ctrl(struct v4l2_ctrl *ctrl) 60489aef879SDaniel Scally { 60589aef879SDaniel Scally struct ov5693_device *ov5693 = 60689aef879SDaniel Scally container_of(ctrl->handler, struct ov5693_device, ctrls.handler); 60789aef879SDaniel Scally int ret = 0; 60889aef879SDaniel Scally 60989aef879SDaniel Scally /* If VBLANK is altered we need to update exposure to compensate */ 61089aef879SDaniel Scally if (ctrl->id == V4L2_CID_VBLANK) { 61189aef879SDaniel Scally int exposure_max; 61289aef879SDaniel Scally 61389aef879SDaniel Scally exposure_max = ov5693->mode.format.height + ctrl->val - 61489aef879SDaniel Scally OV5693_INTEGRATION_TIME_MARGIN; 61589aef879SDaniel Scally __v4l2_ctrl_modify_range(ov5693->ctrls.exposure, 61689aef879SDaniel Scally ov5693->ctrls.exposure->minimum, 61789aef879SDaniel Scally exposure_max, 61889aef879SDaniel Scally ov5693->ctrls.exposure->step, 61989aef879SDaniel Scally min(ov5693->ctrls.exposure->val, 62089aef879SDaniel Scally exposure_max)); 62189aef879SDaniel Scally } 62289aef879SDaniel Scally 62389aef879SDaniel Scally /* Only apply changes to the controls if the device is powered up */ 62489aef879SDaniel Scally if (!pm_runtime_get_if_in_use(ov5693->dev)) 62589aef879SDaniel Scally return 0; 62689aef879SDaniel Scally 62789aef879SDaniel Scally switch (ctrl->id) { 62889aef879SDaniel Scally case V4L2_CID_EXPOSURE: 62989aef879SDaniel Scally ret = ov5693_exposure_configure(ov5693, ctrl->val); 63089aef879SDaniel Scally break; 63189aef879SDaniel Scally case V4L2_CID_ANALOGUE_GAIN: 63289aef879SDaniel Scally ret = ov5693_analog_gain_configure(ov5693, ctrl->val); 63389aef879SDaniel Scally break; 63489aef879SDaniel Scally case V4L2_CID_DIGITAL_GAIN: 63589aef879SDaniel Scally ret = ov5693_digital_gain_configure(ov5693, ctrl->val); 63689aef879SDaniel Scally break; 63789aef879SDaniel Scally case V4L2_CID_HFLIP: 63889aef879SDaniel Scally ret = ov5693_flip_horz_configure(ov5693, !!ctrl->val); 63989aef879SDaniel Scally break; 64089aef879SDaniel Scally case V4L2_CID_VFLIP: 64189aef879SDaniel Scally ret = ov5693_flip_vert_configure(ov5693, !!ctrl->val); 64289aef879SDaniel Scally break; 64389aef879SDaniel Scally case V4L2_CID_VBLANK: 64489aef879SDaniel Scally ret = ov5693_vts_configure(ov5693, ctrl->val); 64589aef879SDaniel Scally break; 64689aef879SDaniel Scally case V4L2_CID_TEST_PATTERN: 64789aef879SDaniel Scally ret = ov5693_test_pattern_configure(ov5693, ctrl->val); 64889aef879SDaniel Scally break; 64989aef879SDaniel Scally default: 65089aef879SDaniel Scally ret = -EINVAL; 65189aef879SDaniel Scally } 65289aef879SDaniel Scally 65389aef879SDaniel Scally pm_runtime_put(ov5693->dev); 65489aef879SDaniel Scally 65589aef879SDaniel Scally return ret; 65689aef879SDaniel Scally } 65789aef879SDaniel Scally 65889aef879SDaniel Scally static int ov5693_g_volatile_ctrl(struct v4l2_ctrl *ctrl) 65989aef879SDaniel Scally { 66089aef879SDaniel Scally struct ov5693_device *ov5693 = container_of(ctrl->handler, 66189aef879SDaniel Scally struct ov5693_device, 66289aef879SDaniel Scally ctrls.handler); 66389aef879SDaniel Scally 66489aef879SDaniel Scally switch (ctrl->id) { 66589aef879SDaniel Scally case V4L2_CID_EXPOSURE_ABSOLUTE: 66689aef879SDaniel Scally return ov5693_get_exposure(ov5693, &ctrl->val); 66789aef879SDaniel Scally case V4L2_CID_AUTOGAIN: 66889aef879SDaniel Scally return ov5693_get_gain(ov5693, &ctrl->val); 66989aef879SDaniel Scally default: 67089aef879SDaniel Scally return -EINVAL; 67189aef879SDaniel Scally } 67289aef879SDaniel Scally } 67389aef879SDaniel Scally 67489aef879SDaniel Scally static const struct v4l2_ctrl_ops ov5693_ctrl_ops = { 67589aef879SDaniel Scally .s_ctrl = ov5693_s_ctrl, 67689aef879SDaniel Scally .g_volatile_ctrl = ov5693_g_volatile_ctrl 67789aef879SDaniel Scally }; 67889aef879SDaniel Scally 67989aef879SDaniel Scally /* System Control Functions */ 68089aef879SDaniel Scally 68189aef879SDaniel Scally static int ov5693_mode_configure(struct ov5693_device *ov5693) 68289aef879SDaniel Scally { 68389aef879SDaniel Scally const struct ov5693_mode *mode = &ov5693->mode; 68489aef879SDaniel Scally int ret = 0; 68589aef879SDaniel Scally 68689aef879SDaniel Scally /* Crop Start X */ 68789aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_CROP_START_X_REG, mode->crop.left, 68889aef879SDaniel Scally &ret); 68989aef879SDaniel Scally 69089aef879SDaniel Scally /* Offset X */ 69189aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_OFFSET_START_X_REG, 0, &ret); 69289aef879SDaniel Scally 69389aef879SDaniel Scally /* Output Size X */ 69489aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_X_REG, mode->format.width, 69589aef879SDaniel Scally &ret); 69689aef879SDaniel Scally 69789aef879SDaniel Scally /* Crop End X */ 69889aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_CROP_END_X_REG, 69989aef879SDaniel Scally mode->crop.left + mode->crop.width, &ret); 70089aef879SDaniel Scally 70189aef879SDaniel Scally /* Horizontal Total Size */ 70289aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_TIMING_HTS_REG, OV5693_FIXED_PPL, 70389aef879SDaniel Scally &ret); 70489aef879SDaniel Scally 70589aef879SDaniel Scally /* Crop Start Y */ 70689aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_CROP_START_Y_REG, mode->crop.top, 70789aef879SDaniel Scally &ret); 70889aef879SDaniel Scally 70989aef879SDaniel Scally /* Offset Y */ 71089aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_OFFSET_START_Y_REG, 0, &ret); 71189aef879SDaniel Scally 71289aef879SDaniel Scally /* Output Size Y */ 71389aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_Y_REG, mode->format.height, 71489aef879SDaniel Scally &ret); 71589aef879SDaniel Scally 71689aef879SDaniel Scally /* Crop End Y */ 71789aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_CROP_END_Y_REG, 71889aef879SDaniel Scally mode->crop.top + mode->crop.height, &ret); 71989aef879SDaniel Scally 72089aef879SDaniel Scally /* Subsample X increase */ 72189aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_SUB_INC_X_REG, 72289aef879SDaniel Scally ((mode->inc_x_odd << 4) & 0xf0) | 0x01, &ret); 72389aef879SDaniel Scally /* Subsample Y increase */ 72489aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_SUB_INC_Y_REG, 72589aef879SDaniel Scally ((mode->inc_y_odd << 4) & 0xf0) | 0x01, &ret); 72689aef879SDaniel Scally 72789aef879SDaniel Scally if (ret) 72889aef879SDaniel Scally return ret; 72989aef879SDaniel Scally 73089aef879SDaniel Scally /* Binning */ 73189aef879SDaniel Scally ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG, 73289aef879SDaniel Scally OV5693_FORMAT1_VBIN_EN, 73389aef879SDaniel Scally mode->binning_y ? OV5693_FORMAT1_VBIN_EN : 0); 73489aef879SDaniel Scally if (ret) 73589aef879SDaniel Scally return ret; 73689aef879SDaniel Scally 73789aef879SDaniel Scally ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG, 73889aef879SDaniel Scally OV5693_FORMAT2_HBIN_EN, 73989aef879SDaniel Scally mode->binning_x ? OV5693_FORMAT2_HBIN_EN : 0); 74089aef879SDaniel Scally 74189aef879SDaniel Scally return ret; 74289aef879SDaniel Scally } 74389aef879SDaniel Scally 74489aef879SDaniel Scally static int ov5693_enable_streaming(struct ov5693_device *ov5693, bool enable) 74589aef879SDaniel Scally { 74689aef879SDaniel Scally int ret = 0; 74789aef879SDaniel Scally 74889aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_SW_STREAM_REG, 74989aef879SDaniel Scally enable ? OV5693_START_STREAMING : 75089aef879SDaniel Scally OV5693_STOP_STREAMING, &ret); 75189aef879SDaniel Scally 75289aef879SDaniel Scally return ret; 75389aef879SDaniel Scally } 75489aef879SDaniel Scally 75589aef879SDaniel Scally static int ov5693_sw_reset(struct ov5693_device *ov5693) 75689aef879SDaniel Scally { 75789aef879SDaniel Scally int ret = 0; 75889aef879SDaniel Scally 75989aef879SDaniel Scally ov5693_write_reg(ov5693, OV5693_SW_RESET_REG, OV5693_SW_RESET, &ret); 76089aef879SDaniel Scally 76189aef879SDaniel Scally return ret; 76289aef879SDaniel Scally } 76389aef879SDaniel Scally 76489aef879SDaniel Scally static int ov5693_sensor_init(struct ov5693_device *ov5693) 76589aef879SDaniel Scally { 76689aef879SDaniel Scally int ret; 76789aef879SDaniel Scally 76889aef879SDaniel Scally ret = ov5693_sw_reset(ov5693); 76989aef879SDaniel Scally if (ret) 77089aef879SDaniel Scally return dev_err_probe(ov5693->dev, ret, 77189aef879SDaniel Scally "software reset error\n"); 77289aef879SDaniel Scally 77389aef879SDaniel Scally ret = ov5693_write_reg_array(ov5693, &ov5693_global_setting); 77489aef879SDaniel Scally if (ret) 77589aef879SDaniel Scally return dev_err_probe(ov5693->dev, ret, 77689aef879SDaniel Scally "global settings error\n"); 77789aef879SDaniel Scally 77889aef879SDaniel Scally ret = ov5693_mode_configure(ov5693); 77989aef879SDaniel Scally if (ret) 78089aef879SDaniel Scally return dev_err_probe(ov5693->dev, ret, 78189aef879SDaniel Scally "mode configure error\n"); 78289aef879SDaniel Scally 78389aef879SDaniel Scally ret = ov5693_enable_streaming(ov5693, false); 78489aef879SDaniel Scally if (ret) 78589aef879SDaniel Scally dev_err(ov5693->dev, "stop streaming error\n"); 78689aef879SDaniel Scally 78789aef879SDaniel Scally return ret; 78889aef879SDaniel Scally } 78989aef879SDaniel Scally 79089aef879SDaniel Scally static void ov5693_sensor_powerdown(struct ov5693_device *ov5693) 79189aef879SDaniel Scally { 79289aef879SDaniel Scally gpiod_set_value_cansleep(ov5693->reset, 1); 79389aef879SDaniel Scally gpiod_set_value_cansleep(ov5693->powerdown, 1); 79489aef879SDaniel Scally 79589aef879SDaniel Scally regulator_bulk_disable(OV5693_NUM_SUPPLIES, ov5693->supplies); 79689aef879SDaniel Scally 7978a47d09eSTommaso Merciai clk_disable_unprepare(ov5693->xvclk); 79889aef879SDaniel Scally } 79989aef879SDaniel Scally 80089aef879SDaniel Scally static int ov5693_sensor_powerup(struct ov5693_device *ov5693) 80189aef879SDaniel Scally { 80289aef879SDaniel Scally int ret; 80389aef879SDaniel Scally 80489aef879SDaniel Scally gpiod_set_value_cansleep(ov5693->reset, 1); 80589aef879SDaniel Scally gpiod_set_value_cansleep(ov5693->powerdown, 1); 80689aef879SDaniel Scally 8078a47d09eSTommaso Merciai ret = clk_prepare_enable(ov5693->xvclk); 80889aef879SDaniel Scally if (ret) { 80989aef879SDaniel Scally dev_err(ov5693->dev, "Failed to enable clk\n"); 81089aef879SDaniel Scally goto fail_power; 81189aef879SDaniel Scally } 81289aef879SDaniel Scally 81389aef879SDaniel Scally ret = regulator_bulk_enable(OV5693_NUM_SUPPLIES, ov5693->supplies); 81489aef879SDaniel Scally if (ret) { 81589aef879SDaniel Scally dev_err(ov5693->dev, "Failed to enable regulators\n"); 81689aef879SDaniel Scally goto fail_power; 81789aef879SDaniel Scally } 81889aef879SDaniel Scally 81989aef879SDaniel Scally gpiod_set_value_cansleep(ov5693->powerdown, 0); 82089aef879SDaniel Scally gpiod_set_value_cansleep(ov5693->reset, 0); 82189aef879SDaniel Scally 82289aef879SDaniel Scally usleep_range(5000, 7500); 82389aef879SDaniel Scally 82489aef879SDaniel Scally return 0; 82589aef879SDaniel Scally 82689aef879SDaniel Scally fail_power: 82789aef879SDaniel Scally ov5693_sensor_powerdown(ov5693); 82889aef879SDaniel Scally return ret; 82989aef879SDaniel Scally } 83089aef879SDaniel Scally 83189aef879SDaniel Scally static int __maybe_unused ov5693_sensor_suspend(struct device *dev) 83289aef879SDaniel Scally { 83389aef879SDaniel Scally struct v4l2_subdev *sd = dev_get_drvdata(dev); 83489aef879SDaniel Scally struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 83589aef879SDaniel Scally 83689aef879SDaniel Scally ov5693_sensor_powerdown(ov5693); 83789aef879SDaniel Scally 83889aef879SDaniel Scally return 0; 83989aef879SDaniel Scally } 84089aef879SDaniel Scally 84189aef879SDaniel Scally static int __maybe_unused ov5693_sensor_resume(struct device *dev) 84289aef879SDaniel Scally { 84389aef879SDaniel Scally struct v4l2_subdev *sd = dev_get_drvdata(dev); 84489aef879SDaniel Scally struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 84589aef879SDaniel Scally int ret; 84689aef879SDaniel Scally 84789aef879SDaniel Scally mutex_lock(&ov5693->lock); 84889aef879SDaniel Scally 84989aef879SDaniel Scally ret = ov5693_sensor_powerup(ov5693); 85089aef879SDaniel Scally if (ret) 85189aef879SDaniel Scally goto out_unlock; 85289aef879SDaniel Scally 85389aef879SDaniel Scally ret = ov5693_sensor_init(ov5693); 85489aef879SDaniel Scally if (ret) { 85589aef879SDaniel Scally dev_err(dev, "ov5693 sensor init failure\n"); 85689aef879SDaniel Scally goto err_power; 85789aef879SDaniel Scally } 85889aef879SDaniel Scally 85989aef879SDaniel Scally goto out_unlock; 86089aef879SDaniel Scally 86189aef879SDaniel Scally err_power: 86289aef879SDaniel Scally ov5693_sensor_powerdown(ov5693); 86389aef879SDaniel Scally out_unlock: 86489aef879SDaniel Scally mutex_unlock(&ov5693->lock); 86589aef879SDaniel Scally return ret; 86689aef879SDaniel Scally } 86789aef879SDaniel Scally 86889aef879SDaniel Scally static int ov5693_detect(struct ov5693_device *ov5693) 86989aef879SDaniel Scally { 87089aef879SDaniel Scally int ret; 87189aef879SDaniel Scally u32 id; 87289aef879SDaniel Scally 87389aef879SDaniel Scally ret = ov5693_read_reg(ov5693, OV5693_REG_CHIP_ID, &id); 87489aef879SDaniel Scally if (ret) 87589aef879SDaniel Scally return ret; 87689aef879SDaniel Scally 87789aef879SDaniel Scally if (id != OV5693_CHIP_ID) 87889aef879SDaniel Scally return dev_err_probe(ov5693->dev, -ENODEV, 87989aef879SDaniel Scally "sensor ID mismatch. Found 0x%04x\n", id); 88089aef879SDaniel Scally 88189aef879SDaniel Scally return 0; 88289aef879SDaniel Scally } 88389aef879SDaniel Scally 88489aef879SDaniel Scally /* V4L2 Framework callbacks */ 88589aef879SDaniel Scally 88689aef879SDaniel Scally static unsigned int __ov5693_calc_vts(u32 height) 88789aef879SDaniel Scally { 88889aef879SDaniel Scally /* 88989aef879SDaniel Scally * We need to set a sensible default VTS for whatever format height we 89089aef879SDaniel Scally * happen to be given from set_fmt(). This function just targets 89189aef879SDaniel Scally * an even multiple of 30fps. 89289aef879SDaniel Scally */ 89389aef879SDaniel Scally 89489aef879SDaniel Scally unsigned int tgt_fps; 89589aef879SDaniel Scally 89689aef879SDaniel Scally tgt_fps = rounddown(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / height, 30); 89789aef879SDaniel Scally 89889aef879SDaniel Scally return ALIGN_DOWN(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / tgt_fps, 2); 89989aef879SDaniel Scally } 90089aef879SDaniel Scally 90189aef879SDaniel Scally static struct v4l2_mbus_framefmt * 90289aef879SDaniel Scally __ov5693_get_pad_format(struct ov5693_device *ov5693, 90389aef879SDaniel Scally struct v4l2_subdev_state *state, 90489aef879SDaniel Scally unsigned int pad, enum v4l2_subdev_format_whence which) 90589aef879SDaniel Scally { 90689aef879SDaniel Scally switch (which) { 90789aef879SDaniel Scally case V4L2_SUBDEV_FORMAT_TRY: 90889aef879SDaniel Scally return v4l2_subdev_get_try_format(&ov5693->sd, state, pad); 90989aef879SDaniel Scally case V4L2_SUBDEV_FORMAT_ACTIVE: 91089aef879SDaniel Scally return &ov5693->mode.format; 91189aef879SDaniel Scally default: 91289aef879SDaniel Scally return NULL; 91389aef879SDaniel Scally } 91489aef879SDaniel Scally } 91589aef879SDaniel Scally 91689aef879SDaniel Scally static struct v4l2_rect * 91789aef879SDaniel Scally __ov5693_get_pad_crop(struct ov5693_device *ov5693, 91889aef879SDaniel Scally struct v4l2_subdev_state *state, 91989aef879SDaniel Scally unsigned int pad, enum v4l2_subdev_format_whence which) 92089aef879SDaniel Scally { 92189aef879SDaniel Scally switch (which) { 92289aef879SDaniel Scally case V4L2_SUBDEV_FORMAT_TRY: 92389aef879SDaniel Scally return v4l2_subdev_get_try_crop(&ov5693->sd, state, pad); 92489aef879SDaniel Scally case V4L2_SUBDEV_FORMAT_ACTIVE: 92589aef879SDaniel Scally return &ov5693->mode.crop; 92689aef879SDaniel Scally } 92789aef879SDaniel Scally 92889aef879SDaniel Scally return NULL; 92989aef879SDaniel Scally } 93089aef879SDaniel Scally 93189aef879SDaniel Scally static int ov5693_get_fmt(struct v4l2_subdev *sd, 93289aef879SDaniel Scally struct v4l2_subdev_state *state, 93389aef879SDaniel Scally struct v4l2_subdev_format *format) 93489aef879SDaniel Scally { 93589aef879SDaniel Scally struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 93689aef879SDaniel Scally 93789aef879SDaniel Scally format->format = ov5693->mode.format; 93889aef879SDaniel Scally 93989aef879SDaniel Scally return 0; 94089aef879SDaniel Scally } 94189aef879SDaniel Scally 94289aef879SDaniel Scally static int ov5693_set_fmt(struct v4l2_subdev *sd, 94389aef879SDaniel Scally struct v4l2_subdev_state *state, 94489aef879SDaniel Scally struct v4l2_subdev_format *format) 94589aef879SDaniel Scally { 94689aef879SDaniel Scally struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 94789aef879SDaniel Scally const struct v4l2_rect *crop; 94889aef879SDaniel Scally struct v4l2_mbus_framefmt *fmt; 94989aef879SDaniel Scally unsigned int hratio, vratio; 95089aef879SDaniel Scally unsigned int width, height; 95189aef879SDaniel Scally unsigned int hblank; 95289aef879SDaniel Scally int exposure_max; 95389aef879SDaniel Scally 95489aef879SDaniel Scally crop = __ov5693_get_pad_crop(ov5693, state, format->pad, format->which); 95589aef879SDaniel Scally 95689aef879SDaniel Scally /* 95789aef879SDaniel Scally * Align to two to simplify the binning calculations below, and clamp 95889aef879SDaniel Scally * the requested format at the crop rectangle 95989aef879SDaniel Scally */ 96089aef879SDaniel Scally width = clamp_t(unsigned int, ALIGN(format->format.width, 2), 96189aef879SDaniel Scally OV5693_MIN_CROP_WIDTH, crop->width); 96289aef879SDaniel Scally height = clamp_t(unsigned int, ALIGN(format->format.height, 2), 96389aef879SDaniel Scally OV5693_MIN_CROP_HEIGHT, crop->height); 96489aef879SDaniel Scally 96589aef879SDaniel Scally /* 96689aef879SDaniel Scally * We can only support setting either the dimensions of the crop rect 96789aef879SDaniel Scally * or those dimensions binned (separately) by a factor of two. 96889aef879SDaniel Scally */ 96989aef879SDaniel Scally hratio = clamp_t(unsigned int, 97089aef879SDaniel Scally DIV_ROUND_CLOSEST(crop->width, width), 1, 2); 97189aef879SDaniel Scally vratio = clamp_t(unsigned int, 97289aef879SDaniel Scally DIV_ROUND_CLOSEST(crop->height, height), 1, 2); 97389aef879SDaniel Scally 97489aef879SDaniel Scally fmt = __ov5693_get_pad_format(ov5693, state, format->pad, 97589aef879SDaniel Scally format->which); 97689aef879SDaniel Scally 97789aef879SDaniel Scally fmt->width = crop->width / hratio; 97889aef879SDaniel Scally fmt->height = crop->height / vratio; 97989aef879SDaniel Scally fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; 98089aef879SDaniel Scally 98189aef879SDaniel Scally format->format = *fmt; 98289aef879SDaniel Scally 98389aef879SDaniel Scally if (format->which == V4L2_SUBDEV_FORMAT_TRY) 9841949c01eSkernel test robot return 0; 98589aef879SDaniel Scally 98689aef879SDaniel Scally mutex_lock(&ov5693->lock); 98789aef879SDaniel Scally 9882a7f8142Skernel test robot ov5693->mode.binning_x = hratio > 1; 98989aef879SDaniel Scally ov5693->mode.inc_x_odd = hratio > 1 ? 3 : 1; 9902a7f8142Skernel test robot ov5693->mode.binning_y = vratio > 1; 99189aef879SDaniel Scally ov5693->mode.inc_y_odd = vratio > 1 ? 3 : 1; 99289aef879SDaniel Scally 99389aef879SDaniel Scally ov5693->mode.vts = __ov5693_calc_vts(fmt->height); 99489aef879SDaniel Scally 99589aef879SDaniel Scally __v4l2_ctrl_modify_range(ov5693->ctrls.vblank, 99689aef879SDaniel Scally OV5693_TIMING_MIN_VTS, 99789aef879SDaniel Scally OV5693_TIMING_MAX_VTS - fmt->height, 99889aef879SDaniel Scally 1, ov5693->mode.vts - fmt->height); 99989aef879SDaniel Scally __v4l2_ctrl_s_ctrl(ov5693->ctrls.vblank, 100089aef879SDaniel Scally ov5693->mode.vts - fmt->height); 100189aef879SDaniel Scally 100289aef879SDaniel Scally hblank = OV5693_FIXED_PPL - fmt->width; 100389aef879SDaniel Scally __v4l2_ctrl_modify_range(ov5693->ctrls.hblank, hblank, hblank, 1, 100489aef879SDaniel Scally hblank); 100589aef879SDaniel Scally 100689aef879SDaniel Scally exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN; 100789aef879SDaniel Scally __v4l2_ctrl_modify_range(ov5693->ctrls.exposure, 100889aef879SDaniel Scally ov5693->ctrls.exposure->minimum, exposure_max, 100989aef879SDaniel Scally ov5693->ctrls.exposure->step, 101089aef879SDaniel Scally min(ov5693->ctrls.exposure->val, 101189aef879SDaniel Scally exposure_max)); 101289aef879SDaniel Scally 101389aef879SDaniel Scally mutex_unlock(&ov5693->lock); 10141949c01eSkernel test robot return 0; 101589aef879SDaniel Scally } 101689aef879SDaniel Scally 101789aef879SDaniel Scally static int ov5693_get_selection(struct v4l2_subdev *sd, 101889aef879SDaniel Scally struct v4l2_subdev_state *state, 101989aef879SDaniel Scally struct v4l2_subdev_selection *sel) 102089aef879SDaniel Scally { 102189aef879SDaniel Scally struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 102289aef879SDaniel Scally 102389aef879SDaniel Scally switch (sel->target) { 102489aef879SDaniel Scally case V4L2_SEL_TGT_CROP: 102589aef879SDaniel Scally mutex_lock(&ov5693->lock); 102689aef879SDaniel Scally sel->r = *__ov5693_get_pad_crop(ov5693, state, sel->pad, 102789aef879SDaniel Scally sel->which); 102889aef879SDaniel Scally mutex_unlock(&ov5693->lock); 102989aef879SDaniel Scally break; 103089aef879SDaniel Scally case V4L2_SEL_TGT_NATIVE_SIZE: 103189aef879SDaniel Scally sel->r.top = 0; 103289aef879SDaniel Scally sel->r.left = 0; 103389aef879SDaniel Scally sel->r.width = OV5693_NATIVE_WIDTH; 103489aef879SDaniel Scally sel->r.height = OV5693_NATIVE_HEIGHT; 103589aef879SDaniel Scally break; 103689aef879SDaniel Scally case V4L2_SEL_TGT_CROP_BOUNDS: 103789aef879SDaniel Scally case V4L2_SEL_TGT_CROP_DEFAULT: 103889aef879SDaniel Scally sel->r.top = OV5693_ACTIVE_START_TOP; 103989aef879SDaniel Scally sel->r.left = OV5693_ACTIVE_START_LEFT; 104089aef879SDaniel Scally sel->r.width = OV5693_ACTIVE_WIDTH; 104189aef879SDaniel Scally sel->r.height = OV5693_ACTIVE_HEIGHT; 104289aef879SDaniel Scally break; 104389aef879SDaniel Scally default: 104489aef879SDaniel Scally return -EINVAL; 104589aef879SDaniel Scally } 104689aef879SDaniel Scally 104789aef879SDaniel Scally return 0; 104889aef879SDaniel Scally } 104989aef879SDaniel Scally 105089aef879SDaniel Scally static int ov5693_set_selection(struct v4l2_subdev *sd, 105189aef879SDaniel Scally struct v4l2_subdev_state *state, 105289aef879SDaniel Scally struct v4l2_subdev_selection *sel) 105389aef879SDaniel Scally { 105489aef879SDaniel Scally struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 105589aef879SDaniel Scally struct v4l2_mbus_framefmt *format; 105689aef879SDaniel Scally struct v4l2_rect *__crop; 105789aef879SDaniel Scally struct v4l2_rect rect; 105889aef879SDaniel Scally 105989aef879SDaniel Scally if (sel->target != V4L2_SEL_TGT_CROP) 106089aef879SDaniel Scally return -EINVAL; 106189aef879SDaniel Scally 106289aef879SDaniel Scally /* 106389aef879SDaniel Scally * Clamp the boundaries of the crop rectangle to the size of the sensor 106489aef879SDaniel Scally * pixel array. Align to multiples of 2 to ensure Bayer pattern isn't 106589aef879SDaniel Scally * disrupted. 106689aef879SDaniel Scally */ 106789aef879SDaniel Scally rect.left = clamp(ALIGN(sel->r.left, 2), OV5693_NATIVE_START_LEFT, 106889aef879SDaniel Scally OV5693_NATIVE_WIDTH); 106989aef879SDaniel Scally rect.top = clamp(ALIGN(sel->r.top, 2), OV5693_NATIVE_START_TOP, 107089aef879SDaniel Scally OV5693_NATIVE_HEIGHT); 107189aef879SDaniel Scally rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 2), 107289aef879SDaniel Scally OV5693_MIN_CROP_WIDTH, OV5693_NATIVE_WIDTH); 107389aef879SDaniel Scally rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 2), 107489aef879SDaniel Scally OV5693_MIN_CROP_HEIGHT, OV5693_NATIVE_HEIGHT); 107589aef879SDaniel Scally 107689aef879SDaniel Scally /* Make sure the crop rectangle isn't outside the bounds of the array */ 107789aef879SDaniel Scally rect.width = min_t(unsigned int, rect.width, 107889aef879SDaniel Scally OV5693_NATIVE_WIDTH - rect.left); 107989aef879SDaniel Scally rect.height = min_t(unsigned int, rect.height, 108089aef879SDaniel Scally OV5693_NATIVE_HEIGHT - rect.top); 108189aef879SDaniel Scally 108289aef879SDaniel Scally __crop = __ov5693_get_pad_crop(ov5693, state, sel->pad, sel->which); 108389aef879SDaniel Scally 108489aef879SDaniel Scally if (rect.width != __crop->width || rect.height != __crop->height) { 108589aef879SDaniel Scally /* 108689aef879SDaniel Scally * Reset the output image size if the crop rectangle size has 108789aef879SDaniel Scally * been modified. 108889aef879SDaniel Scally */ 108989aef879SDaniel Scally format = __ov5693_get_pad_format(ov5693, state, sel->pad, 109089aef879SDaniel Scally sel->which); 109189aef879SDaniel Scally format->width = rect.width; 109289aef879SDaniel Scally format->height = rect.height; 109389aef879SDaniel Scally } 109489aef879SDaniel Scally 109589aef879SDaniel Scally *__crop = rect; 109689aef879SDaniel Scally sel->r = rect; 109789aef879SDaniel Scally 109889aef879SDaniel Scally return 0; 109989aef879SDaniel Scally } 110089aef879SDaniel Scally 110189aef879SDaniel Scally static int ov5693_s_stream(struct v4l2_subdev *sd, int enable) 110289aef879SDaniel Scally { 110389aef879SDaniel Scally struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 110489aef879SDaniel Scally int ret; 110589aef879SDaniel Scally 110689aef879SDaniel Scally if (enable) { 110789aef879SDaniel Scally ret = pm_runtime_get_sync(ov5693->dev); 110889aef879SDaniel Scally if (ret < 0) 110989aef879SDaniel Scally goto err_power_down; 111089aef879SDaniel Scally 111189aef879SDaniel Scally mutex_lock(&ov5693->lock); 111289aef879SDaniel Scally ret = __v4l2_ctrl_handler_setup(&ov5693->ctrls.handler); 111389aef879SDaniel Scally if (ret) { 111489aef879SDaniel Scally mutex_unlock(&ov5693->lock); 111589aef879SDaniel Scally goto err_power_down; 111689aef879SDaniel Scally } 111789aef879SDaniel Scally 111889aef879SDaniel Scally ret = ov5693_enable_streaming(ov5693, true); 111989aef879SDaniel Scally mutex_unlock(&ov5693->lock); 112089aef879SDaniel Scally } else { 112189aef879SDaniel Scally mutex_lock(&ov5693->lock); 112289aef879SDaniel Scally ret = ov5693_enable_streaming(ov5693, false); 112389aef879SDaniel Scally mutex_unlock(&ov5693->lock); 112489aef879SDaniel Scally } 112589aef879SDaniel Scally if (ret) 112689aef879SDaniel Scally goto err_power_down; 112789aef879SDaniel Scally 112889aef879SDaniel Scally ov5693->streaming = !!enable; 112989aef879SDaniel Scally 113089aef879SDaniel Scally if (!enable) 113189aef879SDaniel Scally pm_runtime_put(ov5693->dev); 113289aef879SDaniel Scally 113389aef879SDaniel Scally return 0; 113489aef879SDaniel Scally err_power_down: 113589aef879SDaniel Scally pm_runtime_put_noidle(ov5693->dev); 113689aef879SDaniel Scally return ret; 113789aef879SDaniel Scally } 113889aef879SDaniel Scally 113989aef879SDaniel Scally static int ov5693_g_frame_interval(struct v4l2_subdev *sd, 114089aef879SDaniel Scally struct v4l2_subdev_frame_interval *interval) 114189aef879SDaniel Scally { 114289aef879SDaniel Scally struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 114389aef879SDaniel Scally unsigned int framesize = OV5693_FIXED_PPL * (ov5693->mode.format.height + 114489aef879SDaniel Scally ov5693->ctrls.vblank->val); 114589aef879SDaniel Scally unsigned int fps = DIV_ROUND_CLOSEST(OV5693_PIXEL_RATE, framesize); 114689aef879SDaniel Scally 114789aef879SDaniel Scally interval->interval.numerator = 1; 114889aef879SDaniel Scally interval->interval.denominator = fps; 114989aef879SDaniel Scally 115089aef879SDaniel Scally return 0; 115189aef879SDaniel Scally } 115289aef879SDaniel Scally 115389aef879SDaniel Scally static int ov5693_enum_mbus_code(struct v4l2_subdev *sd, 115489aef879SDaniel Scally struct v4l2_subdev_state *state, 115589aef879SDaniel Scally struct v4l2_subdev_mbus_code_enum *code) 115689aef879SDaniel Scally { 115789aef879SDaniel Scally /* Only a single mbus format is supported */ 115889aef879SDaniel Scally if (code->index > 0) 115989aef879SDaniel Scally return -EINVAL; 116089aef879SDaniel Scally 116189aef879SDaniel Scally code->code = MEDIA_BUS_FMT_SBGGR10_1X10; 116289aef879SDaniel Scally return 0; 116389aef879SDaniel Scally } 116489aef879SDaniel Scally 116589aef879SDaniel Scally static int ov5693_enum_frame_size(struct v4l2_subdev *sd, 116689aef879SDaniel Scally struct v4l2_subdev_state *state, 116789aef879SDaniel Scally struct v4l2_subdev_frame_size_enum *fse) 116889aef879SDaniel Scally { 116989aef879SDaniel Scally struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 117089aef879SDaniel Scally struct v4l2_rect *__crop; 117189aef879SDaniel Scally 117289aef879SDaniel Scally if (fse->index > 1 || fse->code != MEDIA_BUS_FMT_SBGGR10_1X10) 117389aef879SDaniel Scally return -EINVAL; 117489aef879SDaniel Scally 117589aef879SDaniel Scally __crop = __ov5693_get_pad_crop(ov5693, state, fse->pad, fse->which); 117689aef879SDaniel Scally if (!__crop) 117789aef879SDaniel Scally return -EINVAL; 117889aef879SDaniel Scally 117989aef879SDaniel Scally fse->min_width = __crop->width / (fse->index + 1); 118089aef879SDaniel Scally fse->min_height = __crop->height / (fse->index + 1); 118189aef879SDaniel Scally fse->max_width = fse->min_width; 118289aef879SDaniel Scally fse->max_height = fse->min_height; 118389aef879SDaniel Scally 118489aef879SDaniel Scally return 0; 118589aef879SDaniel Scally } 118689aef879SDaniel Scally 118789aef879SDaniel Scally static const struct v4l2_subdev_video_ops ov5693_video_ops = { 118889aef879SDaniel Scally .s_stream = ov5693_s_stream, 118989aef879SDaniel Scally .g_frame_interval = ov5693_g_frame_interval, 119089aef879SDaniel Scally }; 119189aef879SDaniel Scally 119289aef879SDaniel Scally static const struct v4l2_subdev_pad_ops ov5693_pad_ops = { 119389aef879SDaniel Scally .enum_mbus_code = ov5693_enum_mbus_code, 119489aef879SDaniel Scally .enum_frame_size = ov5693_enum_frame_size, 119589aef879SDaniel Scally .get_fmt = ov5693_get_fmt, 119689aef879SDaniel Scally .set_fmt = ov5693_set_fmt, 119789aef879SDaniel Scally .get_selection = ov5693_get_selection, 119889aef879SDaniel Scally .set_selection = ov5693_set_selection, 119989aef879SDaniel Scally }; 120089aef879SDaniel Scally 120189aef879SDaniel Scally static const struct v4l2_subdev_ops ov5693_ops = { 120289aef879SDaniel Scally .video = &ov5693_video_ops, 120389aef879SDaniel Scally .pad = &ov5693_pad_ops, 120489aef879SDaniel Scally }; 120589aef879SDaniel Scally 120689aef879SDaniel Scally /* Sensor and Driver Configuration Functions */ 120789aef879SDaniel Scally 120889aef879SDaniel Scally static int ov5693_init_controls(struct ov5693_device *ov5693) 120989aef879SDaniel Scally { 121089aef879SDaniel Scally const struct v4l2_ctrl_ops *ops = &ov5693_ctrl_ops; 121189aef879SDaniel Scally struct ov5693_v4l2_ctrls *ctrls = &ov5693->ctrls; 121289aef879SDaniel Scally struct v4l2_fwnode_device_properties props; 121389aef879SDaniel Scally int vblank_max, vblank_def; 121489aef879SDaniel Scally int exposure_max; 121589aef879SDaniel Scally int hblank; 121689aef879SDaniel Scally int ret; 121789aef879SDaniel Scally 121889aef879SDaniel Scally ret = v4l2_ctrl_handler_init(&ctrls->handler, 12); 121989aef879SDaniel Scally if (ret) 122089aef879SDaniel Scally return ret; 122189aef879SDaniel Scally 122289aef879SDaniel Scally /* link freq */ 122389aef879SDaniel Scally ctrls->link_freq = v4l2_ctrl_new_int_menu(&ctrls->handler, 122489aef879SDaniel Scally NULL, V4L2_CID_LINK_FREQ, 122589aef879SDaniel Scally 0, 0, link_freq_menu_items); 122689aef879SDaniel Scally if (ctrls->link_freq) 122789aef879SDaniel Scally ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; 122889aef879SDaniel Scally 122989aef879SDaniel Scally /* pixel rate */ 123089aef879SDaniel Scally ctrls->pixel_rate = v4l2_ctrl_new_std(&ctrls->handler, NULL, 123189aef879SDaniel Scally V4L2_CID_PIXEL_RATE, 0, 123289aef879SDaniel Scally OV5693_PIXEL_RATE, 1, 123389aef879SDaniel Scally OV5693_PIXEL_RATE); 123489aef879SDaniel Scally 123589aef879SDaniel Scally /* Exposure */ 123689aef879SDaniel Scally exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN; 123789aef879SDaniel Scally ctrls->exposure = v4l2_ctrl_new_std(&ctrls->handler, ops, 123889aef879SDaniel Scally V4L2_CID_EXPOSURE, 123989aef879SDaniel Scally OV5693_EXPOSURE_MIN, exposure_max, 124089aef879SDaniel Scally OV5693_EXPOSURE_STEP, exposure_max); 124189aef879SDaniel Scally 124289aef879SDaniel Scally /* Gain */ 124389aef879SDaniel Scally ctrls->analogue_gain = v4l2_ctrl_new_std(&ctrls->handler, 124489aef879SDaniel Scally ops, V4L2_CID_ANALOGUE_GAIN, 124589aef879SDaniel Scally OV5693_GAIN_MIN, 124689aef879SDaniel Scally OV5693_GAIN_MAX, 124789aef879SDaniel Scally OV5693_GAIN_STEP, 124889aef879SDaniel Scally OV5693_GAIN_DEF); 124989aef879SDaniel Scally 125089aef879SDaniel Scally ctrls->digital_gain = v4l2_ctrl_new_std(&ctrls->handler, ops, 125189aef879SDaniel Scally V4L2_CID_DIGITAL_GAIN, 125289aef879SDaniel Scally OV5693_DIGITAL_GAIN_MIN, 125389aef879SDaniel Scally OV5693_DIGITAL_GAIN_MAX, 125489aef879SDaniel Scally OV5693_DIGITAL_GAIN_STEP, 125589aef879SDaniel Scally OV5693_DIGITAL_GAIN_DEF); 125689aef879SDaniel Scally 125789aef879SDaniel Scally /* Flip */ 125889aef879SDaniel Scally ctrls->hflip = v4l2_ctrl_new_std(&ctrls->handler, ops, 125989aef879SDaniel Scally V4L2_CID_HFLIP, 0, 1, 1, 0); 126089aef879SDaniel Scally 126189aef879SDaniel Scally ctrls->vflip = v4l2_ctrl_new_std(&ctrls->handler, ops, 126289aef879SDaniel Scally V4L2_CID_VFLIP, 0, 1, 1, 0); 126389aef879SDaniel Scally 126489aef879SDaniel Scally hblank = OV5693_FIXED_PPL - ov5693->mode.format.width; 126589aef879SDaniel Scally ctrls->hblank = v4l2_ctrl_new_std(&ctrls->handler, ops, 126689aef879SDaniel Scally V4L2_CID_HBLANK, hblank, 126789aef879SDaniel Scally hblank, 1, hblank); 126889aef879SDaniel Scally 126989aef879SDaniel Scally if (ctrls->hblank) 127089aef879SDaniel Scally ctrls->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; 127189aef879SDaniel Scally 127289aef879SDaniel Scally vblank_max = OV5693_TIMING_MAX_VTS - ov5693->mode.format.height; 127389aef879SDaniel Scally vblank_def = ov5693->mode.vts - ov5693->mode.format.height; 127489aef879SDaniel Scally ctrls->vblank = v4l2_ctrl_new_std(&ctrls->handler, ops, 127589aef879SDaniel Scally V4L2_CID_VBLANK, 127689aef879SDaniel Scally OV5693_TIMING_MIN_VTS, 127789aef879SDaniel Scally vblank_max, 1, vblank_def); 127889aef879SDaniel Scally 127989aef879SDaniel Scally ctrls->test_pattern = v4l2_ctrl_new_std_menu_items( 128089aef879SDaniel Scally &ctrls->handler, ops, 128189aef879SDaniel Scally V4L2_CID_TEST_PATTERN, 128289aef879SDaniel Scally ARRAY_SIZE(ov5693_test_pattern_menu) - 1, 128389aef879SDaniel Scally 0, 0, ov5693_test_pattern_menu); 128489aef879SDaniel Scally 128589aef879SDaniel Scally if (ctrls->handler.error) { 128689aef879SDaniel Scally dev_err(ov5693->dev, "Error initialising v4l2 ctrls\n"); 128789aef879SDaniel Scally ret = ctrls->handler.error; 128889aef879SDaniel Scally goto err_free_handler; 128989aef879SDaniel Scally } 129089aef879SDaniel Scally 129189aef879SDaniel Scally /* set properties from fwnode (e.g. rotation, orientation) */ 129289aef879SDaniel Scally ret = v4l2_fwnode_device_parse(ov5693->dev, &props); 129389aef879SDaniel Scally if (ret) 129489aef879SDaniel Scally goto err_free_handler; 129589aef879SDaniel Scally 129689aef879SDaniel Scally ret = v4l2_ctrl_new_fwnode_properties(&ctrls->handler, ops, 129789aef879SDaniel Scally &props); 129889aef879SDaniel Scally if (ret) 129989aef879SDaniel Scally goto err_free_handler; 130089aef879SDaniel Scally 130189aef879SDaniel Scally /* Use same lock for controls as for everything else. */ 130289aef879SDaniel Scally ctrls->handler.lock = &ov5693->lock; 130389aef879SDaniel Scally ov5693->sd.ctrl_handler = &ctrls->handler; 130489aef879SDaniel Scally 130589aef879SDaniel Scally return 0; 130689aef879SDaniel Scally 130789aef879SDaniel Scally err_free_handler: 130889aef879SDaniel Scally v4l2_ctrl_handler_free(&ctrls->handler); 130989aef879SDaniel Scally return ret; 131089aef879SDaniel Scally } 131189aef879SDaniel Scally 131289aef879SDaniel Scally static int ov5693_configure_gpios(struct ov5693_device *ov5693) 131389aef879SDaniel Scally { 131489aef879SDaniel Scally ov5693->reset = devm_gpiod_get_optional(ov5693->dev, "reset", 131589aef879SDaniel Scally GPIOD_OUT_HIGH); 131689aef879SDaniel Scally if (IS_ERR(ov5693->reset)) { 131789aef879SDaniel Scally dev_err(ov5693->dev, "Error fetching reset GPIO\n"); 131889aef879SDaniel Scally return PTR_ERR(ov5693->reset); 131989aef879SDaniel Scally } 132089aef879SDaniel Scally 132189aef879SDaniel Scally ov5693->powerdown = devm_gpiod_get_optional(ov5693->dev, "powerdown", 132289aef879SDaniel Scally GPIOD_OUT_HIGH); 132389aef879SDaniel Scally if (IS_ERR(ov5693->powerdown)) { 132489aef879SDaniel Scally dev_err(ov5693->dev, "Error fetching powerdown GPIO\n"); 132589aef879SDaniel Scally return PTR_ERR(ov5693->powerdown); 132689aef879SDaniel Scally } 132789aef879SDaniel Scally 132889aef879SDaniel Scally return 0; 132989aef879SDaniel Scally } 133089aef879SDaniel Scally 133189aef879SDaniel Scally static int ov5693_get_regulators(struct ov5693_device *ov5693) 133289aef879SDaniel Scally { 133389aef879SDaniel Scally unsigned int i; 133489aef879SDaniel Scally 133589aef879SDaniel Scally for (i = 0; i < OV5693_NUM_SUPPLIES; i++) 133689aef879SDaniel Scally ov5693->supplies[i].supply = ov5693_supply_names[i]; 133789aef879SDaniel Scally 133889aef879SDaniel Scally return devm_regulator_bulk_get(ov5693->dev, OV5693_NUM_SUPPLIES, 133989aef879SDaniel Scally ov5693->supplies); 134089aef879SDaniel Scally } 134189aef879SDaniel Scally 134289aef879SDaniel Scally static int ov5693_check_hwcfg(struct ov5693_device *ov5693) 134389aef879SDaniel Scally { 134489aef879SDaniel Scally struct fwnode_handle *fwnode = dev_fwnode(ov5693->dev); 134589aef879SDaniel Scally struct v4l2_fwnode_endpoint bus_cfg = { 134689aef879SDaniel Scally .bus_type = V4L2_MBUS_CSI2_DPHY, 134789aef879SDaniel Scally }; 134889aef879SDaniel Scally struct fwnode_handle *endpoint; 134989aef879SDaniel Scally unsigned int i; 135089aef879SDaniel Scally int ret; 135189aef879SDaniel Scally 135289aef879SDaniel Scally endpoint = fwnode_graph_get_next_endpoint(fwnode, NULL); 135389aef879SDaniel Scally if (!endpoint) 135489aef879SDaniel Scally return -EPROBE_DEFER; /* Could be provided by cio2-bridge */ 135589aef879SDaniel Scally 135689aef879SDaniel Scally ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &bus_cfg); 135789aef879SDaniel Scally fwnode_handle_put(endpoint); 135889aef879SDaniel Scally if (ret) 135989aef879SDaniel Scally return ret; 136089aef879SDaniel Scally 136189aef879SDaniel Scally if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2) { 136289aef879SDaniel Scally dev_err(ov5693->dev, "only a 2-lane CSI2 config is supported"); 136389aef879SDaniel Scally ret = -EINVAL; 136489aef879SDaniel Scally goto out_free_bus_cfg; 136589aef879SDaniel Scally } 136689aef879SDaniel Scally 136789aef879SDaniel Scally if (!bus_cfg.nr_of_link_frequencies) { 136889aef879SDaniel Scally dev_err(ov5693->dev, "no link frequencies defined\n"); 136989aef879SDaniel Scally ret = -EINVAL; 137089aef879SDaniel Scally goto out_free_bus_cfg; 137189aef879SDaniel Scally } 137289aef879SDaniel Scally 137389aef879SDaniel Scally for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++) 137489aef879SDaniel Scally if (bus_cfg.link_frequencies[i] == OV5693_LINK_FREQ_419_2MHZ) 137589aef879SDaniel Scally break; 137689aef879SDaniel Scally 137789aef879SDaniel Scally if (i == bus_cfg.nr_of_link_frequencies) { 137889aef879SDaniel Scally dev_err(ov5693->dev, "supported link freq %ull not found\n", 137989aef879SDaniel Scally OV5693_LINK_FREQ_419_2MHZ); 138089aef879SDaniel Scally ret = -EINVAL; 138189aef879SDaniel Scally goto out_free_bus_cfg; 138289aef879SDaniel Scally } 138389aef879SDaniel Scally 138489aef879SDaniel Scally out_free_bus_cfg: 138589aef879SDaniel Scally v4l2_fwnode_endpoint_free(&bus_cfg); 138689aef879SDaniel Scally 138789aef879SDaniel Scally return ret; 138889aef879SDaniel Scally } 138989aef879SDaniel Scally 139089aef879SDaniel Scally static int ov5693_probe(struct i2c_client *client) 139189aef879SDaniel Scally { 139289aef879SDaniel Scally struct ov5693_device *ov5693; 13938a47d09eSTommaso Merciai u32 xvclk_rate; 139489aef879SDaniel Scally int ret = 0; 139589aef879SDaniel Scally 139689aef879SDaniel Scally ov5693 = devm_kzalloc(&client->dev, sizeof(*ov5693), GFP_KERNEL); 139789aef879SDaniel Scally if (!ov5693) 139889aef879SDaniel Scally return -ENOMEM; 139989aef879SDaniel Scally 140089aef879SDaniel Scally ov5693->client = client; 140189aef879SDaniel Scally ov5693->dev = &client->dev; 140289aef879SDaniel Scally 140389aef879SDaniel Scally ret = ov5693_check_hwcfg(ov5693); 140489aef879SDaniel Scally if (ret) 140589aef879SDaniel Scally return ret; 140689aef879SDaniel Scally 140789aef879SDaniel Scally mutex_init(&ov5693->lock); 140889aef879SDaniel Scally 140989aef879SDaniel Scally v4l2_i2c_subdev_init(&ov5693->sd, client, &ov5693_ops); 141089aef879SDaniel Scally 1411*88b0c212STommaso Merciai ov5693->xvclk = devm_clk_get_optional(&client->dev, "xvclk"); 1412*88b0c212STommaso Merciai if (IS_ERR(ov5693->xvclk)) 1413*88b0c212STommaso Merciai return dev_err_probe(&client->dev, PTR_ERR(ov5693->xvclk), 1414*88b0c212STommaso Merciai "failed to get xvclk: %ld\n", 1415*88b0c212STommaso Merciai PTR_ERR(ov5693->xvclk)); 1416*88b0c212STommaso Merciai 1417*88b0c212STommaso Merciai if (ov5693->xvclk) { 1418*88b0c212STommaso Merciai xvclk_rate = clk_get_rate(ov5693->xvclk); 1419*88b0c212STommaso Merciai } else { 1420*88b0c212STommaso Merciai ret = fwnode_property_read_u32(dev_fwnode(&client->dev), 1421*88b0c212STommaso Merciai "clock-frequency", 1422*88b0c212STommaso Merciai &xvclk_rate); 1423*88b0c212STommaso Merciai 1424*88b0c212STommaso Merciai if (ret) { 1425*88b0c212STommaso Merciai dev_err(&client->dev, "can't get clock frequency"); 1426*88b0c212STommaso Merciai return ret; 1427*88b0c212STommaso Merciai } 142889aef879SDaniel Scally } 142989aef879SDaniel Scally 14308a47d09eSTommaso Merciai if (xvclk_rate != OV5693_XVCLK_FREQ) 143189aef879SDaniel Scally dev_warn(&client->dev, "Found clk freq %u, expected %u\n", 14328a47d09eSTommaso Merciai xvclk_rate, OV5693_XVCLK_FREQ); 143389aef879SDaniel Scally 143489aef879SDaniel Scally ret = ov5693_configure_gpios(ov5693); 143589aef879SDaniel Scally if (ret) 143689aef879SDaniel Scally return ret; 143789aef879SDaniel Scally 143889aef879SDaniel Scally ret = ov5693_get_regulators(ov5693); 143989aef879SDaniel Scally if (ret) 144089aef879SDaniel Scally return dev_err_probe(&client->dev, ret, 144189aef879SDaniel Scally "Error fetching regulators\n"); 144289aef879SDaniel Scally 144389aef879SDaniel Scally ov5693->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 144489aef879SDaniel Scally ov5693->pad.flags = MEDIA_PAD_FL_SOURCE; 144589aef879SDaniel Scally ov5693->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 144689aef879SDaniel Scally 144789aef879SDaniel Scally ov5693->mode.crop = ov5693_default_crop; 144889aef879SDaniel Scally ov5693->mode.format = ov5693_default_fmt; 144989aef879SDaniel Scally ov5693->mode.vts = __ov5693_calc_vts(ov5693->mode.format.height); 145089aef879SDaniel Scally 145189aef879SDaniel Scally ret = ov5693_init_controls(ov5693); 145289aef879SDaniel Scally if (ret) 145389aef879SDaniel Scally return ret; 145489aef879SDaniel Scally 145589aef879SDaniel Scally ret = media_entity_pads_init(&ov5693->sd.entity, 1, &ov5693->pad); 145689aef879SDaniel Scally if (ret) 145789aef879SDaniel Scally goto err_ctrl_handler_free; 145889aef879SDaniel Scally 145989aef879SDaniel Scally /* 146089aef879SDaniel Scally * We need the driver to work in the event that pm runtime is disable in 146189aef879SDaniel Scally * the kernel, so power up and verify the chip now. In the event that 146289aef879SDaniel Scally * runtime pm is disabled this will leave the chip on, so that streaming 146389aef879SDaniel Scally * will work. 146489aef879SDaniel Scally */ 146589aef879SDaniel Scally 146689aef879SDaniel Scally ret = ov5693_sensor_powerup(ov5693); 146789aef879SDaniel Scally if (ret) 146889aef879SDaniel Scally goto err_media_entity_cleanup; 146989aef879SDaniel Scally 147089aef879SDaniel Scally ret = ov5693_detect(ov5693); 147189aef879SDaniel Scally if (ret) 147289aef879SDaniel Scally goto err_powerdown; 147389aef879SDaniel Scally 147489aef879SDaniel Scally pm_runtime_set_active(&client->dev); 147589aef879SDaniel Scally pm_runtime_get_noresume(&client->dev); 147689aef879SDaniel Scally pm_runtime_enable(&client->dev); 147789aef879SDaniel Scally 147889aef879SDaniel Scally ret = v4l2_async_register_subdev_sensor(&ov5693->sd); 147989aef879SDaniel Scally if (ret) { 148089aef879SDaniel Scally dev_err(&client->dev, "failed to register V4L2 subdev: %d", 148189aef879SDaniel Scally ret); 148289aef879SDaniel Scally goto err_pm_runtime; 148389aef879SDaniel Scally } 148489aef879SDaniel Scally 148589aef879SDaniel Scally pm_runtime_set_autosuspend_delay(&client->dev, 1000); 148689aef879SDaniel Scally pm_runtime_use_autosuspend(&client->dev); 148789aef879SDaniel Scally pm_runtime_put_autosuspend(&client->dev); 148889aef879SDaniel Scally 148989aef879SDaniel Scally return ret; 149089aef879SDaniel Scally 149189aef879SDaniel Scally err_pm_runtime: 149289aef879SDaniel Scally pm_runtime_disable(&client->dev); 149389aef879SDaniel Scally pm_runtime_put_noidle(&client->dev); 149489aef879SDaniel Scally err_powerdown: 149589aef879SDaniel Scally ov5693_sensor_powerdown(ov5693); 149689aef879SDaniel Scally err_media_entity_cleanup: 149789aef879SDaniel Scally media_entity_cleanup(&ov5693->sd.entity); 149889aef879SDaniel Scally err_ctrl_handler_free: 149989aef879SDaniel Scally v4l2_ctrl_handler_free(&ov5693->ctrls.handler); 150089aef879SDaniel Scally 150189aef879SDaniel Scally return ret; 150289aef879SDaniel Scally } 150389aef879SDaniel Scally 150489aef879SDaniel Scally static int ov5693_remove(struct i2c_client *client) 150589aef879SDaniel Scally { 150689aef879SDaniel Scally struct v4l2_subdev *sd = i2c_get_clientdata(client); 150789aef879SDaniel Scally struct ov5693_device *ov5693 = to_ov5693_sensor(sd); 150889aef879SDaniel Scally 150989aef879SDaniel Scally v4l2_async_unregister_subdev(sd); 151089aef879SDaniel Scally media_entity_cleanup(&ov5693->sd.entity); 151189aef879SDaniel Scally v4l2_ctrl_handler_free(&ov5693->ctrls.handler); 151289aef879SDaniel Scally mutex_destroy(&ov5693->lock); 151389aef879SDaniel Scally 151489aef879SDaniel Scally /* 151589aef879SDaniel Scally * Disable runtime PM. In case runtime PM is disabled in the kernel, 151689aef879SDaniel Scally * make sure to turn power off manually. 151789aef879SDaniel Scally */ 151889aef879SDaniel Scally pm_runtime_disable(&client->dev); 151989aef879SDaniel Scally if (!pm_runtime_status_suspended(&client->dev)) 152089aef879SDaniel Scally ov5693_sensor_powerdown(ov5693); 152189aef879SDaniel Scally pm_runtime_set_suspended(&client->dev); 152289aef879SDaniel Scally 152389aef879SDaniel Scally return 0; 152489aef879SDaniel Scally } 152589aef879SDaniel Scally 152689aef879SDaniel Scally static const struct dev_pm_ops ov5693_pm_ops = { 152789aef879SDaniel Scally SET_RUNTIME_PM_OPS(ov5693_sensor_suspend, ov5693_sensor_resume, NULL) 152889aef879SDaniel Scally }; 152989aef879SDaniel Scally 153089aef879SDaniel Scally static const struct acpi_device_id ov5693_acpi_match[] = { 153189aef879SDaniel Scally {"INT33BE"}, 153289aef879SDaniel Scally {}, 153389aef879SDaniel Scally }; 153489aef879SDaniel Scally MODULE_DEVICE_TABLE(acpi, ov5693_acpi_match); 153589aef879SDaniel Scally 153689aef879SDaniel Scally static struct i2c_driver ov5693_driver = { 153789aef879SDaniel Scally .driver = { 153889aef879SDaniel Scally .name = "ov5693", 153989aef879SDaniel Scally .acpi_match_table = ov5693_acpi_match, 154089aef879SDaniel Scally .pm = &ov5693_pm_ops, 154189aef879SDaniel Scally }, 154289aef879SDaniel Scally .probe_new = ov5693_probe, 154389aef879SDaniel Scally .remove = ov5693_remove, 154489aef879SDaniel Scally }; 154589aef879SDaniel Scally module_i2c_driver(ov5693_driver); 154689aef879SDaniel Scally 154789aef879SDaniel Scally MODULE_DESCRIPTION("A low-level driver for OmniVision 5693 sensors"); 154889aef879SDaniel Scally MODULE_LICENSE("GPL"); 1549