1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (c) 2019 Intel Corporation. 3 4 #include <asm/unaligned.h> 5 #include <linux/acpi.h> 6 #include <linux/delay.h> 7 #include <linux/i2c.h> 8 #include <linux/module.h> 9 #include <linux/pm_runtime.h> 10 #include <media/v4l2-ctrls.h> 11 #include <media/v4l2-device.h> 12 #include <media/v4l2-fwnode.h> 13 14 #define OV5675_REG_VALUE_08BIT 1 15 #define OV5675_REG_VALUE_16BIT 2 16 #define OV5675_REG_VALUE_24BIT 3 17 18 #define OV5675_LINK_FREQ_450MHZ 450000000ULL 19 #define OV5675_SCLK 90000000LL 20 #define OV5675_MCLK 19200000 21 #define OV5675_DATA_LANES 2 22 #define OV5675_RGB_DEPTH 10 23 24 #define OV5675_REG_CHIP_ID 0x300a 25 #define OV5675_CHIP_ID 0x5675 26 27 #define OV5675_REG_MODE_SELECT 0x0100 28 #define OV5675_MODE_STANDBY 0x00 29 #define OV5675_MODE_STREAMING 0x01 30 31 /* vertical-timings from sensor */ 32 #define OV5675_REG_VTS 0x380e 33 #define OV5675_VTS_30FPS 0x07e4 34 #define OV5675_VTS_30FPS_MIN 0x07e4 35 #define OV5675_VTS_MAX 0x7fff 36 37 /* horizontal-timings from sensor */ 38 #define OV5675_REG_HTS 0x380c 39 40 /* Exposure controls from sensor */ 41 #define OV5675_REG_EXPOSURE 0x3500 42 #define OV5675_EXPOSURE_MIN 4 43 #define OV5675_EXPOSURE_MAX_MARGIN 4 44 #define OV5675_EXPOSURE_STEP 1 45 46 /* Analog gain controls from sensor */ 47 #define OV5675_REG_ANALOG_GAIN 0x3508 48 #define OV5675_ANAL_GAIN_MIN 128 49 #define OV5675_ANAL_GAIN_MAX 2047 50 #define OV5675_ANAL_GAIN_STEP 1 51 52 /* Digital gain controls from sensor */ 53 #define OV5675_REG_MWB_R_GAIN 0x5019 54 #define OV5675_REG_MWB_G_GAIN 0x501b 55 #define OV5675_REG_MWB_B_GAIN 0x501d 56 #define OV5675_DGTL_GAIN_MIN 0 57 #define OV5675_DGTL_GAIN_MAX 4095 58 #define OV5675_DGTL_GAIN_STEP 1 59 #define OV5675_DGTL_GAIN_DEFAULT 1024 60 61 /* Test Pattern Control */ 62 #define OV5675_REG_TEST_PATTERN 0x4503 63 #define OV5675_TEST_PATTERN_ENABLE BIT(7) 64 #define OV5675_TEST_PATTERN_BAR_SHIFT 2 65 66 /* Flip Mirror Controls from sensor */ 67 #define OV5675_REG_FORMAT1 0x3820 68 #define OV5675_REG_FORMAT2 0x373d 69 70 #define to_ov5675(_sd) container_of(_sd, struct ov5675, sd) 71 72 enum { 73 OV5675_LINK_FREQ_900MBPS, 74 }; 75 76 struct ov5675_reg { 77 u16 address; 78 u8 val; 79 }; 80 81 struct ov5675_reg_list { 82 u32 num_of_regs; 83 const struct ov5675_reg *regs; 84 }; 85 86 struct ov5675_link_freq_config { 87 const struct ov5675_reg_list reg_list; 88 }; 89 90 struct ov5675_mode { 91 /* Frame width in pixels */ 92 u32 width; 93 94 /* Frame height in pixels */ 95 u32 height; 96 97 /* Horizontal timining size */ 98 u32 hts; 99 100 /* Default vertical timining size */ 101 u32 vts_def; 102 103 /* Min vertical timining size */ 104 u32 vts_min; 105 106 /* Link frequency needed for this resolution */ 107 u32 link_freq_index; 108 109 /* Sensor register settings for this resolution */ 110 const struct ov5675_reg_list reg_list; 111 }; 112 113 static const struct ov5675_reg mipi_data_rate_900mbps[] = { 114 {0x0103, 0x01}, 115 {0x0100, 0x00}, 116 {0x0300, 0x04}, 117 {0x0302, 0x8d}, 118 {0x0303, 0x00}, 119 {0x030d, 0x26}, 120 }; 121 122 static const struct ov5675_reg mode_2592x1944_regs[] = { 123 {0x3002, 0x21}, 124 {0x3107, 0x23}, 125 {0x3501, 0x20}, 126 {0x3503, 0x0c}, 127 {0x3508, 0x03}, 128 {0x3509, 0x00}, 129 {0x3600, 0x66}, 130 {0x3602, 0x30}, 131 {0x3610, 0xa5}, 132 {0x3612, 0x93}, 133 {0x3620, 0x80}, 134 {0x3642, 0x0e}, 135 {0x3661, 0x00}, 136 {0x3662, 0x10}, 137 {0x3664, 0xf3}, 138 {0x3665, 0x9e}, 139 {0x3667, 0xa5}, 140 {0x366e, 0x55}, 141 {0x366f, 0x55}, 142 {0x3670, 0x11}, 143 {0x3671, 0x11}, 144 {0x3672, 0x11}, 145 {0x3673, 0x11}, 146 {0x3714, 0x24}, 147 {0x371a, 0x3e}, 148 {0x3733, 0x10}, 149 {0x3734, 0x00}, 150 {0x373d, 0x24}, 151 {0x3764, 0x20}, 152 {0x3765, 0x20}, 153 {0x3766, 0x12}, 154 {0x37a1, 0x14}, 155 {0x37a8, 0x1c}, 156 {0x37ab, 0x0f}, 157 {0x37c2, 0x04}, 158 {0x37cb, 0x00}, 159 {0x37cc, 0x00}, 160 {0x37cd, 0x00}, 161 {0x37ce, 0x00}, 162 {0x37d8, 0x02}, 163 {0x37d9, 0x08}, 164 {0x37dc, 0x04}, 165 {0x3800, 0x00}, 166 {0x3801, 0x00}, 167 {0x3802, 0x00}, 168 {0x3803, 0x04}, 169 {0x3804, 0x0a}, 170 {0x3805, 0x3f}, 171 {0x3806, 0x07}, 172 {0x3807, 0xb3}, 173 {0x3808, 0x0a}, 174 {0x3809, 0x20}, 175 {0x380a, 0x07}, 176 {0x380b, 0x98}, 177 {0x380c, 0x02}, 178 {0x380d, 0xee}, 179 {0x380e, 0x07}, 180 {0x380f, 0xe4}, 181 {0x3811, 0x10}, 182 {0x3813, 0x0d}, 183 {0x3814, 0x01}, 184 {0x3815, 0x01}, 185 {0x3816, 0x01}, 186 {0x3817, 0x01}, 187 {0x381e, 0x02}, 188 {0x3820, 0x88}, 189 {0x3821, 0x01}, 190 {0x3832, 0x04}, 191 {0x3c80, 0x01}, 192 {0x3c82, 0x00}, 193 {0x3c83, 0xc8}, 194 {0x3c8c, 0x0f}, 195 {0x3c8d, 0xa0}, 196 {0x3c90, 0x07}, 197 {0x3c91, 0x00}, 198 {0x3c92, 0x00}, 199 {0x3c93, 0x00}, 200 {0x3c94, 0xd0}, 201 {0x3c95, 0x50}, 202 {0x3c96, 0x35}, 203 {0x3c97, 0x00}, 204 {0x4001, 0xe0}, 205 {0x4008, 0x02}, 206 {0x4009, 0x0d}, 207 {0x400f, 0x80}, 208 {0x4013, 0x02}, 209 {0x4040, 0x00}, 210 {0x4041, 0x07}, 211 {0x404c, 0x50}, 212 {0x404e, 0x20}, 213 {0x4500, 0x06}, 214 {0x4503, 0x00}, 215 {0x450a, 0x04}, 216 {0x4809, 0x04}, 217 {0x480c, 0x12}, 218 {0x4819, 0x70}, 219 {0x4825, 0x32}, 220 {0x4826, 0x32}, 221 {0x482a, 0x06}, 222 {0x4833, 0x08}, 223 {0x4837, 0x0d}, 224 {0x5000, 0x77}, 225 {0x5b00, 0x01}, 226 {0x5b01, 0x10}, 227 {0x5b02, 0x01}, 228 {0x5b03, 0xdb}, 229 {0x5b05, 0x6c}, 230 {0x5e10, 0xfc}, 231 {0x3500, 0x00}, 232 {0x3501, 0x3E}, 233 {0x3502, 0x60}, 234 {0x3503, 0x08}, 235 {0x3508, 0x04}, 236 {0x3509, 0x00}, 237 {0x3832, 0x48}, 238 {0x5780, 0x3e}, 239 {0x5781, 0x0f}, 240 {0x5782, 0x44}, 241 {0x5783, 0x02}, 242 {0x5784, 0x01}, 243 {0x5785, 0x01}, 244 {0x5786, 0x00}, 245 {0x5787, 0x04}, 246 {0x5788, 0x02}, 247 {0x5789, 0x0f}, 248 {0x578a, 0xfd}, 249 {0x578b, 0xf5}, 250 {0x578c, 0xf5}, 251 {0x578d, 0x03}, 252 {0x578e, 0x08}, 253 {0x578f, 0x0c}, 254 {0x5790, 0x08}, 255 {0x5791, 0x06}, 256 {0x5792, 0x00}, 257 {0x5793, 0x52}, 258 {0x5794, 0xa3}, 259 {0x4003, 0x40}, 260 {0x3107, 0x01}, 261 {0x3c80, 0x08}, 262 {0x3c83, 0xb1}, 263 {0x3c8c, 0x10}, 264 {0x3c8d, 0x00}, 265 {0x3c90, 0x00}, 266 {0x3c94, 0x00}, 267 {0x3c95, 0x00}, 268 {0x3c96, 0x00}, 269 {0x37cb, 0x09}, 270 {0x37cc, 0x15}, 271 {0x37cd, 0x1f}, 272 {0x37ce, 0x1f}, 273 }; 274 275 static const struct ov5675_reg mode_1296x972_regs[] = { 276 {0x3002, 0x21}, 277 {0x3107, 0x23}, 278 {0x3501, 0x20}, 279 {0x3503, 0x0c}, 280 {0x3508, 0x03}, 281 {0x3509, 0x00}, 282 {0x3600, 0x66}, 283 {0x3602, 0x30}, 284 {0x3610, 0xa5}, 285 {0x3612, 0x93}, 286 {0x3620, 0x80}, 287 {0x3642, 0x0e}, 288 {0x3661, 0x00}, 289 {0x3662, 0x08}, 290 {0x3664, 0xf3}, 291 {0x3665, 0x9e}, 292 {0x3667, 0xa5}, 293 {0x366e, 0x55}, 294 {0x366f, 0x55}, 295 {0x3670, 0x11}, 296 {0x3671, 0x11}, 297 {0x3672, 0x11}, 298 {0x3673, 0x11}, 299 {0x3714, 0x28}, 300 {0x371a, 0x3e}, 301 {0x3733, 0x10}, 302 {0x3734, 0x00}, 303 {0x373d, 0x24}, 304 {0x3764, 0x20}, 305 {0x3765, 0x20}, 306 {0x3766, 0x12}, 307 {0x37a1, 0x14}, 308 {0x37a8, 0x1c}, 309 {0x37ab, 0x0f}, 310 {0x37c2, 0x14}, 311 {0x37cb, 0x00}, 312 {0x37cc, 0x00}, 313 {0x37cd, 0x00}, 314 {0x37ce, 0x00}, 315 {0x37d8, 0x02}, 316 {0x37d9, 0x04}, 317 {0x37dc, 0x04}, 318 {0x3800, 0x00}, 319 {0x3801, 0x00}, 320 {0x3802, 0x00}, 321 {0x3803, 0x00}, 322 {0x3804, 0x0a}, 323 {0x3805, 0x3f}, 324 {0x3806, 0x07}, 325 {0x3807, 0xb7}, 326 {0x3808, 0x05}, 327 {0x3809, 0x10}, 328 {0x380a, 0x03}, 329 {0x380b, 0xcc}, 330 {0x380c, 0x02}, 331 {0x380d, 0xee}, 332 {0x380e, 0x07}, 333 {0x380f, 0xd0}, 334 {0x3811, 0x08}, 335 {0x3813, 0x0d}, 336 {0x3814, 0x03}, 337 {0x3815, 0x01}, 338 {0x3816, 0x03}, 339 {0x3817, 0x01}, 340 {0x381e, 0x02}, 341 {0x3820, 0x8b}, 342 {0x3821, 0x01}, 343 {0x3832, 0x04}, 344 {0x3c80, 0x01}, 345 {0x3c82, 0x00}, 346 {0x3c83, 0xc8}, 347 {0x3c8c, 0x0f}, 348 {0x3c8d, 0xa0}, 349 {0x3c90, 0x07}, 350 {0x3c91, 0x00}, 351 {0x3c92, 0x00}, 352 {0x3c93, 0x00}, 353 {0x3c94, 0xd0}, 354 {0x3c95, 0x50}, 355 {0x3c96, 0x35}, 356 {0x3c97, 0x00}, 357 {0x4001, 0xe0}, 358 {0x4008, 0x00}, 359 {0x4009, 0x07}, 360 {0x400f, 0x80}, 361 {0x4013, 0x02}, 362 {0x4040, 0x00}, 363 {0x4041, 0x03}, 364 {0x404c, 0x50}, 365 {0x404e, 0x20}, 366 {0x4500, 0x06}, 367 {0x4503, 0x00}, 368 {0x450a, 0x04}, 369 {0x4809, 0x04}, 370 {0x480c, 0x12}, 371 {0x4819, 0x70}, 372 {0x4825, 0x32}, 373 {0x4826, 0x32}, 374 {0x482a, 0x06}, 375 {0x4833, 0x08}, 376 {0x4837, 0x0d}, 377 {0x5000, 0x77}, 378 {0x5b00, 0x01}, 379 {0x5b01, 0x10}, 380 {0x5b02, 0x01}, 381 {0x5b03, 0xdb}, 382 {0x5b05, 0x6c}, 383 {0x5e10, 0xfc}, 384 {0x3500, 0x00}, 385 {0x3501, 0x1F}, 386 {0x3502, 0x20}, 387 {0x3503, 0x08}, 388 {0x3508, 0x04}, 389 {0x3509, 0x00}, 390 {0x3832, 0x48}, 391 {0x5780, 0x3e}, 392 {0x5781, 0x0f}, 393 {0x5782, 0x44}, 394 {0x5783, 0x02}, 395 {0x5784, 0x01}, 396 {0x5785, 0x01}, 397 {0x5786, 0x00}, 398 {0x5787, 0x04}, 399 {0x5788, 0x02}, 400 {0x5789, 0x0f}, 401 {0x578a, 0xfd}, 402 {0x578b, 0xf5}, 403 {0x578c, 0xf5}, 404 {0x578d, 0x03}, 405 {0x578e, 0x08}, 406 {0x578f, 0x0c}, 407 {0x5790, 0x08}, 408 {0x5791, 0x06}, 409 {0x5792, 0x00}, 410 {0x5793, 0x52}, 411 {0x5794, 0xa3}, 412 {0x4003, 0x40}, 413 {0x3107, 0x01}, 414 {0x3c80, 0x08}, 415 {0x3c83, 0xb1}, 416 {0x3c8c, 0x10}, 417 {0x3c8d, 0x00}, 418 {0x3c90, 0x00}, 419 {0x3c94, 0x00}, 420 {0x3c95, 0x00}, 421 {0x3c96, 0x00}, 422 {0x37cb, 0x09}, 423 {0x37cc, 0x15}, 424 {0x37cd, 0x1f}, 425 {0x37ce, 0x1f}, 426 }; 427 428 static const char * const ov5675_test_pattern_menu[] = { 429 "Disabled", 430 "Standard Color Bar", 431 "Top-Bottom Darker Color Bar", 432 "Right-Left Darker Color Bar", 433 "Bottom-Top Darker Color Bar" 434 }; 435 436 static const s64 link_freq_menu_items[] = { 437 OV5675_LINK_FREQ_450MHZ, 438 }; 439 440 static const struct ov5675_link_freq_config link_freq_configs[] = { 441 [OV5675_LINK_FREQ_900MBPS] = { 442 .reg_list = { 443 .num_of_regs = ARRAY_SIZE(mipi_data_rate_900mbps), 444 .regs = mipi_data_rate_900mbps, 445 } 446 } 447 }; 448 449 static const struct ov5675_mode supported_modes[] = { 450 { 451 .width = 2592, 452 .height = 1944, 453 .hts = 1500, 454 .vts_def = OV5675_VTS_30FPS, 455 .vts_min = OV5675_VTS_30FPS_MIN, 456 .reg_list = { 457 .num_of_regs = ARRAY_SIZE(mode_2592x1944_regs), 458 .regs = mode_2592x1944_regs, 459 }, 460 .link_freq_index = OV5675_LINK_FREQ_900MBPS, 461 }, 462 { 463 .width = 1296, 464 .height = 972, 465 .hts = 1500, 466 .vts_def = OV5675_VTS_30FPS, 467 .vts_min = OV5675_VTS_30FPS_MIN, 468 .reg_list = { 469 .num_of_regs = ARRAY_SIZE(mode_1296x972_regs), 470 .regs = mode_1296x972_regs, 471 }, 472 .link_freq_index = OV5675_LINK_FREQ_900MBPS, 473 } 474 }; 475 476 struct ov5675 { 477 struct v4l2_subdev sd; 478 struct media_pad pad; 479 struct v4l2_ctrl_handler ctrl_handler; 480 481 /* V4L2 Controls */ 482 struct v4l2_ctrl *link_freq; 483 struct v4l2_ctrl *pixel_rate; 484 struct v4l2_ctrl *vblank; 485 struct v4l2_ctrl *hblank; 486 struct v4l2_ctrl *exposure; 487 488 /* Current mode */ 489 const struct ov5675_mode *cur_mode; 490 491 /* To serialize asynchronus callbacks */ 492 struct mutex mutex; 493 494 /* Streaming on/off */ 495 bool streaming; 496 497 /* True if the device has been identified */ 498 bool identified; 499 }; 500 501 static u64 to_pixel_rate(u32 f_index) 502 { 503 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV5675_DATA_LANES; 504 505 do_div(pixel_rate, OV5675_RGB_DEPTH); 506 507 return pixel_rate; 508 } 509 510 static u64 to_pixels_per_line(u32 hts, u32 f_index) 511 { 512 u64 ppl = hts * to_pixel_rate(f_index); 513 514 do_div(ppl, OV5675_SCLK); 515 516 return ppl; 517 } 518 519 static int ov5675_read_reg(struct ov5675 *ov5675, u16 reg, u16 len, u32 *val) 520 { 521 struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd); 522 struct i2c_msg msgs[2]; 523 u8 addr_buf[2]; 524 u8 data_buf[4] = {0}; 525 int ret; 526 527 if (len > 4) 528 return -EINVAL; 529 530 put_unaligned_be16(reg, addr_buf); 531 msgs[0].addr = client->addr; 532 msgs[0].flags = 0; 533 msgs[0].len = sizeof(addr_buf); 534 msgs[0].buf = addr_buf; 535 msgs[1].addr = client->addr; 536 msgs[1].flags = I2C_M_RD; 537 msgs[1].len = len; 538 msgs[1].buf = &data_buf[4 - len]; 539 540 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 541 if (ret != ARRAY_SIZE(msgs)) 542 return -EIO; 543 544 *val = get_unaligned_be32(data_buf); 545 546 return 0; 547 } 548 549 static int ov5675_write_reg(struct ov5675 *ov5675, u16 reg, u16 len, u32 val) 550 { 551 struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd); 552 u8 buf[6]; 553 554 if (len > 4) 555 return -EINVAL; 556 557 put_unaligned_be16(reg, buf); 558 put_unaligned_be32(val << 8 * (4 - len), buf + 2); 559 if (i2c_master_send(client, buf, len + 2) != len + 2) 560 return -EIO; 561 562 return 0; 563 } 564 565 static int ov5675_write_reg_list(struct ov5675 *ov5675, 566 const struct ov5675_reg_list *r_list) 567 { 568 struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd); 569 unsigned int i; 570 int ret; 571 572 for (i = 0; i < r_list->num_of_regs; i++) { 573 ret = ov5675_write_reg(ov5675, r_list->regs[i].address, 1, 574 r_list->regs[i].val); 575 if (ret) { 576 dev_err_ratelimited(&client->dev, 577 "failed to write reg 0x%4.4x. error = %d", 578 r_list->regs[i].address, ret); 579 return ret; 580 } 581 } 582 583 return 0; 584 } 585 586 static int ov5675_update_digital_gain(struct ov5675 *ov5675, u32 d_gain) 587 { 588 int ret; 589 590 ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_R_GAIN, 591 OV5675_REG_VALUE_16BIT, d_gain); 592 if (ret) 593 return ret; 594 595 ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_G_GAIN, 596 OV5675_REG_VALUE_16BIT, d_gain); 597 if (ret) 598 return ret; 599 600 return ov5675_write_reg(ov5675, OV5675_REG_MWB_B_GAIN, 601 OV5675_REG_VALUE_16BIT, d_gain); 602 } 603 604 static int ov5675_test_pattern(struct ov5675 *ov5675, u32 pattern) 605 { 606 if (pattern) 607 pattern = (pattern - 1) << OV5675_TEST_PATTERN_BAR_SHIFT | 608 OV5675_TEST_PATTERN_ENABLE; 609 610 return ov5675_write_reg(ov5675, OV5675_REG_TEST_PATTERN, 611 OV5675_REG_VALUE_08BIT, pattern); 612 } 613 614 /* 615 * OV5675 supports keeping the pixel order by mirror and flip function 616 * The Bayer order isn't affected by the flip controls 617 */ 618 static int ov5675_set_ctrl_hflip(struct ov5675 *ov5675, u32 ctrl_val) 619 { 620 int ret; 621 u32 val; 622 623 ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT1, 624 OV5675_REG_VALUE_08BIT, &val); 625 if (ret) 626 return ret; 627 628 return ov5675_write_reg(ov5675, OV5675_REG_FORMAT1, 629 OV5675_REG_VALUE_08BIT, 630 ctrl_val ? val & ~BIT(3) : val | BIT(3)); 631 } 632 633 static int ov5675_set_ctrl_vflip(struct ov5675 *ov5675, u8 ctrl_val) 634 { 635 int ret; 636 u32 val; 637 638 ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT1, 639 OV5675_REG_VALUE_08BIT, &val); 640 if (ret) 641 return ret; 642 643 ret = ov5675_write_reg(ov5675, OV5675_REG_FORMAT1, 644 OV5675_REG_VALUE_08BIT, 645 ctrl_val ? val | BIT(4) | BIT(5) : val & ~BIT(4) & ~BIT(5)); 646 647 if (ret) 648 return ret; 649 650 ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT2, 651 OV5675_REG_VALUE_08BIT, &val); 652 653 if (ret) 654 return ret; 655 656 return ov5675_write_reg(ov5675, OV5675_REG_FORMAT2, 657 OV5675_REG_VALUE_08BIT, 658 ctrl_val ? val | BIT(1) : val & ~BIT(1)); 659 } 660 661 static int ov5675_set_ctrl(struct v4l2_ctrl *ctrl) 662 { 663 struct ov5675 *ov5675 = container_of(ctrl->handler, 664 struct ov5675, ctrl_handler); 665 struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd); 666 s64 exposure_max; 667 int ret = 0; 668 669 /* Propagate change of current control to all related controls */ 670 if (ctrl->id == V4L2_CID_VBLANK) { 671 /* Update max exposure while meeting expected vblanking */ 672 exposure_max = ov5675->cur_mode->height + ctrl->val - 673 OV5675_EXPOSURE_MAX_MARGIN; 674 __v4l2_ctrl_modify_range(ov5675->exposure, 675 ov5675->exposure->minimum, 676 exposure_max, ov5675->exposure->step, 677 exposure_max); 678 } 679 680 /* V4L2 controls values will be applied only when power is already up */ 681 if (!pm_runtime_get_if_in_use(&client->dev)) 682 return 0; 683 684 switch (ctrl->id) { 685 case V4L2_CID_ANALOGUE_GAIN: 686 ret = ov5675_write_reg(ov5675, OV5675_REG_ANALOG_GAIN, 687 OV5675_REG_VALUE_16BIT, ctrl->val); 688 break; 689 690 case V4L2_CID_DIGITAL_GAIN: 691 ret = ov5675_update_digital_gain(ov5675, ctrl->val); 692 break; 693 694 case V4L2_CID_EXPOSURE: 695 /* 4 least significant bits of expsoure are fractional part 696 * val = val << 4 697 * for ov5675, the unit of exposure is differnt from other 698 * OmniVision sensors, its exposure value is twice of the 699 * register value, the exposure should be divided by 2 before 700 * set register, e.g. val << 3. 701 */ 702 ret = ov5675_write_reg(ov5675, OV5675_REG_EXPOSURE, 703 OV5675_REG_VALUE_24BIT, ctrl->val << 3); 704 break; 705 706 case V4L2_CID_VBLANK: 707 ret = ov5675_write_reg(ov5675, OV5675_REG_VTS, 708 OV5675_REG_VALUE_16BIT, 709 ov5675->cur_mode->height + ctrl->val + 710 10); 711 break; 712 713 case V4L2_CID_TEST_PATTERN: 714 ret = ov5675_test_pattern(ov5675, ctrl->val); 715 break; 716 717 case V4L2_CID_HFLIP: 718 ov5675_set_ctrl_hflip(ov5675, ctrl->val); 719 break; 720 721 case V4L2_CID_VFLIP: 722 ov5675_set_ctrl_vflip(ov5675, ctrl->val); 723 break; 724 725 default: 726 ret = -EINVAL; 727 break; 728 } 729 730 pm_runtime_put(&client->dev); 731 732 return ret; 733 } 734 735 static const struct v4l2_ctrl_ops ov5675_ctrl_ops = { 736 .s_ctrl = ov5675_set_ctrl, 737 }; 738 739 static int ov5675_init_controls(struct ov5675 *ov5675) 740 { 741 struct v4l2_ctrl_handler *ctrl_hdlr; 742 s64 exposure_max, h_blank; 743 int ret; 744 745 ctrl_hdlr = &ov5675->ctrl_handler; 746 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8); 747 if (ret) 748 return ret; 749 750 ctrl_hdlr->lock = &ov5675->mutex; 751 ov5675->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov5675_ctrl_ops, 752 V4L2_CID_LINK_FREQ, 753 ARRAY_SIZE(link_freq_menu_items) - 1, 754 0, link_freq_menu_items); 755 if (ov5675->link_freq) 756 ov5675->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; 757 758 ov5675->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, 759 V4L2_CID_PIXEL_RATE, 0, 760 to_pixel_rate(OV5675_LINK_FREQ_900MBPS), 761 1, 762 to_pixel_rate(OV5675_LINK_FREQ_900MBPS)); 763 ov5675->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, 764 V4L2_CID_VBLANK, 765 ov5675->cur_mode->vts_min - ov5675->cur_mode->height, 766 OV5675_VTS_MAX - ov5675->cur_mode->height, 1, 767 ov5675->cur_mode->vts_def - ov5675->cur_mode->height); 768 h_blank = to_pixels_per_line(ov5675->cur_mode->hts, 769 ov5675->cur_mode->link_freq_index) - ov5675->cur_mode->width; 770 ov5675->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, 771 V4L2_CID_HBLANK, h_blank, h_blank, 1, 772 h_blank); 773 if (ov5675->hblank) 774 ov5675->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; 775 776 v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, 777 OV5675_ANAL_GAIN_MIN, OV5675_ANAL_GAIN_MAX, 778 OV5675_ANAL_GAIN_STEP, OV5675_ANAL_GAIN_MIN); 779 v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, V4L2_CID_DIGITAL_GAIN, 780 OV5675_DGTL_GAIN_MIN, OV5675_DGTL_GAIN_MAX, 781 OV5675_DGTL_GAIN_STEP, OV5675_DGTL_GAIN_DEFAULT); 782 exposure_max = (ov5675->cur_mode->vts_def - OV5675_EXPOSURE_MAX_MARGIN); 783 ov5675->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, 784 V4L2_CID_EXPOSURE, 785 OV5675_EXPOSURE_MIN, exposure_max, 786 OV5675_EXPOSURE_STEP, 787 exposure_max); 788 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov5675_ctrl_ops, 789 V4L2_CID_TEST_PATTERN, 790 ARRAY_SIZE(ov5675_test_pattern_menu) - 1, 791 0, 0, ov5675_test_pattern_menu); 792 v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, 793 V4L2_CID_HFLIP, 0, 1, 1, 0); 794 v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, 795 V4L2_CID_VFLIP, 0, 1, 1, 0); 796 797 if (ctrl_hdlr->error) 798 return ctrl_hdlr->error; 799 800 ov5675->sd.ctrl_handler = ctrl_hdlr; 801 802 return 0; 803 } 804 805 static void ov5675_update_pad_format(const struct ov5675_mode *mode, 806 struct v4l2_mbus_framefmt *fmt) 807 { 808 fmt->width = mode->width; 809 fmt->height = mode->height; 810 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; 811 fmt->field = V4L2_FIELD_NONE; 812 } 813 814 static int ov5675_identify_module(struct ov5675 *ov5675) 815 { 816 struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd); 817 int ret; 818 u32 val; 819 820 if (ov5675->identified) 821 return 0; 822 823 ret = ov5675_read_reg(ov5675, OV5675_REG_CHIP_ID, 824 OV5675_REG_VALUE_24BIT, &val); 825 if (ret) 826 return ret; 827 828 if (val != OV5675_CHIP_ID) { 829 dev_err(&client->dev, "chip id mismatch: %x!=%x", 830 OV5675_CHIP_ID, val); 831 return -ENXIO; 832 } 833 834 ov5675->identified = true; 835 836 return 0; 837 } 838 839 static int ov5675_start_streaming(struct ov5675 *ov5675) 840 { 841 struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd); 842 const struct ov5675_reg_list *reg_list; 843 int link_freq_index, ret; 844 845 ret = ov5675_identify_module(ov5675); 846 if (ret) 847 return ret; 848 849 link_freq_index = ov5675->cur_mode->link_freq_index; 850 reg_list = &link_freq_configs[link_freq_index].reg_list; 851 ret = ov5675_write_reg_list(ov5675, reg_list); 852 if (ret) { 853 dev_err(&client->dev, "failed to set plls"); 854 return ret; 855 } 856 857 reg_list = &ov5675->cur_mode->reg_list; 858 ret = ov5675_write_reg_list(ov5675, reg_list); 859 if (ret) { 860 dev_err(&client->dev, "failed to set mode"); 861 return ret; 862 } 863 864 ret = __v4l2_ctrl_handler_setup(ov5675->sd.ctrl_handler); 865 if (ret) 866 return ret; 867 868 ret = ov5675_write_reg(ov5675, OV5675_REG_MODE_SELECT, 869 OV5675_REG_VALUE_08BIT, OV5675_MODE_STREAMING); 870 if (ret) { 871 dev_err(&client->dev, "failed to set stream"); 872 return ret; 873 } 874 875 return 0; 876 } 877 878 static void ov5675_stop_streaming(struct ov5675 *ov5675) 879 { 880 struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd); 881 882 if (ov5675_write_reg(ov5675, OV5675_REG_MODE_SELECT, 883 OV5675_REG_VALUE_08BIT, OV5675_MODE_STANDBY)) 884 dev_err(&client->dev, "failed to set stream"); 885 } 886 887 static int ov5675_set_stream(struct v4l2_subdev *sd, int enable) 888 { 889 struct ov5675 *ov5675 = to_ov5675(sd); 890 struct i2c_client *client = v4l2_get_subdevdata(sd); 891 int ret = 0; 892 893 if (ov5675->streaming == enable) 894 return 0; 895 896 mutex_lock(&ov5675->mutex); 897 if (enable) { 898 ret = pm_runtime_resume_and_get(&client->dev); 899 if (ret < 0) { 900 mutex_unlock(&ov5675->mutex); 901 return ret; 902 } 903 904 ret = ov5675_start_streaming(ov5675); 905 if (ret) { 906 enable = 0; 907 ov5675_stop_streaming(ov5675); 908 pm_runtime_put(&client->dev); 909 } 910 } else { 911 ov5675_stop_streaming(ov5675); 912 pm_runtime_put(&client->dev); 913 } 914 915 ov5675->streaming = enable; 916 mutex_unlock(&ov5675->mutex); 917 918 return ret; 919 } 920 921 static int __maybe_unused ov5675_suspend(struct device *dev) 922 { 923 struct v4l2_subdev *sd = dev_get_drvdata(dev); 924 struct ov5675 *ov5675 = to_ov5675(sd); 925 926 mutex_lock(&ov5675->mutex); 927 if (ov5675->streaming) 928 ov5675_stop_streaming(ov5675); 929 930 mutex_unlock(&ov5675->mutex); 931 932 return 0; 933 } 934 935 static int __maybe_unused ov5675_resume(struct device *dev) 936 { 937 struct v4l2_subdev *sd = dev_get_drvdata(dev); 938 struct ov5675 *ov5675 = to_ov5675(sd); 939 int ret; 940 941 mutex_lock(&ov5675->mutex); 942 if (ov5675->streaming) { 943 ret = ov5675_start_streaming(ov5675); 944 if (ret) { 945 ov5675->streaming = false; 946 ov5675_stop_streaming(ov5675); 947 mutex_unlock(&ov5675->mutex); 948 return ret; 949 } 950 } 951 952 mutex_unlock(&ov5675->mutex); 953 954 return 0; 955 } 956 957 static int ov5675_set_format(struct v4l2_subdev *sd, 958 struct v4l2_subdev_state *sd_state, 959 struct v4l2_subdev_format *fmt) 960 { 961 struct ov5675 *ov5675 = to_ov5675(sd); 962 const struct ov5675_mode *mode; 963 s32 vblank_def, h_blank; 964 965 mode = v4l2_find_nearest_size(supported_modes, 966 ARRAY_SIZE(supported_modes), width, 967 height, fmt->format.width, 968 fmt->format.height); 969 970 mutex_lock(&ov5675->mutex); 971 ov5675_update_pad_format(mode, &fmt->format); 972 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 973 *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format; 974 } else { 975 ov5675->cur_mode = mode; 976 __v4l2_ctrl_s_ctrl(ov5675->link_freq, mode->link_freq_index); 977 __v4l2_ctrl_s_ctrl_int64(ov5675->pixel_rate, 978 to_pixel_rate(mode->link_freq_index)); 979 980 /* Update limits and set FPS to default */ 981 vblank_def = mode->vts_def - mode->height; 982 __v4l2_ctrl_modify_range(ov5675->vblank, 983 mode->vts_min - mode->height, 984 OV5675_VTS_MAX - mode->height, 1, 985 vblank_def); 986 __v4l2_ctrl_s_ctrl(ov5675->vblank, vblank_def); 987 h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) - 988 mode->width; 989 __v4l2_ctrl_modify_range(ov5675->hblank, h_blank, h_blank, 1, 990 h_blank); 991 } 992 993 mutex_unlock(&ov5675->mutex); 994 995 return 0; 996 } 997 998 static int ov5675_get_format(struct v4l2_subdev *sd, 999 struct v4l2_subdev_state *sd_state, 1000 struct v4l2_subdev_format *fmt) 1001 { 1002 struct ov5675 *ov5675 = to_ov5675(sd); 1003 1004 mutex_lock(&ov5675->mutex); 1005 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) 1006 fmt->format = *v4l2_subdev_get_try_format(&ov5675->sd, 1007 sd_state, 1008 fmt->pad); 1009 else 1010 ov5675_update_pad_format(ov5675->cur_mode, &fmt->format); 1011 1012 mutex_unlock(&ov5675->mutex); 1013 1014 return 0; 1015 } 1016 1017 static int ov5675_enum_mbus_code(struct v4l2_subdev *sd, 1018 struct v4l2_subdev_state *sd_state, 1019 struct v4l2_subdev_mbus_code_enum *code) 1020 { 1021 if (code->index > 0) 1022 return -EINVAL; 1023 1024 code->code = MEDIA_BUS_FMT_SGRBG10_1X10; 1025 1026 return 0; 1027 } 1028 1029 static int ov5675_enum_frame_size(struct v4l2_subdev *sd, 1030 struct v4l2_subdev_state *sd_state, 1031 struct v4l2_subdev_frame_size_enum *fse) 1032 { 1033 if (fse->index >= ARRAY_SIZE(supported_modes)) 1034 return -EINVAL; 1035 1036 if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10) 1037 return -EINVAL; 1038 1039 fse->min_width = supported_modes[fse->index].width; 1040 fse->max_width = fse->min_width; 1041 fse->min_height = supported_modes[fse->index].height; 1042 fse->max_height = fse->min_height; 1043 1044 return 0; 1045 } 1046 1047 static int ov5675_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) 1048 { 1049 struct ov5675 *ov5675 = to_ov5675(sd); 1050 1051 mutex_lock(&ov5675->mutex); 1052 ov5675_update_pad_format(&supported_modes[0], 1053 v4l2_subdev_get_try_format(sd, fh->state, 0)); 1054 mutex_unlock(&ov5675->mutex); 1055 1056 return 0; 1057 } 1058 1059 static const struct v4l2_subdev_video_ops ov5675_video_ops = { 1060 .s_stream = ov5675_set_stream, 1061 }; 1062 1063 static const struct v4l2_subdev_pad_ops ov5675_pad_ops = { 1064 .set_fmt = ov5675_set_format, 1065 .get_fmt = ov5675_get_format, 1066 .enum_mbus_code = ov5675_enum_mbus_code, 1067 .enum_frame_size = ov5675_enum_frame_size, 1068 }; 1069 1070 static const struct v4l2_subdev_ops ov5675_subdev_ops = { 1071 .video = &ov5675_video_ops, 1072 .pad = &ov5675_pad_ops, 1073 }; 1074 1075 static const struct media_entity_operations ov5675_subdev_entity_ops = { 1076 .link_validate = v4l2_subdev_link_validate, 1077 }; 1078 1079 static const struct v4l2_subdev_internal_ops ov5675_internal_ops = { 1080 .open = ov5675_open, 1081 }; 1082 1083 static int ov5675_check_hwcfg(struct device *dev) 1084 { 1085 struct fwnode_handle *ep; 1086 struct fwnode_handle *fwnode = dev_fwnode(dev); 1087 struct v4l2_fwnode_endpoint bus_cfg = { 1088 .bus_type = V4L2_MBUS_CSI2_DPHY 1089 }; 1090 u32 mclk; 1091 int ret; 1092 unsigned int i, j; 1093 1094 if (!fwnode) 1095 return -ENXIO; 1096 1097 ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk); 1098 1099 if (ret) { 1100 dev_err(dev, "can't get clock frequency"); 1101 return ret; 1102 } 1103 1104 if (mclk != OV5675_MCLK) { 1105 dev_err(dev, "external clock %d is not supported", mclk); 1106 return -EINVAL; 1107 } 1108 1109 ep = fwnode_graph_get_next_endpoint(fwnode, NULL); 1110 if (!ep) 1111 return -ENXIO; 1112 1113 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg); 1114 fwnode_handle_put(ep); 1115 if (ret) 1116 return ret; 1117 1118 if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV5675_DATA_LANES) { 1119 dev_err(dev, "number of CSI2 data lanes %d is not supported", 1120 bus_cfg.bus.mipi_csi2.num_data_lanes); 1121 ret = -EINVAL; 1122 goto check_hwcfg_error; 1123 } 1124 1125 if (!bus_cfg.nr_of_link_frequencies) { 1126 dev_err(dev, "no link frequencies defined"); 1127 ret = -EINVAL; 1128 goto check_hwcfg_error; 1129 } 1130 1131 for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) { 1132 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) { 1133 if (link_freq_menu_items[i] == 1134 bus_cfg.link_frequencies[j]) 1135 break; 1136 } 1137 1138 if (j == bus_cfg.nr_of_link_frequencies) { 1139 dev_err(dev, "no link frequency %lld supported", 1140 link_freq_menu_items[i]); 1141 ret = -EINVAL; 1142 goto check_hwcfg_error; 1143 } 1144 } 1145 1146 check_hwcfg_error: 1147 v4l2_fwnode_endpoint_free(&bus_cfg); 1148 1149 return ret; 1150 } 1151 1152 static int ov5675_remove(struct i2c_client *client) 1153 { 1154 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1155 struct ov5675 *ov5675 = to_ov5675(sd); 1156 1157 v4l2_async_unregister_subdev(sd); 1158 media_entity_cleanup(&sd->entity); 1159 v4l2_ctrl_handler_free(sd->ctrl_handler); 1160 pm_runtime_disable(&client->dev); 1161 mutex_destroy(&ov5675->mutex); 1162 1163 return 0; 1164 } 1165 1166 static int ov5675_probe(struct i2c_client *client) 1167 { 1168 struct ov5675 *ov5675; 1169 bool full_power; 1170 int ret; 1171 1172 ret = ov5675_check_hwcfg(&client->dev); 1173 if (ret) { 1174 dev_err(&client->dev, "failed to check HW configuration: %d", 1175 ret); 1176 return ret; 1177 } 1178 1179 ov5675 = devm_kzalloc(&client->dev, sizeof(*ov5675), GFP_KERNEL); 1180 if (!ov5675) 1181 return -ENOMEM; 1182 1183 v4l2_i2c_subdev_init(&ov5675->sd, client, &ov5675_subdev_ops); 1184 1185 full_power = acpi_dev_state_d0(&client->dev); 1186 if (full_power) { 1187 ret = ov5675_identify_module(ov5675); 1188 if (ret) { 1189 dev_err(&client->dev, "failed to find sensor: %d", ret); 1190 return ret; 1191 } 1192 } 1193 1194 mutex_init(&ov5675->mutex); 1195 ov5675->cur_mode = &supported_modes[0]; 1196 ret = ov5675_init_controls(ov5675); 1197 if (ret) { 1198 dev_err(&client->dev, "failed to init controls: %d", ret); 1199 goto probe_error_v4l2_ctrl_handler_free; 1200 } 1201 1202 ov5675->sd.internal_ops = &ov5675_internal_ops; 1203 ov5675->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 1204 ov5675->sd.entity.ops = &ov5675_subdev_entity_ops; 1205 ov5675->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1206 ov5675->pad.flags = MEDIA_PAD_FL_SOURCE; 1207 ret = media_entity_pads_init(&ov5675->sd.entity, 1, &ov5675->pad); 1208 if (ret) { 1209 dev_err(&client->dev, "failed to init entity pads: %d", ret); 1210 goto probe_error_v4l2_ctrl_handler_free; 1211 } 1212 1213 ret = v4l2_async_register_subdev_sensor(&ov5675->sd); 1214 if (ret < 0) { 1215 dev_err(&client->dev, "failed to register V4L2 subdev: %d", 1216 ret); 1217 goto probe_error_media_entity_cleanup; 1218 } 1219 1220 /* 1221 * Device is already turned on by i2c-core with ACPI domain PM. 1222 * Enable runtime PM and turn off the device. 1223 */ 1224 1225 /* Set the device's state to active if it's in D0 state. */ 1226 if (full_power) 1227 pm_runtime_set_active(&client->dev); 1228 pm_runtime_enable(&client->dev); 1229 pm_runtime_idle(&client->dev); 1230 1231 return 0; 1232 1233 probe_error_media_entity_cleanup: 1234 media_entity_cleanup(&ov5675->sd.entity); 1235 1236 probe_error_v4l2_ctrl_handler_free: 1237 v4l2_ctrl_handler_free(ov5675->sd.ctrl_handler); 1238 mutex_destroy(&ov5675->mutex); 1239 1240 return ret; 1241 } 1242 1243 static const struct dev_pm_ops ov5675_pm_ops = { 1244 SET_SYSTEM_SLEEP_PM_OPS(ov5675_suspend, ov5675_resume) 1245 }; 1246 1247 #ifdef CONFIG_ACPI 1248 static const struct acpi_device_id ov5675_acpi_ids[] = { 1249 {"OVTI5675"}, 1250 {} 1251 }; 1252 1253 MODULE_DEVICE_TABLE(acpi, ov5675_acpi_ids); 1254 #endif 1255 1256 static struct i2c_driver ov5675_i2c_driver = { 1257 .driver = { 1258 .name = "ov5675", 1259 .pm = &ov5675_pm_ops, 1260 .acpi_match_table = ACPI_PTR(ov5675_acpi_ids), 1261 }, 1262 .probe_new = ov5675_probe, 1263 .remove = ov5675_remove, 1264 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE, 1265 }; 1266 1267 module_i2c_driver(ov5675_i2c_driver); 1268 1269 MODULE_AUTHOR("Shawn Tu <shawnx.tu@intel.com>"); 1270 MODULE_DESCRIPTION("OmniVision OV5675 sensor driver"); 1271 MODULE_LICENSE("GPL v2"); 1272