xref: /openbmc/linux/drivers/media/i2c/ov5675.c (revision c699ce1a)
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2019 Intel Corporation.
3 
4 #include <asm/unaligned.h>
5 #include <linux/acpi.h>
6 #include <linux/delay.h>
7 #include <linux/i2c.h>
8 #include <linux/module.h>
9 #include <linux/pm_runtime.h>
10 #include <media/v4l2-ctrls.h>
11 #include <media/v4l2-device.h>
12 #include <media/v4l2-fwnode.h>
13 
14 #define OV5675_REG_VALUE_08BIT		1
15 #define OV5675_REG_VALUE_16BIT		2
16 #define OV5675_REG_VALUE_24BIT		3
17 
18 #define OV5675_LINK_FREQ_450MHZ		450000000ULL
19 #define OV5675_SCLK			90000000LL
20 #define OV5675_MCLK			19200000
21 #define OV5675_DATA_LANES		2
22 #define OV5675_RGB_DEPTH		10
23 
24 #define OV5675_REG_CHIP_ID		0x300a
25 #define OV5675_CHIP_ID			0x5675
26 
27 #define OV5675_REG_MODE_SELECT		0x0100
28 #define OV5675_MODE_STANDBY		0x00
29 #define OV5675_MODE_STREAMING		0x01
30 
31 /* vertical-timings from sensor */
32 #define OV5675_REG_VTS			0x380e
33 #define OV5675_VTS_30FPS		0x07e4
34 #define OV5675_VTS_30FPS_MIN		0x07e4
35 #define OV5675_VTS_MAX			0x7fff
36 
37 /* horizontal-timings from sensor */
38 #define OV5675_REG_HTS			0x380c
39 
40 /* Exposure controls from sensor */
41 #define OV5675_REG_EXPOSURE		0x3500
42 #define	OV5675_EXPOSURE_MIN		4
43 #define OV5675_EXPOSURE_MAX_MARGIN	4
44 #define	OV5675_EXPOSURE_STEP		1
45 
46 /* Analog gain controls from sensor */
47 #define OV5675_REG_ANALOG_GAIN		0x3508
48 #define	OV5675_ANAL_GAIN_MIN		128
49 #define	OV5675_ANAL_GAIN_MAX		2047
50 #define	OV5675_ANAL_GAIN_STEP		1
51 
52 /* Digital gain controls from sensor */
53 #define OV5675_REG_DIGITAL_GAIN		0x350a
54 #define OV5675_REG_MWB_R_GAIN		0x5019
55 #define OV5675_REG_MWB_G_GAIN		0x501b
56 #define OV5675_REG_MWB_B_GAIN		0x501d
57 #define OV5675_DGTL_GAIN_MIN		1024
58 #define OV5675_DGTL_GAIN_MAX		4095
59 #define OV5675_DGTL_GAIN_STEP		1
60 #define OV5675_DGTL_GAIN_DEFAULT	1024
61 
62 /* Group Access */
63 #define OV5675_REG_GROUP_ACCESS		0x3208
64 #define OV5675_GROUP_HOLD_START		0x0
65 #define OV5675_GROUP_HOLD_END		0x10
66 #define OV5675_GROUP_HOLD_LAUNCH	0xa0
67 
68 /* Test Pattern Control */
69 #define OV5675_REG_TEST_PATTERN		0x4503
70 #define OV5675_TEST_PATTERN_ENABLE	BIT(7)
71 #define OV5675_TEST_PATTERN_BAR_SHIFT	2
72 
73 /* Flip Mirror Controls from sensor */
74 #define OV5675_REG_FORMAT1		0x3820
75 #define OV5675_REG_FORMAT2		0x373d
76 
77 #define to_ov5675(_sd)			container_of(_sd, struct ov5675, sd)
78 
79 enum {
80 	OV5675_LINK_FREQ_900MBPS,
81 };
82 
83 struct ov5675_reg {
84 	u16 address;
85 	u8 val;
86 };
87 
88 struct ov5675_reg_list {
89 	u32 num_of_regs;
90 	const struct ov5675_reg *regs;
91 };
92 
93 struct ov5675_link_freq_config {
94 	const struct ov5675_reg_list reg_list;
95 };
96 
97 struct ov5675_mode {
98 	/* Frame width in pixels */
99 	u32 width;
100 
101 	/* Frame height in pixels */
102 	u32 height;
103 
104 	/* Horizontal timining size */
105 	u32 hts;
106 
107 	/* Default vertical timining size */
108 	u32 vts_def;
109 
110 	/* Min vertical timining size */
111 	u32 vts_min;
112 
113 	/* Link frequency needed for this resolution */
114 	u32 link_freq_index;
115 
116 	/* Sensor register settings for this resolution */
117 	const struct ov5675_reg_list reg_list;
118 };
119 
120 static const struct ov5675_reg mipi_data_rate_900mbps[] = {
121 	{0x0103, 0x01},
122 	{0x0100, 0x00},
123 	{0x0300, 0x04},
124 	{0x0302, 0x8d},
125 	{0x0303, 0x00},
126 	{0x030d, 0x26},
127 };
128 
129 static const struct ov5675_reg mode_2592x1944_regs[] = {
130 	{0x3002, 0x21},
131 	{0x3107, 0x23},
132 	{0x3501, 0x20},
133 	{0x3503, 0x0c},
134 	{0x3508, 0x03},
135 	{0x3509, 0x00},
136 	{0x3600, 0x66},
137 	{0x3602, 0x30},
138 	{0x3610, 0xa5},
139 	{0x3612, 0x93},
140 	{0x3620, 0x80},
141 	{0x3642, 0x0e},
142 	{0x3661, 0x00},
143 	{0x3662, 0x10},
144 	{0x3664, 0xf3},
145 	{0x3665, 0x9e},
146 	{0x3667, 0xa5},
147 	{0x366e, 0x55},
148 	{0x366f, 0x55},
149 	{0x3670, 0x11},
150 	{0x3671, 0x11},
151 	{0x3672, 0x11},
152 	{0x3673, 0x11},
153 	{0x3714, 0x24},
154 	{0x371a, 0x3e},
155 	{0x3733, 0x10},
156 	{0x3734, 0x00},
157 	{0x373d, 0x24},
158 	{0x3764, 0x20},
159 	{0x3765, 0x20},
160 	{0x3766, 0x12},
161 	{0x37a1, 0x14},
162 	{0x37a8, 0x1c},
163 	{0x37ab, 0x0f},
164 	{0x37c2, 0x04},
165 	{0x37cb, 0x00},
166 	{0x37cc, 0x00},
167 	{0x37cd, 0x00},
168 	{0x37ce, 0x00},
169 	{0x37d8, 0x02},
170 	{0x37d9, 0x08},
171 	{0x37dc, 0x04},
172 	{0x3800, 0x00},
173 	{0x3801, 0x00},
174 	{0x3802, 0x00},
175 	{0x3803, 0x04},
176 	{0x3804, 0x0a},
177 	{0x3805, 0x3f},
178 	{0x3806, 0x07},
179 	{0x3807, 0xb3},
180 	{0x3808, 0x0a},
181 	{0x3809, 0x20},
182 	{0x380a, 0x07},
183 	{0x380b, 0x98},
184 	{0x380c, 0x02},
185 	{0x380d, 0xee},
186 	{0x380e, 0x07},
187 	{0x380f, 0xe4},
188 	{0x3811, 0x10},
189 	{0x3813, 0x0d},
190 	{0x3814, 0x01},
191 	{0x3815, 0x01},
192 	{0x3816, 0x01},
193 	{0x3817, 0x01},
194 	{0x381e, 0x02},
195 	{0x3820, 0x88},
196 	{0x3821, 0x01},
197 	{0x3832, 0x04},
198 	{0x3c80, 0x01},
199 	{0x3c82, 0x00},
200 	{0x3c83, 0xc8},
201 	{0x3c8c, 0x0f},
202 	{0x3c8d, 0xa0},
203 	{0x3c90, 0x07},
204 	{0x3c91, 0x00},
205 	{0x3c92, 0x00},
206 	{0x3c93, 0x00},
207 	{0x3c94, 0xd0},
208 	{0x3c95, 0x50},
209 	{0x3c96, 0x35},
210 	{0x3c97, 0x00},
211 	{0x4001, 0xe0},
212 	{0x4008, 0x02},
213 	{0x4009, 0x0d},
214 	{0x400f, 0x80},
215 	{0x4013, 0x02},
216 	{0x4040, 0x00},
217 	{0x4041, 0x07},
218 	{0x404c, 0x50},
219 	{0x404e, 0x20},
220 	{0x4500, 0x06},
221 	{0x4503, 0x00},
222 	{0x450a, 0x04},
223 	{0x4809, 0x04},
224 	{0x480c, 0x12},
225 	{0x4819, 0x70},
226 	{0x4825, 0x32},
227 	{0x4826, 0x32},
228 	{0x482a, 0x06},
229 	{0x4833, 0x08},
230 	{0x4837, 0x0d},
231 	{0x5000, 0x77},
232 	{0x5b00, 0x01},
233 	{0x5b01, 0x10},
234 	{0x5b02, 0x01},
235 	{0x5b03, 0xdb},
236 	{0x5b05, 0x6c},
237 	{0x5e10, 0xfc},
238 	{0x3500, 0x00},
239 	{0x3501, 0x3E},
240 	{0x3502, 0x60},
241 	{0x3503, 0x08},
242 	{0x3508, 0x04},
243 	{0x3509, 0x00},
244 	{0x3832, 0x48},
245 	{0x5780, 0x3e},
246 	{0x5781, 0x0f},
247 	{0x5782, 0x44},
248 	{0x5783, 0x02},
249 	{0x5784, 0x01},
250 	{0x5785, 0x01},
251 	{0x5786, 0x00},
252 	{0x5787, 0x04},
253 	{0x5788, 0x02},
254 	{0x5789, 0x0f},
255 	{0x578a, 0xfd},
256 	{0x578b, 0xf5},
257 	{0x578c, 0xf5},
258 	{0x578d, 0x03},
259 	{0x578e, 0x08},
260 	{0x578f, 0x0c},
261 	{0x5790, 0x08},
262 	{0x5791, 0x06},
263 	{0x5792, 0x00},
264 	{0x5793, 0x52},
265 	{0x5794, 0xa3},
266 	{0x4003, 0x40},
267 	{0x3107, 0x01},
268 	{0x3c80, 0x08},
269 	{0x3c83, 0xb1},
270 	{0x3c8c, 0x10},
271 	{0x3c8d, 0x00},
272 	{0x3c90, 0x00},
273 	{0x3c94, 0x00},
274 	{0x3c95, 0x00},
275 	{0x3c96, 0x00},
276 	{0x37cb, 0x09},
277 	{0x37cc, 0x15},
278 	{0x37cd, 0x1f},
279 	{0x37ce, 0x1f},
280 };
281 
282 static const struct ov5675_reg mode_1296x972_regs[] = {
283 	{0x3002, 0x21},
284 	{0x3107, 0x23},
285 	{0x3501, 0x20},
286 	{0x3503, 0x0c},
287 	{0x3508, 0x03},
288 	{0x3509, 0x00},
289 	{0x3600, 0x66},
290 	{0x3602, 0x30},
291 	{0x3610, 0xa5},
292 	{0x3612, 0x93},
293 	{0x3620, 0x80},
294 	{0x3642, 0x0e},
295 	{0x3661, 0x00},
296 	{0x3662, 0x08},
297 	{0x3664, 0xf3},
298 	{0x3665, 0x9e},
299 	{0x3667, 0xa5},
300 	{0x366e, 0x55},
301 	{0x366f, 0x55},
302 	{0x3670, 0x11},
303 	{0x3671, 0x11},
304 	{0x3672, 0x11},
305 	{0x3673, 0x11},
306 	{0x3714, 0x28},
307 	{0x371a, 0x3e},
308 	{0x3733, 0x10},
309 	{0x3734, 0x00},
310 	{0x373d, 0x24},
311 	{0x3764, 0x20},
312 	{0x3765, 0x20},
313 	{0x3766, 0x12},
314 	{0x37a1, 0x14},
315 	{0x37a8, 0x1c},
316 	{0x37ab, 0x0f},
317 	{0x37c2, 0x14},
318 	{0x37cb, 0x00},
319 	{0x37cc, 0x00},
320 	{0x37cd, 0x00},
321 	{0x37ce, 0x00},
322 	{0x37d8, 0x02},
323 	{0x37d9, 0x04},
324 	{0x37dc, 0x04},
325 	{0x3800, 0x00},
326 	{0x3801, 0x00},
327 	{0x3802, 0x00},
328 	{0x3803, 0x00},
329 	{0x3804, 0x0a},
330 	{0x3805, 0x3f},
331 	{0x3806, 0x07},
332 	{0x3807, 0xb7},
333 	{0x3808, 0x05},
334 	{0x3809, 0x10},
335 	{0x380a, 0x03},
336 	{0x380b, 0xcc},
337 	{0x380c, 0x02},
338 	{0x380d, 0xee},
339 	{0x380e, 0x07},
340 	{0x380f, 0xd0},
341 	{0x3811, 0x08},
342 	{0x3813, 0x0d},
343 	{0x3814, 0x03},
344 	{0x3815, 0x01},
345 	{0x3816, 0x03},
346 	{0x3817, 0x01},
347 	{0x381e, 0x02},
348 	{0x3820, 0x8b},
349 	{0x3821, 0x01},
350 	{0x3832, 0x04},
351 	{0x3c80, 0x01},
352 	{0x3c82, 0x00},
353 	{0x3c83, 0xc8},
354 	{0x3c8c, 0x0f},
355 	{0x3c8d, 0xa0},
356 	{0x3c90, 0x07},
357 	{0x3c91, 0x00},
358 	{0x3c92, 0x00},
359 	{0x3c93, 0x00},
360 	{0x3c94, 0xd0},
361 	{0x3c95, 0x50},
362 	{0x3c96, 0x35},
363 	{0x3c97, 0x00},
364 	{0x4001, 0xe0},
365 	{0x4008, 0x00},
366 	{0x4009, 0x07},
367 	{0x400f, 0x80},
368 	{0x4013, 0x02},
369 	{0x4040, 0x00},
370 	{0x4041, 0x03},
371 	{0x404c, 0x50},
372 	{0x404e, 0x20},
373 	{0x4500, 0x06},
374 	{0x4503, 0x00},
375 	{0x450a, 0x04},
376 	{0x4809, 0x04},
377 	{0x480c, 0x12},
378 	{0x4819, 0x70},
379 	{0x4825, 0x32},
380 	{0x4826, 0x32},
381 	{0x482a, 0x06},
382 	{0x4833, 0x08},
383 	{0x4837, 0x0d},
384 	{0x5000, 0x77},
385 	{0x5b00, 0x01},
386 	{0x5b01, 0x10},
387 	{0x5b02, 0x01},
388 	{0x5b03, 0xdb},
389 	{0x5b05, 0x6c},
390 	{0x5e10, 0xfc},
391 	{0x3500, 0x00},
392 	{0x3501, 0x1F},
393 	{0x3502, 0x20},
394 	{0x3503, 0x08},
395 	{0x3508, 0x04},
396 	{0x3509, 0x00},
397 	{0x3832, 0x48},
398 	{0x5780, 0x3e},
399 	{0x5781, 0x0f},
400 	{0x5782, 0x44},
401 	{0x5783, 0x02},
402 	{0x5784, 0x01},
403 	{0x5785, 0x01},
404 	{0x5786, 0x00},
405 	{0x5787, 0x04},
406 	{0x5788, 0x02},
407 	{0x5789, 0x0f},
408 	{0x578a, 0xfd},
409 	{0x578b, 0xf5},
410 	{0x578c, 0xf5},
411 	{0x578d, 0x03},
412 	{0x578e, 0x08},
413 	{0x578f, 0x0c},
414 	{0x5790, 0x08},
415 	{0x5791, 0x06},
416 	{0x5792, 0x00},
417 	{0x5793, 0x52},
418 	{0x5794, 0xa3},
419 	{0x4003, 0x40},
420 	{0x3107, 0x01},
421 	{0x3c80, 0x08},
422 	{0x3c83, 0xb1},
423 	{0x3c8c, 0x10},
424 	{0x3c8d, 0x00},
425 	{0x3c90, 0x00},
426 	{0x3c94, 0x00},
427 	{0x3c95, 0x00},
428 	{0x3c96, 0x00},
429 	{0x37cb, 0x09},
430 	{0x37cc, 0x15},
431 	{0x37cd, 0x1f},
432 	{0x37ce, 0x1f},
433 };
434 
435 static const char * const ov5675_test_pattern_menu[] = {
436 	"Disabled",
437 	"Standard Color Bar",
438 	"Top-Bottom Darker Color Bar",
439 	"Right-Left Darker Color Bar",
440 	"Bottom-Top Darker Color Bar"
441 };
442 
443 static const s64 link_freq_menu_items[] = {
444 	OV5675_LINK_FREQ_450MHZ,
445 };
446 
447 static const struct ov5675_link_freq_config link_freq_configs[] = {
448 	[OV5675_LINK_FREQ_900MBPS] = {
449 		.reg_list = {
450 			.num_of_regs = ARRAY_SIZE(mipi_data_rate_900mbps),
451 			.regs = mipi_data_rate_900mbps,
452 		}
453 	}
454 };
455 
456 static const struct ov5675_mode supported_modes[] = {
457 	{
458 		.width = 2592,
459 		.height = 1944,
460 		.hts = 1500,
461 		.vts_def = OV5675_VTS_30FPS,
462 		.vts_min = OV5675_VTS_30FPS_MIN,
463 		.reg_list = {
464 			.num_of_regs = ARRAY_SIZE(mode_2592x1944_regs),
465 			.regs = mode_2592x1944_regs,
466 		},
467 		.link_freq_index = OV5675_LINK_FREQ_900MBPS,
468 	},
469 	{
470 		.width = 1296,
471 		.height = 972,
472 		.hts = 1500,
473 		.vts_def = OV5675_VTS_30FPS,
474 		.vts_min = OV5675_VTS_30FPS_MIN,
475 		.reg_list = {
476 			.num_of_regs = ARRAY_SIZE(mode_1296x972_regs),
477 			.regs = mode_1296x972_regs,
478 		},
479 		.link_freq_index = OV5675_LINK_FREQ_900MBPS,
480 	}
481 };
482 
483 struct ov5675 {
484 	struct v4l2_subdev sd;
485 	struct media_pad pad;
486 	struct v4l2_ctrl_handler ctrl_handler;
487 
488 	/* V4L2 Controls */
489 	struct v4l2_ctrl *link_freq;
490 	struct v4l2_ctrl *pixel_rate;
491 	struct v4l2_ctrl *vblank;
492 	struct v4l2_ctrl *hblank;
493 	struct v4l2_ctrl *exposure;
494 
495 	/* Current mode */
496 	const struct ov5675_mode *cur_mode;
497 
498 	/* To serialize asynchronus callbacks */
499 	struct mutex mutex;
500 
501 	/* Streaming on/off */
502 	bool streaming;
503 
504 	/* True if the device has been identified */
505 	bool identified;
506 };
507 
508 static u64 to_pixel_rate(u32 f_index)
509 {
510 	u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV5675_DATA_LANES;
511 
512 	do_div(pixel_rate, OV5675_RGB_DEPTH);
513 
514 	return pixel_rate;
515 }
516 
517 static u64 to_pixels_per_line(u32 hts, u32 f_index)
518 {
519 	u64 ppl = hts * to_pixel_rate(f_index);
520 
521 	do_div(ppl, OV5675_SCLK);
522 
523 	return ppl;
524 }
525 
526 static int ov5675_read_reg(struct ov5675 *ov5675, u16 reg, u16 len, u32 *val)
527 {
528 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
529 	struct i2c_msg msgs[2];
530 	u8 addr_buf[2];
531 	u8 data_buf[4] = {0};
532 	int ret;
533 
534 	if (len > 4)
535 		return -EINVAL;
536 
537 	put_unaligned_be16(reg, addr_buf);
538 	msgs[0].addr = client->addr;
539 	msgs[0].flags = 0;
540 	msgs[0].len = sizeof(addr_buf);
541 	msgs[0].buf = addr_buf;
542 	msgs[1].addr = client->addr;
543 	msgs[1].flags = I2C_M_RD;
544 	msgs[1].len = len;
545 	msgs[1].buf = &data_buf[4 - len];
546 
547 	ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
548 	if (ret != ARRAY_SIZE(msgs))
549 		return -EIO;
550 
551 	*val = get_unaligned_be32(data_buf);
552 
553 	return 0;
554 }
555 
556 static int ov5675_write_reg(struct ov5675 *ov5675, u16 reg, u16 len, u32 val)
557 {
558 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
559 	u8 buf[6];
560 
561 	if (len > 4)
562 		return -EINVAL;
563 
564 	put_unaligned_be16(reg, buf);
565 	put_unaligned_be32(val << 8 * (4 - len), buf + 2);
566 	if (i2c_master_send(client, buf, len + 2) != len + 2)
567 		return -EIO;
568 
569 	return 0;
570 }
571 
572 static int ov5675_write_reg_list(struct ov5675 *ov5675,
573 				 const struct ov5675_reg_list *r_list)
574 {
575 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
576 	unsigned int i;
577 	int ret;
578 
579 	for (i = 0; i < r_list->num_of_regs; i++) {
580 		ret = ov5675_write_reg(ov5675, r_list->regs[i].address, 1,
581 				       r_list->regs[i].val);
582 		if (ret) {
583 			dev_err_ratelimited(&client->dev,
584 				    "failed to write reg 0x%4.4x. error = %d",
585 				    r_list->regs[i].address, ret);
586 			return ret;
587 		}
588 	}
589 
590 	return 0;
591 }
592 
593 static int ov5675_update_digital_gain(struct ov5675 *ov5675, u32 d_gain)
594 {
595 	int ret;
596 
597 	ret = ov5675_write_reg(ov5675, OV5675_REG_GROUP_ACCESS,
598 			       OV5675_REG_VALUE_08BIT,
599 			       OV5675_GROUP_HOLD_START);
600 	if (ret)
601 		return ret;
602 
603 	ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_R_GAIN,
604 			       OV5675_REG_VALUE_16BIT, d_gain);
605 	if (ret)
606 		return ret;
607 
608 	ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_G_GAIN,
609 			       OV5675_REG_VALUE_16BIT, d_gain);
610 	if (ret)
611 		return ret;
612 
613 	ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_B_GAIN,
614 			       OV5675_REG_VALUE_16BIT, d_gain);
615 	if (ret)
616 		return ret;
617 
618 	ret = ov5675_write_reg(ov5675, OV5675_REG_GROUP_ACCESS,
619 			       OV5675_REG_VALUE_08BIT,
620 			       OV5675_GROUP_HOLD_END);
621 	if (ret)
622 		return ret;
623 
624 	ret = ov5675_write_reg(ov5675, OV5675_REG_GROUP_ACCESS,
625 			       OV5675_REG_VALUE_08BIT,
626 			       OV5675_GROUP_HOLD_LAUNCH);
627 	return ret;
628 }
629 
630 static int ov5675_test_pattern(struct ov5675 *ov5675, u32 pattern)
631 {
632 	if (pattern)
633 		pattern = (pattern - 1) << OV5675_TEST_PATTERN_BAR_SHIFT |
634 			  OV5675_TEST_PATTERN_ENABLE;
635 
636 	return ov5675_write_reg(ov5675, OV5675_REG_TEST_PATTERN,
637 				OV5675_REG_VALUE_08BIT, pattern);
638 }
639 
640 /*
641  * OV5675 supports keeping the pixel order by mirror and flip function
642  * The Bayer order isn't affected by the flip controls
643  */
644 static int ov5675_set_ctrl_hflip(struct ov5675 *ov5675, u32 ctrl_val)
645 {
646 	int ret;
647 	u32 val;
648 
649 	ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT1,
650 			      OV5675_REG_VALUE_08BIT, &val);
651 	if (ret)
652 		return ret;
653 
654 	return ov5675_write_reg(ov5675, OV5675_REG_FORMAT1,
655 				OV5675_REG_VALUE_08BIT,
656 				ctrl_val ? val & ~BIT(3) : val | BIT(3));
657 }
658 
659 static int ov5675_set_ctrl_vflip(struct ov5675 *ov5675, u8 ctrl_val)
660 {
661 	int ret;
662 	u32 val;
663 
664 	ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT1,
665 			      OV5675_REG_VALUE_08BIT, &val);
666 	if (ret)
667 		return ret;
668 
669 	ret = ov5675_write_reg(ov5675, OV5675_REG_FORMAT1,
670 			       OV5675_REG_VALUE_08BIT,
671 			       ctrl_val ? val | BIT(4) | BIT(5)  : val & ~BIT(4) & ~BIT(5));
672 
673 	if (ret)
674 		return ret;
675 
676 	ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT2,
677 			      OV5675_REG_VALUE_08BIT, &val);
678 
679 	if (ret)
680 		return ret;
681 
682 	return ov5675_write_reg(ov5675, OV5675_REG_FORMAT2,
683 				OV5675_REG_VALUE_08BIT,
684 				ctrl_val ? val | BIT(1) : val & ~BIT(1));
685 }
686 
687 static int ov5675_set_ctrl(struct v4l2_ctrl *ctrl)
688 {
689 	struct ov5675 *ov5675 = container_of(ctrl->handler,
690 					     struct ov5675, ctrl_handler);
691 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
692 	s64 exposure_max;
693 	int ret = 0;
694 
695 	/* Propagate change of current control to all related controls */
696 	if (ctrl->id == V4L2_CID_VBLANK) {
697 		/* Update max exposure while meeting expected vblanking */
698 		exposure_max = ov5675->cur_mode->height + ctrl->val -
699 			OV5675_EXPOSURE_MAX_MARGIN;
700 		__v4l2_ctrl_modify_range(ov5675->exposure,
701 					 ov5675->exposure->minimum,
702 					 exposure_max, ov5675->exposure->step,
703 					 exposure_max);
704 	}
705 
706 	/* V4L2 controls values will be applied only when power is already up */
707 	if (!pm_runtime_get_if_in_use(&client->dev))
708 		return 0;
709 
710 	switch (ctrl->id) {
711 	case V4L2_CID_ANALOGUE_GAIN:
712 		ret = ov5675_write_reg(ov5675, OV5675_REG_ANALOG_GAIN,
713 				       OV5675_REG_VALUE_16BIT, ctrl->val);
714 		break;
715 
716 	case V4L2_CID_DIGITAL_GAIN:
717 		ret = ov5675_update_digital_gain(ov5675, ctrl->val);
718 		break;
719 
720 	case V4L2_CID_EXPOSURE:
721 		/* 4 least significant bits of expsoure are fractional part
722 		 * val = val << 4
723 		 * for ov5675, the unit of exposure is differnt from other
724 		 * OmniVision sensors, its exposure value is twice of the
725 		 * register value, the exposure should be divided by 2 before
726 		 * set register, e.g. val << 3.
727 		 */
728 		ret = ov5675_write_reg(ov5675, OV5675_REG_EXPOSURE,
729 				       OV5675_REG_VALUE_24BIT, ctrl->val << 3);
730 		break;
731 
732 	case V4L2_CID_VBLANK:
733 		ret = ov5675_write_reg(ov5675, OV5675_REG_VTS,
734 				       OV5675_REG_VALUE_16BIT,
735 				       ov5675->cur_mode->height + ctrl->val +
736 				       10);
737 		break;
738 
739 	case V4L2_CID_TEST_PATTERN:
740 		ret = ov5675_test_pattern(ov5675, ctrl->val);
741 		break;
742 
743 	case V4L2_CID_HFLIP:
744 		ov5675_set_ctrl_hflip(ov5675, ctrl->val);
745 		break;
746 
747 	case V4L2_CID_VFLIP:
748 		ov5675_set_ctrl_vflip(ov5675, ctrl->val);
749 		break;
750 
751 	default:
752 		ret = -EINVAL;
753 		break;
754 	}
755 
756 	pm_runtime_put(&client->dev);
757 
758 	return ret;
759 }
760 
761 static const struct v4l2_ctrl_ops ov5675_ctrl_ops = {
762 	.s_ctrl = ov5675_set_ctrl,
763 };
764 
765 static int ov5675_init_controls(struct ov5675 *ov5675)
766 {
767 	struct v4l2_ctrl_handler *ctrl_hdlr;
768 	s64 exposure_max, h_blank;
769 	int ret;
770 
771 	ctrl_hdlr = &ov5675->ctrl_handler;
772 	ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
773 	if (ret)
774 		return ret;
775 
776 	ctrl_hdlr->lock = &ov5675->mutex;
777 	ov5675->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov5675_ctrl_ops,
778 					   V4L2_CID_LINK_FREQ,
779 					   ARRAY_SIZE(link_freq_menu_items) - 1,
780 					   0, link_freq_menu_items);
781 	if (ov5675->link_freq)
782 		ov5675->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
783 
784 	ov5675->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
785 				       V4L2_CID_PIXEL_RATE, 0,
786 				       to_pixel_rate(OV5675_LINK_FREQ_900MBPS),
787 				       1,
788 				       to_pixel_rate(OV5675_LINK_FREQ_900MBPS));
789 	ov5675->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
790 			  V4L2_CID_VBLANK,
791 			  ov5675->cur_mode->vts_min - ov5675->cur_mode->height,
792 			  OV5675_VTS_MAX - ov5675->cur_mode->height, 1,
793 			  ov5675->cur_mode->vts_def - ov5675->cur_mode->height);
794 	h_blank = to_pixels_per_line(ov5675->cur_mode->hts,
795 		  ov5675->cur_mode->link_freq_index) - ov5675->cur_mode->width;
796 	ov5675->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
797 					   V4L2_CID_HBLANK, h_blank, h_blank, 1,
798 					   h_blank);
799 	if (ov5675->hblank)
800 		ov5675->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
801 
802 	v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
803 			  OV5675_ANAL_GAIN_MIN, OV5675_ANAL_GAIN_MAX,
804 			  OV5675_ANAL_GAIN_STEP, OV5675_ANAL_GAIN_MIN);
805 	v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
806 			  OV5675_DGTL_GAIN_MIN, OV5675_DGTL_GAIN_MAX,
807 			  OV5675_DGTL_GAIN_STEP, OV5675_DGTL_GAIN_DEFAULT);
808 	exposure_max = (ov5675->cur_mode->vts_def - OV5675_EXPOSURE_MAX_MARGIN);
809 	ov5675->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
810 					     V4L2_CID_EXPOSURE,
811 					     OV5675_EXPOSURE_MIN, exposure_max,
812 					     OV5675_EXPOSURE_STEP,
813 					     exposure_max);
814 	v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov5675_ctrl_ops,
815 				     V4L2_CID_TEST_PATTERN,
816 				     ARRAY_SIZE(ov5675_test_pattern_menu) - 1,
817 				     0, 0, ov5675_test_pattern_menu);
818 	v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
819 			  V4L2_CID_HFLIP, 0, 1, 1, 0);
820 	v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
821 			  V4L2_CID_VFLIP, 0, 1, 1, 0);
822 
823 	if (ctrl_hdlr->error) {
824 		v4l2_ctrl_handler_free(ctrl_hdlr);
825 		return ctrl_hdlr->error;
826 	}
827 
828 	ov5675->sd.ctrl_handler = ctrl_hdlr;
829 
830 	return 0;
831 }
832 
833 static void ov5675_update_pad_format(const struct ov5675_mode *mode,
834 				     struct v4l2_mbus_framefmt *fmt)
835 {
836 	fmt->width = mode->width;
837 	fmt->height = mode->height;
838 	fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
839 	fmt->field = V4L2_FIELD_NONE;
840 }
841 
842 static int ov5675_identify_module(struct ov5675 *ov5675)
843 {
844 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
845 	int ret;
846 	u32 val;
847 
848 	if (ov5675->identified)
849 		return 0;
850 
851 	ret = ov5675_read_reg(ov5675, OV5675_REG_CHIP_ID,
852 			      OV5675_REG_VALUE_24BIT, &val);
853 	if (ret)
854 		return ret;
855 
856 	if (val != OV5675_CHIP_ID) {
857 		dev_err(&client->dev, "chip id mismatch: %x!=%x",
858 			OV5675_CHIP_ID, val);
859 		return -ENXIO;
860 	}
861 
862 	ov5675->identified = true;
863 
864 	return 0;
865 }
866 
867 static int ov5675_start_streaming(struct ov5675 *ov5675)
868 {
869 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
870 	const struct ov5675_reg_list *reg_list;
871 	int link_freq_index, ret;
872 
873 	ret = ov5675_identify_module(ov5675);
874 	if (ret)
875 		return ret;
876 
877 	link_freq_index = ov5675->cur_mode->link_freq_index;
878 	reg_list = &link_freq_configs[link_freq_index].reg_list;
879 	ret = ov5675_write_reg_list(ov5675, reg_list);
880 	if (ret) {
881 		dev_err(&client->dev, "failed to set plls");
882 		return ret;
883 	}
884 
885 	reg_list = &ov5675->cur_mode->reg_list;
886 	ret = ov5675_write_reg_list(ov5675, reg_list);
887 	if (ret) {
888 		dev_err(&client->dev, "failed to set mode");
889 		return ret;
890 	}
891 
892 	ret = __v4l2_ctrl_handler_setup(ov5675->sd.ctrl_handler);
893 	if (ret)
894 		return ret;
895 
896 	ret = ov5675_write_reg(ov5675, OV5675_REG_MODE_SELECT,
897 			       OV5675_REG_VALUE_08BIT, OV5675_MODE_STREAMING);
898 	if (ret) {
899 		dev_err(&client->dev, "failed to set stream");
900 		return ret;
901 	}
902 
903 	return 0;
904 }
905 
906 static void ov5675_stop_streaming(struct ov5675 *ov5675)
907 {
908 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
909 
910 	if (ov5675_write_reg(ov5675, OV5675_REG_MODE_SELECT,
911 			     OV5675_REG_VALUE_08BIT, OV5675_MODE_STANDBY))
912 		dev_err(&client->dev, "failed to set stream");
913 }
914 
915 static int ov5675_set_stream(struct v4l2_subdev *sd, int enable)
916 {
917 	struct ov5675 *ov5675 = to_ov5675(sd);
918 	struct i2c_client *client = v4l2_get_subdevdata(sd);
919 	int ret = 0;
920 
921 	if (ov5675->streaming == enable)
922 		return 0;
923 
924 	mutex_lock(&ov5675->mutex);
925 	if (enable) {
926 		ret = pm_runtime_resume_and_get(&client->dev);
927 		if (ret < 0) {
928 			mutex_unlock(&ov5675->mutex);
929 			return ret;
930 		}
931 
932 		ret = ov5675_start_streaming(ov5675);
933 		if (ret) {
934 			enable = 0;
935 			ov5675_stop_streaming(ov5675);
936 			pm_runtime_put(&client->dev);
937 		}
938 	} else {
939 		ov5675_stop_streaming(ov5675);
940 		pm_runtime_put(&client->dev);
941 	}
942 
943 	ov5675->streaming = enable;
944 	mutex_unlock(&ov5675->mutex);
945 
946 	return ret;
947 }
948 
949 static int __maybe_unused ov5675_suspend(struct device *dev)
950 {
951 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
952 	struct ov5675 *ov5675 = to_ov5675(sd);
953 
954 	mutex_lock(&ov5675->mutex);
955 	if (ov5675->streaming)
956 		ov5675_stop_streaming(ov5675);
957 
958 	mutex_unlock(&ov5675->mutex);
959 
960 	return 0;
961 }
962 
963 static int __maybe_unused ov5675_resume(struct device *dev)
964 {
965 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
966 	struct ov5675 *ov5675 = to_ov5675(sd);
967 	int ret;
968 
969 	mutex_lock(&ov5675->mutex);
970 	if (ov5675->streaming) {
971 		ret = ov5675_start_streaming(ov5675);
972 		if (ret) {
973 			ov5675->streaming = false;
974 			ov5675_stop_streaming(ov5675);
975 			mutex_unlock(&ov5675->mutex);
976 			return ret;
977 		}
978 	}
979 
980 	mutex_unlock(&ov5675->mutex);
981 
982 	return 0;
983 }
984 
985 static int ov5675_set_format(struct v4l2_subdev *sd,
986 			     struct v4l2_subdev_state *sd_state,
987 			     struct v4l2_subdev_format *fmt)
988 {
989 	struct ov5675 *ov5675 = to_ov5675(sd);
990 	const struct ov5675_mode *mode;
991 	s32 vblank_def, h_blank;
992 
993 	mode = v4l2_find_nearest_size(supported_modes,
994 				      ARRAY_SIZE(supported_modes), width,
995 				      height, fmt->format.width,
996 				      fmt->format.height);
997 
998 	mutex_lock(&ov5675->mutex);
999 	ov5675_update_pad_format(mode, &fmt->format);
1000 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1001 		*v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
1002 	} else {
1003 		ov5675->cur_mode = mode;
1004 		__v4l2_ctrl_s_ctrl(ov5675->link_freq, mode->link_freq_index);
1005 		__v4l2_ctrl_s_ctrl_int64(ov5675->pixel_rate,
1006 					 to_pixel_rate(mode->link_freq_index));
1007 
1008 		/* Update limits and set FPS to default */
1009 		vblank_def = mode->vts_def - mode->height;
1010 		__v4l2_ctrl_modify_range(ov5675->vblank,
1011 					 mode->vts_min - mode->height,
1012 					 OV5675_VTS_MAX - mode->height, 1,
1013 					 vblank_def);
1014 		__v4l2_ctrl_s_ctrl(ov5675->vblank, vblank_def);
1015 		h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) -
1016 			  mode->width;
1017 		__v4l2_ctrl_modify_range(ov5675->hblank, h_blank, h_blank, 1,
1018 					 h_blank);
1019 	}
1020 
1021 	mutex_unlock(&ov5675->mutex);
1022 
1023 	return 0;
1024 }
1025 
1026 static int ov5675_get_format(struct v4l2_subdev *sd,
1027 			     struct v4l2_subdev_state *sd_state,
1028 			     struct v4l2_subdev_format *fmt)
1029 {
1030 	struct ov5675 *ov5675 = to_ov5675(sd);
1031 
1032 	mutex_lock(&ov5675->mutex);
1033 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
1034 		fmt->format = *v4l2_subdev_get_try_format(&ov5675->sd,
1035 							  sd_state,
1036 							  fmt->pad);
1037 	else
1038 		ov5675_update_pad_format(ov5675->cur_mode, &fmt->format);
1039 
1040 	mutex_unlock(&ov5675->mutex);
1041 
1042 	return 0;
1043 }
1044 
1045 static int ov5675_enum_mbus_code(struct v4l2_subdev *sd,
1046 				 struct v4l2_subdev_state *sd_state,
1047 				 struct v4l2_subdev_mbus_code_enum *code)
1048 {
1049 	if (code->index > 0)
1050 		return -EINVAL;
1051 
1052 	code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1053 
1054 	return 0;
1055 }
1056 
1057 static int ov5675_enum_frame_size(struct v4l2_subdev *sd,
1058 				  struct v4l2_subdev_state *sd_state,
1059 				  struct v4l2_subdev_frame_size_enum *fse)
1060 {
1061 	if (fse->index >= ARRAY_SIZE(supported_modes))
1062 		return -EINVAL;
1063 
1064 	if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
1065 		return -EINVAL;
1066 
1067 	fse->min_width = supported_modes[fse->index].width;
1068 	fse->max_width = fse->min_width;
1069 	fse->min_height = supported_modes[fse->index].height;
1070 	fse->max_height = fse->min_height;
1071 
1072 	return 0;
1073 }
1074 
1075 static int ov5675_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1076 {
1077 	struct ov5675 *ov5675 = to_ov5675(sd);
1078 
1079 	mutex_lock(&ov5675->mutex);
1080 	ov5675_update_pad_format(&supported_modes[0],
1081 				 v4l2_subdev_get_try_format(sd, fh->state, 0));
1082 	mutex_unlock(&ov5675->mutex);
1083 
1084 	return 0;
1085 }
1086 
1087 static const struct v4l2_subdev_video_ops ov5675_video_ops = {
1088 	.s_stream = ov5675_set_stream,
1089 };
1090 
1091 static const struct v4l2_subdev_pad_ops ov5675_pad_ops = {
1092 	.set_fmt = ov5675_set_format,
1093 	.get_fmt = ov5675_get_format,
1094 	.enum_mbus_code = ov5675_enum_mbus_code,
1095 	.enum_frame_size = ov5675_enum_frame_size,
1096 };
1097 
1098 static const struct v4l2_subdev_ops ov5675_subdev_ops = {
1099 	.video = &ov5675_video_ops,
1100 	.pad = &ov5675_pad_ops,
1101 };
1102 
1103 static const struct media_entity_operations ov5675_subdev_entity_ops = {
1104 	.link_validate = v4l2_subdev_link_validate,
1105 };
1106 
1107 static const struct v4l2_subdev_internal_ops ov5675_internal_ops = {
1108 	.open = ov5675_open,
1109 };
1110 
1111 static int ov5675_check_hwcfg(struct device *dev)
1112 {
1113 	struct fwnode_handle *ep;
1114 	struct fwnode_handle *fwnode = dev_fwnode(dev);
1115 	struct v4l2_fwnode_endpoint bus_cfg = {
1116 		.bus_type = V4L2_MBUS_CSI2_DPHY
1117 	};
1118 	u32 mclk;
1119 	int ret;
1120 	unsigned int i, j;
1121 
1122 	if (!fwnode)
1123 		return -ENXIO;
1124 
1125 	ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
1126 
1127 	if (ret) {
1128 		dev_err(dev, "can't get clock frequency");
1129 		return ret;
1130 	}
1131 
1132 	if (mclk != OV5675_MCLK) {
1133 		dev_err(dev, "external clock %d is not supported", mclk);
1134 		return -EINVAL;
1135 	}
1136 
1137 	ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
1138 	if (!ep)
1139 		return -ENXIO;
1140 
1141 	ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
1142 	fwnode_handle_put(ep);
1143 	if (ret)
1144 		return ret;
1145 
1146 	if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV5675_DATA_LANES) {
1147 		dev_err(dev, "number of CSI2 data lanes %d is not supported",
1148 			bus_cfg.bus.mipi_csi2.num_data_lanes);
1149 		ret = -EINVAL;
1150 		goto check_hwcfg_error;
1151 	}
1152 
1153 	if (!bus_cfg.nr_of_link_frequencies) {
1154 		dev_err(dev, "no link frequencies defined");
1155 		ret = -EINVAL;
1156 		goto check_hwcfg_error;
1157 	}
1158 
1159 	for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
1160 		for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
1161 			if (link_freq_menu_items[i] ==
1162 				bus_cfg.link_frequencies[j])
1163 				break;
1164 		}
1165 
1166 		if (j == bus_cfg.nr_of_link_frequencies) {
1167 			dev_err(dev, "no link frequency %lld supported",
1168 				link_freq_menu_items[i]);
1169 			ret = -EINVAL;
1170 			goto check_hwcfg_error;
1171 		}
1172 	}
1173 
1174 check_hwcfg_error:
1175 	v4l2_fwnode_endpoint_free(&bus_cfg);
1176 
1177 	return ret;
1178 }
1179 
1180 static void ov5675_remove(struct i2c_client *client)
1181 {
1182 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1183 	struct ov5675 *ov5675 = to_ov5675(sd);
1184 
1185 	v4l2_async_unregister_subdev(sd);
1186 	media_entity_cleanup(&sd->entity);
1187 	v4l2_ctrl_handler_free(sd->ctrl_handler);
1188 	pm_runtime_disable(&client->dev);
1189 	mutex_destroy(&ov5675->mutex);
1190 }
1191 
1192 static int ov5675_probe(struct i2c_client *client)
1193 {
1194 	struct ov5675 *ov5675;
1195 	bool full_power;
1196 	int ret;
1197 
1198 	ret = ov5675_check_hwcfg(&client->dev);
1199 	if (ret) {
1200 		dev_err(&client->dev, "failed to check HW configuration: %d",
1201 			ret);
1202 		return ret;
1203 	}
1204 
1205 	ov5675 = devm_kzalloc(&client->dev, sizeof(*ov5675), GFP_KERNEL);
1206 	if (!ov5675)
1207 		return -ENOMEM;
1208 
1209 	v4l2_i2c_subdev_init(&ov5675->sd, client, &ov5675_subdev_ops);
1210 
1211 	full_power = acpi_dev_state_d0(&client->dev);
1212 	if (full_power) {
1213 		ret = ov5675_identify_module(ov5675);
1214 		if (ret) {
1215 			dev_err(&client->dev, "failed to find sensor: %d", ret);
1216 			return ret;
1217 		}
1218 	}
1219 
1220 	mutex_init(&ov5675->mutex);
1221 	ov5675->cur_mode = &supported_modes[0];
1222 	ret = ov5675_init_controls(ov5675);
1223 	if (ret) {
1224 		dev_err(&client->dev, "failed to init controls: %d", ret);
1225 		goto probe_error_v4l2_ctrl_handler_free;
1226 	}
1227 
1228 	ov5675->sd.internal_ops = &ov5675_internal_ops;
1229 	ov5675->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1230 	ov5675->sd.entity.ops = &ov5675_subdev_entity_ops;
1231 	ov5675->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1232 	ov5675->pad.flags = MEDIA_PAD_FL_SOURCE;
1233 	ret = media_entity_pads_init(&ov5675->sd.entity, 1, &ov5675->pad);
1234 	if (ret) {
1235 		dev_err(&client->dev, "failed to init entity pads: %d", ret);
1236 		goto probe_error_v4l2_ctrl_handler_free;
1237 	}
1238 
1239 	ret = v4l2_async_register_subdev_sensor(&ov5675->sd);
1240 	if (ret < 0) {
1241 		dev_err(&client->dev, "failed to register V4L2 subdev: %d",
1242 			ret);
1243 		goto probe_error_media_entity_cleanup;
1244 	}
1245 
1246 	/*
1247 	 * Device is already turned on by i2c-core with ACPI domain PM.
1248 	 * Enable runtime PM and turn off the device.
1249 	 */
1250 
1251 	/* Set the device's state to active if it's in D0 state. */
1252 	if (full_power)
1253 		pm_runtime_set_active(&client->dev);
1254 	pm_runtime_enable(&client->dev);
1255 	pm_runtime_idle(&client->dev);
1256 
1257 	return 0;
1258 
1259 probe_error_media_entity_cleanup:
1260 	media_entity_cleanup(&ov5675->sd.entity);
1261 
1262 probe_error_v4l2_ctrl_handler_free:
1263 	v4l2_ctrl_handler_free(ov5675->sd.ctrl_handler);
1264 	mutex_destroy(&ov5675->mutex);
1265 
1266 	return ret;
1267 }
1268 
1269 static const struct dev_pm_ops ov5675_pm_ops = {
1270 	SET_SYSTEM_SLEEP_PM_OPS(ov5675_suspend, ov5675_resume)
1271 };
1272 
1273 #ifdef CONFIG_ACPI
1274 static const struct acpi_device_id ov5675_acpi_ids[] = {
1275 	{"OVTI5675"},
1276 	{}
1277 };
1278 
1279 MODULE_DEVICE_TABLE(acpi, ov5675_acpi_ids);
1280 #endif
1281 
1282 static struct i2c_driver ov5675_i2c_driver = {
1283 	.driver = {
1284 		.name = "ov5675",
1285 		.pm = &ov5675_pm_ops,
1286 		.acpi_match_table = ACPI_PTR(ov5675_acpi_ids),
1287 	},
1288 	.probe_new = ov5675_probe,
1289 	.remove = ov5675_remove,
1290 	.flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
1291 };
1292 
1293 module_i2c_driver(ov5675_i2c_driver);
1294 
1295 MODULE_AUTHOR("Shawn Tu <shawnx.tu@intel.com>");
1296 MODULE_DESCRIPTION("OmniVision OV5675 sensor driver");
1297 MODULE_LICENSE("GPL v2");
1298