xref: /openbmc/linux/drivers/media/i2c/ov5675.c (revision 08283d30)
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2019 Intel Corporation.
3 
4 #include <asm/unaligned.h>
5 #include <linux/acpi.h>
6 #include <linux/delay.h>
7 #include <linux/i2c.h>
8 #include <linux/module.h>
9 #include <linux/pm_runtime.h>
10 #include <media/v4l2-ctrls.h>
11 #include <media/v4l2-device.h>
12 #include <media/v4l2-fwnode.h>
13 
14 #define OV5675_REG_VALUE_08BIT		1
15 #define OV5675_REG_VALUE_16BIT		2
16 #define OV5675_REG_VALUE_24BIT		3
17 
18 #define OV5675_LINK_FREQ_450MHZ		450000000ULL
19 #define OV5675_SCLK			90000000LL
20 #define OV5675_MCLK			19200000
21 #define OV5675_DATA_LANES		2
22 #define OV5675_RGB_DEPTH		10
23 
24 #define OV5675_REG_CHIP_ID		0x300a
25 #define OV5675_CHIP_ID			0x5675
26 
27 #define OV5675_REG_MODE_SELECT		0x0100
28 #define OV5675_MODE_STANDBY		0x00
29 #define OV5675_MODE_STREAMING		0x01
30 
31 /* vertical-timings from sensor */
32 #define OV5675_REG_VTS			0x380e
33 #define OV5675_VTS_30FPS		0x07e4
34 #define OV5675_VTS_30FPS_MIN		0x07e4
35 #define OV5675_VTS_MAX			0x7fff
36 
37 /* horizontal-timings from sensor */
38 #define OV5675_REG_HTS			0x380c
39 
40 /* Exposure controls from sensor */
41 #define OV5675_REG_EXPOSURE		0x3500
42 #define	OV5675_EXPOSURE_MIN		4
43 #define OV5675_EXPOSURE_MAX_MARGIN	4
44 #define	OV5675_EXPOSURE_STEP		1
45 
46 /* Analog gain controls from sensor */
47 #define OV5675_REG_ANALOG_GAIN		0x3508
48 #define	OV5675_ANAL_GAIN_MIN		128
49 #define	OV5675_ANAL_GAIN_MAX		2047
50 #define	OV5675_ANAL_GAIN_STEP		1
51 
52 /* Digital gain controls from sensor */
53 #define OV5675_REG_MWB_R_GAIN		0x5019
54 #define OV5675_REG_MWB_G_GAIN		0x501b
55 #define OV5675_REG_MWB_B_GAIN		0x501d
56 #define OV5675_DGTL_GAIN_MIN		0
57 #define OV5675_DGTL_GAIN_MAX		4095
58 #define OV5675_DGTL_GAIN_STEP		1
59 #define OV5675_DGTL_GAIN_DEFAULT	1024
60 
61 /* Test Pattern Control */
62 #define OV5675_REG_TEST_PATTERN		0x4503
63 #define OV5675_TEST_PATTERN_ENABLE	BIT(7)
64 #define OV5675_TEST_PATTERN_BAR_SHIFT	2
65 
66 #define to_ov5675(_sd)			container_of(_sd, struct ov5675, sd)
67 
68 enum {
69 	OV5675_LINK_FREQ_900MBPS,
70 };
71 
72 struct ov5675_reg {
73 	u16 address;
74 	u8 val;
75 };
76 
77 struct ov5675_reg_list {
78 	u32 num_of_regs;
79 	const struct ov5675_reg *regs;
80 };
81 
82 struct ov5675_link_freq_config {
83 	const struct ov5675_reg_list reg_list;
84 };
85 
86 struct ov5675_mode {
87 	/* Frame width in pixels */
88 	u32 width;
89 
90 	/* Frame height in pixels */
91 	u32 height;
92 
93 	/* Horizontal timining size */
94 	u32 hts;
95 
96 	/* Default vertical timining size */
97 	u32 vts_def;
98 
99 	/* Min vertical timining size */
100 	u32 vts_min;
101 
102 	/* Link frequency needed for this resolution */
103 	u32 link_freq_index;
104 
105 	/* Sensor register settings for this resolution */
106 	const struct ov5675_reg_list reg_list;
107 };
108 
109 static const struct ov5675_reg mipi_data_rate_900mbps[] = {
110 	{0x0103, 0x01},
111 	{0x0100, 0x00},
112 	{0x0300, 0x04},
113 	{0x0302, 0x8d},
114 	{0x0303, 0x00},
115 	{0x030d, 0x26},
116 };
117 
118 static const struct ov5675_reg mode_2592x1944_regs[] = {
119 	{0x3002, 0x21},
120 	{0x3107, 0x23},
121 	{0x3501, 0x20},
122 	{0x3503, 0x0c},
123 	{0x3508, 0x03},
124 	{0x3509, 0x00},
125 	{0x3600, 0x66},
126 	{0x3602, 0x30},
127 	{0x3610, 0xa5},
128 	{0x3612, 0x93},
129 	{0x3620, 0x80},
130 	{0x3642, 0x0e},
131 	{0x3661, 0x00},
132 	{0x3662, 0x10},
133 	{0x3664, 0xf3},
134 	{0x3665, 0x9e},
135 	{0x3667, 0xa5},
136 	{0x366e, 0x55},
137 	{0x366f, 0x55},
138 	{0x3670, 0x11},
139 	{0x3671, 0x11},
140 	{0x3672, 0x11},
141 	{0x3673, 0x11},
142 	{0x3714, 0x24},
143 	{0x371a, 0x3e},
144 	{0x3733, 0x10},
145 	{0x3734, 0x00},
146 	{0x373d, 0x24},
147 	{0x3764, 0x20},
148 	{0x3765, 0x20},
149 	{0x3766, 0x12},
150 	{0x37a1, 0x14},
151 	{0x37a8, 0x1c},
152 	{0x37ab, 0x0f},
153 	{0x37c2, 0x04},
154 	{0x37cb, 0x00},
155 	{0x37cc, 0x00},
156 	{0x37cd, 0x00},
157 	{0x37ce, 0x00},
158 	{0x37d8, 0x02},
159 	{0x37d9, 0x08},
160 	{0x37dc, 0x04},
161 	{0x3800, 0x00},
162 	{0x3801, 0x00},
163 	{0x3802, 0x00},
164 	{0x3803, 0x04},
165 	{0x3804, 0x0a},
166 	{0x3805, 0x3f},
167 	{0x3806, 0x07},
168 	{0x3807, 0xb3},
169 	{0x3808, 0x0a},
170 	{0x3809, 0x20},
171 	{0x380a, 0x07},
172 	{0x380b, 0x98},
173 	{0x380c, 0x02},
174 	{0x380d, 0xee},
175 	{0x380e, 0x07},
176 	{0x380f, 0xe4},
177 	{0x3811, 0x10},
178 	{0x3813, 0x0d},
179 	{0x3814, 0x01},
180 	{0x3815, 0x01},
181 	{0x3816, 0x01},
182 	{0x3817, 0x01},
183 	{0x381e, 0x02},
184 	{0x3820, 0x88},
185 	{0x3821, 0x01},
186 	{0x3832, 0x04},
187 	{0x3c80, 0x01},
188 	{0x3c82, 0x00},
189 	{0x3c83, 0xc8},
190 	{0x3c8c, 0x0f},
191 	{0x3c8d, 0xa0},
192 	{0x3c90, 0x07},
193 	{0x3c91, 0x00},
194 	{0x3c92, 0x00},
195 	{0x3c93, 0x00},
196 	{0x3c94, 0xd0},
197 	{0x3c95, 0x50},
198 	{0x3c96, 0x35},
199 	{0x3c97, 0x00},
200 	{0x4001, 0xe0},
201 	{0x4008, 0x02},
202 	{0x4009, 0x0d},
203 	{0x400f, 0x80},
204 	{0x4013, 0x02},
205 	{0x4040, 0x00},
206 	{0x4041, 0x07},
207 	{0x404c, 0x50},
208 	{0x404e, 0x20},
209 	{0x4500, 0x06},
210 	{0x4503, 0x00},
211 	{0x450a, 0x04},
212 	{0x4809, 0x04},
213 	{0x480c, 0x12},
214 	{0x4819, 0x70},
215 	{0x4825, 0x32},
216 	{0x4826, 0x32},
217 	{0x482a, 0x06},
218 	{0x4833, 0x08},
219 	{0x4837, 0x0d},
220 	{0x5000, 0x77},
221 	{0x5b00, 0x01},
222 	{0x5b01, 0x10},
223 	{0x5b02, 0x01},
224 	{0x5b03, 0xdb},
225 	{0x5b05, 0x6c},
226 	{0x5e10, 0xfc},
227 	{0x3500, 0x00},
228 	{0x3501, 0x3E},
229 	{0x3502, 0x60},
230 	{0x3503, 0x08},
231 	{0x3508, 0x04},
232 	{0x3509, 0x00},
233 	{0x3832, 0x48},
234 	{0x5780, 0x3e},
235 	{0x5781, 0x0f},
236 	{0x5782, 0x44},
237 	{0x5783, 0x02},
238 	{0x5784, 0x01},
239 	{0x5785, 0x01},
240 	{0x5786, 0x00},
241 	{0x5787, 0x04},
242 	{0x5788, 0x02},
243 	{0x5789, 0x0f},
244 	{0x578a, 0xfd},
245 	{0x578b, 0xf5},
246 	{0x578c, 0xf5},
247 	{0x578d, 0x03},
248 	{0x578e, 0x08},
249 	{0x578f, 0x0c},
250 	{0x5790, 0x08},
251 	{0x5791, 0x06},
252 	{0x5792, 0x00},
253 	{0x5793, 0x52},
254 	{0x5794, 0xa3},
255 	{0x4003, 0x40},
256 	{0x3107, 0x01},
257 	{0x3c80, 0x08},
258 	{0x3c83, 0xb1},
259 	{0x3c8c, 0x10},
260 	{0x3c8d, 0x00},
261 	{0x3c90, 0x00},
262 	{0x3c94, 0x00},
263 	{0x3c95, 0x00},
264 	{0x3c96, 0x00},
265 	{0x37cb, 0x09},
266 	{0x37cc, 0x15},
267 	{0x37cd, 0x1f},
268 	{0x37ce, 0x1f},
269 };
270 
271 static const struct ov5675_reg mode_1296x972_regs[] = {
272 	{0x3002, 0x21},
273 	{0x3107, 0x23},
274 	{0x3501, 0x20},
275 	{0x3503, 0x0c},
276 	{0x3508, 0x03},
277 	{0x3509, 0x00},
278 	{0x3600, 0x66},
279 	{0x3602, 0x30},
280 	{0x3610, 0xa5},
281 	{0x3612, 0x93},
282 	{0x3620, 0x80},
283 	{0x3642, 0x0e},
284 	{0x3661, 0x00},
285 	{0x3662, 0x08},
286 	{0x3664, 0xf3},
287 	{0x3665, 0x9e},
288 	{0x3667, 0xa5},
289 	{0x366e, 0x55},
290 	{0x366f, 0x55},
291 	{0x3670, 0x11},
292 	{0x3671, 0x11},
293 	{0x3672, 0x11},
294 	{0x3673, 0x11},
295 	{0x3714, 0x28},
296 	{0x371a, 0x3e},
297 	{0x3733, 0x10},
298 	{0x3734, 0x00},
299 	{0x373d, 0x24},
300 	{0x3764, 0x20},
301 	{0x3765, 0x20},
302 	{0x3766, 0x12},
303 	{0x37a1, 0x14},
304 	{0x37a8, 0x1c},
305 	{0x37ab, 0x0f},
306 	{0x37c2, 0x14},
307 	{0x37cb, 0x00},
308 	{0x37cc, 0x00},
309 	{0x37cd, 0x00},
310 	{0x37ce, 0x00},
311 	{0x37d8, 0x02},
312 	{0x37d9, 0x04},
313 	{0x37dc, 0x04},
314 	{0x3800, 0x00},
315 	{0x3801, 0x00},
316 	{0x3802, 0x00},
317 	{0x3803, 0xf4},
318 	{0x3804, 0x0a},
319 	{0x3805, 0x3f},
320 	{0x3806, 0x06},
321 	{0x3807, 0xb3},
322 	{0x3808, 0x05},
323 	{0x3809, 0x00},
324 	{0x380a, 0x02},
325 	{0x380b, 0xd0},
326 	{0x380c, 0x02},
327 	{0x380d, 0xee},
328 	{0x380e, 0x07},
329 	{0x380f, 0xe4},
330 	{0x3811, 0x10},
331 	{0x3813, 0x09},
332 	{0x3814, 0x03},
333 	{0x3815, 0x01},
334 	{0x3816, 0x03},
335 	{0x3817, 0x01},
336 	{0x381e, 0x02},
337 	{0x3820, 0x8b},
338 	{0x3821, 0x01},
339 	{0x3832, 0x04},
340 	{0x3c80, 0x01},
341 	{0x3c82, 0x00},
342 	{0x3c83, 0xc8},
343 	{0x3c8c, 0x0f},
344 	{0x3c8d, 0xa0},
345 	{0x3c90, 0x07},
346 	{0x3c91, 0x00},
347 	{0x3c92, 0x00},
348 	{0x3c93, 0x00},
349 	{0x3c94, 0xd0},
350 	{0x3c95, 0x50},
351 	{0x3c96, 0x35},
352 	{0x3c97, 0x00},
353 	{0x4001, 0xe0},
354 	{0x4008, 0x00},
355 	{0x4009, 0x07},
356 	{0x400f, 0x80},
357 	{0x4013, 0x02},
358 	{0x4040, 0x00},
359 	{0x4041, 0x03},
360 	{0x404c, 0x50},
361 	{0x404e, 0x20},
362 	{0x4500, 0x06},
363 	{0x4503, 0x00},
364 	{0x450a, 0x04},
365 	{0x4809, 0x04},
366 	{0x480c, 0x12},
367 	{0x4819, 0x70},
368 	{0x4825, 0x32},
369 	{0x4826, 0x32},
370 	{0x482a, 0x06},
371 	{0x4833, 0x08},
372 	{0x4837, 0x0d},
373 	{0x5000, 0x77},
374 	{0x5b00, 0x01},
375 	{0x5b01, 0x10},
376 	{0x5b02, 0x01},
377 	{0x5b03, 0xdb},
378 	{0x5b05, 0x6c},
379 	{0x5e10, 0xfc},
380 	{0x3500, 0x00},
381 	{0x3501, 0x1F},
382 	{0x3502, 0x20},
383 	{0x3503, 0x08},
384 	{0x3508, 0x04},
385 	{0x3509, 0x00},
386 	{0x3832, 0x48},
387 	{0x5780, 0x3e},
388 	{0x5781, 0x0f},
389 	{0x5782, 0x44},
390 	{0x5783, 0x02},
391 	{0x5784, 0x01},
392 	{0x5785, 0x01},
393 	{0x5786, 0x00},
394 	{0x5787, 0x04},
395 	{0x5788, 0x02},
396 	{0x5789, 0x0f},
397 	{0x578a, 0xfd},
398 	{0x578b, 0xf5},
399 	{0x578c, 0xf5},
400 	{0x578d, 0x03},
401 	{0x578e, 0x08},
402 	{0x578f, 0x0c},
403 	{0x5790, 0x08},
404 	{0x5791, 0x06},
405 	{0x5792, 0x00},
406 	{0x5793, 0x52},
407 	{0x5794, 0xa3},
408 	{0x4003, 0x40},
409 	{0x3107, 0x01},
410 	{0x3c80, 0x08},
411 	{0x3c83, 0xb1},
412 	{0x3c8c, 0x10},
413 	{0x3c8d, 0x00},
414 	{0x3c90, 0x00},
415 	{0x3c94, 0x00},
416 	{0x3c95, 0x00},
417 	{0x3c96, 0x00},
418 	{0x37cb, 0x09},
419 	{0x37cc, 0x15},
420 	{0x37cd, 0x1f},
421 	{0x37ce, 0x1f},
422 };
423 
424 static const char * const ov5675_test_pattern_menu[] = {
425 	"Disabled",
426 	"Standard Color Bar",
427 	"Top-Bottom Darker Color Bar",
428 	"Right-Left Darker Color Bar",
429 	"Bottom-Top Darker Color Bar"
430 };
431 
432 static const s64 link_freq_menu_items[] = {
433 	OV5675_LINK_FREQ_450MHZ,
434 };
435 
436 static const struct ov5675_link_freq_config link_freq_configs[] = {
437 	[OV5675_LINK_FREQ_900MBPS] = {
438 		.reg_list = {
439 			.num_of_regs = ARRAY_SIZE(mipi_data_rate_900mbps),
440 			.regs = mipi_data_rate_900mbps,
441 		}
442 	}
443 };
444 
445 static const struct ov5675_mode supported_modes[] = {
446 	{
447 		.width = 2592,
448 		.height = 1944,
449 		.hts = 1500,
450 		.vts_def = OV5675_VTS_30FPS,
451 		.vts_min = OV5675_VTS_30FPS_MIN,
452 		.reg_list = {
453 			.num_of_regs = ARRAY_SIZE(mode_2592x1944_regs),
454 			.regs = mode_2592x1944_regs,
455 		},
456 		.link_freq_index = OV5675_LINK_FREQ_900MBPS,
457 	},
458 	{
459 		.width = 1296,
460 		.height = 972,
461 		.hts = 1500,
462 		.vts_def = OV5675_VTS_30FPS,
463 		.vts_min = OV5675_VTS_30FPS_MIN,
464 		.reg_list = {
465 			.num_of_regs = ARRAY_SIZE(mode_1296x972_regs),
466 			.regs = mode_1296x972_regs,
467 		},
468 		.link_freq_index = OV5675_LINK_FREQ_900MBPS,
469 	}
470 };
471 
472 struct ov5675 {
473 	struct v4l2_subdev sd;
474 	struct media_pad pad;
475 	struct v4l2_ctrl_handler ctrl_handler;
476 
477 	/* V4L2 Controls */
478 	struct v4l2_ctrl *link_freq;
479 	struct v4l2_ctrl *pixel_rate;
480 	struct v4l2_ctrl *vblank;
481 	struct v4l2_ctrl *hblank;
482 	struct v4l2_ctrl *exposure;
483 
484 	/* Current mode */
485 	const struct ov5675_mode *cur_mode;
486 
487 	/* To serialize asynchronus callbacks */
488 	struct mutex mutex;
489 
490 	/* Streaming on/off */
491 	bool streaming;
492 };
493 
494 static u64 to_pixel_rate(u32 f_index)
495 {
496 	u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV5675_DATA_LANES;
497 
498 	do_div(pixel_rate, OV5675_RGB_DEPTH);
499 
500 	return pixel_rate;
501 }
502 
503 static u64 to_pixels_per_line(u32 hts, u32 f_index)
504 {
505 	u64 ppl = hts * to_pixel_rate(f_index);
506 
507 	do_div(ppl, OV5675_SCLK);
508 
509 	return ppl;
510 }
511 
512 static int ov5675_read_reg(struct ov5675 *ov5675, u16 reg, u16 len, u32 *val)
513 {
514 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
515 	struct i2c_msg msgs[2];
516 	u8 addr_buf[2];
517 	u8 data_buf[4] = {0};
518 	int ret;
519 
520 	if (len > 4)
521 		return -EINVAL;
522 
523 	put_unaligned_be16(reg, addr_buf);
524 	msgs[0].addr = client->addr;
525 	msgs[0].flags = 0;
526 	msgs[0].len = sizeof(addr_buf);
527 	msgs[0].buf = addr_buf;
528 	msgs[1].addr = client->addr;
529 	msgs[1].flags = I2C_M_RD;
530 	msgs[1].len = len;
531 	msgs[1].buf = &data_buf[4 - len];
532 
533 	ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
534 	if (ret != ARRAY_SIZE(msgs))
535 		return -EIO;
536 
537 	*val = get_unaligned_be32(data_buf);
538 
539 	return 0;
540 }
541 
542 static int ov5675_write_reg(struct ov5675 *ov5675, u16 reg, u16 len, u32 val)
543 {
544 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
545 	u8 buf[6];
546 
547 	if (len > 4)
548 		return -EINVAL;
549 
550 	put_unaligned_be16(reg, buf);
551 	put_unaligned_be32(val << 8 * (4 - len), buf + 2);
552 	if (i2c_master_send(client, buf, len + 2) != len + 2)
553 		return -EIO;
554 
555 	return 0;
556 }
557 
558 static int ov5675_write_reg_list(struct ov5675 *ov5675,
559 				 const struct ov5675_reg_list *r_list)
560 {
561 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
562 	unsigned int i;
563 	int ret;
564 
565 	for (i = 0; i < r_list->num_of_regs; i++) {
566 		ret = ov5675_write_reg(ov5675, r_list->regs[i].address, 1,
567 				       r_list->regs[i].val);
568 		if (ret) {
569 			dev_err_ratelimited(&client->dev,
570 				    "failed to write reg 0x%4.4x. error = %d",
571 				    r_list->regs[i].address, ret);
572 			return ret;
573 		}
574 	}
575 
576 	return 0;
577 }
578 
579 static int ov5675_update_digital_gain(struct ov5675 *ov5675, u32 d_gain)
580 {
581 	int ret;
582 
583 	ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_R_GAIN,
584 			       OV5675_REG_VALUE_16BIT, d_gain);
585 	if (ret)
586 		return ret;
587 
588 	ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_G_GAIN,
589 			       OV5675_REG_VALUE_16BIT, d_gain);
590 	if (ret)
591 		return ret;
592 
593 	return ov5675_write_reg(ov5675, OV5675_REG_MWB_B_GAIN,
594 				OV5675_REG_VALUE_16BIT, d_gain);
595 }
596 
597 static int ov5675_test_pattern(struct ov5675 *ov5675, u32 pattern)
598 {
599 	if (pattern)
600 		pattern = (pattern - 1) << OV5675_TEST_PATTERN_BAR_SHIFT |
601 			  OV5675_TEST_PATTERN_ENABLE;
602 
603 	return ov5675_write_reg(ov5675, OV5675_REG_TEST_PATTERN,
604 				OV5675_REG_VALUE_08BIT, pattern);
605 }
606 
607 static int ov5675_set_ctrl(struct v4l2_ctrl *ctrl)
608 {
609 	struct ov5675 *ov5675 = container_of(ctrl->handler,
610 					     struct ov5675, ctrl_handler);
611 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
612 	s64 exposure_max;
613 	int ret = 0;
614 
615 	/* Propagate change of current control to all related controls */
616 	if (ctrl->id == V4L2_CID_VBLANK) {
617 		/* Update max exposure while meeting expected vblanking */
618 		exposure_max = (ov5675->cur_mode->height + ctrl->val -
619 			       OV5675_EXPOSURE_MAX_MARGIN) / 2;
620 		__v4l2_ctrl_modify_range(ov5675->exposure,
621 					 ov5675->exposure->minimum,
622 					 exposure_max, ov5675->exposure->step,
623 					 exposure_max);
624 	}
625 
626 	/* V4L2 controls values will be applied only when power is already up */
627 	if (!pm_runtime_get_if_in_use(&client->dev))
628 		return 0;
629 
630 	switch (ctrl->id) {
631 	case V4L2_CID_ANALOGUE_GAIN:
632 		ret = ov5675_write_reg(ov5675, OV5675_REG_ANALOG_GAIN,
633 				       OV5675_REG_VALUE_16BIT, ctrl->val);
634 		break;
635 
636 	case V4L2_CID_DIGITAL_GAIN:
637 		ret = ov5675_update_digital_gain(ov5675, ctrl->val);
638 		break;
639 
640 	case V4L2_CID_EXPOSURE:
641 		/* 3 least significant bits of expsoure are fractional part */
642 		ret = ov5675_write_reg(ov5675, OV5675_REG_EXPOSURE,
643 				       OV5675_REG_VALUE_24BIT, ctrl->val << 3);
644 		break;
645 
646 	case V4L2_CID_VBLANK:
647 		ret = ov5675_write_reg(ov5675, OV5675_REG_VTS,
648 				       OV5675_REG_VALUE_16BIT,
649 				       ov5675->cur_mode->height + ctrl->val +
650 				       10);
651 		break;
652 
653 	case V4L2_CID_TEST_PATTERN:
654 		ret = ov5675_test_pattern(ov5675, ctrl->val);
655 		break;
656 
657 	default:
658 		ret = -EINVAL;
659 		break;
660 	}
661 
662 	pm_runtime_put(&client->dev);
663 
664 	return ret;
665 }
666 
667 static const struct v4l2_ctrl_ops ov5675_ctrl_ops = {
668 	.s_ctrl = ov5675_set_ctrl,
669 };
670 
671 static int ov5675_init_controls(struct ov5675 *ov5675)
672 {
673 	struct v4l2_ctrl_handler *ctrl_hdlr;
674 	s64 exposure_max, h_blank;
675 	int ret;
676 
677 	ctrl_hdlr = &ov5675->ctrl_handler;
678 	ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
679 	if (ret)
680 		return ret;
681 
682 	ctrl_hdlr->lock = &ov5675->mutex;
683 	ov5675->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov5675_ctrl_ops,
684 					   V4L2_CID_LINK_FREQ,
685 					   ARRAY_SIZE(link_freq_menu_items) - 1,
686 					   0, link_freq_menu_items);
687 	if (ov5675->link_freq)
688 		ov5675->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
689 
690 	ov5675->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
691 				       V4L2_CID_PIXEL_RATE, 0,
692 				       to_pixel_rate(OV5675_LINK_FREQ_900MBPS),
693 				       1,
694 				       to_pixel_rate(OV5675_LINK_FREQ_900MBPS));
695 	ov5675->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
696 			  V4L2_CID_VBLANK,
697 			  ov5675->cur_mode->vts_min - ov5675->cur_mode->height,
698 			  OV5675_VTS_MAX - ov5675->cur_mode->height, 1,
699 			  ov5675->cur_mode->vts_def - ov5675->cur_mode->height);
700 	h_blank = to_pixels_per_line(ov5675->cur_mode->hts,
701 		  ov5675->cur_mode->link_freq_index) - ov5675->cur_mode->width;
702 	ov5675->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
703 					   V4L2_CID_HBLANK, h_blank, h_blank, 1,
704 					   h_blank);
705 	if (ov5675->hblank)
706 		ov5675->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
707 
708 	v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
709 			  OV5675_ANAL_GAIN_MIN, OV5675_ANAL_GAIN_MAX,
710 			  OV5675_ANAL_GAIN_STEP, OV5675_ANAL_GAIN_MIN);
711 	v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
712 			  OV5675_DGTL_GAIN_MIN, OV5675_DGTL_GAIN_MAX,
713 			  OV5675_DGTL_GAIN_STEP, OV5675_DGTL_GAIN_DEFAULT);
714 	exposure_max = (ov5675->cur_mode->vts_def -
715 			OV5675_EXPOSURE_MAX_MARGIN) / 2;
716 	ov5675->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
717 					     V4L2_CID_EXPOSURE,
718 					     OV5675_EXPOSURE_MIN, exposure_max,
719 					     OV5675_EXPOSURE_STEP,
720 					     exposure_max);
721 	v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov5675_ctrl_ops,
722 				     V4L2_CID_TEST_PATTERN,
723 				     ARRAY_SIZE(ov5675_test_pattern_menu) - 1,
724 				     0, 0, ov5675_test_pattern_menu);
725 	if (ctrl_hdlr->error)
726 		return ctrl_hdlr->error;
727 
728 	ov5675->sd.ctrl_handler = ctrl_hdlr;
729 
730 	return 0;
731 }
732 
733 static void ov5675_update_pad_format(const struct ov5675_mode *mode,
734 				     struct v4l2_mbus_framefmt *fmt)
735 {
736 	fmt->width = mode->width;
737 	fmt->height = mode->height;
738 	fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
739 	fmt->field = V4L2_FIELD_NONE;
740 }
741 
742 static int ov5675_start_streaming(struct ov5675 *ov5675)
743 {
744 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
745 	const struct ov5675_reg_list *reg_list;
746 	int link_freq_index, ret;
747 
748 	link_freq_index = ov5675->cur_mode->link_freq_index;
749 	reg_list = &link_freq_configs[link_freq_index].reg_list;
750 	ret = ov5675_write_reg_list(ov5675, reg_list);
751 	if (ret) {
752 		dev_err(&client->dev, "failed to set plls");
753 		return ret;
754 	}
755 
756 	reg_list = &ov5675->cur_mode->reg_list;
757 	ret = ov5675_write_reg_list(ov5675, reg_list);
758 	if (ret) {
759 		dev_err(&client->dev, "failed to set mode");
760 		return ret;
761 	}
762 
763 	ret = __v4l2_ctrl_handler_setup(ov5675->sd.ctrl_handler);
764 	if (ret)
765 		return ret;
766 
767 	ret = ov5675_write_reg(ov5675, OV5675_REG_MODE_SELECT,
768 			       OV5675_REG_VALUE_08BIT, OV5675_MODE_STREAMING);
769 	if (ret) {
770 		dev_err(&client->dev, "failed to set stream");
771 		return ret;
772 	}
773 
774 	return 0;
775 }
776 
777 static void ov5675_stop_streaming(struct ov5675 *ov5675)
778 {
779 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
780 
781 	if (ov5675_write_reg(ov5675, OV5675_REG_MODE_SELECT,
782 			     OV5675_REG_VALUE_08BIT, OV5675_MODE_STANDBY))
783 		dev_err(&client->dev, "failed to set stream");
784 }
785 
786 static int ov5675_set_stream(struct v4l2_subdev *sd, int enable)
787 {
788 	struct ov5675 *ov5675 = to_ov5675(sd);
789 	struct i2c_client *client = v4l2_get_subdevdata(sd);
790 	int ret = 0;
791 
792 	if (ov5675->streaming == enable)
793 		return 0;
794 
795 	mutex_lock(&ov5675->mutex);
796 	if (enable) {
797 		ret = pm_runtime_get_sync(&client->dev);
798 		if (ret < 0) {
799 			pm_runtime_put_noidle(&client->dev);
800 			mutex_unlock(&ov5675->mutex);
801 			return ret;
802 		}
803 
804 		ret = ov5675_start_streaming(ov5675);
805 		if (ret) {
806 			enable = 0;
807 			ov5675_stop_streaming(ov5675);
808 			pm_runtime_put(&client->dev);
809 		}
810 	} else {
811 		ov5675_stop_streaming(ov5675);
812 		pm_runtime_put(&client->dev);
813 	}
814 
815 	ov5675->streaming = enable;
816 	mutex_unlock(&ov5675->mutex);
817 
818 	return ret;
819 }
820 
821 static int __maybe_unused ov5675_suspend(struct device *dev)
822 {
823 	struct i2c_client *client = to_i2c_client(dev);
824 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
825 	struct ov5675 *ov5675 = to_ov5675(sd);
826 
827 	mutex_lock(&ov5675->mutex);
828 	if (ov5675->streaming)
829 		ov5675_stop_streaming(ov5675);
830 
831 	mutex_unlock(&ov5675->mutex);
832 
833 	return 0;
834 }
835 
836 static int __maybe_unused ov5675_resume(struct device *dev)
837 {
838 	struct i2c_client *client = to_i2c_client(dev);
839 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
840 	struct ov5675 *ov5675 = to_ov5675(sd);
841 	int ret;
842 
843 	mutex_lock(&ov5675->mutex);
844 	if (ov5675->streaming) {
845 		ret = ov5675_start_streaming(ov5675);
846 		if (ret) {
847 			ov5675->streaming = false;
848 			ov5675_stop_streaming(ov5675);
849 			mutex_unlock(&ov5675->mutex);
850 			return ret;
851 		}
852 	}
853 
854 	mutex_unlock(&ov5675->mutex);
855 
856 	return 0;
857 }
858 
859 static int ov5675_set_format(struct v4l2_subdev *sd,
860 			     struct v4l2_subdev_pad_config *cfg,
861 			     struct v4l2_subdev_format *fmt)
862 {
863 	struct ov5675 *ov5675 = to_ov5675(sd);
864 	const struct ov5675_mode *mode;
865 	s32 vblank_def, h_blank;
866 
867 	mode = v4l2_find_nearest_size(supported_modes,
868 				      ARRAY_SIZE(supported_modes), width,
869 				      height, fmt->format.width,
870 				      fmt->format.height);
871 
872 	mutex_lock(&ov5675->mutex);
873 	ov5675_update_pad_format(mode, &fmt->format);
874 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
875 		*v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
876 	} else {
877 		ov5675->cur_mode = mode;
878 		__v4l2_ctrl_s_ctrl(ov5675->link_freq, mode->link_freq_index);
879 		__v4l2_ctrl_s_ctrl_int64(ov5675->pixel_rate,
880 					 to_pixel_rate(mode->link_freq_index));
881 
882 		/* Update limits and set FPS to default */
883 		vblank_def = mode->vts_def - mode->height;
884 		__v4l2_ctrl_modify_range(ov5675->vblank,
885 					 mode->vts_min - mode->height,
886 					 OV5675_VTS_MAX - mode->height, 1,
887 					 vblank_def);
888 		__v4l2_ctrl_s_ctrl(ov5675->vblank, vblank_def);
889 		h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) -
890 			  mode->width;
891 		__v4l2_ctrl_modify_range(ov5675->hblank, h_blank, h_blank, 1,
892 					 h_blank);
893 	}
894 
895 	mutex_unlock(&ov5675->mutex);
896 
897 	return 0;
898 }
899 
900 static int ov5675_get_format(struct v4l2_subdev *sd,
901 			     struct v4l2_subdev_pad_config *cfg,
902 			     struct v4l2_subdev_format *fmt)
903 {
904 	struct ov5675 *ov5675 = to_ov5675(sd);
905 
906 	mutex_lock(&ov5675->mutex);
907 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
908 		fmt->format = *v4l2_subdev_get_try_format(&ov5675->sd, cfg,
909 							  fmt->pad);
910 	else
911 		ov5675_update_pad_format(ov5675->cur_mode, &fmt->format);
912 
913 	mutex_unlock(&ov5675->mutex);
914 
915 	return 0;
916 }
917 
918 static int ov5675_enum_mbus_code(struct v4l2_subdev *sd,
919 				 struct v4l2_subdev_pad_config *cfg,
920 				 struct v4l2_subdev_mbus_code_enum *code)
921 {
922 	if (code->index > 0)
923 		return -EINVAL;
924 
925 	code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
926 
927 	return 0;
928 }
929 
930 static int ov5675_enum_frame_size(struct v4l2_subdev *sd,
931 				  struct v4l2_subdev_pad_config *cfg,
932 				  struct v4l2_subdev_frame_size_enum *fse)
933 {
934 	if (fse->index >= ARRAY_SIZE(supported_modes))
935 		return -EINVAL;
936 
937 	if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
938 		return -EINVAL;
939 
940 	fse->min_width = supported_modes[fse->index].width;
941 	fse->max_width = fse->min_width;
942 	fse->min_height = supported_modes[fse->index].height;
943 	fse->max_height = fse->min_height;
944 
945 	return 0;
946 }
947 
948 static int ov5675_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
949 {
950 	struct ov5675 *ov5675 = to_ov5675(sd);
951 
952 	mutex_lock(&ov5675->mutex);
953 	ov5675_update_pad_format(&supported_modes[0],
954 				 v4l2_subdev_get_try_format(sd, fh->pad, 0));
955 	mutex_unlock(&ov5675->mutex);
956 
957 	return 0;
958 }
959 
960 static const struct v4l2_subdev_video_ops ov5675_video_ops = {
961 	.s_stream = ov5675_set_stream,
962 };
963 
964 static const struct v4l2_subdev_pad_ops ov5675_pad_ops = {
965 	.set_fmt = ov5675_set_format,
966 	.get_fmt = ov5675_get_format,
967 	.enum_mbus_code = ov5675_enum_mbus_code,
968 	.enum_frame_size = ov5675_enum_frame_size,
969 };
970 
971 static const struct v4l2_subdev_ops ov5675_subdev_ops = {
972 	.video = &ov5675_video_ops,
973 	.pad = &ov5675_pad_ops,
974 };
975 
976 static const struct media_entity_operations ov5675_subdev_entity_ops = {
977 	.link_validate = v4l2_subdev_link_validate,
978 };
979 
980 static const struct v4l2_subdev_internal_ops ov5675_internal_ops = {
981 	.open = ov5675_open,
982 };
983 
984 static int ov5675_identify_module(struct ov5675 *ov5675)
985 {
986 	struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
987 	int ret;
988 	u32 val;
989 
990 	ret = ov5675_read_reg(ov5675, OV5675_REG_CHIP_ID,
991 			      OV5675_REG_VALUE_24BIT, &val);
992 	if (ret)
993 		return ret;
994 
995 	if (val != OV5675_CHIP_ID) {
996 		dev_err(&client->dev, "chip id mismatch: %x!=%x",
997 			OV5675_CHIP_ID, val);
998 		return -ENXIO;
999 	}
1000 
1001 	return 0;
1002 }
1003 
1004 static int ov5675_check_hwcfg(struct device *dev)
1005 {
1006 	struct fwnode_handle *ep;
1007 	struct fwnode_handle *fwnode = dev_fwnode(dev);
1008 	struct v4l2_fwnode_endpoint bus_cfg = {
1009 		.bus_type = V4L2_MBUS_CSI2_DPHY
1010 	};
1011 	u32 mclk;
1012 	int ret;
1013 	unsigned int i, j;
1014 
1015 	if (!fwnode)
1016 		return -ENXIO;
1017 
1018 	ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
1019 
1020 	if (ret) {
1021 		dev_err(dev, "can't get clock frequency");
1022 		return ret;
1023 	}
1024 
1025 	if (mclk != OV5675_MCLK) {
1026 		dev_err(dev, "external clock %d is not supported", mclk);
1027 		return -EINVAL;
1028 	}
1029 
1030 	ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
1031 	if (!ep)
1032 		return -ENXIO;
1033 
1034 	ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
1035 	fwnode_handle_put(ep);
1036 	if (ret)
1037 		return ret;
1038 
1039 	if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV5675_DATA_LANES) {
1040 		dev_err(dev, "number of CSI2 data lanes %d is not supported",
1041 			bus_cfg.bus.mipi_csi2.num_data_lanes);
1042 		ret = -EINVAL;
1043 		goto check_hwcfg_error;
1044 	}
1045 
1046 	if (!bus_cfg.nr_of_link_frequencies) {
1047 		dev_err(dev, "no link frequencies defined");
1048 		ret = -EINVAL;
1049 		goto check_hwcfg_error;
1050 	}
1051 
1052 	for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
1053 		for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
1054 			if (link_freq_menu_items[i] ==
1055 				bus_cfg.link_frequencies[j])
1056 				break;
1057 		}
1058 
1059 		if (j == bus_cfg.nr_of_link_frequencies) {
1060 			dev_err(dev, "no link frequency %lld supported",
1061 				link_freq_menu_items[i]);
1062 			ret = -EINVAL;
1063 			goto check_hwcfg_error;
1064 		}
1065 	}
1066 
1067 check_hwcfg_error:
1068 	v4l2_fwnode_endpoint_free(&bus_cfg);
1069 
1070 	return ret;
1071 }
1072 
1073 static int ov5675_remove(struct i2c_client *client)
1074 {
1075 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1076 	struct ov5675 *ov5675 = to_ov5675(sd);
1077 
1078 	v4l2_async_unregister_subdev(sd);
1079 	media_entity_cleanup(&sd->entity);
1080 	v4l2_ctrl_handler_free(sd->ctrl_handler);
1081 	pm_runtime_disable(&client->dev);
1082 	mutex_destroy(&ov5675->mutex);
1083 
1084 	return 0;
1085 }
1086 
1087 static int ov5675_probe(struct i2c_client *client)
1088 {
1089 	struct ov5675 *ov5675;
1090 	int ret;
1091 
1092 	ret = ov5675_check_hwcfg(&client->dev);
1093 	if (ret) {
1094 		dev_err(&client->dev, "failed to check HW configuration: %d",
1095 			ret);
1096 		return ret;
1097 	}
1098 
1099 	ov5675 = devm_kzalloc(&client->dev, sizeof(*ov5675), GFP_KERNEL);
1100 	if (!ov5675)
1101 		return -ENOMEM;
1102 
1103 	v4l2_i2c_subdev_init(&ov5675->sd, client, &ov5675_subdev_ops);
1104 	ret = ov5675_identify_module(ov5675);
1105 	if (ret) {
1106 		dev_err(&client->dev, "failed to find sensor: %d", ret);
1107 		return ret;
1108 	}
1109 
1110 	mutex_init(&ov5675->mutex);
1111 	ov5675->cur_mode = &supported_modes[0];
1112 	ret = ov5675_init_controls(ov5675);
1113 	if (ret) {
1114 		dev_err(&client->dev, "failed to init controls: %d", ret);
1115 		goto probe_error_v4l2_ctrl_handler_free;
1116 	}
1117 
1118 	ov5675->sd.internal_ops = &ov5675_internal_ops;
1119 	ov5675->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1120 	ov5675->sd.entity.ops = &ov5675_subdev_entity_ops;
1121 	ov5675->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1122 	ov5675->pad.flags = MEDIA_PAD_FL_SOURCE;
1123 	ret = media_entity_pads_init(&ov5675->sd.entity, 1, &ov5675->pad);
1124 	if (ret) {
1125 		dev_err(&client->dev, "failed to init entity pads: %d", ret);
1126 		goto probe_error_v4l2_ctrl_handler_free;
1127 	}
1128 
1129 	ret = v4l2_async_register_subdev_sensor_common(&ov5675->sd);
1130 	if (ret < 0) {
1131 		dev_err(&client->dev, "failed to register V4L2 subdev: %d",
1132 			ret);
1133 		goto probe_error_media_entity_cleanup;
1134 	}
1135 
1136 	/*
1137 	 * Device is already turned on by i2c-core with ACPI domain PM.
1138 	 * Enable runtime PM and turn off the device.
1139 	 */
1140 	pm_runtime_set_active(&client->dev);
1141 	pm_runtime_enable(&client->dev);
1142 	pm_runtime_idle(&client->dev);
1143 
1144 	return 0;
1145 
1146 probe_error_media_entity_cleanup:
1147 	media_entity_cleanup(&ov5675->sd.entity);
1148 
1149 probe_error_v4l2_ctrl_handler_free:
1150 	v4l2_ctrl_handler_free(ov5675->sd.ctrl_handler);
1151 	mutex_destroy(&ov5675->mutex);
1152 
1153 	return ret;
1154 }
1155 
1156 static const struct dev_pm_ops ov5675_pm_ops = {
1157 	SET_SYSTEM_SLEEP_PM_OPS(ov5675_suspend, ov5675_resume)
1158 };
1159 
1160 #ifdef CONFIG_ACPI
1161 static const struct acpi_device_id ov5675_acpi_ids[] = {
1162 	{"OVTI5675"},
1163 	{}
1164 };
1165 
1166 MODULE_DEVICE_TABLE(acpi, ov5675_acpi_ids);
1167 #endif
1168 
1169 static struct i2c_driver ov5675_i2c_driver = {
1170 	.driver = {
1171 		.name = "ov5675",
1172 		.pm = &ov5675_pm_ops,
1173 		.acpi_match_table = ACPI_PTR(ov5675_acpi_ids),
1174 	},
1175 	.probe_new = ov5675_probe,
1176 	.remove = ov5675_remove,
1177 };
1178 
1179 module_i2c_driver(ov5675_i2c_driver);
1180 
1181 MODULE_AUTHOR("Shawn Tu <shawnx.tu@intel.com>");
1182 MODULE_DESCRIPTION("OmniVision OV5675 sensor driver");
1183 MODULE_LICENSE("GPL v2");
1184