1 /* 2 * Driver for the OV5645 camera sensor. 3 * 4 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved. 5 * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved. 6 * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved. 7 * 8 * Based on: 9 * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org: 10 * https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/ 11 * media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41 12 * - the OV5640 driver posted on linux-media: 13 * https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html 14 */ 15 16 /* 17 * This program is free software; you can redistribute it and/or modify 18 * it under the terms of the GNU General Public License as published by 19 * the Free Software Foundation; either version 2 of the License, or 20 * (at your option) any later version. 21 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 */ 27 28 #include <linux/bitops.h> 29 #include <linux/clk.h> 30 #include <linux/delay.h> 31 #include <linux/device.h> 32 #include <linux/gpio/consumer.h> 33 #include <linux/i2c.h> 34 #include <linux/init.h> 35 #include <linux/module.h> 36 #include <linux/of.h> 37 #include <linux/of_graph.h> 38 #include <linux/regulator/consumer.h> 39 #include <linux/slab.h> 40 #include <linux/types.h> 41 #include <media/v4l2-ctrls.h> 42 #include <media/v4l2-of.h> 43 #include <media/v4l2-subdev.h> 44 45 #define OV5645_VOLTAGE_ANALOG 2800000 46 #define OV5645_VOLTAGE_DIGITAL_CORE 1500000 47 #define OV5645_VOLTAGE_DIGITAL_IO 1800000 48 49 #define OV5645_SYSTEM_CTRL0 0x3008 50 #define OV5645_SYSTEM_CTRL0_START 0x02 51 #define OV5645_SYSTEM_CTRL0_STOP 0x42 52 #define OV5645_CHIP_ID_HIGH 0x300a 53 #define OV5645_CHIP_ID_HIGH_BYTE 0x56 54 #define OV5645_CHIP_ID_LOW 0x300b 55 #define OV5645_CHIP_ID_LOW_BYTE 0x45 56 #define OV5645_AWB_MANUAL_CONTROL 0x3406 57 #define OV5645_AWB_MANUAL_ENABLE BIT(0) 58 #define OV5645_AEC_PK_MANUAL 0x3503 59 #define OV5645_AEC_MANUAL_ENABLE BIT(0) 60 #define OV5645_AGC_MANUAL_ENABLE BIT(1) 61 #define OV5645_TIMING_TC_REG20 0x3820 62 #define OV5645_SENSOR_VFLIP BIT(1) 63 #define OV5645_ISP_VFLIP BIT(2) 64 #define OV5645_TIMING_TC_REG21 0x3821 65 #define OV5645_SENSOR_MIRROR BIT(1) 66 #define OV5645_PRE_ISP_TEST_SETTING_1 0x503d 67 #define OV5645_TEST_PATTERN_MASK 0x3 68 #define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK) 69 #define OV5645_TEST_PATTERN_ENABLE BIT(7) 70 #define OV5645_SDE_SAT_U 0x5583 71 #define OV5645_SDE_SAT_V 0x5584 72 73 struct reg_value { 74 u16 reg; 75 u8 val; 76 }; 77 78 struct ov5645_mode_info { 79 u32 width; 80 u32 height; 81 const struct reg_value *data; 82 u32 data_size; 83 }; 84 85 struct ov5645 { 86 struct i2c_client *i2c_client; 87 struct device *dev; 88 struct v4l2_subdev sd; 89 struct media_pad pad; 90 struct v4l2_of_endpoint ep; 91 struct v4l2_mbus_framefmt fmt; 92 struct v4l2_rect crop; 93 struct clk *xclk; 94 95 struct regulator *io_regulator; 96 struct regulator *core_regulator; 97 struct regulator *analog_regulator; 98 99 const struct ov5645_mode_info *current_mode; 100 101 struct v4l2_ctrl_handler ctrls; 102 103 /* Cached register values */ 104 u8 aec_pk_manual; 105 u8 timing_tc_reg20; 106 u8 timing_tc_reg21; 107 108 struct mutex power_lock; /* lock to protect power state */ 109 int power_count; 110 111 struct gpio_desc *enable_gpio; 112 struct gpio_desc *rst_gpio; 113 }; 114 115 static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd) 116 { 117 return container_of(sd, struct ov5645, sd); 118 } 119 120 static const struct reg_value ov5645_global_init_setting[] = { 121 { 0x3103, 0x11 }, 122 { 0x3008, 0x82 }, 123 { 0x3008, 0x42 }, 124 { 0x3103, 0x03 }, 125 { 0x3503, 0x07 }, 126 { 0x3002, 0x1c }, 127 { 0x3006, 0xc3 }, 128 { 0x300e, 0x45 }, 129 { 0x3017, 0x00 }, 130 { 0x3018, 0x00 }, 131 { 0x302e, 0x0b }, 132 { 0x3037, 0x13 }, 133 { 0x3108, 0x01 }, 134 { 0x3611, 0x06 }, 135 { 0x3500, 0x00 }, 136 { 0x3501, 0x01 }, 137 { 0x3502, 0x00 }, 138 { 0x350a, 0x00 }, 139 { 0x350b, 0x3f }, 140 { 0x3620, 0x33 }, 141 { 0x3621, 0xe0 }, 142 { 0x3622, 0x01 }, 143 { 0x3630, 0x2e }, 144 { 0x3631, 0x00 }, 145 { 0x3632, 0x32 }, 146 { 0x3633, 0x52 }, 147 { 0x3634, 0x70 }, 148 { 0x3635, 0x13 }, 149 { 0x3636, 0x03 }, 150 { 0x3703, 0x5a }, 151 { 0x3704, 0xa0 }, 152 { 0x3705, 0x1a }, 153 { 0x3709, 0x12 }, 154 { 0x370b, 0x61 }, 155 { 0x370f, 0x10 }, 156 { 0x3715, 0x78 }, 157 { 0x3717, 0x01 }, 158 { 0x371b, 0x20 }, 159 { 0x3731, 0x12 }, 160 { 0x3901, 0x0a }, 161 { 0x3905, 0x02 }, 162 { 0x3906, 0x10 }, 163 { 0x3719, 0x86 }, 164 { 0x3810, 0x00 }, 165 { 0x3811, 0x10 }, 166 { 0x3812, 0x00 }, 167 { 0x3821, 0x01 }, 168 { 0x3824, 0x01 }, 169 { 0x3826, 0x03 }, 170 { 0x3828, 0x08 }, 171 { 0x3a19, 0xf8 }, 172 { 0x3c01, 0x34 }, 173 { 0x3c04, 0x28 }, 174 { 0x3c05, 0x98 }, 175 { 0x3c07, 0x07 }, 176 { 0x3c09, 0xc2 }, 177 { 0x3c0a, 0x9c }, 178 { 0x3c0b, 0x40 }, 179 { 0x3c01, 0x34 }, 180 { 0x4001, 0x02 }, 181 { 0x4514, 0x00 }, 182 { 0x4520, 0xb0 }, 183 { 0x460b, 0x37 }, 184 { 0x460c, 0x20 }, 185 { 0x4818, 0x01 }, 186 { 0x481d, 0xf0 }, 187 { 0x481f, 0x50 }, 188 { 0x4823, 0x70 }, 189 { 0x4831, 0x14 }, 190 { 0x5000, 0xa7 }, 191 { 0x5001, 0x83 }, 192 { 0x501d, 0x00 }, 193 { 0x501f, 0x00 }, 194 { 0x503d, 0x00 }, 195 { 0x505c, 0x30 }, 196 { 0x5181, 0x59 }, 197 { 0x5183, 0x00 }, 198 { 0x5191, 0xf0 }, 199 { 0x5192, 0x03 }, 200 { 0x5684, 0x10 }, 201 { 0x5685, 0xa0 }, 202 { 0x5686, 0x0c }, 203 { 0x5687, 0x78 }, 204 { 0x5a00, 0x08 }, 205 { 0x5a21, 0x00 }, 206 { 0x5a24, 0x00 }, 207 { 0x3008, 0x02 }, 208 { 0x3503, 0x00 }, 209 { 0x5180, 0xff }, 210 { 0x5181, 0xf2 }, 211 { 0x5182, 0x00 }, 212 { 0x5183, 0x14 }, 213 { 0x5184, 0x25 }, 214 { 0x5185, 0x24 }, 215 { 0x5186, 0x09 }, 216 { 0x5187, 0x09 }, 217 { 0x5188, 0x0a }, 218 { 0x5189, 0x75 }, 219 { 0x518a, 0x52 }, 220 { 0x518b, 0xea }, 221 { 0x518c, 0xa8 }, 222 { 0x518d, 0x42 }, 223 { 0x518e, 0x38 }, 224 { 0x518f, 0x56 }, 225 { 0x5190, 0x42 }, 226 { 0x5191, 0xf8 }, 227 { 0x5192, 0x04 }, 228 { 0x5193, 0x70 }, 229 { 0x5194, 0xf0 }, 230 { 0x5195, 0xf0 }, 231 { 0x5196, 0x03 }, 232 { 0x5197, 0x01 }, 233 { 0x5198, 0x04 }, 234 { 0x5199, 0x12 }, 235 { 0x519a, 0x04 }, 236 { 0x519b, 0x00 }, 237 { 0x519c, 0x06 }, 238 { 0x519d, 0x82 }, 239 { 0x519e, 0x38 }, 240 { 0x5381, 0x1e }, 241 { 0x5382, 0x5b }, 242 { 0x5383, 0x08 }, 243 { 0x5384, 0x0a }, 244 { 0x5385, 0x7e }, 245 { 0x5386, 0x88 }, 246 { 0x5387, 0x7c }, 247 { 0x5388, 0x6c }, 248 { 0x5389, 0x10 }, 249 { 0x538a, 0x01 }, 250 { 0x538b, 0x98 }, 251 { 0x5300, 0x08 }, 252 { 0x5301, 0x30 }, 253 { 0x5302, 0x10 }, 254 { 0x5303, 0x00 }, 255 { 0x5304, 0x08 }, 256 { 0x5305, 0x30 }, 257 { 0x5306, 0x08 }, 258 { 0x5307, 0x16 }, 259 { 0x5309, 0x08 }, 260 { 0x530a, 0x30 }, 261 { 0x530b, 0x04 }, 262 { 0x530c, 0x06 }, 263 { 0x5480, 0x01 }, 264 { 0x5481, 0x08 }, 265 { 0x5482, 0x14 }, 266 { 0x5483, 0x28 }, 267 { 0x5484, 0x51 }, 268 { 0x5485, 0x65 }, 269 { 0x5486, 0x71 }, 270 { 0x5487, 0x7d }, 271 { 0x5488, 0x87 }, 272 { 0x5489, 0x91 }, 273 { 0x548a, 0x9a }, 274 { 0x548b, 0xaa }, 275 { 0x548c, 0xb8 }, 276 { 0x548d, 0xcd }, 277 { 0x548e, 0xdd }, 278 { 0x548f, 0xea }, 279 { 0x5490, 0x1d }, 280 { 0x5580, 0x02 }, 281 { 0x5583, 0x40 }, 282 { 0x5584, 0x10 }, 283 { 0x5589, 0x10 }, 284 { 0x558a, 0x00 }, 285 { 0x558b, 0xf8 }, 286 { 0x5800, 0x3f }, 287 { 0x5801, 0x16 }, 288 { 0x5802, 0x0e }, 289 { 0x5803, 0x0d }, 290 { 0x5804, 0x17 }, 291 { 0x5805, 0x3f }, 292 { 0x5806, 0x0b }, 293 { 0x5807, 0x06 }, 294 { 0x5808, 0x04 }, 295 { 0x5809, 0x04 }, 296 { 0x580a, 0x06 }, 297 { 0x580b, 0x0b }, 298 { 0x580c, 0x09 }, 299 { 0x580d, 0x03 }, 300 { 0x580e, 0x00 }, 301 { 0x580f, 0x00 }, 302 { 0x5810, 0x03 }, 303 { 0x5811, 0x08 }, 304 { 0x5812, 0x0a }, 305 { 0x5813, 0x03 }, 306 { 0x5814, 0x00 }, 307 { 0x5815, 0x00 }, 308 { 0x5816, 0x04 }, 309 { 0x5817, 0x09 }, 310 { 0x5818, 0x0f }, 311 { 0x5819, 0x08 }, 312 { 0x581a, 0x06 }, 313 { 0x581b, 0x06 }, 314 { 0x581c, 0x08 }, 315 { 0x581d, 0x0c }, 316 { 0x581e, 0x3f }, 317 { 0x581f, 0x1e }, 318 { 0x5820, 0x12 }, 319 { 0x5821, 0x13 }, 320 { 0x5822, 0x21 }, 321 { 0x5823, 0x3f }, 322 { 0x5824, 0x68 }, 323 { 0x5825, 0x28 }, 324 { 0x5826, 0x2c }, 325 { 0x5827, 0x28 }, 326 { 0x5828, 0x08 }, 327 { 0x5829, 0x48 }, 328 { 0x582a, 0x64 }, 329 { 0x582b, 0x62 }, 330 { 0x582c, 0x64 }, 331 { 0x582d, 0x28 }, 332 { 0x582e, 0x46 }, 333 { 0x582f, 0x62 }, 334 { 0x5830, 0x60 }, 335 { 0x5831, 0x62 }, 336 { 0x5832, 0x26 }, 337 { 0x5833, 0x48 }, 338 { 0x5834, 0x66 }, 339 { 0x5835, 0x44 }, 340 { 0x5836, 0x64 }, 341 { 0x5837, 0x28 }, 342 { 0x5838, 0x66 }, 343 { 0x5839, 0x48 }, 344 { 0x583a, 0x2c }, 345 { 0x583b, 0x28 }, 346 { 0x583c, 0x26 }, 347 { 0x583d, 0xae }, 348 { 0x5025, 0x00 }, 349 { 0x3a0f, 0x30 }, 350 { 0x3a10, 0x28 }, 351 { 0x3a1b, 0x30 }, 352 { 0x3a1e, 0x26 }, 353 { 0x3a11, 0x60 }, 354 { 0x3a1f, 0x14 }, 355 { 0x0601, 0x02 }, 356 { 0x3008, 0x42 }, 357 { 0x3008, 0x02 } 358 }; 359 360 static const struct reg_value ov5645_setting_sxga[] = { 361 { 0x3612, 0xa9 }, 362 { 0x3614, 0x50 }, 363 { 0x3618, 0x00 }, 364 { 0x3034, 0x18 }, 365 { 0x3035, 0x21 }, 366 { 0x3036, 0x70 }, 367 { 0x3600, 0x09 }, 368 { 0x3601, 0x43 }, 369 { 0x3708, 0x66 }, 370 { 0x370c, 0xc3 }, 371 { 0x3800, 0x00 }, 372 { 0x3801, 0x00 }, 373 { 0x3802, 0x00 }, 374 { 0x3803, 0x06 }, 375 { 0x3804, 0x0a }, 376 { 0x3805, 0x3f }, 377 { 0x3806, 0x07 }, 378 { 0x3807, 0x9d }, 379 { 0x3808, 0x05 }, 380 { 0x3809, 0x00 }, 381 { 0x380a, 0x03 }, 382 { 0x380b, 0xc0 }, 383 { 0x380c, 0x07 }, 384 { 0x380d, 0x68 }, 385 { 0x380e, 0x03 }, 386 { 0x380f, 0xd8 }, 387 { 0x3813, 0x06 }, 388 { 0x3814, 0x31 }, 389 { 0x3815, 0x31 }, 390 { 0x3820, 0x47 }, 391 { 0x3a02, 0x03 }, 392 { 0x3a03, 0xd8 }, 393 { 0x3a08, 0x01 }, 394 { 0x3a09, 0xf8 }, 395 { 0x3a0a, 0x01 }, 396 { 0x3a0b, 0xa4 }, 397 { 0x3a0e, 0x02 }, 398 { 0x3a0d, 0x02 }, 399 { 0x3a14, 0x03 }, 400 { 0x3a15, 0xd8 }, 401 { 0x3a18, 0x00 }, 402 { 0x4004, 0x02 }, 403 { 0x4005, 0x18 }, 404 { 0x4300, 0x32 }, 405 { 0x4202, 0x00 } 406 }; 407 408 static const struct reg_value ov5645_setting_1080p[] = { 409 { 0x3612, 0xab }, 410 { 0x3614, 0x50 }, 411 { 0x3618, 0x04 }, 412 { 0x3034, 0x18 }, 413 { 0x3035, 0x11 }, 414 { 0x3036, 0x54 }, 415 { 0x3600, 0x08 }, 416 { 0x3601, 0x33 }, 417 { 0x3708, 0x63 }, 418 { 0x370c, 0xc0 }, 419 { 0x3800, 0x01 }, 420 { 0x3801, 0x50 }, 421 { 0x3802, 0x01 }, 422 { 0x3803, 0xb2 }, 423 { 0x3804, 0x08 }, 424 { 0x3805, 0xef }, 425 { 0x3806, 0x05 }, 426 { 0x3807, 0xf1 }, 427 { 0x3808, 0x07 }, 428 { 0x3809, 0x80 }, 429 { 0x380a, 0x04 }, 430 { 0x380b, 0x38 }, 431 { 0x380c, 0x09 }, 432 { 0x380d, 0xc4 }, 433 { 0x380e, 0x04 }, 434 { 0x380f, 0x60 }, 435 { 0x3813, 0x04 }, 436 { 0x3814, 0x11 }, 437 { 0x3815, 0x11 }, 438 { 0x3820, 0x47 }, 439 { 0x4514, 0x88 }, 440 { 0x3a02, 0x04 }, 441 { 0x3a03, 0x60 }, 442 { 0x3a08, 0x01 }, 443 { 0x3a09, 0x50 }, 444 { 0x3a0a, 0x01 }, 445 { 0x3a0b, 0x18 }, 446 { 0x3a0e, 0x03 }, 447 { 0x3a0d, 0x04 }, 448 { 0x3a14, 0x04 }, 449 { 0x3a15, 0x60 }, 450 { 0x3a18, 0x00 }, 451 { 0x4004, 0x06 }, 452 { 0x4005, 0x18 }, 453 { 0x4300, 0x32 }, 454 { 0x4202, 0x00 }, 455 { 0x4837, 0x0b } 456 }; 457 458 static const struct reg_value ov5645_setting_full[] = { 459 { 0x3612, 0xab }, 460 { 0x3614, 0x50 }, 461 { 0x3618, 0x04 }, 462 { 0x3034, 0x18 }, 463 { 0x3035, 0x11 }, 464 { 0x3036, 0x54 }, 465 { 0x3600, 0x08 }, 466 { 0x3601, 0x33 }, 467 { 0x3708, 0x63 }, 468 { 0x370c, 0xc0 }, 469 { 0x3800, 0x00 }, 470 { 0x3801, 0x00 }, 471 { 0x3802, 0x00 }, 472 { 0x3803, 0x00 }, 473 { 0x3804, 0x0a }, 474 { 0x3805, 0x3f }, 475 { 0x3806, 0x07 }, 476 { 0x3807, 0x9f }, 477 { 0x3808, 0x0a }, 478 { 0x3809, 0x20 }, 479 { 0x380a, 0x07 }, 480 { 0x380b, 0x98 }, 481 { 0x380c, 0x0b }, 482 { 0x380d, 0x1c }, 483 { 0x380e, 0x07 }, 484 { 0x380f, 0xb0 }, 485 { 0x3813, 0x06 }, 486 { 0x3814, 0x11 }, 487 { 0x3815, 0x11 }, 488 { 0x3820, 0x47 }, 489 { 0x4514, 0x88 }, 490 { 0x3a02, 0x07 }, 491 { 0x3a03, 0xb0 }, 492 { 0x3a08, 0x01 }, 493 { 0x3a09, 0x27 }, 494 { 0x3a0a, 0x00 }, 495 { 0x3a0b, 0xf6 }, 496 { 0x3a0e, 0x06 }, 497 { 0x3a0d, 0x08 }, 498 { 0x3a14, 0x07 }, 499 { 0x3a15, 0xb0 }, 500 { 0x3a18, 0x01 }, 501 { 0x4004, 0x06 }, 502 { 0x4005, 0x18 }, 503 { 0x4300, 0x32 }, 504 { 0x4837, 0x0b }, 505 { 0x4202, 0x00 } 506 }; 507 508 static const struct ov5645_mode_info ov5645_mode_info_data[] = { 509 { 510 .width = 1280, 511 .height = 960, 512 .data = ov5645_setting_sxga, 513 .data_size = ARRAY_SIZE(ov5645_setting_sxga) 514 }, 515 { 516 .width = 1920, 517 .height = 1080, 518 .data = ov5645_setting_1080p, 519 .data_size = ARRAY_SIZE(ov5645_setting_1080p) 520 }, 521 { 522 .width = 2592, 523 .height = 1944, 524 .data = ov5645_setting_full, 525 .data_size = ARRAY_SIZE(ov5645_setting_full) 526 }, 527 }; 528 529 static int ov5645_regulators_enable(struct ov5645 *ov5645) 530 { 531 int ret; 532 533 ret = regulator_enable(ov5645->io_regulator); 534 if (ret < 0) { 535 dev_err(ov5645->dev, "set io voltage failed\n"); 536 return ret; 537 } 538 539 ret = regulator_enable(ov5645->analog_regulator); 540 if (ret) { 541 dev_err(ov5645->dev, "set analog voltage failed\n"); 542 goto err_disable_io; 543 } 544 545 ret = regulator_enable(ov5645->core_regulator); 546 if (ret) { 547 dev_err(ov5645->dev, "set core voltage failed\n"); 548 goto err_disable_analog; 549 } 550 551 return 0; 552 553 err_disable_analog: 554 regulator_disable(ov5645->analog_regulator); 555 err_disable_io: 556 regulator_disable(ov5645->io_regulator); 557 558 return ret; 559 } 560 561 static void ov5645_regulators_disable(struct ov5645 *ov5645) 562 { 563 int ret; 564 565 ret = regulator_disable(ov5645->core_regulator); 566 if (ret < 0) 567 dev_err(ov5645->dev, "core regulator disable failed\n"); 568 569 ret = regulator_disable(ov5645->analog_regulator); 570 if (ret < 0) 571 dev_err(ov5645->dev, "analog regulator disable failed\n"); 572 573 ret = regulator_disable(ov5645->io_regulator); 574 if (ret < 0) 575 dev_err(ov5645->dev, "io regulator disable failed\n"); 576 } 577 578 static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val) 579 { 580 u8 regbuf[3]; 581 int ret; 582 583 regbuf[0] = reg >> 8; 584 regbuf[1] = reg & 0xff; 585 regbuf[2] = val; 586 587 ret = i2c_master_send(ov5645->i2c_client, regbuf, 3); 588 if (ret < 0) 589 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n", 590 __func__, ret, reg, val); 591 592 return ret; 593 } 594 595 static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val) 596 { 597 u8 regbuf[2]; 598 int ret; 599 600 regbuf[0] = reg >> 8; 601 regbuf[1] = reg & 0xff; 602 603 ret = i2c_master_send(ov5645->i2c_client, regbuf, 2); 604 if (ret < 0) { 605 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n", 606 __func__, ret, reg); 607 return ret; 608 } 609 610 ret = i2c_master_recv(ov5645->i2c_client, val, 1); 611 if (ret < 0) { 612 dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n", 613 __func__, ret, reg); 614 return ret; 615 } 616 617 return 0; 618 } 619 620 static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode) 621 { 622 u8 val = ov5645->aec_pk_manual; 623 int ret; 624 625 if (mode == V4L2_EXPOSURE_AUTO) 626 val &= ~OV5645_AEC_MANUAL_ENABLE; 627 else /* V4L2_EXPOSURE_MANUAL */ 628 val |= OV5645_AEC_MANUAL_ENABLE; 629 630 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val); 631 if (!ret) 632 ov5645->aec_pk_manual = val; 633 634 return ret; 635 } 636 637 static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable) 638 { 639 u8 val = ov5645->aec_pk_manual; 640 int ret; 641 642 if (enable) 643 val &= ~OV5645_AGC_MANUAL_ENABLE; 644 else 645 val |= OV5645_AGC_MANUAL_ENABLE; 646 647 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val); 648 if (!ret) 649 ov5645->aec_pk_manual = val; 650 651 return ret; 652 } 653 654 static int ov5645_set_register_array(struct ov5645 *ov5645, 655 const struct reg_value *settings, 656 unsigned int num_settings) 657 { 658 unsigned int i; 659 int ret; 660 661 for (i = 0; i < num_settings; ++i, ++settings) { 662 ret = ov5645_write_reg(ov5645, settings->reg, settings->val); 663 if (ret < 0) 664 return ret; 665 } 666 667 return 0; 668 } 669 670 static int ov5645_set_power_on(struct ov5645 *ov5645) 671 { 672 int ret; 673 674 ret = ov5645_regulators_enable(ov5645); 675 if (ret < 0) { 676 return ret; 677 } 678 679 ret = clk_prepare_enable(ov5645->xclk); 680 if (ret < 0) { 681 dev_err(ov5645->dev, "clk prepare enable failed\n"); 682 ov5645_regulators_disable(ov5645); 683 return ret; 684 } 685 686 usleep_range(5000, 15000); 687 gpiod_set_value_cansleep(ov5645->enable_gpio, 1); 688 689 usleep_range(1000, 2000); 690 gpiod_set_value_cansleep(ov5645->rst_gpio, 0); 691 692 msleep(20); 693 694 return 0; 695 } 696 697 static void ov5645_set_power_off(struct ov5645 *ov5645) 698 { 699 gpiod_set_value_cansleep(ov5645->rst_gpio, 1); 700 gpiod_set_value_cansleep(ov5645->enable_gpio, 0); 701 clk_disable_unprepare(ov5645->xclk); 702 ov5645_regulators_disable(ov5645); 703 } 704 705 static int ov5645_s_power(struct v4l2_subdev *sd, int on) 706 { 707 struct ov5645 *ov5645 = to_ov5645(sd); 708 int ret = 0; 709 710 mutex_lock(&ov5645->power_lock); 711 712 /* If the power count is modified from 0 to != 0 or from != 0 to 0, 713 * update the power state. 714 */ 715 if (ov5645->power_count == !on) { 716 if (on) { 717 ret = ov5645_set_power_on(ov5645); 718 if (ret < 0) 719 goto exit; 720 721 ret = ov5645_set_register_array(ov5645, 722 ov5645_global_init_setting, 723 ARRAY_SIZE(ov5645_global_init_setting)); 724 if (ret < 0) { 725 dev_err(ov5645->dev, 726 "could not set init registers\n"); 727 ov5645_set_power_off(ov5645); 728 goto exit; 729 } 730 731 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0, 732 OV5645_SYSTEM_CTRL0_STOP); 733 if (ret < 0) { 734 ov5645_set_power_off(ov5645); 735 goto exit; 736 } 737 } else { 738 ov5645_set_power_off(ov5645); 739 } 740 } 741 742 /* Update the power count. */ 743 ov5645->power_count += on ? 1 : -1; 744 WARN_ON(ov5645->power_count < 0); 745 746 exit: 747 mutex_unlock(&ov5645->power_lock); 748 749 return ret; 750 } 751 752 static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value) 753 { 754 u32 reg_value = (value * 0x10) + 0x40; 755 int ret; 756 757 ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value); 758 if (ret < 0) 759 return ret; 760 761 return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value); 762 } 763 764 static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value) 765 { 766 u8 val = ov5645->timing_tc_reg21; 767 int ret; 768 769 if (value == 0) 770 val &= ~(OV5645_SENSOR_MIRROR); 771 else 772 val |= (OV5645_SENSOR_MIRROR); 773 774 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val); 775 if (!ret) 776 ov5645->timing_tc_reg21 = val; 777 778 return ret; 779 } 780 781 static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value) 782 { 783 u8 val = ov5645->timing_tc_reg20; 784 int ret; 785 786 if (value == 0) 787 val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP); 788 else 789 val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP); 790 791 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val); 792 if (!ret) 793 ov5645->timing_tc_reg20 = val; 794 795 return ret; 796 } 797 798 static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value) 799 { 800 u8 val = 0; 801 802 if (value) { 803 val = OV5645_SET_TEST_PATTERN(value - 1); 804 val |= OV5645_TEST_PATTERN_ENABLE; 805 } 806 807 return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val); 808 } 809 810 static const char * const ov5645_test_pattern_menu[] = { 811 "Disabled", 812 "Vertical Color Bars", 813 "Pseudo-Random Data", 814 "Color Square", 815 "Black Image", 816 }; 817 818 static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto) 819 { 820 u8 val = 0; 821 822 if (!enable_auto) 823 val = OV5645_AWB_MANUAL_ENABLE; 824 825 return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val); 826 } 827 828 static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl) 829 { 830 struct ov5645 *ov5645 = container_of(ctrl->handler, 831 struct ov5645, ctrls); 832 int ret; 833 834 mutex_lock(&ov5645->power_lock); 835 if (!ov5645->power_count) { 836 mutex_unlock(&ov5645->power_lock); 837 return 0; 838 } 839 840 switch (ctrl->id) { 841 case V4L2_CID_SATURATION: 842 ret = ov5645_set_saturation(ov5645, ctrl->val); 843 break; 844 case V4L2_CID_AUTO_WHITE_BALANCE: 845 ret = ov5645_set_awb(ov5645, ctrl->val); 846 break; 847 case V4L2_CID_AUTOGAIN: 848 ret = ov5645_set_agc_mode(ov5645, ctrl->val); 849 break; 850 case V4L2_CID_EXPOSURE_AUTO: 851 ret = ov5645_set_aec_mode(ov5645, ctrl->val); 852 break; 853 case V4L2_CID_TEST_PATTERN: 854 ret = ov5645_set_test_pattern(ov5645, ctrl->val); 855 break; 856 case V4L2_CID_HFLIP: 857 ret = ov5645_set_hflip(ov5645, ctrl->val); 858 break; 859 case V4L2_CID_VFLIP: 860 ret = ov5645_set_vflip(ov5645, ctrl->val); 861 break; 862 default: 863 ret = -EINVAL; 864 break; 865 } 866 867 mutex_unlock(&ov5645->power_lock); 868 869 return ret; 870 } 871 872 static struct v4l2_ctrl_ops ov5645_ctrl_ops = { 873 .s_ctrl = ov5645_s_ctrl, 874 }; 875 876 static int ov5645_enum_mbus_code(struct v4l2_subdev *sd, 877 struct v4l2_subdev_pad_config *cfg, 878 struct v4l2_subdev_mbus_code_enum *code) 879 { 880 if (code->index > 0) 881 return -EINVAL; 882 883 code->code = MEDIA_BUS_FMT_UYVY8_2X8; 884 885 return 0; 886 } 887 888 static int ov5645_enum_frame_size(struct v4l2_subdev *subdev, 889 struct v4l2_subdev_pad_config *cfg, 890 struct v4l2_subdev_frame_size_enum *fse) 891 { 892 if (fse->code != MEDIA_BUS_FMT_UYVY8_2X8) 893 return -EINVAL; 894 895 if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data)) 896 return -EINVAL; 897 898 fse->min_width = ov5645_mode_info_data[fse->index].width; 899 fse->max_width = ov5645_mode_info_data[fse->index].width; 900 fse->min_height = ov5645_mode_info_data[fse->index].height; 901 fse->max_height = ov5645_mode_info_data[fse->index].height; 902 903 return 0; 904 } 905 906 static struct v4l2_mbus_framefmt * 907 __ov5645_get_pad_format(struct ov5645 *ov5645, 908 struct v4l2_subdev_pad_config *cfg, 909 unsigned int pad, 910 enum v4l2_subdev_format_whence which) 911 { 912 switch (which) { 913 case V4L2_SUBDEV_FORMAT_TRY: 914 return v4l2_subdev_get_try_format(&ov5645->sd, cfg, pad); 915 case V4L2_SUBDEV_FORMAT_ACTIVE: 916 return &ov5645->fmt; 917 default: 918 return NULL; 919 } 920 } 921 922 static int ov5645_get_format(struct v4l2_subdev *sd, 923 struct v4l2_subdev_pad_config *cfg, 924 struct v4l2_subdev_format *format) 925 { 926 struct ov5645 *ov5645 = to_ov5645(sd); 927 928 format->format = *__ov5645_get_pad_format(ov5645, cfg, format->pad, 929 format->which); 930 return 0; 931 } 932 933 static struct v4l2_rect * 934 __ov5645_get_pad_crop(struct ov5645 *ov5645, struct v4l2_subdev_pad_config *cfg, 935 unsigned int pad, enum v4l2_subdev_format_whence which) 936 { 937 switch (which) { 938 case V4L2_SUBDEV_FORMAT_TRY: 939 return v4l2_subdev_get_try_crop(&ov5645->sd, cfg, pad); 940 case V4L2_SUBDEV_FORMAT_ACTIVE: 941 return &ov5645->crop; 942 default: 943 return NULL; 944 } 945 } 946 947 static const struct ov5645_mode_info * 948 ov5645_find_nearest_mode(unsigned int width, unsigned int height) 949 { 950 int i; 951 952 for (i = ARRAY_SIZE(ov5645_mode_info_data) - 1; i >= 0; i--) { 953 if (ov5645_mode_info_data[i].width <= width && 954 ov5645_mode_info_data[i].height <= height) 955 break; 956 } 957 958 if (i < 0) 959 i = 0; 960 961 return &ov5645_mode_info_data[i]; 962 } 963 964 static int ov5645_set_format(struct v4l2_subdev *sd, 965 struct v4l2_subdev_pad_config *cfg, 966 struct v4l2_subdev_format *format) 967 { 968 struct ov5645 *ov5645 = to_ov5645(sd); 969 struct v4l2_mbus_framefmt *__format; 970 struct v4l2_rect *__crop; 971 const struct ov5645_mode_info *new_mode; 972 973 __crop = __ov5645_get_pad_crop(ov5645, cfg, format->pad, 974 format->which); 975 976 new_mode = ov5645_find_nearest_mode(format->format.width, 977 format->format.height); 978 __crop->width = new_mode->width; 979 __crop->height = new_mode->height; 980 981 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) 982 ov5645->current_mode = new_mode; 983 984 __format = __ov5645_get_pad_format(ov5645, cfg, format->pad, 985 format->which); 986 __format->width = __crop->width; 987 __format->height = __crop->height; 988 __format->code = MEDIA_BUS_FMT_UYVY8_2X8; 989 __format->field = V4L2_FIELD_NONE; 990 __format->colorspace = V4L2_COLORSPACE_SRGB; 991 992 format->format = *__format; 993 994 return 0; 995 } 996 997 static int ov5645_entity_init_cfg(struct v4l2_subdev *subdev, 998 struct v4l2_subdev_pad_config *cfg) 999 { 1000 struct v4l2_subdev_format fmt = { 0 }; 1001 1002 fmt.which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; 1003 fmt.format.width = 1920; 1004 fmt.format.height = 1080; 1005 1006 ov5645_set_format(subdev, cfg, &fmt); 1007 1008 return 0; 1009 } 1010 1011 static int ov5645_get_selection(struct v4l2_subdev *sd, 1012 struct v4l2_subdev_pad_config *cfg, 1013 struct v4l2_subdev_selection *sel) 1014 { 1015 struct ov5645 *ov5645 = to_ov5645(sd); 1016 1017 if (sel->target != V4L2_SEL_TGT_CROP) 1018 return -EINVAL; 1019 1020 sel->r = *__ov5645_get_pad_crop(ov5645, cfg, sel->pad, 1021 sel->which); 1022 return 0; 1023 } 1024 1025 static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable) 1026 { 1027 struct ov5645 *ov5645 = to_ov5645(subdev); 1028 int ret; 1029 1030 if (enable) { 1031 ret = ov5645_set_register_array(ov5645, 1032 ov5645->current_mode->data, 1033 ov5645->current_mode->data_size); 1034 if (ret < 0) { 1035 dev_err(ov5645->dev, "could not set mode %dx%d\n", 1036 ov5645->current_mode->width, 1037 ov5645->current_mode->height); 1038 return ret; 1039 } 1040 ret = v4l2_ctrl_handler_setup(&ov5645->ctrls); 1041 if (ret < 0) { 1042 dev_err(ov5645->dev, "could not sync v4l2 controls\n"); 1043 return ret; 1044 } 1045 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0, 1046 OV5645_SYSTEM_CTRL0_START); 1047 if (ret < 0) 1048 return ret; 1049 } else { 1050 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0, 1051 OV5645_SYSTEM_CTRL0_STOP); 1052 if (ret < 0) 1053 return ret; 1054 } 1055 1056 return 0; 1057 } 1058 1059 static const struct v4l2_subdev_core_ops ov5645_core_ops = { 1060 .s_power = ov5645_s_power, 1061 }; 1062 1063 static const struct v4l2_subdev_video_ops ov5645_video_ops = { 1064 .s_stream = ov5645_s_stream, 1065 }; 1066 1067 static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = { 1068 .init_cfg = ov5645_entity_init_cfg, 1069 .enum_mbus_code = ov5645_enum_mbus_code, 1070 .enum_frame_size = ov5645_enum_frame_size, 1071 .get_fmt = ov5645_get_format, 1072 .set_fmt = ov5645_set_format, 1073 .get_selection = ov5645_get_selection, 1074 }; 1075 1076 static const struct v4l2_subdev_ops ov5645_subdev_ops = { 1077 .core = &ov5645_core_ops, 1078 .video = &ov5645_video_ops, 1079 .pad = &ov5645_subdev_pad_ops, 1080 }; 1081 1082 static int ov5645_probe(struct i2c_client *client, 1083 const struct i2c_device_id *id) 1084 { 1085 struct device *dev = &client->dev; 1086 struct device_node *endpoint; 1087 struct ov5645 *ov5645; 1088 u8 chip_id_high, chip_id_low; 1089 u32 xclk_freq; 1090 int ret; 1091 1092 ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL); 1093 if (!ov5645) 1094 return -ENOMEM; 1095 1096 ov5645->i2c_client = client; 1097 ov5645->dev = dev; 1098 1099 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL); 1100 if (!endpoint) { 1101 dev_err(dev, "endpoint node not found\n"); 1102 return -EINVAL; 1103 } 1104 1105 ret = v4l2_of_parse_endpoint(endpoint, &ov5645->ep); 1106 if (ret < 0) { 1107 dev_err(dev, "parsing endpoint node failed\n"); 1108 return ret; 1109 } 1110 1111 of_node_put(endpoint); 1112 1113 if (ov5645->ep.bus_type != V4L2_MBUS_CSI2) { 1114 dev_err(dev, "invalid bus type, must be CSI2\n"); 1115 return -EINVAL; 1116 } 1117 1118 /* get system clock (xclk) */ 1119 ov5645->xclk = devm_clk_get(dev, "xclk"); 1120 if (IS_ERR(ov5645->xclk)) { 1121 dev_err(dev, "could not get xclk"); 1122 return PTR_ERR(ov5645->xclk); 1123 } 1124 1125 ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq); 1126 if (ret) { 1127 dev_err(dev, "could not get xclk frequency\n"); 1128 return ret; 1129 } 1130 1131 if (xclk_freq != 23880000) { 1132 dev_err(dev, "external clock frequency %u is not supported\n", 1133 xclk_freq); 1134 return -EINVAL; 1135 } 1136 1137 ret = clk_set_rate(ov5645->xclk, xclk_freq); 1138 if (ret) { 1139 dev_err(dev, "could not set xclk frequency\n"); 1140 return ret; 1141 } 1142 1143 ov5645->io_regulator = devm_regulator_get(dev, "vdddo"); 1144 if (IS_ERR(ov5645->io_regulator)) { 1145 dev_err(dev, "cannot get io regulator\n"); 1146 return PTR_ERR(ov5645->io_regulator); 1147 } 1148 1149 ret = regulator_set_voltage(ov5645->io_regulator, 1150 OV5645_VOLTAGE_DIGITAL_IO, 1151 OV5645_VOLTAGE_DIGITAL_IO); 1152 if (ret < 0) { 1153 dev_err(dev, "cannot set io voltage\n"); 1154 return ret; 1155 } 1156 1157 ov5645->core_regulator = devm_regulator_get(dev, "vddd"); 1158 if (IS_ERR(ov5645->core_regulator)) { 1159 dev_err(dev, "cannot get core regulator\n"); 1160 return PTR_ERR(ov5645->core_regulator); 1161 } 1162 1163 ret = regulator_set_voltage(ov5645->core_regulator, 1164 OV5645_VOLTAGE_DIGITAL_CORE, 1165 OV5645_VOLTAGE_DIGITAL_CORE); 1166 if (ret < 0) { 1167 dev_err(dev, "cannot set core voltage\n"); 1168 return ret; 1169 } 1170 1171 ov5645->analog_regulator = devm_regulator_get(dev, "vdda"); 1172 if (IS_ERR(ov5645->analog_regulator)) { 1173 dev_err(dev, "cannot get analog regulator\n"); 1174 return PTR_ERR(ov5645->analog_regulator); 1175 } 1176 1177 ret = regulator_set_voltage(ov5645->analog_regulator, 1178 OV5645_VOLTAGE_ANALOG, 1179 OV5645_VOLTAGE_ANALOG); 1180 if (ret < 0) { 1181 dev_err(dev, "cannot set analog voltage\n"); 1182 return ret; 1183 } 1184 1185 ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH); 1186 if (IS_ERR(ov5645->enable_gpio)) { 1187 dev_err(dev, "cannot get enable gpio\n"); 1188 return PTR_ERR(ov5645->enable_gpio); 1189 } 1190 1191 ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); 1192 if (IS_ERR(ov5645->rst_gpio)) { 1193 dev_err(dev, "cannot get reset gpio\n"); 1194 return PTR_ERR(ov5645->rst_gpio); 1195 } 1196 1197 mutex_init(&ov5645->power_lock); 1198 1199 v4l2_ctrl_handler_init(&ov5645->ctrls, 7); 1200 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, 1201 V4L2_CID_SATURATION, -4, 4, 1, 0); 1202 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, 1203 V4L2_CID_HFLIP, 0, 1, 1, 0); 1204 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, 1205 V4L2_CID_VFLIP, 0, 1, 1, 0); 1206 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, 1207 V4L2_CID_AUTOGAIN, 0, 1, 1, 1); 1208 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, 1209 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1); 1210 v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops, 1211 V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, 1212 0, V4L2_EXPOSURE_AUTO); 1213 v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops, 1214 V4L2_CID_TEST_PATTERN, 1215 ARRAY_SIZE(ov5645_test_pattern_menu) - 1, 1216 0, 0, ov5645_test_pattern_menu); 1217 1218 ov5645->sd.ctrl_handler = &ov5645->ctrls; 1219 1220 if (ov5645->ctrls.error) { 1221 dev_err(dev, "%s: control initialization error %d\n", 1222 __func__, ov5645->ctrls.error); 1223 ret = ov5645->ctrls.error; 1224 goto free_ctrl; 1225 } 1226 1227 v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops); 1228 ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 1229 ov5645->pad.flags = MEDIA_PAD_FL_SOURCE; 1230 ov5645->sd.dev = &client->dev; 1231 1232 ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad); 1233 if (ret < 0) { 1234 dev_err(dev, "could not register media entity\n"); 1235 goto free_ctrl; 1236 } 1237 1238 ret = ov5645_s_power(&ov5645->sd, true); 1239 if (ret < 0) { 1240 dev_err(dev, "could not power up OV5645\n"); 1241 goto free_entity; 1242 } 1243 1244 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high); 1245 if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) { 1246 dev_err(dev, "could not read ID high\n"); 1247 ret = -ENODEV; 1248 goto power_down; 1249 } 1250 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low); 1251 if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) { 1252 dev_err(dev, "could not read ID low\n"); 1253 ret = -ENODEV; 1254 goto power_down; 1255 } 1256 1257 dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr); 1258 1259 ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL, 1260 &ov5645->aec_pk_manual); 1261 if (ret < 0) { 1262 dev_err(dev, "could not read AEC/AGC mode\n"); 1263 ret = -ENODEV; 1264 goto power_down; 1265 } 1266 1267 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20, 1268 &ov5645->timing_tc_reg20); 1269 if (ret < 0) { 1270 dev_err(dev, "could not read vflip value\n"); 1271 ret = -ENODEV; 1272 goto power_down; 1273 } 1274 1275 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21, 1276 &ov5645->timing_tc_reg21); 1277 if (ret < 0) { 1278 dev_err(dev, "could not read hflip value\n"); 1279 ret = -ENODEV; 1280 goto power_down; 1281 } 1282 1283 ov5645_s_power(&ov5645->sd, false); 1284 1285 ret = v4l2_async_register_subdev(&ov5645->sd); 1286 if (ret < 0) { 1287 dev_err(dev, "could not register v4l2 device\n"); 1288 goto free_entity; 1289 } 1290 1291 ov5645_entity_init_cfg(&ov5645->sd, NULL); 1292 1293 return 0; 1294 1295 power_down: 1296 ov5645_s_power(&ov5645->sd, false); 1297 free_entity: 1298 media_entity_cleanup(&ov5645->sd.entity); 1299 free_ctrl: 1300 v4l2_ctrl_handler_free(&ov5645->ctrls); 1301 mutex_destroy(&ov5645->power_lock); 1302 1303 return ret; 1304 } 1305 1306 static int ov5645_remove(struct i2c_client *client) 1307 { 1308 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1309 struct ov5645 *ov5645 = to_ov5645(sd); 1310 1311 v4l2_async_unregister_subdev(&ov5645->sd); 1312 media_entity_cleanup(&ov5645->sd.entity); 1313 v4l2_ctrl_handler_free(&ov5645->ctrls); 1314 mutex_destroy(&ov5645->power_lock); 1315 1316 return 0; 1317 } 1318 1319 static const struct i2c_device_id ov5645_id[] = { 1320 { "ov5645", 0 }, 1321 {} 1322 }; 1323 MODULE_DEVICE_TABLE(i2c, ov5645_id); 1324 1325 static const struct of_device_id ov5645_of_match[] = { 1326 { .compatible = "ovti,ov5645" }, 1327 { /* sentinel */ } 1328 }; 1329 MODULE_DEVICE_TABLE(of, ov5645_of_match); 1330 1331 static struct i2c_driver ov5645_i2c_driver = { 1332 .driver = { 1333 .of_match_table = of_match_ptr(ov5645_of_match), 1334 .name = "ov5645", 1335 }, 1336 .probe = ov5645_probe, 1337 .remove = ov5645_remove, 1338 .id_table = ov5645_id, 1339 }; 1340 1341 module_i2c_driver(ov5645_i2c_driver); 1342 1343 MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver"); 1344 MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>"); 1345 MODULE_LICENSE("GPL v2"); 1346