1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Driver for the OV5645 camera sensor. 4 * 5 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved. 6 * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved. 7 * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved. 8 * 9 * Based on: 10 * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org: 11 * https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/ 12 * media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41 13 * - the OV5640 driver posted on linux-media: 14 * https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html 15 */ 16 17 /* 18 */ 19 20 #include <linux/bitops.h> 21 #include <linux/clk.h> 22 #include <linux/delay.h> 23 #include <linux/device.h> 24 #include <linux/gpio/consumer.h> 25 #include <linux/i2c.h> 26 #include <linux/init.h> 27 #include <linux/module.h> 28 #include <linux/of.h> 29 #include <linux/of_graph.h> 30 #include <linux/regulator/consumer.h> 31 #include <linux/slab.h> 32 #include <linux/types.h> 33 #include <media/v4l2-ctrls.h> 34 #include <media/v4l2-fwnode.h> 35 #include <media/v4l2-subdev.h> 36 37 #define OV5645_SYSTEM_CTRL0 0x3008 38 #define OV5645_SYSTEM_CTRL0_START 0x02 39 #define OV5645_SYSTEM_CTRL0_STOP 0x42 40 #define OV5645_CHIP_ID_HIGH 0x300a 41 #define OV5645_CHIP_ID_HIGH_BYTE 0x56 42 #define OV5645_CHIP_ID_LOW 0x300b 43 #define OV5645_CHIP_ID_LOW_BYTE 0x45 44 #define OV5645_AWB_MANUAL_CONTROL 0x3406 45 #define OV5645_AWB_MANUAL_ENABLE BIT(0) 46 #define OV5645_AEC_PK_MANUAL 0x3503 47 #define OV5645_AEC_MANUAL_ENABLE BIT(0) 48 #define OV5645_AGC_MANUAL_ENABLE BIT(1) 49 #define OV5645_TIMING_TC_REG20 0x3820 50 #define OV5645_SENSOR_VFLIP BIT(1) 51 #define OV5645_ISP_VFLIP BIT(2) 52 #define OV5645_TIMING_TC_REG21 0x3821 53 #define OV5645_SENSOR_MIRROR BIT(1) 54 #define OV5645_PRE_ISP_TEST_SETTING_1 0x503d 55 #define OV5645_TEST_PATTERN_MASK 0x3 56 #define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK) 57 #define OV5645_TEST_PATTERN_ENABLE BIT(7) 58 #define OV5645_SDE_SAT_U 0x5583 59 #define OV5645_SDE_SAT_V 0x5584 60 61 /* regulator supplies */ 62 static const char * const ov5645_supply_name[] = { 63 "vdddo", /* Digital I/O (1.8V) supply */ 64 "vdda", /* Analog (2.8V) supply */ 65 "vddd", /* Digital Core (1.5V) supply */ 66 }; 67 68 #define OV5645_NUM_SUPPLIES ARRAY_SIZE(ov5645_supply_name) 69 70 struct reg_value { 71 u16 reg; 72 u8 val; 73 }; 74 75 struct ov5645_mode_info { 76 u32 width; 77 u32 height; 78 const struct reg_value *data; 79 u32 data_size; 80 u32 pixel_clock; 81 u32 link_freq; 82 }; 83 84 struct ov5645 { 85 struct i2c_client *i2c_client; 86 struct device *dev; 87 struct v4l2_subdev sd; 88 struct media_pad pad; 89 struct v4l2_fwnode_endpoint ep; 90 struct v4l2_mbus_framefmt fmt; 91 struct v4l2_rect crop; 92 struct clk *xclk; 93 94 struct regulator_bulk_data supplies[OV5645_NUM_SUPPLIES]; 95 96 const struct ov5645_mode_info *current_mode; 97 98 struct v4l2_ctrl_handler ctrls; 99 struct v4l2_ctrl *pixel_clock; 100 struct v4l2_ctrl *link_freq; 101 102 /* Cached register values */ 103 u8 aec_pk_manual; 104 u8 timing_tc_reg20; 105 u8 timing_tc_reg21; 106 107 struct mutex power_lock; /* lock to protect power state */ 108 int power_count; 109 110 struct gpio_desc *enable_gpio; 111 struct gpio_desc *rst_gpio; 112 }; 113 114 static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd) 115 { 116 return container_of(sd, struct ov5645, sd); 117 } 118 119 static const struct reg_value ov5645_global_init_setting[] = { 120 { 0x3103, 0x11 }, 121 { 0x3008, 0x82 }, 122 { 0x3008, 0x42 }, 123 { 0x3103, 0x03 }, 124 { 0x3503, 0x07 }, 125 { 0x3002, 0x1c }, 126 { 0x3006, 0xc3 }, 127 { 0x300e, 0x45 }, 128 { 0x3017, 0x00 }, 129 { 0x3018, 0x00 }, 130 { 0x302e, 0x0b }, 131 { 0x3037, 0x13 }, 132 { 0x3108, 0x01 }, 133 { 0x3611, 0x06 }, 134 { 0x3500, 0x00 }, 135 { 0x3501, 0x01 }, 136 { 0x3502, 0x00 }, 137 { 0x350a, 0x00 }, 138 { 0x350b, 0x3f }, 139 { 0x3620, 0x33 }, 140 { 0x3621, 0xe0 }, 141 { 0x3622, 0x01 }, 142 { 0x3630, 0x2e }, 143 { 0x3631, 0x00 }, 144 { 0x3632, 0x32 }, 145 { 0x3633, 0x52 }, 146 { 0x3634, 0x70 }, 147 { 0x3635, 0x13 }, 148 { 0x3636, 0x03 }, 149 { 0x3703, 0x5a }, 150 { 0x3704, 0xa0 }, 151 { 0x3705, 0x1a }, 152 { 0x3709, 0x12 }, 153 { 0x370b, 0x61 }, 154 { 0x370f, 0x10 }, 155 { 0x3715, 0x78 }, 156 { 0x3717, 0x01 }, 157 { 0x371b, 0x20 }, 158 { 0x3731, 0x12 }, 159 { 0x3901, 0x0a }, 160 { 0x3905, 0x02 }, 161 { 0x3906, 0x10 }, 162 { 0x3719, 0x86 }, 163 { 0x3810, 0x00 }, 164 { 0x3811, 0x10 }, 165 { 0x3812, 0x00 }, 166 { 0x3821, 0x01 }, 167 { 0x3824, 0x01 }, 168 { 0x3826, 0x03 }, 169 { 0x3828, 0x08 }, 170 { 0x3a19, 0xf8 }, 171 { 0x3c01, 0x34 }, 172 { 0x3c04, 0x28 }, 173 { 0x3c05, 0x98 }, 174 { 0x3c07, 0x07 }, 175 { 0x3c09, 0xc2 }, 176 { 0x3c0a, 0x9c }, 177 { 0x3c0b, 0x40 }, 178 { 0x3c01, 0x34 }, 179 { 0x4001, 0x02 }, 180 { 0x4514, 0x00 }, 181 { 0x4520, 0xb0 }, 182 { 0x460b, 0x37 }, 183 { 0x460c, 0x20 }, 184 { 0x4818, 0x01 }, 185 { 0x481d, 0xf0 }, 186 { 0x481f, 0x50 }, 187 { 0x4823, 0x70 }, 188 { 0x4831, 0x14 }, 189 { 0x5000, 0xa7 }, 190 { 0x5001, 0x83 }, 191 { 0x501d, 0x00 }, 192 { 0x501f, 0x00 }, 193 { 0x503d, 0x00 }, 194 { 0x505c, 0x30 }, 195 { 0x5181, 0x59 }, 196 { 0x5183, 0x00 }, 197 { 0x5191, 0xf0 }, 198 { 0x5192, 0x03 }, 199 { 0x5684, 0x10 }, 200 { 0x5685, 0xa0 }, 201 { 0x5686, 0x0c }, 202 { 0x5687, 0x78 }, 203 { 0x5a00, 0x08 }, 204 { 0x5a21, 0x00 }, 205 { 0x5a24, 0x00 }, 206 { 0x3008, 0x02 }, 207 { 0x3503, 0x00 }, 208 { 0x5180, 0xff }, 209 { 0x5181, 0xf2 }, 210 { 0x5182, 0x00 }, 211 { 0x5183, 0x14 }, 212 { 0x5184, 0x25 }, 213 { 0x5185, 0x24 }, 214 { 0x5186, 0x09 }, 215 { 0x5187, 0x09 }, 216 { 0x5188, 0x0a }, 217 { 0x5189, 0x75 }, 218 { 0x518a, 0x52 }, 219 { 0x518b, 0xea }, 220 { 0x518c, 0xa8 }, 221 { 0x518d, 0x42 }, 222 { 0x518e, 0x38 }, 223 { 0x518f, 0x56 }, 224 { 0x5190, 0x42 }, 225 { 0x5191, 0xf8 }, 226 { 0x5192, 0x04 }, 227 { 0x5193, 0x70 }, 228 { 0x5194, 0xf0 }, 229 { 0x5195, 0xf0 }, 230 { 0x5196, 0x03 }, 231 { 0x5197, 0x01 }, 232 { 0x5198, 0x04 }, 233 { 0x5199, 0x12 }, 234 { 0x519a, 0x04 }, 235 { 0x519b, 0x00 }, 236 { 0x519c, 0x06 }, 237 { 0x519d, 0x82 }, 238 { 0x519e, 0x38 }, 239 { 0x5381, 0x1e }, 240 { 0x5382, 0x5b }, 241 { 0x5383, 0x08 }, 242 { 0x5384, 0x0a }, 243 { 0x5385, 0x7e }, 244 { 0x5386, 0x88 }, 245 { 0x5387, 0x7c }, 246 { 0x5388, 0x6c }, 247 { 0x5389, 0x10 }, 248 { 0x538a, 0x01 }, 249 { 0x538b, 0x98 }, 250 { 0x5300, 0x08 }, 251 { 0x5301, 0x30 }, 252 { 0x5302, 0x10 }, 253 { 0x5303, 0x00 }, 254 { 0x5304, 0x08 }, 255 { 0x5305, 0x30 }, 256 { 0x5306, 0x08 }, 257 { 0x5307, 0x16 }, 258 { 0x5309, 0x08 }, 259 { 0x530a, 0x30 }, 260 { 0x530b, 0x04 }, 261 { 0x530c, 0x06 }, 262 { 0x5480, 0x01 }, 263 { 0x5481, 0x08 }, 264 { 0x5482, 0x14 }, 265 { 0x5483, 0x28 }, 266 { 0x5484, 0x51 }, 267 { 0x5485, 0x65 }, 268 { 0x5486, 0x71 }, 269 { 0x5487, 0x7d }, 270 { 0x5488, 0x87 }, 271 { 0x5489, 0x91 }, 272 { 0x548a, 0x9a }, 273 { 0x548b, 0xaa }, 274 { 0x548c, 0xb8 }, 275 { 0x548d, 0xcd }, 276 { 0x548e, 0xdd }, 277 { 0x548f, 0xea }, 278 { 0x5490, 0x1d }, 279 { 0x5580, 0x02 }, 280 { 0x5583, 0x40 }, 281 { 0x5584, 0x10 }, 282 { 0x5589, 0x10 }, 283 { 0x558a, 0x00 }, 284 { 0x558b, 0xf8 }, 285 { 0x5800, 0x3f }, 286 { 0x5801, 0x16 }, 287 { 0x5802, 0x0e }, 288 { 0x5803, 0x0d }, 289 { 0x5804, 0x17 }, 290 { 0x5805, 0x3f }, 291 { 0x5806, 0x0b }, 292 { 0x5807, 0x06 }, 293 { 0x5808, 0x04 }, 294 { 0x5809, 0x04 }, 295 { 0x580a, 0x06 }, 296 { 0x580b, 0x0b }, 297 { 0x580c, 0x09 }, 298 { 0x580d, 0x03 }, 299 { 0x580e, 0x00 }, 300 { 0x580f, 0x00 }, 301 { 0x5810, 0x03 }, 302 { 0x5811, 0x08 }, 303 { 0x5812, 0x0a }, 304 { 0x5813, 0x03 }, 305 { 0x5814, 0x00 }, 306 { 0x5815, 0x00 }, 307 { 0x5816, 0x04 }, 308 { 0x5817, 0x09 }, 309 { 0x5818, 0x0f }, 310 { 0x5819, 0x08 }, 311 { 0x581a, 0x06 }, 312 { 0x581b, 0x06 }, 313 { 0x581c, 0x08 }, 314 { 0x581d, 0x0c }, 315 { 0x581e, 0x3f }, 316 { 0x581f, 0x1e }, 317 { 0x5820, 0x12 }, 318 { 0x5821, 0x13 }, 319 { 0x5822, 0x21 }, 320 { 0x5823, 0x3f }, 321 { 0x5824, 0x68 }, 322 { 0x5825, 0x28 }, 323 { 0x5826, 0x2c }, 324 { 0x5827, 0x28 }, 325 { 0x5828, 0x08 }, 326 { 0x5829, 0x48 }, 327 { 0x582a, 0x64 }, 328 { 0x582b, 0x62 }, 329 { 0x582c, 0x64 }, 330 { 0x582d, 0x28 }, 331 { 0x582e, 0x46 }, 332 { 0x582f, 0x62 }, 333 { 0x5830, 0x60 }, 334 { 0x5831, 0x62 }, 335 { 0x5832, 0x26 }, 336 { 0x5833, 0x48 }, 337 { 0x5834, 0x66 }, 338 { 0x5835, 0x44 }, 339 { 0x5836, 0x64 }, 340 { 0x5837, 0x28 }, 341 { 0x5838, 0x66 }, 342 { 0x5839, 0x48 }, 343 { 0x583a, 0x2c }, 344 { 0x583b, 0x28 }, 345 { 0x583c, 0x26 }, 346 { 0x583d, 0xae }, 347 { 0x5025, 0x00 }, 348 { 0x3a0f, 0x30 }, 349 { 0x3a10, 0x28 }, 350 { 0x3a1b, 0x30 }, 351 { 0x3a1e, 0x26 }, 352 { 0x3a11, 0x60 }, 353 { 0x3a1f, 0x14 }, 354 { 0x0601, 0x02 }, 355 { 0x3008, 0x42 }, 356 { 0x3008, 0x02 } 357 }; 358 359 static const struct reg_value ov5645_setting_sxga[] = { 360 { 0x3612, 0xa9 }, 361 { 0x3614, 0x50 }, 362 { 0x3618, 0x00 }, 363 { 0x3034, 0x18 }, 364 { 0x3035, 0x21 }, 365 { 0x3036, 0x70 }, 366 { 0x3600, 0x09 }, 367 { 0x3601, 0x43 }, 368 { 0x3708, 0x66 }, 369 { 0x370c, 0xc3 }, 370 { 0x3800, 0x00 }, 371 { 0x3801, 0x00 }, 372 { 0x3802, 0x00 }, 373 { 0x3803, 0x06 }, 374 { 0x3804, 0x0a }, 375 { 0x3805, 0x3f }, 376 { 0x3806, 0x07 }, 377 { 0x3807, 0x9d }, 378 { 0x3808, 0x05 }, 379 { 0x3809, 0x00 }, 380 { 0x380a, 0x03 }, 381 { 0x380b, 0xc0 }, 382 { 0x380c, 0x07 }, 383 { 0x380d, 0x68 }, 384 { 0x380e, 0x03 }, 385 { 0x380f, 0xd8 }, 386 { 0x3813, 0x06 }, 387 { 0x3814, 0x31 }, 388 { 0x3815, 0x31 }, 389 { 0x3820, 0x47 }, 390 { 0x3a02, 0x03 }, 391 { 0x3a03, 0xd8 }, 392 { 0x3a08, 0x01 }, 393 { 0x3a09, 0xf8 }, 394 { 0x3a0a, 0x01 }, 395 { 0x3a0b, 0xa4 }, 396 { 0x3a0e, 0x02 }, 397 { 0x3a0d, 0x02 }, 398 { 0x3a14, 0x03 }, 399 { 0x3a15, 0xd8 }, 400 { 0x3a18, 0x00 }, 401 { 0x4004, 0x02 }, 402 { 0x4005, 0x18 }, 403 { 0x4300, 0x32 }, 404 { 0x4202, 0x00 } 405 }; 406 407 static const struct reg_value ov5645_setting_1080p[] = { 408 { 0x3612, 0xab }, 409 { 0x3614, 0x50 }, 410 { 0x3618, 0x04 }, 411 { 0x3034, 0x18 }, 412 { 0x3035, 0x11 }, 413 { 0x3036, 0x54 }, 414 { 0x3600, 0x08 }, 415 { 0x3601, 0x33 }, 416 { 0x3708, 0x63 }, 417 { 0x370c, 0xc0 }, 418 { 0x3800, 0x01 }, 419 { 0x3801, 0x50 }, 420 { 0x3802, 0x01 }, 421 { 0x3803, 0xb2 }, 422 { 0x3804, 0x08 }, 423 { 0x3805, 0xef }, 424 { 0x3806, 0x05 }, 425 { 0x3807, 0xf1 }, 426 { 0x3808, 0x07 }, 427 { 0x3809, 0x80 }, 428 { 0x380a, 0x04 }, 429 { 0x380b, 0x38 }, 430 { 0x380c, 0x09 }, 431 { 0x380d, 0xc4 }, 432 { 0x380e, 0x04 }, 433 { 0x380f, 0x60 }, 434 { 0x3813, 0x04 }, 435 { 0x3814, 0x11 }, 436 { 0x3815, 0x11 }, 437 { 0x3820, 0x47 }, 438 { 0x4514, 0x88 }, 439 { 0x3a02, 0x04 }, 440 { 0x3a03, 0x60 }, 441 { 0x3a08, 0x01 }, 442 { 0x3a09, 0x50 }, 443 { 0x3a0a, 0x01 }, 444 { 0x3a0b, 0x18 }, 445 { 0x3a0e, 0x03 }, 446 { 0x3a0d, 0x04 }, 447 { 0x3a14, 0x04 }, 448 { 0x3a15, 0x60 }, 449 { 0x3a18, 0x00 }, 450 { 0x4004, 0x06 }, 451 { 0x4005, 0x18 }, 452 { 0x4300, 0x32 }, 453 { 0x4202, 0x00 }, 454 { 0x4837, 0x0b } 455 }; 456 457 static const struct reg_value ov5645_setting_full[] = { 458 { 0x3612, 0xab }, 459 { 0x3614, 0x50 }, 460 { 0x3618, 0x04 }, 461 { 0x3034, 0x18 }, 462 { 0x3035, 0x11 }, 463 { 0x3036, 0x54 }, 464 { 0x3600, 0x08 }, 465 { 0x3601, 0x33 }, 466 { 0x3708, 0x63 }, 467 { 0x370c, 0xc0 }, 468 { 0x3800, 0x00 }, 469 { 0x3801, 0x00 }, 470 { 0x3802, 0x00 }, 471 { 0x3803, 0x00 }, 472 { 0x3804, 0x0a }, 473 { 0x3805, 0x3f }, 474 { 0x3806, 0x07 }, 475 { 0x3807, 0x9f }, 476 { 0x3808, 0x0a }, 477 { 0x3809, 0x20 }, 478 { 0x380a, 0x07 }, 479 { 0x380b, 0x98 }, 480 { 0x380c, 0x0b }, 481 { 0x380d, 0x1c }, 482 { 0x380e, 0x07 }, 483 { 0x380f, 0xb0 }, 484 { 0x3813, 0x06 }, 485 { 0x3814, 0x11 }, 486 { 0x3815, 0x11 }, 487 { 0x3820, 0x47 }, 488 { 0x4514, 0x88 }, 489 { 0x3a02, 0x07 }, 490 { 0x3a03, 0xb0 }, 491 { 0x3a08, 0x01 }, 492 { 0x3a09, 0x27 }, 493 { 0x3a0a, 0x00 }, 494 { 0x3a0b, 0xf6 }, 495 { 0x3a0e, 0x06 }, 496 { 0x3a0d, 0x08 }, 497 { 0x3a14, 0x07 }, 498 { 0x3a15, 0xb0 }, 499 { 0x3a18, 0x01 }, 500 { 0x4004, 0x06 }, 501 { 0x4005, 0x18 }, 502 { 0x4300, 0x32 }, 503 { 0x4837, 0x0b }, 504 { 0x4202, 0x00 } 505 }; 506 507 static const s64 link_freq[] = { 508 224000000, 509 336000000 510 }; 511 512 static const struct ov5645_mode_info ov5645_mode_info_data[] = { 513 { 514 .width = 1280, 515 .height = 960, 516 .data = ov5645_setting_sxga, 517 .data_size = ARRAY_SIZE(ov5645_setting_sxga), 518 .pixel_clock = 112000000, 519 .link_freq = 0 /* an index in link_freq[] */ 520 }, 521 { 522 .width = 1920, 523 .height = 1080, 524 .data = ov5645_setting_1080p, 525 .data_size = ARRAY_SIZE(ov5645_setting_1080p), 526 .pixel_clock = 168000000, 527 .link_freq = 1 /* an index in link_freq[] */ 528 }, 529 { 530 .width = 2592, 531 .height = 1944, 532 .data = ov5645_setting_full, 533 .data_size = ARRAY_SIZE(ov5645_setting_full), 534 .pixel_clock = 168000000, 535 .link_freq = 1 /* an index in link_freq[] */ 536 }, 537 }; 538 539 static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val) 540 { 541 u8 regbuf[3]; 542 int ret; 543 544 regbuf[0] = reg >> 8; 545 regbuf[1] = reg & 0xff; 546 regbuf[2] = val; 547 548 ret = i2c_master_send(ov5645->i2c_client, regbuf, 3); 549 if (ret < 0) { 550 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n", 551 __func__, ret, reg, val); 552 return ret; 553 } 554 555 return 0; 556 } 557 558 static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val) 559 { 560 u8 regbuf[2]; 561 int ret; 562 563 regbuf[0] = reg >> 8; 564 regbuf[1] = reg & 0xff; 565 566 ret = i2c_master_send(ov5645->i2c_client, regbuf, 2); 567 if (ret < 0) { 568 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n", 569 __func__, ret, reg); 570 return ret; 571 } 572 573 ret = i2c_master_recv(ov5645->i2c_client, val, 1); 574 if (ret < 0) { 575 dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n", 576 __func__, ret, reg); 577 return ret; 578 } 579 580 return 0; 581 } 582 583 static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode) 584 { 585 u8 val = ov5645->aec_pk_manual; 586 int ret; 587 588 if (mode == V4L2_EXPOSURE_AUTO) 589 val &= ~OV5645_AEC_MANUAL_ENABLE; 590 else /* V4L2_EXPOSURE_MANUAL */ 591 val |= OV5645_AEC_MANUAL_ENABLE; 592 593 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val); 594 if (!ret) 595 ov5645->aec_pk_manual = val; 596 597 return ret; 598 } 599 600 static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable) 601 { 602 u8 val = ov5645->aec_pk_manual; 603 int ret; 604 605 if (enable) 606 val &= ~OV5645_AGC_MANUAL_ENABLE; 607 else 608 val |= OV5645_AGC_MANUAL_ENABLE; 609 610 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val); 611 if (!ret) 612 ov5645->aec_pk_manual = val; 613 614 return ret; 615 } 616 617 static int ov5645_set_register_array(struct ov5645 *ov5645, 618 const struct reg_value *settings, 619 unsigned int num_settings) 620 { 621 unsigned int i; 622 int ret; 623 624 for (i = 0; i < num_settings; ++i, ++settings) { 625 ret = ov5645_write_reg(ov5645, settings->reg, settings->val); 626 if (ret < 0) 627 return ret; 628 } 629 630 return 0; 631 } 632 633 static int ov5645_set_power_on(struct ov5645 *ov5645) 634 { 635 int ret; 636 637 ret = regulator_bulk_enable(OV5645_NUM_SUPPLIES, ov5645->supplies); 638 if (ret < 0) 639 return ret; 640 641 ret = clk_prepare_enable(ov5645->xclk); 642 if (ret < 0) { 643 dev_err(ov5645->dev, "clk prepare enable failed\n"); 644 regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies); 645 return ret; 646 } 647 648 usleep_range(5000, 15000); 649 gpiod_set_value_cansleep(ov5645->enable_gpio, 1); 650 651 usleep_range(1000, 2000); 652 gpiod_set_value_cansleep(ov5645->rst_gpio, 0); 653 654 msleep(20); 655 656 return 0; 657 } 658 659 static void ov5645_set_power_off(struct ov5645 *ov5645) 660 { 661 gpiod_set_value_cansleep(ov5645->rst_gpio, 1); 662 gpiod_set_value_cansleep(ov5645->enable_gpio, 0); 663 clk_disable_unprepare(ov5645->xclk); 664 regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies); 665 } 666 667 static int ov5645_s_power(struct v4l2_subdev *sd, int on) 668 { 669 struct ov5645 *ov5645 = to_ov5645(sd); 670 int ret = 0; 671 672 mutex_lock(&ov5645->power_lock); 673 674 /* If the power count is modified from 0 to != 0 or from != 0 to 0, 675 * update the power state. 676 */ 677 if (ov5645->power_count == !on) { 678 if (on) { 679 ret = ov5645_set_power_on(ov5645); 680 if (ret < 0) 681 goto exit; 682 683 ret = ov5645_set_register_array(ov5645, 684 ov5645_global_init_setting, 685 ARRAY_SIZE(ov5645_global_init_setting)); 686 if (ret < 0) { 687 dev_err(ov5645->dev, 688 "could not set init registers\n"); 689 ov5645_set_power_off(ov5645); 690 goto exit; 691 } 692 693 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0, 694 OV5645_SYSTEM_CTRL0_STOP); 695 if (ret < 0) { 696 ov5645_set_power_off(ov5645); 697 goto exit; 698 } 699 } else { 700 ov5645_set_power_off(ov5645); 701 } 702 } 703 704 /* Update the power count. */ 705 ov5645->power_count += on ? 1 : -1; 706 WARN_ON(ov5645->power_count < 0); 707 708 exit: 709 mutex_unlock(&ov5645->power_lock); 710 711 return ret; 712 } 713 714 static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value) 715 { 716 u32 reg_value = (value * 0x10) + 0x40; 717 int ret; 718 719 ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value); 720 if (ret < 0) 721 return ret; 722 723 return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value); 724 } 725 726 static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value) 727 { 728 u8 val = ov5645->timing_tc_reg21; 729 int ret; 730 731 if (value == 0) 732 val &= ~(OV5645_SENSOR_MIRROR); 733 else 734 val |= (OV5645_SENSOR_MIRROR); 735 736 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val); 737 if (!ret) 738 ov5645->timing_tc_reg21 = val; 739 740 return ret; 741 } 742 743 static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value) 744 { 745 u8 val = ov5645->timing_tc_reg20; 746 int ret; 747 748 if (value == 0) 749 val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP); 750 else 751 val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP); 752 753 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val); 754 if (!ret) 755 ov5645->timing_tc_reg20 = val; 756 757 return ret; 758 } 759 760 static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value) 761 { 762 u8 val = 0; 763 764 if (value) { 765 val = OV5645_SET_TEST_PATTERN(value - 1); 766 val |= OV5645_TEST_PATTERN_ENABLE; 767 } 768 769 return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val); 770 } 771 772 static const char * const ov5645_test_pattern_menu[] = { 773 "Disabled", 774 "Vertical Color Bars", 775 "Pseudo-Random Data", 776 "Color Square", 777 "Black Image", 778 }; 779 780 static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto) 781 { 782 u8 val = 0; 783 784 if (!enable_auto) 785 val = OV5645_AWB_MANUAL_ENABLE; 786 787 return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val); 788 } 789 790 static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl) 791 { 792 struct ov5645 *ov5645 = container_of(ctrl->handler, 793 struct ov5645, ctrls); 794 int ret; 795 796 mutex_lock(&ov5645->power_lock); 797 if (!ov5645->power_count) { 798 mutex_unlock(&ov5645->power_lock); 799 return 0; 800 } 801 802 switch (ctrl->id) { 803 case V4L2_CID_SATURATION: 804 ret = ov5645_set_saturation(ov5645, ctrl->val); 805 break; 806 case V4L2_CID_AUTO_WHITE_BALANCE: 807 ret = ov5645_set_awb(ov5645, ctrl->val); 808 break; 809 case V4L2_CID_AUTOGAIN: 810 ret = ov5645_set_agc_mode(ov5645, ctrl->val); 811 break; 812 case V4L2_CID_EXPOSURE_AUTO: 813 ret = ov5645_set_aec_mode(ov5645, ctrl->val); 814 break; 815 case V4L2_CID_TEST_PATTERN: 816 ret = ov5645_set_test_pattern(ov5645, ctrl->val); 817 break; 818 case V4L2_CID_HFLIP: 819 ret = ov5645_set_hflip(ov5645, ctrl->val); 820 break; 821 case V4L2_CID_VFLIP: 822 ret = ov5645_set_vflip(ov5645, ctrl->val); 823 break; 824 default: 825 ret = -EINVAL; 826 break; 827 } 828 829 mutex_unlock(&ov5645->power_lock); 830 831 return ret; 832 } 833 834 static const struct v4l2_ctrl_ops ov5645_ctrl_ops = { 835 .s_ctrl = ov5645_s_ctrl, 836 }; 837 838 static int ov5645_enum_mbus_code(struct v4l2_subdev *sd, 839 struct v4l2_subdev_pad_config *cfg, 840 struct v4l2_subdev_mbus_code_enum *code) 841 { 842 if (code->index > 0) 843 return -EINVAL; 844 845 code->code = MEDIA_BUS_FMT_UYVY8_2X8; 846 847 return 0; 848 } 849 850 static int ov5645_enum_frame_size(struct v4l2_subdev *subdev, 851 struct v4l2_subdev_pad_config *cfg, 852 struct v4l2_subdev_frame_size_enum *fse) 853 { 854 if (fse->code != MEDIA_BUS_FMT_UYVY8_2X8) 855 return -EINVAL; 856 857 if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data)) 858 return -EINVAL; 859 860 fse->min_width = ov5645_mode_info_data[fse->index].width; 861 fse->max_width = ov5645_mode_info_data[fse->index].width; 862 fse->min_height = ov5645_mode_info_data[fse->index].height; 863 fse->max_height = ov5645_mode_info_data[fse->index].height; 864 865 return 0; 866 } 867 868 static struct v4l2_mbus_framefmt * 869 __ov5645_get_pad_format(struct ov5645 *ov5645, 870 struct v4l2_subdev_pad_config *cfg, 871 unsigned int pad, 872 enum v4l2_subdev_format_whence which) 873 { 874 switch (which) { 875 case V4L2_SUBDEV_FORMAT_TRY: 876 return v4l2_subdev_get_try_format(&ov5645->sd, cfg, pad); 877 case V4L2_SUBDEV_FORMAT_ACTIVE: 878 return &ov5645->fmt; 879 default: 880 return NULL; 881 } 882 } 883 884 static int ov5645_get_format(struct v4l2_subdev *sd, 885 struct v4l2_subdev_pad_config *cfg, 886 struct v4l2_subdev_format *format) 887 { 888 struct ov5645 *ov5645 = to_ov5645(sd); 889 890 format->format = *__ov5645_get_pad_format(ov5645, cfg, format->pad, 891 format->which); 892 return 0; 893 } 894 895 static struct v4l2_rect * 896 __ov5645_get_pad_crop(struct ov5645 *ov5645, struct v4l2_subdev_pad_config *cfg, 897 unsigned int pad, enum v4l2_subdev_format_whence which) 898 { 899 switch (which) { 900 case V4L2_SUBDEV_FORMAT_TRY: 901 return v4l2_subdev_get_try_crop(&ov5645->sd, cfg, pad); 902 case V4L2_SUBDEV_FORMAT_ACTIVE: 903 return &ov5645->crop; 904 default: 905 return NULL; 906 } 907 } 908 909 static int ov5645_set_format(struct v4l2_subdev *sd, 910 struct v4l2_subdev_pad_config *cfg, 911 struct v4l2_subdev_format *format) 912 { 913 struct ov5645 *ov5645 = to_ov5645(sd); 914 struct v4l2_mbus_framefmt *__format; 915 struct v4l2_rect *__crop; 916 const struct ov5645_mode_info *new_mode; 917 int ret; 918 919 __crop = __ov5645_get_pad_crop(ov5645, cfg, format->pad, 920 format->which); 921 922 new_mode = v4l2_find_nearest_size(ov5645_mode_info_data, 923 ARRAY_SIZE(ov5645_mode_info_data), 924 width, height, 925 format->format.width, format->format.height); 926 927 __crop->width = new_mode->width; 928 __crop->height = new_mode->height; 929 930 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) { 931 ret = v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock, 932 new_mode->pixel_clock); 933 if (ret < 0) 934 return ret; 935 936 ret = v4l2_ctrl_s_ctrl(ov5645->link_freq, 937 new_mode->link_freq); 938 if (ret < 0) 939 return ret; 940 941 ov5645->current_mode = new_mode; 942 } 943 944 __format = __ov5645_get_pad_format(ov5645, cfg, format->pad, 945 format->which); 946 __format->width = __crop->width; 947 __format->height = __crop->height; 948 __format->code = MEDIA_BUS_FMT_UYVY8_2X8; 949 __format->field = V4L2_FIELD_NONE; 950 __format->colorspace = V4L2_COLORSPACE_SRGB; 951 952 format->format = *__format; 953 954 return 0; 955 } 956 957 static int ov5645_entity_init_cfg(struct v4l2_subdev *subdev, 958 struct v4l2_subdev_pad_config *cfg) 959 { 960 struct v4l2_subdev_format fmt = { 0 }; 961 962 fmt.which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; 963 fmt.format.width = 1920; 964 fmt.format.height = 1080; 965 966 ov5645_set_format(subdev, cfg, &fmt); 967 968 return 0; 969 } 970 971 static int ov5645_get_selection(struct v4l2_subdev *sd, 972 struct v4l2_subdev_pad_config *cfg, 973 struct v4l2_subdev_selection *sel) 974 { 975 struct ov5645 *ov5645 = to_ov5645(sd); 976 977 if (sel->target != V4L2_SEL_TGT_CROP) 978 return -EINVAL; 979 980 sel->r = *__ov5645_get_pad_crop(ov5645, cfg, sel->pad, 981 sel->which); 982 return 0; 983 } 984 985 static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable) 986 { 987 struct ov5645 *ov5645 = to_ov5645(subdev); 988 int ret; 989 990 if (enable) { 991 ret = ov5645_set_register_array(ov5645, 992 ov5645->current_mode->data, 993 ov5645->current_mode->data_size); 994 if (ret < 0) { 995 dev_err(ov5645->dev, "could not set mode %dx%d\n", 996 ov5645->current_mode->width, 997 ov5645->current_mode->height); 998 return ret; 999 } 1000 ret = v4l2_ctrl_handler_setup(&ov5645->ctrls); 1001 if (ret < 0) { 1002 dev_err(ov5645->dev, "could not sync v4l2 controls\n"); 1003 return ret; 1004 } 1005 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0, 1006 OV5645_SYSTEM_CTRL0_START); 1007 if (ret < 0) 1008 return ret; 1009 } else { 1010 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0, 1011 OV5645_SYSTEM_CTRL0_STOP); 1012 if (ret < 0) 1013 return ret; 1014 } 1015 1016 return 0; 1017 } 1018 1019 static const struct v4l2_subdev_core_ops ov5645_core_ops = { 1020 .s_power = ov5645_s_power, 1021 }; 1022 1023 static const struct v4l2_subdev_video_ops ov5645_video_ops = { 1024 .s_stream = ov5645_s_stream, 1025 }; 1026 1027 static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = { 1028 .init_cfg = ov5645_entity_init_cfg, 1029 .enum_mbus_code = ov5645_enum_mbus_code, 1030 .enum_frame_size = ov5645_enum_frame_size, 1031 .get_fmt = ov5645_get_format, 1032 .set_fmt = ov5645_set_format, 1033 .get_selection = ov5645_get_selection, 1034 }; 1035 1036 static const struct v4l2_subdev_ops ov5645_subdev_ops = { 1037 .core = &ov5645_core_ops, 1038 .video = &ov5645_video_ops, 1039 .pad = &ov5645_subdev_pad_ops, 1040 }; 1041 1042 static int ov5645_probe(struct i2c_client *client, 1043 const struct i2c_device_id *id) 1044 { 1045 struct device *dev = &client->dev; 1046 struct device_node *endpoint; 1047 struct ov5645 *ov5645; 1048 u8 chip_id_high, chip_id_low; 1049 unsigned int i; 1050 u32 xclk_freq; 1051 int ret; 1052 1053 ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL); 1054 if (!ov5645) 1055 return -ENOMEM; 1056 1057 ov5645->i2c_client = client; 1058 ov5645->dev = dev; 1059 1060 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL); 1061 if (!endpoint) { 1062 dev_err(dev, "endpoint node not found\n"); 1063 return -EINVAL; 1064 } 1065 1066 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint), 1067 &ov5645->ep); 1068 1069 of_node_put(endpoint); 1070 1071 if (ret < 0) { 1072 dev_err(dev, "parsing endpoint node failed\n"); 1073 return ret; 1074 } 1075 1076 if (ov5645->ep.bus_type != V4L2_MBUS_CSI2_DPHY) { 1077 dev_err(dev, "invalid bus type, must be CSI2\n"); 1078 return -EINVAL; 1079 } 1080 1081 /* get system clock (xclk) */ 1082 ov5645->xclk = devm_clk_get(dev, "xclk"); 1083 if (IS_ERR(ov5645->xclk)) { 1084 dev_err(dev, "could not get xclk"); 1085 return PTR_ERR(ov5645->xclk); 1086 } 1087 1088 ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq); 1089 if (ret) { 1090 dev_err(dev, "could not get xclk frequency\n"); 1091 return ret; 1092 } 1093 1094 /* external clock must be 24MHz, allow 1% tolerance */ 1095 if (xclk_freq < 23760000 || xclk_freq > 24240000) { 1096 dev_err(dev, "external clock frequency %u is not supported\n", 1097 xclk_freq); 1098 return -EINVAL; 1099 } 1100 1101 ret = clk_set_rate(ov5645->xclk, xclk_freq); 1102 if (ret) { 1103 dev_err(dev, "could not set xclk frequency\n"); 1104 return ret; 1105 } 1106 1107 for (i = 0; i < OV5645_NUM_SUPPLIES; i++) 1108 ov5645->supplies[i].supply = ov5645_supply_name[i]; 1109 1110 ret = devm_regulator_bulk_get(dev, OV5645_NUM_SUPPLIES, 1111 ov5645->supplies); 1112 if (ret < 0) 1113 return ret; 1114 1115 ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH); 1116 if (IS_ERR(ov5645->enable_gpio)) { 1117 dev_err(dev, "cannot get enable gpio\n"); 1118 return PTR_ERR(ov5645->enable_gpio); 1119 } 1120 1121 ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); 1122 if (IS_ERR(ov5645->rst_gpio)) { 1123 dev_err(dev, "cannot get reset gpio\n"); 1124 return PTR_ERR(ov5645->rst_gpio); 1125 } 1126 1127 mutex_init(&ov5645->power_lock); 1128 1129 v4l2_ctrl_handler_init(&ov5645->ctrls, 9); 1130 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, 1131 V4L2_CID_SATURATION, -4, 4, 1, 0); 1132 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, 1133 V4L2_CID_HFLIP, 0, 1, 1, 0); 1134 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, 1135 V4L2_CID_VFLIP, 0, 1, 1, 0); 1136 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, 1137 V4L2_CID_AUTOGAIN, 0, 1, 1, 1); 1138 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, 1139 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1); 1140 v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops, 1141 V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, 1142 0, V4L2_EXPOSURE_AUTO); 1143 v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops, 1144 V4L2_CID_TEST_PATTERN, 1145 ARRAY_SIZE(ov5645_test_pattern_menu) - 1, 1146 0, 0, ov5645_test_pattern_menu); 1147 ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrls, 1148 &ov5645_ctrl_ops, 1149 V4L2_CID_PIXEL_RATE, 1150 1, INT_MAX, 1, 1); 1151 ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrls, 1152 &ov5645_ctrl_ops, 1153 V4L2_CID_LINK_FREQ, 1154 ARRAY_SIZE(link_freq) - 1, 1155 0, link_freq); 1156 if (ov5645->link_freq) 1157 ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1158 1159 ov5645->sd.ctrl_handler = &ov5645->ctrls; 1160 1161 if (ov5645->ctrls.error) { 1162 dev_err(dev, "%s: control initialization error %d\n", 1163 __func__, ov5645->ctrls.error); 1164 ret = ov5645->ctrls.error; 1165 goto free_ctrl; 1166 } 1167 1168 v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops); 1169 ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 1170 ov5645->pad.flags = MEDIA_PAD_FL_SOURCE; 1171 ov5645->sd.dev = &client->dev; 1172 ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1173 1174 ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad); 1175 if (ret < 0) { 1176 dev_err(dev, "could not register media entity\n"); 1177 goto free_ctrl; 1178 } 1179 1180 ret = ov5645_s_power(&ov5645->sd, true); 1181 if (ret < 0) { 1182 dev_err(dev, "could not power up OV5645\n"); 1183 goto free_entity; 1184 } 1185 1186 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high); 1187 if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) { 1188 dev_err(dev, "could not read ID high\n"); 1189 ret = -ENODEV; 1190 goto power_down; 1191 } 1192 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low); 1193 if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) { 1194 dev_err(dev, "could not read ID low\n"); 1195 ret = -ENODEV; 1196 goto power_down; 1197 } 1198 1199 dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr); 1200 1201 ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL, 1202 &ov5645->aec_pk_manual); 1203 if (ret < 0) { 1204 dev_err(dev, "could not read AEC/AGC mode\n"); 1205 ret = -ENODEV; 1206 goto power_down; 1207 } 1208 1209 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20, 1210 &ov5645->timing_tc_reg20); 1211 if (ret < 0) { 1212 dev_err(dev, "could not read vflip value\n"); 1213 ret = -ENODEV; 1214 goto power_down; 1215 } 1216 1217 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21, 1218 &ov5645->timing_tc_reg21); 1219 if (ret < 0) { 1220 dev_err(dev, "could not read hflip value\n"); 1221 ret = -ENODEV; 1222 goto power_down; 1223 } 1224 1225 ov5645_s_power(&ov5645->sd, false); 1226 1227 ret = v4l2_async_register_subdev(&ov5645->sd); 1228 if (ret < 0) { 1229 dev_err(dev, "could not register v4l2 device\n"); 1230 goto free_entity; 1231 } 1232 1233 ov5645_entity_init_cfg(&ov5645->sd, NULL); 1234 1235 return 0; 1236 1237 power_down: 1238 ov5645_s_power(&ov5645->sd, false); 1239 free_entity: 1240 media_entity_cleanup(&ov5645->sd.entity); 1241 free_ctrl: 1242 v4l2_ctrl_handler_free(&ov5645->ctrls); 1243 mutex_destroy(&ov5645->power_lock); 1244 1245 return ret; 1246 } 1247 1248 static int ov5645_remove(struct i2c_client *client) 1249 { 1250 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1251 struct ov5645 *ov5645 = to_ov5645(sd); 1252 1253 v4l2_async_unregister_subdev(&ov5645->sd); 1254 media_entity_cleanup(&ov5645->sd.entity); 1255 v4l2_ctrl_handler_free(&ov5645->ctrls); 1256 mutex_destroy(&ov5645->power_lock); 1257 1258 return 0; 1259 } 1260 1261 static const struct i2c_device_id ov5645_id[] = { 1262 { "ov5645", 0 }, 1263 {} 1264 }; 1265 MODULE_DEVICE_TABLE(i2c, ov5645_id); 1266 1267 static const struct of_device_id ov5645_of_match[] = { 1268 { .compatible = "ovti,ov5645" }, 1269 { /* sentinel */ } 1270 }; 1271 MODULE_DEVICE_TABLE(of, ov5645_of_match); 1272 1273 static struct i2c_driver ov5645_i2c_driver = { 1274 .driver = { 1275 .of_match_table = of_match_ptr(ov5645_of_match), 1276 .name = "ov5645", 1277 }, 1278 .probe = ov5645_probe, 1279 .remove = ov5645_remove, 1280 .id_table = ov5645_id, 1281 }; 1282 1283 module_i2c_driver(ov5645_i2c_driver); 1284 1285 MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver"); 1286 MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>"); 1287 MODULE_LICENSE("GPL v2"); 1288