1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Driver for the OV5645 camera sensor.
4 *
5 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
6 * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved.
7 * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
8 *
9 * Based on:
10 * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org:
11 * https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/
12 * media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41
13 * - the OV5640 driver posted on linux-media:
14 * https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html
15 */
16
17 #include <linux/bitops.h>
18 #include <linux/clk.h>
19 #include <linux/delay.h>
20 #include <linux/device.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/i2c.h>
23 #include <linux/init.h>
24 #include <linux/module.h>
25 #include <linux/of.h>
26 #include <linux/of_graph.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/regulator/consumer.h>
29 #include <linux/slab.h>
30 #include <linux/types.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-fwnode.h>
33 #include <media/v4l2-subdev.h>
34
35 #define OV5645_SYSTEM_CTRL0 0x3008
36 #define OV5645_SYSTEM_CTRL0_START 0x02
37 #define OV5645_SYSTEM_CTRL0_STOP 0x42
38 #define OV5645_CHIP_ID_HIGH 0x300a
39 #define OV5645_CHIP_ID_HIGH_BYTE 0x56
40 #define OV5645_CHIP_ID_LOW 0x300b
41 #define OV5645_CHIP_ID_LOW_BYTE 0x45
42 #define OV5645_IO_MIPI_CTRL00 0x300e
43 #define OV5645_PAD_OUTPUT00 0x3019
44 #define OV5645_AWB_MANUAL_CONTROL 0x3406
45 #define OV5645_AWB_MANUAL_ENABLE BIT(0)
46 #define OV5645_AEC_PK_MANUAL 0x3503
47 #define OV5645_AEC_MANUAL_ENABLE BIT(0)
48 #define OV5645_AGC_MANUAL_ENABLE BIT(1)
49 #define OV5645_TIMING_TC_REG20 0x3820
50 #define OV5645_SENSOR_VFLIP BIT(1)
51 #define OV5645_ISP_VFLIP BIT(2)
52 #define OV5645_TIMING_TC_REG21 0x3821
53 #define OV5645_SENSOR_MIRROR BIT(1)
54 #define OV5645_MIPI_CTRL00 0x4800
55 #define OV5645_PRE_ISP_TEST_SETTING_1 0x503d
56 #define OV5645_TEST_PATTERN_MASK 0x3
57 #define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK)
58 #define OV5645_TEST_PATTERN_ENABLE BIT(7)
59 #define OV5645_SDE_SAT_U 0x5583
60 #define OV5645_SDE_SAT_V 0x5584
61
62 /* regulator supplies */
63 static const char * const ov5645_supply_name[] = {
64 "vdddo", /* Digital I/O (1.8V) supply */
65 "vdda", /* Analog (2.8V) supply */
66 "vddd", /* Digital Core (1.5V) supply */
67 };
68
69 #define OV5645_NUM_SUPPLIES ARRAY_SIZE(ov5645_supply_name)
70
71 struct reg_value {
72 u16 reg;
73 u8 val;
74 };
75
76 struct ov5645_mode_info {
77 u32 width;
78 u32 height;
79 const struct reg_value *data;
80 u32 data_size;
81 u32 pixel_clock;
82 u32 link_freq;
83 };
84
85 struct ov5645 {
86 struct i2c_client *i2c_client;
87 struct device *dev;
88 struct v4l2_subdev sd;
89 struct media_pad pad;
90 struct v4l2_fwnode_endpoint ep;
91 struct v4l2_mbus_framefmt fmt;
92 struct v4l2_rect crop;
93 struct clk *xclk;
94
95 struct regulator_bulk_data supplies[OV5645_NUM_SUPPLIES];
96
97 const struct ov5645_mode_info *current_mode;
98
99 struct v4l2_ctrl_handler ctrls;
100 struct v4l2_ctrl *pixel_clock;
101 struct v4l2_ctrl *link_freq;
102
103 /* Cached register values */
104 u8 aec_pk_manual;
105 u8 timing_tc_reg20;
106 u8 timing_tc_reg21;
107
108 struct mutex power_lock; /* lock to protect power state */
109
110 struct gpio_desc *enable_gpio;
111 struct gpio_desc *rst_gpio;
112 };
113
to_ov5645(struct v4l2_subdev * sd)114 static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd)
115 {
116 return container_of(sd, struct ov5645, sd);
117 }
118
119 static const struct reg_value ov5645_global_init_setting[] = {
120 { 0x3103, 0x11 },
121 { 0x3008, 0x82 },
122 { 0x3008, 0x42 },
123 { 0x3103, 0x03 },
124 { 0x3503, 0x07 },
125 { 0x3002, 0x1c },
126 { 0x3006, 0xc3 },
127 { 0x3017, 0x00 },
128 { 0x3018, 0x00 },
129 { 0x302e, 0x0b },
130 { 0x3037, 0x13 },
131 { 0x3108, 0x01 },
132 { 0x3611, 0x06 },
133 { 0x3500, 0x00 },
134 { 0x3501, 0x01 },
135 { 0x3502, 0x00 },
136 { 0x350a, 0x00 },
137 { 0x350b, 0x3f },
138 { 0x3620, 0x33 },
139 { 0x3621, 0xe0 },
140 { 0x3622, 0x01 },
141 { 0x3630, 0x2e },
142 { 0x3631, 0x00 },
143 { 0x3632, 0x32 },
144 { 0x3633, 0x52 },
145 { 0x3634, 0x70 },
146 { 0x3635, 0x13 },
147 { 0x3636, 0x03 },
148 { 0x3703, 0x5a },
149 { 0x3704, 0xa0 },
150 { 0x3705, 0x1a },
151 { 0x3709, 0x12 },
152 { 0x370b, 0x61 },
153 { 0x370f, 0x10 },
154 { 0x3715, 0x78 },
155 { 0x3717, 0x01 },
156 { 0x371b, 0x20 },
157 { 0x3731, 0x12 },
158 { 0x3901, 0x0a },
159 { 0x3905, 0x02 },
160 { 0x3906, 0x10 },
161 { 0x3719, 0x86 },
162 { 0x3810, 0x00 },
163 { 0x3811, 0x10 },
164 { 0x3812, 0x00 },
165 { 0x3821, 0x01 },
166 { 0x3824, 0x01 },
167 { 0x3826, 0x03 },
168 { 0x3828, 0x08 },
169 { 0x3a19, 0xf8 },
170 { 0x3c01, 0x34 },
171 { 0x3c04, 0x28 },
172 { 0x3c05, 0x98 },
173 { 0x3c07, 0x07 },
174 { 0x3c09, 0xc2 },
175 { 0x3c0a, 0x9c },
176 { 0x3c0b, 0x40 },
177 { 0x3c01, 0x34 },
178 { 0x4001, 0x02 },
179 { 0x4514, 0x00 },
180 { 0x4520, 0xb0 },
181 { 0x460b, 0x37 },
182 { 0x460c, 0x20 },
183 { 0x4818, 0x01 },
184 { 0x481d, 0xf0 },
185 { 0x481f, 0x50 },
186 { 0x4823, 0x70 },
187 { 0x4831, 0x14 },
188 { 0x5000, 0xa7 },
189 { 0x5001, 0x83 },
190 { 0x501d, 0x00 },
191 { 0x501f, 0x00 },
192 { 0x503d, 0x00 },
193 { 0x505c, 0x30 },
194 { 0x5181, 0x59 },
195 { 0x5183, 0x00 },
196 { 0x5191, 0xf0 },
197 { 0x5192, 0x03 },
198 { 0x5684, 0x10 },
199 { 0x5685, 0xa0 },
200 { 0x5686, 0x0c },
201 { 0x5687, 0x78 },
202 { 0x5a00, 0x08 },
203 { 0x5a21, 0x00 },
204 { 0x5a24, 0x00 },
205 { 0x3008, 0x02 },
206 { 0x3503, 0x00 },
207 { 0x5180, 0xff },
208 { 0x5181, 0xf2 },
209 { 0x5182, 0x00 },
210 { 0x5183, 0x14 },
211 { 0x5184, 0x25 },
212 { 0x5185, 0x24 },
213 { 0x5186, 0x09 },
214 { 0x5187, 0x09 },
215 { 0x5188, 0x0a },
216 { 0x5189, 0x75 },
217 { 0x518a, 0x52 },
218 { 0x518b, 0xea },
219 { 0x518c, 0xa8 },
220 { 0x518d, 0x42 },
221 { 0x518e, 0x38 },
222 { 0x518f, 0x56 },
223 { 0x5190, 0x42 },
224 { 0x5191, 0xf8 },
225 { 0x5192, 0x04 },
226 { 0x5193, 0x70 },
227 { 0x5194, 0xf0 },
228 { 0x5195, 0xf0 },
229 { 0x5196, 0x03 },
230 { 0x5197, 0x01 },
231 { 0x5198, 0x04 },
232 { 0x5199, 0x12 },
233 { 0x519a, 0x04 },
234 { 0x519b, 0x00 },
235 { 0x519c, 0x06 },
236 { 0x519d, 0x82 },
237 { 0x519e, 0x38 },
238 { 0x5381, 0x1e },
239 { 0x5382, 0x5b },
240 { 0x5383, 0x08 },
241 { 0x5384, 0x0a },
242 { 0x5385, 0x7e },
243 { 0x5386, 0x88 },
244 { 0x5387, 0x7c },
245 { 0x5388, 0x6c },
246 { 0x5389, 0x10 },
247 { 0x538a, 0x01 },
248 { 0x538b, 0x98 },
249 { 0x5300, 0x08 },
250 { 0x5301, 0x30 },
251 { 0x5302, 0x10 },
252 { 0x5303, 0x00 },
253 { 0x5304, 0x08 },
254 { 0x5305, 0x30 },
255 { 0x5306, 0x08 },
256 { 0x5307, 0x16 },
257 { 0x5309, 0x08 },
258 { 0x530a, 0x30 },
259 { 0x530b, 0x04 },
260 { 0x530c, 0x06 },
261 { 0x5480, 0x01 },
262 { 0x5481, 0x08 },
263 { 0x5482, 0x14 },
264 { 0x5483, 0x28 },
265 { 0x5484, 0x51 },
266 { 0x5485, 0x65 },
267 { 0x5486, 0x71 },
268 { 0x5487, 0x7d },
269 { 0x5488, 0x87 },
270 { 0x5489, 0x91 },
271 { 0x548a, 0x9a },
272 { 0x548b, 0xaa },
273 { 0x548c, 0xb8 },
274 { 0x548d, 0xcd },
275 { 0x548e, 0xdd },
276 { 0x548f, 0xea },
277 { 0x5490, 0x1d },
278 { 0x5580, 0x02 },
279 { 0x5583, 0x40 },
280 { 0x5584, 0x10 },
281 { 0x5589, 0x10 },
282 { 0x558a, 0x00 },
283 { 0x558b, 0xf8 },
284 { 0x5800, 0x3f },
285 { 0x5801, 0x16 },
286 { 0x5802, 0x0e },
287 { 0x5803, 0x0d },
288 { 0x5804, 0x17 },
289 { 0x5805, 0x3f },
290 { 0x5806, 0x0b },
291 { 0x5807, 0x06 },
292 { 0x5808, 0x04 },
293 { 0x5809, 0x04 },
294 { 0x580a, 0x06 },
295 { 0x580b, 0x0b },
296 { 0x580c, 0x09 },
297 { 0x580d, 0x03 },
298 { 0x580e, 0x00 },
299 { 0x580f, 0x00 },
300 { 0x5810, 0x03 },
301 { 0x5811, 0x08 },
302 { 0x5812, 0x0a },
303 { 0x5813, 0x03 },
304 { 0x5814, 0x00 },
305 { 0x5815, 0x00 },
306 { 0x5816, 0x04 },
307 { 0x5817, 0x09 },
308 { 0x5818, 0x0f },
309 { 0x5819, 0x08 },
310 { 0x581a, 0x06 },
311 { 0x581b, 0x06 },
312 { 0x581c, 0x08 },
313 { 0x581d, 0x0c },
314 { 0x581e, 0x3f },
315 { 0x581f, 0x1e },
316 { 0x5820, 0x12 },
317 { 0x5821, 0x13 },
318 { 0x5822, 0x21 },
319 { 0x5823, 0x3f },
320 { 0x5824, 0x68 },
321 { 0x5825, 0x28 },
322 { 0x5826, 0x2c },
323 { 0x5827, 0x28 },
324 { 0x5828, 0x08 },
325 { 0x5829, 0x48 },
326 { 0x582a, 0x64 },
327 { 0x582b, 0x62 },
328 { 0x582c, 0x64 },
329 { 0x582d, 0x28 },
330 { 0x582e, 0x46 },
331 { 0x582f, 0x62 },
332 { 0x5830, 0x60 },
333 { 0x5831, 0x62 },
334 { 0x5832, 0x26 },
335 { 0x5833, 0x48 },
336 { 0x5834, 0x66 },
337 { 0x5835, 0x44 },
338 { 0x5836, 0x64 },
339 { 0x5837, 0x28 },
340 { 0x5838, 0x66 },
341 { 0x5839, 0x48 },
342 { 0x583a, 0x2c },
343 { 0x583b, 0x28 },
344 { 0x583c, 0x26 },
345 { 0x583d, 0xae },
346 { 0x5025, 0x00 },
347 { 0x3a0f, 0x30 },
348 { 0x3a10, 0x28 },
349 { 0x3a1b, 0x30 },
350 { 0x3a1e, 0x26 },
351 { 0x3a11, 0x60 },
352 { 0x3a1f, 0x14 },
353 { 0x0601, 0x02 },
354 { 0x3008, 0x42 },
355 { 0x3008, 0x02 },
356 { OV5645_IO_MIPI_CTRL00, 0x40 },
357 { OV5645_MIPI_CTRL00, 0x24 },
358 { OV5645_PAD_OUTPUT00, 0x70 }
359 };
360
361 static const struct reg_value ov5645_setting_sxga[] = {
362 { 0x3612, 0xa9 },
363 { 0x3614, 0x50 },
364 { 0x3618, 0x00 },
365 { 0x3034, 0x18 },
366 { 0x3035, 0x21 },
367 { 0x3036, 0x70 },
368 { 0x3600, 0x09 },
369 { 0x3601, 0x43 },
370 { 0x3708, 0x66 },
371 { 0x370c, 0xc3 },
372 { 0x3800, 0x00 },
373 { 0x3801, 0x00 },
374 { 0x3802, 0x00 },
375 { 0x3803, 0x06 },
376 { 0x3804, 0x0a },
377 { 0x3805, 0x3f },
378 { 0x3806, 0x07 },
379 { 0x3807, 0x9d },
380 { 0x3808, 0x05 },
381 { 0x3809, 0x00 },
382 { 0x380a, 0x03 },
383 { 0x380b, 0xc0 },
384 { 0x380c, 0x07 },
385 { 0x380d, 0x68 },
386 { 0x380e, 0x03 },
387 { 0x380f, 0xd8 },
388 { 0x3813, 0x06 },
389 { 0x3814, 0x31 },
390 { 0x3815, 0x31 },
391 { 0x3820, 0x47 },
392 { 0x3a02, 0x03 },
393 { 0x3a03, 0xd8 },
394 { 0x3a08, 0x01 },
395 { 0x3a09, 0xf8 },
396 { 0x3a0a, 0x01 },
397 { 0x3a0b, 0xa4 },
398 { 0x3a0e, 0x02 },
399 { 0x3a0d, 0x02 },
400 { 0x3a14, 0x03 },
401 { 0x3a15, 0xd8 },
402 { 0x3a18, 0x00 },
403 { 0x4004, 0x02 },
404 { 0x4005, 0x18 },
405 { 0x4300, 0x32 },
406 { 0x4202, 0x00 }
407 };
408
409 static const struct reg_value ov5645_setting_1080p[] = {
410 { 0x3612, 0xab },
411 { 0x3614, 0x50 },
412 { 0x3618, 0x04 },
413 { 0x3034, 0x18 },
414 { 0x3035, 0x11 },
415 { 0x3036, 0x54 },
416 { 0x3600, 0x08 },
417 { 0x3601, 0x33 },
418 { 0x3708, 0x63 },
419 { 0x370c, 0xc0 },
420 { 0x3800, 0x01 },
421 { 0x3801, 0x50 },
422 { 0x3802, 0x01 },
423 { 0x3803, 0xb2 },
424 { 0x3804, 0x08 },
425 { 0x3805, 0xef },
426 { 0x3806, 0x05 },
427 { 0x3807, 0xf1 },
428 { 0x3808, 0x07 },
429 { 0x3809, 0x80 },
430 { 0x380a, 0x04 },
431 { 0x380b, 0x38 },
432 { 0x380c, 0x09 },
433 { 0x380d, 0xc4 },
434 { 0x380e, 0x04 },
435 { 0x380f, 0x60 },
436 { 0x3813, 0x04 },
437 { 0x3814, 0x11 },
438 { 0x3815, 0x11 },
439 { 0x3820, 0x47 },
440 { 0x4514, 0x88 },
441 { 0x3a02, 0x04 },
442 { 0x3a03, 0x60 },
443 { 0x3a08, 0x01 },
444 { 0x3a09, 0x50 },
445 { 0x3a0a, 0x01 },
446 { 0x3a0b, 0x18 },
447 { 0x3a0e, 0x03 },
448 { 0x3a0d, 0x04 },
449 { 0x3a14, 0x04 },
450 { 0x3a15, 0x60 },
451 { 0x3a18, 0x00 },
452 { 0x4004, 0x06 },
453 { 0x4005, 0x18 },
454 { 0x4300, 0x32 },
455 { 0x4202, 0x00 },
456 { 0x4837, 0x0b }
457 };
458
459 static const struct reg_value ov5645_setting_full[] = {
460 { 0x3612, 0xab },
461 { 0x3614, 0x50 },
462 { 0x3618, 0x04 },
463 { 0x3034, 0x18 },
464 { 0x3035, 0x11 },
465 { 0x3036, 0x54 },
466 { 0x3600, 0x08 },
467 { 0x3601, 0x33 },
468 { 0x3708, 0x63 },
469 { 0x370c, 0xc0 },
470 { 0x3800, 0x00 },
471 { 0x3801, 0x00 },
472 { 0x3802, 0x00 },
473 { 0x3803, 0x00 },
474 { 0x3804, 0x0a },
475 { 0x3805, 0x3f },
476 { 0x3806, 0x07 },
477 { 0x3807, 0x9f },
478 { 0x3808, 0x0a },
479 { 0x3809, 0x20 },
480 { 0x380a, 0x07 },
481 { 0x380b, 0x98 },
482 { 0x380c, 0x0b },
483 { 0x380d, 0x1c },
484 { 0x380e, 0x07 },
485 { 0x380f, 0xb0 },
486 { 0x3813, 0x06 },
487 { 0x3814, 0x11 },
488 { 0x3815, 0x11 },
489 { 0x3820, 0x47 },
490 { 0x4514, 0x88 },
491 { 0x3a02, 0x07 },
492 { 0x3a03, 0xb0 },
493 { 0x3a08, 0x01 },
494 { 0x3a09, 0x27 },
495 { 0x3a0a, 0x00 },
496 { 0x3a0b, 0xf6 },
497 { 0x3a0e, 0x06 },
498 { 0x3a0d, 0x08 },
499 { 0x3a14, 0x07 },
500 { 0x3a15, 0xb0 },
501 { 0x3a18, 0x01 },
502 { 0x4004, 0x06 },
503 { 0x4005, 0x18 },
504 { 0x4300, 0x32 },
505 { 0x4837, 0x0b },
506 { 0x4202, 0x00 }
507 };
508
509 static const s64 link_freq[] = {
510 224000000,
511 336000000
512 };
513
514 static const struct ov5645_mode_info ov5645_mode_info_data[] = {
515 {
516 .width = 1280,
517 .height = 960,
518 .data = ov5645_setting_sxga,
519 .data_size = ARRAY_SIZE(ov5645_setting_sxga),
520 .pixel_clock = 112000000,
521 .link_freq = 0 /* an index in link_freq[] */
522 },
523 {
524 .width = 1920,
525 .height = 1080,
526 .data = ov5645_setting_1080p,
527 .data_size = ARRAY_SIZE(ov5645_setting_1080p),
528 .pixel_clock = 168000000,
529 .link_freq = 1 /* an index in link_freq[] */
530 },
531 {
532 .width = 2592,
533 .height = 1944,
534 .data = ov5645_setting_full,
535 .data_size = ARRAY_SIZE(ov5645_setting_full),
536 .pixel_clock = 168000000,
537 .link_freq = 1 /* an index in link_freq[] */
538 },
539 };
540
ov5645_write_reg(struct ov5645 * ov5645,u16 reg,u8 val)541 static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val)
542 {
543 u8 regbuf[3];
544 int ret;
545
546 regbuf[0] = reg >> 8;
547 regbuf[1] = reg & 0xff;
548 regbuf[2] = val;
549
550 ret = i2c_master_send(ov5645->i2c_client, regbuf, 3);
551 if (ret < 0) {
552 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n",
553 __func__, ret, reg, val);
554 return ret;
555 }
556
557 return 0;
558 }
559
ov5645_read_reg(struct ov5645 * ov5645,u16 reg,u8 * val)560 static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val)
561 {
562 u8 regbuf[2];
563 int ret;
564
565 regbuf[0] = reg >> 8;
566 regbuf[1] = reg & 0xff;
567
568 ret = i2c_master_send(ov5645->i2c_client, regbuf, 2);
569 if (ret < 0) {
570 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n",
571 __func__, ret, reg);
572 return ret;
573 }
574
575 ret = i2c_master_recv(ov5645->i2c_client, val, 1);
576 if (ret < 0) {
577 dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n",
578 __func__, ret, reg);
579 return ret;
580 }
581
582 return 0;
583 }
584
ov5645_set_aec_mode(struct ov5645 * ov5645,u32 mode)585 static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode)
586 {
587 u8 val = ov5645->aec_pk_manual;
588 int ret;
589
590 if (mode == V4L2_EXPOSURE_AUTO)
591 val &= ~OV5645_AEC_MANUAL_ENABLE;
592 else /* V4L2_EXPOSURE_MANUAL */
593 val |= OV5645_AEC_MANUAL_ENABLE;
594
595 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
596 if (!ret)
597 ov5645->aec_pk_manual = val;
598
599 return ret;
600 }
601
ov5645_set_agc_mode(struct ov5645 * ov5645,u32 enable)602 static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable)
603 {
604 u8 val = ov5645->aec_pk_manual;
605 int ret;
606
607 if (enable)
608 val &= ~OV5645_AGC_MANUAL_ENABLE;
609 else
610 val |= OV5645_AGC_MANUAL_ENABLE;
611
612 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
613 if (!ret)
614 ov5645->aec_pk_manual = val;
615
616 return ret;
617 }
618
ov5645_set_register_array(struct ov5645 * ov5645,const struct reg_value * settings,unsigned int num_settings)619 static int ov5645_set_register_array(struct ov5645 *ov5645,
620 const struct reg_value *settings,
621 unsigned int num_settings)
622 {
623 unsigned int i;
624 int ret;
625
626 for (i = 0; i < num_settings; ++i, ++settings) {
627 ret = ov5645_write_reg(ov5645, settings->reg, settings->val);
628 if (ret < 0)
629 return ret;
630 }
631
632 return 0;
633 }
634
ov5645_set_power_off(struct device * dev)635 static int ov5645_set_power_off(struct device *dev)
636 {
637 struct v4l2_subdev *sd = dev_get_drvdata(dev);
638 struct ov5645 *ov5645 = to_ov5645(sd);
639
640 ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x58);
641 gpiod_set_value_cansleep(ov5645->rst_gpio, 1);
642 gpiod_set_value_cansleep(ov5645->enable_gpio, 0);
643 clk_disable_unprepare(ov5645->xclk);
644 regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies);
645
646 return 0;
647 }
648
ov5645_set_power_on(struct device * dev)649 static int ov5645_set_power_on(struct device *dev)
650 {
651 struct v4l2_subdev *sd = dev_get_drvdata(dev);
652 struct ov5645 *ov5645 = to_ov5645(sd);
653 int ret;
654
655 ret = regulator_bulk_enable(OV5645_NUM_SUPPLIES, ov5645->supplies);
656 if (ret < 0)
657 return ret;
658
659 ret = clk_prepare_enable(ov5645->xclk);
660 if (ret < 0) {
661 dev_err(ov5645->dev, "clk prepare enable failed\n");
662 regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies);
663 return ret;
664 }
665
666 usleep_range(5000, 15000);
667 gpiod_set_value_cansleep(ov5645->enable_gpio, 1);
668
669 usleep_range(1000, 2000);
670 gpiod_set_value_cansleep(ov5645->rst_gpio, 0);
671
672 msleep(20);
673
674 ret = ov5645_set_register_array(ov5645, ov5645_global_init_setting,
675 ARRAY_SIZE(ov5645_global_init_setting));
676 if (ret < 0) {
677 dev_err(ov5645->dev, "could not set init registers\n");
678 goto exit;
679 }
680
681 usleep_range(500, 1000);
682
683 return 0;
684
685 exit:
686 ov5645_set_power_off(dev);
687 return ret;
688 }
689
ov5645_set_saturation(struct ov5645 * ov5645,s32 value)690 static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value)
691 {
692 u32 reg_value = (value * 0x10) + 0x40;
693 int ret;
694
695 ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value);
696 if (ret < 0)
697 return ret;
698
699 return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value);
700 }
701
ov5645_set_hflip(struct ov5645 * ov5645,s32 value)702 static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value)
703 {
704 u8 val = ov5645->timing_tc_reg21;
705 int ret;
706
707 if (value == 0)
708 val &= ~(OV5645_SENSOR_MIRROR);
709 else
710 val |= (OV5645_SENSOR_MIRROR);
711
712 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val);
713 if (!ret)
714 ov5645->timing_tc_reg21 = val;
715
716 return ret;
717 }
718
ov5645_set_vflip(struct ov5645 * ov5645,s32 value)719 static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value)
720 {
721 u8 val = ov5645->timing_tc_reg20;
722 int ret;
723
724 if (value == 0)
725 val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
726 else
727 val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
728
729 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val);
730 if (!ret)
731 ov5645->timing_tc_reg20 = val;
732
733 return ret;
734 }
735
ov5645_set_test_pattern(struct ov5645 * ov5645,s32 value)736 static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value)
737 {
738 u8 val = 0;
739
740 if (value) {
741 val = OV5645_SET_TEST_PATTERN(value - 1);
742 val |= OV5645_TEST_PATTERN_ENABLE;
743 }
744
745 return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val);
746 }
747
748 static const char * const ov5645_test_pattern_menu[] = {
749 "Disabled",
750 "Vertical Color Bars",
751 "Pseudo-Random Data",
752 "Color Square",
753 "Black Image",
754 };
755
ov5645_set_awb(struct ov5645 * ov5645,s32 enable_auto)756 static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto)
757 {
758 u8 val = 0;
759
760 if (!enable_auto)
761 val = OV5645_AWB_MANUAL_ENABLE;
762
763 return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val);
764 }
765
ov5645_s_ctrl(struct v4l2_ctrl * ctrl)766 static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl)
767 {
768 struct ov5645 *ov5645 = container_of(ctrl->handler,
769 struct ov5645, ctrls);
770 int ret;
771
772 mutex_lock(&ov5645->power_lock);
773 if (!pm_runtime_get_if_in_use(ov5645->dev)) {
774 mutex_unlock(&ov5645->power_lock);
775 return 0;
776 }
777
778 switch (ctrl->id) {
779 case V4L2_CID_SATURATION:
780 ret = ov5645_set_saturation(ov5645, ctrl->val);
781 break;
782 case V4L2_CID_AUTO_WHITE_BALANCE:
783 ret = ov5645_set_awb(ov5645, ctrl->val);
784 break;
785 case V4L2_CID_AUTOGAIN:
786 ret = ov5645_set_agc_mode(ov5645, ctrl->val);
787 break;
788 case V4L2_CID_EXPOSURE_AUTO:
789 ret = ov5645_set_aec_mode(ov5645, ctrl->val);
790 break;
791 case V4L2_CID_TEST_PATTERN:
792 ret = ov5645_set_test_pattern(ov5645, ctrl->val);
793 break;
794 case V4L2_CID_HFLIP:
795 ret = ov5645_set_hflip(ov5645, ctrl->val);
796 break;
797 case V4L2_CID_VFLIP:
798 ret = ov5645_set_vflip(ov5645, ctrl->val);
799 break;
800 default:
801 ret = -EINVAL;
802 break;
803 }
804
805 pm_runtime_mark_last_busy(ov5645->dev);
806 pm_runtime_put_autosuspend(ov5645->dev);
807 mutex_unlock(&ov5645->power_lock);
808
809 return ret;
810 }
811
812 static const struct v4l2_ctrl_ops ov5645_ctrl_ops = {
813 .s_ctrl = ov5645_s_ctrl,
814 };
815
ov5645_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)816 static int ov5645_enum_mbus_code(struct v4l2_subdev *sd,
817 struct v4l2_subdev_state *sd_state,
818 struct v4l2_subdev_mbus_code_enum *code)
819 {
820 if (code->index > 0)
821 return -EINVAL;
822
823 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
824
825 return 0;
826 }
827
ov5645_enum_frame_size(struct v4l2_subdev * subdev,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_size_enum * fse)828 static int ov5645_enum_frame_size(struct v4l2_subdev *subdev,
829 struct v4l2_subdev_state *sd_state,
830 struct v4l2_subdev_frame_size_enum *fse)
831 {
832 if (fse->code != MEDIA_BUS_FMT_UYVY8_1X16)
833 return -EINVAL;
834
835 if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data))
836 return -EINVAL;
837
838 fse->min_width = ov5645_mode_info_data[fse->index].width;
839 fse->max_width = ov5645_mode_info_data[fse->index].width;
840 fse->min_height = ov5645_mode_info_data[fse->index].height;
841 fse->max_height = ov5645_mode_info_data[fse->index].height;
842
843 return 0;
844 }
845
846 static struct v4l2_mbus_framefmt *
__ov5645_get_pad_format(struct ov5645 * ov5645,struct v4l2_subdev_state * sd_state,unsigned int pad,enum v4l2_subdev_format_whence which)847 __ov5645_get_pad_format(struct ov5645 *ov5645,
848 struct v4l2_subdev_state *sd_state,
849 unsigned int pad,
850 enum v4l2_subdev_format_whence which)
851 {
852 switch (which) {
853 case V4L2_SUBDEV_FORMAT_TRY:
854 return v4l2_subdev_get_try_format(&ov5645->sd, sd_state, pad);
855 case V4L2_SUBDEV_FORMAT_ACTIVE:
856 return &ov5645->fmt;
857 default:
858 return NULL;
859 }
860 }
861
ov5645_get_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * format)862 static int ov5645_get_format(struct v4l2_subdev *sd,
863 struct v4l2_subdev_state *sd_state,
864 struct v4l2_subdev_format *format)
865 {
866 struct ov5645 *ov5645 = to_ov5645(sd);
867
868 format->format = *__ov5645_get_pad_format(ov5645, sd_state,
869 format->pad,
870 format->which);
871 return 0;
872 }
873
874 static struct v4l2_rect *
__ov5645_get_pad_crop(struct ov5645 * ov5645,struct v4l2_subdev_state * sd_state,unsigned int pad,enum v4l2_subdev_format_whence which)875 __ov5645_get_pad_crop(struct ov5645 *ov5645,
876 struct v4l2_subdev_state *sd_state,
877 unsigned int pad, enum v4l2_subdev_format_whence which)
878 {
879 switch (which) {
880 case V4L2_SUBDEV_FORMAT_TRY:
881 return v4l2_subdev_get_try_crop(&ov5645->sd, sd_state, pad);
882 case V4L2_SUBDEV_FORMAT_ACTIVE:
883 return &ov5645->crop;
884 default:
885 return NULL;
886 }
887 }
888
ov5645_set_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * format)889 static int ov5645_set_format(struct v4l2_subdev *sd,
890 struct v4l2_subdev_state *sd_state,
891 struct v4l2_subdev_format *format)
892 {
893 struct ov5645 *ov5645 = to_ov5645(sd);
894 struct v4l2_mbus_framefmt *__format;
895 struct v4l2_rect *__crop;
896 const struct ov5645_mode_info *new_mode;
897 int ret;
898
899 __crop = __ov5645_get_pad_crop(ov5645, sd_state, format->pad,
900 format->which);
901
902 new_mode = v4l2_find_nearest_size(ov5645_mode_info_data,
903 ARRAY_SIZE(ov5645_mode_info_data),
904 width, height,
905 format->format.width, format->format.height);
906
907 __crop->width = new_mode->width;
908 __crop->height = new_mode->height;
909
910 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
911 ret = v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock,
912 new_mode->pixel_clock);
913 if (ret < 0)
914 return ret;
915
916 ret = v4l2_ctrl_s_ctrl(ov5645->link_freq,
917 new_mode->link_freq);
918 if (ret < 0)
919 return ret;
920
921 ov5645->current_mode = new_mode;
922 }
923
924 __format = __ov5645_get_pad_format(ov5645, sd_state, format->pad,
925 format->which);
926 __format->width = __crop->width;
927 __format->height = __crop->height;
928 __format->code = MEDIA_BUS_FMT_UYVY8_1X16;
929 __format->field = V4L2_FIELD_NONE;
930 __format->colorspace = V4L2_COLORSPACE_SRGB;
931
932 format->format = *__format;
933
934 return 0;
935 }
936
ov5645_entity_init_cfg(struct v4l2_subdev * subdev,struct v4l2_subdev_state * sd_state)937 static int ov5645_entity_init_cfg(struct v4l2_subdev *subdev,
938 struct v4l2_subdev_state *sd_state)
939 {
940 struct v4l2_subdev_format fmt = { 0 };
941
942 fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
943 fmt.format.width = 1920;
944 fmt.format.height = 1080;
945
946 ov5645_set_format(subdev, sd_state, &fmt);
947
948 return 0;
949 }
950
ov5645_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_selection * sel)951 static int ov5645_get_selection(struct v4l2_subdev *sd,
952 struct v4l2_subdev_state *sd_state,
953 struct v4l2_subdev_selection *sel)
954 {
955 struct ov5645 *ov5645 = to_ov5645(sd);
956
957 if (sel->target != V4L2_SEL_TGT_CROP)
958 return -EINVAL;
959
960 sel->r = *__ov5645_get_pad_crop(ov5645, sd_state, sel->pad,
961 sel->which);
962 return 0;
963 }
964
ov5645_s_stream(struct v4l2_subdev * subdev,int enable)965 static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable)
966 {
967 struct ov5645 *ov5645 = to_ov5645(subdev);
968 int ret;
969
970 if (enable) {
971 ret = pm_runtime_resume_and_get(ov5645->dev);
972 if (ret < 0)
973 return ret;
974
975 ret = ov5645_set_register_array(ov5645,
976 ov5645->current_mode->data,
977 ov5645->current_mode->data_size);
978 if (ret < 0) {
979 dev_err(ov5645->dev, "could not set mode %dx%d\n",
980 ov5645->current_mode->width,
981 ov5645->current_mode->height);
982 goto err_rpm_put;
983 }
984 ret = v4l2_ctrl_handler_setup(&ov5645->ctrls);
985 if (ret < 0) {
986 dev_err(ov5645->dev, "could not sync v4l2 controls\n");
987 goto err_rpm_put;
988 }
989
990 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x45);
991 if (ret < 0)
992 goto err_rpm_put;
993
994 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
995 OV5645_SYSTEM_CTRL0_START);
996 if (ret < 0)
997 goto err_rpm_put;
998 } else {
999 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x40);
1000 if (ret < 0)
1001 goto stream_off_rpm_put;
1002
1003 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
1004 OV5645_SYSTEM_CTRL0_STOP);
1005
1006 goto stream_off_rpm_put;
1007 }
1008
1009 return 0;
1010
1011 err_rpm_put:
1012 pm_runtime_put_sync(ov5645->dev);
1013 return ret;
1014
1015 stream_off_rpm_put:
1016 pm_runtime_mark_last_busy(ov5645->dev);
1017 pm_runtime_put_autosuspend(ov5645->dev);
1018 return ret;
1019 }
1020
1021 static const struct v4l2_subdev_video_ops ov5645_video_ops = {
1022 .s_stream = ov5645_s_stream,
1023 };
1024
1025 static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = {
1026 .init_cfg = ov5645_entity_init_cfg,
1027 .enum_mbus_code = ov5645_enum_mbus_code,
1028 .enum_frame_size = ov5645_enum_frame_size,
1029 .get_fmt = ov5645_get_format,
1030 .set_fmt = ov5645_set_format,
1031 .get_selection = ov5645_get_selection,
1032 };
1033
1034 static const struct v4l2_subdev_ops ov5645_subdev_ops = {
1035 .video = &ov5645_video_ops,
1036 .pad = &ov5645_subdev_pad_ops,
1037 };
1038
ov5645_probe(struct i2c_client * client)1039 static int ov5645_probe(struct i2c_client *client)
1040 {
1041 struct device *dev = &client->dev;
1042 struct device_node *endpoint;
1043 struct ov5645 *ov5645;
1044 u8 chip_id_high, chip_id_low;
1045 unsigned int i;
1046 u32 xclk_freq;
1047 int ret;
1048
1049 ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL);
1050 if (!ov5645)
1051 return -ENOMEM;
1052
1053 ov5645->i2c_client = client;
1054 ov5645->dev = dev;
1055
1056 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
1057 if (!endpoint) {
1058 dev_err(dev, "endpoint node not found\n");
1059 return -EINVAL;
1060 }
1061
1062 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
1063 &ov5645->ep);
1064
1065 of_node_put(endpoint);
1066
1067 if (ret < 0) {
1068 dev_err(dev, "parsing endpoint node failed\n");
1069 return ret;
1070 }
1071
1072 if (ov5645->ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
1073 dev_err(dev, "invalid bus type, must be CSI2\n");
1074 return -EINVAL;
1075 }
1076
1077 /* get system clock (xclk) */
1078 ov5645->xclk = devm_clk_get(dev, NULL);
1079 if (IS_ERR(ov5645->xclk)) {
1080 dev_err(dev, "could not get xclk");
1081 return PTR_ERR(ov5645->xclk);
1082 }
1083
1084 ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq);
1085 if (ret) {
1086 dev_err(dev, "could not get xclk frequency\n");
1087 return ret;
1088 }
1089
1090 /* external clock must be 24MHz, allow 1% tolerance */
1091 if (xclk_freq < 23760000 || xclk_freq > 24240000) {
1092 dev_err(dev, "external clock frequency %u is not supported\n",
1093 xclk_freq);
1094 return -EINVAL;
1095 }
1096
1097 ret = clk_set_rate(ov5645->xclk, xclk_freq);
1098 if (ret) {
1099 dev_err(dev, "could not set xclk frequency\n");
1100 return ret;
1101 }
1102
1103 for (i = 0; i < OV5645_NUM_SUPPLIES; i++)
1104 ov5645->supplies[i].supply = ov5645_supply_name[i];
1105
1106 ret = devm_regulator_bulk_get(dev, OV5645_NUM_SUPPLIES,
1107 ov5645->supplies);
1108 if (ret < 0)
1109 return ret;
1110
1111 ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH);
1112 if (IS_ERR(ov5645->enable_gpio)) {
1113 dev_err(dev, "cannot get enable gpio\n");
1114 return PTR_ERR(ov5645->enable_gpio);
1115 }
1116
1117 ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
1118 if (IS_ERR(ov5645->rst_gpio)) {
1119 dev_err(dev, "cannot get reset gpio\n");
1120 return PTR_ERR(ov5645->rst_gpio);
1121 }
1122
1123 mutex_init(&ov5645->power_lock);
1124
1125 v4l2_ctrl_handler_init(&ov5645->ctrls, 9);
1126 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1127 V4L2_CID_SATURATION, -4, 4, 1, 0);
1128 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1129 V4L2_CID_HFLIP, 0, 1, 1, 0);
1130 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1131 V4L2_CID_VFLIP, 0, 1, 1, 0);
1132 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1133 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1134 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1135 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
1136 v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops,
1137 V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL,
1138 0, V4L2_EXPOSURE_AUTO);
1139 v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops,
1140 V4L2_CID_TEST_PATTERN,
1141 ARRAY_SIZE(ov5645_test_pattern_menu) - 1,
1142 0, 0, ov5645_test_pattern_menu);
1143 ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrls,
1144 &ov5645_ctrl_ops,
1145 V4L2_CID_PIXEL_RATE,
1146 1, INT_MAX, 1, 1);
1147 ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrls,
1148 &ov5645_ctrl_ops,
1149 V4L2_CID_LINK_FREQ,
1150 ARRAY_SIZE(link_freq) - 1,
1151 0, link_freq);
1152 if (ov5645->link_freq)
1153 ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1154
1155 ov5645->sd.ctrl_handler = &ov5645->ctrls;
1156
1157 if (ov5645->ctrls.error) {
1158 dev_err(dev, "%s: control initialization error %d\n",
1159 __func__, ov5645->ctrls.error);
1160 ret = ov5645->ctrls.error;
1161 goto free_ctrl;
1162 }
1163
1164 v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops);
1165 ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1166 ov5645->pad.flags = MEDIA_PAD_FL_SOURCE;
1167 ov5645->sd.dev = &client->dev;
1168 ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1169
1170 ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad);
1171 if (ret < 0) {
1172 dev_err(dev, "could not register media entity\n");
1173 goto free_ctrl;
1174 }
1175
1176 ret = ov5645_set_power_on(dev);
1177 if (ret)
1178 goto free_entity;
1179
1180 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high);
1181 if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) {
1182 dev_err(dev, "could not read ID high\n");
1183 ret = -ENODEV;
1184 goto power_down;
1185 }
1186 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low);
1187 if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) {
1188 dev_err(dev, "could not read ID low\n");
1189 ret = -ENODEV;
1190 goto power_down;
1191 }
1192
1193 dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr);
1194
1195 ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL,
1196 &ov5645->aec_pk_manual);
1197 if (ret < 0) {
1198 dev_err(dev, "could not read AEC/AGC mode\n");
1199 ret = -ENODEV;
1200 goto power_down;
1201 }
1202
1203 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20,
1204 &ov5645->timing_tc_reg20);
1205 if (ret < 0) {
1206 dev_err(dev, "could not read vflip value\n");
1207 ret = -ENODEV;
1208 goto power_down;
1209 }
1210
1211 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21,
1212 &ov5645->timing_tc_reg21);
1213 if (ret < 0) {
1214 dev_err(dev, "could not read hflip value\n");
1215 ret = -ENODEV;
1216 goto power_down;
1217 }
1218
1219 pm_runtime_set_active(dev);
1220 pm_runtime_get_noresume(dev);
1221 pm_runtime_enable(dev);
1222
1223 ov5645_entity_init_cfg(&ov5645->sd, NULL);
1224
1225 ret = v4l2_async_register_subdev(&ov5645->sd);
1226 if (ret < 0) {
1227 dev_err(dev, "could not register v4l2 device\n");
1228 goto err_pm_runtime;
1229 }
1230
1231 pm_runtime_set_autosuspend_delay(dev, 1000);
1232 pm_runtime_use_autosuspend(dev);
1233 pm_runtime_mark_last_busy(dev);
1234 pm_runtime_put_autosuspend(dev);
1235
1236 return 0;
1237
1238 err_pm_runtime:
1239 pm_runtime_disable(dev);
1240 pm_runtime_put_noidle(dev);
1241 power_down:
1242 ov5645_set_power_off(dev);
1243 free_entity:
1244 media_entity_cleanup(&ov5645->sd.entity);
1245 free_ctrl:
1246 v4l2_ctrl_handler_free(&ov5645->ctrls);
1247 mutex_destroy(&ov5645->power_lock);
1248
1249 return ret;
1250 }
1251
ov5645_remove(struct i2c_client * client)1252 static void ov5645_remove(struct i2c_client *client)
1253 {
1254 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1255 struct ov5645 *ov5645 = to_ov5645(sd);
1256
1257 v4l2_async_unregister_subdev(&ov5645->sd);
1258 media_entity_cleanup(&ov5645->sd.entity);
1259 v4l2_ctrl_handler_free(&ov5645->ctrls);
1260 pm_runtime_disable(ov5645->dev);
1261 if (!pm_runtime_status_suspended(ov5645->dev))
1262 ov5645_set_power_off(ov5645->dev);
1263 pm_runtime_set_suspended(ov5645->dev);
1264 mutex_destroy(&ov5645->power_lock);
1265 }
1266
1267 static const struct i2c_device_id ov5645_id[] = {
1268 { "ov5645", 0 },
1269 {}
1270 };
1271 MODULE_DEVICE_TABLE(i2c, ov5645_id);
1272
1273 static const struct of_device_id ov5645_of_match[] = {
1274 { .compatible = "ovti,ov5645" },
1275 { /* sentinel */ }
1276 };
1277 MODULE_DEVICE_TABLE(of, ov5645_of_match);
1278
1279 static const struct dev_pm_ops ov5645_pm_ops = {
1280 SET_RUNTIME_PM_OPS(ov5645_set_power_off, ov5645_set_power_on, NULL)
1281 };
1282
1283 static struct i2c_driver ov5645_i2c_driver = {
1284 .driver = {
1285 .of_match_table = ov5645_of_match,
1286 .name = "ov5645",
1287 .pm = &ov5645_pm_ops,
1288 },
1289 .probe = ov5645_probe,
1290 .remove = ov5645_remove,
1291 .id_table = ov5645_id,
1292 };
1293
1294 module_i2c_driver(ov5645_i2c_driver);
1295
1296 MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver");
1297 MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>");
1298 MODULE_LICENSE("GPL v2");
1299