xref: /openbmc/linux/drivers/media/i2c/ov5640.c (revision e15a5365)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
4  * Copyright (C) 2014-2017 Mentor Graphics Inc.
5  */
6 
7 #include <linux/clk.h>
8 #include <linux/clk-provider.h>
9 #include <linux/clkdev.h>
10 #include <linux/ctype.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/i2c.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/slab.h>
20 #include <linux/types.h>
21 #include <media/v4l2-async.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-event.h>
25 #include <media/v4l2-fwnode.h>
26 #include <media/v4l2-subdev.h>
27 
28 /* min/typical/max system clock (xclk) frequencies */
29 #define OV5640_XCLK_MIN  6000000
30 #define OV5640_XCLK_MAX 54000000
31 
32 #define OV5640_DEFAULT_SLAVE_ID 0x3c
33 
34 #define OV5640_REG_SYS_RESET02		0x3002
35 #define OV5640_REG_SYS_CLOCK_ENABLE02	0x3006
36 #define OV5640_REG_SYS_CTRL0		0x3008
37 #define OV5640_REG_SYS_CTRL0_SW_PWDN	0x42
38 #define OV5640_REG_SYS_CTRL0_SW_PWUP	0x02
39 #define OV5640_REG_CHIP_ID		0x300a
40 #define OV5640_REG_IO_MIPI_CTRL00	0x300e
41 #define OV5640_REG_PAD_OUTPUT_ENABLE01	0x3017
42 #define OV5640_REG_PAD_OUTPUT_ENABLE02	0x3018
43 #define OV5640_REG_PAD_OUTPUT00		0x3019
44 #define OV5640_REG_SYSTEM_CONTROL1	0x302e
45 #define OV5640_REG_SC_PLL_CTRL0		0x3034
46 #define OV5640_REG_SC_PLL_CTRL1		0x3035
47 #define OV5640_REG_SC_PLL_CTRL2		0x3036
48 #define OV5640_REG_SC_PLL_CTRL3		0x3037
49 #define OV5640_REG_SLAVE_ID		0x3100
50 #define OV5640_REG_SCCB_SYS_CTRL1	0x3103
51 #define OV5640_REG_SYS_ROOT_DIVIDER	0x3108
52 #define OV5640_REG_AWB_R_GAIN		0x3400
53 #define OV5640_REG_AWB_G_GAIN		0x3402
54 #define OV5640_REG_AWB_B_GAIN		0x3404
55 #define OV5640_REG_AWB_MANUAL_CTRL	0x3406
56 #define OV5640_REG_AEC_PK_EXPOSURE_HI	0x3500
57 #define OV5640_REG_AEC_PK_EXPOSURE_MED	0x3501
58 #define OV5640_REG_AEC_PK_EXPOSURE_LO	0x3502
59 #define OV5640_REG_AEC_PK_MANUAL	0x3503
60 #define OV5640_REG_AEC_PK_REAL_GAIN	0x350a
61 #define OV5640_REG_AEC_PK_VTS		0x350c
62 #define OV5640_REG_TIMING_DVPHO		0x3808
63 #define OV5640_REG_TIMING_DVPVO		0x380a
64 #define OV5640_REG_TIMING_HTS		0x380c
65 #define OV5640_REG_TIMING_VTS		0x380e
66 #define OV5640_REG_TIMING_TC_REG20	0x3820
67 #define OV5640_REG_TIMING_TC_REG21	0x3821
68 #define OV5640_REG_AEC_CTRL00		0x3a00
69 #define OV5640_REG_AEC_B50_STEP		0x3a08
70 #define OV5640_REG_AEC_B60_STEP		0x3a0a
71 #define OV5640_REG_AEC_CTRL0D		0x3a0d
72 #define OV5640_REG_AEC_CTRL0E		0x3a0e
73 #define OV5640_REG_AEC_CTRL0F		0x3a0f
74 #define OV5640_REG_AEC_CTRL10		0x3a10
75 #define OV5640_REG_AEC_CTRL11		0x3a11
76 #define OV5640_REG_AEC_CTRL1B		0x3a1b
77 #define OV5640_REG_AEC_CTRL1E		0x3a1e
78 #define OV5640_REG_AEC_CTRL1F		0x3a1f
79 #define OV5640_REG_HZ5060_CTRL00	0x3c00
80 #define OV5640_REG_HZ5060_CTRL01	0x3c01
81 #define OV5640_REG_SIGMADELTA_CTRL0C	0x3c0c
82 #define OV5640_REG_FRAME_CTRL01		0x4202
83 #define OV5640_REG_FORMAT_CONTROL00	0x4300
84 #define OV5640_REG_VFIFO_HSIZE		0x4602
85 #define OV5640_REG_VFIFO_VSIZE		0x4604
86 #define OV5640_REG_JPG_MODE_SELECT	0x4713
87 #define OV5640_REG_CCIR656_CTRL00	0x4730
88 #define OV5640_REG_POLARITY_CTRL00	0x4740
89 #define OV5640_REG_MIPI_CTRL00		0x4800
90 #define OV5640_REG_DEBUG_MODE		0x4814
91 #define OV5640_REG_ISP_FORMAT_MUX_CTRL	0x501f
92 #define OV5640_REG_PRE_ISP_TEST_SET1	0x503d
93 #define OV5640_REG_SDE_CTRL0		0x5580
94 #define OV5640_REG_SDE_CTRL1		0x5581
95 #define OV5640_REG_SDE_CTRL3		0x5583
96 #define OV5640_REG_SDE_CTRL4		0x5584
97 #define OV5640_REG_SDE_CTRL5		0x5585
98 #define OV5640_REG_AVG_READOUT		0x56a1
99 
100 enum ov5640_mode_id {
101 	OV5640_MODE_QCIF_176_144 = 0,
102 	OV5640_MODE_QVGA_320_240,
103 	OV5640_MODE_VGA_640_480,
104 	OV5640_MODE_NTSC_720_480,
105 	OV5640_MODE_PAL_720_576,
106 	OV5640_MODE_XGA_1024_768,
107 	OV5640_MODE_720P_1280_720,
108 	OV5640_MODE_1080P_1920_1080,
109 	OV5640_MODE_QSXGA_2592_1944,
110 	OV5640_NUM_MODES,
111 };
112 
113 enum ov5640_frame_rate {
114 	OV5640_15_FPS = 0,
115 	OV5640_30_FPS,
116 	OV5640_60_FPS,
117 	OV5640_NUM_FRAMERATES,
118 };
119 
120 enum ov5640_format_mux {
121 	OV5640_FMT_MUX_YUV422 = 0,
122 	OV5640_FMT_MUX_RGB,
123 	OV5640_FMT_MUX_DITHER,
124 	OV5640_FMT_MUX_RAW_DPC,
125 	OV5640_FMT_MUX_SNR_RAW,
126 	OV5640_FMT_MUX_RAW_CIP,
127 };
128 
129 struct ov5640_pixfmt {
130 	u32 code;
131 	u32 colorspace;
132 };
133 
134 static const struct ov5640_pixfmt ov5640_formats[] = {
135 	{ MEDIA_BUS_FMT_JPEG_1X8, V4L2_COLORSPACE_JPEG, },
136 	{ MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB, },
137 	{ MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB, },
138 	{ MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB, },
139 	{ MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB, },
140 	{ MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB, },
141 	{ MEDIA_BUS_FMT_SGBRG8_1X8, V4L2_COLORSPACE_SRGB, },
142 	{ MEDIA_BUS_FMT_SGRBG8_1X8, V4L2_COLORSPACE_SRGB, },
143 	{ MEDIA_BUS_FMT_SRGGB8_1X8, V4L2_COLORSPACE_SRGB, },
144 };
145 
146 /*
147  * FIXME: remove this when a subdev API becomes available
148  * to set the MIPI CSI-2 virtual channel.
149  */
150 static unsigned int virtual_channel;
151 module_param(virtual_channel, uint, 0444);
152 MODULE_PARM_DESC(virtual_channel,
153 		 "MIPI CSI-2 virtual channel (0..3), default 0");
154 
155 static const int ov5640_framerates[] = {
156 	[OV5640_15_FPS] = 15,
157 	[OV5640_30_FPS] = 30,
158 	[OV5640_60_FPS] = 60,
159 };
160 
161 /* regulator supplies */
162 static const char * const ov5640_supply_name[] = {
163 	"DOVDD", /* Digital I/O (1.8V) supply */
164 	"AVDD",  /* Analog (2.8V) supply */
165 	"DVDD",  /* Digital Core (1.5V) supply */
166 };
167 
168 #define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name)
169 
170 /*
171  * Image size under 1280 * 960 are SUBSAMPLING
172  * Image size upper 1280 * 960 are SCALING
173  */
174 enum ov5640_downsize_mode {
175 	SUBSAMPLING,
176 	SCALING,
177 };
178 
179 struct reg_value {
180 	u16 reg_addr;
181 	u8 val;
182 	u8 mask;
183 	u32 delay_ms;
184 };
185 
186 struct ov5640_mode_info {
187 	enum ov5640_mode_id id;
188 	enum ov5640_downsize_mode dn_mode;
189 	u32 hact;
190 	u32 htot;
191 	u32 vact;
192 	u32 vtot;
193 	const struct reg_value *reg_data;
194 	u32 reg_data_size;
195 	u32 max_fps;
196 };
197 
198 struct ov5640_ctrls {
199 	struct v4l2_ctrl_handler handler;
200 	struct v4l2_ctrl *pixel_rate;
201 	struct {
202 		struct v4l2_ctrl *auto_exp;
203 		struct v4l2_ctrl *exposure;
204 	};
205 	struct {
206 		struct v4l2_ctrl *auto_wb;
207 		struct v4l2_ctrl *blue_balance;
208 		struct v4l2_ctrl *red_balance;
209 	};
210 	struct {
211 		struct v4l2_ctrl *auto_gain;
212 		struct v4l2_ctrl *gain;
213 	};
214 	struct v4l2_ctrl *brightness;
215 	struct v4l2_ctrl *light_freq;
216 	struct v4l2_ctrl *saturation;
217 	struct v4l2_ctrl *contrast;
218 	struct v4l2_ctrl *hue;
219 	struct v4l2_ctrl *test_pattern;
220 	struct v4l2_ctrl *hflip;
221 	struct v4l2_ctrl *vflip;
222 };
223 
224 struct ov5640_dev {
225 	struct i2c_client *i2c_client;
226 	struct v4l2_subdev sd;
227 	struct media_pad pad;
228 	struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */
229 	struct clk *xclk; /* system clock to OV5640 */
230 	u32 xclk_freq;
231 
232 	struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];
233 	struct gpio_desc *reset_gpio;
234 	struct gpio_desc *pwdn_gpio;
235 	bool   upside_down;
236 
237 	/* lock to protect all members below */
238 	struct mutex lock;
239 
240 	int power_count;
241 
242 	struct v4l2_mbus_framefmt fmt;
243 	bool pending_fmt_change;
244 
245 	const struct ov5640_mode_info *current_mode;
246 	const struct ov5640_mode_info *last_mode;
247 	enum ov5640_frame_rate current_fr;
248 	struct v4l2_fract frame_interval;
249 
250 	struct ov5640_ctrls ctrls;
251 
252 	u32 prev_sysclk, prev_hts;
253 	u32 ae_low, ae_high, ae_target;
254 
255 	bool pending_mode_change;
256 	bool streaming;
257 };
258 
259 static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd)
260 {
261 	return container_of(sd, struct ov5640_dev, sd);
262 }
263 
264 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
265 {
266 	return &container_of(ctrl->handler, struct ov5640_dev,
267 			     ctrls.handler)->sd;
268 }
269 
270 /*
271  * FIXME: all of these register tables are likely filled with
272  * entries that set the register to their power-on default values,
273  * and which are otherwise not touched by this driver. Those entries
274  * should be identified and removed to speed register load time
275  * over i2c.
276  */
277 /* YUV422 UYVY VGA@30fps */
278 static const struct reg_value ov5640_init_setting_30fps_VGA[] = {
279 	{0x3103, 0x11, 0, 0}, {0x3008, 0x82, 0, 5}, {0x3008, 0x42, 0, 0},
280 	{0x3103, 0x03, 0, 0}, {0x3630, 0x36, 0, 0},
281 	{0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0},
282 	{0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0},
283 	{0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0},
284 	{0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0},
285 	{0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0},
286 	{0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0},
287 	{0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0},
288 	{0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0},
289 	{0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0},
290 	{0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0},
291 	{0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0},
292 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
293 	{0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0},
294 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
295 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
296 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
297 	{0x3810, 0x00, 0, 0},
298 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
299 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
300 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
301 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
302 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
303 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
304 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0},
305 	{0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
306 	{0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
307 	{0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0},
308 	{0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
309 	{0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0},
310 	{0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0},
311 	{0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0},
312 	{0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0},
313 	{0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0},
314 	{0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0},
315 	{0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0},
316 	{0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0},
317 	{0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0},
318 	{0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0},
319 	{0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0},
320 	{0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0},
321 	{0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0},
322 	{0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0},
323 	{0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0},
324 	{0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0},
325 	{0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0},
326 	{0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0},
327 	{0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0},
328 	{0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0},
329 	{0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0},
330 	{0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0},
331 	{0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0},
332 	{0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0},
333 	{0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0},
334 	{0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0},
335 	{0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0},
336 	{0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0},
337 	{0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0},
338 	{0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0},
339 	{0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0},
340 	{0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0},
341 	{0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0},
342 	{0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0},
343 	{0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0},
344 	{0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0},
345 	{0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0},
346 	{0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0},
347 	{0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0},
348 	{0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0},
349 	{0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0},
350 	{0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0},
351 	{0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0},
352 	{0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0},
353 	{0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0},
354 	{0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0},
355 	{0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0},
356 	{0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0},
357 	{0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0},
358 	{0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0},
359 	{0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300},
360 };
361 
362 static const struct reg_value ov5640_setting_VGA_640_480[] = {
363 	{0x3c07, 0x08, 0, 0},
364 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
365 	{0x3814, 0x31, 0, 0},
366 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
367 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
368 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
369 	{0x3810, 0x00, 0, 0},
370 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
371 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
372 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
373 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
374 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
375 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
376 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
377 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
378 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
379 };
380 
381 static const struct reg_value ov5640_setting_XGA_1024_768[] = {
382 	{0x3c07, 0x08, 0, 0},
383 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
384 	{0x3814, 0x31, 0, 0},
385 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
386 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
387 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
388 	{0x3810, 0x00, 0, 0},
389 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
390 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
391 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
392 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
393 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
394 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
395 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
396 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
397 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
398 };
399 
400 static const struct reg_value ov5640_setting_QVGA_320_240[] = {
401 	{0x3c07, 0x08, 0, 0},
402 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
403 	{0x3814, 0x31, 0, 0},
404 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
405 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
406 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
407 	{0x3810, 0x00, 0, 0},
408 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
409 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
410 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
411 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
412 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
413 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
414 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
415 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
416 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
417 };
418 
419 static const struct reg_value ov5640_setting_QCIF_176_144[] = {
420 	{0x3c07, 0x08, 0, 0},
421 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
422 	{0x3814, 0x31, 0, 0},
423 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
424 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
425 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
426 	{0x3810, 0x00, 0, 0},
427 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
428 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
429 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
430 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
431 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
432 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
433 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
434 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
435 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
436 };
437 
438 static const struct reg_value ov5640_setting_NTSC_720_480[] = {
439 	{0x3c07, 0x08, 0, 0},
440 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
441 	{0x3814, 0x31, 0, 0},
442 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
443 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
444 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
445 	{0x3810, 0x00, 0, 0},
446 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x3c, 0, 0},
447 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
448 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
449 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
450 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
451 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
452 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
453 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
454 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
455 };
456 
457 static const struct reg_value ov5640_setting_PAL_720_576[] = {
458 	{0x3c07, 0x08, 0, 0},
459 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
460 	{0x3814, 0x31, 0, 0},
461 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
462 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
463 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
464 	{0x3810, 0x00, 0, 0},
465 	{0x3811, 0x38, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
466 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
467 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
468 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
469 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
470 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
471 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
472 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
473 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
474 };
475 
476 static const struct reg_value ov5640_setting_720P_1280_720[] = {
477 	{0x3c07, 0x07, 0, 0},
478 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
479 	{0x3814, 0x31, 0, 0},
480 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
481 	{0x3802, 0x00, 0, 0}, {0x3803, 0xfa, 0, 0}, {0x3804, 0x0a, 0, 0},
482 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x06, 0, 0}, {0x3807, 0xa9, 0, 0},
483 	{0x3810, 0x00, 0, 0},
484 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
485 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
486 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0},
487 	{0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0},
488 	{0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0},
489 	{0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0},
490 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
491 	{0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0},
492 	{0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0},
493 };
494 
495 static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
496 	{0x3c07, 0x08, 0, 0},
497 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
498 	{0x3814, 0x11, 0, 0},
499 	{0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
500 	{0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
501 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
502 	{0x3810, 0x00, 0, 0},
503 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
504 	{0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
505 	{0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
506 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
507 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
508 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
509 	{0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
510 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
511 	{0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0},
512 	{0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0},
513 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
514 	{0x3800, 0x01, 0, 0}, {0x3801, 0x50, 0, 0}, {0x3802, 0x01, 0, 0},
515 	{0x3803, 0xb2, 0, 0}, {0x3804, 0x08, 0, 0}, {0x3805, 0xef, 0, 0},
516 	{0x3806, 0x05, 0, 0}, {0x3807, 0xf1, 0, 0},
517 	{0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0},
518 	{0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0},
519 	{0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0},
520 	{0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
521 	{0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
522 	{0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
523 	{0x4005, 0x1a, 0, 0},
524 };
525 
526 static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
527 	{0x3c07, 0x08, 0, 0},
528 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
529 	{0x3814, 0x11, 0, 0},
530 	{0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
531 	{0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
532 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
533 	{0x3810, 0x00, 0, 0},
534 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
535 	{0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
536 	{0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
537 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
538 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
539 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
540 	{0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
541 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
542 	{0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70},
543 };
544 
545 /* power-on sensor init reg table */
546 static const struct ov5640_mode_info ov5640_mode_init_data = {
547 	0, SUBSAMPLING, 640, 1896, 480, 984,
548 	ov5640_init_setting_30fps_VGA,
549 	ARRAY_SIZE(ov5640_init_setting_30fps_VGA),
550 	OV5640_30_FPS,
551 };
552 
553 static const struct ov5640_mode_info
554 ov5640_mode_data[OV5640_NUM_MODES] = {
555 	{OV5640_MODE_QCIF_176_144, SUBSAMPLING,
556 	 176, 1896, 144, 984,
557 	 ov5640_setting_QCIF_176_144,
558 	 ARRAY_SIZE(ov5640_setting_QCIF_176_144),
559 	 OV5640_30_FPS},
560 	{OV5640_MODE_QVGA_320_240, SUBSAMPLING,
561 	 320, 1896, 240, 984,
562 	 ov5640_setting_QVGA_320_240,
563 	 ARRAY_SIZE(ov5640_setting_QVGA_320_240),
564 	 OV5640_30_FPS},
565 	{OV5640_MODE_VGA_640_480, SUBSAMPLING,
566 	 640, 1896, 480, 1080,
567 	 ov5640_setting_VGA_640_480,
568 	 ARRAY_SIZE(ov5640_setting_VGA_640_480),
569 	 OV5640_60_FPS},
570 	{OV5640_MODE_NTSC_720_480, SUBSAMPLING,
571 	 720, 1896, 480, 984,
572 	 ov5640_setting_NTSC_720_480,
573 	 ARRAY_SIZE(ov5640_setting_NTSC_720_480),
574 	OV5640_30_FPS},
575 	{OV5640_MODE_PAL_720_576, SUBSAMPLING,
576 	 720, 1896, 576, 984,
577 	 ov5640_setting_PAL_720_576,
578 	 ARRAY_SIZE(ov5640_setting_PAL_720_576),
579 	 OV5640_30_FPS},
580 	{OV5640_MODE_XGA_1024_768, SUBSAMPLING,
581 	 1024, 1896, 768, 1080,
582 	 ov5640_setting_XGA_1024_768,
583 	 ARRAY_SIZE(ov5640_setting_XGA_1024_768),
584 	 OV5640_30_FPS},
585 	{OV5640_MODE_720P_1280_720, SUBSAMPLING,
586 	 1280, 1892, 720, 740,
587 	 ov5640_setting_720P_1280_720,
588 	 ARRAY_SIZE(ov5640_setting_720P_1280_720),
589 	 OV5640_30_FPS},
590 	{OV5640_MODE_1080P_1920_1080, SCALING,
591 	 1920, 2500, 1080, 1120,
592 	 ov5640_setting_1080P_1920_1080,
593 	 ARRAY_SIZE(ov5640_setting_1080P_1920_1080),
594 	 OV5640_30_FPS},
595 	{OV5640_MODE_QSXGA_2592_1944, SCALING,
596 	 2592, 2844, 1944, 1968,
597 	 ov5640_setting_QSXGA_2592_1944,
598 	 ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944),
599 	 OV5640_15_FPS},
600 };
601 
602 static int ov5640_init_slave_id(struct ov5640_dev *sensor)
603 {
604 	struct i2c_client *client = sensor->i2c_client;
605 	struct i2c_msg msg;
606 	u8 buf[3];
607 	int ret;
608 
609 	if (client->addr == OV5640_DEFAULT_SLAVE_ID)
610 		return 0;
611 
612 	buf[0] = OV5640_REG_SLAVE_ID >> 8;
613 	buf[1] = OV5640_REG_SLAVE_ID & 0xff;
614 	buf[2] = client->addr << 1;
615 
616 	msg.addr = OV5640_DEFAULT_SLAVE_ID;
617 	msg.flags = 0;
618 	msg.buf = buf;
619 	msg.len = sizeof(buf);
620 
621 	ret = i2c_transfer(client->adapter, &msg, 1);
622 	if (ret < 0) {
623 		dev_err(&client->dev, "%s: failed with %d\n", __func__, ret);
624 		return ret;
625 	}
626 
627 	return 0;
628 }
629 
630 static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)
631 {
632 	struct i2c_client *client = sensor->i2c_client;
633 	struct i2c_msg msg;
634 	u8 buf[3];
635 	int ret;
636 
637 	buf[0] = reg >> 8;
638 	buf[1] = reg & 0xff;
639 	buf[2] = val;
640 
641 	msg.addr = client->addr;
642 	msg.flags = client->flags;
643 	msg.buf = buf;
644 	msg.len = sizeof(buf);
645 
646 	ret = i2c_transfer(client->adapter, &msg, 1);
647 	if (ret < 0) {
648 		dev_err(&client->dev, "%s: error: reg=%x, val=%x\n",
649 			__func__, reg, val);
650 		return ret;
651 	}
652 
653 	return 0;
654 }
655 
656 static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val)
657 {
658 	struct i2c_client *client = sensor->i2c_client;
659 	struct i2c_msg msg[2];
660 	u8 buf[2];
661 	int ret;
662 
663 	buf[0] = reg >> 8;
664 	buf[1] = reg & 0xff;
665 
666 	msg[0].addr = client->addr;
667 	msg[0].flags = client->flags;
668 	msg[0].buf = buf;
669 	msg[0].len = sizeof(buf);
670 
671 	msg[1].addr = client->addr;
672 	msg[1].flags = client->flags | I2C_M_RD;
673 	msg[1].buf = buf;
674 	msg[1].len = 1;
675 
676 	ret = i2c_transfer(client->adapter, msg, 2);
677 	if (ret < 0) {
678 		dev_err(&client->dev, "%s: error: reg=%x\n",
679 			__func__, reg);
680 		return ret;
681 	}
682 
683 	*val = buf[0];
684 	return 0;
685 }
686 
687 static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val)
688 {
689 	u8 hi, lo;
690 	int ret;
691 
692 	ret = ov5640_read_reg(sensor, reg, &hi);
693 	if (ret)
694 		return ret;
695 	ret = ov5640_read_reg(sensor, reg + 1, &lo);
696 	if (ret)
697 		return ret;
698 
699 	*val = ((u16)hi << 8) | (u16)lo;
700 	return 0;
701 }
702 
703 static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val)
704 {
705 	int ret;
706 
707 	ret = ov5640_write_reg(sensor, reg, val >> 8);
708 	if (ret)
709 		return ret;
710 
711 	return ov5640_write_reg(sensor, reg + 1, val & 0xff);
712 }
713 
714 static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
715 			  u8 mask, u8 val)
716 {
717 	u8 readval;
718 	int ret;
719 
720 	ret = ov5640_read_reg(sensor, reg, &readval);
721 	if (ret)
722 		return ret;
723 
724 	readval &= ~mask;
725 	val &= mask;
726 	val |= readval;
727 
728 	return ov5640_write_reg(sensor, reg, val);
729 }
730 
731 /*
732  * After trying the various combinations, reading various
733  * documentations spread around the net, and from the various
734  * feedback, the clock tree is probably as follows:
735  *
736  *   +--------------+
737  *   |  Ext. Clock  |
738  *   +-+------------+
739  *     |  +----------+
740  *     +->|   PLL1   | - reg 0x3036, for the multiplier
741  *        +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider
742  *          |  +--------------+
743  *          +->| System Clock |  - reg 0x3035, bits 4-7
744  *             +-+------------+
745  *               |  +--------------+
746  *               +->| MIPI Divider | - reg 0x3035, bits 0-3
747  *               |  +-+------------+
748  *               |    +----------------> MIPI SCLK
749  *               |    +  +-----+
750  *               |    +->| / 2 |-------> MIPI BIT CLK
751  *               |       +-----+
752  *               |  +--------------+
753  *               +->| PLL Root Div | - reg 0x3037, bit 4
754  *                  +-+------------+
755  *                    |  +---------+
756  *                    +->| Bit Div | - reg 0x3034, bits 0-3
757  *                       +-+-------+
758  *                         |  +-------------+
759  *                         +->| SCLK Div    | - reg 0x3108, bits 0-1
760  *                         |  +-+-----------+
761  *                         |    +---------------> SCLK
762  *                         |  +-------------+
763  *                         +->| SCLK 2X Div | - reg 0x3108, bits 2-3
764  *                         |  +-+-----------+
765  *                         |    +---------------> SCLK 2X
766  *                         |  +-------------+
767  *                         +->| PCLK Div    | - reg 0x3108, bits 4-5
768  *                            ++------------+
769  *                             +  +-----------+
770  *                             +->|   P_DIV   | - reg 0x3035, bits 0-3
771  *                                +-----+-----+
772  *                                       +------------> PCLK
773  *
774  * This is deviating from the datasheet at least for the register
775  * 0x3108, since it's said here that the PCLK would be clocked from
776  * the PLL.
777  *
778  * There seems to be also (unverified) constraints:
779  *  - the PLL pre-divider output rate should be in the 4-27MHz range
780  *  - the PLL multiplier output rate should be in the 500-1000MHz range
781  *  - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG
782  *
783  * In the two latter cases, these constraints are met since our
784  * factors are hardcoded. If we were to change that, we would need to
785  * take this into account. The only varying parts are the PLL
786  * multiplier and the system clock divider, which are shared between
787  * all these clocks so won't cause any issue.
788  */
789 
790 /*
791  * This is supposed to be ranging from 1 to 8, but the value is always
792  * set to 3 in the vendor kernels.
793  */
794 #define OV5640_PLL_PREDIV	3
795 
796 #define OV5640_PLL_MULT_MIN	4
797 #define OV5640_PLL_MULT_MAX	252
798 
799 /*
800  * This is supposed to be ranging from 1 to 16, but the value is
801  * always set to either 1 or 2 in the vendor kernels.
802  */
803 #define OV5640_SYSDIV_MIN	1
804 #define OV5640_SYSDIV_MAX	16
805 
806 /*
807  * Hardcode these values for scaler and non-scaler modes.
808  * FIXME: to be re-calcualted for 1 data lanes setups
809  */
810 #define OV5640_MIPI_DIV_PCLK	2
811 #define OV5640_MIPI_DIV_SCLK	1
812 
813 /*
814  * This is supposed to be ranging from 1 to 2, but the value is always
815  * set to 2 in the vendor kernels.
816  */
817 #define OV5640_PLL_ROOT_DIV			2
818 #define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2		BIT(4)
819 
820 /*
821  * We only supports 8-bit formats at the moment
822  */
823 #define OV5640_BIT_DIV				2
824 #define OV5640_PLL_CTRL0_MIPI_MODE_8BIT		0x08
825 
826 /*
827  * This is supposed to be ranging from 1 to 8, but the value is always
828  * set to 2 in the vendor kernels.
829  */
830 #define OV5640_SCLK_ROOT_DIV	2
831 
832 /*
833  * This is hardcoded so that the consistency is maintained between SCLK and
834  * SCLK 2x.
835  */
836 #define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2)
837 
838 /*
839  * This is supposed to be ranging from 1 to 8, but the value is always
840  * set to 1 in the vendor kernels.
841  */
842 #define OV5640_PCLK_ROOT_DIV			1
843 #define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS	0x00
844 
845 static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor,
846 					    u8 pll_prediv, u8 pll_mult,
847 					    u8 sysdiv)
848 {
849 	unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult;
850 
851 	/* PLL1 output cannot exceed 1GHz. */
852 	if (sysclk / 1000000 > 1000)
853 		return 0;
854 
855 	return sysclk / sysdiv;
856 }
857 
858 static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,
859 					 unsigned long rate,
860 					 u8 *pll_prediv, u8 *pll_mult,
861 					 u8 *sysdiv)
862 {
863 	unsigned long best = ~0;
864 	u8 best_sysdiv = 1, best_mult = 1;
865 	u8 _sysdiv, _pll_mult;
866 
867 	for (_sysdiv = OV5640_SYSDIV_MIN;
868 	     _sysdiv <= OV5640_SYSDIV_MAX;
869 	     _sysdiv++) {
870 		for (_pll_mult = OV5640_PLL_MULT_MIN;
871 		     _pll_mult <= OV5640_PLL_MULT_MAX;
872 		     _pll_mult++) {
873 			unsigned long _rate;
874 
875 			/*
876 			 * The PLL multiplier cannot be odd if above
877 			 * 127.
878 			 */
879 			if (_pll_mult > 127 && (_pll_mult % 2))
880 				continue;
881 
882 			_rate = ov5640_compute_sys_clk(sensor,
883 						       OV5640_PLL_PREDIV,
884 						       _pll_mult, _sysdiv);
885 
886 			/*
887 			 * We have reached the maximum allowed PLL1 output,
888 			 * increase sysdiv.
889 			 */
890 			if (!_rate)
891 				break;
892 
893 			/*
894 			 * Prefer rates above the expected clock rate than
895 			 * below, even if that means being less precise.
896 			 */
897 			if (_rate < rate)
898 				continue;
899 
900 			if (abs(rate - _rate) < abs(rate - best)) {
901 				best = _rate;
902 				best_sysdiv = _sysdiv;
903 				best_mult = _pll_mult;
904 			}
905 
906 			if (_rate == rate)
907 				goto out;
908 		}
909 	}
910 
911 out:
912 	*sysdiv = best_sysdiv;
913 	*pll_prediv = OV5640_PLL_PREDIV;
914 	*pll_mult = best_mult;
915 
916 	return best;
917 }
918 
919 /*
920  * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values
921  *			    for the MIPI CSI-2 output.
922  *
923  * @rate: The requested bandwidth per lane in bytes per second.
924  *	  'Bandwidth Per Lane' is calculated as:
925  *	  bpl = HTOT * VTOT * FPS * bpp / num_lanes;
926  *
927  * This function use the requested bandwidth to calculate:
928  * - sample_rate = bpl / (bpp / num_lanes);
929  *	         = bpl / (PLL_RDIV * BIT_DIV * PCLK_DIV * MIPI_DIV / num_lanes);
930  *
931  * - mipi_sclk   = bpl / MIPI_DIV / 2; ( / 2 is for CSI-2 DDR)
932  *
933  * with these fixed parameters:
934  *	PLL_RDIV	= 2;
935  *	BIT_DIVIDER	= 2; (MIPI_BIT_MODE == 8 ? 2 : 2,5);
936  *	PCLK_DIV	= 1;
937  *
938  * The MIPI clock generation differs for modes that use the scaler and modes
939  * that do not. In case the scaler is in use, the MIPI_SCLK generates the MIPI
940  * BIT CLk, and thus:
941  *
942  * - mipi_sclk = bpl / MIPI_DIV / 2;
943  *   MIPI_DIV = 1;
944  *
945  * For modes that do not go through the scaler, the MIPI BIT CLOCK is generated
946  * from the pixel clock, and thus:
947  *
948  * - sample_rate = bpl / (bpp / num_lanes);
949  *	         = bpl / (2 * 2 * 1 * MIPI_DIV / num_lanes);
950  *		 = bpl / (4 * MIPI_DIV / num_lanes);
951  * - MIPI_DIV	 = bpp / (4 * num_lanes);
952  *
953  * FIXME: this have been tested with 16bpp and 2 lanes setup only.
954  * MIPI_DIV is fixed to value 2, but it -might- be changed according to the
955  * above formula for setups with 1 lane or image formats with different bpp.
956  *
957  * FIXME: this deviates from the sensor manual documentation which is quite
958  * thin on the MIPI clock tree generation part.
959  */
960 static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor,
961 				unsigned long rate)
962 {
963 	const struct ov5640_mode_info *mode = sensor->current_mode;
964 	u8 prediv, mult, sysdiv;
965 	u8 mipi_div;
966 	int ret;
967 
968 	/*
969 	 * 1280x720 is reported to use 'SUBSAMPLING' only,
970 	 * but according to the sensor manual it goes through the
971 	 * scaler before subsampling.
972 	 */
973 	if (mode->dn_mode == SCALING ||
974 	   (mode->id == OV5640_MODE_720P_1280_720))
975 		mipi_div = OV5640_MIPI_DIV_SCLK;
976 	else
977 		mipi_div = OV5640_MIPI_DIV_PCLK;
978 
979 	ov5640_calc_sys_clk(sensor, rate, &prediv, &mult, &sysdiv);
980 
981 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
982 			     0x0f, OV5640_PLL_CTRL0_MIPI_MODE_8BIT);
983 
984 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
985 			     0xff, sysdiv << 4 | mipi_div);
986 	if (ret)
987 		return ret;
988 
989 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult);
990 	if (ret)
991 		return ret;
992 
993 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
994 			     0x1f, OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 | prediv);
995 	if (ret)
996 		return ret;
997 
998 	return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER,
999 			      0x30, OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS);
1000 }
1001 
1002 static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor,
1003 				      unsigned long rate,
1004 				      u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv,
1005 				      u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div)
1006 {
1007 	unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV *
1008 				OV5640_PCLK_ROOT_DIV;
1009 
1010 	_rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult,
1011 				    sysdiv);
1012 	*pll_rdiv = OV5640_PLL_ROOT_DIV;
1013 	*bit_div = OV5640_BIT_DIV;
1014 	*pclk_div = OV5640_PCLK_ROOT_DIV;
1015 
1016 	return _rate / *pll_rdiv / *bit_div / *pclk_div;
1017 }
1018 
1019 static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor, unsigned long rate)
1020 {
1021 	u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div;
1022 	int ret;
1023 
1024 	ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv,
1025 			 &bit_div, &pclk_div);
1026 
1027 	if (bit_div == 2)
1028 		bit_div = 8;
1029 
1030 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
1031 			     0x0f, bit_div);
1032 	if (ret)
1033 		return ret;
1034 
1035 	/*
1036 	 * We need to set sysdiv according to the clock, and to clear
1037 	 * the MIPI divider.
1038 	 */
1039 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
1040 			     0xff, sysdiv << 4);
1041 	if (ret)
1042 		return ret;
1043 
1044 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2,
1045 			     0xff, mult);
1046 	if (ret)
1047 		return ret;
1048 
1049 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
1050 			     0x1f, prediv | ((pll_rdiv - 1) << 4));
1051 	if (ret)
1052 		return ret;
1053 
1054 	return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30,
1055 			      (ilog2(pclk_div) << 4));
1056 }
1057 
1058 /* set JPEG framing sizes */
1059 static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor,
1060 				   const struct ov5640_mode_info *mode)
1061 {
1062 	int ret;
1063 
1064 	/*
1065 	 * compression mode 3 timing
1066 	 *
1067 	 * Data is transmitted with programmable width (VFIFO_HSIZE).
1068 	 * No padding done. Last line may have less data. Varying
1069 	 * number of lines per frame, depending on amount of data.
1070 	 */
1071 	ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3);
1072 	if (ret < 0)
1073 		return ret;
1074 
1075 	ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->hact);
1076 	if (ret < 0)
1077 		return ret;
1078 
1079 	return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->vact);
1080 }
1081 
1082 /* download ov5640 settings to sensor through i2c */
1083 static int ov5640_set_timings(struct ov5640_dev *sensor,
1084 			      const struct ov5640_mode_info *mode)
1085 {
1086 	int ret;
1087 
1088 	if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) {
1089 		ret = ov5640_set_jpeg_timings(sensor, mode);
1090 		if (ret < 0)
1091 			return ret;
1092 	}
1093 
1094 	ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->hact);
1095 	if (ret < 0)
1096 		return ret;
1097 
1098 	ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->vact);
1099 	if (ret < 0)
1100 		return ret;
1101 
1102 	ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, mode->htot);
1103 	if (ret < 0)
1104 		return ret;
1105 
1106 	return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, mode->vtot);
1107 }
1108 
1109 static int ov5640_load_regs(struct ov5640_dev *sensor,
1110 			    const struct ov5640_mode_info *mode)
1111 {
1112 	const struct reg_value *regs = mode->reg_data;
1113 	unsigned int i;
1114 	u32 delay_ms;
1115 	u16 reg_addr;
1116 	u8 mask, val;
1117 	int ret = 0;
1118 
1119 	for (i = 0; i < mode->reg_data_size; ++i, ++regs) {
1120 		delay_ms = regs->delay_ms;
1121 		reg_addr = regs->reg_addr;
1122 		val = regs->val;
1123 		mask = regs->mask;
1124 
1125 		/* remain in power down mode for DVP */
1126 		if (regs->reg_addr == OV5640_REG_SYS_CTRL0 &&
1127 		    val == OV5640_REG_SYS_CTRL0_SW_PWUP &&
1128 		    sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY)
1129 			continue;
1130 
1131 		if (mask)
1132 			ret = ov5640_mod_reg(sensor, reg_addr, mask, val);
1133 		else
1134 			ret = ov5640_write_reg(sensor, reg_addr, val);
1135 		if (ret)
1136 			break;
1137 
1138 		if (delay_ms)
1139 			usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
1140 	}
1141 
1142 	return ov5640_set_timings(sensor, mode);
1143 }
1144 
1145 static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on)
1146 {
1147 	return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1148 			      BIT(0), on ? 0 : BIT(0));
1149 }
1150 
1151 /* read exposure, in number of line periods */
1152 static int ov5640_get_exposure(struct ov5640_dev *sensor)
1153 {
1154 	int exp, ret;
1155 	u8 temp;
1156 
1157 	ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp);
1158 	if (ret)
1159 		return ret;
1160 	exp = ((int)temp & 0x0f) << 16;
1161 	ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp);
1162 	if (ret)
1163 		return ret;
1164 	exp |= ((int)temp << 8);
1165 	ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp);
1166 	if (ret)
1167 		return ret;
1168 	exp |= (int)temp;
1169 
1170 	return exp >> 4;
1171 }
1172 
1173 /* write exposure, given number of line periods */
1174 static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure)
1175 {
1176 	int ret;
1177 
1178 	exposure <<= 4;
1179 
1180 	ret = ov5640_write_reg(sensor,
1181 			       OV5640_REG_AEC_PK_EXPOSURE_LO,
1182 			       exposure & 0xff);
1183 	if (ret)
1184 		return ret;
1185 	ret = ov5640_write_reg(sensor,
1186 			       OV5640_REG_AEC_PK_EXPOSURE_MED,
1187 			       (exposure >> 8) & 0xff);
1188 	if (ret)
1189 		return ret;
1190 	return ov5640_write_reg(sensor,
1191 				OV5640_REG_AEC_PK_EXPOSURE_HI,
1192 				(exposure >> 16) & 0x0f);
1193 }
1194 
1195 static int ov5640_get_gain(struct ov5640_dev *sensor)
1196 {
1197 	u16 gain;
1198 	int ret;
1199 
1200 	ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain);
1201 	if (ret)
1202 		return ret;
1203 
1204 	return gain & 0x3ff;
1205 }
1206 
1207 static int ov5640_set_gain(struct ov5640_dev *sensor, int gain)
1208 {
1209 	return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN,
1210 				  (u16)gain & 0x3ff);
1211 }
1212 
1213 static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
1214 {
1215 	return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1216 			      BIT(1), on ? 0 : BIT(1));
1217 }
1218 
1219 static int ov5640_set_stream_bt656(struct ov5640_dev *sensor, bool on)
1220 {
1221 	int ret;
1222 
1223 	ret = ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00,
1224 			       on ? 0x1 : 0x00);
1225 	if (ret)
1226 		return ret;
1227 
1228 	return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
1229 				OV5640_REG_SYS_CTRL0_SW_PWUP :
1230 				OV5640_REG_SYS_CTRL0_SW_PWDN);
1231 }
1232 
1233 static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
1234 {
1235 	return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
1236 				OV5640_REG_SYS_CTRL0_SW_PWUP :
1237 				OV5640_REG_SYS_CTRL0_SW_PWDN);
1238 }
1239 
1240 static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on)
1241 {
1242 	int ret;
1243 
1244 	/*
1245 	 * Enable/disable the MIPI interface
1246 	 *
1247 	 * 0x300e = on ? 0x45 : 0x40
1248 	 *
1249 	 * FIXME: the sensor manual (version 2.03) reports
1250 	 * [7:5] = 000  : 1 data lane mode
1251 	 * [7:5] = 001  : 2 data lanes mode
1252 	 * But this settings do not work, while the following ones
1253 	 * have been validated for 2 data lanes mode.
1254 	 *
1255 	 * [7:5] = 010	: 2 data lanes mode
1256 	 * [4] = 0	: Power up MIPI HS Tx
1257 	 * [3] = 0	: Power up MIPI LS Rx
1258 	 * [2] = 1/0	: MIPI interface enable/disable
1259 	 * [1:0] = 01/00: FIXME: 'debug'
1260 	 */
1261 	ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00,
1262 			       on ? 0x45 : 0x40);
1263 	if (ret)
1264 		return ret;
1265 
1266 	return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01,
1267 				on ? 0x00 : 0x0f);
1268 }
1269 
1270 static int ov5640_get_sysclk(struct ov5640_dev *sensor)
1271 {
1272 	 /* calculate sysclk */
1273 	u32 xvclk = sensor->xclk_freq / 10000;
1274 	u32 multiplier, prediv, VCO, sysdiv, pll_rdiv;
1275 	u32 sclk_rdiv_map[] = {1, 2, 4, 8};
1276 	u32 bit_div2x = 1, sclk_rdiv, sysclk;
1277 	u8 temp1, temp2;
1278 	int ret;
1279 
1280 	ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1);
1281 	if (ret)
1282 		return ret;
1283 	temp2 = temp1 & 0x0f;
1284 	if (temp2 == 8 || temp2 == 10)
1285 		bit_div2x = temp2 / 2;
1286 
1287 	ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1);
1288 	if (ret)
1289 		return ret;
1290 	sysdiv = temp1 >> 4;
1291 	if (sysdiv == 0)
1292 		sysdiv = 16;
1293 
1294 	ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1);
1295 	if (ret)
1296 		return ret;
1297 	multiplier = temp1;
1298 
1299 	ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1);
1300 	if (ret)
1301 		return ret;
1302 	prediv = temp1 & 0x0f;
1303 	pll_rdiv = ((temp1 >> 4) & 0x01) + 1;
1304 
1305 	ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1);
1306 	if (ret)
1307 		return ret;
1308 	temp2 = temp1 & 0x03;
1309 	sclk_rdiv = sclk_rdiv_map[temp2];
1310 
1311 	if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x)
1312 		return -EINVAL;
1313 
1314 	VCO = xvclk * multiplier / prediv;
1315 
1316 	sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv;
1317 
1318 	return sysclk;
1319 }
1320 
1321 static int ov5640_set_night_mode(struct ov5640_dev *sensor)
1322 {
1323 	 /* read HTS from register settings */
1324 	u8 mode;
1325 	int ret;
1326 
1327 	ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode);
1328 	if (ret)
1329 		return ret;
1330 	mode &= 0xfb;
1331 	return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode);
1332 }
1333 
1334 static int ov5640_get_hts(struct ov5640_dev *sensor)
1335 {
1336 	/* read HTS from register settings */
1337 	u16 hts;
1338 	int ret;
1339 
1340 	ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts);
1341 	if (ret)
1342 		return ret;
1343 	return hts;
1344 }
1345 
1346 static int ov5640_get_vts(struct ov5640_dev *sensor)
1347 {
1348 	u16 vts;
1349 	int ret;
1350 
1351 	ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts);
1352 	if (ret)
1353 		return ret;
1354 	return vts;
1355 }
1356 
1357 static int ov5640_set_vts(struct ov5640_dev *sensor, int vts)
1358 {
1359 	return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts);
1360 }
1361 
1362 static int ov5640_get_light_freq(struct ov5640_dev *sensor)
1363 {
1364 	/* get banding filter value */
1365 	int ret, light_freq = 0;
1366 	u8 temp, temp1;
1367 
1368 	ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp);
1369 	if (ret)
1370 		return ret;
1371 
1372 	if (temp & 0x80) {
1373 		/* manual */
1374 		ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00,
1375 				      &temp1);
1376 		if (ret)
1377 			return ret;
1378 		if (temp1 & 0x04) {
1379 			/* 50Hz */
1380 			light_freq = 50;
1381 		} else {
1382 			/* 60Hz */
1383 			light_freq = 60;
1384 		}
1385 	} else {
1386 		/* auto */
1387 		ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C,
1388 				      &temp1);
1389 		if (ret)
1390 			return ret;
1391 
1392 		if (temp1 & 0x01) {
1393 			/* 50Hz */
1394 			light_freq = 50;
1395 		} else {
1396 			/* 60Hz */
1397 		}
1398 	}
1399 
1400 	return light_freq;
1401 }
1402 
1403 static int ov5640_set_bandingfilter(struct ov5640_dev *sensor)
1404 {
1405 	u32 band_step60, max_band60, band_step50, max_band50, prev_vts;
1406 	int ret;
1407 
1408 	/* read preview PCLK */
1409 	ret = ov5640_get_sysclk(sensor);
1410 	if (ret < 0)
1411 		return ret;
1412 	if (ret == 0)
1413 		return -EINVAL;
1414 	sensor->prev_sysclk = ret;
1415 	/* read preview HTS */
1416 	ret = ov5640_get_hts(sensor);
1417 	if (ret < 0)
1418 		return ret;
1419 	if (ret == 0)
1420 		return -EINVAL;
1421 	sensor->prev_hts = ret;
1422 
1423 	/* read preview VTS */
1424 	ret = ov5640_get_vts(sensor);
1425 	if (ret < 0)
1426 		return ret;
1427 	prev_vts = ret;
1428 
1429 	/* calculate banding filter */
1430 	/* 60Hz */
1431 	band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120;
1432 	ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60);
1433 	if (ret)
1434 		return ret;
1435 	if (!band_step60)
1436 		return -EINVAL;
1437 	max_band60 = (int)((prev_vts - 4) / band_step60);
1438 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60);
1439 	if (ret)
1440 		return ret;
1441 
1442 	/* 50Hz */
1443 	band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts;
1444 	ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50);
1445 	if (ret)
1446 		return ret;
1447 	if (!band_step50)
1448 		return -EINVAL;
1449 	max_band50 = (int)((prev_vts - 4) / band_step50);
1450 	return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50);
1451 }
1452 
1453 static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target)
1454 {
1455 	/* stable in high */
1456 	u32 fast_high, fast_low;
1457 	int ret;
1458 
1459 	sensor->ae_low = target * 23 / 25;	/* 0.92 */
1460 	sensor->ae_high = target * 27 / 25;	/* 1.08 */
1461 
1462 	fast_high = sensor->ae_high << 1;
1463 	if (fast_high > 255)
1464 		fast_high = 255;
1465 
1466 	fast_low = sensor->ae_low >> 1;
1467 
1468 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high);
1469 	if (ret)
1470 		return ret;
1471 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low);
1472 	if (ret)
1473 		return ret;
1474 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high);
1475 	if (ret)
1476 		return ret;
1477 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low);
1478 	if (ret)
1479 		return ret;
1480 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high);
1481 	if (ret)
1482 		return ret;
1483 	return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low);
1484 }
1485 
1486 static int ov5640_get_binning(struct ov5640_dev *sensor)
1487 {
1488 	u8 temp;
1489 	int ret;
1490 
1491 	ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp);
1492 	if (ret)
1493 		return ret;
1494 
1495 	return temp & BIT(0);
1496 }
1497 
1498 static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable)
1499 {
1500 	int ret;
1501 
1502 	/*
1503 	 * TIMING TC REG21:
1504 	 * - [0]:	Horizontal binning enable
1505 	 */
1506 	ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
1507 			     BIT(0), enable ? BIT(0) : 0);
1508 	if (ret)
1509 		return ret;
1510 	/*
1511 	 * TIMING TC REG20:
1512 	 * - [0]:	Undocumented, but hardcoded init sequences
1513 	 *		are always setting REG21/REG20 bit 0 to same value...
1514 	 */
1515 	return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
1516 			      BIT(0), enable ? BIT(0) : 0);
1517 }
1518 
1519 static int ov5640_set_virtual_channel(struct ov5640_dev *sensor)
1520 {
1521 	struct i2c_client *client = sensor->i2c_client;
1522 	u8 temp, channel = virtual_channel;
1523 	int ret;
1524 
1525 	if (channel > 3) {
1526 		dev_err(&client->dev,
1527 			"%s: wrong virtual_channel parameter, expected (0..3), got %d\n",
1528 			__func__, channel);
1529 		return -EINVAL;
1530 	}
1531 
1532 	ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp);
1533 	if (ret)
1534 		return ret;
1535 	temp &= ~(3 << 6);
1536 	temp |= (channel << 6);
1537 	return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp);
1538 }
1539 
1540 static const struct ov5640_mode_info *
1541 ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr,
1542 		 int width, int height, bool nearest)
1543 {
1544 	const struct ov5640_mode_info *mode;
1545 
1546 	mode = v4l2_find_nearest_size(ov5640_mode_data,
1547 				      ARRAY_SIZE(ov5640_mode_data),
1548 				      hact, vact,
1549 				      width, height);
1550 
1551 	if (!mode ||
1552 	    (!nearest && (mode->hact != width || mode->vact != height)))
1553 		return NULL;
1554 
1555 	/* Check to see if the current mode exceeds the max frame rate */
1556 	if (ov5640_framerates[fr] > ov5640_framerates[mode->max_fps])
1557 		return NULL;
1558 
1559 	return mode;
1560 }
1561 
1562 static u64 ov5640_calc_pixel_rate(struct ov5640_dev *sensor)
1563 {
1564 	u64 rate;
1565 
1566 	rate = sensor->current_mode->vtot * sensor->current_mode->htot;
1567 	rate *= ov5640_framerates[sensor->current_fr];
1568 
1569 	return rate;
1570 }
1571 
1572 /*
1573  * sensor changes between scaling and subsampling, go through
1574  * exposure calculation
1575  */
1576 static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor,
1577 					 const struct ov5640_mode_info *mode)
1578 {
1579 	u32 prev_shutter, prev_gain16;
1580 	u32 cap_shutter, cap_gain16;
1581 	u32 cap_sysclk, cap_hts, cap_vts;
1582 	u32 light_freq, cap_bandfilt, cap_maxband;
1583 	u32 cap_gain16_shutter;
1584 	u8 average;
1585 	int ret;
1586 
1587 	if (!mode->reg_data)
1588 		return -EINVAL;
1589 
1590 	/* read preview shutter */
1591 	ret = ov5640_get_exposure(sensor);
1592 	if (ret < 0)
1593 		return ret;
1594 	prev_shutter = ret;
1595 	ret = ov5640_get_binning(sensor);
1596 	if (ret < 0)
1597 		return ret;
1598 	if (ret && mode->id != OV5640_MODE_720P_1280_720 &&
1599 	    mode->id != OV5640_MODE_1080P_1920_1080)
1600 		prev_shutter *= 2;
1601 
1602 	/* read preview gain */
1603 	ret = ov5640_get_gain(sensor);
1604 	if (ret < 0)
1605 		return ret;
1606 	prev_gain16 = ret;
1607 
1608 	/* get average */
1609 	ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average);
1610 	if (ret)
1611 		return ret;
1612 
1613 	/* turn off night mode for capture */
1614 	ret = ov5640_set_night_mode(sensor);
1615 	if (ret < 0)
1616 		return ret;
1617 
1618 	/* Write capture setting */
1619 	ret = ov5640_load_regs(sensor, mode);
1620 	if (ret < 0)
1621 		return ret;
1622 
1623 	/* read capture VTS */
1624 	ret = ov5640_get_vts(sensor);
1625 	if (ret < 0)
1626 		return ret;
1627 	cap_vts = ret;
1628 	ret = ov5640_get_hts(sensor);
1629 	if (ret < 0)
1630 		return ret;
1631 	if (ret == 0)
1632 		return -EINVAL;
1633 	cap_hts = ret;
1634 
1635 	ret = ov5640_get_sysclk(sensor);
1636 	if (ret < 0)
1637 		return ret;
1638 	if (ret == 0)
1639 		return -EINVAL;
1640 	cap_sysclk = ret;
1641 
1642 	/* calculate capture banding filter */
1643 	ret = ov5640_get_light_freq(sensor);
1644 	if (ret < 0)
1645 		return ret;
1646 	light_freq = ret;
1647 
1648 	if (light_freq == 60) {
1649 		/* 60Hz */
1650 		cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120;
1651 	} else {
1652 		/* 50Hz */
1653 		cap_bandfilt = cap_sysclk * 100 / cap_hts;
1654 	}
1655 
1656 	if (!sensor->prev_sysclk) {
1657 		ret = ov5640_get_sysclk(sensor);
1658 		if (ret < 0)
1659 			return ret;
1660 		if (ret == 0)
1661 			return -EINVAL;
1662 		sensor->prev_sysclk = ret;
1663 	}
1664 
1665 	if (!cap_bandfilt)
1666 		return -EINVAL;
1667 
1668 	cap_maxband = (int)((cap_vts - 4) / cap_bandfilt);
1669 
1670 	/* calculate capture shutter/gain16 */
1671 	if (average > sensor->ae_low && average < sensor->ae_high) {
1672 		/* in stable range */
1673 		cap_gain16_shutter =
1674 			prev_gain16 * prev_shutter *
1675 			cap_sysclk / sensor->prev_sysclk *
1676 			sensor->prev_hts / cap_hts *
1677 			sensor->ae_target / average;
1678 	} else {
1679 		cap_gain16_shutter =
1680 			prev_gain16 * prev_shutter *
1681 			cap_sysclk / sensor->prev_sysclk *
1682 			sensor->prev_hts / cap_hts;
1683 	}
1684 
1685 	/* gain to shutter */
1686 	if (cap_gain16_shutter < (cap_bandfilt * 16)) {
1687 		/* shutter < 1/100 */
1688 		cap_shutter = cap_gain16_shutter / 16;
1689 		if (cap_shutter < 1)
1690 			cap_shutter = 1;
1691 
1692 		cap_gain16 = cap_gain16_shutter / cap_shutter;
1693 		if (cap_gain16 < 16)
1694 			cap_gain16 = 16;
1695 	} else {
1696 		if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) {
1697 			/* exposure reach max */
1698 			cap_shutter = cap_bandfilt * cap_maxband;
1699 			if (!cap_shutter)
1700 				return -EINVAL;
1701 
1702 			cap_gain16 = cap_gain16_shutter / cap_shutter;
1703 		} else {
1704 			/* 1/100 < (cap_shutter = n/100) =< max */
1705 			cap_shutter =
1706 				((int)(cap_gain16_shutter / 16 / cap_bandfilt))
1707 				* cap_bandfilt;
1708 			if (!cap_shutter)
1709 				return -EINVAL;
1710 
1711 			cap_gain16 = cap_gain16_shutter / cap_shutter;
1712 		}
1713 	}
1714 
1715 	/* set capture gain */
1716 	ret = ov5640_set_gain(sensor, cap_gain16);
1717 	if (ret)
1718 		return ret;
1719 
1720 	/* write capture shutter */
1721 	if (cap_shutter > (cap_vts - 4)) {
1722 		cap_vts = cap_shutter + 4;
1723 		ret = ov5640_set_vts(sensor, cap_vts);
1724 		if (ret < 0)
1725 			return ret;
1726 	}
1727 
1728 	/* set exposure */
1729 	return ov5640_set_exposure(sensor, cap_shutter);
1730 }
1731 
1732 /*
1733  * if sensor changes inside scaling or subsampling
1734  * change mode directly
1735  */
1736 static int ov5640_set_mode_direct(struct ov5640_dev *sensor,
1737 				  const struct ov5640_mode_info *mode)
1738 {
1739 	if (!mode->reg_data)
1740 		return -EINVAL;
1741 
1742 	/* Write capture setting */
1743 	return ov5640_load_regs(sensor, mode);
1744 }
1745 
1746 static int ov5640_set_mode(struct ov5640_dev *sensor)
1747 {
1748 	const struct ov5640_mode_info *mode = sensor->current_mode;
1749 	const struct ov5640_mode_info *orig_mode = sensor->last_mode;
1750 	enum ov5640_downsize_mode dn_mode, orig_dn_mode;
1751 	bool auto_gain = sensor->ctrls.auto_gain->val == 1;
1752 	bool auto_exp =  sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO;
1753 	unsigned long rate;
1754 	int ret;
1755 
1756 	dn_mode = mode->dn_mode;
1757 	orig_dn_mode = orig_mode->dn_mode;
1758 
1759 	/* auto gain and exposure must be turned off when changing modes */
1760 	if (auto_gain) {
1761 		ret = ov5640_set_autogain(sensor, false);
1762 		if (ret)
1763 			return ret;
1764 	}
1765 
1766 	if (auto_exp) {
1767 		ret = ov5640_set_autoexposure(sensor, false);
1768 		if (ret)
1769 			goto restore_auto_gain;
1770 	}
1771 
1772 	/*
1773 	 * All the formats we support have 16 bits per pixel, seems to require
1774 	 * the same rate than YUV, so we can just use 16 bpp all the time.
1775 	 */
1776 	rate = ov5640_calc_pixel_rate(sensor) * 16;
1777 	if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
1778 		rate = rate / sensor->ep.bus.mipi_csi2.num_data_lanes;
1779 		ret = ov5640_set_mipi_pclk(sensor, rate);
1780 	} else {
1781 		rate = rate / sensor->ep.bus.parallel.bus_width;
1782 		ret = ov5640_set_dvp_pclk(sensor, rate);
1783 	}
1784 
1785 	if (ret < 0)
1786 		return 0;
1787 
1788 	if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) ||
1789 	    (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) {
1790 		/*
1791 		 * change between subsampling and scaling
1792 		 * go through exposure calculation
1793 		 */
1794 		ret = ov5640_set_mode_exposure_calc(sensor, mode);
1795 	} else {
1796 		/*
1797 		 * change inside subsampling or scaling
1798 		 * download firmware directly
1799 		 */
1800 		ret = ov5640_set_mode_direct(sensor, mode);
1801 	}
1802 	if (ret < 0)
1803 		goto restore_auto_exp_gain;
1804 
1805 	/* restore auto gain and exposure */
1806 	if (auto_gain)
1807 		ov5640_set_autogain(sensor, true);
1808 	if (auto_exp)
1809 		ov5640_set_autoexposure(sensor, true);
1810 
1811 	ret = ov5640_set_binning(sensor, dn_mode != SCALING);
1812 	if (ret < 0)
1813 		return ret;
1814 	ret = ov5640_set_ae_target(sensor, sensor->ae_target);
1815 	if (ret < 0)
1816 		return ret;
1817 	ret = ov5640_get_light_freq(sensor);
1818 	if (ret < 0)
1819 		return ret;
1820 	ret = ov5640_set_bandingfilter(sensor);
1821 	if (ret < 0)
1822 		return ret;
1823 	ret = ov5640_set_virtual_channel(sensor);
1824 	if (ret < 0)
1825 		return ret;
1826 
1827 	sensor->pending_mode_change = false;
1828 	sensor->last_mode = mode;
1829 
1830 	return 0;
1831 
1832 restore_auto_exp_gain:
1833 	if (auto_exp)
1834 		ov5640_set_autoexposure(sensor, true);
1835 restore_auto_gain:
1836 	if (auto_gain)
1837 		ov5640_set_autogain(sensor, true);
1838 
1839 	return ret;
1840 }
1841 
1842 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
1843 			       struct v4l2_mbus_framefmt *format);
1844 
1845 /* restore the last set video mode after chip power-on */
1846 static int ov5640_restore_mode(struct ov5640_dev *sensor)
1847 {
1848 	int ret;
1849 
1850 	/* first load the initial register values */
1851 	ret = ov5640_load_regs(sensor, &ov5640_mode_init_data);
1852 	if (ret < 0)
1853 		return ret;
1854 	sensor->last_mode = &ov5640_mode_init_data;
1855 
1856 	ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
1857 			     (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) |
1858 			     ilog2(OV5640_SCLK_ROOT_DIV));
1859 	if (ret)
1860 		return ret;
1861 
1862 	/* now restore the last capture mode */
1863 	ret = ov5640_set_mode(sensor);
1864 	if (ret < 0)
1865 		return ret;
1866 
1867 	return ov5640_set_framefmt(sensor, &sensor->fmt);
1868 }
1869 
1870 static void ov5640_power(struct ov5640_dev *sensor, bool enable)
1871 {
1872 	gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1);
1873 }
1874 
1875 static void ov5640_reset(struct ov5640_dev *sensor)
1876 {
1877 	if (!sensor->reset_gpio)
1878 		return;
1879 
1880 	gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1881 
1882 	/* camera power cycle */
1883 	ov5640_power(sensor, false);
1884 	usleep_range(5000, 10000);
1885 	ov5640_power(sensor, true);
1886 	usleep_range(5000, 10000);
1887 
1888 	gpiod_set_value_cansleep(sensor->reset_gpio, 1);
1889 	usleep_range(1000, 2000);
1890 
1891 	gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1892 	usleep_range(20000, 25000);
1893 }
1894 
1895 static int ov5640_set_power_on(struct ov5640_dev *sensor)
1896 {
1897 	struct i2c_client *client = sensor->i2c_client;
1898 	int ret;
1899 
1900 	ret = clk_prepare_enable(sensor->xclk);
1901 	if (ret) {
1902 		dev_err(&client->dev, "%s: failed to enable clock\n",
1903 			__func__);
1904 		return ret;
1905 	}
1906 
1907 	ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES,
1908 				    sensor->supplies);
1909 	if (ret) {
1910 		dev_err(&client->dev, "%s: failed to enable regulators\n",
1911 			__func__);
1912 		goto xclk_off;
1913 	}
1914 
1915 	ov5640_reset(sensor);
1916 	ov5640_power(sensor, true);
1917 
1918 	ret = ov5640_init_slave_id(sensor);
1919 	if (ret)
1920 		goto power_off;
1921 
1922 	return 0;
1923 
1924 power_off:
1925 	ov5640_power(sensor, false);
1926 	regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
1927 xclk_off:
1928 	clk_disable_unprepare(sensor->xclk);
1929 	return ret;
1930 }
1931 
1932 static void ov5640_set_power_off(struct ov5640_dev *sensor)
1933 {
1934 	ov5640_power(sensor, false);
1935 	regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
1936 	clk_disable_unprepare(sensor->xclk);
1937 }
1938 
1939 static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on)
1940 {
1941 	int ret;
1942 
1943 	if (!on) {
1944 		/* Reset MIPI bus settings to their default values. */
1945 		ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
1946 		ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x04);
1947 		ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x00);
1948 		return 0;
1949 	}
1950 
1951 	/*
1952 	 * Power up MIPI HS Tx and LS Rx; 2 data lanes mode
1953 	 *
1954 	 * 0x300e = 0x40
1955 	 * [7:5] = 010	: 2 data lanes mode (see FIXME note in
1956 	 *		  "ov5640_set_stream_mipi()")
1957 	 * [4] = 0	: Power up MIPI HS Tx
1958 	 * [3] = 0	: Power up MIPI LS Rx
1959 	 * [2] = 0	: MIPI interface disabled
1960 	 */
1961 	ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x40);
1962 	if (ret)
1963 		return ret;
1964 
1965 	/*
1966 	 * Gate clock and set LP11 in 'no packets mode' (idle)
1967 	 *
1968 	 * 0x4800 = 0x24
1969 	 * [5] = 1	: Gate clock when 'no packets'
1970 	 * [2] = 1	: MIPI bus in LP11 when 'no packets'
1971 	 */
1972 	ret = ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x24);
1973 	if (ret)
1974 		return ret;
1975 
1976 	/*
1977 	 * Set data lanes and clock in LP11 when 'sleeping'
1978 	 *
1979 	 * 0x3019 = 0x70
1980 	 * [6] = 1	: MIPI data lane 2 in LP11 when 'sleeping'
1981 	 * [5] = 1	: MIPI data lane 1 in LP11 when 'sleeping'
1982 	 * [4] = 1	: MIPI clock lane in LP11 when 'sleeping'
1983 	 */
1984 	ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x70);
1985 	if (ret)
1986 		return ret;
1987 
1988 	/* Give lanes some time to coax into LP11 state. */
1989 	usleep_range(500, 1000);
1990 
1991 	return 0;
1992 }
1993 
1994 static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
1995 {
1996 	unsigned int flags = sensor->ep.bus.parallel.flags;
1997 	u8 pclk_pol = 0;
1998 	u8 hsync_pol = 0;
1999 	u8 vsync_pol = 0;
2000 	int ret;
2001 
2002 	if (!on) {
2003 		/* Reset settings to their default values. */
2004 		ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
2005 		ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, 0x20);
2006 		ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00);
2007 		ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0x00);
2008 		return 0;
2009 	}
2010 
2011 	/*
2012 	 * Note about parallel port configuration.
2013 	 *
2014 	 * When configured in parallel mode, the OV5640 will
2015 	 * output 10 bits data on DVP data lines [9:0].
2016 	 * If only 8 bits data are wanted, the 8 bits data lines
2017 	 * of the camera interface must be physically connected
2018 	 * on the DVP data lines [9:2].
2019 	 *
2020 	 * Control lines polarity can be configured through
2021 	 * devicetree endpoint control lines properties.
2022 	 * If no endpoint control lines properties are set,
2023 	 * polarity will be as below:
2024 	 * - VSYNC:	active high
2025 	 * - HREF:	active low
2026 	 * - PCLK:	active low
2027 	 */
2028 	/*
2029 	 * configure parallel port control lines polarity
2030 	 *
2031 	 * POLARITY CTRL0
2032 	 * - [5]:	PCLK polarity (0: active low, 1: active high)
2033 	 * - [1]:	HREF polarity (0: active low, 1: active high)
2034 	 * - [0]:	VSYNC polarity (mismatch here between
2035 	 *		datasheet and hardware, 0 is active high
2036 	 *		and 1 is active low...)
2037 	 */
2038 	if (sensor->ep.bus_type == V4L2_MBUS_PARALLEL) {
2039 		if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
2040 			pclk_pol = 1;
2041 		if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
2042 			hsync_pol = 1;
2043 		if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
2044 			vsync_pol = 1;
2045 
2046 		ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00,
2047 				       (pclk_pol << 5) | (hsync_pol << 1) |
2048 				       vsync_pol);
2049 
2050 		if (ret)
2051 			return ret;
2052 	}
2053 
2054 	/*
2055 	 * powerdown MIPI TX/RX PHY & disable MIPI
2056 	 *
2057 	 * MIPI CONTROL 00
2058 	 * 4:	 PWDN PHY TX
2059 	 * 3:	 PWDN PHY RX
2060 	 * 2:	 MIPI enable
2061 	 */
2062 	ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x18);
2063 	if (ret)
2064 		return ret;
2065 
2066 	/*
2067 	 * enable VSYNC/HREF/PCLK DVP control lines
2068 	 * & D[9:6] DVP data lines
2069 	 *
2070 	 * PAD OUTPUT ENABLE 01
2071 	 * - 6:		VSYNC output enable
2072 	 * - 5:		HREF output enable
2073 	 * - 4:		PCLK output enable
2074 	 * - [3:0]:	D[9:6] output enable
2075 	 */
2076 	ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01,
2077 			       sensor->ep.bus_type == V4L2_MBUS_PARALLEL ?
2078 			       0x7f : 0x1f);
2079 	if (ret)
2080 		return ret;
2081 
2082 	/*
2083 	 * enable D[5:0] DVP data lines
2084 	 *
2085 	 * PAD OUTPUT ENABLE 02
2086 	 * - [7:2]:	D[5:0] output enable
2087 	 */
2088 	return ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0xfc);
2089 }
2090 
2091 static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
2092 {
2093 	int ret = 0;
2094 
2095 	if (on) {
2096 		ret = ov5640_set_power_on(sensor);
2097 		if (ret)
2098 			return ret;
2099 
2100 		ret = ov5640_restore_mode(sensor);
2101 		if (ret)
2102 			goto power_off;
2103 	}
2104 
2105 	if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
2106 		ret = ov5640_set_power_mipi(sensor, on);
2107 	else
2108 		ret = ov5640_set_power_dvp(sensor, on);
2109 	if (ret)
2110 		goto power_off;
2111 
2112 	if (!on)
2113 		ov5640_set_power_off(sensor);
2114 
2115 	return 0;
2116 
2117 power_off:
2118 	ov5640_set_power_off(sensor);
2119 	return ret;
2120 }
2121 
2122 /* --------------- Subdev Operations --------------- */
2123 
2124 static int ov5640_s_power(struct v4l2_subdev *sd, int on)
2125 {
2126 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2127 	int ret = 0;
2128 
2129 	mutex_lock(&sensor->lock);
2130 
2131 	/*
2132 	 * If the power count is modified from 0 to != 0 or from != 0 to 0,
2133 	 * update the power state.
2134 	 */
2135 	if (sensor->power_count == !on) {
2136 		ret = ov5640_set_power(sensor, !!on);
2137 		if (ret)
2138 			goto out;
2139 	}
2140 
2141 	/* Update the power count. */
2142 	sensor->power_count += on ? 1 : -1;
2143 	WARN_ON(sensor->power_count < 0);
2144 out:
2145 	mutex_unlock(&sensor->lock);
2146 
2147 	if (on && !ret && sensor->power_count == 1) {
2148 		/* restore controls */
2149 		ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
2150 	}
2151 
2152 	return ret;
2153 }
2154 
2155 static int ov5640_try_frame_interval(struct ov5640_dev *sensor,
2156 				     struct v4l2_fract *fi,
2157 				     u32 width, u32 height)
2158 {
2159 	const struct ov5640_mode_info *mode;
2160 	enum ov5640_frame_rate rate = OV5640_15_FPS;
2161 	int minfps, maxfps, best_fps, fps;
2162 	int i;
2163 
2164 	minfps = ov5640_framerates[OV5640_15_FPS];
2165 	maxfps = ov5640_framerates[OV5640_60_FPS];
2166 
2167 	if (fi->numerator == 0) {
2168 		fi->denominator = maxfps;
2169 		fi->numerator = 1;
2170 		rate = OV5640_60_FPS;
2171 		goto find_mode;
2172 	}
2173 
2174 	fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator),
2175 			minfps, maxfps);
2176 
2177 	best_fps = minfps;
2178 	for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) {
2179 		int curr_fps = ov5640_framerates[i];
2180 
2181 		if (abs(curr_fps - fps) < abs(best_fps - fps)) {
2182 			best_fps = curr_fps;
2183 			rate = i;
2184 		}
2185 	}
2186 
2187 	fi->numerator = 1;
2188 	fi->denominator = best_fps;
2189 
2190 find_mode:
2191 	mode = ov5640_find_mode(sensor, rate, width, height, false);
2192 	return mode ? rate : -EINVAL;
2193 }
2194 
2195 static int ov5640_get_fmt(struct v4l2_subdev *sd,
2196 			  struct v4l2_subdev_pad_config *cfg,
2197 			  struct v4l2_subdev_format *format)
2198 {
2199 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2200 	struct v4l2_mbus_framefmt *fmt;
2201 
2202 	if (format->pad != 0)
2203 		return -EINVAL;
2204 
2205 	mutex_lock(&sensor->lock);
2206 
2207 	if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2208 		fmt = v4l2_subdev_get_try_format(&sensor->sd, cfg,
2209 						 format->pad);
2210 	else
2211 		fmt = &sensor->fmt;
2212 
2213 	format->format = *fmt;
2214 
2215 	mutex_unlock(&sensor->lock);
2216 
2217 	return 0;
2218 }
2219 
2220 static int ov5640_try_fmt_internal(struct v4l2_subdev *sd,
2221 				   struct v4l2_mbus_framefmt *fmt,
2222 				   enum ov5640_frame_rate fr,
2223 				   const struct ov5640_mode_info **new_mode)
2224 {
2225 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2226 	const struct ov5640_mode_info *mode;
2227 	int i;
2228 
2229 	mode = ov5640_find_mode(sensor, fr, fmt->width, fmt->height, true);
2230 	if (!mode)
2231 		return -EINVAL;
2232 	fmt->width = mode->hact;
2233 	fmt->height = mode->vact;
2234 
2235 	if (new_mode)
2236 		*new_mode = mode;
2237 
2238 	for (i = 0; i < ARRAY_SIZE(ov5640_formats); i++)
2239 		if (ov5640_formats[i].code == fmt->code)
2240 			break;
2241 	if (i >= ARRAY_SIZE(ov5640_formats))
2242 		i = 0;
2243 
2244 	fmt->code = ov5640_formats[i].code;
2245 	fmt->colorspace = ov5640_formats[i].colorspace;
2246 	fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2247 	fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2248 	fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
2249 
2250 	return 0;
2251 }
2252 
2253 static int ov5640_set_fmt(struct v4l2_subdev *sd,
2254 			  struct v4l2_subdev_pad_config *cfg,
2255 			  struct v4l2_subdev_format *format)
2256 {
2257 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2258 	const struct ov5640_mode_info *new_mode;
2259 	struct v4l2_mbus_framefmt *mbus_fmt = &format->format;
2260 	struct v4l2_mbus_framefmt *fmt;
2261 	int ret;
2262 
2263 	if (format->pad != 0)
2264 		return -EINVAL;
2265 
2266 	mutex_lock(&sensor->lock);
2267 
2268 	if (sensor->streaming) {
2269 		ret = -EBUSY;
2270 		goto out;
2271 	}
2272 
2273 	ret = ov5640_try_fmt_internal(sd, mbus_fmt,
2274 				      sensor->current_fr, &new_mode);
2275 	if (ret)
2276 		goto out;
2277 
2278 	if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2279 		fmt = v4l2_subdev_get_try_format(sd, cfg, 0);
2280 	else
2281 		fmt = &sensor->fmt;
2282 
2283 	*fmt = *mbus_fmt;
2284 
2285 	if (new_mode != sensor->current_mode) {
2286 		sensor->current_mode = new_mode;
2287 		sensor->pending_mode_change = true;
2288 	}
2289 	if (mbus_fmt->code != sensor->fmt.code)
2290 		sensor->pending_fmt_change = true;
2291 
2292 	__v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
2293 				 ov5640_calc_pixel_rate(sensor));
2294 out:
2295 	mutex_unlock(&sensor->lock);
2296 	return ret;
2297 }
2298 
2299 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
2300 			       struct v4l2_mbus_framefmt *format)
2301 {
2302 	int ret = 0;
2303 	bool is_jpeg = false;
2304 	u8 fmt, mux;
2305 
2306 	switch (format->code) {
2307 	case MEDIA_BUS_FMT_UYVY8_2X8:
2308 		/* YUV422, UYVY */
2309 		fmt = 0x3f;
2310 		mux = OV5640_FMT_MUX_YUV422;
2311 		break;
2312 	case MEDIA_BUS_FMT_YUYV8_2X8:
2313 		/* YUV422, YUYV */
2314 		fmt = 0x30;
2315 		mux = OV5640_FMT_MUX_YUV422;
2316 		break;
2317 	case MEDIA_BUS_FMT_RGB565_2X8_LE:
2318 		/* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
2319 		fmt = 0x6F;
2320 		mux = OV5640_FMT_MUX_RGB;
2321 		break;
2322 	case MEDIA_BUS_FMT_RGB565_2X8_BE:
2323 		/* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */
2324 		fmt = 0x61;
2325 		mux = OV5640_FMT_MUX_RGB;
2326 		break;
2327 	case MEDIA_BUS_FMT_JPEG_1X8:
2328 		/* YUV422, YUYV */
2329 		fmt = 0x30;
2330 		mux = OV5640_FMT_MUX_YUV422;
2331 		is_jpeg = true;
2332 		break;
2333 	case MEDIA_BUS_FMT_SBGGR8_1X8:
2334 		/* Raw, BGBG... / GRGR... */
2335 		fmt = 0x00;
2336 		mux = OV5640_FMT_MUX_RAW_DPC;
2337 		break;
2338 	case MEDIA_BUS_FMT_SGBRG8_1X8:
2339 		/* Raw bayer, GBGB... / RGRG... */
2340 		fmt = 0x01;
2341 		mux = OV5640_FMT_MUX_RAW_DPC;
2342 		break;
2343 	case MEDIA_BUS_FMT_SGRBG8_1X8:
2344 		/* Raw bayer, GRGR... / BGBG... */
2345 		fmt = 0x02;
2346 		mux = OV5640_FMT_MUX_RAW_DPC;
2347 		break;
2348 	case MEDIA_BUS_FMT_SRGGB8_1X8:
2349 		/* Raw bayer, RGRG... / GBGB... */
2350 		fmt = 0x03;
2351 		mux = OV5640_FMT_MUX_RAW_DPC;
2352 		break;
2353 	default:
2354 		return -EINVAL;
2355 	}
2356 
2357 	/* FORMAT CONTROL00: YUV and RGB formatting */
2358 	ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, fmt);
2359 	if (ret)
2360 		return ret;
2361 
2362 	/* FORMAT MUX CONTROL: ISP YUV or RGB */
2363 	ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL, mux);
2364 	if (ret)
2365 		return ret;
2366 
2367 	/*
2368 	 * TIMING TC REG21:
2369 	 * - [5]:	JPEG enable
2370 	 */
2371 	ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2372 			     BIT(5), is_jpeg ? BIT(5) : 0);
2373 	if (ret)
2374 		return ret;
2375 
2376 	/*
2377 	 * SYSTEM RESET02:
2378 	 * - [4]:	Reset JFIFO
2379 	 * - [3]:	Reset SFIFO
2380 	 * - [2]:	Reset JPEG
2381 	 */
2382 	ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02,
2383 			     BIT(4) | BIT(3) | BIT(2),
2384 			     is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2)));
2385 	if (ret)
2386 		return ret;
2387 
2388 	/*
2389 	 * CLOCK ENABLE02:
2390 	 * - [5]:	Enable JPEG 2x clock
2391 	 * - [3]:	Enable JPEG clock
2392 	 */
2393 	return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02,
2394 			      BIT(5) | BIT(3),
2395 			      is_jpeg ? (BIT(5) | BIT(3)) : 0);
2396 }
2397 
2398 /*
2399  * Sensor Controls.
2400  */
2401 
2402 static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value)
2403 {
2404 	int ret;
2405 
2406 	if (value) {
2407 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2408 				     BIT(0), BIT(0));
2409 		if (ret)
2410 			return ret;
2411 		ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value);
2412 	} else {
2413 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0);
2414 	}
2415 
2416 	return ret;
2417 }
2418 
2419 static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value)
2420 {
2421 	int ret;
2422 
2423 	if (value) {
2424 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2425 				     BIT(2), BIT(2));
2426 		if (ret)
2427 			return ret;
2428 		ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5,
2429 				       value & 0xff);
2430 	} else {
2431 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0);
2432 	}
2433 
2434 	return ret;
2435 }
2436 
2437 static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value)
2438 {
2439 	int ret;
2440 
2441 	if (value) {
2442 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2443 				     BIT(1), BIT(1));
2444 		if (ret)
2445 			return ret;
2446 		ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3,
2447 				       value & 0xff);
2448 		if (ret)
2449 			return ret;
2450 		ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4,
2451 				       value & 0xff);
2452 	} else {
2453 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0);
2454 	}
2455 
2456 	return ret;
2457 }
2458 
2459 static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb)
2460 {
2461 	int ret;
2462 
2463 	ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL,
2464 			     BIT(0), awb ? 0 : 1);
2465 	if (ret)
2466 		return ret;
2467 
2468 	if (!awb) {
2469 		u16 red = (u16)sensor->ctrls.red_balance->val;
2470 		u16 blue = (u16)sensor->ctrls.blue_balance->val;
2471 
2472 		ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red);
2473 		if (ret)
2474 			return ret;
2475 		ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue);
2476 	}
2477 
2478 	return ret;
2479 }
2480 
2481 static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor,
2482 				    enum v4l2_exposure_auto_type auto_exposure)
2483 {
2484 	struct ov5640_ctrls *ctrls = &sensor->ctrls;
2485 	bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO);
2486 	int ret = 0;
2487 
2488 	if (ctrls->auto_exp->is_new) {
2489 		ret = ov5640_set_autoexposure(sensor, auto_exp);
2490 		if (ret)
2491 			return ret;
2492 	}
2493 
2494 	if (!auto_exp && ctrls->exposure->is_new) {
2495 		u16 max_exp;
2496 
2497 		ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS,
2498 					&max_exp);
2499 		if (ret)
2500 			return ret;
2501 		ret = ov5640_get_vts(sensor);
2502 		if (ret < 0)
2503 			return ret;
2504 		max_exp += ret;
2505 		ret = 0;
2506 
2507 		if (ctrls->exposure->val < max_exp)
2508 			ret = ov5640_set_exposure(sensor, ctrls->exposure->val);
2509 	}
2510 
2511 	return ret;
2512 }
2513 
2514 static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain)
2515 {
2516 	struct ov5640_ctrls *ctrls = &sensor->ctrls;
2517 	int ret = 0;
2518 
2519 	if (ctrls->auto_gain->is_new) {
2520 		ret = ov5640_set_autogain(sensor, auto_gain);
2521 		if (ret)
2522 			return ret;
2523 	}
2524 
2525 	if (!auto_gain && ctrls->gain->is_new)
2526 		ret = ov5640_set_gain(sensor, ctrls->gain->val);
2527 
2528 	return ret;
2529 }
2530 
2531 static const char * const test_pattern_menu[] = {
2532 	"Disabled",
2533 	"Color bars",
2534 	"Color bars w/ rolling bar",
2535 	"Color squares",
2536 	"Color squares w/ rolling bar",
2537 };
2538 
2539 #define OV5640_TEST_ENABLE		BIT(7)
2540 #define OV5640_TEST_ROLLING		BIT(6)	/* rolling horizontal bar */
2541 #define OV5640_TEST_TRANSPARENT		BIT(5)
2542 #define OV5640_TEST_SQUARE_BW		BIT(4)	/* black & white squares */
2543 #define OV5640_TEST_BAR_STANDARD	(0 << 2)
2544 #define OV5640_TEST_BAR_VERT_CHANGE_1	(1 << 2)
2545 #define OV5640_TEST_BAR_HOR_CHANGE	(2 << 2)
2546 #define OV5640_TEST_BAR_VERT_CHANGE_2	(3 << 2)
2547 #define OV5640_TEST_BAR			(0 << 0)
2548 #define OV5640_TEST_RANDOM		(1 << 0)
2549 #define OV5640_TEST_SQUARE		(2 << 0)
2550 #define OV5640_TEST_BLACK		(3 << 0)
2551 
2552 static const u8 test_pattern_val[] = {
2553 	0,
2554 	OV5640_TEST_ENABLE | OV5640_TEST_BAR_VERT_CHANGE_1 |
2555 		OV5640_TEST_BAR,
2556 	OV5640_TEST_ENABLE | OV5640_TEST_ROLLING |
2557 		OV5640_TEST_BAR_VERT_CHANGE_1 | OV5640_TEST_BAR,
2558 	OV5640_TEST_ENABLE | OV5640_TEST_SQUARE,
2559 	OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | OV5640_TEST_SQUARE,
2560 };
2561 
2562 static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value)
2563 {
2564 	return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1,
2565 				test_pattern_val[value]);
2566 }
2567 
2568 static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value)
2569 {
2570 	int ret;
2571 
2572 	ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7),
2573 			     (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ?
2574 			     0 : BIT(7));
2575 	if (ret)
2576 		return ret;
2577 
2578 	return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2),
2579 			      (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ?
2580 			      BIT(2) : 0);
2581 }
2582 
2583 static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value)
2584 {
2585 	/*
2586 	 * If sensor is mounted upside down, mirror logic is inversed.
2587 	 *
2588 	 * Sensor is a BSI (Back Side Illuminated) one,
2589 	 * so image captured is physically mirrored.
2590 	 * This is why mirror logic is inversed in
2591 	 * order to cancel this mirror effect.
2592 	 */
2593 
2594 	/*
2595 	 * TIMING TC REG21:
2596 	 * - [2]:	ISP mirror
2597 	 * - [1]:	Sensor mirror
2598 	 */
2599 	return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2600 			      BIT(2) | BIT(1),
2601 			      (!(value ^ sensor->upside_down)) ?
2602 			      (BIT(2) | BIT(1)) : 0);
2603 }
2604 
2605 static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value)
2606 {
2607 	/* If sensor is mounted upside down, flip logic is inversed */
2608 
2609 	/*
2610 	 * TIMING TC REG20:
2611 	 * - [2]:	ISP vflip
2612 	 * - [1]:	Sensor vflip
2613 	 */
2614 	return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
2615 			      BIT(2) | BIT(1),
2616 			      (value ^ sensor->upside_down) ?
2617 			      (BIT(2) | BIT(1)) : 0);
2618 }
2619 
2620 static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
2621 {
2622 	struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2623 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2624 	int val;
2625 
2626 	/* v4l2_ctrl_lock() locks our own mutex */
2627 
2628 	switch (ctrl->id) {
2629 	case V4L2_CID_AUTOGAIN:
2630 		val = ov5640_get_gain(sensor);
2631 		if (val < 0)
2632 			return val;
2633 		sensor->ctrls.gain->val = val;
2634 		break;
2635 	case V4L2_CID_EXPOSURE_AUTO:
2636 		val = ov5640_get_exposure(sensor);
2637 		if (val < 0)
2638 			return val;
2639 		sensor->ctrls.exposure->val = val;
2640 		break;
2641 	}
2642 
2643 	return 0;
2644 }
2645 
2646 static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl)
2647 {
2648 	struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2649 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2650 	int ret;
2651 
2652 	/* v4l2_ctrl_lock() locks our own mutex */
2653 
2654 	/*
2655 	 * If the device is not powered up by the host driver do
2656 	 * not apply any controls to H/W at this time. Instead
2657 	 * the controls will be restored right after power-up.
2658 	 */
2659 	if (sensor->power_count == 0)
2660 		return 0;
2661 
2662 	switch (ctrl->id) {
2663 	case V4L2_CID_AUTOGAIN:
2664 		ret = ov5640_set_ctrl_gain(sensor, ctrl->val);
2665 		break;
2666 	case V4L2_CID_EXPOSURE_AUTO:
2667 		ret = ov5640_set_ctrl_exposure(sensor, ctrl->val);
2668 		break;
2669 	case V4L2_CID_AUTO_WHITE_BALANCE:
2670 		ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val);
2671 		break;
2672 	case V4L2_CID_HUE:
2673 		ret = ov5640_set_ctrl_hue(sensor, ctrl->val);
2674 		break;
2675 	case V4L2_CID_CONTRAST:
2676 		ret = ov5640_set_ctrl_contrast(sensor, ctrl->val);
2677 		break;
2678 	case V4L2_CID_SATURATION:
2679 		ret = ov5640_set_ctrl_saturation(sensor, ctrl->val);
2680 		break;
2681 	case V4L2_CID_TEST_PATTERN:
2682 		ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val);
2683 		break;
2684 	case V4L2_CID_POWER_LINE_FREQUENCY:
2685 		ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val);
2686 		break;
2687 	case V4L2_CID_HFLIP:
2688 		ret = ov5640_set_ctrl_hflip(sensor, ctrl->val);
2689 		break;
2690 	case V4L2_CID_VFLIP:
2691 		ret = ov5640_set_ctrl_vflip(sensor, ctrl->val);
2692 		break;
2693 	default:
2694 		ret = -EINVAL;
2695 		break;
2696 	}
2697 
2698 	return ret;
2699 }
2700 
2701 static const struct v4l2_ctrl_ops ov5640_ctrl_ops = {
2702 	.g_volatile_ctrl = ov5640_g_volatile_ctrl,
2703 	.s_ctrl = ov5640_s_ctrl,
2704 };
2705 
2706 static int ov5640_init_controls(struct ov5640_dev *sensor)
2707 {
2708 	const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops;
2709 	struct ov5640_ctrls *ctrls = &sensor->ctrls;
2710 	struct v4l2_ctrl_handler *hdl = &ctrls->handler;
2711 	int ret;
2712 
2713 	v4l2_ctrl_handler_init(hdl, 32);
2714 
2715 	/* we can use our own mutex for the ctrl lock */
2716 	hdl->lock = &sensor->lock;
2717 
2718 	/* Clock related controls */
2719 	ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE,
2720 					      0, INT_MAX, 1,
2721 					      ov5640_calc_pixel_rate(sensor));
2722 
2723 	/* Auto/manual white balance */
2724 	ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops,
2725 					   V4L2_CID_AUTO_WHITE_BALANCE,
2726 					   0, 1, 1, 1);
2727 	ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE,
2728 						0, 4095, 1, 0);
2729 	ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE,
2730 					       0, 4095, 1, 0);
2731 	/* Auto/manual exposure */
2732 	ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops,
2733 						 V4L2_CID_EXPOSURE_AUTO,
2734 						 V4L2_EXPOSURE_MANUAL, 0,
2735 						 V4L2_EXPOSURE_AUTO);
2736 	ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
2737 					    0, 65535, 1, 0);
2738 	/* Auto/manual gain */
2739 	ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
2740 					     0, 1, 1, 1);
2741 	ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN,
2742 					0, 1023, 1, 0);
2743 
2744 	ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION,
2745 					      0, 255, 1, 64);
2746 	ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE,
2747 				       0, 359, 1, 0);
2748 	ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST,
2749 					    0, 255, 1, 0);
2750 	ctrls->test_pattern =
2751 		v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN,
2752 					     ARRAY_SIZE(test_pattern_menu) - 1,
2753 					     0, 0, test_pattern_menu);
2754 	ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP,
2755 					 0, 1, 1, 0);
2756 	ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP,
2757 					 0, 1, 1, 0);
2758 
2759 	ctrls->light_freq =
2760 		v4l2_ctrl_new_std_menu(hdl, ops,
2761 				       V4L2_CID_POWER_LINE_FREQUENCY,
2762 				       V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
2763 				       V4L2_CID_POWER_LINE_FREQUENCY_50HZ);
2764 
2765 	if (hdl->error) {
2766 		ret = hdl->error;
2767 		goto free_ctrls;
2768 	}
2769 
2770 	ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY;
2771 	ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
2772 	ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
2773 
2774 	v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false);
2775 	v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true);
2776 	v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true);
2777 
2778 	sensor->sd.ctrl_handler = hdl;
2779 	return 0;
2780 
2781 free_ctrls:
2782 	v4l2_ctrl_handler_free(hdl);
2783 	return ret;
2784 }
2785 
2786 static int ov5640_enum_frame_size(struct v4l2_subdev *sd,
2787 				  struct v4l2_subdev_pad_config *cfg,
2788 				  struct v4l2_subdev_frame_size_enum *fse)
2789 {
2790 	if (fse->pad != 0)
2791 		return -EINVAL;
2792 	if (fse->index >= OV5640_NUM_MODES)
2793 		return -EINVAL;
2794 
2795 	fse->min_width =
2796 		ov5640_mode_data[fse->index].hact;
2797 	fse->max_width = fse->min_width;
2798 	fse->min_height =
2799 		ov5640_mode_data[fse->index].vact;
2800 	fse->max_height = fse->min_height;
2801 
2802 	return 0;
2803 }
2804 
2805 static int ov5640_enum_frame_interval(
2806 	struct v4l2_subdev *sd,
2807 	struct v4l2_subdev_pad_config *cfg,
2808 	struct v4l2_subdev_frame_interval_enum *fie)
2809 {
2810 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2811 	struct v4l2_fract tpf;
2812 	int ret;
2813 
2814 	if (fie->pad != 0)
2815 		return -EINVAL;
2816 	if (fie->index >= OV5640_NUM_FRAMERATES)
2817 		return -EINVAL;
2818 
2819 	tpf.numerator = 1;
2820 	tpf.denominator = ov5640_framerates[fie->index];
2821 
2822 	ret = ov5640_try_frame_interval(sensor, &tpf,
2823 					fie->width, fie->height);
2824 	if (ret < 0)
2825 		return -EINVAL;
2826 
2827 	fie->interval = tpf;
2828 	return 0;
2829 }
2830 
2831 static int ov5640_g_frame_interval(struct v4l2_subdev *sd,
2832 				   struct v4l2_subdev_frame_interval *fi)
2833 {
2834 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2835 
2836 	mutex_lock(&sensor->lock);
2837 	fi->interval = sensor->frame_interval;
2838 	mutex_unlock(&sensor->lock);
2839 
2840 	return 0;
2841 }
2842 
2843 static int ov5640_s_frame_interval(struct v4l2_subdev *sd,
2844 				   struct v4l2_subdev_frame_interval *fi)
2845 {
2846 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2847 	const struct ov5640_mode_info *mode;
2848 	int frame_rate, ret = 0;
2849 
2850 	if (fi->pad != 0)
2851 		return -EINVAL;
2852 
2853 	mutex_lock(&sensor->lock);
2854 
2855 	if (sensor->streaming) {
2856 		ret = -EBUSY;
2857 		goto out;
2858 	}
2859 
2860 	mode = sensor->current_mode;
2861 
2862 	frame_rate = ov5640_try_frame_interval(sensor, &fi->interval,
2863 					       mode->hact, mode->vact);
2864 	if (frame_rate < 0) {
2865 		/* Always return a valid frame interval value */
2866 		fi->interval = sensor->frame_interval;
2867 		goto out;
2868 	}
2869 
2870 	mode = ov5640_find_mode(sensor, frame_rate, mode->hact,
2871 				mode->vact, true);
2872 	if (!mode) {
2873 		ret = -EINVAL;
2874 		goto out;
2875 	}
2876 
2877 	if (mode != sensor->current_mode ||
2878 	    frame_rate != sensor->current_fr) {
2879 		sensor->current_fr = frame_rate;
2880 		sensor->frame_interval = fi->interval;
2881 		sensor->current_mode = mode;
2882 		sensor->pending_mode_change = true;
2883 
2884 		__v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
2885 					 ov5640_calc_pixel_rate(sensor));
2886 	}
2887 out:
2888 	mutex_unlock(&sensor->lock);
2889 	return ret;
2890 }
2891 
2892 static int ov5640_enum_mbus_code(struct v4l2_subdev *sd,
2893 				 struct v4l2_subdev_pad_config *cfg,
2894 				 struct v4l2_subdev_mbus_code_enum *code)
2895 {
2896 	if (code->pad != 0)
2897 		return -EINVAL;
2898 	if (code->index >= ARRAY_SIZE(ov5640_formats))
2899 		return -EINVAL;
2900 
2901 	code->code = ov5640_formats[code->index].code;
2902 	return 0;
2903 }
2904 
2905 static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
2906 {
2907 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2908 	int ret = 0;
2909 
2910 	mutex_lock(&sensor->lock);
2911 
2912 	if (sensor->streaming == !enable) {
2913 		if (enable && sensor->pending_mode_change) {
2914 			ret = ov5640_set_mode(sensor);
2915 			if (ret)
2916 				goto out;
2917 		}
2918 
2919 		if (enable && sensor->pending_fmt_change) {
2920 			ret = ov5640_set_framefmt(sensor, &sensor->fmt);
2921 			if (ret)
2922 				goto out;
2923 			sensor->pending_fmt_change = false;
2924 		}
2925 
2926 		if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
2927 			ret = ov5640_set_stream_mipi(sensor, enable);
2928 		else if (sensor->ep.bus_type == V4L2_MBUS_BT656)
2929 			ret = ov5640_set_stream_bt656(sensor, enable);
2930 		else
2931 			ret = ov5640_set_stream_dvp(sensor, enable);
2932 
2933 		if (!ret)
2934 			sensor->streaming = enable;
2935 	}
2936 out:
2937 	mutex_unlock(&sensor->lock);
2938 	return ret;
2939 }
2940 
2941 static const struct v4l2_subdev_core_ops ov5640_core_ops = {
2942 	.s_power = ov5640_s_power,
2943 	.log_status = v4l2_ctrl_subdev_log_status,
2944 	.subscribe_event = v4l2_ctrl_subdev_subscribe_event,
2945 	.unsubscribe_event = v4l2_event_subdev_unsubscribe,
2946 };
2947 
2948 static const struct v4l2_subdev_video_ops ov5640_video_ops = {
2949 	.g_frame_interval = ov5640_g_frame_interval,
2950 	.s_frame_interval = ov5640_s_frame_interval,
2951 	.s_stream = ov5640_s_stream,
2952 };
2953 
2954 static const struct v4l2_subdev_pad_ops ov5640_pad_ops = {
2955 	.enum_mbus_code = ov5640_enum_mbus_code,
2956 	.get_fmt = ov5640_get_fmt,
2957 	.set_fmt = ov5640_set_fmt,
2958 	.enum_frame_size = ov5640_enum_frame_size,
2959 	.enum_frame_interval = ov5640_enum_frame_interval,
2960 };
2961 
2962 static const struct v4l2_subdev_ops ov5640_subdev_ops = {
2963 	.core = &ov5640_core_ops,
2964 	.video = &ov5640_video_ops,
2965 	.pad = &ov5640_pad_ops,
2966 };
2967 
2968 static int ov5640_get_regulators(struct ov5640_dev *sensor)
2969 {
2970 	int i;
2971 
2972 	for (i = 0; i < OV5640_NUM_SUPPLIES; i++)
2973 		sensor->supplies[i].supply = ov5640_supply_name[i];
2974 
2975 	return devm_regulator_bulk_get(&sensor->i2c_client->dev,
2976 				       OV5640_NUM_SUPPLIES,
2977 				       sensor->supplies);
2978 }
2979 
2980 static int ov5640_check_chip_id(struct ov5640_dev *sensor)
2981 {
2982 	struct i2c_client *client = sensor->i2c_client;
2983 	int ret = 0;
2984 	u16 chip_id;
2985 
2986 	ret = ov5640_set_power_on(sensor);
2987 	if (ret)
2988 		return ret;
2989 
2990 	ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id);
2991 	if (ret) {
2992 		dev_err(&client->dev, "%s: failed to read chip identifier\n",
2993 			__func__);
2994 		goto power_off;
2995 	}
2996 
2997 	if (chip_id != 0x5640) {
2998 		dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n",
2999 			__func__, chip_id);
3000 		ret = -ENXIO;
3001 	}
3002 
3003 power_off:
3004 	ov5640_set_power_off(sensor);
3005 	return ret;
3006 }
3007 
3008 static int ov5640_probe(struct i2c_client *client)
3009 {
3010 	struct device *dev = &client->dev;
3011 	struct fwnode_handle *endpoint;
3012 	struct ov5640_dev *sensor;
3013 	struct v4l2_mbus_framefmt *fmt;
3014 	u32 rotation;
3015 	int ret;
3016 
3017 	sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
3018 	if (!sensor)
3019 		return -ENOMEM;
3020 
3021 	sensor->i2c_client = client;
3022 
3023 	/*
3024 	 * default init sequence initialize sensor to
3025 	 * YUV422 UYVY VGA@30fps
3026 	 */
3027 	fmt = &sensor->fmt;
3028 	fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
3029 	fmt->colorspace = V4L2_COLORSPACE_SRGB;
3030 	fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
3031 	fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
3032 	fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
3033 	fmt->width = 640;
3034 	fmt->height = 480;
3035 	fmt->field = V4L2_FIELD_NONE;
3036 	sensor->frame_interval.numerator = 1;
3037 	sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS];
3038 	sensor->current_fr = OV5640_30_FPS;
3039 	sensor->current_mode =
3040 		&ov5640_mode_data[OV5640_MODE_VGA_640_480];
3041 	sensor->last_mode = sensor->current_mode;
3042 
3043 	sensor->ae_target = 52;
3044 
3045 	/* optional indication of physical rotation of sensor */
3046 	ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation",
3047 				       &rotation);
3048 	if (!ret) {
3049 		switch (rotation) {
3050 		case 180:
3051 			sensor->upside_down = true;
3052 			fallthrough;
3053 		case 0:
3054 			break;
3055 		default:
3056 			dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n",
3057 				 rotation);
3058 		}
3059 	}
3060 
3061 	endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev),
3062 						  NULL);
3063 	if (!endpoint) {
3064 		dev_err(dev, "endpoint node not found\n");
3065 		return -EINVAL;
3066 	}
3067 
3068 	ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep);
3069 	fwnode_handle_put(endpoint);
3070 	if (ret) {
3071 		dev_err(dev, "Could not parse endpoint\n");
3072 		return ret;
3073 	}
3074 
3075 	if (sensor->ep.bus_type != V4L2_MBUS_PARALLEL &&
3076 	    sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY &&
3077 	    sensor->ep.bus_type != V4L2_MBUS_BT656) {
3078 		dev_err(dev, "Unsupported bus type %d\n", sensor->ep.bus_type);
3079 		return -EINVAL;
3080 	}
3081 
3082 	/* get system clock (xclk) */
3083 	sensor->xclk = devm_clk_get(dev, "xclk");
3084 	if (IS_ERR(sensor->xclk)) {
3085 		dev_err(dev, "failed to get xclk\n");
3086 		return PTR_ERR(sensor->xclk);
3087 	}
3088 
3089 	sensor->xclk_freq = clk_get_rate(sensor->xclk);
3090 	if (sensor->xclk_freq < OV5640_XCLK_MIN ||
3091 	    sensor->xclk_freq > OV5640_XCLK_MAX) {
3092 		dev_err(dev, "xclk frequency out of range: %d Hz\n",
3093 			sensor->xclk_freq);
3094 		return -EINVAL;
3095 	}
3096 
3097 	/* request optional power down pin */
3098 	sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown",
3099 						    GPIOD_OUT_HIGH);
3100 	if (IS_ERR(sensor->pwdn_gpio))
3101 		return PTR_ERR(sensor->pwdn_gpio);
3102 
3103 	/* request optional reset pin */
3104 	sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
3105 						     GPIOD_OUT_HIGH);
3106 	if (IS_ERR(sensor->reset_gpio))
3107 		return PTR_ERR(sensor->reset_gpio);
3108 
3109 	v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops);
3110 
3111 	sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
3112 			    V4L2_SUBDEV_FL_HAS_EVENTS;
3113 	sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
3114 	sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
3115 	ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
3116 	if (ret)
3117 		return ret;
3118 
3119 	ret = ov5640_get_regulators(sensor);
3120 	if (ret)
3121 		return ret;
3122 
3123 	mutex_init(&sensor->lock);
3124 
3125 	ret = ov5640_check_chip_id(sensor);
3126 	if (ret)
3127 		goto entity_cleanup;
3128 
3129 	ret = ov5640_init_controls(sensor);
3130 	if (ret)
3131 		goto entity_cleanup;
3132 
3133 	ret = v4l2_async_register_subdev_sensor_common(&sensor->sd);
3134 	if (ret)
3135 		goto free_ctrls;
3136 
3137 	return 0;
3138 
3139 free_ctrls:
3140 	v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3141 entity_cleanup:
3142 	media_entity_cleanup(&sensor->sd.entity);
3143 	mutex_destroy(&sensor->lock);
3144 	return ret;
3145 }
3146 
3147 static int ov5640_remove(struct i2c_client *client)
3148 {
3149 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
3150 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
3151 
3152 	v4l2_async_unregister_subdev(&sensor->sd);
3153 	media_entity_cleanup(&sensor->sd.entity);
3154 	v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3155 	mutex_destroy(&sensor->lock);
3156 
3157 	return 0;
3158 }
3159 
3160 static const struct i2c_device_id ov5640_id[] = {
3161 	{"ov5640", 0},
3162 	{},
3163 };
3164 MODULE_DEVICE_TABLE(i2c, ov5640_id);
3165 
3166 static const struct of_device_id ov5640_dt_ids[] = {
3167 	{ .compatible = "ovti,ov5640" },
3168 	{ /* sentinel */ }
3169 };
3170 MODULE_DEVICE_TABLE(of, ov5640_dt_ids);
3171 
3172 static struct i2c_driver ov5640_i2c_driver = {
3173 	.driver = {
3174 		.name  = "ov5640",
3175 		.of_match_table	= ov5640_dt_ids,
3176 	},
3177 	.id_table = ov5640_id,
3178 	.probe_new = ov5640_probe,
3179 	.remove   = ov5640_remove,
3180 };
3181 
3182 module_i2c_driver(ov5640_i2c_driver);
3183 
3184 MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver");
3185 MODULE_LICENSE("GPL");
3186