1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. 4 * Copyright (C) 2014-2017 Mentor Graphics Inc. 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/clk-provider.h> 9 #include <linux/clkdev.h> 10 #include <linux/ctype.h> 11 #include <linux/delay.h> 12 #include <linux/device.h> 13 #include <linux/gpio/consumer.h> 14 #include <linux/i2c.h> 15 #include <linux/init.h> 16 #include <linux/module.h> 17 #include <linux/of_device.h> 18 #include <linux/regulator/consumer.h> 19 #include <linux/slab.h> 20 #include <linux/types.h> 21 #include <media/v4l2-async.h> 22 #include <media/v4l2-ctrls.h> 23 #include <media/v4l2-device.h> 24 #include <media/v4l2-event.h> 25 #include <media/v4l2-fwnode.h> 26 #include <media/v4l2-subdev.h> 27 28 /* min/typical/max system clock (xclk) frequencies */ 29 #define OV5640_XCLK_MIN 6000000 30 #define OV5640_XCLK_MAX 54000000 31 32 #define OV5640_DEFAULT_SLAVE_ID 0x3c 33 34 #define OV5640_REG_SYS_RESET02 0x3002 35 #define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006 36 #define OV5640_REG_SYS_CTRL0 0x3008 37 #define OV5640_REG_SYS_CTRL0_SW_PWDN 0x42 38 #define OV5640_REG_SYS_CTRL0_SW_PWUP 0x02 39 #define OV5640_REG_CHIP_ID 0x300a 40 #define OV5640_REG_IO_MIPI_CTRL00 0x300e 41 #define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017 42 #define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018 43 #define OV5640_REG_PAD_OUTPUT00 0x3019 44 #define OV5640_REG_SYSTEM_CONTROL1 0x302e 45 #define OV5640_REG_SC_PLL_CTRL0 0x3034 46 #define OV5640_REG_SC_PLL_CTRL1 0x3035 47 #define OV5640_REG_SC_PLL_CTRL2 0x3036 48 #define OV5640_REG_SC_PLL_CTRL3 0x3037 49 #define OV5640_REG_SLAVE_ID 0x3100 50 #define OV5640_REG_SCCB_SYS_CTRL1 0x3103 51 #define OV5640_REG_SYS_ROOT_DIVIDER 0x3108 52 #define OV5640_REG_AWB_R_GAIN 0x3400 53 #define OV5640_REG_AWB_G_GAIN 0x3402 54 #define OV5640_REG_AWB_B_GAIN 0x3404 55 #define OV5640_REG_AWB_MANUAL_CTRL 0x3406 56 #define OV5640_REG_AEC_PK_EXPOSURE_HI 0x3500 57 #define OV5640_REG_AEC_PK_EXPOSURE_MED 0x3501 58 #define OV5640_REG_AEC_PK_EXPOSURE_LO 0x3502 59 #define OV5640_REG_AEC_PK_MANUAL 0x3503 60 #define OV5640_REG_AEC_PK_REAL_GAIN 0x350a 61 #define OV5640_REG_AEC_PK_VTS 0x350c 62 #define OV5640_REG_TIMING_DVPHO 0x3808 63 #define OV5640_REG_TIMING_DVPVO 0x380a 64 #define OV5640_REG_TIMING_HTS 0x380c 65 #define OV5640_REG_TIMING_VTS 0x380e 66 #define OV5640_REG_TIMING_TC_REG20 0x3820 67 #define OV5640_REG_TIMING_TC_REG21 0x3821 68 #define OV5640_REG_AEC_CTRL00 0x3a00 69 #define OV5640_REG_AEC_B50_STEP 0x3a08 70 #define OV5640_REG_AEC_B60_STEP 0x3a0a 71 #define OV5640_REG_AEC_CTRL0D 0x3a0d 72 #define OV5640_REG_AEC_CTRL0E 0x3a0e 73 #define OV5640_REG_AEC_CTRL0F 0x3a0f 74 #define OV5640_REG_AEC_CTRL10 0x3a10 75 #define OV5640_REG_AEC_CTRL11 0x3a11 76 #define OV5640_REG_AEC_CTRL1B 0x3a1b 77 #define OV5640_REG_AEC_CTRL1E 0x3a1e 78 #define OV5640_REG_AEC_CTRL1F 0x3a1f 79 #define OV5640_REG_HZ5060_CTRL00 0x3c00 80 #define OV5640_REG_HZ5060_CTRL01 0x3c01 81 #define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c 82 #define OV5640_REG_FRAME_CTRL01 0x4202 83 #define OV5640_REG_FORMAT_CONTROL00 0x4300 84 #define OV5640_REG_VFIFO_HSIZE 0x4602 85 #define OV5640_REG_VFIFO_VSIZE 0x4604 86 #define OV5640_REG_JPG_MODE_SELECT 0x4713 87 #define OV5640_REG_CCIR656_CTRL00 0x4730 88 #define OV5640_REG_POLARITY_CTRL00 0x4740 89 #define OV5640_REG_MIPI_CTRL00 0x4800 90 #define OV5640_REG_DEBUG_MODE 0x4814 91 #define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f 92 #define OV5640_REG_PRE_ISP_TEST_SET1 0x503d 93 #define OV5640_REG_SDE_CTRL0 0x5580 94 #define OV5640_REG_SDE_CTRL1 0x5581 95 #define OV5640_REG_SDE_CTRL3 0x5583 96 #define OV5640_REG_SDE_CTRL4 0x5584 97 #define OV5640_REG_SDE_CTRL5 0x5585 98 #define OV5640_REG_AVG_READOUT 0x56a1 99 100 enum ov5640_mode_id { 101 OV5640_MODE_QQVGA_160_120 = 0, 102 OV5640_MODE_QCIF_176_144, 103 OV5640_MODE_QVGA_320_240, 104 OV5640_MODE_VGA_640_480, 105 OV5640_MODE_NTSC_720_480, 106 OV5640_MODE_PAL_720_576, 107 OV5640_MODE_XGA_1024_768, 108 OV5640_MODE_720P_1280_720, 109 OV5640_MODE_1080P_1920_1080, 110 OV5640_MODE_QSXGA_2592_1944, 111 OV5640_NUM_MODES, 112 }; 113 114 enum ov5640_frame_rate { 115 OV5640_15_FPS = 0, 116 OV5640_30_FPS, 117 OV5640_60_FPS, 118 OV5640_NUM_FRAMERATES, 119 }; 120 121 enum ov5640_format_mux { 122 OV5640_FMT_MUX_YUV422 = 0, 123 OV5640_FMT_MUX_RGB, 124 OV5640_FMT_MUX_DITHER, 125 OV5640_FMT_MUX_RAW_DPC, 126 OV5640_FMT_MUX_SNR_RAW, 127 OV5640_FMT_MUX_RAW_CIP, 128 }; 129 130 struct ov5640_pixfmt { 131 u32 code; 132 u32 colorspace; 133 }; 134 135 static const struct ov5640_pixfmt ov5640_formats[] = { 136 { MEDIA_BUS_FMT_JPEG_1X8, V4L2_COLORSPACE_JPEG, }, 137 { MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB, }, 138 { MEDIA_BUS_FMT_UYVY8_1X16, V4L2_COLORSPACE_SRGB, }, 139 { MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB, }, 140 { MEDIA_BUS_FMT_YUYV8_1X16, V4L2_COLORSPACE_SRGB, }, 141 { MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB, }, 142 { MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB, }, 143 { MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB, }, 144 { MEDIA_BUS_FMT_SGBRG8_1X8, V4L2_COLORSPACE_SRGB, }, 145 { MEDIA_BUS_FMT_SGRBG8_1X8, V4L2_COLORSPACE_SRGB, }, 146 { MEDIA_BUS_FMT_SRGGB8_1X8, V4L2_COLORSPACE_SRGB, }, 147 }; 148 149 /* 150 * FIXME: remove this when a subdev API becomes available 151 * to set the MIPI CSI-2 virtual channel. 152 */ 153 static unsigned int virtual_channel; 154 module_param(virtual_channel, uint, 0444); 155 MODULE_PARM_DESC(virtual_channel, 156 "MIPI CSI-2 virtual channel (0..3), default 0"); 157 158 static const int ov5640_framerates[] = { 159 [OV5640_15_FPS] = 15, 160 [OV5640_30_FPS] = 30, 161 [OV5640_60_FPS] = 60, 162 }; 163 164 /* regulator supplies */ 165 static const char * const ov5640_supply_name[] = { 166 "DOVDD", /* Digital I/O (1.8V) supply */ 167 "AVDD", /* Analog (2.8V) supply */ 168 "DVDD", /* Digital Core (1.5V) supply */ 169 }; 170 171 #define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name) 172 173 /* 174 * Image size under 1280 * 960 are SUBSAMPLING 175 * Image size upper 1280 * 960 are SCALING 176 */ 177 enum ov5640_downsize_mode { 178 SUBSAMPLING, 179 SCALING, 180 }; 181 182 struct reg_value { 183 u16 reg_addr; 184 u8 val; 185 u8 mask; 186 u32 delay_ms; 187 }; 188 189 struct ov5640_mode_info { 190 enum ov5640_mode_id id; 191 enum ov5640_downsize_mode dn_mode; 192 u32 hact; 193 u32 htot; 194 u32 vact; 195 u32 vtot; 196 const struct reg_value *reg_data; 197 u32 reg_data_size; 198 u32 max_fps; 199 }; 200 201 struct ov5640_ctrls { 202 struct v4l2_ctrl_handler handler; 203 struct v4l2_ctrl *pixel_rate; 204 struct { 205 struct v4l2_ctrl *auto_exp; 206 struct v4l2_ctrl *exposure; 207 }; 208 struct { 209 struct v4l2_ctrl *auto_wb; 210 struct v4l2_ctrl *blue_balance; 211 struct v4l2_ctrl *red_balance; 212 }; 213 struct { 214 struct v4l2_ctrl *auto_gain; 215 struct v4l2_ctrl *gain; 216 }; 217 struct v4l2_ctrl *brightness; 218 struct v4l2_ctrl *light_freq; 219 struct v4l2_ctrl *saturation; 220 struct v4l2_ctrl *contrast; 221 struct v4l2_ctrl *hue; 222 struct v4l2_ctrl *test_pattern; 223 struct v4l2_ctrl *hflip; 224 struct v4l2_ctrl *vflip; 225 }; 226 227 struct ov5640_dev { 228 struct i2c_client *i2c_client; 229 struct v4l2_subdev sd; 230 struct media_pad pad; 231 struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */ 232 struct clk *xclk; /* system clock to OV5640 */ 233 u32 xclk_freq; 234 235 struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES]; 236 struct gpio_desc *reset_gpio; 237 struct gpio_desc *pwdn_gpio; 238 bool upside_down; 239 240 /* lock to protect all members below */ 241 struct mutex lock; 242 243 int power_count; 244 245 struct v4l2_mbus_framefmt fmt; 246 bool pending_fmt_change; 247 248 const struct ov5640_mode_info *current_mode; 249 const struct ov5640_mode_info *last_mode; 250 enum ov5640_frame_rate current_fr; 251 struct v4l2_fract frame_interval; 252 253 struct ov5640_ctrls ctrls; 254 255 u32 prev_sysclk, prev_hts; 256 u32 ae_low, ae_high, ae_target; 257 258 bool pending_mode_change; 259 bool streaming; 260 }; 261 262 static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd) 263 { 264 return container_of(sd, struct ov5640_dev, sd); 265 } 266 267 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl) 268 { 269 return &container_of(ctrl->handler, struct ov5640_dev, 270 ctrls.handler)->sd; 271 } 272 273 /* 274 * FIXME: all of these register tables are likely filled with 275 * entries that set the register to their power-on default values, 276 * and which are otherwise not touched by this driver. Those entries 277 * should be identified and removed to speed register load time 278 * over i2c. 279 */ 280 /* YUV422 UYVY VGA@30fps */ 281 static const struct reg_value ov5640_init_setting_30fps_VGA[] = { 282 {0x3103, 0x11, 0, 0}, {0x3008, 0x82, 0, 5}, {0x3008, 0x42, 0, 0}, 283 {0x3103, 0x03, 0, 0}, {0x3630, 0x36, 0, 0}, 284 {0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0}, 285 {0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0}, 286 {0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0}, 287 {0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0}, 288 {0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0}, 289 {0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0}, 290 {0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0}, 291 {0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0}, 292 {0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0}, 293 {0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0}, 294 {0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0}, 295 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 296 {0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0}, 297 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 298 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 299 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 300 {0x3810, 0x00, 0, 0}, 301 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, 302 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 303 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 304 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 305 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 306 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 307 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0}, 308 {0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0}, 309 {0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0}, 310 {0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0}, 311 {0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 312 {0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0}, 313 {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0}, 314 {0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0}, 315 {0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0}, 316 {0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0}, 317 {0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0}, 318 {0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0}, 319 {0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0}, 320 {0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0}, 321 {0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0}, 322 {0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0}, 323 {0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0}, 324 {0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0}, 325 {0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0}, 326 {0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0}, 327 {0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0}, 328 {0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0}, 329 {0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0}, 330 {0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0}, 331 {0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0}, 332 {0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0}, 333 {0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0}, 334 {0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0}, 335 {0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0}, 336 {0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0}, 337 {0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0}, 338 {0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0}, 339 {0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0}, 340 {0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0}, 341 {0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0}, 342 {0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0}, 343 {0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0}, 344 {0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0}, 345 {0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0}, 346 {0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0}, 347 {0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0}, 348 {0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0}, 349 {0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0}, 350 {0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0}, 351 {0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0}, 352 {0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0}, 353 {0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0}, 354 {0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0}, 355 {0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0}, 356 {0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0}, 357 {0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0}, 358 {0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0}, 359 {0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0}, 360 {0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0}, 361 {0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0}, 362 {0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300}, 363 }; 364 365 static const struct reg_value ov5640_setting_VGA_640_480[] = { 366 {0x3c07, 0x08, 0, 0}, 367 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 368 {0x3814, 0x31, 0, 0}, 369 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 370 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 371 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 372 {0x3810, 0x00, 0, 0}, 373 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, 374 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 375 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 376 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 377 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 378 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 379 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 380 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 381 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, 382 }; 383 384 static const struct reg_value ov5640_setting_XGA_1024_768[] = { 385 {0x3c07, 0x08, 0, 0}, 386 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 387 {0x3814, 0x31, 0, 0}, 388 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 389 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 390 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 391 {0x3810, 0x00, 0, 0}, 392 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, 393 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 394 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 395 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 396 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 397 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 398 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 399 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 400 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, 401 }; 402 403 static const struct reg_value ov5640_setting_QVGA_320_240[] = { 404 {0x3c07, 0x08, 0, 0}, 405 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 406 {0x3814, 0x31, 0, 0}, 407 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 408 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 409 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 410 {0x3810, 0x00, 0, 0}, 411 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, 412 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 413 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 414 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 415 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 416 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 417 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 418 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 419 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, 420 }; 421 422 static const struct reg_value ov5640_setting_QQVGA_160_120[] = { 423 {0x3c07, 0x08, 0, 0}, 424 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 425 {0x3814, 0x31, 0, 0}, 426 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 427 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 428 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 429 {0x3810, 0x00, 0, 0}, 430 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, 431 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 432 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 433 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 434 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 435 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 436 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 437 {0x4407, 0x04, 0, 0}, {0x5001, 0xa3, 0, 0}, 438 }; 439 440 static const struct reg_value ov5640_setting_QCIF_176_144[] = { 441 {0x3c07, 0x08, 0, 0}, 442 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 443 {0x3814, 0x31, 0, 0}, 444 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 445 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 446 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 447 {0x3810, 0x00, 0, 0}, 448 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, 449 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 450 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 451 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 452 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 453 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 454 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 455 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 456 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, 457 }; 458 459 static const struct reg_value ov5640_setting_NTSC_720_480[] = { 460 {0x3c07, 0x08, 0, 0}, 461 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 462 {0x3814, 0x31, 0, 0}, 463 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 464 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 465 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 466 {0x3810, 0x00, 0, 0}, 467 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x3c, 0, 0}, 468 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 469 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 470 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 471 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 472 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 473 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 474 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 475 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, 476 }; 477 478 static const struct reg_value ov5640_setting_PAL_720_576[] = { 479 {0x3c07, 0x08, 0, 0}, 480 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 481 {0x3814, 0x31, 0, 0}, 482 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 483 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 484 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 485 {0x3810, 0x00, 0, 0}, 486 {0x3811, 0x38, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, 487 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 488 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 489 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 490 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 491 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 492 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 493 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 494 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, 495 }; 496 497 static const struct reg_value ov5640_setting_720P_1280_720[] = { 498 {0x3c07, 0x07, 0, 0}, 499 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 500 {0x3814, 0x31, 0, 0}, 501 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 502 {0x3802, 0x00, 0, 0}, {0x3803, 0xfa, 0, 0}, {0x3804, 0x0a, 0, 0}, 503 {0x3805, 0x3f, 0, 0}, {0x3806, 0x06, 0, 0}, {0x3807, 0xa9, 0, 0}, 504 {0x3810, 0x00, 0, 0}, 505 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0}, 506 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 507 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0}, 508 {0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0}, 509 {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0}, 510 {0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0}, 511 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 512 {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, 513 {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0}, 514 }; 515 516 static const struct reg_value ov5640_setting_1080P_1920_1080[] = { 517 {0x3c07, 0x08, 0, 0}, 518 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 519 {0x3814, 0x11, 0, 0}, 520 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 521 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0}, 522 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0}, 523 {0x3810, 0x00, 0, 0}, 524 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0}, 525 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0}, 526 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0}, 527 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 528 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 529 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 530 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, 531 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 532 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0}, 533 {0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0}, 534 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 535 {0x3800, 0x01, 0, 0}, {0x3801, 0x50, 0, 0}, {0x3802, 0x01, 0, 0}, 536 {0x3803, 0xb2, 0, 0}, {0x3804, 0x08, 0, 0}, {0x3805, 0xef, 0, 0}, 537 {0x3806, 0x05, 0, 0}, {0x3807, 0xf1, 0, 0}, 538 {0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0}, 539 {0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0}, 540 {0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0}, 541 {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0}, 542 {0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0}, 543 {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0}, 544 {0x4005, 0x1a, 0, 0}, 545 }; 546 547 static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = { 548 {0x3c07, 0x08, 0, 0}, 549 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 550 {0x3814, 0x11, 0, 0}, 551 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 552 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0}, 553 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0}, 554 {0x3810, 0x00, 0, 0}, 555 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0}, 556 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0}, 557 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0}, 558 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 559 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 560 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 561 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, 562 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 563 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70}, 564 }; 565 566 /* power-on sensor init reg table */ 567 static const struct ov5640_mode_info ov5640_mode_init_data = { 568 0, SUBSAMPLING, 640, 1896, 480, 984, 569 ov5640_init_setting_30fps_VGA, 570 ARRAY_SIZE(ov5640_init_setting_30fps_VGA), 571 OV5640_30_FPS, 572 }; 573 574 static const struct ov5640_mode_info 575 ov5640_mode_data[OV5640_NUM_MODES] = { 576 {OV5640_MODE_QQVGA_160_120, SUBSAMPLING, 577 160, 1896, 120, 984, 578 ov5640_setting_QQVGA_160_120, 579 ARRAY_SIZE(ov5640_setting_QQVGA_160_120), 580 OV5640_30_FPS}, 581 {OV5640_MODE_QCIF_176_144, SUBSAMPLING, 582 176, 1896, 144, 984, 583 ov5640_setting_QCIF_176_144, 584 ARRAY_SIZE(ov5640_setting_QCIF_176_144), 585 OV5640_30_FPS}, 586 {OV5640_MODE_QVGA_320_240, SUBSAMPLING, 587 320, 1896, 240, 984, 588 ov5640_setting_QVGA_320_240, 589 ARRAY_SIZE(ov5640_setting_QVGA_320_240), 590 OV5640_30_FPS}, 591 {OV5640_MODE_VGA_640_480, SUBSAMPLING, 592 640, 1896, 480, 1080, 593 ov5640_setting_VGA_640_480, 594 ARRAY_SIZE(ov5640_setting_VGA_640_480), 595 OV5640_60_FPS}, 596 {OV5640_MODE_NTSC_720_480, SUBSAMPLING, 597 720, 1896, 480, 984, 598 ov5640_setting_NTSC_720_480, 599 ARRAY_SIZE(ov5640_setting_NTSC_720_480), 600 OV5640_30_FPS}, 601 {OV5640_MODE_PAL_720_576, SUBSAMPLING, 602 720, 1896, 576, 984, 603 ov5640_setting_PAL_720_576, 604 ARRAY_SIZE(ov5640_setting_PAL_720_576), 605 OV5640_30_FPS}, 606 {OV5640_MODE_XGA_1024_768, SUBSAMPLING, 607 1024, 1896, 768, 1080, 608 ov5640_setting_XGA_1024_768, 609 ARRAY_SIZE(ov5640_setting_XGA_1024_768), 610 OV5640_30_FPS}, 611 {OV5640_MODE_720P_1280_720, SUBSAMPLING, 612 1280, 1892, 720, 740, 613 ov5640_setting_720P_1280_720, 614 ARRAY_SIZE(ov5640_setting_720P_1280_720), 615 OV5640_30_FPS}, 616 {OV5640_MODE_1080P_1920_1080, SCALING, 617 1920, 2500, 1080, 1120, 618 ov5640_setting_1080P_1920_1080, 619 ARRAY_SIZE(ov5640_setting_1080P_1920_1080), 620 OV5640_30_FPS}, 621 {OV5640_MODE_QSXGA_2592_1944, SCALING, 622 2592, 2844, 1944, 1968, 623 ov5640_setting_QSXGA_2592_1944, 624 ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944), 625 OV5640_15_FPS}, 626 }; 627 628 static int ov5640_init_slave_id(struct ov5640_dev *sensor) 629 { 630 struct i2c_client *client = sensor->i2c_client; 631 struct i2c_msg msg; 632 u8 buf[3]; 633 int ret; 634 635 if (client->addr == OV5640_DEFAULT_SLAVE_ID) 636 return 0; 637 638 buf[0] = OV5640_REG_SLAVE_ID >> 8; 639 buf[1] = OV5640_REG_SLAVE_ID & 0xff; 640 buf[2] = client->addr << 1; 641 642 msg.addr = OV5640_DEFAULT_SLAVE_ID; 643 msg.flags = 0; 644 msg.buf = buf; 645 msg.len = sizeof(buf); 646 647 ret = i2c_transfer(client->adapter, &msg, 1); 648 if (ret < 0) { 649 dev_err(&client->dev, "%s: failed with %d\n", __func__, ret); 650 return ret; 651 } 652 653 return 0; 654 } 655 656 static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val) 657 { 658 struct i2c_client *client = sensor->i2c_client; 659 struct i2c_msg msg; 660 u8 buf[3]; 661 int ret; 662 663 buf[0] = reg >> 8; 664 buf[1] = reg & 0xff; 665 buf[2] = val; 666 667 msg.addr = client->addr; 668 msg.flags = client->flags; 669 msg.buf = buf; 670 msg.len = sizeof(buf); 671 672 ret = i2c_transfer(client->adapter, &msg, 1); 673 if (ret < 0) { 674 dev_err(&client->dev, "%s: error: reg=%x, val=%x\n", 675 __func__, reg, val); 676 return ret; 677 } 678 679 return 0; 680 } 681 682 static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val) 683 { 684 struct i2c_client *client = sensor->i2c_client; 685 struct i2c_msg msg[2]; 686 u8 buf[2]; 687 int ret; 688 689 buf[0] = reg >> 8; 690 buf[1] = reg & 0xff; 691 692 msg[0].addr = client->addr; 693 msg[0].flags = client->flags; 694 msg[0].buf = buf; 695 msg[0].len = sizeof(buf); 696 697 msg[1].addr = client->addr; 698 msg[1].flags = client->flags | I2C_M_RD; 699 msg[1].buf = buf; 700 msg[1].len = 1; 701 702 ret = i2c_transfer(client->adapter, msg, 2); 703 if (ret < 0) { 704 dev_err(&client->dev, "%s: error: reg=%x\n", 705 __func__, reg); 706 return ret; 707 } 708 709 *val = buf[0]; 710 return 0; 711 } 712 713 static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val) 714 { 715 u8 hi, lo; 716 int ret; 717 718 ret = ov5640_read_reg(sensor, reg, &hi); 719 if (ret) 720 return ret; 721 ret = ov5640_read_reg(sensor, reg + 1, &lo); 722 if (ret) 723 return ret; 724 725 *val = ((u16)hi << 8) | (u16)lo; 726 return 0; 727 } 728 729 static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val) 730 { 731 int ret; 732 733 ret = ov5640_write_reg(sensor, reg, val >> 8); 734 if (ret) 735 return ret; 736 737 return ov5640_write_reg(sensor, reg + 1, val & 0xff); 738 } 739 740 static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg, 741 u8 mask, u8 val) 742 { 743 u8 readval; 744 int ret; 745 746 ret = ov5640_read_reg(sensor, reg, &readval); 747 if (ret) 748 return ret; 749 750 readval &= ~mask; 751 val &= mask; 752 val |= readval; 753 754 return ov5640_write_reg(sensor, reg, val); 755 } 756 757 /* 758 * After trying the various combinations, reading various 759 * documentations spread around the net, and from the various 760 * feedback, the clock tree is probably as follows: 761 * 762 * +--------------+ 763 * | Ext. Clock | 764 * +-+------------+ 765 * | +----------+ 766 * +->| PLL1 | - reg 0x3036, for the multiplier 767 * +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider 768 * | +--------------+ 769 * +->| System Clock | - reg 0x3035, bits 4-7 770 * +-+------------+ 771 * | +--------------+ 772 * +->| MIPI Divider | - reg 0x3035, bits 0-3 773 * | +-+------------+ 774 * | +----------------> MIPI SCLK 775 * | + +-----+ 776 * | +->| / 2 |-------> MIPI BIT CLK 777 * | +-----+ 778 * | +--------------+ 779 * +->| PLL Root Div | - reg 0x3037, bit 4 780 * +-+------------+ 781 * | +---------+ 782 * +->| Bit Div | - reg 0x3034, bits 0-3 783 * +-+-------+ 784 * | +-------------+ 785 * +->| SCLK Div | - reg 0x3108, bits 0-1 786 * | +-+-----------+ 787 * | +---------------> SCLK 788 * | +-------------+ 789 * +->| SCLK 2X Div | - reg 0x3108, bits 2-3 790 * | +-+-----------+ 791 * | +---------------> SCLK 2X 792 * | +-------------+ 793 * +->| PCLK Div | - reg 0x3108, bits 4-5 794 * ++------------+ 795 * + +-----------+ 796 * +->| P_DIV | - reg 0x3035, bits 0-3 797 * +-----+-----+ 798 * +------------> PCLK 799 * 800 * This is deviating from the datasheet at least for the register 801 * 0x3108, since it's said here that the PCLK would be clocked from 802 * the PLL. 803 * 804 * There seems to be also (unverified) constraints: 805 * - the PLL pre-divider output rate should be in the 4-27MHz range 806 * - the PLL multiplier output rate should be in the 500-1000MHz range 807 * - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG 808 * 809 * In the two latter cases, these constraints are met since our 810 * factors are hardcoded. If we were to change that, we would need to 811 * take this into account. The only varying parts are the PLL 812 * multiplier and the system clock divider, which are shared between 813 * all these clocks so won't cause any issue. 814 */ 815 816 /* 817 * This is supposed to be ranging from 1 to 8, but the value is always 818 * set to 3 in the vendor kernels. 819 */ 820 #define OV5640_PLL_PREDIV 3 821 822 #define OV5640_PLL_MULT_MIN 4 823 #define OV5640_PLL_MULT_MAX 252 824 825 /* 826 * This is supposed to be ranging from 1 to 16, but the value is 827 * always set to either 1 or 2 in the vendor kernels. 828 */ 829 #define OV5640_SYSDIV_MIN 1 830 #define OV5640_SYSDIV_MAX 16 831 832 /* 833 * Hardcode these values for scaler and non-scaler modes. 834 * FIXME: to be re-calcualted for 1 data lanes setups 835 */ 836 #define OV5640_MIPI_DIV_PCLK 2 837 #define OV5640_MIPI_DIV_SCLK 1 838 839 /* 840 * This is supposed to be ranging from 1 to 2, but the value is always 841 * set to 2 in the vendor kernels. 842 */ 843 #define OV5640_PLL_ROOT_DIV 2 844 #define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 BIT(4) 845 846 /* 847 * We only supports 8-bit formats at the moment 848 */ 849 #define OV5640_BIT_DIV 2 850 #define OV5640_PLL_CTRL0_MIPI_MODE_8BIT 0x08 851 852 /* 853 * This is supposed to be ranging from 1 to 8, but the value is always 854 * set to 2 in the vendor kernels. 855 */ 856 #define OV5640_SCLK_ROOT_DIV 2 857 858 /* 859 * This is hardcoded so that the consistency is maintained between SCLK and 860 * SCLK 2x. 861 */ 862 #define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2) 863 864 /* 865 * This is supposed to be ranging from 1 to 8, but the value is always 866 * set to 1 in the vendor kernels. 867 */ 868 #define OV5640_PCLK_ROOT_DIV 1 869 #define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00 870 871 static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor, 872 u8 pll_prediv, u8 pll_mult, 873 u8 sysdiv) 874 { 875 unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult; 876 877 /* PLL1 output cannot exceed 1GHz. */ 878 if (sysclk / 1000000 > 1000) 879 return 0; 880 881 return sysclk / sysdiv; 882 } 883 884 static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor, 885 unsigned long rate, 886 u8 *pll_prediv, u8 *pll_mult, 887 u8 *sysdiv) 888 { 889 unsigned long best = ~0; 890 u8 best_sysdiv = 1, best_mult = 1; 891 u8 _sysdiv, _pll_mult; 892 893 for (_sysdiv = OV5640_SYSDIV_MIN; 894 _sysdiv <= OV5640_SYSDIV_MAX; 895 _sysdiv++) { 896 for (_pll_mult = OV5640_PLL_MULT_MIN; 897 _pll_mult <= OV5640_PLL_MULT_MAX; 898 _pll_mult++) { 899 unsigned long _rate; 900 901 /* 902 * The PLL multiplier cannot be odd if above 903 * 127. 904 */ 905 if (_pll_mult > 127 && (_pll_mult % 2)) 906 continue; 907 908 _rate = ov5640_compute_sys_clk(sensor, 909 OV5640_PLL_PREDIV, 910 _pll_mult, _sysdiv); 911 912 /* 913 * We have reached the maximum allowed PLL1 output, 914 * increase sysdiv. 915 */ 916 if (!_rate) 917 break; 918 919 /* 920 * Prefer rates above the expected clock rate than 921 * below, even if that means being less precise. 922 */ 923 if (_rate < rate) 924 continue; 925 926 if (abs(rate - _rate) < abs(rate - best)) { 927 best = _rate; 928 best_sysdiv = _sysdiv; 929 best_mult = _pll_mult; 930 } 931 932 if (_rate == rate) 933 goto out; 934 } 935 } 936 937 out: 938 *sysdiv = best_sysdiv; 939 *pll_prediv = OV5640_PLL_PREDIV; 940 *pll_mult = best_mult; 941 942 return best; 943 } 944 945 /* 946 * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values 947 * for the MIPI CSI-2 output. 948 * 949 * @rate: The requested bandwidth per lane in bytes per second. 950 * 'Bandwidth Per Lane' is calculated as: 951 * bpl = HTOT * VTOT * FPS * bpp / num_lanes; 952 * 953 * This function use the requested bandwidth to calculate: 954 * - sample_rate = bpl / (bpp / num_lanes); 955 * = bpl / (PLL_RDIV * BIT_DIV * PCLK_DIV * MIPI_DIV / num_lanes); 956 * 957 * - mipi_sclk = bpl / MIPI_DIV / 2; ( / 2 is for CSI-2 DDR) 958 * 959 * with these fixed parameters: 960 * PLL_RDIV = 2; 961 * BIT_DIVIDER = 2; (MIPI_BIT_MODE == 8 ? 2 : 2,5); 962 * PCLK_DIV = 1; 963 * 964 * The MIPI clock generation differs for modes that use the scaler and modes 965 * that do not. In case the scaler is in use, the MIPI_SCLK generates the MIPI 966 * BIT CLk, and thus: 967 * 968 * - mipi_sclk = bpl / MIPI_DIV / 2; 969 * MIPI_DIV = 1; 970 * 971 * For modes that do not go through the scaler, the MIPI BIT CLOCK is generated 972 * from the pixel clock, and thus: 973 * 974 * - sample_rate = bpl / (bpp / num_lanes); 975 * = bpl / (2 * 2 * 1 * MIPI_DIV / num_lanes); 976 * = bpl / (4 * MIPI_DIV / num_lanes); 977 * - MIPI_DIV = bpp / (4 * num_lanes); 978 * 979 * FIXME: this have been tested with 16bpp and 2 lanes setup only. 980 * MIPI_DIV is fixed to value 2, but it -might- be changed according to the 981 * above formula for setups with 1 lane or image formats with different bpp. 982 * 983 * FIXME: this deviates from the sensor manual documentation which is quite 984 * thin on the MIPI clock tree generation part. 985 */ 986 static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor, 987 unsigned long rate) 988 { 989 const struct ov5640_mode_info *mode = sensor->current_mode; 990 u8 prediv, mult, sysdiv; 991 u8 mipi_div; 992 int ret; 993 994 /* 995 * 1280x720 is reported to use 'SUBSAMPLING' only, 996 * but according to the sensor manual it goes through the 997 * scaler before subsampling. 998 */ 999 if (mode->dn_mode == SCALING || 1000 (mode->id == OV5640_MODE_720P_1280_720)) 1001 mipi_div = OV5640_MIPI_DIV_SCLK; 1002 else 1003 mipi_div = OV5640_MIPI_DIV_PCLK; 1004 1005 ov5640_calc_sys_clk(sensor, rate, &prediv, &mult, &sysdiv); 1006 1007 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0, 1008 0x0f, OV5640_PLL_CTRL0_MIPI_MODE_8BIT); 1009 1010 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1, 1011 0xff, sysdiv << 4 | mipi_div); 1012 if (ret) 1013 return ret; 1014 1015 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult); 1016 if (ret) 1017 return ret; 1018 1019 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3, 1020 0x1f, OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 | prediv); 1021 if (ret) 1022 return ret; 1023 1024 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 1025 0x30, OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS); 1026 } 1027 1028 static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor, 1029 unsigned long rate, 1030 u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv, 1031 u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div) 1032 { 1033 unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV * 1034 OV5640_PCLK_ROOT_DIV; 1035 1036 _rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult, 1037 sysdiv); 1038 *pll_rdiv = OV5640_PLL_ROOT_DIV; 1039 *bit_div = OV5640_BIT_DIV; 1040 *pclk_div = OV5640_PCLK_ROOT_DIV; 1041 1042 return _rate / *pll_rdiv / *bit_div / *pclk_div; 1043 } 1044 1045 static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor, unsigned long rate) 1046 { 1047 u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div; 1048 int ret; 1049 1050 ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv, 1051 &bit_div, &pclk_div); 1052 1053 if (bit_div == 2) 1054 bit_div = 8; 1055 1056 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0, 1057 0x0f, bit_div); 1058 if (ret) 1059 return ret; 1060 1061 /* 1062 * We need to set sysdiv according to the clock, and to clear 1063 * the MIPI divider. 1064 */ 1065 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1, 1066 0xff, sysdiv << 4); 1067 if (ret) 1068 return ret; 1069 1070 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 1071 0xff, mult); 1072 if (ret) 1073 return ret; 1074 1075 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3, 1076 0x1f, prediv | ((pll_rdiv - 1) << 4)); 1077 if (ret) 1078 return ret; 1079 1080 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30, 1081 (ilog2(pclk_div) << 4)); 1082 } 1083 1084 /* set JPEG framing sizes */ 1085 static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor, 1086 const struct ov5640_mode_info *mode) 1087 { 1088 int ret; 1089 1090 /* 1091 * compression mode 3 timing 1092 * 1093 * Data is transmitted with programmable width (VFIFO_HSIZE). 1094 * No padding done. Last line may have less data. Varying 1095 * number of lines per frame, depending on amount of data. 1096 */ 1097 ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3); 1098 if (ret < 0) 1099 return ret; 1100 1101 ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->hact); 1102 if (ret < 0) 1103 return ret; 1104 1105 return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->vact); 1106 } 1107 1108 /* download ov5640 settings to sensor through i2c */ 1109 static int ov5640_set_timings(struct ov5640_dev *sensor, 1110 const struct ov5640_mode_info *mode) 1111 { 1112 int ret; 1113 1114 if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) { 1115 ret = ov5640_set_jpeg_timings(sensor, mode); 1116 if (ret < 0) 1117 return ret; 1118 } 1119 1120 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->hact); 1121 if (ret < 0) 1122 return ret; 1123 1124 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->vact); 1125 if (ret < 0) 1126 return ret; 1127 1128 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, mode->htot); 1129 if (ret < 0) 1130 return ret; 1131 1132 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, mode->vtot); 1133 } 1134 1135 static int ov5640_load_regs(struct ov5640_dev *sensor, 1136 const struct ov5640_mode_info *mode) 1137 { 1138 const struct reg_value *regs = mode->reg_data; 1139 unsigned int i; 1140 u32 delay_ms; 1141 u16 reg_addr; 1142 u8 mask, val; 1143 int ret = 0; 1144 1145 for (i = 0; i < mode->reg_data_size; ++i, ++regs) { 1146 delay_ms = regs->delay_ms; 1147 reg_addr = regs->reg_addr; 1148 val = regs->val; 1149 mask = regs->mask; 1150 1151 /* remain in power down mode for DVP */ 1152 if (regs->reg_addr == OV5640_REG_SYS_CTRL0 && 1153 val == OV5640_REG_SYS_CTRL0_SW_PWUP && 1154 sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY) 1155 continue; 1156 1157 if (mask) 1158 ret = ov5640_mod_reg(sensor, reg_addr, mask, val); 1159 else 1160 ret = ov5640_write_reg(sensor, reg_addr, val); 1161 if (ret) 1162 break; 1163 1164 if (delay_ms) 1165 usleep_range(1000 * delay_ms, 1000 * delay_ms + 100); 1166 } 1167 1168 return ov5640_set_timings(sensor, mode); 1169 } 1170 1171 static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on) 1172 { 1173 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL, 1174 BIT(0), on ? 0 : BIT(0)); 1175 } 1176 1177 /* read exposure, in number of line periods */ 1178 static int ov5640_get_exposure(struct ov5640_dev *sensor) 1179 { 1180 int exp, ret; 1181 u8 temp; 1182 1183 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp); 1184 if (ret) 1185 return ret; 1186 exp = ((int)temp & 0x0f) << 16; 1187 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp); 1188 if (ret) 1189 return ret; 1190 exp |= ((int)temp << 8); 1191 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp); 1192 if (ret) 1193 return ret; 1194 exp |= (int)temp; 1195 1196 return exp >> 4; 1197 } 1198 1199 /* write exposure, given number of line periods */ 1200 static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure) 1201 { 1202 int ret; 1203 1204 exposure <<= 4; 1205 1206 ret = ov5640_write_reg(sensor, 1207 OV5640_REG_AEC_PK_EXPOSURE_LO, 1208 exposure & 0xff); 1209 if (ret) 1210 return ret; 1211 ret = ov5640_write_reg(sensor, 1212 OV5640_REG_AEC_PK_EXPOSURE_MED, 1213 (exposure >> 8) & 0xff); 1214 if (ret) 1215 return ret; 1216 return ov5640_write_reg(sensor, 1217 OV5640_REG_AEC_PK_EXPOSURE_HI, 1218 (exposure >> 16) & 0x0f); 1219 } 1220 1221 static int ov5640_get_gain(struct ov5640_dev *sensor) 1222 { 1223 u16 gain; 1224 int ret; 1225 1226 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain); 1227 if (ret) 1228 return ret; 1229 1230 return gain & 0x3ff; 1231 } 1232 1233 static int ov5640_set_gain(struct ov5640_dev *sensor, int gain) 1234 { 1235 return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, 1236 (u16)gain & 0x3ff); 1237 } 1238 1239 static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on) 1240 { 1241 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL, 1242 BIT(1), on ? 0 : BIT(1)); 1243 } 1244 1245 static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on) 1246 { 1247 return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ? 1248 OV5640_REG_SYS_CTRL0_SW_PWUP : 1249 OV5640_REG_SYS_CTRL0_SW_PWDN); 1250 } 1251 1252 static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on) 1253 { 1254 int ret; 1255 1256 /* 1257 * Enable/disable the MIPI interface 1258 * 1259 * 0x300e = on ? 0x45 : 0x40 1260 * 1261 * FIXME: the sensor manual (version 2.03) reports 1262 * [7:5] = 000 : 1 data lane mode 1263 * [7:5] = 001 : 2 data lanes mode 1264 * But this settings do not work, while the following ones 1265 * have been validated for 2 data lanes mode. 1266 * 1267 * [7:5] = 010 : 2 data lanes mode 1268 * [4] = 0 : Power up MIPI HS Tx 1269 * [3] = 0 : Power up MIPI LS Rx 1270 * [2] = 1/0 : MIPI interface enable/disable 1271 * [1:0] = 01/00: FIXME: 'debug' 1272 */ 1273 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 1274 on ? 0x45 : 0x40); 1275 if (ret) 1276 return ret; 1277 1278 return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01, 1279 on ? 0x00 : 0x0f); 1280 } 1281 1282 static int ov5640_get_sysclk(struct ov5640_dev *sensor) 1283 { 1284 /* calculate sysclk */ 1285 u32 xvclk = sensor->xclk_freq / 10000; 1286 u32 multiplier, prediv, VCO, sysdiv, pll_rdiv; 1287 u32 sclk_rdiv_map[] = {1, 2, 4, 8}; 1288 u32 bit_div2x = 1, sclk_rdiv, sysclk; 1289 u8 temp1, temp2; 1290 int ret; 1291 1292 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1); 1293 if (ret) 1294 return ret; 1295 temp2 = temp1 & 0x0f; 1296 if (temp2 == 8 || temp2 == 10) 1297 bit_div2x = temp2 / 2; 1298 1299 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1); 1300 if (ret) 1301 return ret; 1302 sysdiv = temp1 >> 4; 1303 if (sysdiv == 0) 1304 sysdiv = 16; 1305 1306 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1); 1307 if (ret) 1308 return ret; 1309 multiplier = temp1; 1310 1311 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1); 1312 if (ret) 1313 return ret; 1314 prediv = temp1 & 0x0f; 1315 pll_rdiv = ((temp1 >> 4) & 0x01) + 1; 1316 1317 ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1); 1318 if (ret) 1319 return ret; 1320 temp2 = temp1 & 0x03; 1321 sclk_rdiv = sclk_rdiv_map[temp2]; 1322 1323 if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x) 1324 return -EINVAL; 1325 1326 VCO = xvclk * multiplier / prediv; 1327 1328 sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv; 1329 1330 return sysclk; 1331 } 1332 1333 static int ov5640_set_night_mode(struct ov5640_dev *sensor) 1334 { 1335 /* read HTS from register settings */ 1336 u8 mode; 1337 int ret; 1338 1339 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode); 1340 if (ret) 1341 return ret; 1342 mode &= 0xfb; 1343 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode); 1344 } 1345 1346 static int ov5640_get_hts(struct ov5640_dev *sensor) 1347 { 1348 /* read HTS from register settings */ 1349 u16 hts; 1350 int ret; 1351 1352 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts); 1353 if (ret) 1354 return ret; 1355 return hts; 1356 } 1357 1358 static int ov5640_get_vts(struct ov5640_dev *sensor) 1359 { 1360 u16 vts; 1361 int ret; 1362 1363 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts); 1364 if (ret) 1365 return ret; 1366 return vts; 1367 } 1368 1369 static int ov5640_set_vts(struct ov5640_dev *sensor, int vts) 1370 { 1371 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts); 1372 } 1373 1374 static int ov5640_get_light_freq(struct ov5640_dev *sensor) 1375 { 1376 /* get banding filter value */ 1377 int ret, light_freq = 0; 1378 u8 temp, temp1; 1379 1380 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp); 1381 if (ret) 1382 return ret; 1383 1384 if (temp & 0x80) { 1385 /* manual */ 1386 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00, 1387 &temp1); 1388 if (ret) 1389 return ret; 1390 if (temp1 & 0x04) { 1391 /* 50Hz */ 1392 light_freq = 50; 1393 } else { 1394 /* 60Hz */ 1395 light_freq = 60; 1396 } 1397 } else { 1398 /* auto */ 1399 ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C, 1400 &temp1); 1401 if (ret) 1402 return ret; 1403 1404 if (temp1 & 0x01) { 1405 /* 50Hz */ 1406 light_freq = 50; 1407 } else { 1408 /* 60Hz */ 1409 } 1410 } 1411 1412 return light_freq; 1413 } 1414 1415 static int ov5640_set_bandingfilter(struct ov5640_dev *sensor) 1416 { 1417 u32 band_step60, max_band60, band_step50, max_band50, prev_vts; 1418 int ret; 1419 1420 /* read preview PCLK */ 1421 ret = ov5640_get_sysclk(sensor); 1422 if (ret < 0) 1423 return ret; 1424 if (ret == 0) 1425 return -EINVAL; 1426 sensor->prev_sysclk = ret; 1427 /* read preview HTS */ 1428 ret = ov5640_get_hts(sensor); 1429 if (ret < 0) 1430 return ret; 1431 if (ret == 0) 1432 return -EINVAL; 1433 sensor->prev_hts = ret; 1434 1435 /* read preview VTS */ 1436 ret = ov5640_get_vts(sensor); 1437 if (ret < 0) 1438 return ret; 1439 prev_vts = ret; 1440 1441 /* calculate banding filter */ 1442 /* 60Hz */ 1443 band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120; 1444 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60); 1445 if (ret) 1446 return ret; 1447 if (!band_step60) 1448 return -EINVAL; 1449 max_band60 = (int)((prev_vts - 4) / band_step60); 1450 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60); 1451 if (ret) 1452 return ret; 1453 1454 /* 50Hz */ 1455 band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts; 1456 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50); 1457 if (ret) 1458 return ret; 1459 if (!band_step50) 1460 return -EINVAL; 1461 max_band50 = (int)((prev_vts - 4) / band_step50); 1462 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50); 1463 } 1464 1465 static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target) 1466 { 1467 /* stable in high */ 1468 u32 fast_high, fast_low; 1469 int ret; 1470 1471 sensor->ae_low = target * 23 / 25; /* 0.92 */ 1472 sensor->ae_high = target * 27 / 25; /* 1.08 */ 1473 1474 fast_high = sensor->ae_high << 1; 1475 if (fast_high > 255) 1476 fast_high = 255; 1477 1478 fast_low = sensor->ae_low >> 1; 1479 1480 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high); 1481 if (ret) 1482 return ret; 1483 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low); 1484 if (ret) 1485 return ret; 1486 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high); 1487 if (ret) 1488 return ret; 1489 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low); 1490 if (ret) 1491 return ret; 1492 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high); 1493 if (ret) 1494 return ret; 1495 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low); 1496 } 1497 1498 static int ov5640_get_binning(struct ov5640_dev *sensor) 1499 { 1500 u8 temp; 1501 int ret; 1502 1503 ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp); 1504 if (ret) 1505 return ret; 1506 1507 return temp & BIT(0); 1508 } 1509 1510 static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable) 1511 { 1512 int ret; 1513 1514 /* 1515 * TIMING TC REG21: 1516 * - [0]: Horizontal binning enable 1517 */ 1518 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21, 1519 BIT(0), enable ? BIT(0) : 0); 1520 if (ret) 1521 return ret; 1522 /* 1523 * TIMING TC REG20: 1524 * - [0]: Undocumented, but hardcoded init sequences 1525 * are always setting REG21/REG20 bit 0 to same value... 1526 */ 1527 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20, 1528 BIT(0), enable ? BIT(0) : 0); 1529 } 1530 1531 static int ov5640_set_virtual_channel(struct ov5640_dev *sensor) 1532 { 1533 struct i2c_client *client = sensor->i2c_client; 1534 u8 temp, channel = virtual_channel; 1535 int ret; 1536 1537 if (channel > 3) { 1538 dev_err(&client->dev, 1539 "%s: wrong virtual_channel parameter, expected (0..3), got %d\n", 1540 __func__, channel); 1541 return -EINVAL; 1542 } 1543 1544 ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp); 1545 if (ret) 1546 return ret; 1547 temp &= ~(3 << 6); 1548 temp |= (channel << 6); 1549 return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp); 1550 } 1551 1552 static const struct ov5640_mode_info * 1553 ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr, 1554 int width, int height, bool nearest) 1555 { 1556 const struct ov5640_mode_info *mode; 1557 1558 mode = v4l2_find_nearest_size(ov5640_mode_data, 1559 ARRAY_SIZE(ov5640_mode_data), 1560 hact, vact, 1561 width, height); 1562 1563 if (!mode || 1564 (!nearest && (mode->hact != width || mode->vact != height))) 1565 return NULL; 1566 1567 /* Check to see if the current mode exceeds the max frame rate */ 1568 if (ov5640_framerates[fr] > ov5640_framerates[mode->max_fps]) 1569 return NULL; 1570 1571 return mode; 1572 } 1573 1574 static u64 ov5640_calc_pixel_rate(struct ov5640_dev *sensor) 1575 { 1576 u64 rate; 1577 1578 rate = sensor->current_mode->vtot * sensor->current_mode->htot; 1579 rate *= ov5640_framerates[sensor->current_fr]; 1580 1581 return rate; 1582 } 1583 1584 /* 1585 * sensor changes between scaling and subsampling, go through 1586 * exposure calculation 1587 */ 1588 static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor, 1589 const struct ov5640_mode_info *mode) 1590 { 1591 u32 prev_shutter, prev_gain16; 1592 u32 cap_shutter, cap_gain16; 1593 u32 cap_sysclk, cap_hts, cap_vts; 1594 u32 light_freq, cap_bandfilt, cap_maxband; 1595 u32 cap_gain16_shutter; 1596 u8 average; 1597 int ret; 1598 1599 if (!mode->reg_data) 1600 return -EINVAL; 1601 1602 /* read preview shutter */ 1603 ret = ov5640_get_exposure(sensor); 1604 if (ret < 0) 1605 return ret; 1606 prev_shutter = ret; 1607 ret = ov5640_get_binning(sensor); 1608 if (ret < 0) 1609 return ret; 1610 if (ret && mode->id != OV5640_MODE_720P_1280_720 && 1611 mode->id != OV5640_MODE_1080P_1920_1080) 1612 prev_shutter *= 2; 1613 1614 /* read preview gain */ 1615 ret = ov5640_get_gain(sensor); 1616 if (ret < 0) 1617 return ret; 1618 prev_gain16 = ret; 1619 1620 /* get average */ 1621 ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average); 1622 if (ret) 1623 return ret; 1624 1625 /* turn off night mode for capture */ 1626 ret = ov5640_set_night_mode(sensor); 1627 if (ret < 0) 1628 return ret; 1629 1630 /* Write capture setting */ 1631 ret = ov5640_load_regs(sensor, mode); 1632 if (ret < 0) 1633 return ret; 1634 1635 /* read capture VTS */ 1636 ret = ov5640_get_vts(sensor); 1637 if (ret < 0) 1638 return ret; 1639 cap_vts = ret; 1640 ret = ov5640_get_hts(sensor); 1641 if (ret < 0) 1642 return ret; 1643 if (ret == 0) 1644 return -EINVAL; 1645 cap_hts = ret; 1646 1647 ret = ov5640_get_sysclk(sensor); 1648 if (ret < 0) 1649 return ret; 1650 if (ret == 0) 1651 return -EINVAL; 1652 cap_sysclk = ret; 1653 1654 /* calculate capture banding filter */ 1655 ret = ov5640_get_light_freq(sensor); 1656 if (ret < 0) 1657 return ret; 1658 light_freq = ret; 1659 1660 if (light_freq == 60) { 1661 /* 60Hz */ 1662 cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120; 1663 } else { 1664 /* 50Hz */ 1665 cap_bandfilt = cap_sysclk * 100 / cap_hts; 1666 } 1667 1668 if (!sensor->prev_sysclk) { 1669 ret = ov5640_get_sysclk(sensor); 1670 if (ret < 0) 1671 return ret; 1672 if (ret == 0) 1673 return -EINVAL; 1674 sensor->prev_sysclk = ret; 1675 } 1676 1677 if (!cap_bandfilt) 1678 return -EINVAL; 1679 1680 cap_maxband = (int)((cap_vts - 4) / cap_bandfilt); 1681 1682 /* calculate capture shutter/gain16 */ 1683 if (average > sensor->ae_low && average < sensor->ae_high) { 1684 /* in stable range */ 1685 cap_gain16_shutter = 1686 prev_gain16 * prev_shutter * 1687 cap_sysclk / sensor->prev_sysclk * 1688 sensor->prev_hts / cap_hts * 1689 sensor->ae_target / average; 1690 } else { 1691 cap_gain16_shutter = 1692 prev_gain16 * prev_shutter * 1693 cap_sysclk / sensor->prev_sysclk * 1694 sensor->prev_hts / cap_hts; 1695 } 1696 1697 /* gain to shutter */ 1698 if (cap_gain16_shutter < (cap_bandfilt * 16)) { 1699 /* shutter < 1/100 */ 1700 cap_shutter = cap_gain16_shutter / 16; 1701 if (cap_shutter < 1) 1702 cap_shutter = 1; 1703 1704 cap_gain16 = cap_gain16_shutter / cap_shutter; 1705 if (cap_gain16 < 16) 1706 cap_gain16 = 16; 1707 } else { 1708 if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) { 1709 /* exposure reach max */ 1710 cap_shutter = cap_bandfilt * cap_maxband; 1711 if (!cap_shutter) 1712 return -EINVAL; 1713 1714 cap_gain16 = cap_gain16_shutter / cap_shutter; 1715 } else { 1716 /* 1/100 < (cap_shutter = n/100) =< max */ 1717 cap_shutter = 1718 ((int)(cap_gain16_shutter / 16 / cap_bandfilt)) 1719 * cap_bandfilt; 1720 if (!cap_shutter) 1721 return -EINVAL; 1722 1723 cap_gain16 = cap_gain16_shutter / cap_shutter; 1724 } 1725 } 1726 1727 /* set capture gain */ 1728 ret = ov5640_set_gain(sensor, cap_gain16); 1729 if (ret) 1730 return ret; 1731 1732 /* write capture shutter */ 1733 if (cap_shutter > (cap_vts - 4)) { 1734 cap_vts = cap_shutter + 4; 1735 ret = ov5640_set_vts(sensor, cap_vts); 1736 if (ret < 0) 1737 return ret; 1738 } 1739 1740 /* set exposure */ 1741 return ov5640_set_exposure(sensor, cap_shutter); 1742 } 1743 1744 /* 1745 * if sensor changes inside scaling or subsampling 1746 * change mode directly 1747 */ 1748 static int ov5640_set_mode_direct(struct ov5640_dev *sensor, 1749 const struct ov5640_mode_info *mode) 1750 { 1751 if (!mode->reg_data) 1752 return -EINVAL; 1753 1754 /* Write capture setting */ 1755 return ov5640_load_regs(sensor, mode); 1756 } 1757 1758 static int ov5640_set_mode(struct ov5640_dev *sensor) 1759 { 1760 const struct ov5640_mode_info *mode = sensor->current_mode; 1761 const struct ov5640_mode_info *orig_mode = sensor->last_mode; 1762 enum ov5640_downsize_mode dn_mode, orig_dn_mode; 1763 bool auto_gain = sensor->ctrls.auto_gain->val == 1; 1764 bool auto_exp = sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO; 1765 unsigned long rate; 1766 int ret; 1767 1768 dn_mode = mode->dn_mode; 1769 orig_dn_mode = orig_mode->dn_mode; 1770 1771 /* auto gain and exposure must be turned off when changing modes */ 1772 if (auto_gain) { 1773 ret = ov5640_set_autogain(sensor, false); 1774 if (ret) 1775 return ret; 1776 } 1777 1778 if (auto_exp) { 1779 ret = ov5640_set_autoexposure(sensor, false); 1780 if (ret) 1781 goto restore_auto_gain; 1782 } 1783 1784 /* 1785 * All the formats we support have 16 bits per pixel, seems to require 1786 * the same rate than YUV, so we can just use 16 bpp all the time. 1787 */ 1788 rate = ov5640_calc_pixel_rate(sensor) * 16; 1789 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) { 1790 rate = rate / sensor->ep.bus.mipi_csi2.num_data_lanes; 1791 ret = ov5640_set_mipi_pclk(sensor, rate); 1792 } else { 1793 rate = rate / sensor->ep.bus.parallel.bus_width; 1794 ret = ov5640_set_dvp_pclk(sensor, rate); 1795 } 1796 1797 if (ret < 0) 1798 return 0; 1799 1800 if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) || 1801 (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) { 1802 /* 1803 * change between subsampling and scaling 1804 * go through exposure calculation 1805 */ 1806 ret = ov5640_set_mode_exposure_calc(sensor, mode); 1807 } else { 1808 /* 1809 * change inside subsampling or scaling 1810 * download firmware directly 1811 */ 1812 ret = ov5640_set_mode_direct(sensor, mode); 1813 } 1814 if (ret < 0) 1815 goto restore_auto_exp_gain; 1816 1817 /* restore auto gain and exposure */ 1818 if (auto_gain) 1819 ov5640_set_autogain(sensor, true); 1820 if (auto_exp) 1821 ov5640_set_autoexposure(sensor, true); 1822 1823 ret = ov5640_set_binning(sensor, dn_mode != SCALING); 1824 if (ret < 0) 1825 return ret; 1826 ret = ov5640_set_ae_target(sensor, sensor->ae_target); 1827 if (ret < 0) 1828 return ret; 1829 ret = ov5640_get_light_freq(sensor); 1830 if (ret < 0) 1831 return ret; 1832 ret = ov5640_set_bandingfilter(sensor); 1833 if (ret < 0) 1834 return ret; 1835 ret = ov5640_set_virtual_channel(sensor); 1836 if (ret < 0) 1837 return ret; 1838 1839 sensor->pending_mode_change = false; 1840 sensor->last_mode = mode; 1841 1842 return 0; 1843 1844 restore_auto_exp_gain: 1845 if (auto_exp) 1846 ov5640_set_autoexposure(sensor, true); 1847 restore_auto_gain: 1848 if (auto_gain) 1849 ov5640_set_autogain(sensor, true); 1850 1851 return ret; 1852 } 1853 1854 static int ov5640_set_framefmt(struct ov5640_dev *sensor, 1855 struct v4l2_mbus_framefmt *format); 1856 1857 /* restore the last set video mode after chip power-on */ 1858 static int ov5640_restore_mode(struct ov5640_dev *sensor) 1859 { 1860 int ret; 1861 1862 /* first load the initial register values */ 1863 ret = ov5640_load_regs(sensor, &ov5640_mode_init_data); 1864 if (ret < 0) 1865 return ret; 1866 sensor->last_mode = &ov5640_mode_init_data; 1867 1868 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f, 1869 (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) | 1870 ilog2(OV5640_SCLK_ROOT_DIV)); 1871 if (ret) 1872 return ret; 1873 1874 /* now restore the last capture mode */ 1875 ret = ov5640_set_mode(sensor); 1876 if (ret < 0) 1877 return ret; 1878 1879 return ov5640_set_framefmt(sensor, &sensor->fmt); 1880 } 1881 1882 static void ov5640_power(struct ov5640_dev *sensor, bool enable) 1883 { 1884 gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1); 1885 } 1886 1887 static void ov5640_reset(struct ov5640_dev *sensor) 1888 { 1889 if (!sensor->reset_gpio) 1890 return; 1891 1892 gpiod_set_value_cansleep(sensor->reset_gpio, 0); 1893 1894 /* camera power cycle */ 1895 ov5640_power(sensor, false); 1896 usleep_range(5000, 10000); 1897 ov5640_power(sensor, true); 1898 usleep_range(5000, 10000); 1899 1900 gpiod_set_value_cansleep(sensor->reset_gpio, 1); 1901 usleep_range(1000, 2000); 1902 1903 gpiod_set_value_cansleep(sensor->reset_gpio, 0); 1904 usleep_range(20000, 25000); 1905 } 1906 1907 static int ov5640_set_power_on(struct ov5640_dev *sensor) 1908 { 1909 struct i2c_client *client = sensor->i2c_client; 1910 int ret; 1911 1912 ret = clk_prepare_enable(sensor->xclk); 1913 if (ret) { 1914 dev_err(&client->dev, "%s: failed to enable clock\n", 1915 __func__); 1916 return ret; 1917 } 1918 1919 ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES, 1920 sensor->supplies); 1921 if (ret) { 1922 dev_err(&client->dev, "%s: failed to enable regulators\n", 1923 __func__); 1924 goto xclk_off; 1925 } 1926 1927 ov5640_reset(sensor); 1928 ov5640_power(sensor, true); 1929 1930 ret = ov5640_init_slave_id(sensor); 1931 if (ret) 1932 goto power_off; 1933 1934 return 0; 1935 1936 power_off: 1937 ov5640_power(sensor, false); 1938 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies); 1939 xclk_off: 1940 clk_disable_unprepare(sensor->xclk); 1941 return ret; 1942 } 1943 1944 static void ov5640_set_power_off(struct ov5640_dev *sensor) 1945 { 1946 ov5640_power(sensor, false); 1947 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies); 1948 clk_disable_unprepare(sensor->xclk); 1949 } 1950 1951 static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on) 1952 { 1953 int ret; 1954 1955 if (!on) { 1956 /* Reset MIPI bus settings to their default values. */ 1957 ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58); 1958 ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x04); 1959 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x00); 1960 return 0; 1961 } 1962 1963 /* 1964 * Power up MIPI HS Tx and LS Rx; 2 data lanes mode 1965 * 1966 * 0x300e = 0x40 1967 * [7:5] = 010 : 2 data lanes mode (see FIXME note in 1968 * "ov5640_set_stream_mipi()") 1969 * [4] = 0 : Power up MIPI HS Tx 1970 * [3] = 0 : Power up MIPI LS Rx 1971 * [2] = 0 : MIPI interface disabled 1972 */ 1973 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x40); 1974 if (ret) 1975 return ret; 1976 1977 /* 1978 * Gate clock and set LP11 in 'no packets mode' (idle) 1979 * 1980 * 0x4800 = 0x24 1981 * [5] = 1 : Gate clock when 'no packets' 1982 * [2] = 1 : MIPI bus in LP11 when 'no packets' 1983 */ 1984 ret = ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x24); 1985 if (ret) 1986 return ret; 1987 1988 /* 1989 * Set data lanes and clock in LP11 when 'sleeping' 1990 * 1991 * 0x3019 = 0x70 1992 * [6] = 1 : MIPI data lane 2 in LP11 when 'sleeping' 1993 * [5] = 1 : MIPI data lane 1 in LP11 when 'sleeping' 1994 * [4] = 1 : MIPI clock lane in LP11 when 'sleeping' 1995 */ 1996 ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x70); 1997 if (ret) 1998 return ret; 1999 2000 /* Give lanes some time to coax into LP11 state. */ 2001 usleep_range(500, 1000); 2002 2003 return 0; 2004 } 2005 2006 static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on) 2007 { 2008 unsigned int flags = sensor->ep.bus.parallel.flags; 2009 bool bt656 = sensor->ep.bus_type == V4L2_MBUS_BT656; 2010 u8 polarities = 0; 2011 int ret; 2012 2013 if (!on) { 2014 /* Reset settings to their default values. */ 2015 ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00, 0x00); 2016 ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58); 2017 ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, 0x20); 2018 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00); 2019 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0x00); 2020 return 0; 2021 } 2022 2023 /* 2024 * Note about parallel port configuration. 2025 * 2026 * When configured in parallel mode, the OV5640 will 2027 * output 10 bits data on DVP data lines [9:0]. 2028 * If only 8 bits data are wanted, the 8 bits data lines 2029 * of the camera interface must be physically connected 2030 * on the DVP data lines [9:2]. 2031 * 2032 * Control lines polarity can be configured through 2033 * devicetree endpoint control lines properties. 2034 * If no endpoint control lines properties are set, 2035 * polarity will be as below: 2036 * - VSYNC: active high 2037 * - HREF: active low 2038 * - PCLK: active low 2039 * 2040 * VSYNC & HREF are not configured if BT656 bus mode is selected 2041 */ 2042 2043 /* 2044 * BT656 embedded synchronization configuration 2045 * 2046 * CCIR656 CTRL00 2047 * - [7]: SYNC code selection (0: auto generate sync code, 2048 * 1: sync code from regs 0x4732-0x4735) 2049 * - [6]: f value in CCIR656 SYNC code when fixed f value 2050 * - [5]: Fixed f value 2051 * - [4:3]: Blank toggle data options (00: data=1'h040/1'h200, 2052 * 01: data from regs 0x4736-0x4738, 10: always keep 0) 2053 * - [1]: Clip data disable 2054 * - [0]: CCIR656 mode enable 2055 * 2056 * Default CCIR656 SAV/EAV mode with default codes 2057 * SAV=0xff000080 & EAV=0xff00009d is enabled here with settings: 2058 * - CCIR656 mode enable 2059 * - auto generation of sync codes 2060 * - blank toggle data 1'h040/1'h200 2061 * - clip reserved data (0x00 & 0xff changed to 0x01 & 0xfe) 2062 */ 2063 ret = ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00, 2064 bt656 ? 0x01 : 0x00); 2065 if (ret) 2066 return ret; 2067 2068 /* 2069 * configure parallel port control lines polarity 2070 * 2071 * POLARITY CTRL0 2072 * - [5]: PCLK polarity (0: active low, 1: active high) 2073 * - [1]: HREF polarity (0: active low, 1: active high) 2074 * - [0]: VSYNC polarity (mismatch here between 2075 * datasheet and hardware, 0 is active high 2076 * and 1 is active low...) 2077 */ 2078 if (!bt656) { 2079 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) 2080 polarities |= BIT(1); 2081 if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) 2082 polarities |= BIT(0); 2083 } 2084 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING) 2085 polarities |= BIT(5); 2086 2087 ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, polarities); 2088 if (ret) 2089 return ret; 2090 2091 /* 2092 * powerdown MIPI TX/RX PHY & enable DVP 2093 * 2094 * MIPI CONTROL 00 2095 * [4] = 1 : Power down MIPI HS Tx 2096 * [3] = 1 : Power down MIPI LS Rx 2097 * [2] = 0 : DVP enable (MIPI disable) 2098 */ 2099 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x18); 2100 if (ret) 2101 return ret; 2102 2103 /* 2104 * enable VSYNC/HREF/PCLK DVP control lines 2105 * & D[9:6] DVP data lines 2106 * 2107 * PAD OUTPUT ENABLE 01 2108 * - 6: VSYNC output enable 2109 * - 5: HREF output enable 2110 * - 4: PCLK output enable 2111 * - [3:0]: D[9:6] output enable 2112 */ 2113 ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 2114 bt656 ? 0x1f : 0x7f); 2115 if (ret) 2116 return ret; 2117 2118 /* 2119 * enable D[5:0] DVP data lines 2120 * 2121 * PAD OUTPUT ENABLE 02 2122 * - [7:2]: D[5:0] output enable 2123 */ 2124 return ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0xfc); 2125 } 2126 2127 static int ov5640_set_power(struct ov5640_dev *sensor, bool on) 2128 { 2129 int ret = 0; 2130 2131 if (on) { 2132 ret = ov5640_set_power_on(sensor); 2133 if (ret) 2134 return ret; 2135 2136 ret = ov5640_restore_mode(sensor); 2137 if (ret) 2138 goto power_off; 2139 } 2140 2141 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) 2142 ret = ov5640_set_power_mipi(sensor, on); 2143 else 2144 ret = ov5640_set_power_dvp(sensor, on); 2145 if (ret) 2146 goto power_off; 2147 2148 if (!on) 2149 ov5640_set_power_off(sensor); 2150 2151 return 0; 2152 2153 power_off: 2154 ov5640_set_power_off(sensor); 2155 return ret; 2156 } 2157 2158 /* --------------- Subdev Operations --------------- */ 2159 2160 static int ov5640_s_power(struct v4l2_subdev *sd, int on) 2161 { 2162 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2163 int ret = 0; 2164 2165 mutex_lock(&sensor->lock); 2166 2167 /* 2168 * If the power count is modified from 0 to != 0 or from != 0 to 0, 2169 * update the power state. 2170 */ 2171 if (sensor->power_count == !on) { 2172 ret = ov5640_set_power(sensor, !!on); 2173 if (ret) 2174 goto out; 2175 } 2176 2177 /* Update the power count. */ 2178 sensor->power_count += on ? 1 : -1; 2179 WARN_ON(sensor->power_count < 0); 2180 out: 2181 mutex_unlock(&sensor->lock); 2182 2183 if (on && !ret && sensor->power_count == 1) { 2184 /* restore controls */ 2185 ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler); 2186 } 2187 2188 return ret; 2189 } 2190 2191 static int ov5640_try_frame_interval(struct ov5640_dev *sensor, 2192 struct v4l2_fract *fi, 2193 u32 width, u32 height) 2194 { 2195 const struct ov5640_mode_info *mode; 2196 enum ov5640_frame_rate rate = OV5640_15_FPS; 2197 int minfps, maxfps, best_fps, fps; 2198 int i; 2199 2200 minfps = ov5640_framerates[OV5640_15_FPS]; 2201 maxfps = ov5640_framerates[OV5640_60_FPS]; 2202 2203 if (fi->numerator == 0) { 2204 fi->denominator = maxfps; 2205 fi->numerator = 1; 2206 rate = OV5640_60_FPS; 2207 goto find_mode; 2208 } 2209 2210 fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator), 2211 minfps, maxfps); 2212 2213 best_fps = minfps; 2214 for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) { 2215 int curr_fps = ov5640_framerates[i]; 2216 2217 if (abs(curr_fps - fps) < abs(best_fps - fps)) { 2218 best_fps = curr_fps; 2219 rate = i; 2220 } 2221 } 2222 2223 fi->numerator = 1; 2224 fi->denominator = best_fps; 2225 2226 find_mode: 2227 mode = ov5640_find_mode(sensor, rate, width, height, false); 2228 return mode ? rate : -EINVAL; 2229 } 2230 2231 static int ov5640_get_fmt(struct v4l2_subdev *sd, 2232 struct v4l2_subdev_state *sd_state, 2233 struct v4l2_subdev_format *format) 2234 { 2235 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2236 struct v4l2_mbus_framefmt *fmt; 2237 2238 if (format->pad != 0) 2239 return -EINVAL; 2240 2241 mutex_lock(&sensor->lock); 2242 2243 if (format->which == V4L2_SUBDEV_FORMAT_TRY) 2244 fmt = v4l2_subdev_get_try_format(&sensor->sd, sd_state, 2245 format->pad); 2246 else 2247 fmt = &sensor->fmt; 2248 2249 format->format = *fmt; 2250 2251 mutex_unlock(&sensor->lock); 2252 2253 return 0; 2254 } 2255 2256 static int ov5640_try_fmt_internal(struct v4l2_subdev *sd, 2257 struct v4l2_mbus_framefmt *fmt, 2258 enum ov5640_frame_rate fr, 2259 const struct ov5640_mode_info **new_mode) 2260 { 2261 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2262 const struct ov5640_mode_info *mode; 2263 int i; 2264 2265 mode = ov5640_find_mode(sensor, fr, fmt->width, fmt->height, true); 2266 if (!mode) 2267 return -EINVAL; 2268 fmt->width = mode->hact; 2269 fmt->height = mode->vact; 2270 2271 if (new_mode) 2272 *new_mode = mode; 2273 2274 for (i = 0; i < ARRAY_SIZE(ov5640_formats); i++) 2275 if (ov5640_formats[i].code == fmt->code) 2276 break; 2277 if (i >= ARRAY_SIZE(ov5640_formats)) 2278 i = 0; 2279 2280 fmt->code = ov5640_formats[i].code; 2281 fmt->colorspace = ov5640_formats[i].colorspace; 2282 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); 2283 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; 2284 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); 2285 2286 return 0; 2287 } 2288 2289 static int ov5640_set_fmt(struct v4l2_subdev *sd, 2290 struct v4l2_subdev_state *sd_state, 2291 struct v4l2_subdev_format *format) 2292 { 2293 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2294 const struct ov5640_mode_info *new_mode; 2295 struct v4l2_mbus_framefmt *mbus_fmt = &format->format; 2296 int ret; 2297 2298 if (format->pad != 0) 2299 return -EINVAL; 2300 2301 mutex_lock(&sensor->lock); 2302 2303 if (sensor->streaming) { 2304 ret = -EBUSY; 2305 goto out; 2306 } 2307 2308 ret = ov5640_try_fmt_internal(sd, mbus_fmt, 2309 sensor->current_fr, &new_mode); 2310 if (ret) 2311 goto out; 2312 2313 if (format->which == V4L2_SUBDEV_FORMAT_TRY) { 2314 *v4l2_subdev_get_try_format(sd, sd_state, 0) = *mbus_fmt; 2315 goto out; 2316 } 2317 2318 if (new_mode != sensor->current_mode) { 2319 sensor->current_mode = new_mode; 2320 sensor->pending_mode_change = true; 2321 } 2322 if (mbus_fmt->code != sensor->fmt.code) 2323 sensor->pending_fmt_change = true; 2324 2325 /* update format even if code is unchanged, resolution might change */ 2326 sensor->fmt = *mbus_fmt; 2327 2328 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, 2329 ov5640_calc_pixel_rate(sensor)); 2330 out: 2331 mutex_unlock(&sensor->lock); 2332 return ret; 2333 } 2334 2335 static int ov5640_set_framefmt(struct ov5640_dev *sensor, 2336 struct v4l2_mbus_framefmt *format) 2337 { 2338 int ret = 0; 2339 bool is_jpeg = false; 2340 u8 fmt, mux; 2341 2342 switch (format->code) { 2343 case MEDIA_BUS_FMT_UYVY8_1X16: 2344 case MEDIA_BUS_FMT_UYVY8_2X8: 2345 /* YUV422, UYVY */ 2346 fmt = 0x3f; 2347 mux = OV5640_FMT_MUX_YUV422; 2348 break; 2349 case MEDIA_BUS_FMT_YUYV8_1X16: 2350 case MEDIA_BUS_FMT_YUYV8_2X8: 2351 /* YUV422, YUYV */ 2352 fmt = 0x30; 2353 mux = OV5640_FMT_MUX_YUV422; 2354 break; 2355 case MEDIA_BUS_FMT_RGB565_2X8_LE: 2356 /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */ 2357 fmt = 0x6F; 2358 mux = OV5640_FMT_MUX_RGB; 2359 break; 2360 case MEDIA_BUS_FMT_RGB565_2X8_BE: 2361 /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */ 2362 fmt = 0x61; 2363 mux = OV5640_FMT_MUX_RGB; 2364 break; 2365 case MEDIA_BUS_FMT_JPEG_1X8: 2366 /* YUV422, YUYV */ 2367 fmt = 0x30; 2368 mux = OV5640_FMT_MUX_YUV422; 2369 is_jpeg = true; 2370 break; 2371 case MEDIA_BUS_FMT_SBGGR8_1X8: 2372 /* Raw, BGBG... / GRGR... */ 2373 fmt = 0x00; 2374 mux = OV5640_FMT_MUX_RAW_DPC; 2375 break; 2376 case MEDIA_BUS_FMT_SGBRG8_1X8: 2377 /* Raw bayer, GBGB... / RGRG... */ 2378 fmt = 0x01; 2379 mux = OV5640_FMT_MUX_RAW_DPC; 2380 break; 2381 case MEDIA_BUS_FMT_SGRBG8_1X8: 2382 /* Raw bayer, GRGR... / BGBG... */ 2383 fmt = 0x02; 2384 mux = OV5640_FMT_MUX_RAW_DPC; 2385 break; 2386 case MEDIA_BUS_FMT_SRGGB8_1X8: 2387 /* Raw bayer, RGRG... / GBGB... */ 2388 fmt = 0x03; 2389 mux = OV5640_FMT_MUX_RAW_DPC; 2390 break; 2391 default: 2392 return -EINVAL; 2393 } 2394 2395 /* FORMAT CONTROL00: YUV and RGB formatting */ 2396 ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, fmt); 2397 if (ret) 2398 return ret; 2399 2400 /* FORMAT MUX CONTROL: ISP YUV or RGB */ 2401 ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL, mux); 2402 if (ret) 2403 return ret; 2404 2405 /* 2406 * TIMING TC REG21: 2407 * - [5]: JPEG enable 2408 */ 2409 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21, 2410 BIT(5), is_jpeg ? BIT(5) : 0); 2411 if (ret) 2412 return ret; 2413 2414 /* 2415 * SYSTEM RESET02: 2416 * - [4]: Reset JFIFO 2417 * - [3]: Reset SFIFO 2418 * - [2]: Reset JPEG 2419 */ 2420 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02, 2421 BIT(4) | BIT(3) | BIT(2), 2422 is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2))); 2423 if (ret) 2424 return ret; 2425 2426 /* 2427 * CLOCK ENABLE02: 2428 * - [5]: Enable JPEG 2x clock 2429 * - [3]: Enable JPEG clock 2430 */ 2431 return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02, 2432 BIT(5) | BIT(3), 2433 is_jpeg ? (BIT(5) | BIT(3)) : 0); 2434 } 2435 2436 /* 2437 * Sensor Controls. 2438 */ 2439 2440 static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value) 2441 { 2442 int ret; 2443 2444 if (value) { 2445 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, 2446 BIT(0), BIT(0)); 2447 if (ret) 2448 return ret; 2449 ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value); 2450 } else { 2451 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0); 2452 } 2453 2454 return ret; 2455 } 2456 2457 static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value) 2458 { 2459 int ret; 2460 2461 if (value) { 2462 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, 2463 BIT(2), BIT(2)); 2464 if (ret) 2465 return ret; 2466 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5, 2467 value & 0xff); 2468 } else { 2469 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0); 2470 } 2471 2472 return ret; 2473 } 2474 2475 static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value) 2476 { 2477 int ret; 2478 2479 if (value) { 2480 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, 2481 BIT(1), BIT(1)); 2482 if (ret) 2483 return ret; 2484 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3, 2485 value & 0xff); 2486 if (ret) 2487 return ret; 2488 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4, 2489 value & 0xff); 2490 } else { 2491 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0); 2492 } 2493 2494 return ret; 2495 } 2496 2497 static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb) 2498 { 2499 int ret; 2500 2501 ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL, 2502 BIT(0), awb ? 0 : 1); 2503 if (ret) 2504 return ret; 2505 2506 if (!awb) { 2507 u16 red = (u16)sensor->ctrls.red_balance->val; 2508 u16 blue = (u16)sensor->ctrls.blue_balance->val; 2509 2510 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red); 2511 if (ret) 2512 return ret; 2513 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue); 2514 } 2515 2516 return ret; 2517 } 2518 2519 static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor, 2520 enum v4l2_exposure_auto_type auto_exposure) 2521 { 2522 struct ov5640_ctrls *ctrls = &sensor->ctrls; 2523 bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO); 2524 int ret = 0; 2525 2526 if (ctrls->auto_exp->is_new) { 2527 ret = ov5640_set_autoexposure(sensor, auto_exp); 2528 if (ret) 2529 return ret; 2530 } 2531 2532 if (!auto_exp && ctrls->exposure->is_new) { 2533 u16 max_exp; 2534 2535 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS, 2536 &max_exp); 2537 if (ret) 2538 return ret; 2539 ret = ov5640_get_vts(sensor); 2540 if (ret < 0) 2541 return ret; 2542 max_exp += ret; 2543 ret = 0; 2544 2545 if (ctrls->exposure->val < max_exp) 2546 ret = ov5640_set_exposure(sensor, ctrls->exposure->val); 2547 } 2548 2549 return ret; 2550 } 2551 2552 static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain) 2553 { 2554 struct ov5640_ctrls *ctrls = &sensor->ctrls; 2555 int ret = 0; 2556 2557 if (ctrls->auto_gain->is_new) { 2558 ret = ov5640_set_autogain(sensor, auto_gain); 2559 if (ret) 2560 return ret; 2561 } 2562 2563 if (!auto_gain && ctrls->gain->is_new) 2564 ret = ov5640_set_gain(sensor, ctrls->gain->val); 2565 2566 return ret; 2567 } 2568 2569 static const char * const test_pattern_menu[] = { 2570 "Disabled", 2571 "Color bars", 2572 "Color bars w/ rolling bar", 2573 "Color squares", 2574 "Color squares w/ rolling bar", 2575 }; 2576 2577 #define OV5640_TEST_ENABLE BIT(7) 2578 #define OV5640_TEST_ROLLING BIT(6) /* rolling horizontal bar */ 2579 #define OV5640_TEST_TRANSPARENT BIT(5) 2580 #define OV5640_TEST_SQUARE_BW BIT(4) /* black & white squares */ 2581 #define OV5640_TEST_BAR_STANDARD (0 << 2) 2582 #define OV5640_TEST_BAR_VERT_CHANGE_1 (1 << 2) 2583 #define OV5640_TEST_BAR_HOR_CHANGE (2 << 2) 2584 #define OV5640_TEST_BAR_VERT_CHANGE_2 (3 << 2) 2585 #define OV5640_TEST_BAR (0 << 0) 2586 #define OV5640_TEST_RANDOM (1 << 0) 2587 #define OV5640_TEST_SQUARE (2 << 0) 2588 #define OV5640_TEST_BLACK (3 << 0) 2589 2590 static const u8 test_pattern_val[] = { 2591 0, 2592 OV5640_TEST_ENABLE | OV5640_TEST_BAR_VERT_CHANGE_1 | 2593 OV5640_TEST_BAR, 2594 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | 2595 OV5640_TEST_BAR_VERT_CHANGE_1 | OV5640_TEST_BAR, 2596 OV5640_TEST_ENABLE | OV5640_TEST_SQUARE, 2597 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | OV5640_TEST_SQUARE, 2598 }; 2599 2600 static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value) 2601 { 2602 return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1, 2603 test_pattern_val[value]); 2604 } 2605 2606 static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value) 2607 { 2608 int ret; 2609 2610 ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7), 2611 (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ? 2612 0 : BIT(7)); 2613 if (ret) 2614 return ret; 2615 2616 return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2), 2617 (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ? 2618 BIT(2) : 0); 2619 } 2620 2621 static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value) 2622 { 2623 /* 2624 * If sensor is mounted upside down, mirror logic is inversed. 2625 * 2626 * Sensor is a BSI (Back Side Illuminated) one, 2627 * so image captured is physically mirrored. 2628 * This is why mirror logic is inversed in 2629 * order to cancel this mirror effect. 2630 */ 2631 2632 /* 2633 * TIMING TC REG21: 2634 * - [2]: ISP mirror 2635 * - [1]: Sensor mirror 2636 */ 2637 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21, 2638 BIT(2) | BIT(1), 2639 (!(value ^ sensor->upside_down)) ? 2640 (BIT(2) | BIT(1)) : 0); 2641 } 2642 2643 static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value) 2644 { 2645 /* If sensor is mounted upside down, flip logic is inversed */ 2646 2647 /* 2648 * TIMING TC REG20: 2649 * - [2]: ISP vflip 2650 * - [1]: Sensor vflip 2651 */ 2652 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20, 2653 BIT(2) | BIT(1), 2654 (value ^ sensor->upside_down) ? 2655 (BIT(2) | BIT(1)) : 0); 2656 } 2657 2658 static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl) 2659 { 2660 struct v4l2_subdev *sd = ctrl_to_sd(ctrl); 2661 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2662 int val; 2663 2664 /* v4l2_ctrl_lock() locks our own mutex */ 2665 2666 switch (ctrl->id) { 2667 case V4L2_CID_AUTOGAIN: 2668 val = ov5640_get_gain(sensor); 2669 if (val < 0) 2670 return val; 2671 sensor->ctrls.gain->val = val; 2672 break; 2673 case V4L2_CID_EXPOSURE_AUTO: 2674 val = ov5640_get_exposure(sensor); 2675 if (val < 0) 2676 return val; 2677 sensor->ctrls.exposure->val = val; 2678 break; 2679 } 2680 2681 return 0; 2682 } 2683 2684 static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl) 2685 { 2686 struct v4l2_subdev *sd = ctrl_to_sd(ctrl); 2687 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2688 int ret; 2689 2690 /* v4l2_ctrl_lock() locks our own mutex */ 2691 2692 /* 2693 * If the device is not powered up by the host driver do 2694 * not apply any controls to H/W at this time. Instead 2695 * the controls will be restored right after power-up. 2696 */ 2697 if (sensor->power_count == 0) 2698 return 0; 2699 2700 switch (ctrl->id) { 2701 case V4L2_CID_AUTOGAIN: 2702 ret = ov5640_set_ctrl_gain(sensor, ctrl->val); 2703 break; 2704 case V4L2_CID_EXPOSURE_AUTO: 2705 ret = ov5640_set_ctrl_exposure(sensor, ctrl->val); 2706 break; 2707 case V4L2_CID_AUTO_WHITE_BALANCE: 2708 ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val); 2709 break; 2710 case V4L2_CID_HUE: 2711 ret = ov5640_set_ctrl_hue(sensor, ctrl->val); 2712 break; 2713 case V4L2_CID_CONTRAST: 2714 ret = ov5640_set_ctrl_contrast(sensor, ctrl->val); 2715 break; 2716 case V4L2_CID_SATURATION: 2717 ret = ov5640_set_ctrl_saturation(sensor, ctrl->val); 2718 break; 2719 case V4L2_CID_TEST_PATTERN: 2720 ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val); 2721 break; 2722 case V4L2_CID_POWER_LINE_FREQUENCY: 2723 ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val); 2724 break; 2725 case V4L2_CID_HFLIP: 2726 ret = ov5640_set_ctrl_hflip(sensor, ctrl->val); 2727 break; 2728 case V4L2_CID_VFLIP: 2729 ret = ov5640_set_ctrl_vflip(sensor, ctrl->val); 2730 break; 2731 default: 2732 ret = -EINVAL; 2733 break; 2734 } 2735 2736 return ret; 2737 } 2738 2739 static const struct v4l2_ctrl_ops ov5640_ctrl_ops = { 2740 .g_volatile_ctrl = ov5640_g_volatile_ctrl, 2741 .s_ctrl = ov5640_s_ctrl, 2742 }; 2743 2744 static int ov5640_init_controls(struct ov5640_dev *sensor) 2745 { 2746 const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops; 2747 struct ov5640_ctrls *ctrls = &sensor->ctrls; 2748 struct v4l2_ctrl_handler *hdl = &ctrls->handler; 2749 int ret; 2750 2751 v4l2_ctrl_handler_init(hdl, 32); 2752 2753 /* we can use our own mutex for the ctrl lock */ 2754 hdl->lock = &sensor->lock; 2755 2756 /* Clock related controls */ 2757 ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE, 2758 0, INT_MAX, 1, 2759 ov5640_calc_pixel_rate(sensor)); 2760 2761 /* Auto/manual white balance */ 2762 ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops, 2763 V4L2_CID_AUTO_WHITE_BALANCE, 2764 0, 1, 1, 1); 2765 ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE, 2766 0, 4095, 1, 0); 2767 ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE, 2768 0, 4095, 1, 0); 2769 /* Auto/manual exposure */ 2770 ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops, 2771 V4L2_CID_EXPOSURE_AUTO, 2772 V4L2_EXPOSURE_MANUAL, 0, 2773 V4L2_EXPOSURE_AUTO); 2774 ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE, 2775 0, 65535, 1, 0); 2776 /* Auto/manual gain */ 2777 ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN, 2778 0, 1, 1, 1); 2779 ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN, 2780 0, 1023, 1, 0); 2781 2782 ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION, 2783 0, 255, 1, 64); 2784 ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE, 2785 0, 359, 1, 0); 2786 ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST, 2787 0, 255, 1, 0); 2788 ctrls->test_pattern = 2789 v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN, 2790 ARRAY_SIZE(test_pattern_menu) - 1, 2791 0, 0, test_pattern_menu); 2792 ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP, 2793 0, 1, 1, 0); 2794 ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP, 2795 0, 1, 1, 0); 2796 2797 ctrls->light_freq = 2798 v4l2_ctrl_new_std_menu(hdl, ops, 2799 V4L2_CID_POWER_LINE_FREQUENCY, 2800 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0, 2801 V4L2_CID_POWER_LINE_FREQUENCY_50HZ); 2802 2803 if (hdl->error) { 2804 ret = hdl->error; 2805 goto free_ctrls; 2806 } 2807 2808 ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY; 2809 ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE; 2810 ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE; 2811 2812 v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false); 2813 v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true); 2814 v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true); 2815 2816 sensor->sd.ctrl_handler = hdl; 2817 return 0; 2818 2819 free_ctrls: 2820 v4l2_ctrl_handler_free(hdl); 2821 return ret; 2822 } 2823 2824 static int ov5640_enum_frame_size(struct v4l2_subdev *sd, 2825 struct v4l2_subdev_state *sd_state, 2826 struct v4l2_subdev_frame_size_enum *fse) 2827 { 2828 if (fse->pad != 0) 2829 return -EINVAL; 2830 if (fse->index >= OV5640_NUM_MODES) 2831 return -EINVAL; 2832 2833 fse->min_width = 2834 ov5640_mode_data[fse->index].hact; 2835 fse->max_width = fse->min_width; 2836 fse->min_height = 2837 ov5640_mode_data[fse->index].vact; 2838 fse->max_height = fse->min_height; 2839 2840 return 0; 2841 } 2842 2843 static int ov5640_enum_frame_interval( 2844 struct v4l2_subdev *sd, 2845 struct v4l2_subdev_state *sd_state, 2846 struct v4l2_subdev_frame_interval_enum *fie) 2847 { 2848 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2849 struct v4l2_fract tpf; 2850 int ret; 2851 2852 if (fie->pad != 0) 2853 return -EINVAL; 2854 if (fie->index >= OV5640_NUM_FRAMERATES) 2855 return -EINVAL; 2856 2857 tpf.numerator = 1; 2858 tpf.denominator = ov5640_framerates[fie->index]; 2859 2860 ret = ov5640_try_frame_interval(sensor, &tpf, 2861 fie->width, fie->height); 2862 if (ret < 0) 2863 return -EINVAL; 2864 2865 fie->interval = tpf; 2866 return 0; 2867 } 2868 2869 static int ov5640_g_frame_interval(struct v4l2_subdev *sd, 2870 struct v4l2_subdev_frame_interval *fi) 2871 { 2872 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2873 2874 mutex_lock(&sensor->lock); 2875 fi->interval = sensor->frame_interval; 2876 mutex_unlock(&sensor->lock); 2877 2878 return 0; 2879 } 2880 2881 static int ov5640_s_frame_interval(struct v4l2_subdev *sd, 2882 struct v4l2_subdev_frame_interval *fi) 2883 { 2884 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2885 const struct ov5640_mode_info *mode; 2886 int frame_rate, ret = 0; 2887 2888 if (fi->pad != 0) 2889 return -EINVAL; 2890 2891 mutex_lock(&sensor->lock); 2892 2893 if (sensor->streaming) { 2894 ret = -EBUSY; 2895 goto out; 2896 } 2897 2898 mode = sensor->current_mode; 2899 2900 frame_rate = ov5640_try_frame_interval(sensor, &fi->interval, 2901 mode->hact, mode->vact); 2902 if (frame_rate < 0) { 2903 /* Always return a valid frame interval value */ 2904 fi->interval = sensor->frame_interval; 2905 goto out; 2906 } 2907 2908 mode = ov5640_find_mode(sensor, frame_rate, mode->hact, 2909 mode->vact, true); 2910 if (!mode) { 2911 ret = -EINVAL; 2912 goto out; 2913 } 2914 2915 if (mode != sensor->current_mode || 2916 frame_rate != sensor->current_fr) { 2917 sensor->current_fr = frame_rate; 2918 sensor->frame_interval = fi->interval; 2919 sensor->current_mode = mode; 2920 sensor->pending_mode_change = true; 2921 2922 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, 2923 ov5640_calc_pixel_rate(sensor)); 2924 } 2925 out: 2926 mutex_unlock(&sensor->lock); 2927 return ret; 2928 } 2929 2930 static int ov5640_enum_mbus_code(struct v4l2_subdev *sd, 2931 struct v4l2_subdev_state *sd_state, 2932 struct v4l2_subdev_mbus_code_enum *code) 2933 { 2934 if (code->pad != 0) 2935 return -EINVAL; 2936 if (code->index >= ARRAY_SIZE(ov5640_formats)) 2937 return -EINVAL; 2938 2939 code->code = ov5640_formats[code->index].code; 2940 return 0; 2941 } 2942 2943 static int ov5640_s_stream(struct v4l2_subdev *sd, int enable) 2944 { 2945 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2946 int ret = 0; 2947 2948 mutex_lock(&sensor->lock); 2949 2950 if (sensor->streaming == !enable) { 2951 if (enable && sensor->pending_mode_change) { 2952 ret = ov5640_set_mode(sensor); 2953 if (ret) 2954 goto out; 2955 } 2956 2957 if (enable && sensor->pending_fmt_change) { 2958 ret = ov5640_set_framefmt(sensor, &sensor->fmt); 2959 if (ret) 2960 goto out; 2961 sensor->pending_fmt_change = false; 2962 } 2963 2964 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) 2965 ret = ov5640_set_stream_mipi(sensor, enable); 2966 else 2967 ret = ov5640_set_stream_dvp(sensor, enable); 2968 2969 if (!ret) 2970 sensor->streaming = enable; 2971 } 2972 out: 2973 mutex_unlock(&sensor->lock); 2974 return ret; 2975 } 2976 2977 static const struct v4l2_subdev_core_ops ov5640_core_ops = { 2978 .s_power = ov5640_s_power, 2979 .log_status = v4l2_ctrl_subdev_log_status, 2980 .subscribe_event = v4l2_ctrl_subdev_subscribe_event, 2981 .unsubscribe_event = v4l2_event_subdev_unsubscribe, 2982 }; 2983 2984 static const struct v4l2_subdev_video_ops ov5640_video_ops = { 2985 .g_frame_interval = ov5640_g_frame_interval, 2986 .s_frame_interval = ov5640_s_frame_interval, 2987 .s_stream = ov5640_s_stream, 2988 }; 2989 2990 static const struct v4l2_subdev_pad_ops ov5640_pad_ops = { 2991 .enum_mbus_code = ov5640_enum_mbus_code, 2992 .get_fmt = ov5640_get_fmt, 2993 .set_fmt = ov5640_set_fmt, 2994 .enum_frame_size = ov5640_enum_frame_size, 2995 .enum_frame_interval = ov5640_enum_frame_interval, 2996 }; 2997 2998 static const struct v4l2_subdev_ops ov5640_subdev_ops = { 2999 .core = &ov5640_core_ops, 3000 .video = &ov5640_video_ops, 3001 .pad = &ov5640_pad_ops, 3002 }; 3003 3004 static int ov5640_get_regulators(struct ov5640_dev *sensor) 3005 { 3006 int i; 3007 3008 for (i = 0; i < OV5640_NUM_SUPPLIES; i++) 3009 sensor->supplies[i].supply = ov5640_supply_name[i]; 3010 3011 return devm_regulator_bulk_get(&sensor->i2c_client->dev, 3012 OV5640_NUM_SUPPLIES, 3013 sensor->supplies); 3014 } 3015 3016 static int ov5640_check_chip_id(struct ov5640_dev *sensor) 3017 { 3018 struct i2c_client *client = sensor->i2c_client; 3019 int ret = 0; 3020 u16 chip_id; 3021 3022 ret = ov5640_set_power_on(sensor); 3023 if (ret) 3024 return ret; 3025 3026 ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id); 3027 if (ret) { 3028 dev_err(&client->dev, "%s: failed to read chip identifier\n", 3029 __func__); 3030 goto power_off; 3031 } 3032 3033 if (chip_id != 0x5640) { 3034 dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n", 3035 __func__, chip_id); 3036 ret = -ENXIO; 3037 } 3038 3039 power_off: 3040 ov5640_set_power_off(sensor); 3041 return ret; 3042 } 3043 3044 static int ov5640_probe(struct i2c_client *client) 3045 { 3046 struct device *dev = &client->dev; 3047 struct fwnode_handle *endpoint; 3048 struct ov5640_dev *sensor; 3049 struct v4l2_mbus_framefmt *fmt; 3050 u32 rotation; 3051 int ret; 3052 3053 sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL); 3054 if (!sensor) 3055 return -ENOMEM; 3056 3057 sensor->i2c_client = client; 3058 3059 /* 3060 * default init sequence initialize sensor to 3061 * YUV422 UYVY VGA@30fps 3062 */ 3063 fmt = &sensor->fmt; 3064 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8; 3065 fmt->colorspace = V4L2_COLORSPACE_SRGB; 3066 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); 3067 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; 3068 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); 3069 fmt->width = 640; 3070 fmt->height = 480; 3071 fmt->field = V4L2_FIELD_NONE; 3072 sensor->frame_interval.numerator = 1; 3073 sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS]; 3074 sensor->current_fr = OV5640_30_FPS; 3075 sensor->current_mode = 3076 &ov5640_mode_data[OV5640_MODE_VGA_640_480]; 3077 sensor->last_mode = sensor->current_mode; 3078 3079 sensor->ae_target = 52; 3080 3081 /* optional indication of physical rotation of sensor */ 3082 ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation", 3083 &rotation); 3084 if (!ret) { 3085 switch (rotation) { 3086 case 180: 3087 sensor->upside_down = true; 3088 fallthrough; 3089 case 0: 3090 break; 3091 default: 3092 dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n", 3093 rotation); 3094 } 3095 } 3096 3097 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), 3098 NULL); 3099 if (!endpoint) { 3100 dev_err(dev, "endpoint node not found\n"); 3101 return -EINVAL; 3102 } 3103 3104 ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep); 3105 fwnode_handle_put(endpoint); 3106 if (ret) { 3107 dev_err(dev, "Could not parse endpoint\n"); 3108 return ret; 3109 } 3110 3111 if (sensor->ep.bus_type != V4L2_MBUS_PARALLEL && 3112 sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY && 3113 sensor->ep.bus_type != V4L2_MBUS_BT656) { 3114 dev_err(dev, "Unsupported bus type %d\n", sensor->ep.bus_type); 3115 return -EINVAL; 3116 } 3117 3118 /* get system clock (xclk) */ 3119 sensor->xclk = devm_clk_get(dev, "xclk"); 3120 if (IS_ERR(sensor->xclk)) { 3121 dev_err(dev, "failed to get xclk\n"); 3122 return PTR_ERR(sensor->xclk); 3123 } 3124 3125 sensor->xclk_freq = clk_get_rate(sensor->xclk); 3126 if (sensor->xclk_freq < OV5640_XCLK_MIN || 3127 sensor->xclk_freq > OV5640_XCLK_MAX) { 3128 dev_err(dev, "xclk frequency out of range: %d Hz\n", 3129 sensor->xclk_freq); 3130 return -EINVAL; 3131 } 3132 3133 /* request optional power down pin */ 3134 sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown", 3135 GPIOD_OUT_HIGH); 3136 if (IS_ERR(sensor->pwdn_gpio)) 3137 return PTR_ERR(sensor->pwdn_gpio); 3138 3139 /* request optional reset pin */ 3140 sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset", 3141 GPIOD_OUT_HIGH); 3142 if (IS_ERR(sensor->reset_gpio)) 3143 return PTR_ERR(sensor->reset_gpio); 3144 3145 v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops); 3146 3147 sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | 3148 V4L2_SUBDEV_FL_HAS_EVENTS; 3149 sensor->pad.flags = MEDIA_PAD_FL_SOURCE; 3150 sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 3151 ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad); 3152 if (ret) 3153 return ret; 3154 3155 ret = ov5640_get_regulators(sensor); 3156 if (ret) 3157 return ret; 3158 3159 mutex_init(&sensor->lock); 3160 3161 ret = ov5640_check_chip_id(sensor); 3162 if (ret) 3163 goto entity_cleanup; 3164 3165 ret = ov5640_init_controls(sensor); 3166 if (ret) 3167 goto entity_cleanup; 3168 3169 ret = v4l2_async_register_subdev_sensor(&sensor->sd); 3170 if (ret) 3171 goto free_ctrls; 3172 3173 return 0; 3174 3175 free_ctrls: 3176 v4l2_ctrl_handler_free(&sensor->ctrls.handler); 3177 entity_cleanup: 3178 media_entity_cleanup(&sensor->sd.entity); 3179 mutex_destroy(&sensor->lock); 3180 return ret; 3181 } 3182 3183 static int ov5640_remove(struct i2c_client *client) 3184 { 3185 struct v4l2_subdev *sd = i2c_get_clientdata(client); 3186 struct ov5640_dev *sensor = to_ov5640_dev(sd); 3187 3188 v4l2_async_unregister_subdev(&sensor->sd); 3189 media_entity_cleanup(&sensor->sd.entity); 3190 v4l2_ctrl_handler_free(&sensor->ctrls.handler); 3191 mutex_destroy(&sensor->lock); 3192 3193 return 0; 3194 } 3195 3196 static const struct i2c_device_id ov5640_id[] = { 3197 {"ov5640", 0}, 3198 {}, 3199 }; 3200 MODULE_DEVICE_TABLE(i2c, ov5640_id); 3201 3202 static const struct of_device_id ov5640_dt_ids[] = { 3203 { .compatible = "ovti,ov5640" }, 3204 { /* sentinel */ } 3205 }; 3206 MODULE_DEVICE_TABLE(of, ov5640_dt_ids); 3207 3208 static struct i2c_driver ov5640_i2c_driver = { 3209 .driver = { 3210 .name = "ov5640", 3211 .of_match_table = ov5640_dt_ids, 3212 }, 3213 .id_table = ov5640_id, 3214 .probe_new = ov5640_probe, 3215 .remove = ov5640_remove, 3216 }; 3217 3218 module_i2c_driver(ov5640_i2c_driver); 3219 3220 MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver"); 3221 MODULE_LICENSE("GPL"); 3222