1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. 4 * Copyright (C) 2014-2017 Mentor Graphics Inc. 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/clk-provider.h> 9 #include <linux/clkdev.h> 10 #include <linux/ctype.h> 11 #include <linux/delay.h> 12 #include <linux/device.h> 13 #include <linux/gpio/consumer.h> 14 #include <linux/i2c.h> 15 #include <linux/init.h> 16 #include <linux/module.h> 17 #include <linux/of_device.h> 18 #include <linux/regulator/consumer.h> 19 #include <linux/slab.h> 20 #include <linux/types.h> 21 #include <media/v4l2-async.h> 22 #include <media/v4l2-ctrls.h> 23 #include <media/v4l2-device.h> 24 #include <media/v4l2-event.h> 25 #include <media/v4l2-fwnode.h> 26 #include <media/v4l2-subdev.h> 27 28 /* min/typical/max system clock (xclk) frequencies */ 29 #define OV5640_XCLK_MIN 6000000 30 #define OV5640_XCLK_MAX 54000000 31 32 #define OV5640_DEFAULT_SLAVE_ID 0x3c 33 34 #define OV5640_REG_SYS_RESET02 0x3002 35 #define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006 36 #define OV5640_REG_SYS_CTRL0 0x3008 37 #define OV5640_REG_CHIP_ID 0x300a 38 #define OV5640_REG_IO_MIPI_CTRL00 0x300e 39 #define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017 40 #define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018 41 #define OV5640_REG_PAD_OUTPUT00 0x3019 42 #define OV5640_REG_SYSTEM_CONTROL1 0x302e 43 #define OV5640_REG_SC_PLL_CTRL0 0x3034 44 #define OV5640_REG_SC_PLL_CTRL1 0x3035 45 #define OV5640_REG_SC_PLL_CTRL2 0x3036 46 #define OV5640_REG_SC_PLL_CTRL3 0x3037 47 #define OV5640_REG_SLAVE_ID 0x3100 48 #define OV5640_REG_SCCB_SYS_CTRL1 0x3103 49 #define OV5640_REG_SYS_ROOT_DIVIDER 0x3108 50 #define OV5640_REG_AWB_R_GAIN 0x3400 51 #define OV5640_REG_AWB_G_GAIN 0x3402 52 #define OV5640_REG_AWB_B_GAIN 0x3404 53 #define OV5640_REG_AWB_MANUAL_CTRL 0x3406 54 #define OV5640_REG_AEC_PK_EXPOSURE_HI 0x3500 55 #define OV5640_REG_AEC_PK_EXPOSURE_MED 0x3501 56 #define OV5640_REG_AEC_PK_EXPOSURE_LO 0x3502 57 #define OV5640_REG_AEC_PK_MANUAL 0x3503 58 #define OV5640_REG_AEC_PK_REAL_GAIN 0x350a 59 #define OV5640_REG_AEC_PK_VTS 0x350c 60 #define OV5640_REG_TIMING_DVPHO 0x3808 61 #define OV5640_REG_TIMING_DVPVO 0x380a 62 #define OV5640_REG_TIMING_HTS 0x380c 63 #define OV5640_REG_TIMING_VTS 0x380e 64 #define OV5640_REG_TIMING_TC_REG20 0x3820 65 #define OV5640_REG_TIMING_TC_REG21 0x3821 66 #define OV5640_REG_AEC_CTRL00 0x3a00 67 #define OV5640_REG_AEC_B50_STEP 0x3a08 68 #define OV5640_REG_AEC_B60_STEP 0x3a0a 69 #define OV5640_REG_AEC_CTRL0D 0x3a0d 70 #define OV5640_REG_AEC_CTRL0E 0x3a0e 71 #define OV5640_REG_AEC_CTRL0F 0x3a0f 72 #define OV5640_REG_AEC_CTRL10 0x3a10 73 #define OV5640_REG_AEC_CTRL11 0x3a11 74 #define OV5640_REG_AEC_CTRL1B 0x3a1b 75 #define OV5640_REG_AEC_CTRL1E 0x3a1e 76 #define OV5640_REG_AEC_CTRL1F 0x3a1f 77 #define OV5640_REG_HZ5060_CTRL00 0x3c00 78 #define OV5640_REG_HZ5060_CTRL01 0x3c01 79 #define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c 80 #define OV5640_REG_FRAME_CTRL01 0x4202 81 #define OV5640_REG_FORMAT_CONTROL00 0x4300 82 #define OV5640_REG_VFIFO_HSIZE 0x4602 83 #define OV5640_REG_VFIFO_VSIZE 0x4604 84 #define OV5640_REG_JPG_MODE_SELECT 0x4713 85 #define OV5640_REG_POLARITY_CTRL00 0x4740 86 #define OV5640_REG_MIPI_CTRL00 0x4800 87 #define OV5640_REG_DEBUG_MODE 0x4814 88 #define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f 89 #define OV5640_REG_PRE_ISP_TEST_SET1 0x503d 90 #define OV5640_REG_SDE_CTRL0 0x5580 91 #define OV5640_REG_SDE_CTRL1 0x5581 92 #define OV5640_REG_SDE_CTRL3 0x5583 93 #define OV5640_REG_SDE_CTRL4 0x5584 94 #define OV5640_REG_SDE_CTRL5 0x5585 95 #define OV5640_REG_AVG_READOUT 0x56a1 96 97 enum ov5640_mode_id { 98 OV5640_MODE_QCIF_176_144 = 0, 99 OV5640_MODE_QVGA_320_240, 100 OV5640_MODE_VGA_640_480, 101 OV5640_MODE_NTSC_720_480, 102 OV5640_MODE_PAL_720_576, 103 OV5640_MODE_XGA_1024_768, 104 OV5640_MODE_720P_1280_720, 105 OV5640_MODE_1080P_1920_1080, 106 OV5640_MODE_QSXGA_2592_1944, 107 OV5640_NUM_MODES, 108 }; 109 110 enum ov5640_frame_rate { 111 OV5640_15_FPS = 0, 112 OV5640_30_FPS, 113 OV5640_60_FPS, 114 OV5640_NUM_FRAMERATES, 115 }; 116 117 enum ov5640_format_mux { 118 OV5640_FMT_MUX_YUV422 = 0, 119 OV5640_FMT_MUX_RGB, 120 OV5640_FMT_MUX_DITHER, 121 OV5640_FMT_MUX_RAW_DPC, 122 OV5640_FMT_MUX_SNR_RAW, 123 OV5640_FMT_MUX_RAW_CIP, 124 }; 125 126 struct ov5640_pixfmt { 127 u32 code; 128 u32 colorspace; 129 }; 130 131 static const struct ov5640_pixfmt ov5640_formats[] = { 132 { MEDIA_BUS_FMT_JPEG_1X8, V4L2_COLORSPACE_JPEG, }, 133 { MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB, }, 134 { MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB, }, 135 { MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB, }, 136 { MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB, }, 137 { MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB, }, 138 { MEDIA_BUS_FMT_SGBRG8_1X8, V4L2_COLORSPACE_SRGB, }, 139 { MEDIA_BUS_FMT_SGRBG8_1X8, V4L2_COLORSPACE_SRGB, }, 140 { MEDIA_BUS_FMT_SRGGB8_1X8, V4L2_COLORSPACE_SRGB, }, 141 }; 142 143 /* 144 * FIXME: remove this when a subdev API becomes available 145 * to set the MIPI CSI-2 virtual channel. 146 */ 147 static unsigned int virtual_channel; 148 module_param(virtual_channel, uint, 0444); 149 MODULE_PARM_DESC(virtual_channel, 150 "MIPI CSI-2 virtual channel (0..3), default 0"); 151 152 static const int ov5640_framerates[] = { 153 [OV5640_15_FPS] = 15, 154 [OV5640_30_FPS] = 30, 155 [OV5640_60_FPS] = 60, 156 }; 157 158 /* regulator supplies */ 159 static const char * const ov5640_supply_name[] = { 160 "DOVDD", /* Digital I/O (1.8V) supply */ 161 "AVDD", /* Analog (2.8V) supply */ 162 "DVDD", /* Digital Core (1.5V) supply */ 163 }; 164 165 #define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name) 166 167 /* 168 * Image size under 1280 * 960 are SUBSAMPLING 169 * Image size upper 1280 * 960 are SCALING 170 */ 171 enum ov5640_downsize_mode { 172 SUBSAMPLING, 173 SCALING, 174 }; 175 176 struct reg_value { 177 u16 reg_addr; 178 u8 val; 179 u8 mask; 180 u32 delay_ms; 181 }; 182 183 struct ov5640_mode_info { 184 enum ov5640_mode_id id; 185 enum ov5640_downsize_mode dn_mode; 186 u32 hact; 187 u32 htot; 188 u32 vact; 189 u32 vtot; 190 const struct reg_value *reg_data; 191 u32 reg_data_size; 192 }; 193 194 struct ov5640_ctrls { 195 struct v4l2_ctrl_handler handler; 196 struct v4l2_ctrl *pixel_rate; 197 struct { 198 struct v4l2_ctrl *auto_exp; 199 struct v4l2_ctrl *exposure; 200 }; 201 struct { 202 struct v4l2_ctrl *auto_wb; 203 struct v4l2_ctrl *blue_balance; 204 struct v4l2_ctrl *red_balance; 205 }; 206 struct { 207 struct v4l2_ctrl *auto_gain; 208 struct v4l2_ctrl *gain; 209 }; 210 struct v4l2_ctrl *brightness; 211 struct v4l2_ctrl *light_freq; 212 struct v4l2_ctrl *saturation; 213 struct v4l2_ctrl *contrast; 214 struct v4l2_ctrl *hue; 215 struct v4l2_ctrl *test_pattern; 216 struct v4l2_ctrl *hflip; 217 struct v4l2_ctrl *vflip; 218 }; 219 220 struct ov5640_dev { 221 struct i2c_client *i2c_client; 222 struct v4l2_subdev sd; 223 struct media_pad pad; 224 struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */ 225 struct clk *xclk; /* system clock to OV5640 */ 226 u32 xclk_freq; 227 228 struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES]; 229 struct gpio_desc *reset_gpio; 230 struct gpio_desc *pwdn_gpio; 231 bool upside_down; 232 233 /* lock to protect all members below */ 234 struct mutex lock; 235 236 int power_count; 237 238 struct v4l2_mbus_framefmt fmt; 239 bool pending_fmt_change; 240 241 const struct ov5640_mode_info *current_mode; 242 const struct ov5640_mode_info *last_mode; 243 enum ov5640_frame_rate current_fr; 244 struct v4l2_fract frame_interval; 245 246 struct ov5640_ctrls ctrls; 247 248 u32 prev_sysclk, prev_hts; 249 u32 ae_low, ae_high, ae_target; 250 251 bool pending_mode_change; 252 bool streaming; 253 }; 254 255 static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd) 256 { 257 return container_of(sd, struct ov5640_dev, sd); 258 } 259 260 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl) 261 { 262 return &container_of(ctrl->handler, struct ov5640_dev, 263 ctrls.handler)->sd; 264 } 265 266 /* 267 * FIXME: all of these register tables are likely filled with 268 * entries that set the register to their power-on default values, 269 * and which are otherwise not touched by this driver. Those entries 270 * should be identified and removed to speed register load time 271 * over i2c. 272 */ 273 /* YUV422 UYVY VGA@30fps */ 274 static const struct reg_value ov5640_init_setting_30fps_VGA[] = { 275 {0x3103, 0x11, 0, 0}, {0x3008, 0x82, 0, 5}, {0x3008, 0x42, 0, 0}, 276 {0x3103, 0x03, 0, 0}, {0x3017, 0x00, 0, 0}, {0x3018, 0x00, 0, 0}, 277 {0x3630, 0x36, 0, 0}, 278 {0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0}, 279 {0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0}, 280 {0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0}, 281 {0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0}, 282 {0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0}, 283 {0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0}, 284 {0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0}, 285 {0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0}, 286 {0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0}, 287 {0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0}, 288 {0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0}, 289 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 290 {0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0}, 291 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 292 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 293 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 294 {0x3810, 0x00, 0, 0}, 295 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, 296 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 297 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 298 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 299 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 300 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 301 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0}, 302 {0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0}, 303 {0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0}, 304 {0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0}, 305 {0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 306 {0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0}, 307 {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0}, 308 {0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0}, 309 {0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0}, 310 {0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0}, 311 {0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0}, 312 {0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0}, 313 {0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0}, 314 {0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0}, 315 {0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0}, 316 {0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0}, 317 {0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0}, 318 {0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0}, 319 {0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0}, 320 {0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0}, 321 {0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0}, 322 {0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0}, 323 {0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0}, 324 {0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0}, 325 {0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0}, 326 {0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0}, 327 {0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0}, 328 {0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0}, 329 {0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0}, 330 {0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0}, 331 {0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0}, 332 {0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0}, 333 {0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0}, 334 {0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0}, 335 {0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0}, 336 {0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0}, 337 {0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0}, 338 {0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0}, 339 {0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0}, 340 {0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0}, 341 {0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0}, 342 {0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0}, 343 {0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0}, 344 {0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0}, 345 {0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0}, 346 {0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0}, 347 {0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0}, 348 {0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0}, 349 {0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0}, 350 {0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0}, 351 {0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0}, 352 {0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0}, 353 {0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0}, 354 {0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0}, 355 {0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0}, 356 {0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300}, 357 }; 358 359 static const struct reg_value ov5640_setting_VGA_640_480[] = { 360 {0x3c07, 0x08, 0, 0}, 361 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 362 {0x3814, 0x31, 0, 0}, 363 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 364 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 365 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 366 {0x3810, 0x00, 0, 0}, 367 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, 368 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 369 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 370 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 371 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 372 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 373 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 374 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 375 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, 376 }; 377 378 static const struct reg_value ov5640_setting_XGA_1024_768[] = { 379 {0x3c07, 0x08, 0, 0}, 380 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 381 {0x3814, 0x31, 0, 0}, 382 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 383 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 384 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 385 {0x3810, 0x00, 0, 0}, 386 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, 387 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 388 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 389 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 390 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 391 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 392 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 393 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 394 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, 395 }; 396 397 static const struct reg_value ov5640_setting_QVGA_320_240[] = { 398 {0x3c07, 0x08, 0, 0}, 399 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 400 {0x3814, 0x31, 0, 0}, 401 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 402 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 403 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 404 {0x3810, 0x00, 0, 0}, 405 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, 406 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 407 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 408 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 409 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 410 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 411 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 412 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 413 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, 414 }; 415 416 static const struct reg_value ov5640_setting_QCIF_176_144[] = { 417 {0x3c07, 0x08, 0, 0}, 418 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 419 {0x3814, 0x31, 0, 0}, 420 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 421 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 422 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 423 {0x3810, 0x00, 0, 0}, 424 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, 425 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 426 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 427 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 428 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 429 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 430 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 431 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 432 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, 433 }; 434 435 static const struct reg_value ov5640_setting_NTSC_720_480[] = { 436 {0x3c07, 0x08, 0, 0}, 437 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 438 {0x3814, 0x31, 0, 0}, 439 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 440 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 441 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 442 {0x3810, 0x00, 0, 0}, 443 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x3c, 0, 0}, 444 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 445 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 446 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 447 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 448 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 449 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 450 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 451 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, 452 }; 453 454 static const struct reg_value ov5640_setting_PAL_720_576[] = { 455 {0x3c07, 0x08, 0, 0}, 456 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 457 {0x3814, 0x31, 0, 0}, 458 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 459 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, 460 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, 461 {0x3810, 0x00, 0, 0}, 462 {0x3811, 0x38, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, 463 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 464 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, 465 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 466 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 467 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 468 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 469 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 470 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, 471 }; 472 473 static const struct reg_value ov5640_setting_720P_1280_720[] = { 474 {0x3c07, 0x07, 0, 0}, 475 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 476 {0x3814, 0x31, 0, 0}, 477 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 478 {0x3802, 0x00, 0, 0}, {0x3803, 0xfa, 0, 0}, {0x3804, 0x0a, 0, 0}, 479 {0x3805, 0x3f, 0, 0}, {0x3806, 0x06, 0, 0}, {0x3807, 0xa9, 0, 0}, 480 {0x3810, 0x00, 0, 0}, 481 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0}, 482 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, 483 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0}, 484 {0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0}, 485 {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0}, 486 {0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0}, 487 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, 488 {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, 489 {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0}, 490 }; 491 492 static const struct reg_value ov5640_setting_1080P_1920_1080[] = { 493 {0x3c07, 0x08, 0, 0}, 494 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 495 {0x3814, 0x11, 0, 0}, 496 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 497 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0}, 498 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0}, 499 {0x3810, 0x00, 0, 0}, 500 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0}, 501 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0}, 502 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0}, 503 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 504 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 505 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 506 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, 507 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 508 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0}, 509 {0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0}, 510 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 511 {0x3800, 0x01, 0, 0}, {0x3801, 0x50, 0, 0}, {0x3802, 0x01, 0, 0}, 512 {0x3803, 0xb2, 0, 0}, {0x3804, 0x08, 0, 0}, {0x3805, 0xef, 0, 0}, 513 {0x3806, 0x05, 0, 0}, {0x3807, 0xf1, 0, 0}, 514 {0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0}, 515 {0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0}, 516 {0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0}, 517 {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0}, 518 {0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0}, 519 {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0}, 520 {0x4005, 0x1a, 0, 0}, 521 }; 522 523 static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = { 524 {0x3c07, 0x08, 0, 0}, 525 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, 526 {0x3814, 0x11, 0, 0}, 527 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, 528 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0}, 529 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0}, 530 {0x3810, 0x00, 0, 0}, 531 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0}, 532 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0}, 533 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0}, 534 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, 535 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, 536 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, 537 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, 538 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, 539 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70}, 540 }; 541 542 /* power-on sensor init reg table */ 543 static const struct ov5640_mode_info ov5640_mode_init_data = { 544 0, SUBSAMPLING, 640, 1896, 480, 984, 545 ov5640_init_setting_30fps_VGA, 546 ARRAY_SIZE(ov5640_init_setting_30fps_VGA), 547 }; 548 549 static const struct ov5640_mode_info 550 ov5640_mode_data[OV5640_NUM_MODES] = { 551 {OV5640_MODE_QCIF_176_144, SUBSAMPLING, 552 176, 1896, 144, 984, 553 ov5640_setting_QCIF_176_144, 554 ARRAY_SIZE(ov5640_setting_QCIF_176_144)}, 555 {OV5640_MODE_QVGA_320_240, SUBSAMPLING, 556 320, 1896, 240, 984, 557 ov5640_setting_QVGA_320_240, 558 ARRAY_SIZE(ov5640_setting_QVGA_320_240)}, 559 {OV5640_MODE_VGA_640_480, SUBSAMPLING, 560 640, 1896, 480, 1080, 561 ov5640_setting_VGA_640_480, 562 ARRAY_SIZE(ov5640_setting_VGA_640_480)}, 563 {OV5640_MODE_NTSC_720_480, SUBSAMPLING, 564 720, 1896, 480, 984, 565 ov5640_setting_NTSC_720_480, 566 ARRAY_SIZE(ov5640_setting_NTSC_720_480)}, 567 {OV5640_MODE_PAL_720_576, SUBSAMPLING, 568 720, 1896, 576, 984, 569 ov5640_setting_PAL_720_576, 570 ARRAY_SIZE(ov5640_setting_PAL_720_576)}, 571 {OV5640_MODE_XGA_1024_768, SUBSAMPLING, 572 1024, 1896, 768, 1080, 573 ov5640_setting_XGA_1024_768, 574 ARRAY_SIZE(ov5640_setting_XGA_1024_768)}, 575 {OV5640_MODE_720P_1280_720, SUBSAMPLING, 576 1280, 1892, 720, 740, 577 ov5640_setting_720P_1280_720, 578 ARRAY_SIZE(ov5640_setting_720P_1280_720)}, 579 {OV5640_MODE_1080P_1920_1080, SCALING, 580 1920, 2500, 1080, 1120, 581 ov5640_setting_1080P_1920_1080, 582 ARRAY_SIZE(ov5640_setting_1080P_1920_1080)}, 583 {OV5640_MODE_QSXGA_2592_1944, SCALING, 584 2592, 2844, 1944, 1968, 585 ov5640_setting_QSXGA_2592_1944, 586 ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944)}, 587 }; 588 589 static int ov5640_init_slave_id(struct ov5640_dev *sensor) 590 { 591 struct i2c_client *client = sensor->i2c_client; 592 struct i2c_msg msg; 593 u8 buf[3]; 594 int ret; 595 596 if (client->addr == OV5640_DEFAULT_SLAVE_ID) 597 return 0; 598 599 buf[0] = OV5640_REG_SLAVE_ID >> 8; 600 buf[1] = OV5640_REG_SLAVE_ID & 0xff; 601 buf[2] = client->addr << 1; 602 603 msg.addr = OV5640_DEFAULT_SLAVE_ID; 604 msg.flags = 0; 605 msg.buf = buf; 606 msg.len = sizeof(buf); 607 608 ret = i2c_transfer(client->adapter, &msg, 1); 609 if (ret < 0) { 610 dev_err(&client->dev, "%s: failed with %d\n", __func__, ret); 611 return ret; 612 } 613 614 return 0; 615 } 616 617 static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val) 618 { 619 struct i2c_client *client = sensor->i2c_client; 620 struct i2c_msg msg; 621 u8 buf[3]; 622 int ret; 623 624 buf[0] = reg >> 8; 625 buf[1] = reg & 0xff; 626 buf[2] = val; 627 628 msg.addr = client->addr; 629 msg.flags = client->flags; 630 msg.buf = buf; 631 msg.len = sizeof(buf); 632 633 ret = i2c_transfer(client->adapter, &msg, 1); 634 if (ret < 0) { 635 dev_err(&client->dev, "%s: error: reg=%x, val=%x\n", 636 __func__, reg, val); 637 return ret; 638 } 639 640 return 0; 641 } 642 643 static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val) 644 { 645 struct i2c_client *client = sensor->i2c_client; 646 struct i2c_msg msg[2]; 647 u8 buf[2]; 648 int ret; 649 650 buf[0] = reg >> 8; 651 buf[1] = reg & 0xff; 652 653 msg[0].addr = client->addr; 654 msg[0].flags = client->flags; 655 msg[0].buf = buf; 656 msg[0].len = sizeof(buf); 657 658 msg[1].addr = client->addr; 659 msg[1].flags = client->flags | I2C_M_RD; 660 msg[1].buf = buf; 661 msg[1].len = 1; 662 663 ret = i2c_transfer(client->adapter, msg, 2); 664 if (ret < 0) { 665 dev_err(&client->dev, "%s: error: reg=%x\n", 666 __func__, reg); 667 return ret; 668 } 669 670 *val = buf[0]; 671 return 0; 672 } 673 674 static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val) 675 { 676 u8 hi, lo; 677 int ret; 678 679 ret = ov5640_read_reg(sensor, reg, &hi); 680 if (ret) 681 return ret; 682 ret = ov5640_read_reg(sensor, reg + 1, &lo); 683 if (ret) 684 return ret; 685 686 *val = ((u16)hi << 8) | (u16)lo; 687 return 0; 688 } 689 690 static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val) 691 { 692 int ret; 693 694 ret = ov5640_write_reg(sensor, reg, val >> 8); 695 if (ret) 696 return ret; 697 698 return ov5640_write_reg(sensor, reg + 1, val & 0xff); 699 } 700 701 static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg, 702 u8 mask, u8 val) 703 { 704 u8 readval; 705 int ret; 706 707 ret = ov5640_read_reg(sensor, reg, &readval); 708 if (ret) 709 return ret; 710 711 readval &= ~mask; 712 val &= mask; 713 val |= readval; 714 715 return ov5640_write_reg(sensor, reg, val); 716 } 717 718 /* 719 * After trying the various combinations, reading various 720 * documentations spread around the net, and from the various 721 * feedback, the clock tree is probably as follows: 722 * 723 * +--------------+ 724 * | Ext. Clock | 725 * +-+------------+ 726 * | +----------+ 727 * +->| PLL1 | - reg 0x3036, for the multiplier 728 * +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider 729 * | +--------------+ 730 * +->| System Clock | - reg 0x3035, bits 4-7 731 * +-+------------+ 732 * | +--------------+ 733 * +->| MIPI Divider | - reg 0x3035, bits 0-3 734 * | +-+------------+ 735 * | +----------------> MIPI SCLK 736 * | + +-----+ 737 * | +->| / 2 |-------> MIPI BIT CLK 738 * | +-----+ 739 * | +--------------+ 740 * +->| PLL Root Div | - reg 0x3037, bit 4 741 * +-+------------+ 742 * | +---------+ 743 * +->| Bit Div | - reg 0x3035, bits 0-3 744 * +-+-------+ 745 * | +-------------+ 746 * +->| SCLK Div | - reg 0x3108, bits 0-1 747 * | +-+-----------+ 748 * | +---------------> SCLK 749 * | +-------------+ 750 * +->| SCLK 2X Div | - reg 0x3108, bits 2-3 751 * | +-+-----------+ 752 * | +---------------> SCLK 2X 753 * | +-------------+ 754 * +->| PCLK Div | - reg 0x3108, bits 4-5 755 * ++------------+ 756 * + +-----------+ 757 * +->| P_DIV | - reg 0x3035, bits 0-3 758 * +-----+-----+ 759 * +------------> PCLK 760 * 761 * This is deviating from the datasheet at least for the register 762 * 0x3108, since it's said here that the PCLK would be clocked from 763 * the PLL. 764 * 765 * There seems to be also (unverified) constraints: 766 * - the PLL pre-divider output rate should be in the 4-27MHz range 767 * - the PLL multiplier output rate should be in the 500-1000MHz range 768 * - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG 769 * 770 * In the two latter cases, these constraints are met since our 771 * factors are hardcoded. If we were to change that, we would need to 772 * take this into account. The only varying parts are the PLL 773 * multiplier and the system clock divider, which are shared between 774 * all these clocks so won't cause any issue. 775 */ 776 777 /* 778 * This is supposed to be ranging from 1 to 8, but the value is always 779 * set to 3 in the vendor kernels. 780 */ 781 #define OV5640_PLL_PREDIV 3 782 783 #define OV5640_PLL_MULT_MIN 4 784 #define OV5640_PLL_MULT_MAX 252 785 786 /* 787 * This is supposed to be ranging from 1 to 16, but the value is 788 * always set to either 1 or 2 in the vendor kernels. 789 */ 790 #define OV5640_SYSDIV_MIN 1 791 #define OV5640_SYSDIV_MAX 16 792 793 /* 794 * Hardcode these values for scaler and non-scaler modes. 795 * FIXME: to be re-calcualted for 1 data lanes setups 796 */ 797 #define OV5640_MIPI_DIV_PCLK 2 798 #define OV5640_MIPI_DIV_SCLK 1 799 800 /* 801 * This is supposed to be ranging from 1 to 2, but the value is always 802 * set to 2 in the vendor kernels. 803 */ 804 #define OV5640_PLL_ROOT_DIV 2 805 #define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 BIT(4) 806 807 /* 808 * We only supports 8-bit formats at the moment 809 */ 810 #define OV5640_BIT_DIV 2 811 #define OV5640_PLL_CTRL0_MIPI_MODE_8BIT 0x08 812 813 /* 814 * This is supposed to be ranging from 1 to 8, but the value is always 815 * set to 2 in the vendor kernels. 816 */ 817 #define OV5640_SCLK_ROOT_DIV 2 818 819 /* 820 * This is hardcoded so that the consistency is maintained between SCLK and 821 * SCLK 2x. 822 */ 823 #define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2) 824 825 /* 826 * This is supposed to be ranging from 1 to 8, but the value is always 827 * set to 1 in the vendor kernels. 828 */ 829 #define OV5640_PCLK_ROOT_DIV 1 830 #define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00 831 832 static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor, 833 u8 pll_prediv, u8 pll_mult, 834 u8 sysdiv) 835 { 836 unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult; 837 838 /* PLL1 output cannot exceed 1GHz. */ 839 if (sysclk / 1000000 > 1000) 840 return 0; 841 842 return sysclk / sysdiv; 843 } 844 845 static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor, 846 unsigned long rate, 847 u8 *pll_prediv, u8 *pll_mult, 848 u8 *sysdiv) 849 { 850 unsigned long best = ~0; 851 u8 best_sysdiv = 1, best_mult = 1; 852 u8 _sysdiv, _pll_mult; 853 854 for (_sysdiv = OV5640_SYSDIV_MIN; 855 _sysdiv <= OV5640_SYSDIV_MAX; 856 _sysdiv++) { 857 for (_pll_mult = OV5640_PLL_MULT_MIN; 858 _pll_mult <= OV5640_PLL_MULT_MAX; 859 _pll_mult++) { 860 unsigned long _rate; 861 862 /* 863 * The PLL multiplier cannot be odd if above 864 * 127. 865 */ 866 if (_pll_mult > 127 && (_pll_mult % 2)) 867 continue; 868 869 _rate = ov5640_compute_sys_clk(sensor, 870 OV5640_PLL_PREDIV, 871 _pll_mult, _sysdiv); 872 873 /* 874 * We have reached the maximum allowed PLL1 output, 875 * increase sysdiv. 876 */ 877 if (!rate) 878 break; 879 880 /* 881 * Prefer rates above the expected clock rate than 882 * below, even if that means being less precise. 883 */ 884 if (_rate < rate) 885 continue; 886 887 if (abs(rate - _rate) < abs(rate - best)) { 888 best = _rate; 889 best_sysdiv = _sysdiv; 890 best_mult = _pll_mult; 891 } 892 893 if (_rate == rate) 894 goto out; 895 } 896 } 897 898 out: 899 *sysdiv = best_sysdiv; 900 *pll_prediv = OV5640_PLL_PREDIV; 901 *pll_mult = best_mult; 902 903 return best; 904 } 905 906 /* 907 * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values 908 * for the MIPI CSI-2 output. 909 * 910 * @rate: The requested bandwidth per lane in bytes per second. 911 * 'Bandwidth Per Lane' is calculated as: 912 * bpl = HTOT * VTOT * FPS * bpp / num_lanes; 913 * 914 * This function use the requested bandwidth to calculate: 915 * - sample_rate = bpl / (bpp / num_lanes); 916 * = bpl / (PLL_RDIV * BIT_DIV * PCLK_DIV * MIPI_DIV / num_lanes); 917 * 918 * - mipi_sclk = bpl / MIPI_DIV / 2; ( / 2 is for CSI-2 DDR) 919 * 920 * with these fixed parameters: 921 * PLL_RDIV = 2; 922 * BIT_DIVIDER = 2; (MIPI_BIT_MODE == 8 ? 2 : 2,5); 923 * PCLK_DIV = 1; 924 * 925 * The MIPI clock generation differs for modes that use the scaler and modes 926 * that do not. In case the scaler is in use, the MIPI_SCLK generates the MIPI 927 * BIT CLk, and thus: 928 * 929 * - mipi_sclk = bpl / MIPI_DIV / 2; 930 * MIPI_DIV = 1; 931 * 932 * For modes that do not go through the scaler, the MIPI BIT CLOCK is generated 933 * from the pixel clock, and thus: 934 * 935 * - sample_rate = bpl / (bpp / num_lanes); 936 * = bpl / (2 * 2 * 1 * MIPI_DIV / num_lanes); 937 * = bpl / (4 * MIPI_DIV / num_lanes); 938 * - MIPI_DIV = bpp / (4 * num_lanes); 939 * 940 * FIXME: this have been tested with 16bpp and 2 lanes setup only. 941 * MIPI_DIV is fixed to value 2, but it -might- be changed according to the 942 * above formula for setups with 1 lane or image formats with different bpp. 943 * 944 * FIXME: this deviates from the sensor manual documentation which is quite 945 * thin on the MIPI clock tree generation part. 946 */ 947 static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor, 948 unsigned long rate) 949 { 950 const struct ov5640_mode_info *mode = sensor->current_mode; 951 u8 prediv, mult, sysdiv; 952 u8 mipi_div; 953 int ret; 954 955 /* 956 * 1280x720 is reported to use 'SUBSAMPLING' only, 957 * but according to the sensor manual it goes through the 958 * scaler before subsampling. 959 */ 960 if (mode->dn_mode == SCALING || 961 (mode->id == OV5640_MODE_720P_1280_720)) 962 mipi_div = OV5640_MIPI_DIV_SCLK; 963 else 964 mipi_div = OV5640_MIPI_DIV_PCLK; 965 966 ov5640_calc_sys_clk(sensor, rate, &prediv, &mult, &sysdiv); 967 968 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0, 969 0x0f, OV5640_PLL_CTRL0_MIPI_MODE_8BIT); 970 971 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1, 972 0xff, sysdiv << 4 | mipi_div); 973 if (ret) 974 return ret; 975 976 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult); 977 if (ret) 978 return ret; 979 980 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3, 981 0x1f, OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 | prediv); 982 if (ret) 983 return ret; 984 985 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 986 0x30, OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS); 987 } 988 989 static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor, 990 unsigned long rate, 991 u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv, 992 u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div) 993 { 994 unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV * 995 OV5640_PCLK_ROOT_DIV; 996 997 _rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult, 998 sysdiv); 999 *pll_rdiv = OV5640_PLL_ROOT_DIV; 1000 *bit_div = OV5640_BIT_DIV; 1001 *pclk_div = OV5640_PCLK_ROOT_DIV; 1002 1003 return _rate / *pll_rdiv / *bit_div / *pclk_div; 1004 } 1005 1006 static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor, unsigned long rate) 1007 { 1008 u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div; 1009 int ret; 1010 1011 ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv, 1012 &bit_div, &pclk_div); 1013 1014 if (bit_div == 2) 1015 bit_div = 8; 1016 1017 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0, 1018 0x0f, bit_div); 1019 if (ret) 1020 return ret; 1021 1022 /* 1023 * We need to set sysdiv according to the clock, and to clear 1024 * the MIPI divider. 1025 */ 1026 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1, 1027 0xff, sysdiv << 4); 1028 if (ret) 1029 return ret; 1030 1031 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 1032 0xff, mult); 1033 if (ret) 1034 return ret; 1035 1036 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3, 1037 0x1f, prediv | ((pll_rdiv - 1) << 4)); 1038 if (ret) 1039 return ret; 1040 1041 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30, 1042 (ilog2(pclk_div) << 4)); 1043 } 1044 1045 /* set JPEG framing sizes */ 1046 static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor, 1047 const struct ov5640_mode_info *mode) 1048 { 1049 int ret; 1050 1051 /* 1052 * compression mode 3 timing 1053 * 1054 * Data is transmitted with programmable width (VFIFO_HSIZE). 1055 * No padding done. Last line may have less data. Varying 1056 * number of lines per frame, depending on amount of data. 1057 */ 1058 ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3); 1059 if (ret < 0) 1060 return ret; 1061 1062 ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->hact); 1063 if (ret < 0) 1064 return ret; 1065 1066 return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->vact); 1067 } 1068 1069 /* download ov5640 settings to sensor through i2c */ 1070 static int ov5640_set_timings(struct ov5640_dev *sensor, 1071 const struct ov5640_mode_info *mode) 1072 { 1073 int ret; 1074 1075 if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) { 1076 ret = ov5640_set_jpeg_timings(sensor, mode); 1077 if (ret < 0) 1078 return ret; 1079 } 1080 1081 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->hact); 1082 if (ret < 0) 1083 return ret; 1084 1085 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->vact); 1086 if (ret < 0) 1087 return ret; 1088 1089 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, mode->htot); 1090 if (ret < 0) 1091 return ret; 1092 1093 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, mode->vtot); 1094 } 1095 1096 static int ov5640_load_regs(struct ov5640_dev *sensor, 1097 const struct ov5640_mode_info *mode) 1098 { 1099 const struct reg_value *regs = mode->reg_data; 1100 unsigned int i; 1101 u32 delay_ms; 1102 u16 reg_addr; 1103 u8 mask, val; 1104 int ret = 0; 1105 1106 for (i = 0; i < mode->reg_data_size; ++i, ++regs) { 1107 delay_ms = regs->delay_ms; 1108 reg_addr = regs->reg_addr; 1109 val = regs->val; 1110 mask = regs->mask; 1111 1112 if (mask) 1113 ret = ov5640_mod_reg(sensor, reg_addr, mask, val); 1114 else 1115 ret = ov5640_write_reg(sensor, reg_addr, val); 1116 if (ret) 1117 break; 1118 1119 if (delay_ms) 1120 usleep_range(1000 * delay_ms, 1000 * delay_ms + 100); 1121 } 1122 1123 return ov5640_set_timings(sensor, mode); 1124 } 1125 1126 static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on) 1127 { 1128 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL, 1129 BIT(0), on ? 0 : BIT(0)); 1130 } 1131 1132 /* read exposure, in number of line periods */ 1133 static int ov5640_get_exposure(struct ov5640_dev *sensor) 1134 { 1135 int exp, ret; 1136 u8 temp; 1137 1138 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp); 1139 if (ret) 1140 return ret; 1141 exp = ((int)temp & 0x0f) << 16; 1142 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp); 1143 if (ret) 1144 return ret; 1145 exp |= ((int)temp << 8); 1146 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp); 1147 if (ret) 1148 return ret; 1149 exp |= (int)temp; 1150 1151 return exp >> 4; 1152 } 1153 1154 /* write exposure, given number of line periods */ 1155 static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure) 1156 { 1157 int ret; 1158 1159 exposure <<= 4; 1160 1161 ret = ov5640_write_reg(sensor, 1162 OV5640_REG_AEC_PK_EXPOSURE_LO, 1163 exposure & 0xff); 1164 if (ret) 1165 return ret; 1166 ret = ov5640_write_reg(sensor, 1167 OV5640_REG_AEC_PK_EXPOSURE_MED, 1168 (exposure >> 8) & 0xff); 1169 if (ret) 1170 return ret; 1171 return ov5640_write_reg(sensor, 1172 OV5640_REG_AEC_PK_EXPOSURE_HI, 1173 (exposure >> 16) & 0x0f); 1174 } 1175 1176 static int ov5640_get_gain(struct ov5640_dev *sensor) 1177 { 1178 u16 gain; 1179 int ret; 1180 1181 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain); 1182 if (ret) 1183 return ret; 1184 1185 return gain & 0x3ff; 1186 } 1187 1188 static int ov5640_set_gain(struct ov5640_dev *sensor, int gain) 1189 { 1190 return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, 1191 (u16)gain & 0x3ff); 1192 } 1193 1194 static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on) 1195 { 1196 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL, 1197 BIT(1), on ? 0 : BIT(1)); 1198 } 1199 1200 static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on) 1201 { 1202 int ret; 1203 unsigned int flags = sensor->ep.bus.parallel.flags; 1204 u8 pclk_pol = 0; 1205 u8 hsync_pol = 0; 1206 u8 vsync_pol = 0; 1207 1208 /* 1209 * Note about parallel port configuration. 1210 * 1211 * When configured in parallel mode, the OV5640 will 1212 * output 10 bits data on DVP data lines [9:0]. 1213 * If only 8 bits data are wanted, the 8 bits data lines 1214 * of the camera interface must be physically connected 1215 * on the DVP data lines [9:2]. 1216 * 1217 * Control lines polarity can be configured through 1218 * devicetree endpoint control lines properties. 1219 * If no endpoint control lines properties are set, 1220 * polarity will be as below: 1221 * - VSYNC: active high 1222 * - HREF: active low 1223 * - PCLK: active low 1224 */ 1225 1226 if (on) { 1227 /* 1228 * configure parallel port control lines polarity 1229 * 1230 * POLARITY CTRL0 1231 * - [5]: PCLK polarity (0: active low, 1: active high) 1232 * - [1]: HREF polarity (0: active low, 1: active high) 1233 * - [0]: VSYNC polarity (mismatch here between 1234 * datasheet and hardware, 0 is active high 1235 * and 1 is active low...) 1236 */ 1237 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING) 1238 pclk_pol = 1; 1239 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) 1240 hsync_pol = 1; 1241 if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) 1242 vsync_pol = 1; 1243 1244 ret = ov5640_write_reg(sensor, 1245 OV5640_REG_POLARITY_CTRL00, 1246 (pclk_pol << 5) | 1247 (hsync_pol << 1) | 1248 vsync_pol); 1249 1250 if (ret) 1251 return ret; 1252 } 1253 1254 /* 1255 * powerdown MIPI TX/RX PHY & disable MIPI 1256 * 1257 * MIPI CONTROL 00 1258 * 4: PWDN PHY TX 1259 * 3: PWDN PHY RX 1260 * 2: MIPI enable 1261 */ 1262 ret = ov5640_write_reg(sensor, 1263 OV5640_REG_IO_MIPI_CTRL00, on ? 0x18 : 0); 1264 if (ret) 1265 return ret; 1266 1267 /* 1268 * enable VSYNC/HREF/PCLK DVP control lines 1269 * & D[9:6] DVP data lines 1270 * 1271 * PAD OUTPUT ENABLE 01 1272 * - 6: VSYNC output enable 1273 * - 5: HREF output enable 1274 * - 4: PCLK output enable 1275 * - [3:0]: D[9:6] output enable 1276 */ 1277 ret = ov5640_write_reg(sensor, 1278 OV5640_REG_PAD_OUTPUT_ENABLE01, 1279 on ? 0x7f : 0); 1280 if (ret) 1281 return ret; 1282 1283 /* 1284 * enable D[5:0] DVP data lines 1285 * 1286 * PAD OUTPUT ENABLE 02 1287 * - [7:2]: D[5:0] output enable 1288 */ 1289 return ov5640_write_reg(sensor, 1290 OV5640_REG_PAD_OUTPUT_ENABLE02, 1291 on ? 0xfc : 0); 1292 } 1293 1294 static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on) 1295 { 1296 int ret; 1297 1298 /* 1299 * Enable/disable the MIPI interface 1300 * 1301 * 0x300e = on ? 0x45 : 0x40 1302 * 1303 * FIXME: the sensor manual (version 2.03) reports 1304 * [7:5] = 000 : 1 data lane mode 1305 * [7:5] = 001 : 2 data lanes mode 1306 * But this settings do not work, while the following ones 1307 * have been validated for 2 data lanes mode. 1308 * 1309 * [7:5] = 010 : 2 data lanes mode 1310 * [4] = 0 : Power up MIPI HS Tx 1311 * [3] = 0 : Power up MIPI LS Rx 1312 * [2] = 1/0 : MIPI interface enable/disable 1313 * [1:0] = 01/00: FIXME: 'debug' 1314 */ 1315 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 1316 on ? 0x45 : 0x40); 1317 if (ret) 1318 return ret; 1319 1320 return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01, 1321 on ? 0x00 : 0x0f); 1322 } 1323 1324 static int ov5640_get_sysclk(struct ov5640_dev *sensor) 1325 { 1326 /* calculate sysclk */ 1327 u32 xvclk = sensor->xclk_freq / 10000; 1328 u32 multiplier, prediv, VCO, sysdiv, pll_rdiv; 1329 u32 sclk_rdiv_map[] = {1, 2, 4, 8}; 1330 u32 bit_div2x = 1, sclk_rdiv, sysclk; 1331 u8 temp1, temp2; 1332 int ret; 1333 1334 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1); 1335 if (ret) 1336 return ret; 1337 temp2 = temp1 & 0x0f; 1338 if (temp2 == 8 || temp2 == 10) 1339 bit_div2x = temp2 / 2; 1340 1341 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1); 1342 if (ret) 1343 return ret; 1344 sysdiv = temp1 >> 4; 1345 if (sysdiv == 0) 1346 sysdiv = 16; 1347 1348 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1); 1349 if (ret) 1350 return ret; 1351 multiplier = temp1; 1352 1353 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1); 1354 if (ret) 1355 return ret; 1356 prediv = temp1 & 0x0f; 1357 pll_rdiv = ((temp1 >> 4) & 0x01) + 1; 1358 1359 ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1); 1360 if (ret) 1361 return ret; 1362 temp2 = temp1 & 0x03; 1363 sclk_rdiv = sclk_rdiv_map[temp2]; 1364 1365 if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x) 1366 return -EINVAL; 1367 1368 VCO = xvclk * multiplier / prediv; 1369 1370 sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv; 1371 1372 return sysclk; 1373 } 1374 1375 static int ov5640_set_night_mode(struct ov5640_dev *sensor) 1376 { 1377 /* read HTS from register settings */ 1378 u8 mode; 1379 int ret; 1380 1381 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode); 1382 if (ret) 1383 return ret; 1384 mode &= 0xfb; 1385 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode); 1386 } 1387 1388 static int ov5640_get_hts(struct ov5640_dev *sensor) 1389 { 1390 /* read HTS from register settings */ 1391 u16 hts; 1392 int ret; 1393 1394 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts); 1395 if (ret) 1396 return ret; 1397 return hts; 1398 } 1399 1400 static int ov5640_get_vts(struct ov5640_dev *sensor) 1401 { 1402 u16 vts; 1403 int ret; 1404 1405 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts); 1406 if (ret) 1407 return ret; 1408 return vts; 1409 } 1410 1411 static int ov5640_set_vts(struct ov5640_dev *sensor, int vts) 1412 { 1413 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts); 1414 } 1415 1416 static int ov5640_get_light_freq(struct ov5640_dev *sensor) 1417 { 1418 /* get banding filter value */ 1419 int ret, light_freq = 0; 1420 u8 temp, temp1; 1421 1422 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp); 1423 if (ret) 1424 return ret; 1425 1426 if (temp & 0x80) { 1427 /* manual */ 1428 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00, 1429 &temp1); 1430 if (ret) 1431 return ret; 1432 if (temp1 & 0x04) { 1433 /* 50Hz */ 1434 light_freq = 50; 1435 } else { 1436 /* 60Hz */ 1437 light_freq = 60; 1438 } 1439 } else { 1440 /* auto */ 1441 ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C, 1442 &temp1); 1443 if (ret) 1444 return ret; 1445 1446 if (temp1 & 0x01) { 1447 /* 50Hz */ 1448 light_freq = 50; 1449 } else { 1450 /* 60Hz */ 1451 } 1452 } 1453 1454 return light_freq; 1455 } 1456 1457 static int ov5640_set_bandingfilter(struct ov5640_dev *sensor) 1458 { 1459 u32 band_step60, max_band60, band_step50, max_band50, prev_vts; 1460 int ret; 1461 1462 /* read preview PCLK */ 1463 ret = ov5640_get_sysclk(sensor); 1464 if (ret < 0) 1465 return ret; 1466 if (ret == 0) 1467 return -EINVAL; 1468 sensor->prev_sysclk = ret; 1469 /* read preview HTS */ 1470 ret = ov5640_get_hts(sensor); 1471 if (ret < 0) 1472 return ret; 1473 if (ret == 0) 1474 return -EINVAL; 1475 sensor->prev_hts = ret; 1476 1477 /* read preview VTS */ 1478 ret = ov5640_get_vts(sensor); 1479 if (ret < 0) 1480 return ret; 1481 prev_vts = ret; 1482 1483 /* calculate banding filter */ 1484 /* 60Hz */ 1485 band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120; 1486 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60); 1487 if (ret) 1488 return ret; 1489 if (!band_step60) 1490 return -EINVAL; 1491 max_band60 = (int)((prev_vts - 4) / band_step60); 1492 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60); 1493 if (ret) 1494 return ret; 1495 1496 /* 50Hz */ 1497 band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts; 1498 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50); 1499 if (ret) 1500 return ret; 1501 if (!band_step50) 1502 return -EINVAL; 1503 max_band50 = (int)((prev_vts - 4) / band_step50); 1504 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50); 1505 } 1506 1507 static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target) 1508 { 1509 /* stable in high */ 1510 u32 fast_high, fast_low; 1511 int ret; 1512 1513 sensor->ae_low = target * 23 / 25; /* 0.92 */ 1514 sensor->ae_high = target * 27 / 25; /* 1.08 */ 1515 1516 fast_high = sensor->ae_high << 1; 1517 if (fast_high > 255) 1518 fast_high = 255; 1519 1520 fast_low = sensor->ae_low >> 1; 1521 1522 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high); 1523 if (ret) 1524 return ret; 1525 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low); 1526 if (ret) 1527 return ret; 1528 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high); 1529 if (ret) 1530 return ret; 1531 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low); 1532 if (ret) 1533 return ret; 1534 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high); 1535 if (ret) 1536 return ret; 1537 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low); 1538 } 1539 1540 static int ov5640_get_binning(struct ov5640_dev *sensor) 1541 { 1542 u8 temp; 1543 int ret; 1544 1545 ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp); 1546 if (ret) 1547 return ret; 1548 1549 return temp & BIT(0); 1550 } 1551 1552 static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable) 1553 { 1554 int ret; 1555 1556 /* 1557 * TIMING TC REG21: 1558 * - [0]: Horizontal binning enable 1559 */ 1560 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21, 1561 BIT(0), enable ? BIT(0) : 0); 1562 if (ret) 1563 return ret; 1564 /* 1565 * TIMING TC REG20: 1566 * - [0]: Undocumented, but hardcoded init sequences 1567 * are always setting REG21/REG20 bit 0 to same value... 1568 */ 1569 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20, 1570 BIT(0), enable ? BIT(0) : 0); 1571 } 1572 1573 static int ov5640_set_virtual_channel(struct ov5640_dev *sensor) 1574 { 1575 struct i2c_client *client = sensor->i2c_client; 1576 u8 temp, channel = virtual_channel; 1577 int ret; 1578 1579 if (channel > 3) { 1580 dev_err(&client->dev, 1581 "%s: wrong virtual_channel parameter, expected (0..3), got %d\n", 1582 __func__, channel); 1583 return -EINVAL; 1584 } 1585 1586 ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp); 1587 if (ret) 1588 return ret; 1589 temp &= ~(3 << 6); 1590 temp |= (channel << 6); 1591 return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp); 1592 } 1593 1594 static const struct ov5640_mode_info * 1595 ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr, 1596 int width, int height, bool nearest) 1597 { 1598 const struct ov5640_mode_info *mode; 1599 1600 mode = v4l2_find_nearest_size(ov5640_mode_data, 1601 ARRAY_SIZE(ov5640_mode_data), 1602 hact, vact, 1603 width, height); 1604 1605 if (!mode || 1606 (!nearest && (mode->hact != width || mode->vact != height))) 1607 return NULL; 1608 1609 /* Only 640x480 can operate at 60fps (for now) */ 1610 if (fr == OV5640_60_FPS && 1611 !(mode->hact == 640 && mode->vact == 480)) 1612 return NULL; 1613 1614 /* 2592x1944 only works at 15fps max */ 1615 if ((mode->hact == 2592 && mode->vact == 1944) && 1616 fr > OV5640_15_FPS) 1617 return NULL; 1618 1619 return mode; 1620 } 1621 1622 static u64 ov5640_calc_pixel_rate(struct ov5640_dev *sensor) 1623 { 1624 u64 rate; 1625 1626 rate = sensor->current_mode->vtot * sensor->current_mode->htot; 1627 rate *= ov5640_framerates[sensor->current_fr]; 1628 1629 return rate; 1630 } 1631 1632 /* 1633 * sensor changes between scaling and subsampling, go through 1634 * exposure calculation 1635 */ 1636 static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor, 1637 const struct ov5640_mode_info *mode) 1638 { 1639 u32 prev_shutter, prev_gain16; 1640 u32 cap_shutter, cap_gain16; 1641 u32 cap_sysclk, cap_hts, cap_vts; 1642 u32 light_freq, cap_bandfilt, cap_maxband; 1643 u32 cap_gain16_shutter; 1644 u8 average; 1645 int ret; 1646 1647 if (!mode->reg_data) 1648 return -EINVAL; 1649 1650 /* read preview shutter */ 1651 ret = ov5640_get_exposure(sensor); 1652 if (ret < 0) 1653 return ret; 1654 prev_shutter = ret; 1655 ret = ov5640_get_binning(sensor); 1656 if (ret < 0) 1657 return ret; 1658 if (ret && mode->id != OV5640_MODE_720P_1280_720 && 1659 mode->id != OV5640_MODE_1080P_1920_1080) 1660 prev_shutter *= 2; 1661 1662 /* read preview gain */ 1663 ret = ov5640_get_gain(sensor); 1664 if (ret < 0) 1665 return ret; 1666 prev_gain16 = ret; 1667 1668 /* get average */ 1669 ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average); 1670 if (ret) 1671 return ret; 1672 1673 /* turn off night mode for capture */ 1674 ret = ov5640_set_night_mode(sensor); 1675 if (ret < 0) 1676 return ret; 1677 1678 /* Write capture setting */ 1679 ret = ov5640_load_regs(sensor, mode); 1680 if (ret < 0) 1681 return ret; 1682 1683 /* read capture VTS */ 1684 ret = ov5640_get_vts(sensor); 1685 if (ret < 0) 1686 return ret; 1687 cap_vts = ret; 1688 ret = ov5640_get_hts(sensor); 1689 if (ret < 0) 1690 return ret; 1691 if (ret == 0) 1692 return -EINVAL; 1693 cap_hts = ret; 1694 1695 ret = ov5640_get_sysclk(sensor); 1696 if (ret < 0) 1697 return ret; 1698 if (ret == 0) 1699 return -EINVAL; 1700 cap_sysclk = ret; 1701 1702 /* calculate capture banding filter */ 1703 ret = ov5640_get_light_freq(sensor); 1704 if (ret < 0) 1705 return ret; 1706 light_freq = ret; 1707 1708 if (light_freq == 60) { 1709 /* 60Hz */ 1710 cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120; 1711 } else { 1712 /* 50Hz */ 1713 cap_bandfilt = cap_sysclk * 100 / cap_hts; 1714 } 1715 1716 if (!sensor->prev_sysclk) { 1717 ret = ov5640_get_sysclk(sensor); 1718 if (ret < 0) 1719 return ret; 1720 if (ret == 0) 1721 return -EINVAL; 1722 sensor->prev_sysclk = ret; 1723 } 1724 1725 if (!cap_bandfilt) 1726 return -EINVAL; 1727 1728 cap_maxband = (int)((cap_vts - 4) / cap_bandfilt); 1729 1730 /* calculate capture shutter/gain16 */ 1731 if (average > sensor->ae_low && average < sensor->ae_high) { 1732 /* in stable range */ 1733 cap_gain16_shutter = 1734 prev_gain16 * prev_shutter * 1735 cap_sysclk / sensor->prev_sysclk * 1736 sensor->prev_hts / cap_hts * 1737 sensor->ae_target / average; 1738 } else { 1739 cap_gain16_shutter = 1740 prev_gain16 * prev_shutter * 1741 cap_sysclk / sensor->prev_sysclk * 1742 sensor->prev_hts / cap_hts; 1743 } 1744 1745 /* gain to shutter */ 1746 if (cap_gain16_shutter < (cap_bandfilt * 16)) { 1747 /* shutter < 1/100 */ 1748 cap_shutter = cap_gain16_shutter / 16; 1749 if (cap_shutter < 1) 1750 cap_shutter = 1; 1751 1752 cap_gain16 = cap_gain16_shutter / cap_shutter; 1753 if (cap_gain16 < 16) 1754 cap_gain16 = 16; 1755 } else { 1756 if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) { 1757 /* exposure reach max */ 1758 cap_shutter = cap_bandfilt * cap_maxband; 1759 if (!cap_shutter) 1760 return -EINVAL; 1761 1762 cap_gain16 = cap_gain16_shutter / cap_shutter; 1763 } else { 1764 /* 1/100 < (cap_shutter = n/100) =< max */ 1765 cap_shutter = 1766 ((int)(cap_gain16_shutter / 16 / cap_bandfilt)) 1767 * cap_bandfilt; 1768 if (!cap_shutter) 1769 return -EINVAL; 1770 1771 cap_gain16 = cap_gain16_shutter / cap_shutter; 1772 } 1773 } 1774 1775 /* set capture gain */ 1776 ret = ov5640_set_gain(sensor, cap_gain16); 1777 if (ret) 1778 return ret; 1779 1780 /* write capture shutter */ 1781 if (cap_shutter > (cap_vts - 4)) { 1782 cap_vts = cap_shutter + 4; 1783 ret = ov5640_set_vts(sensor, cap_vts); 1784 if (ret < 0) 1785 return ret; 1786 } 1787 1788 /* set exposure */ 1789 return ov5640_set_exposure(sensor, cap_shutter); 1790 } 1791 1792 /* 1793 * if sensor changes inside scaling or subsampling 1794 * change mode directly 1795 */ 1796 static int ov5640_set_mode_direct(struct ov5640_dev *sensor, 1797 const struct ov5640_mode_info *mode) 1798 { 1799 if (!mode->reg_data) 1800 return -EINVAL; 1801 1802 /* Write capture setting */ 1803 return ov5640_load_regs(sensor, mode); 1804 } 1805 1806 static int ov5640_set_mode(struct ov5640_dev *sensor) 1807 { 1808 const struct ov5640_mode_info *mode = sensor->current_mode; 1809 const struct ov5640_mode_info *orig_mode = sensor->last_mode; 1810 enum ov5640_downsize_mode dn_mode, orig_dn_mode; 1811 bool auto_gain = sensor->ctrls.auto_gain->val == 1; 1812 bool auto_exp = sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO; 1813 unsigned long rate; 1814 int ret; 1815 1816 dn_mode = mode->dn_mode; 1817 orig_dn_mode = orig_mode->dn_mode; 1818 1819 /* auto gain and exposure must be turned off when changing modes */ 1820 if (auto_gain) { 1821 ret = ov5640_set_autogain(sensor, false); 1822 if (ret) 1823 return ret; 1824 } 1825 1826 if (auto_exp) { 1827 ret = ov5640_set_autoexposure(sensor, false); 1828 if (ret) 1829 goto restore_auto_gain; 1830 } 1831 1832 /* 1833 * All the formats we support have 16 bits per pixel, seems to require 1834 * the same rate than YUV, so we can just use 16 bpp all the time. 1835 */ 1836 rate = ov5640_calc_pixel_rate(sensor) * 16; 1837 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) { 1838 rate = rate / sensor->ep.bus.mipi_csi2.num_data_lanes; 1839 ret = ov5640_set_mipi_pclk(sensor, rate); 1840 } else { 1841 rate = rate / sensor->ep.bus.parallel.bus_width; 1842 ret = ov5640_set_dvp_pclk(sensor, rate); 1843 } 1844 1845 if (ret < 0) 1846 return 0; 1847 1848 if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) || 1849 (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) { 1850 /* 1851 * change between subsampling and scaling 1852 * go through exposure calculation 1853 */ 1854 ret = ov5640_set_mode_exposure_calc(sensor, mode); 1855 } else { 1856 /* 1857 * change inside subsampling or scaling 1858 * download firmware directly 1859 */ 1860 ret = ov5640_set_mode_direct(sensor, mode); 1861 } 1862 if (ret < 0) 1863 goto restore_auto_exp_gain; 1864 1865 /* restore auto gain and exposure */ 1866 if (auto_gain) 1867 ov5640_set_autogain(sensor, true); 1868 if (auto_exp) 1869 ov5640_set_autoexposure(sensor, true); 1870 1871 ret = ov5640_set_binning(sensor, dn_mode != SCALING); 1872 if (ret < 0) 1873 return ret; 1874 ret = ov5640_set_ae_target(sensor, sensor->ae_target); 1875 if (ret < 0) 1876 return ret; 1877 ret = ov5640_get_light_freq(sensor); 1878 if (ret < 0) 1879 return ret; 1880 ret = ov5640_set_bandingfilter(sensor); 1881 if (ret < 0) 1882 return ret; 1883 ret = ov5640_set_virtual_channel(sensor); 1884 if (ret < 0) 1885 return ret; 1886 1887 sensor->pending_mode_change = false; 1888 sensor->last_mode = mode; 1889 1890 return 0; 1891 1892 restore_auto_exp_gain: 1893 if (auto_exp) 1894 ov5640_set_autoexposure(sensor, true); 1895 restore_auto_gain: 1896 if (auto_gain) 1897 ov5640_set_autogain(sensor, true); 1898 1899 return ret; 1900 } 1901 1902 static int ov5640_set_framefmt(struct ov5640_dev *sensor, 1903 struct v4l2_mbus_framefmt *format); 1904 1905 /* restore the last set video mode after chip power-on */ 1906 static int ov5640_restore_mode(struct ov5640_dev *sensor) 1907 { 1908 int ret; 1909 1910 /* first load the initial register values */ 1911 ret = ov5640_load_regs(sensor, &ov5640_mode_init_data); 1912 if (ret < 0) 1913 return ret; 1914 sensor->last_mode = &ov5640_mode_init_data; 1915 1916 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f, 1917 (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) | 1918 ilog2(OV5640_SCLK_ROOT_DIV)); 1919 if (ret) 1920 return ret; 1921 1922 /* now restore the last capture mode */ 1923 ret = ov5640_set_mode(sensor); 1924 if (ret < 0) 1925 return ret; 1926 1927 return ov5640_set_framefmt(sensor, &sensor->fmt); 1928 } 1929 1930 static void ov5640_power(struct ov5640_dev *sensor, bool enable) 1931 { 1932 gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1); 1933 } 1934 1935 static void ov5640_reset(struct ov5640_dev *sensor) 1936 { 1937 if (!sensor->reset_gpio) 1938 return; 1939 1940 gpiod_set_value_cansleep(sensor->reset_gpio, 0); 1941 1942 /* camera power cycle */ 1943 ov5640_power(sensor, false); 1944 usleep_range(5000, 10000); 1945 ov5640_power(sensor, true); 1946 usleep_range(5000, 10000); 1947 1948 gpiod_set_value_cansleep(sensor->reset_gpio, 1); 1949 usleep_range(1000, 2000); 1950 1951 gpiod_set_value_cansleep(sensor->reset_gpio, 0); 1952 usleep_range(20000, 25000); 1953 } 1954 1955 static int ov5640_set_power_on(struct ov5640_dev *sensor) 1956 { 1957 struct i2c_client *client = sensor->i2c_client; 1958 int ret; 1959 1960 ret = clk_prepare_enable(sensor->xclk); 1961 if (ret) { 1962 dev_err(&client->dev, "%s: failed to enable clock\n", 1963 __func__); 1964 return ret; 1965 } 1966 1967 ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES, 1968 sensor->supplies); 1969 if (ret) { 1970 dev_err(&client->dev, "%s: failed to enable regulators\n", 1971 __func__); 1972 goto xclk_off; 1973 } 1974 1975 ov5640_reset(sensor); 1976 ov5640_power(sensor, true); 1977 1978 ret = ov5640_init_slave_id(sensor); 1979 if (ret) 1980 goto power_off; 1981 1982 return 0; 1983 1984 power_off: 1985 ov5640_power(sensor, false); 1986 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies); 1987 xclk_off: 1988 clk_disable_unprepare(sensor->xclk); 1989 return ret; 1990 } 1991 1992 static void ov5640_set_power_off(struct ov5640_dev *sensor) 1993 { 1994 ov5640_power(sensor, false); 1995 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies); 1996 clk_disable_unprepare(sensor->xclk); 1997 } 1998 1999 static int ov5640_set_power(struct ov5640_dev *sensor, bool on) 2000 { 2001 int ret = 0; 2002 2003 if (on) { 2004 ret = ov5640_set_power_on(sensor); 2005 if (ret) 2006 return ret; 2007 2008 ret = ov5640_restore_mode(sensor); 2009 if (ret) 2010 goto power_off; 2011 2012 /* We're done here for DVP bus, while CSI-2 needs setup. */ 2013 if (sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY) 2014 return 0; 2015 2016 /* 2017 * Power up MIPI HS Tx and LS Rx; 2 data lanes mode 2018 * 2019 * 0x300e = 0x40 2020 * [7:5] = 010 : 2 data lanes mode (see FIXME note in 2021 * "ov5640_set_stream_mipi()") 2022 * [4] = 0 : Power up MIPI HS Tx 2023 * [3] = 0 : Power up MIPI LS Rx 2024 * [2] = 0 : MIPI interface disabled 2025 */ 2026 ret = ov5640_write_reg(sensor, 2027 OV5640_REG_IO_MIPI_CTRL00, 0x40); 2028 if (ret) 2029 goto power_off; 2030 2031 /* 2032 * Gate clock and set LP11 in 'no packets mode' (idle) 2033 * 2034 * 0x4800 = 0x24 2035 * [5] = 1 : Gate clock when 'no packets' 2036 * [2] = 1 : MIPI bus in LP11 when 'no packets' 2037 */ 2038 ret = ov5640_write_reg(sensor, 2039 OV5640_REG_MIPI_CTRL00, 0x24); 2040 if (ret) 2041 goto power_off; 2042 2043 /* 2044 * Set data lanes and clock in LP11 when 'sleeping' 2045 * 2046 * 0x3019 = 0x70 2047 * [6] = 1 : MIPI data lane 2 in LP11 when 'sleeping' 2048 * [5] = 1 : MIPI data lane 1 in LP11 when 'sleeping' 2049 * [4] = 1 : MIPI clock lane in LP11 when 'sleeping' 2050 */ 2051 ret = ov5640_write_reg(sensor, 2052 OV5640_REG_PAD_OUTPUT00, 0x70); 2053 if (ret) 2054 goto power_off; 2055 2056 /* Give lanes some time to coax into LP11 state. */ 2057 usleep_range(500, 1000); 2058 2059 } else { 2060 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) { 2061 /* Reset MIPI bus settings to their default values. */ 2062 ov5640_write_reg(sensor, 2063 OV5640_REG_IO_MIPI_CTRL00, 0x58); 2064 ov5640_write_reg(sensor, 2065 OV5640_REG_MIPI_CTRL00, 0x04); 2066 ov5640_write_reg(sensor, 2067 OV5640_REG_PAD_OUTPUT00, 0x00); 2068 } 2069 2070 ov5640_set_power_off(sensor); 2071 } 2072 2073 return 0; 2074 2075 power_off: 2076 ov5640_set_power_off(sensor); 2077 return ret; 2078 } 2079 2080 /* --------------- Subdev Operations --------------- */ 2081 2082 static int ov5640_s_power(struct v4l2_subdev *sd, int on) 2083 { 2084 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2085 int ret = 0; 2086 2087 mutex_lock(&sensor->lock); 2088 2089 /* 2090 * If the power count is modified from 0 to != 0 or from != 0 to 0, 2091 * update the power state. 2092 */ 2093 if (sensor->power_count == !on) { 2094 ret = ov5640_set_power(sensor, !!on); 2095 if (ret) 2096 goto out; 2097 } 2098 2099 /* Update the power count. */ 2100 sensor->power_count += on ? 1 : -1; 2101 WARN_ON(sensor->power_count < 0); 2102 out: 2103 mutex_unlock(&sensor->lock); 2104 2105 if (on && !ret && sensor->power_count == 1) { 2106 /* restore controls */ 2107 ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler); 2108 } 2109 2110 return ret; 2111 } 2112 2113 static int ov5640_try_frame_interval(struct ov5640_dev *sensor, 2114 struct v4l2_fract *fi, 2115 u32 width, u32 height) 2116 { 2117 const struct ov5640_mode_info *mode; 2118 enum ov5640_frame_rate rate = OV5640_15_FPS; 2119 int minfps, maxfps, best_fps, fps; 2120 int i; 2121 2122 minfps = ov5640_framerates[OV5640_15_FPS]; 2123 maxfps = ov5640_framerates[OV5640_60_FPS]; 2124 2125 if (fi->numerator == 0) { 2126 fi->denominator = maxfps; 2127 fi->numerator = 1; 2128 rate = OV5640_60_FPS; 2129 goto find_mode; 2130 } 2131 2132 fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator), 2133 minfps, maxfps); 2134 2135 best_fps = minfps; 2136 for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) { 2137 int curr_fps = ov5640_framerates[i]; 2138 2139 if (abs(curr_fps - fps) < abs(best_fps - fps)) { 2140 best_fps = curr_fps; 2141 rate = i; 2142 } 2143 } 2144 2145 fi->numerator = 1; 2146 fi->denominator = best_fps; 2147 2148 find_mode: 2149 mode = ov5640_find_mode(sensor, rate, width, height, false); 2150 return mode ? rate : -EINVAL; 2151 } 2152 2153 static int ov5640_get_fmt(struct v4l2_subdev *sd, 2154 struct v4l2_subdev_pad_config *cfg, 2155 struct v4l2_subdev_format *format) 2156 { 2157 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2158 struct v4l2_mbus_framefmt *fmt; 2159 2160 if (format->pad != 0) 2161 return -EINVAL; 2162 2163 mutex_lock(&sensor->lock); 2164 2165 if (format->which == V4L2_SUBDEV_FORMAT_TRY) 2166 fmt = v4l2_subdev_get_try_format(&sensor->sd, cfg, 2167 format->pad); 2168 else 2169 fmt = &sensor->fmt; 2170 2171 format->format = *fmt; 2172 2173 mutex_unlock(&sensor->lock); 2174 2175 return 0; 2176 } 2177 2178 static int ov5640_try_fmt_internal(struct v4l2_subdev *sd, 2179 struct v4l2_mbus_framefmt *fmt, 2180 enum ov5640_frame_rate fr, 2181 const struct ov5640_mode_info **new_mode) 2182 { 2183 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2184 const struct ov5640_mode_info *mode; 2185 int i; 2186 2187 mode = ov5640_find_mode(sensor, fr, fmt->width, fmt->height, true); 2188 if (!mode) 2189 return -EINVAL; 2190 fmt->width = mode->hact; 2191 fmt->height = mode->vact; 2192 2193 if (new_mode) 2194 *new_mode = mode; 2195 2196 for (i = 0; i < ARRAY_SIZE(ov5640_formats); i++) 2197 if (ov5640_formats[i].code == fmt->code) 2198 break; 2199 if (i >= ARRAY_SIZE(ov5640_formats)) 2200 i = 0; 2201 2202 fmt->code = ov5640_formats[i].code; 2203 fmt->colorspace = ov5640_formats[i].colorspace; 2204 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); 2205 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; 2206 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); 2207 2208 return 0; 2209 } 2210 2211 static int ov5640_set_fmt(struct v4l2_subdev *sd, 2212 struct v4l2_subdev_pad_config *cfg, 2213 struct v4l2_subdev_format *format) 2214 { 2215 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2216 const struct ov5640_mode_info *new_mode; 2217 struct v4l2_mbus_framefmt *mbus_fmt = &format->format; 2218 struct v4l2_mbus_framefmt *fmt; 2219 int ret; 2220 2221 if (format->pad != 0) 2222 return -EINVAL; 2223 2224 mutex_lock(&sensor->lock); 2225 2226 if (sensor->streaming) { 2227 ret = -EBUSY; 2228 goto out; 2229 } 2230 2231 ret = ov5640_try_fmt_internal(sd, mbus_fmt, 2232 sensor->current_fr, &new_mode); 2233 if (ret) 2234 goto out; 2235 2236 if (format->which == V4L2_SUBDEV_FORMAT_TRY) 2237 fmt = v4l2_subdev_get_try_format(sd, cfg, 0); 2238 else 2239 fmt = &sensor->fmt; 2240 2241 *fmt = *mbus_fmt; 2242 2243 if (new_mode != sensor->current_mode) { 2244 sensor->current_mode = new_mode; 2245 sensor->pending_mode_change = true; 2246 } 2247 if (mbus_fmt->code != sensor->fmt.code) 2248 sensor->pending_fmt_change = true; 2249 2250 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, 2251 ov5640_calc_pixel_rate(sensor)); 2252 out: 2253 mutex_unlock(&sensor->lock); 2254 return ret; 2255 } 2256 2257 static int ov5640_set_framefmt(struct ov5640_dev *sensor, 2258 struct v4l2_mbus_framefmt *format) 2259 { 2260 int ret = 0; 2261 bool is_jpeg = false; 2262 u8 fmt, mux; 2263 2264 switch (format->code) { 2265 case MEDIA_BUS_FMT_UYVY8_2X8: 2266 /* YUV422, UYVY */ 2267 fmt = 0x3f; 2268 mux = OV5640_FMT_MUX_YUV422; 2269 break; 2270 case MEDIA_BUS_FMT_YUYV8_2X8: 2271 /* YUV422, YUYV */ 2272 fmt = 0x30; 2273 mux = OV5640_FMT_MUX_YUV422; 2274 break; 2275 case MEDIA_BUS_FMT_RGB565_2X8_LE: 2276 /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */ 2277 fmt = 0x6F; 2278 mux = OV5640_FMT_MUX_RGB; 2279 break; 2280 case MEDIA_BUS_FMT_RGB565_2X8_BE: 2281 /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */ 2282 fmt = 0x61; 2283 mux = OV5640_FMT_MUX_RGB; 2284 break; 2285 case MEDIA_BUS_FMT_JPEG_1X8: 2286 /* YUV422, YUYV */ 2287 fmt = 0x30; 2288 mux = OV5640_FMT_MUX_YUV422; 2289 is_jpeg = true; 2290 break; 2291 case MEDIA_BUS_FMT_SBGGR8_1X8: 2292 /* Raw, BGBG... / GRGR... */ 2293 fmt = 0x00; 2294 mux = OV5640_FMT_MUX_RAW_DPC; 2295 break; 2296 case MEDIA_BUS_FMT_SGBRG8_1X8: 2297 /* Raw bayer, GBGB... / RGRG... */ 2298 fmt = 0x01; 2299 mux = OV5640_FMT_MUX_RAW_DPC; 2300 break; 2301 case MEDIA_BUS_FMT_SGRBG8_1X8: 2302 /* Raw bayer, GRGR... / BGBG... */ 2303 fmt = 0x02; 2304 mux = OV5640_FMT_MUX_RAW_DPC; 2305 break; 2306 case MEDIA_BUS_FMT_SRGGB8_1X8: 2307 /* Raw bayer, RGRG... / GBGB... */ 2308 fmt = 0x03; 2309 mux = OV5640_FMT_MUX_RAW_DPC; 2310 break; 2311 default: 2312 return -EINVAL; 2313 } 2314 2315 /* FORMAT CONTROL00: YUV and RGB formatting */ 2316 ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, fmt); 2317 if (ret) 2318 return ret; 2319 2320 /* FORMAT MUX CONTROL: ISP YUV or RGB */ 2321 ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL, mux); 2322 if (ret) 2323 return ret; 2324 2325 /* 2326 * TIMING TC REG21: 2327 * - [5]: JPEG enable 2328 */ 2329 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21, 2330 BIT(5), is_jpeg ? BIT(5) : 0); 2331 if (ret) 2332 return ret; 2333 2334 /* 2335 * SYSTEM RESET02: 2336 * - [4]: Reset JFIFO 2337 * - [3]: Reset SFIFO 2338 * - [2]: Reset JPEG 2339 */ 2340 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02, 2341 BIT(4) | BIT(3) | BIT(2), 2342 is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2))); 2343 if (ret) 2344 return ret; 2345 2346 /* 2347 * CLOCK ENABLE02: 2348 * - [5]: Enable JPEG 2x clock 2349 * - [3]: Enable JPEG clock 2350 */ 2351 return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02, 2352 BIT(5) | BIT(3), 2353 is_jpeg ? (BIT(5) | BIT(3)) : 0); 2354 } 2355 2356 /* 2357 * Sensor Controls. 2358 */ 2359 2360 static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value) 2361 { 2362 int ret; 2363 2364 if (value) { 2365 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, 2366 BIT(0), BIT(0)); 2367 if (ret) 2368 return ret; 2369 ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value); 2370 } else { 2371 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0); 2372 } 2373 2374 return ret; 2375 } 2376 2377 static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value) 2378 { 2379 int ret; 2380 2381 if (value) { 2382 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, 2383 BIT(2), BIT(2)); 2384 if (ret) 2385 return ret; 2386 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5, 2387 value & 0xff); 2388 } else { 2389 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0); 2390 } 2391 2392 return ret; 2393 } 2394 2395 static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value) 2396 { 2397 int ret; 2398 2399 if (value) { 2400 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, 2401 BIT(1), BIT(1)); 2402 if (ret) 2403 return ret; 2404 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3, 2405 value & 0xff); 2406 if (ret) 2407 return ret; 2408 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4, 2409 value & 0xff); 2410 } else { 2411 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0); 2412 } 2413 2414 return ret; 2415 } 2416 2417 static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb) 2418 { 2419 int ret; 2420 2421 ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL, 2422 BIT(0), awb ? 0 : 1); 2423 if (ret) 2424 return ret; 2425 2426 if (!awb) { 2427 u16 red = (u16)sensor->ctrls.red_balance->val; 2428 u16 blue = (u16)sensor->ctrls.blue_balance->val; 2429 2430 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red); 2431 if (ret) 2432 return ret; 2433 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue); 2434 } 2435 2436 return ret; 2437 } 2438 2439 static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor, 2440 enum v4l2_exposure_auto_type auto_exposure) 2441 { 2442 struct ov5640_ctrls *ctrls = &sensor->ctrls; 2443 bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO); 2444 int ret = 0; 2445 2446 if (ctrls->auto_exp->is_new) { 2447 ret = ov5640_set_autoexposure(sensor, auto_exp); 2448 if (ret) 2449 return ret; 2450 } 2451 2452 if (!auto_exp && ctrls->exposure->is_new) { 2453 u16 max_exp; 2454 2455 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS, 2456 &max_exp); 2457 if (ret) 2458 return ret; 2459 ret = ov5640_get_vts(sensor); 2460 if (ret < 0) 2461 return ret; 2462 max_exp += ret; 2463 ret = 0; 2464 2465 if (ctrls->exposure->val < max_exp) 2466 ret = ov5640_set_exposure(sensor, ctrls->exposure->val); 2467 } 2468 2469 return ret; 2470 } 2471 2472 static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain) 2473 { 2474 struct ov5640_ctrls *ctrls = &sensor->ctrls; 2475 int ret = 0; 2476 2477 if (ctrls->auto_gain->is_new) { 2478 ret = ov5640_set_autogain(sensor, auto_gain); 2479 if (ret) 2480 return ret; 2481 } 2482 2483 if (!auto_gain && ctrls->gain->is_new) 2484 ret = ov5640_set_gain(sensor, ctrls->gain->val); 2485 2486 return ret; 2487 } 2488 2489 static const char * const test_pattern_menu[] = { 2490 "Disabled", 2491 "Color bars", 2492 "Color bars w/ rolling bar", 2493 "Color squares", 2494 "Color squares w/ rolling bar", 2495 }; 2496 2497 #define OV5640_TEST_ENABLE BIT(7) 2498 #define OV5640_TEST_ROLLING BIT(6) /* rolling horizontal bar */ 2499 #define OV5640_TEST_TRANSPARENT BIT(5) 2500 #define OV5640_TEST_SQUARE_BW BIT(4) /* black & white squares */ 2501 #define OV5640_TEST_BAR_STANDARD (0 << 2) 2502 #define OV5640_TEST_BAR_VERT_CHANGE_1 (1 << 2) 2503 #define OV5640_TEST_BAR_HOR_CHANGE (2 << 2) 2504 #define OV5640_TEST_BAR_VERT_CHANGE_2 (3 << 2) 2505 #define OV5640_TEST_BAR (0 << 0) 2506 #define OV5640_TEST_RANDOM (1 << 0) 2507 #define OV5640_TEST_SQUARE (2 << 0) 2508 #define OV5640_TEST_BLACK (3 << 0) 2509 2510 static const u8 test_pattern_val[] = { 2511 0, 2512 OV5640_TEST_ENABLE | OV5640_TEST_BAR_VERT_CHANGE_1 | 2513 OV5640_TEST_BAR, 2514 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | 2515 OV5640_TEST_BAR_VERT_CHANGE_1 | OV5640_TEST_BAR, 2516 OV5640_TEST_ENABLE | OV5640_TEST_SQUARE, 2517 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | OV5640_TEST_SQUARE, 2518 }; 2519 2520 static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value) 2521 { 2522 return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1, 2523 test_pattern_val[value]); 2524 } 2525 2526 static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value) 2527 { 2528 int ret; 2529 2530 ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7), 2531 (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ? 2532 0 : BIT(7)); 2533 if (ret) 2534 return ret; 2535 2536 return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2), 2537 (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ? 2538 BIT(2) : 0); 2539 } 2540 2541 static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value) 2542 { 2543 /* 2544 * If sensor is mounted upside down, mirror logic is inversed. 2545 * 2546 * Sensor is a BSI (Back Side Illuminated) one, 2547 * so image captured is physically mirrored. 2548 * This is why mirror logic is inversed in 2549 * order to cancel this mirror effect. 2550 */ 2551 2552 /* 2553 * TIMING TC REG21: 2554 * - [2]: ISP mirror 2555 * - [1]: Sensor mirror 2556 */ 2557 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21, 2558 BIT(2) | BIT(1), 2559 (!(value ^ sensor->upside_down)) ? 2560 (BIT(2) | BIT(1)) : 0); 2561 } 2562 2563 static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value) 2564 { 2565 /* If sensor is mounted upside down, flip logic is inversed */ 2566 2567 /* 2568 * TIMING TC REG20: 2569 * - [2]: ISP vflip 2570 * - [1]: Sensor vflip 2571 */ 2572 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20, 2573 BIT(2) | BIT(1), 2574 (value ^ sensor->upside_down) ? 2575 (BIT(2) | BIT(1)) : 0); 2576 } 2577 2578 static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl) 2579 { 2580 struct v4l2_subdev *sd = ctrl_to_sd(ctrl); 2581 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2582 int val; 2583 2584 /* v4l2_ctrl_lock() locks our own mutex */ 2585 2586 switch (ctrl->id) { 2587 case V4L2_CID_AUTOGAIN: 2588 val = ov5640_get_gain(sensor); 2589 if (val < 0) 2590 return val; 2591 sensor->ctrls.gain->val = val; 2592 break; 2593 case V4L2_CID_EXPOSURE_AUTO: 2594 val = ov5640_get_exposure(sensor); 2595 if (val < 0) 2596 return val; 2597 sensor->ctrls.exposure->val = val; 2598 break; 2599 } 2600 2601 return 0; 2602 } 2603 2604 static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl) 2605 { 2606 struct v4l2_subdev *sd = ctrl_to_sd(ctrl); 2607 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2608 int ret; 2609 2610 /* v4l2_ctrl_lock() locks our own mutex */ 2611 2612 /* 2613 * If the device is not powered up by the host driver do 2614 * not apply any controls to H/W at this time. Instead 2615 * the controls will be restored right after power-up. 2616 */ 2617 if (sensor->power_count == 0) 2618 return 0; 2619 2620 switch (ctrl->id) { 2621 case V4L2_CID_AUTOGAIN: 2622 ret = ov5640_set_ctrl_gain(sensor, ctrl->val); 2623 break; 2624 case V4L2_CID_EXPOSURE_AUTO: 2625 ret = ov5640_set_ctrl_exposure(sensor, ctrl->val); 2626 break; 2627 case V4L2_CID_AUTO_WHITE_BALANCE: 2628 ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val); 2629 break; 2630 case V4L2_CID_HUE: 2631 ret = ov5640_set_ctrl_hue(sensor, ctrl->val); 2632 break; 2633 case V4L2_CID_CONTRAST: 2634 ret = ov5640_set_ctrl_contrast(sensor, ctrl->val); 2635 break; 2636 case V4L2_CID_SATURATION: 2637 ret = ov5640_set_ctrl_saturation(sensor, ctrl->val); 2638 break; 2639 case V4L2_CID_TEST_PATTERN: 2640 ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val); 2641 break; 2642 case V4L2_CID_POWER_LINE_FREQUENCY: 2643 ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val); 2644 break; 2645 case V4L2_CID_HFLIP: 2646 ret = ov5640_set_ctrl_hflip(sensor, ctrl->val); 2647 break; 2648 case V4L2_CID_VFLIP: 2649 ret = ov5640_set_ctrl_vflip(sensor, ctrl->val); 2650 break; 2651 default: 2652 ret = -EINVAL; 2653 break; 2654 } 2655 2656 return ret; 2657 } 2658 2659 static const struct v4l2_ctrl_ops ov5640_ctrl_ops = { 2660 .g_volatile_ctrl = ov5640_g_volatile_ctrl, 2661 .s_ctrl = ov5640_s_ctrl, 2662 }; 2663 2664 static int ov5640_init_controls(struct ov5640_dev *sensor) 2665 { 2666 const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops; 2667 struct ov5640_ctrls *ctrls = &sensor->ctrls; 2668 struct v4l2_ctrl_handler *hdl = &ctrls->handler; 2669 int ret; 2670 2671 v4l2_ctrl_handler_init(hdl, 32); 2672 2673 /* we can use our own mutex for the ctrl lock */ 2674 hdl->lock = &sensor->lock; 2675 2676 /* Clock related controls */ 2677 ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE, 2678 0, INT_MAX, 1, 2679 ov5640_calc_pixel_rate(sensor)); 2680 2681 /* Auto/manual white balance */ 2682 ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops, 2683 V4L2_CID_AUTO_WHITE_BALANCE, 2684 0, 1, 1, 1); 2685 ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE, 2686 0, 4095, 1, 0); 2687 ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE, 2688 0, 4095, 1, 0); 2689 /* Auto/manual exposure */ 2690 ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops, 2691 V4L2_CID_EXPOSURE_AUTO, 2692 V4L2_EXPOSURE_MANUAL, 0, 2693 V4L2_EXPOSURE_AUTO); 2694 ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE, 2695 0, 65535, 1, 0); 2696 /* Auto/manual gain */ 2697 ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN, 2698 0, 1, 1, 1); 2699 ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN, 2700 0, 1023, 1, 0); 2701 2702 ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION, 2703 0, 255, 1, 64); 2704 ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE, 2705 0, 359, 1, 0); 2706 ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST, 2707 0, 255, 1, 0); 2708 ctrls->test_pattern = 2709 v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN, 2710 ARRAY_SIZE(test_pattern_menu) - 1, 2711 0, 0, test_pattern_menu); 2712 ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP, 2713 0, 1, 1, 0); 2714 ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP, 2715 0, 1, 1, 0); 2716 2717 ctrls->light_freq = 2718 v4l2_ctrl_new_std_menu(hdl, ops, 2719 V4L2_CID_POWER_LINE_FREQUENCY, 2720 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0, 2721 V4L2_CID_POWER_LINE_FREQUENCY_50HZ); 2722 2723 if (hdl->error) { 2724 ret = hdl->error; 2725 goto free_ctrls; 2726 } 2727 2728 ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY; 2729 ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE; 2730 ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE; 2731 2732 v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false); 2733 v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true); 2734 v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true); 2735 2736 sensor->sd.ctrl_handler = hdl; 2737 return 0; 2738 2739 free_ctrls: 2740 v4l2_ctrl_handler_free(hdl); 2741 return ret; 2742 } 2743 2744 static int ov5640_enum_frame_size(struct v4l2_subdev *sd, 2745 struct v4l2_subdev_pad_config *cfg, 2746 struct v4l2_subdev_frame_size_enum *fse) 2747 { 2748 if (fse->pad != 0) 2749 return -EINVAL; 2750 if (fse->index >= OV5640_NUM_MODES) 2751 return -EINVAL; 2752 2753 fse->min_width = 2754 ov5640_mode_data[fse->index].hact; 2755 fse->max_width = fse->min_width; 2756 fse->min_height = 2757 ov5640_mode_data[fse->index].vact; 2758 fse->max_height = fse->min_height; 2759 2760 return 0; 2761 } 2762 2763 static int ov5640_enum_frame_interval( 2764 struct v4l2_subdev *sd, 2765 struct v4l2_subdev_pad_config *cfg, 2766 struct v4l2_subdev_frame_interval_enum *fie) 2767 { 2768 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2769 struct v4l2_fract tpf; 2770 int ret; 2771 2772 if (fie->pad != 0) 2773 return -EINVAL; 2774 if (fie->index >= OV5640_NUM_FRAMERATES) 2775 return -EINVAL; 2776 2777 tpf.numerator = 1; 2778 tpf.denominator = ov5640_framerates[fie->index]; 2779 2780 ret = ov5640_try_frame_interval(sensor, &tpf, 2781 fie->width, fie->height); 2782 if (ret < 0) 2783 return -EINVAL; 2784 2785 fie->interval = tpf; 2786 return 0; 2787 } 2788 2789 static int ov5640_g_frame_interval(struct v4l2_subdev *sd, 2790 struct v4l2_subdev_frame_interval *fi) 2791 { 2792 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2793 2794 mutex_lock(&sensor->lock); 2795 fi->interval = sensor->frame_interval; 2796 mutex_unlock(&sensor->lock); 2797 2798 return 0; 2799 } 2800 2801 static int ov5640_s_frame_interval(struct v4l2_subdev *sd, 2802 struct v4l2_subdev_frame_interval *fi) 2803 { 2804 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2805 const struct ov5640_mode_info *mode; 2806 int frame_rate, ret = 0; 2807 2808 if (fi->pad != 0) 2809 return -EINVAL; 2810 2811 mutex_lock(&sensor->lock); 2812 2813 if (sensor->streaming) { 2814 ret = -EBUSY; 2815 goto out; 2816 } 2817 2818 mode = sensor->current_mode; 2819 2820 frame_rate = ov5640_try_frame_interval(sensor, &fi->interval, 2821 mode->hact, mode->vact); 2822 if (frame_rate < 0) { 2823 /* Always return a valid frame interval value */ 2824 fi->interval = sensor->frame_interval; 2825 goto out; 2826 } 2827 2828 mode = ov5640_find_mode(sensor, frame_rate, mode->hact, 2829 mode->vact, true); 2830 if (!mode) { 2831 ret = -EINVAL; 2832 goto out; 2833 } 2834 2835 if (mode != sensor->current_mode || 2836 frame_rate != sensor->current_fr) { 2837 sensor->current_fr = frame_rate; 2838 sensor->frame_interval = fi->interval; 2839 sensor->current_mode = mode; 2840 sensor->pending_mode_change = true; 2841 2842 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, 2843 ov5640_calc_pixel_rate(sensor)); 2844 } 2845 out: 2846 mutex_unlock(&sensor->lock); 2847 return ret; 2848 } 2849 2850 static int ov5640_enum_mbus_code(struct v4l2_subdev *sd, 2851 struct v4l2_subdev_pad_config *cfg, 2852 struct v4l2_subdev_mbus_code_enum *code) 2853 { 2854 if (code->pad != 0) 2855 return -EINVAL; 2856 if (code->index >= ARRAY_SIZE(ov5640_formats)) 2857 return -EINVAL; 2858 2859 code->code = ov5640_formats[code->index].code; 2860 return 0; 2861 } 2862 2863 static int ov5640_s_stream(struct v4l2_subdev *sd, int enable) 2864 { 2865 struct ov5640_dev *sensor = to_ov5640_dev(sd); 2866 int ret = 0; 2867 2868 mutex_lock(&sensor->lock); 2869 2870 if (sensor->streaming == !enable) { 2871 if (enable && sensor->pending_mode_change) { 2872 ret = ov5640_set_mode(sensor); 2873 if (ret) 2874 goto out; 2875 } 2876 2877 if (enable && sensor->pending_fmt_change) { 2878 ret = ov5640_set_framefmt(sensor, &sensor->fmt); 2879 if (ret) 2880 goto out; 2881 sensor->pending_fmt_change = false; 2882 } 2883 2884 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) 2885 ret = ov5640_set_stream_mipi(sensor, enable); 2886 else 2887 ret = ov5640_set_stream_dvp(sensor, enable); 2888 2889 if (!ret) 2890 sensor->streaming = enable; 2891 } 2892 out: 2893 mutex_unlock(&sensor->lock); 2894 return ret; 2895 } 2896 2897 static const struct v4l2_subdev_core_ops ov5640_core_ops = { 2898 .s_power = ov5640_s_power, 2899 .log_status = v4l2_ctrl_subdev_log_status, 2900 .subscribe_event = v4l2_ctrl_subdev_subscribe_event, 2901 .unsubscribe_event = v4l2_event_subdev_unsubscribe, 2902 }; 2903 2904 static const struct v4l2_subdev_video_ops ov5640_video_ops = { 2905 .g_frame_interval = ov5640_g_frame_interval, 2906 .s_frame_interval = ov5640_s_frame_interval, 2907 .s_stream = ov5640_s_stream, 2908 }; 2909 2910 static const struct v4l2_subdev_pad_ops ov5640_pad_ops = { 2911 .enum_mbus_code = ov5640_enum_mbus_code, 2912 .get_fmt = ov5640_get_fmt, 2913 .set_fmt = ov5640_set_fmt, 2914 .enum_frame_size = ov5640_enum_frame_size, 2915 .enum_frame_interval = ov5640_enum_frame_interval, 2916 }; 2917 2918 static const struct v4l2_subdev_ops ov5640_subdev_ops = { 2919 .core = &ov5640_core_ops, 2920 .video = &ov5640_video_ops, 2921 .pad = &ov5640_pad_ops, 2922 }; 2923 2924 static int ov5640_get_regulators(struct ov5640_dev *sensor) 2925 { 2926 int i; 2927 2928 for (i = 0; i < OV5640_NUM_SUPPLIES; i++) 2929 sensor->supplies[i].supply = ov5640_supply_name[i]; 2930 2931 return devm_regulator_bulk_get(&sensor->i2c_client->dev, 2932 OV5640_NUM_SUPPLIES, 2933 sensor->supplies); 2934 } 2935 2936 static int ov5640_check_chip_id(struct ov5640_dev *sensor) 2937 { 2938 struct i2c_client *client = sensor->i2c_client; 2939 int ret = 0; 2940 u16 chip_id; 2941 2942 ret = ov5640_set_power_on(sensor); 2943 if (ret) 2944 return ret; 2945 2946 ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id); 2947 if (ret) { 2948 dev_err(&client->dev, "%s: failed to read chip identifier\n", 2949 __func__); 2950 goto power_off; 2951 } 2952 2953 if (chip_id != 0x5640) { 2954 dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n", 2955 __func__, chip_id); 2956 ret = -ENXIO; 2957 } 2958 2959 power_off: 2960 ov5640_set_power_off(sensor); 2961 return ret; 2962 } 2963 2964 static int ov5640_probe(struct i2c_client *client) 2965 { 2966 struct device *dev = &client->dev; 2967 struct fwnode_handle *endpoint; 2968 struct ov5640_dev *sensor; 2969 struct v4l2_mbus_framefmt *fmt; 2970 u32 rotation; 2971 int ret; 2972 2973 sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL); 2974 if (!sensor) 2975 return -ENOMEM; 2976 2977 sensor->i2c_client = client; 2978 2979 /* 2980 * default init sequence initialize sensor to 2981 * YUV422 UYVY VGA@30fps 2982 */ 2983 fmt = &sensor->fmt; 2984 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8; 2985 fmt->colorspace = V4L2_COLORSPACE_SRGB; 2986 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); 2987 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; 2988 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); 2989 fmt->width = 640; 2990 fmt->height = 480; 2991 fmt->field = V4L2_FIELD_NONE; 2992 sensor->frame_interval.numerator = 1; 2993 sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS]; 2994 sensor->current_fr = OV5640_30_FPS; 2995 sensor->current_mode = 2996 &ov5640_mode_data[OV5640_MODE_VGA_640_480]; 2997 sensor->last_mode = sensor->current_mode; 2998 2999 sensor->ae_target = 52; 3000 3001 /* optional indication of physical rotation of sensor */ 3002 ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation", 3003 &rotation); 3004 if (!ret) { 3005 switch (rotation) { 3006 case 180: 3007 sensor->upside_down = true; 3008 /* fall through */ 3009 case 0: 3010 break; 3011 default: 3012 dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n", 3013 rotation); 3014 } 3015 } 3016 3017 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), 3018 NULL); 3019 if (!endpoint) { 3020 dev_err(dev, "endpoint node not found\n"); 3021 return -EINVAL; 3022 } 3023 3024 ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep); 3025 fwnode_handle_put(endpoint); 3026 if (ret) { 3027 dev_err(dev, "Could not parse endpoint\n"); 3028 return ret; 3029 } 3030 3031 /* get system clock (xclk) */ 3032 sensor->xclk = devm_clk_get(dev, "xclk"); 3033 if (IS_ERR(sensor->xclk)) { 3034 dev_err(dev, "failed to get xclk\n"); 3035 return PTR_ERR(sensor->xclk); 3036 } 3037 3038 sensor->xclk_freq = clk_get_rate(sensor->xclk); 3039 if (sensor->xclk_freq < OV5640_XCLK_MIN || 3040 sensor->xclk_freq > OV5640_XCLK_MAX) { 3041 dev_err(dev, "xclk frequency out of range: %d Hz\n", 3042 sensor->xclk_freq); 3043 return -EINVAL; 3044 } 3045 3046 /* request optional power down pin */ 3047 sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown", 3048 GPIOD_OUT_HIGH); 3049 if (IS_ERR(sensor->pwdn_gpio)) 3050 return PTR_ERR(sensor->pwdn_gpio); 3051 3052 /* request optional reset pin */ 3053 sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset", 3054 GPIOD_OUT_HIGH); 3055 if (IS_ERR(sensor->reset_gpio)) 3056 return PTR_ERR(sensor->reset_gpio); 3057 3058 v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops); 3059 3060 sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | 3061 V4L2_SUBDEV_FL_HAS_EVENTS; 3062 sensor->pad.flags = MEDIA_PAD_FL_SOURCE; 3063 sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 3064 ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad); 3065 if (ret) 3066 return ret; 3067 3068 ret = ov5640_get_regulators(sensor); 3069 if (ret) 3070 return ret; 3071 3072 mutex_init(&sensor->lock); 3073 3074 ret = ov5640_check_chip_id(sensor); 3075 if (ret) 3076 goto entity_cleanup; 3077 3078 ret = ov5640_init_controls(sensor); 3079 if (ret) 3080 goto entity_cleanup; 3081 3082 ret = v4l2_async_register_subdev_sensor_common(&sensor->sd); 3083 if (ret) 3084 goto free_ctrls; 3085 3086 return 0; 3087 3088 free_ctrls: 3089 v4l2_ctrl_handler_free(&sensor->ctrls.handler); 3090 entity_cleanup: 3091 mutex_destroy(&sensor->lock); 3092 media_entity_cleanup(&sensor->sd.entity); 3093 return ret; 3094 } 3095 3096 static int ov5640_remove(struct i2c_client *client) 3097 { 3098 struct v4l2_subdev *sd = i2c_get_clientdata(client); 3099 struct ov5640_dev *sensor = to_ov5640_dev(sd); 3100 3101 v4l2_async_unregister_subdev(&sensor->sd); 3102 mutex_destroy(&sensor->lock); 3103 media_entity_cleanup(&sensor->sd.entity); 3104 v4l2_ctrl_handler_free(&sensor->ctrls.handler); 3105 3106 return 0; 3107 } 3108 3109 static const struct i2c_device_id ov5640_id[] = { 3110 {"ov5640", 0}, 3111 {}, 3112 }; 3113 MODULE_DEVICE_TABLE(i2c, ov5640_id); 3114 3115 static const struct of_device_id ov5640_dt_ids[] = { 3116 { .compatible = "ovti,ov5640" }, 3117 { /* sentinel */ } 3118 }; 3119 MODULE_DEVICE_TABLE(of, ov5640_dt_ids); 3120 3121 static struct i2c_driver ov5640_i2c_driver = { 3122 .driver = { 3123 .name = "ov5640", 3124 .of_match_table = ov5640_dt_ids, 3125 }, 3126 .id_table = ov5640_id, 3127 .probe_new = ov5640_probe, 3128 .remove = ov5640_remove, 3129 }; 3130 3131 module_i2c_driver(ov5640_i2c_driver); 3132 3133 MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver"); 3134 MODULE_LICENSE("GPL"); 3135