1 /* 2 * Driver for MT9V032 CMOS Image Sensor from Micron 3 * 4 * Copyright (C) 2010, Laurent Pinchart <laurent.pinchart@ideasonboard.com> 5 * 6 * Based on the MT9M001 driver, 7 * 8 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15 #include <linux/clk.h> 16 #include <linux/delay.h> 17 #include <linux/i2c.h> 18 #include <linux/log2.h> 19 #include <linux/mutex.h> 20 #include <linux/slab.h> 21 #include <linux/videodev2.h> 22 #include <linux/v4l2-mediabus.h> 23 #include <linux/module.h> 24 25 #include <media/mt9v032.h> 26 #include <media/v4l2-ctrls.h> 27 #include <media/v4l2-device.h> 28 #include <media/v4l2-subdev.h> 29 30 /* The first four rows are black rows. The active area spans 753x481 pixels. */ 31 #define MT9V032_PIXEL_ARRAY_HEIGHT 485 32 #define MT9V032_PIXEL_ARRAY_WIDTH 753 33 34 #define MT9V032_SYSCLK_FREQ_DEF 26600000 35 36 #define MT9V032_CHIP_VERSION 0x00 37 #define MT9V032_CHIP_ID_REV1 0x1311 38 #define MT9V032_CHIP_ID_REV3 0x1313 39 #define MT9V034_CHIP_ID_REV1 0X1324 40 #define MT9V032_COLUMN_START 0x01 41 #define MT9V032_COLUMN_START_MIN 1 42 #define MT9V032_COLUMN_START_DEF 1 43 #define MT9V032_COLUMN_START_MAX 752 44 #define MT9V032_ROW_START 0x02 45 #define MT9V032_ROW_START_MIN 4 46 #define MT9V032_ROW_START_DEF 5 47 #define MT9V032_ROW_START_MAX 482 48 #define MT9V032_WINDOW_HEIGHT 0x03 49 #define MT9V032_WINDOW_HEIGHT_MIN 1 50 #define MT9V032_WINDOW_HEIGHT_DEF 480 51 #define MT9V032_WINDOW_HEIGHT_MAX 480 52 #define MT9V032_WINDOW_WIDTH 0x04 53 #define MT9V032_WINDOW_WIDTH_MIN 1 54 #define MT9V032_WINDOW_WIDTH_DEF 752 55 #define MT9V032_WINDOW_WIDTH_MAX 752 56 #define MT9V032_HORIZONTAL_BLANKING 0x05 57 #define MT9V032_HORIZONTAL_BLANKING_MIN 43 58 #define MT9V034_HORIZONTAL_BLANKING_MIN 61 59 #define MT9V032_HORIZONTAL_BLANKING_DEF 94 60 #define MT9V032_HORIZONTAL_BLANKING_MAX 1023 61 #define MT9V032_VERTICAL_BLANKING 0x06 62 #define MT9V032_VERTICAL_BLANKING_MIN 4 63 #define MT9V034_VERTICAL_BLANKING_MIN 2 64 #define MT9V032_VERTICAL_BLANKING_DEF 45 65 #define MT9V032_VERTICAL_BLANKING_MAX 3000 66 #define MT9V034_VERTICAL_BLANKING_MAX 32288 67 #define MT9V032_CHIP_CONTROL 0x07 68 #define MT9V032_CHIP_CONTROL_MASTER_MODE (1 << 3) 69 #define MT9V032_CHIP_CONTROL_DOUT_ENABLE (1 << 7) 70 #define MT9V032_CHIP_CONTROL_SEQUENTIAL (1 << 8) 71 #define MT9V032_SHUTTER_WIDTH1 0x08 72 #define MT9V032_SHUTTER_WIDTH2 0x09 73 #define MT9V032_SHUTTER_WIDTH_CONTROL 0x0a 74 #define MT9V032_TOTAL_SHUTTER_WIDTH 0x0b 75 #define MT9V032_TOTAL_SHUTTER_WIDTH_MIN 1 76 #define MT9V034_TOTAL_SHUTTER_WIDTH_MIN 0 77 #define MT9V032_TOTAL_SHUTTER_WIDTH_DEF 480 78 #define MT9V032_TOTAL_SHUTTER_WIDTH_MAX 32767 79 #define MT9V034_TOTAL_SHUTTER_WIDTH_MAX 32765 80 #define MT9V032_RESET 0x0c 81 #define MT9V032_READ_MODE 0x0d 82 #define MT9V032_READ_MODE_ROW_BIN_MASK (3 << 0) 83 #define MT9V032_READ_MODE_ROW_BIN_SHIFT 0 84 #define MT9V032_READ_MODE_COLUMN_BIN_MASK (3 << 2) 85 #define MT9V032_READ_MODE_COLUMN_BIN_SHIFT 2 86 #define MT9V032_READ_MODE_ROW_FLIP (1 << 4) 87 #define MT9V032_READ_MODE_COLUMN_FLIP (1 << 5) 88 #define MT9V032_READ_MODE_DARK_COLUMNS (1 << 6) 89 #define MT9V032_READ_MODE_DARK_ROWS (1 << 7) 90 #define MT9V032_PIXEL_OPERATION_MODE 0x0f 91 #define MT9V034_PIXEL_OPERATION_MODE_HDR (1 << 0) 92 #define MT9V034_PIXEL_OPERATION_MODE_COLOR (1 << 1) 93 #define MT9V032_PIXEL_OPERATION_MODE_COLOR (1 << 2) 94 #define MT9V032_PIXEL_OPERATION_MODE_HDR (1 << 6) 95 #define MT9V032_ANALOG_GAIN 0x35 96 #define MT9V032_ANALOG_GAIN_MIN 16 97 #define MT9V032_ANALOG_GAIN_DEF 16 98 #define MT9V032_ANALOG_GAIN_MAX 64 99 #define MT9V032_MAX_ANALOG_GAIN 0x36 100 #define MT9V032_MAX_ANALOG_GAIN_MAX 127 101 #define MT9V032_FRAME_DARK_AVERAGE 0x42 102 #define MT9V032_DARK_AVG_THRESH 0x46 103 #define MT9V032_DARK_AVG_LOW_THRESH_MASK (255 << 0) 104 #define MT9V032_DARK_AVG_LOW_THRESH_SHIFT 0 105 #define MT9V032_DARK_AVG_HIGH_THRESH_MASK (255 << 8) 106 #define MT9V032_DARK_AVG_HIGH_THRESH_SHIFT 8 107 #define MT9V032_ROW_NOISE_CORR_CONTROL 0x70 108 #define MT9V034_ROW_NOISE_CORR_ENABLE (1 << 0) 109 #define MT9V034_ROW_NOISE_CORR_USE_BLK_AVG (1 << 1) 110 #define MT9V032_ROW_NOISE_CORR_ENABLE (1 << 5) 111 #define MT9V032_ROW_NOISE_CORR_USE_BLK_AVG (1 << 7) 112 #define MT9V032_PIXEL_CLOCK 0x74 113 #define MT9V034_PIXEL_CLOCK 0x72 114 #define MT9V032_PIXEL_CLOCK_INV_LINE (1 << 0) 115 #define MT9V032_PIXEL_CLOCK_INV_FRAME (1 << 1) 116 #define MT9V032_PIXEL_CLOCK_XOR_LINE (1 << 2) 117 #define MT9V032_PIXEL_CLOCK_CONT_LINE (1 << 3) 118 #define MT9V032_PIXEL_CLOCK_INV_PXL_CLK (1 << 4) 119 #define MT9V032_TEST_PATTERN 0x7f 120 #define MT9V032_TEST_PATTERN_DATA_MASK (1023 << 0) 121 #define MT9V032_TEST_PATTERN_DATA_SHIFT 0 122 #define MT9V032_TEST_PATTERN_USE_DATA (1 << 10) 123 #define MT9V032_TEST_PATTERN_GRAY_MASK (3 << 11) 124 #define MT9V032_TEST_PATTERN_GRAY_NONE (0 << 11) 125 #define MT9V032_TEST_PATTERN_GRAY_VERTICAL (1 << 11) 126 #define MT9V032_TEST_PATTERN_GRAY_HORIZONTAL (2 << 11) 127 #define MT9V032_TEST_PATTERN_GRAY_DIAGONAL (3 << 11) 128 #define MT9V032_TEST_PATTERN_ENABLE (1 << 13) 129 #define MT9V032_TEST_PATTERN_FLIP (1 << 14) 130 #define MT9V032_AEC_AGC_ENABLE 0xaf 131 #define MT9V032_AEC_ENABLE (1 << 0) 132 #define MT9V032_AGC_ENABLE (1 << 1) 133 #define MT9V032_THERMAL_INFO 0xc1 134 135 enum mt9v032_model { 136 MT9V032_MODEL_V032_COLOR, 137 MT9V032_MODEL_V032_MONO, 138 MT9V032_MODEL_V034_COLOR, 139 MT9V032_MODEL_V034_MONO, 140 }; 141 142 struct mt9v032_model_version { 143 unsigned int version; 144 const char *name; 145 }; 146 147 struct mt9v032_model_data { 148 unsigned int min_row_time; 149 unsigned int min_hblank; 150 unsigned int min_vblank; 151 unsigned int max_vblank; 152 unsigned int min_shutter; 153 unsigned int max_shutter; 154 unsigned int pclk_reg; 155 }; 156 157 struct mt9v032_model_info { 158 const struct mt9v032_model_data *data; 159 bool color; 160 }; 161 162 static const struct mt9v032_model_version mt9v032_versions[] = { 163 { MT9V032_CHIP_ID_REV1, "MT9V032 rev1/2" }, 164 { MT9V032_CHIP_ID_REV3, "MT9V032 rev3" }, 165 { MT9V034_CHIP_ID_REV1, "MT9V034 rev1" }, 166 }; 167 168 static const struct mt9v032_model_data mt9v032_model_data[] = { 169 { 170 /* MT9V032 revisions 1/2/3 */ 171 .min_row_time = 660, 172 .min_hblank = MT9V032_HORIZONTAL_BLANKING_MIN, 173 .min_vblank = MT9V032_VERTICAL_BLANKING_MIN, 174 .max_vblank = MT9V032_VERTICAL_BLANKING_MAX, 175 .min_shutter = MT9V032_TOTAL_SHUTTER_WIDTH_MIN, 176 .max_shutter = MT9V032_TOTAL_SHUTTER_WIDTH_MAX, 177 .pclk_reg = MT9V032_PIXEL_CLOCK, 178 }, { 179 /* MT9V034 */ 180 .min_row_time = 690, 181 .min_hblank = MT9V034_HORIZONTAL_BLANKING_MIN, 182 .min_vblank = MT9V034_VERTICAL_BLANKING_MIN, 183 .max_vblank = MT9V034_VERTICAL_BLANKING_MAX, 184 .min_shutter = MT9V034_TOTAL_SHUTTER_WIDTH_MIN, 185 .max_shutter = MT9V034_TOTAL_SHUTTER_WIDTH_MAX, 186 .pclk_reg = MT9V034_PIXEL_CLOCK, 187 }, 188 }; 189 190 static const struct mt9v032_model_info mt9v032_models[] = { 191 [MT9V032_MODEL_V032_COLOR] = { 192 .data = &mt9v032_model_data[0], 193 .color = true, 194 }, 195 [MT9V032_MODEL_V032_MONO] = { 196 .data = &mt9v032_model_data[0], 197 .color = false, 198 }, 199 [MT9V032_MODEL_V034_COLOR] = { 200 .data = &mt9v032_model_data[1], 201 .color = true, 202 }, 203 [MT9V032_MODEL_V034_MONO] = { 204 .data = &mt9v032_model_data[1], 205 .color = false, 206 }, 207 }; 208 209 struct mt9v032 { 210 struct v4l2_subdev subdev; 211 struct media_pad pad; 212 213 struct v4l2_mbus_framefmt format; 214 struct v4l2_rect crop; 215 unsigned int hratio; 216 unsigned int vratio; 217 218 struct v4l2_ctrl_handler ctrls; 219 struct { 220 struct v4l2_ctrl *link_freq; 221 struct v4l2_ctrl *pixel_rate; 222 }; 223 224 struct mutex power_lock; 225 int power_count; 226 227 struct clk *clk; 228 229 struct mt9v032_platform_data *pdata; 230 const struct mt9v032_model_info *model; 231 const struct mt9v032_model_version *version; 232 233 u32 sysclk; 234 u16 chip_control; 235 u16 aec_agc; 236 u16 hblank; 237 struct { 238 struct v4l2_ctrl *test_pattern; 239 struct v4l2_ctrl *test_pattern_color; 240 }; 241 }; 242 243 static struct mt9v032 *to_mt9v032(struct v4l2_subdev *sd) 244 { 245 return container_of(sd, struct mt9v032, subdev); 246 } 247 248 static int mt9v032_read(struct i2c_client *client, const u8 reg) 249 { 250 s32 data = i2c_smbus_read_word_swapped(client, reg); 251 dev_dbg(&client->dev, "%s: read 0x%04x from 0x%02x\n", __func__, 252 data, reg); 253 return data; 254 } 255 256 static int mt9v032_write(struct i2c_client *client, const u8 reg, 257 const u16 data) 258 { 259 dev_dbg(&client->dev, "%s: writing 0x%04x to 0x%02x\n", __func__, 260 data, reg); 261 return i2c_smbus_write_word_swapped(client, reg, data); 262 } 263 264 static int mt9v032_set_chip_control(struct mt9v032 *mt9v032, u16 clear, u16 set) 265 { 266 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); 267 u16 value = (mt9v032->chip_control & ~clear) | set; 268 int ret; 269 270 ret = mt9v032_write(client, MT9V032_CHIP_CONTROL, value); 271 if (ret < 0) 272 return ret; 273 274 mt9v032->chip_control = value; 275 return 0; 276 } 277 278 static int 279 mt9v032_update_aec_agc(struct mt9v032 *mt9v032, u16 which, int enable) 280 { 281 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); 282 u16 value = mt9v032->aec_agc; 283 int ret; 284 285 if (enable) 286 value |= which; 287 else 288 value &= ~which; 289 290 ret = mt9v032_write(client, MT9V032_AEC_AGC_ENABLE, value); 291 if (ret < 0) 292 return ret; 293 294 mt9v032->aec_agc = value; 295 return 0; 296 } 297 298 static int 299 mt9v032_update_hblank(struct mt9v032 *mt9v032) 300 { 301 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); 302 struct v4l2_rect *crop = &mt9v032->crop; 303 unsigned int min_hblank = mt9v032->model->data->min_hblank; 304 unsigned int hblank; 305 306 if (mt9v032->version->version == MT9V034_CHIP_ID_REV1) 307 min_hblank += (mt9v032->hratio - 1) * 10; 308 min_hblank = max_t(unsigned int, (int)mt9v032->model->data->min_row_time - crop->width, 309 (int)min_hblank); 310 hblank = max_t(unsigned int, mt9v032->hblank, min_hblank); 311 312 return mt9v032_write(client, MT9V032_HORIZONTAL_BLANKING, hblank); 313 } 314 315 static int mt9v032_power_on(struct mt9v032 *mt9v032) 316 { 317 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); 318 int ret; 319 320 clk_set_rate(mt9v032->clk, mt9v032->sysclk); 321 clk_prepare_enable(mt9v032->clk); 322 udelay(1); 323 324 /* Reset the chip and stop data read out */ 325 ret = mt9v032_write(client, MT9V032_RESET, 1); 326 if (ret < 0) 327 return ret; 328 329 ret = mt9v032_write(client, MT9V032_RESET, 0); 330 if (ret < 0) 331 return ret; 332 333 return mt9v032_write(client, MT9V032_CHIP_CONTROL, 0); 334 } 335 336 static void mt9v032_power_off(struct mt9v032 *mt9v032) 337 { 338 clk_disable_unprepare(mt9v032->clk); 339 } 340 341 static int __mt9v032_set_power(struct mt9v032 *mt9v032, bool on) 342 { 343 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); 344 int ret; 345 346 if (!on) { 347 mt9v032_power_off(mt9v032); 348 return 0; 349 } 350 351 ret = mt9v032_power_on(mt9v032); 352 if (ret < 0) 353 return ret; 354 355 /* Configure the pixel clock polarity */ 356 if (mt9v032->pdata && mt9v032->pdata->clk_pol) { 357 ret = mt9v032_write(client, mt9v032->model->data->pclk_reg, 358 MT9V032_PIXEL_CLOCK_INV_PXL_CLK); 359 if (ret < 0) 360 return ret; 361 } 362 363 /* Disable the noise correction algorithm and restore the controls. */ 364 ret = mt9v032_write(client, MT9V032_ROW_NOISE_CORR_CONTROL, 0); 365 if (ret < 0) 366 return ret; 367 368 return v4l2_ctrl_handler_setup(&mt9v032->ctrls); 369 } 370 371 /* ----------------------------------------------------------------------------- 372 * V4L2 subdev video operations 373 */ 374 375 static struct v4l2_mbus_framefmt * 376 __mt9v032_get_pad_format(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh, 377 unsigned int pad, enum v4l2_subdev_format_whence which) 378 { 379 switch (which) { 380 case V4L2_SUBDEV_FORMAT_TRY: 381 return v4l2_subdev_get_try_format(fh, pad); 382 case V4L2_SUBDEV_FORMAT_ACTIVE: 383 return &mt9v032->format; 384 default: 385 return NULL; 386 } 387 } 388 389 static struct v4l2_rect * 390 __mt9v032_get_pad_crop(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh, 391 unsigned int pad, enum v4l2_subdev_format_whence which) 392 { 393 switch (which) { 394 case V4L2_SUBDEV_FORMAT_TRY: 395 return v4l2_subdev_get_try_crop(fh, pad); 396 case V4L2_SUBDEV_FORMAT_ACTIVE: 397 return &mt9v032->crop; 398 default: 399 return NULL; 400 } 401 } 402 403 static int mt9v032_s_stream(struct v4l2_subdev *subdev, int enable) 404 { 405 const u16 mode = MT9V032_CHIP_CONTROL_MASTER_MODE 406 | MT9V032_CHIP_CONTROL_DOUT_ENABLE 407 | MT9V032_CHIP_CONTROL_SEQUENTIAL; 408 struct i2c_client *client = v4l2_get_subdevdata(subdev); 409 struct mt9v032 *mt9v032 = to_mt9v032(subdev); 410 struct v4l2_rect *crop = &mt9v032->crop; 411 unsigned int hbin; 412 unsigned int vbin; 413 int ret; 414 415 if (!enable) 416 return mt9v032_set_chip_control(mt9v032, mode, 0); 417 418 /* Configure the window size and row/column bin */ 419 hbin = fls(mt9v032->hratio) - 1; 420 vbin = fls(mt9v032->vratio) - 1; 421 ret = mt9v032_write(client, MT9V032_READ_MODE, 422 hbin << MT9V032_READ_MODE_COLUMN_BIN_SHIFT | 423 vbin << MT9V032_READ_MODE_ROW_BIN_SHIFT); 424 if (ret < 0) 425 return ret; 426 427 ret = mt9v032_write(client, MT9V032_COLUMN_START, crop->left); 428 if (ret < 0) 429 return ret; 430 431 ret = mt9v032_write(client, MT9V032_ROW_START, crop->top); 432 if (ret < 0) 433 return ret; 434 435 ret = mt9v032_write(client, MT9V032_WINDOW_WIDTH, crop->width); 436 if (ret < 0) 437 return ret; 438 439 ret = mt9v032_write(client, MT9V032_WINDOW_HEIGHT, crop->height); 440 if (ret < 0) 441 return ret; 442 443 ret = mt9v032_update_hblank(mt9v032); 444 if (ret < 0) 445 return ret; 446 447 /* Switch to master "normal" mode */ 448 return mt9v032_set_chip_control(mt9v032, 0, mode); 449 } 450 451 static int mt9v032_enum_mbus_code(struct v4l2_subdev *subdev, 452 struct v4l2_subdev_fh *fh, 453 struct v4l2_subdev_mbus_code_enum *code) 454 { 455 if (code->index > 0) 456 return -EINVAL; 457 458 code->code = V4L2_MBUS_FMT_SGRBG10_1X10; 459 return 0; 460 } 461 462 static int mt9v032_enum_frame_size(struct v4l2_subdev *subdev, 463 struct v4l2_subdev_fh *fh, 464 struct v4l2_subdev_frame_size_enum *fse) 465 { 466 if (fse->index >= 3 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10) 467 return -EINVAL; 468 469 fse->min_width = MT9V032_WINDOW_WIDTH_DEF / (1 << fse->index); 470 fse->max_width = fse->min_width; 471 fse->min_height = MT9V032_WINDOW_HEIGHT_DEF / (1 << fse->index); 472 fse->max_height = fse->min_height; 473 474 return 0; 475 } 476 477 static int mt9v032_get_format(struct v4l2_subdev *subdev, 478 struct v4l2_subdev_fh *fh, 479 struct v4l2_subdev_format *format) 480 { 481 struct mt9v032 *mt9v032 = to_mt9v032(subdev); 482 483 format->format = *__mt9v032_get_pad_format(mt9v032, fh, format->pad, 484 format->which); 485 return 0; 486 } 487 488 static void mt9v032_configure_pixel_rate(struct mt9v032 *mt9v032) 489 { 490 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); 491 int ret; 492 493 ret = v4l2_ctrl_s_ctrl_int64(mt9v032->pixel_rate, 494 mt9v032->sysclk / mt9v032->hratio); 495 if (ret < 0) 496 dev_warn(&client->dev, "failed to set pixel rate (%d)\n", ret); 497 } 498 499 static unsigned int mt9v032_calc_ratio(unsigned int input, unsigned int output) 500 { 501 /* Compute the power-of-two binning factor closest to the input size to 502 * output size ratio. Given that the output size is bounded by input/4 503 * and input, a generic implementation would be an ineffective luxury. 504 */ 505 if (output * 3 > input * 2) 506 return 1; 507 if (output * 3 > input) 508 return 2; 509 return 4; 510 } 511 512 static int mt9v032_set_format(struct v4l2_subdev *subdev, 513 struct v4l2_subdev_fh *fh, 514 struct v4l2_subdev_format *format) 515 { 516 struct mt9v032 *mt9v032 = to_mt9v032(subdev); 517 struct v4l2_mbus_framefmt *__format; 518 struct v4l2_rect *__crop; 519 unsigned int width; 520 unsigned int height; 521 unsigned int hratio; 522 unsigned int vratio; 523 524 __crop = __mt9v032_get_pad_crop(mt9v032, fh, format->pad, 525 format->which); 526 527 /* Clamp the width and height to avoid dividing by zero. */ 528 width = clamp(ALIGN(format->format.width, 2), 529 max_t(unsigned int, __crop->width / 4, 530 MT9V032_WINDOW_WIDTH_MIN), 531 __crop->width); 532 height = clamp(ALIGN(format->format.height, 2), 533 max_t(unsigned int, __crop->height / 4, 534 MT9V032_WINDOW_HEIGHT_MIN), 535 __crop->height); 536 537 hratio = mt9v032_calc_ratio(__crop->width, width); 538 vratio = mt9v032_calc_ratio(__crop->height, height); 539 540 __format = __mt9v032_get_pad_format(mt9v032, fh, format->pad, 541 format->which); 542 __format->width = __crop->width / hratio; 543 __format->height = __crop->height / vratio; 544 545 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) { 546 mt9v032->hratio = hratio; 547 mt9v032->vratio = vratio; 548 mt9v032_configure_pixel_rate(mt9v032); 549 } 550 551 format->format = *__format; 552 553 return 0; 554 } 555 556 static int mt9v032_get_crop(struct v4l2_subdev *subdev, 557 struct v4l2_subdev_fh *fh, 558 struct v4l2_subdev_crop *crop) 559 { 560 struct mt9v032 *mt9v032 = to_mt9v032(subdev); 561 562 crop->rect = *__mt9v032_get_pad_crop(mt9v032, fh, crop->pad, 563 crop->which); 564 return 0; 565 } 566 567 static int mt9v032_set_crop(struct v4l2_subdev *subdev, 568 struct v4l2_subdev_fh *fh, 569 struct v4l2_subdev_crop *crop) 570 { 571 struct mt9v032 *mt9v032 = to_mt9v032(subdev); 572 struct v4l2_mbus_framefmt *__format; 573 struct v4l2_rect *__crop; 574 struct v4l2_rect rect; 575 576 /* Clamp the crop rectangle boundaries and align them to a non multiple 577 * of 2 pixels to ensure a GRBG Bayer pattern. 578 */ 579 rect.left = clamp(ALIGN(crop->rect.left + 1, 2) - 1, 580 MT9V032_COLUMN_START_MIN, 581 MT9V032_COLUMN_START_MAX); 582 rect.top = clamp(ALIGN(crop->rect.top + 1, 2) - 1, 583 MT9V032_ROW_START_MIN, 584 MT9V032_ROW_START_MAX); 585 rect.width = clamp_t(unsigned int, ALIGN(crop->rect.width, 2), 586 MT9V032_WINDOW_WIDTH_MIN, 587 MT9V032_WINDOW_WIDTH_MAX); 588 rect.height = clamp_t(unsigned int, ALIGN(crop->rect.height, 2), 589 MT9V032_WINDOW_HEIGHT_MIN, 590 MT9V032_WINDOW_HEIGHT_MAX); 591 592 rect.width = min_t(unsigned int, 593 rect.width, MT9V032_PIXEL_ARRAY_WIDTH - rect.left); 594 rect.height = min_t(unsigned int, 595 rect.height, MT9V032_PIXEL_ARRAY_HEIGHT - rect.top); 596 597 __crop = __mt9v032_get_pad_crop(mt9v032, fh, crop->pad, crop->which); 598 599 if (rect.width != __crop->width || rect.height != __crop->height) { 600 /* Reset the output image size if the crop rectangle size has 601 * been modified. 602 */ 603 __format = __mt9v032_get_pad_format(mt9v032, fh, crop->pad, 604 crop->which); 605 __format->width = rect.width; 606 __format->height = rect.height; 607 if (crop->which == V4L2_SUBDEV_FORMAT_ACTIVE) { 608 mt9v032->hratio = 1; 609 mt9v032->vratio = 1; 610 mt9v032_configure_pixel_rate(mt9v032); 611 } 612 } 613 614 *__crop = rect; 615 crop->rect = rect; 616 617 return 0; 618 } 619 620 /* ----------------------------------------------------------------------------- 621 * V4L2 subdev control operations 622 */ 623 624 #define V4L2_CID_TEST_PATTERN_COLOR (V4L2_CID_USER_BASE | 0x1001) 625 626 static int mt9v032_s_ctrl(struct v4l2_ctrl *ctrl) 627 { 628 struct mt9v032 *mt9v032 = 629 container_of(ctrl->handler, struct mt9v032, ctrls); 630 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); 631 u32 freq; 632 u16 data; 633 634 switch (ctrl->id) { 635 case V4L2_CID_AUTOGAIN: 636 return mt9v032_update_aec_agc(mt9v032, MT9V032_AGC_ENABLE, 637 ctrl->val); 638 639 case V4L2_CID_GAIN: 640 return mt9v032_write(client, MT9V032_ANALOG_GAIN, ctrl->val); 641 642 case V4L2_CID_EXPOSURE_AUTO: 643 return mt9v032_update_aec_agc(mt9v032, MT9V032_AEC_ENABLE, 644 !ctrl->val); 645 646 case V4L2_CID_EXPOSURE: 647 return mt9v032_write(client, MT9V032_TOTAL_SHUTTER_WIDTH, 648 ctrl->val); 649 650 case V4L2_CID_HBLANK: 651 mt9v032->hblank = ctrl->val; 652 return mt9v032_update_hblank(mt9v032); 653 654 case V4L2_CID_VBLANK: 655 return mt9v032_write(client, MT9V032_VERTICAL_BLANKING, 656 ctrl->val); 657 658 case V4L2_CID_PIXEL_RATE: 659 case V4L2_CID_LINK_FREQ: 660 if (mt9v032->link_freq == NULL) 661 break; 662 663 freq = mt9v032->pdata->link_freqs[mt9v032->link_freq->val]; 664 mt9v032->pixel_rate->val64 = freq; 665 mt9v032->sysclk = freq; 666 break; 667 668 case V4L2_CID_TEST_PATTERN: 669 switch (mt9v032->test_pattern->val) { 670 case 0: 671 data = 0; 672 break; 673 case 1: 674 data = MT9V032_TEST_PATTERN_GRAY_VERTICAL 675 | MT9V032_TEST_PATTERN_ENABLE; 676 break; 677 case 2: 678 data = MT9V032_TEST_PATTERN_GRAY_HORIZONTAL 679 | MT9V032_TEST_PATTERN_ENABLE; 680 break; 681 case 3: 682 data = MT9V032_TEST_PATTERN_GRAY_DIAGONAL 683 | MT9V032_TEST_PATTERN_ENABLE; 684 break; 685 default: 686 data = (mt9v032->test_pattern_color->val << 687 MT9V032_TEST_PATTERN_DATA_SHIFT) 688 | MT9V032_TEST_PATTERN_USE_DATA 689 | MT9V032_TEST_PATTERN_ENABLE 690 | MT9V032_TEST_PATTERN_FLIP; 691 break; 692 } 693 return mt9v032_write(client, MT9V032_TEST_PATTERN, data); 694 } 695 696 return 0; 697 } 698 699 static struct v4l2_ctrl_ops mt9v032_ctrl_ops = { 700 .s_ctrl = mt9v032_s_ctrl, 701 }; 702 703 static const char * const mt9v032_test_pattern_menu[] = { 704 "Disabled", 705 "Gray Vertical Shade", 706 "Gray Horizontal Shade", 707 "Gray Diagonal Shade", 708 "Plain", 709 }; 710 711 static const struct v4l2_ctrl_config mt9v032_test_pattern_color = { 712 .ops = &mt9v032_ctrl_ops, 713 .id = V4L2_CID_TEST_PATTERN_COLOR, 714 .type = V4L2_CTRL_TYPE_INTEGER, 715 .name = "Test Pattern Color", 716 .min = 0, 717 .max = 1023, 718 .step = 1, 719 .def = 0, 720 .flags = 0, 721 }; 722 723 /* ----------------------------------------------------------------------------- 724 * V4L2 subdev core operations 725 */ 726 727 static int mt9v032_set_power(struct v4l2_subdev *subdev, int on) 728 { 729 struct mt9v032 *mt9v032 = to_mt9v032(subdev); 730 int ret = 0; 731 732 mutex_lock(&mt9v032->power_lock); 733 734 /* If the power count is modified from 0 to != 0 or from != 0 to 0, 735 * update the power state. 736 */ 737 if (mt9v032->power_count == !on) { 738 ret = __mt9v032_set_power(mt9v032, !!on); 739 if (ret < 0) 740 goto done; 741 } 742 743 /* Update the power count. */ 744 mt9v032->power_count += on ? 1 : -1; 745 WARN_ON(mt9v032->power_count < 0); 746 747 done: 748 mutex_unlock(&mt9v032->power_lock); 749 return ret; 750 } 751 752 /* ----------------------------------------------------------------------------- 753 * V4L2 subdev internal operations 754 */ 755 756 static int mt9v032_registered(struct v4l2_subdev *subdev) 757 { 758 struct i2c_client *client = v4l2_get_subdevdata(subdev); 759 struct mt9v032 *mt9v032 = to_mt9v032(subdev); 760 unsigned int i; 761 s32 version; 762 int ret; 763 764 dev_info(&client->dev, "Probing MT9V032 at address 0x%02x\n", 765 client->addr); 766 767 ret = mt9v032_power_on(mt9v032); 768 if (ret < 0) { 769 dev_err(&client->dev, "MT9V032 power up failed\n"); 770 return ret; 771 } 772 773 /* Read and check the sensor version */ 774 version = mt9v032_read(client, MT9V032_CHIP_VERSION); 775 if (version < 0) { 776 dev_err(&client->dev, "Failed reading chip version\n"); 777 return version; 778 } 779 780 for (i = 0; i < ARRAY_SIZE(mt9v032_versions); ++i) { 781 if (mt9v032_versions[i].version == version) { 782 mt9v032->version = &mt9v032_versions[i]; 783 break; 784 } 785 } 786 787 if (mt9v032->version == NULL) { 788 dev_err(&client->dev, "Unsupported chip version 0x%04x\n", 789 version); 790 return -ENODEV; 791 } 792 793 mt9v032_power_off(mt9v032); 794 795 dev_info(&client->dev, "%s detected at address 0x%02x\n", 796 mt9v032->version->name, client->addr); 797 798 mt9v032_configure_pixel_rate(mt9v032); 799 800 return ret; 801 } 802 803 static int mt9v032_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh) 804 { 805 struct mt9v032 *mt9v032 = to_mt9v032(subdev); 806 struct v4l2_mbus_framefmt *format; 807 struct v4l2_rect *crop; 808 809 crop = v4l2_subdev_get_try_crop(fh, 0); 810 crop->left = MT9V032_COLUMN_START_DEF; 811 crop->top = MT9V032_ROW_START_DEF; 812 crop->width = MT9V032_WINDOW_WIDTH_DEF; 813 crop->height = MT9V032_WINDOW_HEIGHT_DEF; 814 815 format = v4l2_subdev_get_try_format(fh, 0); 816 817 if (mt9v032->model->color) 818 format->code = V4L2_MBUS_FMT_SGRBG10_1X10; 819 else 820 format->code = V4L2_MBUS_FMT_Y10_1X10; 821 822 format->width = MT9V032_WINDOW_WIDTH_DEF; 823 format->height = MT9V032_WINDOW_HEIGHT_DEF; 824 format->field = V4L2_FIELD_NONE; 825 format->colorspace = V4L2_COLORSPACE_SRGB; 826 827 return mt9v032_set_power(subdev, 1); 828 } 829 830 static int mt9v032_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh) 831 { 832 return mt9v032_set_power(subdev, 0); 833 } 834 835 static struct v4l2_subdev_core_ops mt9v032_subdev_core_ops = { 836 .s_power = mt9v032_set_power, 837 }; 838 839 static struct v4l2_subdev_video_ops mt9v032_subdev_video_ops = { 840 .s_stream = mt9v032_s_stream, 841 }; 842 843 static struct v4l2_subdev_pad_ops mt9v032_subdev_pad_ops = { 844 .enum_mbus_code = mt9v032_enum_mbus_code, 845 .enum_frame_size = mt9v032_enum_frame_size, 846 .get_fmt = mt9v032_get_format, 847 .set_fmt = mt9v032_set_format, 848 .get_crop = mt9v032_get_crop, 849 .set_crop = mt9v032_set_crop, 850 }; 851 852 static struct v4l2_subdev_ops mt9v032_subdev_ops = { 853 .core = &mt9v032_subdev_core_ops, 854 .video = &mt9v032_subdev_video_ops, 855 .pad = &mt9v032_subdev_pad_ops, 856 }; 857 858 static const struct v4l2_subdev_internal_ops mt9v032_subdev_internal_ops = { 859 .registered = mt9v032_registered, 860 .open = mt9v032_open, 861 .close = mt9v032_close, 862 }; 863 864 /* ----------------------------------------------------------------------------- 865 * Driver initialization and probing 866 */ 867 868 static int mt9v032_probe(struct i2c_client *client, 869 const struct i2c_device_id *did) 870 { 871 struct mt9v032_platform_data *pdata = client->dev.platform_data; 872 struct mt9v032 *mt9v032; 873 unsigned int i; 874 int ret; 875 876 if (!i2c_check_functionality(client->adapter, 877 I2C_FUNC_SMBUS_WORD_DATA)) { 878 dev_warn(&client->adapter->dev, 879 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); 880 return -EIO; 881 } 882 883 mt9v032 = devm_kzalloc(&client->dev, sizeof(*mt9v032), GFP_KERNEL); 884 if (!mt9v032) 885 return -ENOMEM; 886 887 mt9v032->clk = devm_clk_get(&client->dev, NULL); 888 if (IS_ERR(mt9v032->clk)) 889 return PTR_ERR(mt9v032->clk); 890 891 mutex_init(&mt9v032->power_lock); 892 mt9v032->pdata = pdata; 893 mt9v032->model = (const void *)did->driver_data; 894 895 v4l2_ctrl_handler_init(&mt9v032->ctrls, 10); 896 897 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, 898 V4L2_CID_AUTOGAIN, 0, 1, 1, 1); 899 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, 900 V4L2_CID_GAIN, MT9V032_ANALOG_GAIN_MIN, 901 MT9V032_ANALOG_GAIN_MAX, 1, MT9V032_ANALOG_GAIN_DEF); 902 v4l2_ctrl_new_std_menu(&mt9v032->ctrls, &mt9v032_ctrl_ops, 903 V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, 0, 904 V4L2_EXPOSURE_AUTO); 905 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, 906 V4L2_CID_EXPOSURE, mt9v032->model->data->min_shutter, 907 mt9v032->model->data->max_shutter, 1, 908 MT9V032_TOTAL_SHUTTER_WIDTH_DEF); 909 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, 910 V4L2_CID_HBLANK, mt9v032->model->data->min_hblank, 911 MT9V032_HORIZONTAL_BLANKING_MAX, 1, 912 MT9V032_HORIZONTAL_BLANKING_DEF); 913 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, 914 V4L2_CID_VBLANK, mt9v032->model->data->min_vblank, 915 mt9v032->model->data->max_vblank, 1, 916 MT9V032_VERTICAL_BLANKING_DEF); 917 mt9v032->test_pattern = v4l2_ctrl_new_std_menu_items(&mt9v032->ctrls, 918 &mt9v032_ctrl_ops, V4L2_CID_TEST_PATTERN, 919 ARRAY_SIZE(mt9v032_test_pattern_menu) - 1, 0, 0, 920 mt9v032_test_pattern_menu); 921 mt9v032->test_pattern_color = v4l2_ctrl_new_custom(&mt9v032->ctrls, 922 &mt9v032_test_pattern_color, NULL); 923 924 v4l2_ctrl_cluster(2, &mt9v032->test_pattern); 925 926 mt9v032->pixel_rate = 927 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, 928 V4L2_CID_PIXEL_RATE, 0, 0, 1, 0); 929 930 if (pdata && pdata->link_freqs) { 931 unsigned int def = 0; 932 933 for (i = 0; pdata->link_freqs[i]; ++i) { 934 if (pdata->link_freqs[i] == pdata->link_def_freq) 935 def = i; 936 } 937 938 mt9v032->link_freq = 939 v4l2_ctrl_new_int_menu(&mt9v032->ctrls, 940 &mt9v032_ctrl_ops, 941 V4L2_CID_LINK_FREQ, i - 1, def, 942 pdata->link_freqs); 943 v4l2_ctrl_cluster(2, &mt9v032->link_freq); 944 } 945 946 947 mt9v032->subdev.ctrl_handler = &mt9v032->ctrls; 948 949 if (mt9v032->ctrls.error) 950 printk(KERN_INFO "%s: control initialization error %d\n", 951 __func__, mt9v032->ctrls.error); 952 953 mt9v032->crop.left = MT9V032_COLUMN_START_DEF; 954 mt9v032->crop.top = MT9V032_ROW_START_DEF; 955 mt9v032->crop.width = MT9V032_WINDOW_WIDTH_DEF; 956 mt9v032->crop.height = MT9V032_WINDOW_HEIGHT_DEF; 957 958 if (mt9v032->model->color) 959 mt9v032->format.code = V4L2_MBUS_FMT_SGRBG10_1X10; 960 else 961 mt9v032->format.code = V4L2_MBUS_FMT_Y10_1X10; 962 963 mt9v032->format.width = MT9V032_WINDOW_WIDTH_DEF; 964 mt9v032->format.height = MT9V032_WINDOW_HEIGHT_DEF; 965 mt9v032->format.field = V4L2_FIELD_NONE; 966 mt9v032->format.colorspace = V4L2_COLORSPACE_SRGB; 967 968 mt9v032->hratio = 1; 969 mt9v032->vratio = 1; 970 971 mt9v032->aec_agc = MT9V032_AEC_ENABLE | MT9V032_AGC_ENABLE; 972 mt9v032->hblank = MT9V032_HORIZONTAL_BLANKING_DEF; 973 mt9v032->sysclk = MT9V032_SYSCLK_FREQ_DEF; 974 975 v4l2_i2c_subdev_init(&mt9v032->subdev, client, &mt9v032_subdev_ops); 976 mt9v032->subdev.internal_ops = &mt9v032_subdev_internal_ops; 977 mt9v032->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 978 979 mt9v032->pad.flags = MEDIA_PAD_FL_SOURCE; 980 ret = media_entity_init(&mt9v032->subdev.entity, 1, &mt9v032->pad, 0); 981 982 if (ret < 0) 983 v4l2_ctrl_handler_free(&mt9v032->ctrls); 984 985 return ret; 986 } 987 988 static int mt9v032_remove(struct i2c_client *client) 989 { 990 struct v4l2_subdev *subdev = i2c_get_clientdata(client); 991 struct mt9v032 *mt9v032 = to_mt9v032(subdev); 992 993 v4l2_ctrl_handler_free(&mt9v032->ctrls); 994 v4l2_device_unregister_subdev(subdev); 995 media_entity_cleanup(&subdev->entity); 996 997 return 0; 998 } 999 1000 static const struct i2c_device_id mt9v032_id[] = { 1001 { "mt9v032", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V032_COLOR] }, 1002 { "mt9v032m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V032_MONO] }, 1003 { "mt9v034", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V034_COLOR] }, 1004 { "mt9v034m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V034_MONO] }, 1005 { } 1006 }; 1007 MODULE_DEVICE_TABLE(i2c, mt9v032_id); 1008 1009 static struct i2c_driver mt9v032_driver = { 1010 .driver = { 1011 .name = "mt9v032", 1012 }, 1013 .probe = mt9v032_probe, 1014 .remove = mt9v032_remove, 1015 .id_table = mt9v032_id, 1016 }; 1017 1018 module_i2c_driver(mt9v032_driver); 1019 1020 MODULE_DESCRIPTION("Aptina MT9V032 Camera driver"); 1021 MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>"); 1022 MODULE_LICENSE("GPL"); 1023