1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2cb7a01acSMauro Carvalho Chehab /*
3d8dde6c8SPhilipp Zabel * Driver for MT9V022, MT9V024, MT9V032, and MT9V034 CMOS Image Sensors
4cb7a01acSMauro Carvalho Chehab *
5cb7a01acSMauro Carvalho Chehab * Copyright (C) 2010, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
6cb7a01acSMauro Carvalho Chehab *
7cb7a01acSMauro Carvalho Chehab * Based on the MT9M001 driver,
8cb7a01acSMauro Carvalho Chehab *
9cb7a01acSMauro Carvalho Chehab * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
10cb7a01acSMauro Carvalho Chehab */
11cb7a01acSMauro Carvalho Chehab
123300a8fdSLaurent Pinchart #include <linux/clk.h>
13cb7a01acSMauro Carvalho Chehab #include <linux/delay.h>
1428d5bdbeSMarkus Pargmann #include <linux/gpio/consumer.h>
15cb7a01acSMauro Carvalho Chehab #include <linux/i2c.h>
16cb7a01acSMauro Carvalho Chehab #include <linux/log2.h>
17cb7a01acSMauro Carvalho Chehab #include <linux/mutex.h>
18f2272e13SLaurent Pinchart #include <linux/of.h>
19859969b3SSakari Ailus #include <linux/of_graph.h>
2080b44ef2SPhilipp Zabel #include <linux/regmap.h>
21cb7a01acSMauro Carvalho Chehab #include <linux/slab.h>
22cb7a01acSMauro Carvalho Chehab #include <linux/videodev2.h>
23cb7a01acSMauro Carvalho Chehab #include <linux/v4l2-mediabus.h>
24cb7a01acSMauro Carvalho Chehab #include <linux/module.h>
25cb7a01acSMauro Carvalho Chehab
26b5dcee22SMauro Carvalho Chehab #include <media/i2c/mt9v032.h>
27cb7a01acSMauro Carvalho Chehab #include <media/v4l2-ctrls.h>
28cb7a01acSMauro Carvalho Chehab #include <media/v4l2-device.h>
29859969b3SSakari Ailus #include <media/v4l2-fwnode.h>
30cb7a01acSMauro Carvalho Chehab #include <media/v4l2-subdev.h>
31cb7a01acSMauro Carvalho Chehab
322b9e9f77SLaurent Pinchart /* The first four rows are black rows. The active area spans 753x481 pixels. */
332b9e9f77SLaurent Pinchart #define MT9V032_PIXEL_ARRAY_HEIGHT 485
342b9e9f77SLaurent Pinchart #define MT9V032_PIXEL_ARRAY_WIDTH 753
35cb7a01acSMauro Carvalho Chehab
36e9a50e4cSLaurent Pinchart #define MT9V032_SYSCLK_FREQ_DEF 26600000
37e9a50e4cSLaurent Pinchart
38cb7a01acSMauro Carvalho Chehab #define MT9V032_CHIP_VERSION 0x00
39cb7a01acSMauro Carvalho Chehab #define MT9V032_CHIP_ID_REV1 0x1311
40cb7a01acSMauro Carvalho Chehab #define MT9V032_CHIP_ID_REV3 0x1313
41daecfebcSLaurent Pinchart #define MT9V034_CHIP_ID_REV1 0X1324
42cb7a01acSMauro Carvalho Chehab #define MT9V032_COLUMN_START 0x01
43cb7a01acSMauro Carvalho Chehab #define MT9V032_COLUMN_START_MIN 1
44cb7a01acSMauro Carvalho Chehab #define MT9V032_COLUMN_START_DEF 1
45cb7a01acSMauro Carvalho Chehab #define MT9V032_COLUMN_START_MAX 752
46cb7a01acSMauro Carvalho Chehab #define MT9V032_ROW_START 0x02
47cb7a01acSMauro Carvalho Chehab #define MT9V032_ROW_START_MIN 4
48cb7a01acSMauro Carvalho Chehab #define MT9V032_ROW_START_DEF 5
49cb7a01acSMauro Carvalho Chehab #define MT9V032_ROW_START_MAX 482
50cb7a01acSMauro Carvalho Chehab #define MT9V032_WINDOW_HEIGHT 0x03
51cb7a01acSMauro Carvalho Chehab #define MT9V032_WINDOW_HEIGHT_MIN 1
52cb7a01acSMauro Carvalho Chehab #define MT9V032_WINDOW_HEIGHT_DEF 480
53cb7a01acSMauro Carvalho Chehab #define MT9V032_WINDOW_HEIGHT_MAX 480
54cb7a01acSMauro Carvalho Chehab #define MT9V032_WINDOW_WIDTH 0x04
55cb7a01acSMauro Carvalho Chehab #define MT9V032_WINDOW_WIDTH_MIN 1
56cb7a01acSMauro Carvalho Chehab #define MT9V032_WINDOW_WIDTH_DEF 752
57cb7a01acSMauro Carvalho Chehab #define MT9V032_WINDOW_WIDTH_MAX 752
58cb7a01acSMauro Carvalho Chehab #define MT9V032_HORIZONTAL_BLANKING 0x05
59cb7a01acSMauro Carvalho Chehab #define MT9V032_HORIZONTAL_BLANKING_MIN 43
60daecfebcSLaurent Pinchart #define MT9V034_HORIZONTAL_BLANKING_MIN 61
619ec670e2SLaurent Pinchart #define MT9V032_HORIZONTAL_BLANKING_DEF 94
62cb7a01acSMauro Carvalho Chehab #define MT9V032_HORIZONTAL_BLANKING_MAX 1023
63cb7a01acSMauro Carvalho Chehab #define MT9V032_VERTICAL_BLANKING 0x06
64cb7a01acSMauro Carvalho Chehab #define MT9V032_VERTICAL_BLANKING_MIN 4
65daecfebcSLaurent Pinchart #define MT9V034_VERTICAL_BLANKING_MIN 2
669ec670e2SLaurent Pinchart #define MT9V032_VERTICAL_BLANKING_DEF 45
67cb7a01acSMauro Carvalho Chehab #define MT9V032_VERTICAL_BLANKING_MAX 3000
68daecfebcSLaurent Pinchart #define MT9V034_VERTICAL_BLANKING_MAX 32288
69cb7a01acSMauro Carvalho Chehab #define MT9V032_CHIP_CONTROL 0x07
70cb7a01acSMauro Carvalho Chehab #define MT9V032_CHIP_CONTROL_MASTER_MODE (1 << 3)
71cb7a01acSMauro Carvalho Chehab #define MT9V032_CHIP_CONTROL_DOUT_ENABLE (1 << 7)
72cb7a01acSMauro Carvalho Chehab #define MT9V032_CHIP_CONTROL_SEQUENTIAL (1 << 8)
73cb7a01acSMauro Carvalho Chehab #define MT9V032_SHUTTER_WIDTH1 0x08
74cb7a01acSMauro Carvalho Chehab #define MT9V032_SHUTTER_WIDTH2 0x09
75cb7a01acSMauro Carvalho Chehab #define MT9V032_SHUTTER_WIDTH_CONTROL 0x0a
76cb7a01acSMauro Carvalho Chehab #define MT9V032_TOTAL_SHUTTER_WIDTH 0x0b
77cb7a01acSMauro Carvalho Chehab #define MT9V032_TOTAL_SHUTTER_WIDTH_MIN 1
78daecfebcSLaurent Pinchart #define MT9V034_TOTAL_SHUTTER_WIDTH_MIN 0
79cb7a01acSMauro Carvalho Chehab #define MT9V032_TOTAL_SHUTTER_WIDTH_DEF 480
80cb7a01acSMauro Carvalho Chehab #define MT9V032_TOTAL_SHUTTER_WIDTH_MAX 32767
81daecfebcSLaurent Pinchart #define MT9V034_TOTAL_SHUTTER_WIDTH_MAX 32765
82cb7a01acSMauro Carvalho Chehab #define MT9V032_RESET 0x0c
83cb7a01acSMauro Carvalho Chehab #define MT9V032_READ_MODE 0x0d
84cb7a01acSMauro Carvalho Chehab #define MT9V032_READ_MODE_ROW_BIN_MASK (3 << 0)
85cb7a01acSMauro Carvalho Chehab #define MT9V032_READ_MODE_ROW_BIN_SHIFT 0
86cb7a01acSMauro Carvalho Chehab #define MT9V032_READ_MODE_COLUMN_BIN_MASK (3 << 2)
87cb7a01acSMauro Carvalho Chehab #define MT9V032_READ_MODE_COLUMN_BIN_SHIFT 2
88cb7a01acSMauro Carvalho Chehab #define MT9V032_READ_MODE_ROW_FLIP (1 << 4)
89cb7a01acSMauro Carvalho Chehab #define MT9V032_READ_MODE_COLUMN_FLIP (1 << 5)
90cb7a01acSMauro Carvalho Chehab #define MT9V032_READ_MODE_DARK_COLUMNS (1 << 6)
91cb7a01acSMauro Carvalho Chehab #define MT9V032_READ_MODE_DARK_ROWS (1 << 7)
92d131e54bSPhilipp Zabel #define MT9V032_READ_MODE_RESERVED 0x0300
93cb7a01acSMauro Carvalho Chehab #define MT9V032_PIXEL_OPERATION_MODE 0x0f
94daecfebcSLaurent Pinchart #define MT9V034_PIXEL_OPERATION_MODE_HDR (1 << 0)
95daecfebcSLaurent Pinchart #define MT9V034_PIXEL_OPERATION_MODE_COLOR (1 << 1)
96cb7a01acSMauro Carvalho Chehab #define MT9V032_PIXEL_OPERATION_MODE_COLOR (1 << 2)
97cb7a01acSMauro Carvalho Chehab #define MT9V032_PIXEL_OPERATION_MODE_HDR (1 << 6)
98cb7a01acSMauro Carvalho Chehab #define MT9V032_ANALOG_GAIN 0x35
99cb7a01acSMauro Carvalho Chehab #define MT9V032_ANALOG_GAIN_MIN 16
100cb7a01acSMauro Carvalho Chehab #define MT9V032_ANALOG_GAIN_DEF 16
101cb7a01acSMauro Carvalho Chehab #define MT9V032_ANALOG_GAIN_MAX 64
102cb7a01acSMauro Carvalho Chehab #define MT9V032_MAX_ANALOG_GAIN 0x36
103cb7a01acSMauro Carvalho Chehab #define MT9V032_MAX_ANALOG_GAIN_MAX 127
104cb7a01acSMauro Carvalho Chehab #define MT9V032_FRAME_DARK_AVERAGE 0x42
105cb7a01acSMauro Carvalho Chehab #define MT9V032_DARK_AVG_THRESH 0x46
106cb7a01acSMauro Carvalho Chehab #define MT9V032_DARK_AVG_LOW_THRESH_MASK (255 << 0)
107cb7a01acSMauro Carvalho Chehab #define MT9V032_DARK_AVG_LOW_THRESH_SHIFT 0
108cb7a01acSMauro Carvalho Chehab #define MT9V032_DARK_AVG_HIGH_THRESH_MASK (255 << 8)
109cb7a01acSMauro Carvalho Chehab #define MT9V032_DARK_AVG_HIGH_THRESH_SHIFT 8
110cb7a01acSMauro Carvalho Chehab #define MT9V032_ROW_NOISE_CORR_CONTROL 0x70
111daecfebcSLaurent Pinchart #define MT9V034_ROW_NOISE_CORR_ENABLE (1 << 0)
112daecfebcSLaurent Pinchart #define MT9V034_ROW_NOISE_CORR_USE_BLK_AVG (1 << 1)
113cb7a01acSMauro Carvalho Chehab #define MT9V032_ROW_NOISE_CORR_ENABLE (1 << 5)
114cb7a01acSMauro Carvalho Chehab #define MT9V032_ROW_NOISE_CORR_USE_BLK_AVG (1 << 7)
115cb7a01acSMauro Carvalho Chehab #define MT9V032_PIXEL_CLOCK 0x74
116daecfebcSLaurent Pinchart #define MT9V034_PIXEL_CLOCK 0x72
117cb7a01acSMauro Carvalho Chehab #define MT9V032_PIXEL_CLOCK_INV_LINE (1 << 0)
118cb7a01acSMauro Carvalho Chehab #define MT9V032_PIXEL_CLOCK_INV_FRAME (1 << 1)
119cb7a01acSMauro Carvalho Chehab #define MT9V032_PIXEL_CLOCK_XOR_LINE (1 << 2)
120cb7a01acSMauro Carvalho Chehab #define MT9V032_PIXEL_CLOCK_CONT_LINE (1 << 3)
121cb7a01acSMauro Carvalho Chehab #define MT9V032_PIXEL_CLOCK_INV_PXL_CLK (1 << 4)
122cb7a01acSMauro Carvalho Chehab #define MT9V032_TEST_PATTERN 0x7f
123cb7a01acSMauro Carvalho Chehab #define MT9V032_TEST_PATTERN_DATA_MASK (1023 << 0)
124cb7a01acSMauro Carvalho Chehab #define MT9V032_TEST_PATTERN_DATA_SHIFT 0
125cb7a01acSMauro Carvalho Chehab #define MT9V032_TEST_PATTERN_USE_DATA (1 << 10)
126cb7a01acSMauro Carvalho Chehab #define MT9V032_TEST_PATTERN_GRAY_MASK (3 << 11)
127cb7a01acSMauro Carvalho Chehab #define MT9V032_TEST_PATTERN_GRAY_NONE (0 << 11)
128cb7a01acSMauro Carvalho Chehab #define MT9V032_TEST_PATTERN_GRAY_VERTICAL (1 << 11)
129cb7a01acSMauro Carvalho Chehab #define MT9V032_TEST_PATTERN_GRAY_HORIZONTAL (2 << 11)
130cb7a01acSMauro Carvalho Chehab #define MT9V032_TEST_PATTERN_GRAY_DIAGONAL (3 << 11)
131cb7a01acSMauro Carvalho Chehab #define MT9V032_TEST_PATTERN_ENABLE (1 << 13)
132cb7a01acSMauro Carvalho Chehab #define MT9V032_TEST_PATTERN_FLIP (1 << 14)
13381ea4829SMarkus Pargmann #define MT9V032_AEGC_DESIRED_BIN 0xa5
13481ea4829SMarkus Pargmann #define MT9V032_AEC_UPDATE_FREQUENCY 0xa6
13581ea4829SMarkus Pargmann #define MT9V032_AEC_LPF 0xa8
13681ea4829SMarkus Pargmann #define MT9V032_AGC_UPDATE_FREQUENCY 0xa9
13781ea4829SMarkus Pargmann #define MT9V032_AGC_LPF 0xaa
138cb7a01acSMauro Carvalho Chehab #define MT9V032_AEC_AGC_ENABLE 0xaf
139cb7a01acSMauro Carvalho Chehab #define MT9V032_AEC_ENABLE (1 << 0)
140cb7a01acSMauro Carvalho Chehab #define MT9V032_AGC_ENABLE (1 << 1)
14181ea4829SMarkus Pargmann #define MT9V034_AEC_MAX_SHUTTER_WIDTH 0xad
14281ea4829SMarkus Pargmann #define MT9V032_AEC_MAX_SHUTTER_WIDTH 0xbd
143cb7a01acSMauro Carvalho Chehab #define MT9V032_THERMAL_INFO 0xc1
144cb7a01acSMauro Carvalho Chehab
145220ddc7fSLaurent Pinchart enum mt9v032_model {
146d8dde6c8SPhilipp Zabel MT9V032_MODEL_V022_COLOR, /* MT9V022IX7ATC */
147d8dde6c8SPhilipp Zabel MT9V032_MODEL_V022_MONO, /* MT9V022IX7ATM */
148d8dde6c8SPhilipp Zabel MT9V032_MODEL_V024_COLOR, /* MT9V024IA7XTC */
149d8dde6c8SPhilipp Zabel MT9V032_MODEL_V024_MONO, /* MT9V024IA7XTM */
150d8dde6c8SPhilipp Zabel MT9V032_MODEL_V032_COLOR, /* MT9V032C12STM */
151d8dde6c8SPhilipp Zabel MT9V032_MODEL_V032_MONO, /* MT9V032C12STC */
152daecfebcSLaurent Pinchart MT9V032_MODEL_V034_COLOR,
153daecfebcSLaurent Pinchart MT9V032_MODEL_V034_MONO,
154220ddc7fSLaurent Pinchart };
155220ddc7fSLaurent Pinchart
1560a466b60SLaurent Pinchart struct mt9v032_model_version {
1570a466b60SLaurent Pinchart unsigned int version;
1580a466b60SLaurent Pinchart const char *name;
1590a466b60SLaurent Pinchart };
1600a466b60SLaurent Pinchart
1610a466b60SLaurent Pinchart struct mt9v032_model_data {
1620a466b60SLaurent Pinchart unsigned int min_row_time;
1630a466b60SLaurent Pinchart unsigned int min_hblank;
1640a466b60SLaurent Pinchart unsigned int min_vblank;
1650a466b60SLaurent Pinchart unsigned int max_vblank;
1660a466b60SLaurent Pinchart unsigned int min_shutter;
1670a466b60SLaurent Pinchart unsigned int max_shutter;
1680a466b60SLaurent Pinchart unsigned int pclk_reg;
16981ea4829SMarkus Pargmann unsigned int aec_max_shutter_reg;
17081ea4829SMarkus Pargmann const struct v4l2_ctrl_config * const aec_max_shutter_v4l2_ctrl;
1710a466b60SLaurent Pinchart };
1720a466b60SLaurent Pinchart
173220ddc7fSLaurent Pinchart struct mt9v032_model_info {
1740a466b60SLaurent Pinchart const struct mt9v032_model_data *data;
175220ddc7fSLaurent Pinchart bool color;
176220ddc7fSLaurent Pinchart };
177220ddc7fSLaurent Pinchart
1780a466b60SLaurent Pinchart static const struct mt9v032_model_version mt9v032_versions[] = {
179d8dde6c8SPhilipp Zabel { MT9V032_CHIP_ID_REV1, "MT9V022/MT9V032 rev1/2" },
180d8dde6c8SPhilipp Zabel { MT9V032_CHIP_ID_REV3, "MT9V022/MT9V032 rev3" },
181d8dde6c8SPhilipp Zabel { MT9V034_CHIP_ID_REV1, "MT9V024/MT9V034 rev1" },
1820a466b60SLaurent Pinchart };
1830a466b60SLaurent Pinchart
184cb7a01acSMauro Carvalho Chehab struct mt9v032 {
185cb7a01acSMauro Carvalho Chehab struct v4l2_subdev subdev;
186cb7a01acSMauro Carvalho Chehab struct media_pad pad;
187cb7a01acSMauro Carvalho Chehab
188cb7a01acSMauro Carvalho Chehab struct v4l2_mbus_framefmt format;
189cb7a01acSMauro Carvalho Chehab struct v4l2_rect crop;
190637f005eSLaurent Pinchart unsigned int hratio;
191637f005eSLaurent Pinchart unsigned int vratio;
192cb7a01acSMauro Carvalho Chehab
193cb7a01acSMauro Carvalho Chehab struct v4l2_ctrl_handler ctrls;
194e9a50e4cSLaurent Pinchart struct {
195e9a50e4cSLaurent Pinchart struct v4l2_ctrl *link_freq;
196e9a50e4cSLaurent Pinchart struct v4l2_ctrl *pixel_rate;
197e9a50e4cSLaurent Pinchart };
198cb7a01acSMauro Carvalho Chehab
199cb7a01acSMauro Carvalho Chehab struct mutex power_lock;
200cb7a01acSMauro Carvalho Chehab int power_count;
201cb7a01acSMauro Carvalho Chehab
20280b44ef2SPhilipp Zabel struct regmap *regmap;
2033300a8fdSLaurent Pinchart struct clk *clk;
20428d5bdbeSMarkus Pargmann struct gpio_desc *reset_gpio;
20528d5bdbeSMarkus Pargmann struct gpio_desc *standby_gpio;
2063300a8fdSLaurent Pinchart
207cb7a01acSMauro Carvalho Chehab struct mt9v032_platform_data *pdata;
208220ddc7fSLaurent Pinchart const struct mt9v032_model_info *model;
2090a466b60SLaurent Pinchart const struct mt9v032_model_version *version;
210e9a50e4cSLaurent Pinchart
211e9a50e4cSLaurent Pinchart u32 sysclk;
212cb7a01acSMauro Carvalho Chehab u16 aec_agc;
2139ec670e2SLaurent Pinchart u16 hblank;
214b28d7017SLad, Prabhakar struct {
215b28d7017SLad, Prabhakar struct v4l2_ctrl *test_pattern;
216b28d7017SLad, Prabhakar struct v4l2_ctrl *test_pattern_color;
217b28d7017SLad, Prabhakar };
218cb7a01acSMauro Carvalho Chehab };
219cb7a01acSMauro Carvalho Chehab
to_mt9v032(struct v4l2_subdev * sd)220cb7a01acSMauro Carvalho Chehab static struct mt9v032 *to_mt9v032(struct v4l2_subdev *sd)
221cb7a01acSMauro Carvalho Chehab {
222cb7a01acSMauro Carvalho Chehab return container_of(sd, struct mt9v032, subdev);
223cb7a01acSMauro Carvalho Chehab }
224cb7a01acSMauro Carvalho Chehab
225cb7a01acSMauro Carvalho Chehab static int
mt9v032_update_aec_agc(struct mt9v032 * mt9v032,u16 which,int enable)226cb7a01acSMauro Carvalho Chehab mt9v032_update_aec_agc(struct mt9v032 *mt9v032, u16 which, int enable)
227cb7a01acSMauro Carvalho Chehab {
22880b44ef2SPhilipp Zabel struct regmap *map = mt9v032->regmap;
229cb7a01acSMauro Carvalho Chehab u16 value = mt9v032->aec_agc;
230cb7a01acSMauro Carvalho Chehab int ret;
231cb7a01acSMauro Carvalho Chehab
232cb7a01acSMauro Carvalho Chehab if (enable)
233cb7a01acSMauro Carvalho Chehab value |= which;
234cb7a01acSMauro Carvalho Chehab else
235cb7a01acSMauro Carvalho Chehab value &= ~which;
236cb7a01acSMauro Carvalho Chehab
23780b44ef2SPhilipp Zabel ret = regmap_write(map, MT9V032_AEC_AGC_ENABLE, value);
238cb7a01acSMauro Carvalho Chehab if (ret < 0)
239cb7a01acSMauro Carvalho Chehab return ret;
240cb7a01acSMauro Carvalho Chehab
241cb7a01acSMauro Carvalho Chehab mt9v032->aec_agc = value;
242cb7a01acSMauro Carvalho Chehab return 0;
243cb7a01acSMauro Carvalho Chehab }
244cb7a01acSMauro Carvalho Chehab
2459ec670e2SLaurent Pinchart static int
mt9v032_update_hblank(struct mt9v032 * mt9v032)2469ec670e2SLaurent Pinchart mt9v032_update_hblank(struct mt9v032 *mt9v032)
2479ec670e2SLaurent Pinchart {
2489ec670e2SLaurent Pinchart struct v4l2_rect *crop = &mt9v032->crop;
249daecfebcSLaurent Pinchart unsigned int min_hblank = mt9v032->model->data->min_hblank;
2500a466b60SLaurent Pinchart unsigned int hblank;
2519ec670e2SLaurent Pinchart
252daecfebcSLaurent Pinchart if (mt9v032->version->version == MT9V034_CHIP_ID_REV1)
253daecfebcSLaurent Pinchart min_hblank += (mt9v032->hratio - 1) * 10;
254f17bc3f4SPhilipp Zabel min_hblank = max_t(int, mt9v032->model->data->min_row_time - crop->width,
255f17bc3f4SPhilipp Zabel min_hblank);
256daecfebcSLaurent Pinchart hblank = max_t(unsigned int, mt9v032->hblank, min_hblank);
257daecfebcSLaurent Pinchart
25880b44ef2SPhilipp Zabel return regmap_write(mt9v032->regmap, MT9V032_HORIZONTAL_BLANKING,
25980b44ef2SPhilipp Zabel hblank);
2609ec670e2SLaurent Pinchart }
2619ec670e2SLaurent Pinchart
mt9v032_power_on(struct mt9v032 * mt9v032)262cb7a01acSMauro Carvalho Chehab static int mt9v032_power_on(struct mt9v032 *mt9v032)
263cb7a01acSMauro Carvalho Chehab {
26480b44ef2SPhilipp Zabel struct regmap *map = mt9v032->regmap;
265cb7a01acSMauro Carvalho Chehab int ret;
266cb7a01acSMauro Carvalho Chehab
26728d5bdbeSMarkus Pargmann gpiod_set_value_cansleep(mt9v032->reset_gpio, 1);
26828d5bdbeSMarkus Pargmann
26979019190SLad, Prabhakar ret = clk_set_rate(mt9v032->clk, mt9v032->sysclk);
27079019190SLad, Prabhakar if (ret < 0)
27179019190SLad, Prabhakar return ret;
27279019190SLad, Prabhakar
27328d5bdbeSMarkus Pargmann /* System clock has to be enabled before releasing the reset */
27479019190SLad, Prabhakar ret = clk_prepare_enable(mt9v032->clk);
27579019190SLad, Prabhakar if (ret)
27679019190SLad, Prabhakar return ret;
27779019190SLad, Prabhakar
278cb7a01acSMauro Carvalho Chehab udelay(1);
279cb7a01acSMauro Carvalho Chehab
28028d5bdbeSMarkus Pargmann if (mt9v032->reset_gpio) {
28128d5bdbeSMarkus Pargmann gpiod_set_value_cansleep(mt9v032->reset_gpio, 0);
28228d5bdbeSMarkus Pargmann
28328d5bdbeSMarkus Pargmann /* After releasing reset we need to wait 10 clock cycles
28428d5bdbeSMarkus Pargmann * before accessing the sensor over I2C. As the minimum SYSCLK
28528d5bdbeSMarkus Pargmann * frequency is 13MHz, waiting 1µs will be enough in the worst
28628d5bdbeSMarkus Pargmann * case.
28728d5bdbeSMarkus Pargmann */
28828d5bdbeSMarkus Pargmann udelay(1);
28928d5bdbeSMarkus Pargmann }
29028d5bdbeSMarkus Pargmann
291cb7a01acSMauro Carvalho Chehab /* Reset the chip and stop data read out */
29280b44ef2SPhilipp Zabel ret = regmap_write(map, MT9V032_RESET, 1);
293cb7a01acSMauro Carvalho Chehab if (ret < 0)
2947df66d77SAlexey Khoroshilov goto err;
295cb7a01acSMauro Carvalho Chehab
29680b44ef2SPhilipp Zabel ret = regmap_write(map, MT9V032_RESET, 0);
297cb7a01acSMauro Carvalho Chehab if (ret < 0)
2987df66d77SAlexey Khoroshilov goto err;
299cb7a01acSMauro Carvalho Chehab
3007df66d77SAlexey Khoroshilov ret = regmap_write(map, MT9V032_CHIP_CONTROL,
30178060d51SMarkus Pargmann MT9V032_CHIP_CONTROL_MASTER_MODE);
3027df66d77SAlexey Khoroshilov if (ret < 0)
3037df66d77SAlexey Khoroshilov goto err;
3047df66d77SAlexey Khoroshilov
3057df66d77SAlexey Khoroshilov return 0;
3067df66d77SAlexey Khoroshilov
3077df66d77SAlexey Khoroshilov err:
3087df66d77SAlexey Khoroshilov clk_disable_unprepare(mt9v032->clk);
3097df66d77SAlexey Khoroshilov return ret;
310cb7a01acSMauro Carvalho Chehab }
311cb7a01acSMauro Carvalho Chehab
mt9v032_power_off(struct mt9v032 * mt9v032)312cb7a01acSMauro Carvalho Chehab static void mt9v032_power_off(struct mt9v032 *mt9v032)
313cb7a01acSMauro Carvalho Chehab {
3143300a8fdSLaurent Pinchart clk_disable_unprepare(mt9v032->clk);
315cb7a01acSMauro Carvalho Chehab }
316cb7a01acSMauro Carvalho Chehab
__mt9v032_set_power(struct mt9v032 * mt9v032,bool on)317cb7a01acSMauro Carvalho Chehab static int __mt9v032_set_power(struct mt9v032 *mt9v032, bool on)
318cb7a01acSMauro Carvalho Chehab {
31980b44ef2SPhilipp Zabel struct regmap *map = mt9v032->regmap;
320cb7a01acSMauro Carvalho Chehab int ret;
321cb7a01acSMauro Carvalho Chehab
322cb7a01acSMauro Carvalho Chehab if (!on) {
323cb7a01acSMauro Carvalho Chehab mt9v032_power_off(mt9v032);
324cb7a01acSMauro Carvalho Chehab return 0;
325cb7a01acSMauro Carvalho Chehab }
326cb7a01acSMauro Carvalho Chehab
327cb7a01acSMauro Carvalho Chehab ret = mt9v032_power_on(mt9v032);
328cb7a01acSMauro Carvalho Chehab if (ret < 0)
329cb7a01acSMauro Carvalho Chehab return ret;
330cb7a01acSMauro Carvalho Chehab
331cb7a01acSMauro Carvalho Chehab /* Configure the pixel clock polarity */
332cb7a01acSMauro Carvalho Chehab if (mt9v032->pdata && mt9v032->pdata->clk_pol) {
33380b44ef2SPhilipp Zabel ret = regmap_write(map, mt9v032->model->data->pclk_reg,
334cb7a01acSMauro Carvalho Chehab MT9V032_PIXEL_CLOCK_INV_PXL_CLK);
335cb7a01acSMauro Carvalho Chehab if (ret < 0)
336cb7a01acSMauro Carvalho Chehab return ret;
337cb7a01acSMauro Carvalho Chehab }
338cb7a01acSMauro Carvalho Chehab
339cb7a01acSMauro Carvalho Chehab /* Disable the noise correction algorithm and restore the controls. */
34080b44ef2SPhilipp Zabel ret = regmap_write(map, MT9V032_ROW_NOISE_CORR_CONTROL, 0);
341cb7a01acSMauro Carvalho Chehab if (ret < 0)
342cb7a01acSMauro Carvalho Chehab return ret;
343cb7a01acSMauro Carvalho Chehab
344cb7a01acSMauro Carvalho Chehab return v4l2_ctrl_handler_setup(&mt9v032->ctrls);
345cb7a01acSMauro Carvalho Chehab }
346cb7a01acSMauro Carvalho Chehab
347cb7a01acSMauro Carvalho Chehab /* -----------------------------------------------------------------------------
348cb7a01acSMauro Carvalho Chehab * V4L2 subdev video operations
349cb7a01acSMauro Carvalho Chehab */
350cb7a01acSMauro Carvalho Chehab
351cb7a01acSMauro Carvalho Chehab static struct v4l2_mbus_framefmt *
__mt9v032_get_pad_format(struct mt9v032 * mt9v032,struct v4l2_subdev_state * sd_state,unsigned int pad,enum v4l2_subdev_format_whence which)3520d346d2aSTomi Valkeinen __mt9v032_get_pad_format(struct mt9v032 *mt9v032,
3530d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
354cb7a01acSMauro Carvalho Chehab unsigned int pad, enum v4l2_subdev_format_whence which)
355cb7a01acSMauro Carvalho Chehab {
356cb7a01acSMauro Carvalho Chehab switch (which) {
357cb7a01acSMauro Carvalho Chehab case V4L2_SUBDEV_FORMAT_TRY:
3580d346d2aSTomi Valkeinen return v4l2_subdev_get_try_format(&mt9v032->subdev, sd_state,
3590d346d2aSTomi Valkeinen pad);
360cb7a01acSMauro Carvalho Chehab case V4L2_SUBDEV_FORMAT_ACTIVE:
361cb7a01acSMauro Carvalho Chehab return &mt9v032->format;
362cb7a01acSMauro Carvalho Chehab default:
363cb7a01acSMauro Carvalho Chehab return NULL;
364cb7a01acSMauro Carvalho Chehab }
365cb7a01acSMauro Carvalho Chehab }
366cb7a01acSMauro Carvalho Chehab
367cb7a01acSMauro Carvalho Chehab static struct v4l2_rect *
__mt9v032_get_pad_crop(struct mt9v032 * mt9v032,struct v4l2_subdev_state * sd_state,unsigned int pad,enum v4l2_subdev_format_whence which)3680d346d2aSTomi Valkeinen __mt9v032_get_pad_crop(struct mt9v032 *mt9v032,
3690d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
370cb7a01acSMauro Carvalho Chehab unsigned int pad, enum v4l2_subdev_format_whence which)
371cb7a01acSMauro Carvalho Chehab {
372cb7a01acSMauro Carvalho Chehab switch (which) {
373cb7a01acSMauro Carvalho Chehab case V4L2_SUBDEV_FORMAT_TRY:
3740d346d2aSTomi Valkeinen return v4l2_subdev_get_try_crop(&mt9v032->subdev, sd_state,
3750d346d2aSTomi Valkeinen pad);
376cb7a01acSMauro Carvalho Chehab case V4L2_SUBDEV_FORMAT_ACTIVE:
377cb7a01acSMauro Carvalho Chehab return &mt9v032->crop;
378cb7a01acSMauro Carvalho Chehab default:
379cb7a01acSMauro Carvalho Chehab return NULL;
380cb7a01acSMauro Carvalho Chehab }
381cb7a01acSMauro Carvalho Chehab }
382cb7a01acSMauro Carvalho Chehab
mt9v032_s_stream(struct v4l2_subdev * subdev,int enable)383cb7a01acSMauro Carvalho Chehab static int mt9v032_s_stream(struct v4l2_subdev *subdev, int enable)
384cb7a01acSMauro Carvalho Chehab {
38578060d51SMarkus Pargmann const u16 mode = MT9V032_CHIP_CONTROL_DOUT_ENABLE
386cb7a01acSMauro Carvalho Chehab | MT9V032_CHIP_CONTROL_SEQUENTIAL;
387cb7a01acSMauro Carvalho Chehab struct mt9v032 *mt9v032 = to_mt9v032(subdev);
388cb7a01acSMauro Carvalho Chehab struct v4l2_rect *crop = &mt9v032->crop;
38980b44ef2SPhilipp Zabel struct regmap *map = mt9v032->regmap;
390637f005eSLaurent Pinchart unsigned int hbin;
391637f005eSLaurent Pinchart unsigned int vbin;
392cb7a01acSMauro Carvalho Chehab int ret;
393cb7a01acSMauro Carvalho Chehab
394cb7a01acSMauro Carvalho Chehab if (!enable)
39580b44ef2SPhilipp Zabel return regmap_update_bits(map, MT9V032_CHIP_CONTROL, mode, 0);
396cb7a01acSMauro Carvalho Chehab
397cb7a01acSMauro Carvalho Chehab /* Configure the window size and row/column bin */
398637f005eSLaurent Pinchart hbin = fls(mt9v032->hratio) - 1;
399637f005eSLaurent Pinchart vbin = fls(mt9v032->vratio) - 1;
40080b44ef2SPhilipp Zabel ret = regmap_update_bits(map, MT9V032_READ_MODE,
40180b44ef2SPhilipp Zabel ~MT9V032_READ_MODE_RESERVED,
40280b44ef2SPhilipp Zabel hbin << MT9V032_READ_MODE_COLUMN_BIN_SHIFT |
40380b44ef2SPhilipp Zabel vbin << MT9V032_READ_MODE_ROW_BIN_SHIFT);
404cb7a01acSMauro Carvalho Chehab if (ret < 0)
405cb7a01acSMauro Carvalho Chehab return ret;
406cb7a01acSMauro Carvalho Chehab
40780b44ef2SPhilipp Zabel ret = regmap_write(map, MT9V032_COLUMN_START, crop->left);
408cb7a01acSMauro Carvalho Chehab if (ret < 0)
409cb7a01acSMauro Carvalho Chehab return ret;
410cb7a01acSMauro Carvalho Chehab
41180b44ef2SPhilipp Zabel ret = regmap_write(map, MT9V032_ROW_START, crop->top);
412cb7a01acSMauro Carvalho Chehab if (ret < 0)
413cb7a01acSMauro Carvalho Chehab return ret;
414cb7a01acSMauro Carvalho Chehab
41580b44ef2SPhilipp Zabel ret = regmap_write(map, MT9V032_WINDOW_WIDTH, crop->width);
416cb7a01acSMauro Carvalho Chehab if (ret < 0)
417cb7a01acSMauro Carvalho Chehab return ret;
418cb7a01acSMauro Carvalho Chehab
41980b44ef2SPhilipp Zabel ret = regmap_write(map, MT9V032_WINDOW_HEIGHT, crop->height);
420cb7a01acSMauro Carvalho Chehab if (ret < 0)
421cb7a01acSMauro Carvalho Chehab return ret;
422cb7a01acSMauro Carvalho Chehab
4239ec670e2SLaurent Pinchart ret = mt9v032_update_hblank(mt9v032);
424cb7a01acSMauro Carvalho Chehab if (ret < 0)
425cb7a01acSMauro Carvalho Chehab return ret;
426cb7a01acSMauro Carvalho Chehab
427cb7a01acSMauro Carvalho Chehab /* Switch to master "normal" mode */
42880b44ef2SPhilipp Zabel return regmap_update_bits(map, MT9V032_CHIP_CONTROL, mode, mode);
429cb7a01acSMauro Carvalho Chehab }
430cb7a01acSMauro Carvalho Chehab
mt9v032_enum_mbus_code(struct v4l2_subdev * subdev,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)431cb7a01acSMauro Carvalho Chehab static int mt9v032_enum_mbus_code(struct v4l2_subdev *subdev,
4320d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
433cb7a01acSMauro Carvalho Chehab struct v4l2_subdev_mbus_code_enum *code)
434cb7a01acSMauro Carvalho Chehab {
4351451d5aeSEugen Hristev struct mt9v032 *mt9v032 = to_mt9v032(subdev);
4361451d5aeSEugen Hristev
437cb7a01acSMauro Carvalho Chehab if (code->index > 0)
438cb7a01acSMauro Carvalho Chehab return -EINVAL;
439cb7a01acSMauro Carvalho Chehab
4401451d5aeSEugen Hristev code->code = mt9v032->format.code;
441cb7a01acSMauro Carvalho Chehab return 0;
442cb7a01acSMauro Carvalho Chehab }
443cb7a01acSMauro Carvalho Chehab
mt9v032_enum_frame_size(struct v4l2_subdev * subdev,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_size_enum * fse)444cb7a01acSMauro Carvalho Chehab static int mt9v032_enum_frame_size(struct v4l2_subdev *subdev,
4450d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
446cb7a01acSMauro Carvalho Chehab struct v4l2_subdev_frame_size_enum *fse)
447cb7a01acSMauro Carvalho Chehab {
4481451d5aeSEugen Hristev struct mt9v032 *mt9v032 = to_mt9v032(subdev);
4491451d5aeSEugen Hristev
4501451d5aeSEugen Hristev if (fse->index >= 3)
4511451d5aeSEugen Hristev return -EINVAL;
4521451d5aeSEugen Hristev if (mt9v032->format.code != fse->code)
453cb7a01acSMauro Carvalho Chehab return -EINVAL;
454cb7a01acSMauro Carvalho Chehab
455637f005eSLaurent Pinchart fse->min_width = MT9V032_WINDOW_WIDTH_DEF / (1 << fse->index);
456cb7a01acSMauro Carvalho Chehab fse->max_width = fse->min_width;
457637f005eSLaurent Pinchart fse->min_height = MT9V032_WINDOW_HEIGHT_DEF / (1 << fse->index);
458cb7a01acSMauro Carvalho Chehab fse->max_height = fse->min_height;
459cb7a01acSMauro Carvalho Chehab
460cb7a01acSMauro Carvalho Chehab return 0;
461cb7a01acSMauro Carvalho Chehab }
462cb7a01acSMauro Carvalho Chehab
mt9v032_get_format(struct v4l2_subdev * subdev,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * format)463cb7a01acSMauro Carvalho Chehab static int mt9v032_get_format(struct v4l2_subdev *subdev,
4640d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
465cb7a01acSMauro Carvalho Chehab struct v4l2_subdev_format *format)
466cb7a01acSMauro Carvalho Chehab {
467cb7a01acSMauro Carvalho Chehab struct mt9v032 *mt9v032 = to_mt9v032(subdev);
468cb7a01acSMauro Carvalho Chehab
4690d346d2aSTomi Valkeinen format->format = *__mt9v032_get_pad_format(mt9v032, sd_state,
4700d346d2aSTomi Valkeinen format->pad,
471cb7a01acSMauro Carvalho Chehab format->which);
472cb7a01acSMauro Carvalho Chehab return 0;
473cb7a01acSMauro Carvalho Chehab }
474cb7a01acSMauro Carvalho Chehab
mt9v032_configure_pixel_rate(struct mt9v032 * mt9v032)475637f005eSLaurent Pinchart static void mt9v032_configure_pixel_rate(struct mt9v032 *mt9v032)
47641a33a00SSakari Ailus {
47741a33a00SSakari Ailus struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
47841a33a00SSakari Ailus int ret;
47941a33a00SSakari Ailus
480e9a50e4cSLaurent Pinchart ret = v4l2_ctrl_s_ctrl_int64(mt9v032->pixel_rate,
481637f005eSLaurent Pinchart mt9v032->sysclk / mt9v032->hratio);
48241a33a00SSakari Ailus if (ret < 0)
48341a33a00SSakari Ailus dev_warn(&client->dev, "failed to set pixel rate (%d)\n", ret);
48441a33a00SSakari Ailus }
48541a33a00SSakari Ailus
mt9v032_calc_ratio(unsigned int input,unsigned int output)486637f005eSLaurent Pinchart static unsigned int mt9v032_calc_ratio(unsigned int input, unsigned int output)
487637f005eSLaurent Pinchart {
488637f005eSLaurent Pinchart /* Compute the power-of-two binning factor closest to the input size to
489637f005eSLaurent Pinchart * output size ratio. Given that the output size is bounded by input/4
490637f005eSLaurent Pinchart * and input, a generic implementation would be an ineffective luxury.
491637f005eSLaurent Pinchart */
492637f005eSLaurent Pinchart if (output * 3 > input * 2)
493637f005eSLaurent Pinchart return 1;
494637f005eSLaurent Pinchart if (output * 3 > input)
495637f005eSLaurent Pinchart return 2;
496637f005eSLaurent Pinchart return 4;
497637f005eSLaurent Pinchart }
498637f005eSLaurent Pinchart
mt9v032_set_format(struct v4l2_subdev * subdev,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * format)499cb7a01acSMauro Carvalho Chehab static int mt9v032_set_format(struct v4l2_subdev *subdev,
5000d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
501cb7a01acSMauro Carvalho Chehab struct v4l2_subdev_format *format)
502cb7a01acSMauro Carvalho Chehab {
503cb7a01acSMauro Carvalho Chehab struct mt9v032 *mt9v032 = to_mt9v032(subdev);
504cb7a01acSMauro Carvalho Chehab struct v4l2_mbus_framefmt *__format;
505cb7a01acSMauro Carvalho Chehab struct v4l2_rect *__crop;
506cb7a01acSMauro Carvalho Chehab unsigned int width;
507cb7a01acSMauro Carvalho Chehab unsigned int height;
508cb7a01acSMauro Carvalho Chehab unsigned int hratio;
509cb7a01acSMauro Carvalho Chehab unsigned int vratio;
510cb7a01acSMauro Carvalho Chehab
5110d346d2aSTomi Valkeinen __crop = __mt9v032_get_pad_crop(mt9v032, sd_state, format->pad,
512cb7a01acSMauro Carvalho Chehab format->which);
513cb7a01acSMauro Carvalho Chehab
514cb7a01acSMauro Carvalho Chehab /* Clamp the width and height to avoid dividing by zero. */
515f90580caSRicardo Ribalda width = clamp(ALIGN(format->format.width, 2),
516f90580caSRicardo Ribalda max_t(unsigned int, __crop->width / 4,
517f90580caSRicardo Ribalda MT9V032_WINDOW_WIDTH_MIN),
518cb7a01acSMauro Carvalho Chehab __crop->width);
519f90580caSRicardo Ribalda height = clamp(ALIGN(format->format.height, 2),
520f90580caSRicardo Ribalda max_t(unsigned int, __crop->height / 4,
521f90580caSRicardo Ribalda MT9V032_WINDOW_HEIGHT_MIN),
522cb7a01acSMauro Carvalho Chehab __crop->height);
523cb7a01acSMauro Carvalho Chehab
524637f005eSLaurent Pinchart hratio = mt9v032_calc_ratio(__crop->width, width);
525637f005eSLaurent Pinchart vratio = mt9v032_calc_ratio(__crop->height, height);
526cb7a01acSMauro Carvalho Chehab
5270d346d2aSTomi Valkeinen __format = __mt9v032_get_pad_format(mt9v032, sd_state, format->pad,
528cb7a01acSMauro Carvalho Chehab format->which);
529cb7a01acSMauro Carvalho Chehab __format->width = __crop->width / hratio;
530cb7a01acSMauro Carvalho Chehab __format->height = __crop->height / vratio;
531637f005eSLaurent Pinchart
532637f005eSLaurent Pinchart if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
533637f005eSLaurent Pinchart mt9v032->hratio = hratio;
534637f005eSLaurent Pinchart mt9v032->vratio = vratio;
535637f005eSLaurent Pinchart mt9v032_configure_pixel_rate(mt9v032);
536637f005eSLaurent Pinchart }
537cb7a01acSMauro Carvalho Chehab
538cb7a01acSMauro Carvalho Chehab format->format = *__format;
539cb7a01acSMauro Carvalho Chehab
540cb7a01acSMauro Carvalho Chehab return 0;
541cb7a01acSMauro Carvalho Chehab }
542cb7a01acSMauro Carvalho Chehab
mt9v032_get_selection(struct v4l2_subdev * subdev,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_selection * sel)5431a023febSHans Verkuil static int mt9v032_get_selection(struct v4l2_subdev *subdev,
5440d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
5451a023febSHans Verkuil struct v4l2_subdev_selection *sel)
546cb7a01acSMauro Carvalho Chehab {
547cb7a01acSMauro Carvalho Chehab struct mt9v032 *mt9v032 = to_mt9v032(subdev);
548cb7a01acSMauro Carvalho Chehab
5491a023febSHans Verkuil if (sel->target != V4L2_SEL_TGT_CROP)
5501a023febSHans Verkuil return -EINVAL;
5511a023febSHans Verkuil
5520d346d2aSTomi Valkeinen sel->r = *__mt9v032_get_pad_crop(mt9v032, sd_state, sel->pad,
5530d346d2aSTomi Valkeinen sel->which);
554cb7a01acSMauro Carvalho Chehab return 0;
555cb7a01acSMauro Carvalho Chehab }
556cb7a01acSMauro Carvalho Chehab
mt9v032_set_selection(struct v4l2_subdev * subdev,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_selection * sel)5571a023febSHans Verkuil static int mt9v032_set_selection(struct v4l2_subdev *subdev,
5580d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
5591a023febSHans Verkuil struct v4l2_subdev_selection *sel)
560cb7a01acSMauro Carvalho Chehab {
561cb7a01acSMauro Carvalho Chehab struct mt9v032 *mt9v032 = to_mt9v032(subdev);
562cb7a01acSMauro Carvalho Chehab struct v4l2_mbus_framefmt *__format;
563cb7a01acSMauro Carvalho Chehab struct v4l2_rect *__crop;
564cb7a01acSMauro Carvalho Chehab struct v4l2_rect rect;
565cb7a01acSMauro Carvalho Chehab
5661a023febSHans Verkuil if (sel->target != V4L2_SEL_TGT_CROP)
5671a023febSHans Verkuil return -EINVAL;
5681a023febSHans Verkuil
569cb7a01acSMauro Carvalho Chehab /* Clamp the crop rectangle boundaries and align them to a non multiple
570cb7a01acSMauro Carvalho Chehab * of 2 pixels to ensure a GRBG Bayer pattern.
571cb7a01acSMauro Carvalho Chehab */
5721a023febSHans Verkuil rect.left = clamp(ALIGN(sel->r.left + 1, 2) - 1,
573cb7a01acSMauro Carvalho Chehab MT9V032_COLUMN_START_MIN,
574cb7a01acSMauro Carvalho Chehab MT9V032_COLUMN_START_MAX);
5751a023febSHans Verkuil rect.top = clamp(ALIGN(sel->r.top + 1, 2) - 1,
576cb7a01acSMauro Carvalho Chehab MT9V032_ROW_START_MIN,
577cb7a01acSMauro Carvalho Chehab MT9V032_ROW_START_MAX);
5781a023febSHans Verkuil rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 2),
579cb7a01acSMauro Carvalho Chehab MT9V032_WINDOW_WIDTH_MIN,
580cb7a01acSMauro Carvalho Chehab MT9V032_WINDOW_WIDTH_MAX);
5811a023febSHans Verkuil rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 2),
582cb7a01acSMauro Carvalho Chehab MT9V032_WINDOW_HEIGHT_MIN,
583cb7a01acSMauro Carvalho Chehab MT9V032_WINDOW_HEIGHT_MAX);
584cb7a01acSMauro Carvalho Chehab
585f90580caSRicardo Ribalda rect.width = min_t(unsigned int,
586f90580caSRicardo Ribalda rect.width, MT9V032_PIXEL_ARRAY_WIDTH - rect.left);
587f90580caSRicardo Ribalda rect.height = min_t(unsigned int,
588f90580caSRicardo Ribalda rect.height, MT9V032_PIXEL_ARRAY_HEIGHT - rect.top);
589cb7a01acSMauro Carvalho Chehab
5900d346d2aSTomi Valkeinen __crop = __mt9v032_get_pad_crop(mt9v032, sd_state, sel->pad,
5910d346d2aSTomi Valkeinen sel->which);
592cb7a01acSMauro Carvalho Chehab
593cb7a01acSMauro Carvalho Chehab if (rect.width != __crop->width || rect.height != __crop->height) {
594cb7a01acSMauro Carvalho Chehab /* Reset the output image size if the crop rectangle size has
595cb7a01acSMauro Carvalho Chehab * been modified.
596cb7a01acSMauro Carvalho Chehab */
5970d346d2aSTomi Valkeinen __format = __mt9v032_get_pad_format(mt9v032, sd_state,
5980d346d2aSTomi Valkeinen sel->pad,
5991a023febSHans Verkuil sel->which);
600cb7a01acSMauro Carvalho Chehab __format->width = rect.width;
601cb7a01acSMauro Carvalho Chehab __format->height = rect.height;
6021a023febSHans Verkuil if (sel->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
603637f005eSLaurent Pinchart mt9v032->hratio = 1;
604637f005eSLaurent Pinchart mt9v032->vratio = 1;
605637f005eSLaurent Pinchart mt9v032_configure_pixel_rate(mt9v032);
606637f005eSLaurent Pinchart }
607cb7a01acSMauro Carvalho Chehab }
608cb7a01acSMauro Carvalho Chehab
609cb7a01acSMauro Carvalho Chehab *__crop = rect;
6101a023febSHans Verkuil sel->r = rect;
611cb7a01acSMauro Carvalho Chehab
612cb7a01acSMauro Carvalho Chehab return 0;
613cb7a01acSMauro Carvalho Chehab }
614cb7a01acSMauro Carvalho Chehab
615cb7a01acSMauro Carvalho Chehab /* -----------------------------------------------------------------------------
616cb7a01acSMauro Carvalho Chehab * V4L2 subdev control operations
617cb7a01acSMauro Carvalho Chehab */
618cb7a01acSMauro Carvalho Chehab
619b28d7017SLad, Prabhakar #define V4L2_CID_TEST_PATTERN_COLOR (V4L2_CID_USER_BASE | 0x1001)
62081ea4829SMarkus Pargmann /*
62181ea4829SMarkus Pargmann * Value between 1 and 64 to set the desired bin. This is effectively a measure
62281ea4829SMarkus Pargmann * of how bright the image is supposed to be. Both AGC and AEC try to reach
62381ea4829SMarkus Pargmann * this.
62481ea4829SMarkus Pargmann */
62581ea4829SMarkus Pargmann #define V4L2_CID_AEGC_DESIRED_BIN (V4L2_CID_USER_BASE | 0x1002)
62681ea4829SMarkus Pargmann /*
62781ea4829SMarkus Pargmann * LPF is the low pass filter capability of the chip. Both AEC and AGC have
62881ea4829SMarkus Pargmann * this setting. This limits the speed in which AGC/AEC adjust their settings.
62981ea4829SMarkus Pargmann * Possible values are 0-2. 0 means no LPF. For 1 and 2 this equation is used:
63081ea4829SMarkus Pargmann *
63181ea4829SMarkus Pargmann * if |(calculated new exp - current exp)| > (current exp / 4)
63281ea4829SMarkus Pargmann * next exp = calculated new exp
63381ea4829SMarkus Pargmann * else
63481ea4829SMarkus Pargmann * next exp = current exp + ((calculated new exp - current exp) / 2^LPF)
63581ea4829SMarkus Pargmann */
63681ea4829SMarkus Pargmann #define V4L2_CID_AEC_LPF (V4L2_CID_USER_BASE | 0x1003)
63781ea4829SMarkus Pargmann #define V4L2_CID_AGC_LPF (V4L2_CID_USER_BASE | 0x1004)
63881ea4829SMarkus Pargmann /*
63981ea4829SMarkus Pargmann * Value between 0 and 15. This is the number of frames being skipped before
64081ea4829SMarkus Pargmann * updating the auto exposure/gain.
64181ea4829SMarkus Pargmann */
64281ea4829SMarkus Pargmann #define V4L2_CID_AEC_UPDATE_INTERVAL (V4L2_CID_USER_BASE | 0x1005)
64381ea4829SMarkus Pargmann #define V4L2_CID_AGC_UPDATE_INTERVAL (V4L2_CID_USER_BASE | 0x1006)
64481ea4829SMarkus Pargmann /*
64581ea4829SMarkus Pargmann * Maximum shutter width used for AEC.
64681ea4829SMarkus Pargmann */
64781ea4829SMarkus Pargmann #define V4L2_CID_AEC_MAX_SHUTTER_WIDTH (V4L2_CID_USER_BASE | 0x1007)
648cb7a01acSMauro Carvalho Chehab
mt9v032_s_ctrl(struct v4l2_ctrl * ctrl)649cb7a01acSMauro Carvalho Chehab static int mt9v032_s_ctrl(struct v4l2_ctrl *ctrl)
650cb7a01acSMauro Carvalho Chehab {
651cb7a01acSMauro Carvalho Chehab struct mt9v032 *mt9v032 =
652cb7a01acSMauro Carvalho Chehab container_of(ctrl->handler, struct mt9v032, ctrls);
65380b44ef2SPhilipp Zabel struct regmap *map = mt9v032->regmap;
654e9a50e4cSLaurent Pinchart u32 freq;
655cb7a01acSMauro Carvalho Chehab u16 data;
656cb7a01acSMauro Carvalho Chehab
657cb7a01acSMauro Carvalho Chehab switch (ctrl->id) {
658cb7a01acSMauro Carvalho Chehab case V4L2_CID_AUTOGAIN:
659cb7a01acSMauro Carvalho Chehab return mt9v032_update_aec_agc(mt9v032, MT9V032_AGC_ENABLE,
660cb7a01acSMauro Carvalho Chehab ctrl->val);
661cb7a01acSMauro Carvalho Chehab
662cb7a01acSMauro Carvalho Chehab case V4L2_CID_GAIN:
66380b44ef2SPhilipp Zabel return regmap_write(map, MT9V032_ANALOG_GAIN, ctrl->val);
664cb7a01acSMauro Carvalho Chehab
665cb7a01acSMauro Carvalho Chehab case V4L2_CID_EXPOSURE_AUTO:
666cb7a01acSMauro Carvalho Chehab return mt9v032_update_aec_agc(mt9v032, MT9V032_AEC_ENABLE,
667cb7a01acSMauro Carvalho Chehab !ctrl->val);
668cb7a01acSMauro Carvalho Chehab
669cb7a01acSMauro Carvalho Chehab case V4L2_CID_EXPOSURE:
67080b44ef2SPhilipp Zabel return regmap_write(map, MT9V032_TOTAL_SHUTTER_WIDTH,
671cb7a01acSMauro Carvalho Chehab ctrl->val);
672cb7a01acSMauro Carvalho Chehab
6739ec670e2SLaurent Pinchart case V4L2_CID_HBLANK:
6749ec670e2SLaurent Pinchart mt9v032->hblank = ctrl->val;
6759ec670e2SLaurent Pinchart return mt9v032_update_hblank(mt9v032);
6769ec670e2SLaurent Pinchart
6779ec670e2SLaurent Pinchart case V4L2_CID_VBLANK:
67880b44ef2SPhilipp Zabel return regmap_write(map, MT9V032_VERTICAL_BLANKING,
6799ec670e2SLaurent Pinchart ctrl->val);
6809ec670e2SLaurent Pinchart
681e9a50e4cSLaurent Pinchart case V4L2_CID_PIXEL_RATE:
682e9a50e4cSLaurent Pinchart case V4L2_CID_LINK_FREQ:
683e9a50e4cSLaurent Pinchart if (mt9v032->link_freq == NULL)
684e9a50e4cSLaurent Pinchart break;
685e9a50e4cSLaurent Pinchart
686e9a50e4cSLaurent Pinchart freq = mt9v032->pdata->link_freqs[mt9v032->link_freq->val];
6872a9ec373SHans Verkuil *mt9v032->pixel_rate->p_new.p_s64 = freq;
688e9a50e4cSLaurent Pinchart mt9v032->sysclk = freq;
689e9a50e4cSLaurent Pinchart break;
690e9a50e4cSLaurent Pinchart
691cb7a01acSMauro Carvalho Chehab case V4L2_CID_TEST_PATTERN:
692b28d7017SLad, Prabhakar switch (mt9v032->test_pattern->val) {
693cb7a01acSMauro Carvalho Chehab case 0:
694cb7a01acSMauro Carvalho Chehab data = 0;
695cb7a01acSMauro Carvalho Chehab break;
696cb7a01acSMauro Carvalho Chehab case 1:
697cb7a01acSMauro Carvalho Chehab data = MT9V032_TEST_PATTERN_GRAY_VERTICAL
698cb7a01acSMauro Carvalho Chehab | MT9V032_TEST_PATTERN_ENABLE;
699cb7a01acSMauro Carvalho Chehab break;
700cb7a01acSMauro Carvalho Chehab case 2:
701cb7a01acSMauro Carvalho Chehab data = MT9V032_TEST_PATTERN_GRAY_HORIZONTAL
702cb7a01acSMauro Carvalho Chehab | MT9V032_TEST_PATTERN_ENABLE;
703cb7a01acSMauro Carvalho Chehab break;
704cb7a01acSMauro Carvalho Chehab case 3:
705cb7a01acSMauro Carvalho Chehab data = MT9V032_TEST_PATTERN_GRAY_DIAGONAL
706cb7a01acSMauro Carvalho Chehab | MT9V032_TEST_PATTERN_ENABLE;
707cb7a01acSMauro Carvalho Chehab break;
708cb7a01acSMauro Carvalho Chehab default:
709b28d7017SLad, Prabhakar data = (mt9v032->test_pattern_color->val <<
710b28d7017SLad, Prabhakar MT9V032_TEST_PATTERN_DATA_SHIFT)
711cb7a01acSMauro Carvalho Chehab | MT9V032_TEST_PATTERN_USE_DATA
712cb7a01acSMauro Carvalho Chehab | MT9V032_TEST_PATTERN_ENABLE
713cb7a01acSMauro Carvalho Chehab | MT9V032_TEST_PATTERN_FLIP;
714cb7a01acSMauro Carvalho Chehab break;
715cb7a01acSMauro Carvalho Chehab }
71680b44ef2SPhilipp Zabel return regmap_write(map, MT9V032_TEST_PATTERN, data);
71781ea4829SMarkus Pargmann
71881ea4829SMarkus Pargmann case V4L2_CID_AEGC_DESIRED_BIN:
71981ea4829SMarkus Pargmann return regmap_write(map, MT9V032_AEGC_DESIRED_BIN, ctrl->val);
72081ea4829SMarkus Pargmann
72181ea4829SMarkus Pargmann case V4L2_CID_AEC_LPF:
72281ea4829SMarkus Pargmann return regmap_write(map, MT9V032_AEC_LPF, ctrl->val);
72381ea4829SMarkus Pargmann
72481ea4829SMarkus Pargmann case V4L2_CID_AGC_LPF:
72581ea4829SMarkus Pargmann return regmap_write(map, MT9V032_AGC_LPF, ctrl->val);
72681ea4829SMarkus Pargmann
72781ea4829SMarkus Pargmann case V4L2_CID_AEC_UPDATE_INTERVAL:
72881ea4829SMarkus Pargmann return regmap_write(map, MT9V032_AEC_UPDATE_FREQUENCY,
72981ea4829SMarkus Pargmann ctrl->val);
73081ea4829SMarkus Pargmann
73181ea4829SMarkus Pargmann case V4L2_CID_AGC_UPDATE_INTERVAL:
73281ea4829SMarkus Pargmann return regmap_write(map, MT9V032_AGC_UPDATE_FREQUENCY,
73381ea4829SMarkus Pargmann ctrl->val);
73481ea4829SMarkus Pargmann
73581ea4829SMarkus Pargmann case V4L2_CID_AEC_MAX_SHUTTER_WIDTH:
73681ea4829SMarkus Pargmann return regmap_write(map,
73781ea4829SMarkus Pargmann mt9v032->model->data->aec_max_shutter_reg,
73881ea4829SMarkus Pargmann ctrl->val);
739cb7a01acSMauro Carvalho Chehab }
740cb7a01acSMauro Carvalho Chehab
741cb7a01acSMauro Carvalho Chehab return 0;
742cb7a01acSMauro Carvalho Chehab }
743cb7a01acSMauro Carvalho Chehab
744217bdb07SJulia Lawall static const struct v4l2_ctrl_ops mt9v032_ctrl_ops = {
745cb7a01acSMauro Carvalho Chehab .s_ctrl = mt9v032_s_ctrl,
746cb7a01acSMauro Carvalho Chehab };
747cb7a01acSMauro Carvalho Chehab
748b28d7017SLad, Prabhakar static const char * const mt9v032_test_pattern_menu[] = {
749b28d7017SLad, Prabhakar "Disabled",
750b28d7017SLad, Prabhakar "Gray Vertical Shade",
751b28d7017SLad, Prabhakar "Gray Horizontal Shade",
752b28d7017SLad, Prabhakar "Gray Diagonal Shade",
753b28d7017SLad, Prabhakar "Plain",
754b28d7017SLad, Prabhakar };
755b28d7017SLad, Prabhakar
756b28d7017SLad, Prabhakar static const struct v4l2_ctrl_config mt9v032_test_pattern_color = {
757cb7a01acSMauro Carvalho Chehab .ops = &mt9v032_ctrl_ops,
758b28d7017SLad, Prabhakar .id = V4L2_CID_TEST_PATTERN_COLOR,
759cb7a01acSMauro Carvalho Chehab .type = V4L2_CTRL_TYPE_INTEGER,
760b28d7017SLad, Prabhakar .name = "Test Pattern Color",
761cb7a01acSMauro Carvalho Chehab .min = 0,
762cb7a01acSMauro Carvalho Chehab .max = 1023,
763cb7a01acSMauro Carvalho Chehab .step = 1,
764cb7a01acSMauro Carvalho Chehab .def = 0,
765cb7a01acSMauro Carvalho Chehab .flags = 0,
766cb7a01acSMauro Carvalho Chehab };
767cb7a01acSMauro Carvalho Chehab
76881ea4829SMarkus Pargmann static const struct v4l2_ctrl_config mt9v032_aegc_controls[] = {
76981ea4829SMarkus Pargmann {
77081ea4829SMarkus Pargmann .ops = &mt9v032_ctrl_ops,
77181ea4829SMarkus Pargmann .id = V4L2_CID_AEGC_DESIRED_BIN,
77281ea4829SMarkus Pargmann .type = V4L2_CTRL_TYPE_INTEGER,
77381ea4829SMarkus Pargmann .name = "AEC/AGC Desired Bin",
77481ea4829SMarkus Pargmann .min = 1,
77581ea4829SMarkus Pargmann .max = 64,
77681ea4829SMarkus Pargmann .step = 1,
77781ea4829SMarkus Pargmann .def = 58,
77881ea4829SMarkus Pargmann .flags = 0,
77981ea4829SMarkus Pargmann }, {
78081ea4829SMarkus Pargmann .ops = &mt9v032_ctrl_ops,
78181ea4829SMarkus Pargmann .id = V4L2_CID_AEC_LPF,
78281ea4829SMarkus Pargmann .type = V4L2_CTRL_TYPE_INTEGER,
78381ea4829SMarkus Pargmann .name = "AEC Low Pass Filter",
78481ea4829SMarkus Pargmann .min = 0,
78581ea4829SMarkus Pargmann .max = 2,
78681ea4829SMarkus Pargmann .step = 1,
78781ea4829SMarkus Pargmann .def = 0,
78881ea4829SMarkus Pargmann .flags = 0,
78981ea4829SMarkus Pargmann }, {
79081ea4829SMarkus Pargmann .ops = &mt9v032_ctrl_ops,
79181ea4829SMarkus Pargmann .id = V4L2_CID_AGC_LPF,
79281ea4829SMarkus Pargmann .type = V4L2_CTRL_TYPE_INTEGER,
79381ea4829SMarkus Pargmann .name = "AGC Low Pass Filter",
79481ea4829SMarkus Pargmann .min = 0,
79581ea4829SMarkus Pargmann .max = 2,
79681ea4829SMarkus Pargmann .step = 1,
79781ea4829SMarkus Pargmann .def = 2,
79881ea4829SMarkus Pargmann .flags = 0,
79981ea4829SMarkus Pargmann }, {
80081ea4829SMarkus Pargmann .ops = &mt9v032_ctrl_ops,
80181ea4829SMarkus Pargmann .id = V4L2_CID_AEC_UPDATE_INTERVAL,
80281ea4829SMarkus Pargmann .type = V4L2_CTRL_TYPE_INTEGER,
80381ea4829SMarkus Pargmann .name = "AEC Update Interval",
80481ea4829SMarkus Pargmann .min = 0,
80581ea4829SMarkus Pargmann .max = 16,
80681ea4829SMarkus Pargmann .step = 1,
80781ea4829SMarkus Pargmann .def = 2,
80881ea4829SMarkus Pargmann .flags = 0,
80981ea4829SMarkus Pargmann }, {
81081ea4829SMarkus Pargmann .ops = &mt9v032_ctrl_ops,
81181ea4829SMarkus Pargmann .id = V4L2_CID_AGC_UPDATE_INTERVAL,
81281ea4829SMarkus Pargmann .type = V4L2_CTRL_TYPE_INTEGER,
81381ea4829SMarkus Pargmann .name = "AGC Update Interval",
81481ea4829SMarkus Pargmann .min = 0,
81581ea4829SMarkus Pargmann .max = 16,
81681ea4829SMarkus Pargmann .step = 1,
81781ea4829SMarkus Pargmann .def = 2,
81881ea4829SMarkus Pargmann .flags = 0,
81981ea4829SMarkus Pargmann }
82081ea4829SMarkus Pargmann };
82181ea4829SMarkus Pargmann
82281ea4829SMarkus Pargmann static const struct v4l2_ctrl_config mt9v032_aec_max_shutter_width = {
82381ea4829SMarkus Pargmann .ops = &mt9v032_ctrl_ops,
82481ea4829SMarkus Pargmann .id = V4L2_CID_AEC_MAX_SHUTTER_WIDTH,
82581ea4829SMarkus Pargmann .type = V4L2_CTRL_TYPE_INTEGER,
82681ea4829SMarkus Pargmann .name = "AEC Max Shutter Width",
82781ea4829SMarkus Pargmann .min = 1,
82881ea4829SMarkus Pargmann .max = 2047,
82981ea4829SMarkus Pargmann .step = 1,
83081ea4829SMarkus Pargmann .def = 480,
83181ea4829SMarkus Pargmann .flags = 0,
83281ea4829SMarkus Pargmann };
83381ea4829SMarkus Pargmann
83481ea4829SMarkus Pargmann static const struct v4l2_ctrl_config mt9v034_aec_max_shutter_width = {
83581ea4829SMarkus Pargmann .ops = &mt9v032_ctrl_ops,
83681ea4829SMarkus Pargmann .id = V4L2_CID_AEC_MAX_SHUTTER_WIDTH,
83781ea4829SMarkus Pargmann .type = V4L2_CTRL_TYPE_INTEGER,
83881ea4829SMarkus Pargmann .name = "AEC Max Shutter Width",
83981ea4829SMarkus Pargmann .min = 1,
84081ea4829SMarkus Pargmann .max = 32765,
84181ea4829SMarkus Pargmann .step = 1,
84281ea4829SMarkus Pargmann .def = 480,
84381ea4829SMarkus Pargmann .flags = 0,
84481ea4829SMarkus Pargmann };
84581ea4829SMarkus Pargmann
846cb7a01acSMauro Carvalho Chehab /* -----------------------------------------------------------------------------
847cb7a01acSMauro Carvalho Chehab * V4L2 subdev core operations
848cb7a01acSMauro Carvalho Chehab */
849cb7a01acSMauro Carvalho Chehab
mt9v032_set_power(struct v4l2_subdev * subdev,int on)850cb7a01acSMauro Carvalho Chehab static int mt9v032_set_power(struct v4l2_subdev *subdev, int on)
851cb7a01acSMauro Carvalho Chehab {
852cb7a01acSMauro Carvalho Chehab struct mt9v032 *mt9v032 = to_mt9v032(subdev);
853cb7a01acSMauro Carvalho Chehab int ret = 0;
854cb7a01acSMauro Carvalho Chehab
855cb7a01acSMauro Carvalho Chehab mutex_lock(&mt9v032->power_lock);
856cb7a01acSMauro Carvalho Chehab
857cb7a01acSMauro Carvalho Chehab /* If the power count is modified from 0 to != 0 or from != 0 to 0,
858cb7a01acSMauro Carvalho Chehab * update the power state.
859cb7a01acSMauro Carvalho Chehab */
860cb7a01acSMauro Carvalho Chehab if (mt9v032->power_count == !on) {
861cb7a01acSMauro Carvalho Chehab ret = __mt9v032_set_power(mt9v032, !!on);
862cb7a01acSMauro Carvalho Chehab if (ret < 0)
863cb7a01acSMauro Carvalho Chehab goto done;
864cb7a01acSMauro Carvalho Chehab }
865cb7a01acSMauro Carvalho Chehab
866cb7a01acSMauro Carvalho Chehab /* Update the power count. */
867cb7a01acSMauro Carvalho Chehab mt9v032->power_count += on ? 1 : -1;
868cb7a01acSMauro Carvalho Chehab WARN_ON(mt9v032->power_count < 0);
869cb7a01acSMauro Carvalho Chehab
870cb7a01acSMauro Carvalho Chehab done:
871cb7a01acSMauro Carvalho Chehab mutex_unlock(&mt9v032->power_lock);
872cb7a01acSMauro Carvalho Chehab return ret;
873cb7a01acSMauro Carvalho Chehab }
874cb7a01acSMauro Carvalho Chehab
875cb7a01acSMauro Carvalho Chehab /* -----------------------------------------------------------------------------
876cb7a01acSMauro Carvalho Chehab * V4L2 subdev internal operations
877cb7a01acSMauro Carvalho Chehab */
878cb7a01acSMauro Carvalho Chehab
mt9v032_registered(struct v4l2_subdev * subdev)879cb7a01acSMauro Carvalho Chehab static int mt9v032_registered(struct v4l2_subdev *subdev)
880cb7a01acSMauro Carvalho Chehab {
881cb7a01acSMauro Carvalho Chehab struct i2c_client *client = v4l2_get_subdevdata(subdev);
882cb7a01acSMauro Carvalho Chehab struct mt9v032 *mt9v032 = to_mt9v032(subdev);
8830a466b60SLaurent Pinchart unsigned int i;
88480b44ef2SPhilipp Zabel u32 version;
885cb7a01acSMauro Carvalho Chehab int ret;
886cb7a01acSMauro Carvalho Chehab
887cb7a01acSMauro Carvalho Chehab dev_info(&client->dev, "Probing MT9V032 at address 0x%02x\n",
888cb7a01acSMauro Carvalho Chehab client->addr);
889cb7a01acSMauro Carvalho Chehab
890cb7a01acSMauro Carvalho Chehab ret = mt9v032_power_on(mt9v032);
891cb7a01acSMauro Carvalho Chehab if (ret < 0) {
892cb7a01acSMauro Carvalho Chehab dev_err(&client->dev, "MT9V032 power up failed\n");
893cb7a01acSMauro Carvalho Chehab return ret;
894cb7a01acSMauro Carvalho Chehab }
895cb7a01acSMauro Carvalho Chehab
896cb7a01acSMauro Carvalho Chehab /* Read and check the sensor version */
89780b44ef2SPhilipp Zabel ret = regmap_read(mt9v032->regmap, MT9V032_CHIP_VERSION, &version);
8987df66d77SAlexey Khoroshilov
8997df66d77SAlexey Khoroshilov mt9v032_power_off(mt9v032);
9007df66d77SAlexey Khoroshilov
90180b44ef2SPhilipp Zabel if (ret < 0) {
9020a466b60SLaurent Pinchart dev_err(&client->dev, "Failed reading chip version\n");
90380b44ef2SPhilipp Zabel return ret;
9040a466b60SLaurent Pinchart }
9050a466b60SLaurent Pinchart
9060a466b60SLaurent Pinchart for (i = 0; i < ARRAY_SIZE(mt9v032_versions); ++i) {
9070a466b60SLaurent Pinchart if (mt9v032_versions[i].version == version) {
9080a466b60SLaurent Pinchart mt9v032->version = &mt9v032_versions[i];
9090a466b60SLaurent Pinchart break;
9100a466b60SLaurent Pinchart }
9110a466b60SLaurent Pinchart }
9120a466b60SLaurent Pinchart
9130a466b60SLaurent Pinchart if (mt9v032->version == NULL) {
9140a466b60SLaurent Pinchart dev_err(&client->dev, "Unsupported chip version 0x%04x\n",
9150a466b60SLaurent Pinchart version);
916cb7a01acSMauro Carvalho Chehab return -ENODEV;
917cb7a01acSMauro Carvalho Chehab }
918cb7a01acSMauro Carvalho Chehab
9190a466b60SLaurent Pinchart dev_info(&client->dev, "%s detected at address 0x%02x\n",
9200a466b60SLaurent Pinchart mt9v032->version->name, client->addr);
921cb7a01acSMauro Carvalho Chehab
922637f005eSLaurent Pinchart mt9v032_configure_pixel_rate(mt9v032);
92341a33a00SSakari Ailus
924cb7a01acSMauro Carvalho Chehab return ret;
925cb7a01acSMauro Carvalho Chehab }
926cb7a01acSMauro Carvalho Chehab
mt9v032_open(struct v4l2_subdev * subdev,struct v4l2_subdev_fh * fh)927cb7a01acSMauro Carvalho Chehab static int mt9v032_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
928cb7a01acSMauro Carvalho Chehab {
929220ddc7fSLaurent Pinchart struct mt9v032 *mt9v032 = to_mt9v032(subdev);
930cb7a01acSMauro Carvalho Chehab struct v4l2_mbus_framefmt *format;
931cb7a01acSMauro Carvalho Chehab struct v4l2_rect *crop;
932cb7a01acSMauro Carvalho Chehab
9330d346d2aSTomi Valkeinen crop = v4l2_subdev_get_try_crop(subdev, fh->state, 0);
934cb7a01acSMauro Carvalho Chehab crop->left = MT9V032_COLUMN_START_DEF;
935cb7a01acSMauro Carvalho Chehab crop->top = MT9V032_ROW_START_DEF;
936cb7a01acSMauro Carvalho Chehab crop->width = MT9V032_WINDOW_WIDTH_DEF;
937cb7a01acSMauro Carvalho Chehab crop->height = MT9V032_WINDOW_HEIGHT_DEF;
938cb7a01acSMauro Carvalho Chehab
9390d346d2aSTomi Valkeinen format = v4l2_subdev_get_try_format(subdev, fh->state, 0);
940220ddc7fSLaurent Pinchart
941220ddc7fSLaurent Pinchart if (mt9v032->model->color)
942f5fe58fdSBoris BREZILLON format->code = MEDIA_BUS_FMT_SGRBG10_1X10;
943220ddc7fSLaurent Pinchart else
944f5fe58fdSBoris BREZILLON format->code = MEDIA_BUS_FMT_Y10_1X10;
945220ddc7fSLaurent Pinchart
946cb7a01acSMauro Carvalho Chehab format->width = MT9V032_WINDOW_WIDTH_DEF;
947cb7a01acSMauro Carvalho Chehab format->height = MT9V032_WINDOW_HEIGHT_DEF;
948cb7a01acSMauro Carvalho Chehab format->field = V4L2_FIELD_NONE;
949cb7a01acSMauro Carvalho Chehab format->colorspace = V4L2_COLORSPACE_SRGB;
950cb7a01acSMauro Carvalho Chehab
951cb7a01acSMauro Carvalho Chehab return mt9v032_set_power(subdev, 1);
952cb7a01acSMauro Carvalho Chehab }
953cb7a01acSMauro Carvalho Chehab
mt9v032_close(struct v4l2_subdev * subdev,struct v4l2_subdev_fh * fh)954cb7a01acSMauro Carvalho Chehab static int mt9v032_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
955cb7a01acSMauro Carvalho Chehab {
956cb7a01acSMauro Carvalho Chehab return mt9v032_set_power(subdev, 0);
957cb7a01acSMauro Carvalho Chehab }
958cb7a01acSMauro Carvalho Chehab
9597c137c60SBhumika Goyal static const struct v4l2_subdev_core_ops mt9v032_subdev_core_ops = {
960cb7a01acSMauro Carvalho Chehab .s_power = mt9v032_set_power,
961cb7a01acSMauro Carvalho Chehab };
962cb7a01acSMauro Carvalho Chehab
9637c137c60SBhumika Goyal static const struct v4l2_subdev_video_ops mt9v032_subdev_video_ops = {
964cb7a01acSMauro Carvalho Chehab .s_stream = mt9v032_s_stream,
965cb7a01acSMauro Carvalho Chehab };
966cb7a01acSMauro Carvalho Chehab
9677c137c60SBhumika Goyal static const struct v4l2_subdev_pad_ops mt9v032_subdev_pad_ops = {
968cb7a01acSMauro Carvalho Chehab .enum_mbus_code = mt9v032_enum_mbus_code,
969cb7a01acSMauro Carvalho Chehab .enum_frame_size = mt9v032_enum_frame_size,
970cb7a01acSMauro Carvalho Chehab .get_fmt = mt9v032_get_format,
971cb7a01acSMauro Carvalho Chehab .set_fmt = mt9v032_set_format,
9721a023febSHans Verkuil .get_selection = mt9v032_get_selection,
9731a023febSHans Verkuil .set_selection = mt9v032_set_selection,
974cb7a01acSMauro Carvalho Chehab };
975cb7a01acSMauro Carvalho Chehab
9767c137c60SBhumika Goyal static const struct v4l2_subdev_ops mt9v032_subdev_ops = {
977cb7a01acSMauro Carvalho Chehab .core = &mt9v032_subdev_core_ops,
978cb7a01acSMauro Carvalho Chehab .video = &mt9v032_subdev_video_ops,
979cb7a01acSMauro Carvalho Chehab .pad = &mt9v032_subdev_pad_ops,
980cb7a01acSMauro Carvalho Chehab };
981cb7a01acSMauro Carvalho Chehab
982cb7a01acSMauro Carvalho Chehab static const struct v4l2_subdev_internal_ops mt9v032_subdev_internal_ops = {
983cb7a01acSMauro Carvalho Chehab .registered = mt9v032_registered,
984cb7a01acSMauro Carvalho Chehab .open = mt9v032_open,
985cb7a01acSMauro Carvalho Chehab .close = mt9v032_close,
986cb7a01acSMauro Carvalho Chehab };
987cb7a01acSMauro Carvalho Chehab
98880b44ef2SPhilipp Zabel static const struct regmap_config mt9v032_regmap_config = {
98980b44ef2SPhilipp Zabel .reg_bits = 8,
99080b44ef2SPhilipp Zabel .val_bits = 16,
99180b44ef2SPhilipp Zabel .max_register = 0xff,
99280b44ef2SPhilipp Zabel .cache_type = REGCACHE_RBTREE,
99380b44ef2SPhilipp Zabel };
99480b44ef2SPhilipp Zabel
995cb7a01acSMauro Carvalho Chehab /* -----------------------------------------------------------------------------
996cb7a01acSMauro Carvalho Chehab * Driver initialization and probing
997cb7a01acSMauro Carvalho Chehab */
998cb7a01acSMauro Carvalho Chehab
999f2272e13SLaurent Pinchart static struct mt9v032_platform_data *
mt9v032_get_pdata(struct i2c_client * client)1000f2272e13SLaurent Pinchart mt9v032_get_pdata(struct i2c_client *client)
1001f2272e13SLaurent Pinchart {
10028e8a6b23SHans Verkuil struct mt9v032_platform_data *pdata = NULL;
100360359a28SSakari Ailus struct v4l2_fwnode_endpoint endpoint = { .bus_type = 0 };
1004f2272e13SLaurent Pinchart struct device_node *np;
1005f2272e13SLaurent Pinchart struct property *prop;
1006f2272e13SLaurent Pinchart
1007f2272e13SLaurent Pinchart if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
1008f2272e13SLaurent Pinchart return client->dev.platform_data;
1009f2272e13SLaurent Pinchart
1010f2272e13SLaurent Pinchart np = of_graph_get_next_endpoint(client->dev.of_node, NULL);
1011f2272e13SLaurent Pinchart if (!np)
1012f2272e13SLaurent Pinchart return NULL;
1013f2272e13SLaurent Pinchart
1014859969b3SSakari Ailus if (v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &endpoint) < 0)
1015f2272e13SLaurent Pinchart goto done;
1016f2272e13SLaurent Pinchart
1017f2272e13SLaurent Pinchart pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
1018f2272e13SLaurent Pinchart if (!pdata)
1019f2272e13SLaurent Pinchart goto done;
1020f2272e13SLaurent Pinchart
1021f2272e13SLaurent Pinchart prop = of_find_property(np, "link-frequencies", NULL);
1022f2272e13SLaurent Pinchart if (prop) {
1023f2272e13SLaurent Pinchart u64 *link_freqs;
1024f2272e13SLaurent Pinchart size_t size = prop->length / sizeof(*link_freqs);
1025f2272e13SLaurent Pinchart
1026f2272e13SLaurent Pinchart link_freqs = devm_kcalloc(&client->dev, size,
1027f2272e13SLaurent Pinchart sizeof(*link_freqs), GFP_KERNEL);
1028f2272e13SLaurent Pinchart if (!link_freqs)
1029f2272e13SLaurent Pinchart goto done;
1030f2272e13SLaurent Pinchart
1031f2272e13SLaurent Pinchart if (of_property_read_u64_array(np, "link-frequencies",
1032f2272e13SLaurent Pinchart link_freqs, size) < 0)
1033f2272e13SLaurent Pinchart goto done;
1034f2272e13SLaurent Pinchart
1035f2272e13SLaurent Pinchart pdata->link_freqs = link_freqs;
1036f2272e13SLaurent Pinchart pdata->link_def_freq = link_freqs[0];
1037f2272e13SLaurent Pinchart }
1038f2272e13SLaurent Pinchart
1039f2272e13SLaurent Pinchart pdata->clk_pol = !!(endpoint.bus.parallel.flags &
1040f2272e13SLaurent Pinchart V4L2_MBUS_PCLK_SAMPLE_RISING);
1041f2272e13SLaurent Pinchart
1042f2272e13SLaurent Pinchart done:
1043f2272e13SLaurent Pinchart of_node_put(np);
1044f2272e13SLaurent Pinchart return pdata;
1045f2272e13SLaurent Pinchart }
1046f2272e13SLaurent Pinchart
mt9v032_probe(struct i2c_client * client)104778c57c16SUwe Kleine-König static int mt9v032_probe(struct i2c_client *client)
1048cb7a01acSMauro Carvalho Chehab {
104978c57c16SUwe Kleine-König const struct i2c_device_id *did = i2c_client_get_device_id(client);
1050f2272e13SLaurent Pinchart struct mt9v032_platform_data *pdata = mt9v032_get_pdata(client);
1051cb7a01acSMauro Carvalho Chehab struct mt9v032 *mt9v032;
1052cb7a01acSMauro Carvalho Chehab unsigned int i;
1053cb7a01acSMauro Carvalho Chehab int ret;
1054cb7a01acSMauro Carvalho Chehab
1055c02b211dSLaurent Pinchart mt9v032 = devm_kzalloc(&client->dev, sizeof(*mt9v032), GFP_KERNEL);
1056cb7a01acSMauro Carvalho Chehab if (!mt9v032)
1057cb7a01acSMauro Carvalho Chehab return -ENOMEM;
1058cb7a01acSMauro Carvalho Chehab
105980b44ef2SPhilipp Zabel mt9v032->regmap = devm_regmap_init_i2c(client, &mt9v032_regmap_config);
106080b44ef2SPhilipp Zabel if (IS_ERR(mt9v032->regmap))
106180b44ef2SPhilipp Zabel return PTR_ERR(mt9v032->regmap);
106280b44ef2SPhilipp Zabel
10633300a8fdSLaurent Pinchart mt9v032->clk = devm_clk_get(&client->dev, NULL);
10643300a8fdSLaurent Pinchart if (IS_ERR(mt9v032->clk))
10653300a8fdSLaurent Pinchart return PTR_ERR(mt9v032->clk);
10663300a8fdSLaurent Pinchart
106728d5bdbeSMarkus Pargmann mt9v032->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
106828d5bdbeSMarkus Pargmann GPIOD_OUT_HIGH);
106928d5bdbeSMarkus Pargmann if (IS_ERR(mt9v032->reset_gpio))
107028d5bdbeSMarkus Pargmann return PTR_ERR(mt9v032->reset_gpio);
107128d5bdbeSMarkus Pargmann
107228d5bdbeSMarkus Pargmann mt9v032->standby_gpio = devm_gpiod_get_optional(&client->dev, "standby",
107328d5bdbeSMarkus Pargmann GPIOD_OUT_LOW);
107428d5bdbeSMarkus Pargmann if (IS_ERR(mt9v032->standby_gpio))
107528d5bdbeSMarkus Pargmann return PTR_ERR(mt9v032->standby_gpio);
107628d5bdbeSMarkus Pargmann
1077cb7a01acSMauro Carvalho Chehab mutex_init(&mt9v032->power_lock);
1078e9a50e4cSLaurent Pinchart mt9v032->pdata = pdata;
1079220ddc7fSLaurent Pinchart mt9v032->model = (const void *)did->driver_data;
1080cb7a01acSMauro Carvalho Chehab
108181ea4829SMarkus Pargmann v4l2_ctrl_handler_init(&mt9v032->ctrls, 11 +
108281ea4829SMarkus Pargmann ARRAY_SIZE(mt9v032_aegc_controls));
1083cb7a01acSMauro Carvalho Chehab
1084cb7a01acSMauro Carvalho Chehab v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
1085cb7a01acSMauro Carvalho Chehab V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1086cb7a01acSMauro Carvalho Chehab v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
1087cb7a01acSMauro Carvalho Chehab V4L2_CID_GAIN, MT9V032_ANALOG_GAIN_MIN,
1088cb7a01acSMauro Carvalho Chehab MT9V032_ANALOG_GAIN_MAX, 1, MT9V032_ANALOG_GAIN_DEF);
1089cb7a01acSMauro Carvalho Chehab v4l2_ctrl_new_std_menu(&mt9v032->ctrls, &mt9v032_ctrl_ops,
1090cb7a01acSMauro Carvalho Chehab V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, 0,
1091cb7a01acSMauro Carvalho Chehab V4L2_EXPOSURE_AUTO);
1092cb7a01acSMauro Carvalho Chehab v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
10930a466b60SLaurent Pinchart V4L2_CID_EXPOSURE, mt9v032->model->data->min_shutter,
10940a466b60SLaurent Pinchart mt9v032->model->data->max_shutter, 1,
1095cb7a01acSMauro Carvalho Chehab MT9V032_TOTAL_SHUTTER_WIDTH_DEF);
10969ec670e2SLaurent Pinchart v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
10970a466b60SLaurent Pinchart V4L2_CID_HBLANK, mt9v032->model->data->min_hblank,
10989ec670e2SLaurent Pinchart MT9V032_HORIZONTAL_BLANKING_MAX, 1,
10999ec670e2SLaurent Pinchart MT9V032_HORIZONTAL_BLANKING_DEF);
11009ec670e2SLaurent Pinchart v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
11010a466b60SLaurent Pinchart V4L2_CID_VBLANK, mt9v032->model->data->min_vblank,
11020a466b60SLaurent Pinchart mt9v032->model->data->max_vblank, 1,
11039ec670e2SLaurent Pinchart MT9V032_VERTICAL_BLANKING_DEF);
1104b28d7017SLad, Prabhakar mt9v032->test_pattern = v4l2_ctrl_new_std_menu_items(&mt9v032->ctrls,
1105b28d7017SLad, Prabhakar &mt9v032_ctrl_ops, V4L2_CID_TEST_PATTERN,
1106b28d7017SLad, Prabhakar ARRAY_SIZE(mt9v032_test_pattern_menu) - 1, 0, 0,
1107b28d7017SLad, Prabhakar mt9v032_test_pattern_menu);
1108b28d7017SLad, Prabhakar mt9v032->test_pattern_color = v4l2_ctrl_new_custom(&mt9v032->ctrls,
1109b28d7017SLad, Prabhakar &mt9v032_test_pattern_color, NULL);
1110b28d7017SLad, Prabhakar
111181ea4829SMarkus Pargmann v4l2_ctrl_new_custom(&mt9v032->ctrls,
111281ea4829SMarkus Pargmann mt9v032->model->data->aec_max_shutter_v4l2_ctrl,
111381ea4829SMarkus Pargmann NULL);
111481ea4829SMarkus Pargmann for (i = 0; i < ARRAY_SIZE(mt9v032_aegc_controls); ++i)
111581ea4829SMarkus Pargmann v4l2_ctrl_new_custom(&mt9v032->ctrls, &mt9v032_aegc_controls[i],
111681ea4829SMarkus Pargmann NULL);
111781ea4829SMarkus Pargmann
1118b28d7017SLad, Prabhakar v4l2_ctrl_cluster(2, &mt9v032->test_pattern);
1119e9a50e4cSLaurent Pinchart
112041a33a00SSakari Ailus mt9v032->pixel_rate =
112141a33a00SSakari Ailus v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
11220ba2aeb6SHans Verkuil V4L2_CID_PIXEL_RATE, 1, INT_MAX, 1, 1);
1123cb7a01acSMauro Carvalho Chehab
1124e9a50e4cSLaurent Pinchart if (pdata && pdata->link_freqs) {
1125e9a50e4cSLaurent Pinchart unsigned int def = 0;
1126e9a50e4cSLaurent Pinchart
1127e9a50e4cSLaurent Pinchart for (i = 0; pdata->link_freqs[i]; ++i) {
1128e9a50e4cSLaurent Pinchart if (pdata->link_freqs[i] == pdata->link_def_freq)
1129e9a50e4cSLaurent Pinchart def = i;
1130e9a50e4cSLaurent Pinchart }
1131e9a50e4cSLaurent Pinchart
1132e9a50e4cSLaurent Pinchart mt9v032->link_freq =
1133e9a50e4cSLaurent Pinchart v4l2_ctrl_new_int_menu(&mt9v032->ctrls,
1134e9a50e4cSLaurent Pinchart &mt9v032_ctrl_ops,
1135e9a50e4cSLaurent Pinchart V4L2_CID_LINK_FREQ, i - 1, def,
1136e9a50e4cSLaurent Pinchart pdata->link_freqs);
1137e9a50e4cSLaurent Pinchart v4l2_ctrl_cluster(2, &mt9v032->link_freq);
1138e9a50e4cSLaurent Pinchart }
1139e9a50e4cSLaurent Pinchart
1140cb7a01acSMauro Carvalho Chehab
1141cb7a01acSMauro Carvalho Chehab mt9v032->subdev.ctrl_handler = &mt9v032->ctrls;
1142cb7a01acSMauro Carvalho Chehab
11432d01209fSLaurent Pinchart if (mt9v032->ctrls.error) {
11442d01209fSLaurent Pinchart dev_err(&client->dev, "control initialization error %d\n",
11452d01209fSLaurent Pinchart mt9v032->ctrls.error);
11462d01209fSLaurent Pinchart ret = mt9v032->ctrls.error;
11472d01209fSLaurent Pinchart goto err;
11482d01209fSLaurent Pinchart }
1149cb7a01acSMauro Carvalho Chehab
1150cb7a01acSMauro Carvalho Chehab mt9v032->crop.left = MT9V032_COLUMN_START_DEF;
1151cb7a01acSMauro Carvalho Chehab mt9v032->crop.top = MT9V032_ROW_START_DEF;
1152cb7a01acSMauro Carvalho Chehab mt9v032->crop.width = MT9V032_WINDOW_WIDTH_DEF;
1153cb7a01acSMauro Carvalho Chehab mt9v032->crop.height = MT9V032_WINDOW_HEIGHT_DEF;
1154cb7a01acSMauro Carvalho Chehab
1155220ddc7fSLaurent Pinchart if (mt9v032->model->color)
1156f5fe58fdSBoris BREZILLON mt9v032->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
1157220ddc7fSLaurent Pinchart else
1158f5fe58fdSBoris BREZILLON mt9v032->format.code = MEDIA_BUS_FMT_Y10_1X10;
1159220ddc7fSLaurent Pinchart
1160cb7a01acSMauro Carvalho Chehab mt9v032->format.width = MT9V032_WINDOW_WIDTH_DEF;
1161cb7a01acSMauro Carvalho Chehab mt9v032->format.height = MT9V032_WINDOW_HEIGHT_DEF;
1162cb7a01acSMauro Carvalho Chehab mt9v032->format.field = V4L2_FIELD_NONE;
1163cb7a01acSMauro Carvalho Chehab mt9v032->format.colorspace = V4L2_COLORSPACE_SRGB;
1164cb7a01acSMauro Carvalho Chehab
1165637f005eSLaurent Pinchart mt9v032->hratio = 1;
1166637f005eSLaurent Pinchart mt9v032->vratio = 1;
1167637f005eSLaurent Pinchart
1168cb7a01acSMauro Carvalho Chehab mt9v032->aec_agc = MT9V032_AEC_ENABLE | MT9V032_AGC_ENABLE;
11699ec670e2SLaurent Pinchart mt9v032->hblank = MT9V032_HORIZONTAL_BLANKING_DEF;
1170e9a50e4cSLaurent Pinchart mt9v032->sysclk = MT9V032_SYSCLK_FREQ_DEF;
1171cb7a01acSMauro Carvalho Chehab
1172cb7a01acSMauro Carvalho Chehab v4l2_i2c_subdev_init(&mt9v032->subdev, client, &mt9v032_subdev_ops);
1173cb7a01acSMauro Carvalho Chehab mt9v032->subdev.internal_ops = &mt9v032_subdev_internal_ops;
1174cb7a01acSMauro Carvalho Chehab mt9v032->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1175cb7a01acSMauro Carvalho Chehab
1176173bf6e5SHans Verkuil mt9v032->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1177cb7a01acSMauro Carvalho Chehab mt9v032->pad.flags = MEDIA_PAD_FL_SOURCE;
1178ab22e77cSMauro Carvalho Chehab ret = media_entity_pads_init(&mt9v032->subdev.entity, 1, &mt9v032->pad);
1179c02b211dSLaurent Pinchart if (ret < 0)
118094b76ce8SPhilipp Zabel goto err;
1181cb7a01acSMauro Carvalho Chehab
118294b76ce8SPhilipp Zabel mt9v032->subdev.dev = &client->dev;
118394b76ce8SPhilipp Zabel ret = v4l2_async_register_subdev(&mt9v032->subdev);
118494b76ce8SPhilipp Zabel if (ret < 0)
118594b76ce8SPhilipp Zabel goto err;
118694b76ce8SPhilipp Zabel
118794b76ce8SPhilipp Zabel return 0;
118894b76ce8SPhilipp Zabel
118994b76ce8SPhilipp Zabel err:
119094b76ce8SPhilipp Zabel media_entity_cleanup(&mt9v032->subdev.entity);
119194b76ce8SPhilipp Zabel v4l2_ctrl_handler_free(&mt9v032->ctrls);
1192cb7a01acSMauro Carvalho Chehab return ret;
1193cb7a01acSMauro Carvalho Chehab }
1194cb7a01acSMauro Carvalho Chehab
mt9v032_remove(struct i2c_client * client)1195ed5c2f5fSUwe Kleine-König static void mt9v032_remove(struct i2c_client *client)
1196cb7a01acSMauro Carvalho Chehab {
1197cb7a01acSMauro Carvalho Chehab struct v4l2_subdev *subdev = i2c_get_clientdata(client);
1198cb7a01acSMauro Carvalho Chehab struct mt9v032 *mt9v032 = to_mt9v032(subdev);
1199cb7a01acSMauro Carvalho Chehab
120094b76ce8SPhilipp Zabel v4l2_async_unregister_subdev(subdev);
12019462550fSLaurent Pinchart v4l2_ctrl_handler_free(&mt9v032->ctrls);
1202cb7a01acSMauro Carvalho Chehab media_entity_cleanup(&subdev->entity);
1203cb7a01acSMauro Carvalho Chehab }
1204cb7a01acSMauro Carvalho Chehab
120581ea4829SMarkus Pargmann static const struct mt9v032_model_data mt9v032_model_data[] = {
120681ea4829SMarkus Pargmann {
120781ea4829SMarkus Pargmann /* MT9V022, MT9V032 revisions 1/2/3 */
120881ea4829SMarkus Pargmann .min_row_time = 660,
120981ea4829SMarkus Pargmann .min_hblank = MT9V032_HORIZONTAL_BLANKING_MIN,
121081ea4829SMarkus Pargmann .min_vblank = MT9V032_VERTICAL_BLANKING_MIN,
121181ea4829SMarkus Pargmann .max_vblank = MT9V032_VERTICAL_BLANKING_MAX,
121281ea4829SMarkus Pargmann .min_shutter = MT9V032_TOTAL_SHUTTER_WIDTH_MIN,
121381ea4829SMarkus Pargmann .max_shutter = MT9V032_TOTAL_SHUTTER_WIDTH_MAX,
121481ea4829SMarkus Pargmann .pclk_reg = MT9V032_PIXEL_CLOCK,
121581ea4829SMarkus Pargmann .aec_max_shutter_reg = MT9V032_AEC_MAX_SHUTTER_WIDTH,
121681ea4829SMarkus Pargmann .aec_max_shutter_v4l2_ctrl = &mt9v032_aec_max_shutter_width,
121781ea4829SMarkus Pargmann }, {
121881ea4829SMarkus Pargmann /* MT9V024, MT9V034 */
121981ea4829SMarkus Pargmann .min_row_time = 690,
122081ea4829SMarkus Pargmann .min_hblank = MT9V034_HORIZONTAL_BLANKING_MIN,
122181ea4829SMarkus Pargmann .min_vblank = MT9V034_VERTICAL_BLANKING_MIN,
122281ea4829SMarkus Pargmann .max_vblank = MT9V034_VERTICAL_BLANKING_MAX,
122381ea4829SMarkus Pargmann .min_shutter = MT9V034_TOTAL_SHUTTER_WIDTH_MIN,
122481ea4829SMarkus Pargmann .max_shutter = MT9V034_TOTAL_SHUTTER_WIDTH_MAX,
122581ea4829SMarkus Pargmann .pclk_reg = MT9V034_PIXEL_CLOCK,
122681ea4829SMarkus Pargmann .aec_max_shutter_reg = MT9V034_AEC_MAX_SHUTTER_WIDTH,
122781ea4829SMarkus Pargmann .aec_max_shutter_v4l2_ctrl = &mt9v034_aec_max_shutter_width,
122881ea4829SMarkus Pargmann },
122981ea4829SMarkus Pargmann };
123081ea4829SMarkus Pargmann
123181ea4829SMarkus Pargmann static const struct mt9v032_model_info mt9v032_models[] = {
123281ea4829SMarkus Pargmann [MT9V032_MODEL_V022_COLOR] = {
123381ea4829SMarkus Pargmann .data = &mt9v032_model_data[0],
123481ea4829SMarkus Pargmann .color = true,
123581ea4829SMarkus Pargmann },
123681ea4829SMarkus Pargmann [MT9V032_MODEL_V022_MONO] = {
123781ea4829SMarkus Pargmann .data = &mt9v032_model_data[0],
123881ea4829SMarkus Pargmann .color = false,
123981ea4829SMarkus Pargmann },
124081ea4829SMarkus Pargmann [MT9V032_MODEL_V024_COLOR] = {
124181ea4829SMarkus Pargmann .data = &mt9v032_model_data[1],
124281ea4829SMarkus Pargmann .color = true,
124381ea4829SMarkus Pargmann },
124481ea4829SMarkus Pargmann [MT9V032_MODEL_V024_MONO] = {
124581ea4829SMarkus Pargmann .data = &mt9v032_model_data[1],
124681ea4829SMarkus Pargmann .color = false,
124781ea4829SMarkus Pargmann },
124881ea4829SMarkus Pargmann [MT9V032_MODEL_V032_COLOR] = {
124981ea4829SMarkus Pargmann .data = &mt9v032_model_data[0],
125081ea4829SMarkus Pargmann .color = true,
125181ea4829SMarkus Pargmann },
125281ea4829SMarkus Pargmann [MT9V032_MODEL_V032_MONO] = {
125381ea4829SMarkus Pargmann .data = &mt9v032_model_data[0],
125481ea4829SMarkus Pargmann .color = false,
125581ea4829SMarkus Pargmann },
125681ea4829SMarkus Pargmann [MT9V032_MODEL_V034_COLOR] = {
125781ea4829SMarkus Pargmann .data = &mt9v032_model_data[1],
125881ea4829SMarkus Pargmann .color = true,
125981ea4829SMarkus Pargmann },
126081ea4829SMarkus Pargmann [MT9V032_MODEL_V034_MONO] = {
126181ea4829SMarkus Pargmann .data = &mt9v032_model_data[1],
126281ea4829SMarkus Pargmann .color = false,
126381ea4829SMarkus Pargmann },
126481ea4829SMarkus Pargmann };
126581ea4829SMarkus Pargmann
1266cb7a01acSMauro Carvalho Chehab static const struct i2c_device_id mt9v032_id[] = {
1267d8dde6c8SPhilipp Zabel { "mt9v022", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V022_COLOR] },
1268d8dde6c8SPhilipp Zabel { "mt9v022m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V022_MONO] },
1269d8dde6c8SPhilipp Zabel { "mt9v024", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V024_COLOR] },
1270d8dde6c8SPhilipp Zabel { "mt9v024m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V024_MONO] },
1271daecfebcSLaurent Pinchart { "mt9v032", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V032_COLOR] },
1272daecfebcSLaurent Pinchart { "mt9v032m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V032_MONO] },
1273daecfebcSLaurent Pinchart { "mt9v034", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V034_COLOR] },
1274daecfebcSLaurent Pinchart { "mt9v034m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V034_MONO] },
1275cb7a01acSMauro Carvalho Chehab { }
1276cb7a01acSMauro Carvalho Chehab };
1277cb7a01acSMauro Carvalho Chehab MODULE_DEVICE_TABLE(i2c, mt9v032_id);
1278cb7a01acSMauro Carvalho Chehab
1279f2272e13SLaurent Pinchart #if IS_ENABLED(CONFIG_OF)
1280f2272e13SLaurent Pinchart static const struct of_device_id mt9v032_of_match[] = {
1281f2272e13SLaurent Pinchart { .compatible = "aptina,mt9v022" },
1282f2272e13SLaurent Pinchart { .compatible = "aptina,mt9v022m" },
1283f2272e13SLaurent Pinchart { .compatible = "aptina,mt9v024" },
1284f2272e13SLaurent Pinchart { .compatible = "aptina,mt9v024m" },
1285f2272e13SLaurent Pinchart { .compatible = "aptina,mt9v032" },
1286f2272e13SLaurent Pinchart { .compatible = "aptina,mt9v032m" },
1287f2272e13SLaurent Pinchart { .compatible = "aptina,mt9v034" },
1288f2272e13SLaurent Pinchart { .compatible = "aptina,mt9v034m" },
1289f2272e13SLaurent Pinchart { /* Sentinel */ }
1290f2272e13SLaurent Pinchart };
1291f2272e13SLaurent Pinchart MODULE_DEVICE_TABLE(of, mt9v032_of_match);
1292f2272e13SLaurent Pinchart #endif
1293f2272e13SLaurent Pinchart
1294cb7a01acSMauro Carvalho Chehab static struct i2c_driver mt9v032_driver = {
1295cb7a01acSMauro Carvalho Chehab .driver = {
1296cb7a01acSMauro Carvalho Chehab .name = "mt9v032",
1297f2272e13SLaurent Pinchart .of_match_table = of_match_ptr(mt9v032_of_match),
1298cb7a01acSMauro Carvalho Chehab },
1299*aaeb31c0SUwe Kleine-König .probe = mt9v032_probe,
1300cb7a01acSMauro Carvalho Chehab .remove = mt9v032_remove,
1301cb7a01acSMauro Carvalho Chehab .id_table = mt9v032_id,
1302cb7a01acSMauro Carvalho Chehab };
1303cb7a01acSMauro Carvalho Chehab
1304cb7a01acSMauro Carvalho Chehab module_i2c_driver(mt9v032_driver);
1305cb7a01acSMauro Carvalho Chehab
1306cb7a01acSMauro Carvalho Chehab MODULE_DESCRIPTION("Aptina MT9V032 Camera driver");
1307cb7a01acSMauro Carvalho Chehab MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
1308cb7a01acSMauro Carvalho Chehab MODULE_LICENSE("GPL");
1309