1459ee17cSMauro Carvalho Chehab // SPDX-License-Identifier: GPL-2.0
2459ee17cSMauro Carvalho Chehab //
3459ee17cSMauro Carvalho Chehab // mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
4459ee17cSMauro Carvalho Chehab //
5459ee17cSMauro Carvalho Chehab // Copyright (c) 2009 Mauro Carvalho Chehab <mchehab@kernel.org>
6cb7a01acSMauro Carvalho Chehab
7cb7a01acSMauro Carvalho Chehab #include <linux/i2c.h>
8cb7a01acSMauro Carvalho Chehab #include <linux/slab.h>
9cb7a01acSMauro Carvalho Chehab #include <linux/videodev2.h>
10cb7a01acSMauro Carvalho Chehab #include <linux/delay.h>
11cb7a01acSMauro Carvalho Chehab #include <linux/module.h>
12cb7a01acSMauro Carvalho Chehab #include <asm/div64.h>
13cb7a01acSMauro Carvalho Chehab #include <media/v4l2-device.h>
14ea01a83dSHans Verkuil #include <media/v4l2-ctrls.h>
15b5dcee22SMauro Carvalho Chehab #include <media/i2c/mt9v011.h>
16cb7a01acSMauro Carvalho Chehab
17cb7a01acSMauro Carvalho Chehab MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
1837e59f87SMauro Carvalho Chehab MODULE_AUTHOR("Mauro Carvalho Chehab");
19459ee17cSMauro Carvalho Chehab MODULE_LICENSE("GPL v2");
20cb7a01acSMauro Carvalho Chehab
21cb7a01acSMauro Carvalho Chehab static int debug;
22cb7a01acSMauro Carvalho Chehab module_param(debug, int, 0);
23cb7a01acSMauro Carvalho Chehab MODULE_PARM_DESC(debug, "Debug level (0-2)");
24cb7a01acSMauro Carvalho Chehab
25cb7a01acSMauro Carvalho Chehab #define R00_MT9V011_CHIP_VERSION 0x00
26cb7a01acSMauro Carvalho Chehab #define R01_MT9V011_ROWSTART 0x01
27cb7a01acSMauro Carvalho Chehab #define R02_MT9V011_COLSTART 0x02
28cb7a01acSMauro Carvalho Chehab #define R03_MT9V011_HEIGHT 0x03
29cb7a01acSMauro Carvalho Chehab #define R04_MT9V011_WIDTH 0x04
30cb7a01acSMauro Carvalho Chehab #define R05_MT9V011_HBLANK 0x05
31cb7a01acSMauro Carvalho Chehab #define R06_MT9V011_VBLANK 0x06
32cb7a01acSMauro Carvalho Chehab #define R07_MT9V011_OUT_CTRL 0x07
33cb7a01acSMauro Carvalho Chehab #define R09_MT9V011_SHUTTER_WIDTH 0x09
34cb7a01acSMauro Carvalho Chehab #define R0A_MT9V011_CLK_SPEED 0x0a
35cb7a01acSMauro Carvalho Chehab #define R0B_MT9V011_RESTART 0x0b
36cb7a01acSMauro Carvalho Chehab #define R0C_MT9V011_SHUTTER_DELAY 0x0c
37cb7a01acSMauro Carvalho Chehab #define R0D_MT9V011_RESET 0x0d
38cb7a01acSMauro Carvalho Chehab #define R1E_MT9V011_DIGITAL_ZOOM 0x1e
39cb7a01acSMauro Carvalho Chehab #define R20_MT9V011_READ_MODE 0x20
40cb7a01acSMauro Carvalho Chehab #define R2B_MT9V011_GREEN_1_GAIN 0x2b
41cb7a01acSMauro Carvalho Chehab #define R2C_MT9V011_BLUE_GAIN 0x2c
42cb7a01acSMauro Carvalho Chehab #define R2D_MT9V011_RED_GAIN 0x2d
43cb7a01acSMauro Carvalho Chehab #define R2E_MT9V011_GREEN_2_GAIN 0x2e
44cb7a01acSMauro Carvalho Chehab #define R35_MT9V011_GLOBAL_GAIN 0x35
45cb7a01acSMauro Carvalho Chehab #define RF1_MT9V011_CHIP_ENABLE 0xf1
46cb7a01acSMauro Carvalho Chehab
47cb7a01acSMauro Carvalho Chehab #define MT9V011_VERSION 0x8232
48cb7a01acSMauro Carvalho Chehab #define MT9V011_REV_B_VERSION 0x8243
49cb7a01acSMauro Carvalho Chehab
50cb7a01acSMauro Carvalho Chehab struct mt9v011 {
51cb7a01acSMauro Carvalho Chehab struct v4l2_subdev sd;
52ac88fce9SMauro Carvalho Chehab #ifdef CONFIG_MEDIA_CONTROLLER
53ac88fce9SMauro Carvalho Chehab struct media_pad pad;
54ac88fce9SMauro Carvalho Chehab #endif
55ea01a83dSHans Verkuil struct v4l2_ctrl_handler ctrls;
56cb7a01acSMauro Carvalho Chehab unsigned width, height;
57cb7a01acSMauro Carvalho Chehab unsigned xtal;
58cb7a01acSMauro Carvalho Chehab unsigned hflip:1;
59cb7a01acSMauro Carvalho Chehab unsigned vflip:1;
60cb7a01acSMauro Carvalho Chehab
61cb7a01acSMauro Carvalho Chehab u16 global_gain, exposure;
62cb7a01acSMauro Carvalho Chehab s16 red_bal, blue_bal;
63cb7a01acSMauro Carvalho Chehab };
64cb7a01acSMauro Carvalho Chehab
to_mt9v011(struct v4l2_subdev * sd)65cb7a01acSMauro Carvalho Chehab static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
66cb7a01acSMauro Carvalho Chehab {
67cb7a01acSMauro Carvalho Chehab return container_of(sd, struct mt9v011, sd);
68cb7a01acSMauro Carvalho Chehab }
69cb7a01acSMauro Carvalho Chehab
mt9v011_read(struct v4l2_subdev * sd,unsigned char addr)70cb7a01acSMauro Carvalho Chehab static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
71cb7a01acSMauro Carvalho Chehab {
72cb7a01acSMauro Carvalho Chehab struct i2c_client *c = v4l2_get_subdevdata(sd);
73cb7a01acSMauro Carvalho Chehab __be16 buffer;
74cb7a01acSMauro Carvalho Chehab int rc, val;
75cb7a01acSMauro Carvalho Chehab
76cb7a01acSMauro Carvalho Chehab rc = i2c_master_send(c, &addr, 1);
77cb7a01acSMauro Carvalho Chehab if (rc != 1)
78cb7a01acSMauro Carvalho Chehab v4l2_dbg(0, debug, sd,
79cb7a01acSMauro Carvalho Chehab "i2c i/o error: rc == %d (should be 1)\n", rc);
80cb7a01acSMauro Carvalho Chehab
81cb7a01acSMauro Carvalho Chehab msleep(10);
82cb7a01acSMauro Carvalho Chehab
83cb7a01acSMauro Carvalho Chehab rc = i2c_master_recv(c, (char *)&buffer, 2);
84cb7a01acSMauro Carvalho Chehab if (rc != 2)
85cb7a01acSMauro Carvalho Chehab v4l2_dbg(0, debug, sd,
86cb7a01acSMauro Carvalho Chehab "i2c i/o error: rc == %d (should be 2)\n", rc);
87cb7a01acSMauro Carvalho Chehab
88cb7a01acSMauro Carvalho Chehab val = be16_to_cpu(buffer);
89cb7a01acSMauro Carvalho Chehab
90cb7a01acSMauro Carvalho Chehab v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
91cb7a01acSMauro Carvalho Chehab
92cb7a01acSMauro Carvalho Chehab return val;
93cb7a01acSMauro Carvalho Chehab }
94cb7a01acSMauro Carvalho Chehab
mt9v011_write(struct v4l2_subdev * sd,unsigned char addr,u16 value)95cb7a01acSMauro Carvalho Chehab static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
96cb7a01acSMauro Carvalho Chehab u16 value)
97cb7a01acSMauro Carvalho Chehab {
98cb7a01acSMauro Carvalho Chehab struct i2c_client *c = v4l2_get_subdevdata(sd);
99cb7a01acSMauro Carvalho Chehab unsigned char buffer[3];
100cb7a01acSMauro Carvalho Chehab int rc;
101cb7a01acSMauro Carvalho Chehab
102cb7a01acSMauro Carvalho Chehab buffer[0] = addr;
103cb7a01acSMauro Carvalho Chehab buffer[1] = value >> 8;
104cb7a01acSMauro Carvalho Chehab buffer[2] = value & 0xff;
105cb7a01acSMauro Carvalho Chehab
106cb7a01acSMauro Carvalho Chehab v4l2_dbg(2, debug, sd,
107cb7a01acSMauro Carvalho Chehab "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
108cb7a01acSMauro Carvalho Chehab rc = i2c_master_send(c, buffer, 3);
109cb7a01acSMauro Carvalho Chehab if (rc != 3)
110cb7a01acSMauro Carvalho Chehab v4l2_dbg(0, debug, sd,
111cb7a01acSMauro Carvalho Chehab "i2c i/o error: rc == %d (should be 3)\n", rc);
112cb7a01acSMauro Carvalho Chehab }
113cb7a01acSMauro Carvalho Chehab
114cb7a01acSMauro Carvalho Chehab
115cb7a01acSMauro Carvalho Chehab struct i2c_reg_value {
116cb7a01acSMauro Carvalho Chehab unsigned char reg;
117cb7a01acSMauro Carvalho Chehab u16 value;
118cb7a01acSMauro Carvalho Chehab };
119cb7a01acSMauro Carvalho Chehab
120cb7a01acSMauro Carvalho Chehab /*
121cb7a01acSMauro Carvalho Chehab * Values used at the original driver
122cb7a01acSMauro Carvalho Chehab * Some values are marked as Reserved at the datasheet
123cb7a01acSMauro Carvalho Chehab */
124cb7a01acSMauro Carvalho Chehab static const struct i2c_reg_value mt9v011_init_default[] = {
125cb7a01acSMauro Carvalho Chehab { R0D_MT9V011_RESET, 0x0001 },
126cb7a01acSMauro Carvalho Chehab { R0D_MT9V011_RESET, 0x0000 },
127cb7a01acSMauro Carvalho Chehab
128cb7a01acSMauro Carvalho Chehab { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
129cb7a01acSMauro Carvalho Chehab { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
130cb7a01acSMauro Carvalho Chehab
131cb7a01acSMauro Carvalho Chehab { R0A_MT9V011_CLK_SPEED, 0x0000 },
132cb7a01acSMauro Carvalho Chehab { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
133cb7a01acSMauro Carvalho Chehab
134cb7a01acSMauro Carvalho Chehab { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
135cb7a01acSMauro Carvalho Chehab };
136cb7a01acSMauro Carvalho Chehab
137cb7a01acSMauro Carvalho Chehab
calc_mt9v011_gain(s16 lineargain)138cb7a01acSMauro Carvalho Chehab static u16 calc_mt9v011_gain(s16 lineargain)
139cb7a01acSMauro Carvalho Chehab {
140cb7a01acSMauro Carvalho Chehab
141cb7a01acSMauro Carvalho Chehab u16 digitalgain = 0;
142cb7a01acSMauro Carvalho Chehab u16 analogmult = 0;
143cb7a01acSMauro Carvalho Chehab u16 analoginit = 0;
144cb7a01acSMauro Carvalho Chehab
145cb7a01acSMauro Carvalho Chehab if (lineargain < 0)
146cb7a01acSMauro Carvalho Chehab lineargain = 0;
147cb7a01acSMauro Carvalho Chehab
148cb7a01acSMauro Carvalho Chehab /* recommended minimum */
149cb7a01acSMauro Carvalho Chehab lineargain += 0x0020;
150cb7a01acSMauro Carvalho Chehab
151cb7a01acSMauro Carvalho Chehab if (lineargain > 2047)
152cb7a01acSMauro Carvalho Chehab lineargain = 2047;
153cb7a01acSMauro Carvalho Chehab
154cb7a01acSMauro Carvalho Chehab if (lineargain > 1023) {
155cb7a01acSMauro Carvalho Chehab digitalgain = 3;
156cb7a01acSMauro Carvalho Chehab analogmult = 3;
157cb7a01acSMauro Carvalho Chehab analoginit = lineargain / 16;
158cb7a01acSMauro Carvalho Chehab } else if (lineargain > 511) {
159cb7a01acSMauro Carvalho Chehab digitalgain = 1;
160cb7a01acSMauro Carvalho Chehab analogmult = 3;
161cb7a01acSMauro Carvalho Chehab analoginit = lineargain / 8;
162cb7a01acSMauro Carvalho Chehab } else if (lineargain > 255) {
163cb7a01acSMauro Carvalho Chehab analogmult = 3;
164cb7a01acSMauro Carvalho Chehab analoginit = lineargain / 4;
165cb7a01acSMauro Carvalho Chehab } else if (lineargain > 127) {
166cb7a01acSMauro Carvalho Chehab analogmult = 1;
167cb7a01acSMauro Carvalho Chehab analoginit = lineargain / 2;
168cb7a01acSMauro Carvalho Chehab } else
169cb7a01acSMauro Carvalho Chehab analoginit = lineargain;
170cb7a01acSMauro Carvalho Chehab
171cb7a01acSMauro Carvalho Chehab return analoginit + (analogmult << 7) + (digitalgain << 9);
172cb7a01acSMauro Carvalho Chehab
173cb7a01acSMauro Carvalho Chehab }
174cb7a01acSMauro Carvalho Chehab
set_balance(struct v4l2_subdev * sd)175cb7a01acSMauro Carvalho Chehab static void set_balance(struct v4l2_subdev *sd)
176cb7a01acSMauro Carvalho Chehab {
177cb7a01acSMauro Carvalho Chehab struct mt9v011 *core = to_mt9v011(sd);
178cb7a01acSMauro Carvalho Chehab u16 green_gain, blue_gain, red_gain;
179cb7a01acSMauro Carvalho Chehab u16 exposure;
180cb7a01acSMauro Carvalho Chehab s16 bal;
181cb7a01acSMauro Carvalho Chehab
182cb7a01acSMauro Carvalho Chehab exposure = core->exposure;
183cb7a01acSMauro Carvalho Chehab
184cb7a01acSMauro Carvalho Chehab green_gain = calc_mt9v011_gain(core->global_gain);
185cb7a01acSMauro Carvalho Chehab
186cb7a01acSMauro Carvalho Chehab bal = core->global_gain;
187cb7a01acSMauro Carvalho Chehab bal += (core->blue_bal * core->global_gain / (1 << 7));
188cb7a01acSMauro Carvalho Chehab blue_gain = calc_mt9v011_gain(bal);
189cb7a01acSMauro Carvalho Chehab
190cb7a01acSMauro Carvalho Chehab bal = core->global_gain;
191cb7a01acSMauro Carvalho Chehab bal += (core->red_bal * core->global_gain / (1 << 7));
192cb7a01acSMauro Carvalho Chehab red_gain = calc_mt9v011_gain(bal);
193cb7a01acSMauro Carvalho Chehab
194cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green_gain);
195cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green_gain);
196cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
197cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
198cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, R09_MT9V011_SHUTTER_WIDTH, exposure);
199cb7a01acSMauro Carvalho Chehab }
200cb7a01acSMauro Carvalho Chehab
calc_fps(struct v4l2_subdev * sd,u32 * numerator,u32 * denominator)201cb7a01acSMauro Carvalho Chehab static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator)
202cb7a01acSMauro Carvalho Chehab {
203cb7a01acSMauro Carvalho Chehab struct mt9v011 *core = to_mt9v011(sd);
204cb7a01acSMauro Carvalho Chehab unsigned height, width, hblank, vblank, speed;
205cb7a01acSMauro Carvalho Chehab unsigned row_time, t_time;
206cb7a01acSMauro Carvalho Chehab u64 frames_per_ms;
207cb7a01acSMauro Carvalho Chehab unsigned tmp;
208cb7a01acSMauro Carvalho Chehab
209cb7a01acSMauro Carvalho Chehab height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
210cb7a01acSMauro Carvalho Chehab width = mt9v011_read(sd, R04_MT9V011_WIDTH);
211cb7a01acSMauro Carvalho Chehab hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
212cb7a01acSMauro Carvalho Chehab vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
213cb7a01acSMauro Carvalho Chehab speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
214cb7a01acSMauro Carvalho Chehab
215cb7a01acSMauro Carvalho Chehab row_time = (width + 113 + hblank) * (speed + 2);
216cb7a01acSMauro Carvalho Chehab t_time = row_time * (height + vblank + 1);
217cb7a01acSMauro Carvalho Chehab
218cb7a01acSMauro Carvalho Chehab frames_per_ms = core->xtal * 1000l;
219cb7a01acSMauro Carvalho Chehab do_div(frames_per_ms, t_time);
220cb7a01acSMauro Carvalho Chehab tmp = frames_per_ms;
221cb7a01acSMauro Carvalho Chehab
222cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
223cb7a01acSMauro Carvalho Chehab tmp / 1000, tmp % 1000, t_time);
224cb7a01acSMauro Carvalho Chehab
225cb7a01acSMauro Carvalho Chehab if (numerator && denominator) {
226cb7a01acSMauro Carvalho Chehab *numerator = 1000;
227cb7a01acSMauro Carvalho Chehab *denominator = (u32)frames_per_ms;
228cb7a01acSMauro Carvalho Chehab }
229cb7a01acSMauro Carvalho Chehab }
230cb7a01acSMauro Carvalho Chehab
calc_speed(struct v4l2_subdev * sd,u32 numerator,u32 denominator)231cb7a01acSMauro Carvalho Chehab static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator)
232cb7a01acSMauro Carvalho Chehab {
233cb7a01acSMauro Carvalho Chehab struct mt9v011 *core = to_mt9v011(sd);
234cb7a01acSMauro Carvalho Chehab unsigned height, width, hblank, vblank;
235cb7a01acSMauro Carvalho Chehab unsigned row_time, line_time;
236cb7a01acSMauro Carvalho Chehab u64 t_time, speed;
237cb7a01acSMauro Carvalho Chehab
238cb7a01acSMauro Carvalho Chehab /* Avoid bogus calculus */
239cb7a01acSMauro Carvalho Chehab if (!numerator || !denominator)
240cb7a01acSMauro Carvalho Chehab return 0;
241cb7a01acSMauro Carvalho Chehab
242cb7a01acSMauro Carvalho Chehab height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
243cb7a01acSMauro Carvalho Chehab width = mt9v011_read(sd, R04_MT9V011_WIDTH);
244cb7a01acSMauro Carvalho Chehab hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
245cb7a01acSMauro Carvalho Chehab vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
246cb7a01acSMauro Carvalho Chehab
247cb7a01acSMauro Carvalho Chehab row_time = width + 113 + hblank;
248cb7a01acSMauro Carvalho Chehab line_time = height + vblank + 1;
249cb7a01acSMauro Carvalho Chehab
250cb7a01acSMauro Carvalho Chehab t_time = core->xtal * ((u64)numerator);
251cb7a01acSMauro Carvalho Chehab /* round to the closest value */
252cb7a01acSMauro Carvalho Chehab t_time += denominator / 2;
253cb7a01acSMauro Carvalho Chehab do_div(t_time, denominator);
254cb7a01acSMauro Carvalho Chehab
255cb7a01acSMauro Carvalho Chehab speed = t_time;
256cb7a01acSMauro Carvalho Chehab do_div(speed, row_time * line_time);
257cb7a01acSMauro Carvalho Chehab
258cb7a01acSMauro Carvalho Chehab /* Avoid having a negative value for speed */
259cb7a01acSMauro Carvalho Chehab if (speed < 2)
260cb7a01acSMauro Carvalho Chehab speed = 0;
261cb7a01acSMauro Carvalho Chehab else
262cb7a01acSMauro Carvalho Chehab speed -= 2;
263cb7a01acSMauro Carvalho Chehab
264cb7a01acSMauro Carvalho Chehab /* Avoid speed overflow */
265cb7a01acSMauro Carvalho Chehab if (speed > 15)
266cb7a01acSMauro Carvalho Chehab return 15;
267cb7a01acSMauro Carvalho Chehab
268cb7a01acSMauro Carvalho Chehab return (u16)speed;
269cb7a01acSMauro Carvalho Chehab }
270cb7a01acSMauro Carvalho Chehab
set_res(struct v4l2_subdev * sd)271cb7a01acSMauro Carvalho Chehab static void set_res(struct v4l2_subdev *sd)
272cb7a01acSMauro Carvalho Chehab {
273cb7a01acSMauro Carvalho Chehab struct mt9v011 *core = to_mt9v011(sd);
274cb7a01acSMauro Carvalho Chehab unsigned vstart, hstart;
275cb7a01acSMauro Carvalho Chehab
276cb7a01acSMauro Carvalho Chehab /*
277cb7a01acSMauro Carvalho Chehab * The mt9v011 doesn't have scaling. So, in order to select the desired
278cb7a01acSMauro Carvalho Chehab * resolution, we're cropping at the middle of the sensor.
279cb7a01acSMauro Carvalho Chehab * hblank and vblank should be adjusted, in order to warrant that
280cb7a01acSMauro Carvalho Chehab * we'll preserve the line timings for 30 fps, no matter what resolution
281cb7a01acSMauro Carvalho Chehab * is selected.
282cb7a01acSMauro Carvalho Chehab * NOTE: datasheet says that width (and height) should be filled with
283cb7a01acSMauro Carvalho Chehab * width-1. However, this doesn't work, since one pixel per line will
284cb7a01acSMauro Carvalho Chehab * be missing.
285cb7a01acSMauro Carvalho Chehab */
286cb7a01acSMauro Carvalho Chehab
287cb7a01acSMauro Carvalho Chehab hstart = 20 + (640 - core->width) / 2;
288cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
289cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
290cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
291cb7a01acSMauro Carvalho Chehab
292cb7a01acSMauro Carvalho Chehab vstart = 8 + (480 - core->height) / 2;
293cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
294cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
295cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
296cb7a01acSMauro Carvalho Chehab
297cb7a01acSMauro Carvalho Chehab calc_fps(sd, NULL, NULL);
298cb7a01acSMauro Carvalho Chehab };
299cb7a01acSMauro Carvalho Chehab
set_read_mode(struct v4l2_subdev * sd)300cb7a01acSMauro Carvalho Chehab static void set_read_mode(struct v4l2_subdev *sd)
301cb7a01acSMauro Carvalho Chehab {
302cb7a01acSMauro Carvalho Chehab struct mt9v011 *core = to_mt9v011(sd);
303cb7a01acSMauro Carvalho Chehab unsigned mode = 0x1000;
304cb7a01acSMauro Carvalho Chehab
305cb7a01acSMauro Carvalho Chehab if (core->hflip)
306cb7a01acSMauro Carvalho Chehab mode |= 0x4000;
307cb7a01acSMauro Carvalho Chehab
308cb7a01acSMauro Carvalho Chehab if (core->vflip)
309cb7a01acSMauro Carvalho Chehab mode |= 0x8000;
310cb7a01acSMauro Carvalho Chehab
311cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
312cb7a01acSMauro Carvalho Chehab }
313cb7a01acSMauro Carvalho Chehab
mt9v011_reset(struct v4l2_subdev * sd,u32 val)314cb7a01acSMauro Carvalho Chehab static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
315cb7a01acSMauro Carvalho Chehab {
316cb7a01acSMauro Carvalho Chehab int i;
317cb7a01acSMauro Carvalho Chehab
318cb7a01acSMauro Carvalho Chehab for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
319cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, mt9v011_init_default[i].reg,
320cb7a01acSMauro Carvalho Chehab mt9v011_init_default[i].value);
321cb7a01acSMauro Carvalho Chehab
322cb7a01acSMauro Carvalho Chehab set_balance(sd);
323cb7a01acSMauro Carvalho Chehab set_res(sd);
324cb7a01acSMauro Carvalho Chehab set_read_mode(sd);
325cb7a01acSMauro Carvalho Chehab
326cb7a01acSMauro Carvalho Chehab return 0;
327cb7a01acSMauro Carvalho Chehab }
328cb7a01acSMauro Carvalho Chehab
mt9v011_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)329ebcff5fcSHans Verkuil static int mt9v011_enum_mbus_code(struct v4l2_subdev *sd,
3300d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
331ebcff5fcSHans Verkuil struct v4l2_subdev_mbus_code_enum *code)
332cb7a01acSMauro Carvalho Chehab {
333ebcff5fcSHans Verkuil if (code->pad || code->index > 0)
334cb7a01acSMauro Carvalho Chehab return -EINVAL;
335cb7a01acSMauro Carvalho Chehab
336ebcff5fcSHans Verkuil code->code = MEDIA_BUS_FMT_SGRBG8_1X8;
337cb7a01acSMauro Carvalho Chehab return 0;
338cb7a01acSMauro Carvalho Chehab }
339cb7a01acSMauro Carvalho Chehab
mt9v011_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * format)340717fd5b4SHans Verkuil static int mt9v011_set_fmt(struct v4l2_subdev *sd,
3410d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
342717fd5b4SHans Verkuil struct v4l2_subdev_format *format)
343cb7a01acSMauro Carvalho Chehab {
344717fd5b4SHans Verkuil struct v4l2_mbus_framefmt *fmt = &format->format;
345717fd5b4SHans Verkuil struct mt9v011 *core = to_mt9v011(sd);
346717fd5b4SHans Verkuil
347717fd5b4SHans Verkuil if (format->pad || fmt->code != MEDIA_BUS_FMT_SGRBG8_1X8)
348cb7a01acSMauro Carvalho Chehab return -EINVAL;
349cb7a01acSMauro Carvalho Chehab
350cb7a01acSMauro Carvalho Chehab v4l_bound_align_image(&fmt->width, 48, 639, 1,
351cb7a01acSMauro Carvalho Chehab &fmt->height, 32, 480, 1, 0);
352cb7a01acSMauro Carvalho Chehab fmt->field = V4L2_FIELD_NONE;
353cb7a01acSMauro Carvalho Chehab fmt->colorspace = V4L2_COLORSPACE_SRGB;
354cb7a01acSMauro Carvalho Chehab
355717fd5b4SHans Verkuil if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
356717fd5b4SHans Verkuil core->width = fmt->width;
357717fd5b4SHans Verkuil core->height = fmt->height;
358717fd5b4SHans Verkuil
359717fd5b4SHans Verkuil set_res(sd);
360717fd5b4SHans Verkuil } else {
3610d346d2aSTomi Valkeinen sd_state->pads->try_fmt = *fmt;
362717fd5b4SHans Verkuil }
363717fd5b4SHans Verkuil
364cb7a01acSMauro Carvalho Chehab return 0;
365cb7a01acSMauro Carvalho Chehab }
366cb7a01acSMauro Carvalho Chehab
mt9v011_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * ival)3674471109eSHans Verkuil static int mt9v011_g_frame_interval(struct v4l2_subdev *sd,
3684471109eSHans Verkuil struct v4l2_subdev_frame_interval *ival)
369cb7a01acSMauro Carvalho Chehab {
370cb7a01acSMauro Carvalho Chehab calc_fps(sd,
3714471109eSHans Verkuil &ival->interval.numerator,
3724471109eSHans Verkuil &ival->interval.denominator);
373cb7a01acSMauro Carvalho Chehab
374cb7a01acSMauro Carvalho Chehab return 0;
375cb7a01acSMauro Carvalho Chehab }
376cb7a01acSMauro Carvalho Chehab
mt9v011_s_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * ival)3774471109eSHans Verkuil static int mt9v011_s_frame_interval(struct v4l2_subdev *sd,
3784471109eSHans Verkuil struct v4l2_subdev_frame_interval *ival)
379cb7a01acSMauro Carvalho Chehab {
3804471109eSHans Verkuil struct v4l2_fract *tpf = &ival->interval;
381cb7a01acSMauro Carvalho Chehab u16 speed;
382cb7a01acSMauro Carvalho Chehab
383cb7a01acSMauro Carvalho Chehab speed = calc_speed(sd, tpf->numerator, tpf->denominator);
384cb7a01acSMauro Carvalho Chehab
385cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed);
386cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed);
387cb7a01acSMauro Carvalho Chehab
388cb7a01acSMauro Carvalho Chehab /* Recalculate and update fps info */
389cb7a01acSMauro Carvalho Chehab calc_fps(sd, &tpf->numerator, &tpf->denominator);
390cb7a01acSMauro Carvalho Chehab
391cb7a01acSMauro Carvalho Chehab return 0;
392cb7a01acSMauro Carvalho Chehab }
393cb7a01acSMauro Carvalho Chehab
394cb7a01acSMauro Carvalho Chehab #ifdef CONFIG_VIDEO_ADV_DEBUG
mt9v011_g_register(struct v4l2_subdev * sd,struct v4l2_dbg_register * reg)395cb7a01acSMauro Carvalho Chehab static int mt9v011_g_register(struct v4l2_subdev *sd,
396cb7a01acSMauro Carvalho Chehab struct v4l2_dbg_register *reg)
397cb7a01acSMauro Carvalho Chehab {
398cb7a01acSMauro Carvalho Chehab reg->val = mt9v011_read(sd, reg->reg & 0xff);
399cb7a01acSMauro Carvalho Chehab reg->size = 2;
400cb7a01acSMauro Carvalho Chehab
401cb7a01acSMauro Carvalho Chehab return 0;
402cb7a01acSMauro Carvalho Chehab }
403cb7a01acSMauro Carvalho Chehab
mt9v011_s_register(struct v4l2_subdev * sd,const struct v4l2_dbg_register * reg)404cb7a01acSMauro Carvalho Chehab static int mt9v011_s_register(struct v4l2_subdev *sd,
405977ba3b1SHans Verkuil const struct v4l2_dbg_register *reg)
406cb7a01acSMauro Carvalho Chehab {
407cb7a01acSMauro Carvalho Chehab mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
408cb7a01acSMauro Carvalho Chehab
409cb7a01acSMauro Carvalho Chehab return 0;
410cb7a01acSMauro Carvalho Chehab }
411cb7a01acSMauro Carvalho Chehab #endif
412cb7a01acSMauro Carvalho Chehab
mt9v011_s_ctrl(struct v4l2_ctrl * ctrl)413ea01a83dSHans Verkuil static int mt9v011_s_ctrl(struct v4l2_ctrl *ctrl)
414ea01a83dSHans Verkuil {
415ea01a83dSHans Verkuil struct mt9v011 *core =
416ea01a83dSHans Verkuil container_of(ctrl->handler, struct mt9v011, ctrls);
417ea01a83dSHans Verkuil struct v4l2_subdev *sd = &core->sd;
418ea01a83dSHans Verkuil
419ea01a83dSHans Verkuil switch (ctrl->id) {
420ea01a83dSHans Verkuil case V4L2_CID_GAIN:
421ea01a83dSHans Verkuil core->global_gain = ctrl->val;
422ea01a83dSHans Verkuil break;
423ea01a83dSHans Verkuil case V4L2_CID_EXPOSURE:
424ea01a83dSHans Verkuil core->exposure = ctrl->val;
425ea01a83dSHans Verkuil break;
426ea01a83dSHans Verkuil case V4L2_CID_RED_BALANCE:
427ea01a83dSHans Verkuil core->red_bal = ctrl->val;
428ea01a83dSHans Verkuil break;
429ea01a83dSHans Verkuil case V4L2_CID_BLUE_BALANCE:
430ea01a83dSHans Verkuil core->blue_bal = ctrl->val;
431ea01a83dSHans Verkuil break;
432ea01a83dSHans Verkuil case V4L2_CID_HFLIP:
433ea01a83dSHans Verkuil core->hflip = ctrl->val;
434ea01a83dSHans Verkuil set_read_mode(sd);
435ea01a83dSHans Verkuil return 0;
436ea01a83dSHans Verkuil case V4L2_CID_VFLIP:
437ea01a83dSHans Verkuil core->vflip = ctrl->val;
438ea01a83dSHans Verkuil set_read_mode(sd);
439ea01a83dSHans Verkuil return 0;
440ea01a83dSHans Verkuil default:
441ea01a83dSHans Verkuil return -EINVAL;
442ea01a83dSHans Verkuil }
443ea01a83dSHans Verkuil
444ea01a83dSHans Verkuil set_balance(sd);
445ea01a83dSHans Verkuil return 0;
446ea01a83dSHans Verkuil }
447ea01a83dSHans Verkuil
448217bdb07SJulia Lawall static const struct v4l2_ctrl_ops mt9v011_ctrl_ops = {
449cb7a01acSMauro Carvalho Chehab .s_ctrl = mt9v011_s_ctrl,
450ea01a83dSHans Verkuil };
451ea01a83dSHans Verkuil
452ea01a83dSHans Verkuil static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
453cb7a01acSMauro Carvalho Chehab .reset = mt9v011_reset,
454cb7a01acSMauro Carvalho Chehab #ifdef CONFIG_VIDEO_ADV_DEBUG
455cb7a01acSMauro Carvalho Chehab .g_register = mt9v011_g_register,
456cb7a01acSMauro Carvalho Chehab .s_register = mt9v011_s_register,
457cb7a01acSMauro Carvalho Chehab #endif
458cb7a01acSMauro Carvalho Chehab };
459cb7a01acSMauro Carvalho Chehab
460cb7a01acSMauro Carvalho Chehab static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
4614471109eSHans Verkuil .g_frame_interval = mt9v011_g_frame_interval,
4624471109eSHans Verkuil .s_frame_interval = mt9v011_s_frame_interval,
463cb7a01acSMauro Carvalho Chehab };
464cb7a01acSMauro Carvalho Chehab
465ebcff5fcSHans Verkuil static const struct v4l2_subdev_pad_ops mt9v011_pad_ops = {
466ebcff5fcSHans Verkuil .enum_mbus_code = mt9v011_enum_mbus_code,
467717fd5b4SHans Verkuil .set_fmt = mt9v011_set_fmt,
468ebcff5fcSHans Verkuil };
469ebcff5fcSHans Verkuil
470cb7a01acSMauro Carvalho Chehab static const struct v4l2_subdev_ops mt9v011_ops = {
471cb7a01acSMauro Carvalho Chehab .core = &mt9v011_core_ops,
472cb7a01acSMauro Carvalho Chehab .video = &mt9v011_video_ops,
473ebcff5fcSHans Verkuil .pad = &mt9v011_pad_ops,
474cb7a01acSMauro Carvalho Chehab };
475cb7a01acSMauro Carvalho Chehab
476cb7a01acSMauro Carvalho Chehab
477cb7a01acSMauro Carvalho Chehab /****************************************************************************
478cb7a01acSMauro Carvalho Chehab I2C Client & Driver
479cb7a01acSMauro Carvalho Chehab ****************************************************************************/
480cb7a01acSMauro Carvalho Chehab
mt9v011_probe(struct i2c_client * c)481e3df7926SUwe Kleine-König static int mt9v011_probe(struct i2c_client *c)
482cb7a01acSMauro Carvalho Chehab {
483cb7a01acSMauro Carvalho Chehab u16 version;
484cb7a01acSMauro Carvalho Chehab struct mt9v011 *core;
485cb7a01acSMauro Carvalho Chehab struct v4l2_subdev *sd;
486ac88fce9SMauro Carvalho Chehab #ifdef CONFIG_MEDIA_CONTROLLER
487ac88fce9SMauro Carvalho Chehab int ret;
488ac88fce9SMauro Carvalho Chehab #endif
489cb7a01acSMauro Carvalho Chehab
490cb7a01acSMauro Carvalho Chehab /* Check if the adapter supports the needed features */
491cb7a01acSMauro Carvalho Chehab if (!i2c_check_functionality(c->adapter,
492cb7a01acSMauro Carvalho Chehab I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
493cb7a01acSMauro Carvalho Chehab return -EIO;
494cb7a01acSMauro Carvalho Chehab
495c02b211dSLaurent Pinchart core = devm_kzalloc(&c->dev, sizeof(struct mt9v011), GFP_KERNEL);
496cb7a01acSMauro Carvalho Chehab if (!core)
497cb7a01acSMauro Carvalho Chehab return -ENOMEM;
498cb7a01acSMauro Carvalho Chehab
499cb7a01acSMauro Carvalho Chehab sd = &core->sd;
500cb7a01acSMauro Carvalho Chehab v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
501cb7a01acSMauro Carvalho Chehab
502ac88fce9SMauro Carvalho Chehab #ifdef CONFIG_MEDIA_CONTROLLER
503ac88fce9SMauro Carvalho Chehab core->pad.flags = MEDIA_PAD_FL_SOURCE;
504ac88fce9SMauro Carvalho Chehab sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
505ac88fce9SMauro Carvalho Chehab
506ac88fce9SMauro Carvalho Chehab ret = media_entity_pads_init(&sd->entity, 1, &core->pad);
507ac88fce9SMauro Carvalho Chehab if (ret < 0)
508ac88fce9SMauro Carvalho Chehab return ret;
509ac88fce9SMauro Carvalho Chehab #endif
510ac88fce9SMauro Carvalho Chehab
511cb7a01acSMauro Carvalho Chehab /* Check if the sensor is really a MT9V011 */
512cb7a01acSMauro Carvalho Chehab version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
513cb7a01acSMauro Carvalho Chehab if ((version != MT9V011_VERSION) &&
514cb7a01acSMauro Carvalho Chehab (version != MT9V011_REV_B_VERSION)) {
515cb7a01acSMauro Carvalho Chehab v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n",
516cb7a01acSMauro Carvalho Chehab version);
517cb7a01acSMauro Carvalho Chehab return -EINVAL;
518cb7a01acSMauro Carvalho Chehab }
519cb7a01acSMauro Carvalho Chehab
520ea01a83dSHans Verkuil v4l2_ctrl_handler_init(&core->ctrls, 5);
521ea01a83dSHans Verkuil v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
522ea01a83dSHans Verkuil V4L2_CID_GAIN, 0, (1 << 12) - 1 - 0x20, 1, 0x20);
523ea01a83dSHans Verkuil v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
524ea01a83dSHans Verkuil V4L2_CID_EXPOSURE, 0, 2047, 1, 0x01fc);
525ea01a83dSHans Verkuil v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
526ea01a83dSHans Verkuil V4L2_CID_RED_BALANCE, -(1 << 9), (1 << 9) - 1, 1, 0);
527ea01a83dSHans Verkuil v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
528ea01a83dSHans Verkuil V4L2_CID_BLUE_BALANCE, -(1 << 9), (1 << 9) - 1, 1, 0);
529ea01a83dSHans Verkuil v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
530ea01a83dSHans Verkuil V4L2_CID_HFLIP, 0, 1, 1, 0);
531ea01a83dSHans Verkuil v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
532ea01a83dSHans Verkuil V4L2_CID_VFLIP, 0, 1, 1, 0);
533ea01a83dSHans Verkuil
534ea01a83dSHans Verkuil if (core->ctrls.error) {
535ea01a83dSHans Verkuil int ret = core->ctrls.error;
536ea01a83dSHans Verkuil
537ea01a83dSHans Verkuil v4l2_err(sd, "control initialization error %d\n", ret);
538ea01a83dSHans Verkuil v4l2_ctrl_handler_free(&core->ctrls);
539ea01a83dSHans Verkuil return ret;
540ea01a83dSHans Verkuil }
541ea01a83dSHans Verkuil core->sd.ctrl_handler = &core->ctrls;
542ea01a83dSHans Verkuil
543cb7a01acSMauro Carvalho Chehab core->global_gain = 0x0024;
544cb7a01acSMauro Carvalho Chehab core->exposure = 0x01fc;
545cb7a01acSMauro Carvalho Chehab core->width = 640;
546cb7a01acSMauro Carvalho Chehab core->height = 480;
547cb7a01acSMauro Carvalho Chehab core->xtal = 27000000; /* Hz */
548cb7a01acSMauro Carvalho Chehab
549cb7a01acSMauro Carvalho Chehab if (c->dev.platform_data) {
550cb7a01acSMauro Carvalho Chehab struct mt9v011_platform_data *pdata = c->dev.platform_data;
551cb7a01acSMauro Carvalho Chehab
552cb7a01acSMauro Carvalho Chehab core->xtal = pdata->xtal;
553cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
554cb7a01acSMauro Carvalho Chehab core->xtal / 1000000, (core->xtal / 1000) % 1000);
555cb7a01acSMauro Carvalho Chehab }
556cb7a01acSMauro Carvalho Chehab
557cb7a01acSMauro Carvalho Chehab v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
558cb7a01acSMauro Carvalho Chehab c->addr << 1, c->adapter->name, version);
559cb7a01acSMauro Carvalho Chehab
560cb7a01acSMauro Carvalho Chehab return 0;
561cb7a01acSMauro Carvalho Chehab }
562cb7a01acSMauro Carvalho Chehab
mt9v011_remove(struct i2c_client * c)563ed5c2f5fSUwe Kleine-König static void mt9v011_remove(struct i2c_client *c)
564cb7a01acSMauro Carvalho Chehab {
565cb7a01acSMauro Carvalho Chehab struct v4l2_subdev *sd = i2c_get_clientdata(c);
566ea01a83dSHans Verkuil struct mt9v011 *core = to_mt9v011(sd);
567cb7a01acSMauro Carvalho Chehab
568cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd,
569cb7a01acSMauro Carvalho Chehab "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
570cb7a01acSMauro Carvalho Chehab c->addr << 1);
571cb7a01acSMauro Carvalho Chehab
572cb7a01acSMauro Carvalho Chehab v4l2_device_unregister_subdev(sd);
573ea01a83dSHans Verkuil v4l2_ctrl_handler_free(&core->ctrls);
574cb7a01acSMauro Carvalho Chehab }
575cb7a01acSMauro Carvalho Chehab
576cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
577cb7a01acSMauro Carvalho Chehab
578cb7a01acSMauro Carvalho Chehab static const struct i2c_device_id mt9v011_id[] = {
579cb7a01acSMauro Carvalho Chehab { "mt9v011", 0 },
580cb7a01acSMauro Carvalho Chehab { }
581cb7a01acSMauro Carvalho Chehab };
582cb7a01acSMauro Carvalho Chehab MODULE_DEVICE_TABLE(i2c, mt9v011_id);
583cb7a01acSMauro Carvalho Chehab
584cb7a01acSMauro Carvalho Chehab static struct i2c_driver mt9v011_driver = {
585cb7a01acSMauro Carvalho Chehab .driver = {
586cb7a01acSMauro Carvalho Chehab .name = "mt9v011",
587cb7a01acSMauro Carvalho Chehab },
588*aaeb31c0SUwe Kleine-König .probe = mt9v011_probe,
589cb7a01acSMauro Carvalho Chehab .remove = mt9v011_remove,
590cb7a01acSMauro Carvalho Chehab .id_table = mt9v011_id,
591cb7a01acSMauro Carvalho Chehab };
592cb7a01acSMauro Carvalho Chehab
593cb7a01acSMauro Carvalho Chehab module_i2c_driver(mt9v011_driver);
594