1 /* 2 * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina 3 * 4 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 #include <linux/videodev2.h> 11 #include <linux/slab.h> 12 #include <linux/i2c.h> 13 #include <linux/log2.h> 14 #include <linux/gpio.h> 15 #include <linux/delay.h> 16 #include <linux/v4l2-mediabus.h> 17 #include <linux/module.h> 18 19 #include <media/v4l2-async.h> 20 #include <media/v4l2-clk.h> 21 #include <media/v4l2-common.h> 22 #include <media/v4l2-ctrls.h> 23 #include <media/v4l2-device.h> 24 #include <media/v4l2-event.h> 25 26 /* 27 * MT9M111, MT9M112 and MT9M131: 28 * i2c address is 0x48 or 0x5d (depending on SADDR pin) 29 * The platform has to define struct i2c_board_info objects and link to them 30 * from struct soc_camera_host_desc 31 */ 32 33 /* 34 * Sensor core register addresses (0x000..0x0ff) 35 */ 36 #define MT9M111_CHIP_VERSION 0x000 37 #define MT9M111_ROW_START 0x001 38 #define MT9M111_COLUMN_START 0x002 39 #define MT9M111_WINDOW_HEIGHT 0x003 40 #define MT9M111_WINDOW_WIDTH 0x004 41 #define MT9M111_HORIZONTAL_BLANKING_B 0x005 42 #define MT9M111_VERTICAL_BLANKING_B 0x006 43 #define MT9M111_HORIZONTAL_BLANKING_A 0x007 44 #define MT9M111_VERTICAL_BLANKING_A 0x008 45 #define MT9M111_SHUTTER_WIDTH 0x009 46 #define MT9M111_ROW_SPEED 0x00a 47 #define MT9M111_EXTRA_DELAY 0x00b 48 #define MT9M111_SHUTTER_DELAY 0x00c 49 #define MT9M111_RESET 0x00d 50 #define MT9M111_READ_MODE_B 0x020 51 #define MT9M111_READ_MODE_A 0x021 52 #define MT9M111_FLASH_CONTROL 0x023 53 #define MT9M111_GREEN1_GAIN 0x02b 54 #define MT9M111_BLUE_GAIN 0x02c 55 #define MT9M111_RED_GAIN 0x02d 56 #define MT9M111_GREEN2_GAIN 0x02e 57 #define MT9M111_GLOBAL_GAIN 0x02f 58 #define MT9M111_CONTEXT_CONTROL 0x0c8 59 #define MT9M111_PAGE_MAP 0x0f0 60 #define MT9M111_BYTE_WISE_ADDR 0x0f1 61 62 #define MT9M111_RESET_SYNC_CHANGES (1 << 15) 63 #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9) 64 #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8) 65 #define MT9M111_RESET_RESET_SOC (1 << 5) 66 #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4) 67 #define MT9M111_RESET_CHIP_ENABLE (1 << 3) 68 #define MT9M111_RESET_ANALOG_STANDBY (1 << 2) 69 #define MT9M111_RESET_RESTART_FRAME (1 << 1) 70 #define MT9M111_RESET_RESET_MODE (1 << 0) 71 72 #define MT9M111_RM_FULL_POWER_RD (0 << 10) 73 #define MT9M111_RM_LOW_POWER_RD (1 << 10) 74 #define MT9M111_RM_COL_SKIP_4X (1 << 5) 75 #define MT9M111_RM_ROW_SKIP_4X (1 << 4) 76 #define MT9M111_RM_COL_SKIP_2X (1 << 3) 77 #define MT9M111_RM_ROW_SKIP_2X (1 << 2) 78 #define MT9M111_RMB_MIRROR_COLS (1 << 1) 79 #define MT9M111_RMB_MIRROR_ROWS (1 << 0) 80 #define MT9M111_CTXT_CTRL_RESTART (1 << 15) 81 #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12) 82 #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10) 83 #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9) 84 #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8) 85 #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7) 86 #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3) 87 #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2) 88 #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1) 89 #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0) 90 91 /* 92 * Colorpipe register addresses (0x100..0x1ff) 93 */ 94 #define MT9M111_OPER_MODE_CTRL 0x106 95 #define MT9M111_OUTPUT_FORMAT_CTRL 0x108 96 #define MT9M111_TPG_CTRL 0x148 97 #define MT9M111_REDUCER_XZOOM_B 0x1a0 98 #define MT9M111_REDUCER_XSIZE_B 0x1a1 99 #define MT9M111_REDUCER_YZOOM_B 0x1a3 100 #define MT9M111_REDUCER_YSIZE_B 0x1a4 101 #define MT9M111_REDUCER_XZOOM_A 0x1a6 102 #define MT9M111_REDUCER_XSIZE_A 0x1a7 103 #define MT9M111_REDUCER_YZOOM_A 0x1a9 104 #define MT9M111_REDUCER_YSIZE_A 0x1aa 105 #define MT9M111_EFFECTS_MODE 0x1e2 106 107 #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a 108 #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b 109 110 #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14) 111 #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1) 112 #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9) 113 #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8) 114 #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14) 115 #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10) 116 #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9) 117 #define MT9M111_OUTFMT_RGB (1 << 8) 118 #define MT9M111_OUTFMT_RGB565 (0 << 6) 119 #define MT9M111_OUTFMT_RGB555 (1 << 6) 120 #define MT9M111_OUTFMT_RGB444x (2 << 6) 121 #define MT9M111_OUTFMT_RGBx444 (3 << 6) 122 #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4) 123 #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4) 124 #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4) 125 #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4) 126 #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3) 127 #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2) 128 #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1) 129 #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0) 130 #define MT9M111_TPG_SEL_MASK GENMASK(2, 0) 131 #define MT9M111_EFFECTS_MODE_MASK GENMASK(2, 0) 132 133 /* 134 * Camera control register addresses (0x200..0x2ff not implemented) 135 */ 136 137 #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg) 138 #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val)) 139 #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val)) 140 #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val)) 141 #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \ 142 (val), (mask)) 143 144 #define MT9M111_MIN_DARK_ROWS 8 145 #define MT9M111_MIN_DARK_COLS 26 146 #define MT9M111_MAX_HEIGHT 1024 147 #define MT9M111_MAX_WIDTH 1280 148 149 struct mt9m111_context { 150 u16 read_mode; 151 u16 blanking_h; 152 u16 blanking_v; 153 u16 reducer_xzoom; 154 u16 reducer_yzoom; 155 u16 reducer_xsize; 156 u16 reducer_ysize; 157 u16 output_fmt_ctrl2; 158 u16 control; 159 }; 160 161 static struct mt9m111_context context_a = { 162 .read_mode = MT9M111_READ_MODE_A, 163 .blanking_h = MT9M111_HORIZONTAL_BLANKING_A, 164 .blanking_v = MT9M111_VERTICAL_BLANKING_A, 165 .reducer_xzoom = MT9M111_REDUCER_XZOOM_A, 166 .reducer_yzoom = MT9M111_REDUCER_YZOOM_A, 167 .reducer_xsize = MT9M111_REDUCER_XSIZE_A, 168 .reducer_ysize = MT9M111_REDUCER_YSIZE_A, 169 .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_A, 170 .control = MT9M111_CTXT_CTRL_RESTART, 171 }; 172 173 static struct mt9m111_context context_b = { 174 .read_mode = MT9M111_READ_MODE_B, 175 .blanking_h = MT9M111_HORIZONTAL_BLANKING_B, 176 .blanking_v = MT9M111_VERTICAL_BLANKING_B, 177 .reducer_xzoom = MT9M111_REDUCER_XZOOM_B, 178 .reducer_yzoom = MT9M111_REDUCER_YZOOM_B, 179 .reducer_xsize = MT9M111_REDUCER_XSIZE_B, 180 .reducer_ysize = MT9M111_REDUCER_YSIZE_B, 181 .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_B, 182 .control = MT9M111_CTXT_CTRL_RESTART | 183 MT9M111_CTXT_CTRL_DEFECTCOR_B | MT9M111_CTXT_CTRL_RESIZE_B | 184 MT9M111_CTXT_CTRL_CTRL2_B | MT9M111_CTXT_CTRL_GAMMA_B | 185 MT9M111_CTXT_CTRL_READ_MODE_B | MT9M111_CTXT_CTRL_VBLANK_SEL_B | 186 MT9M111_CTXT_CTRL_HBLANK_SEL_B, 187 }; 188 189 /* MT9M111 has only one fixed colorspace per pixelcode */ 190 struct mt9m111_datafmt { 191 u32 code; 192 enum v4l2_colorspace colorspace; 193 }; 194 195 static const struct mt9m111_datafmt mt9m111_colour_fmts[] = { 196 {MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB}, 197 {MEDIA_BUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_SRGB}, 198 {MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB}, 199 {MEDIA_BUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_SRGB}, 200 {MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, 201 {MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB}, 202 {MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB}, 203 {MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB}, 204 {MEDIA_BUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB}, 205 {MEDIA_BUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB}, 206 {MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB}, 207 {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, 208 }; 209 210 struct mt9m111 { 211 struct v4l2_subdev subdev; 212 struct v4l2_ctrl_handler hdl; 213 struct v4l2_ctrl *gain; 214 struct mt9m111_context *ctx; 215 struct v4l2_rect rect; /* cropping rectangle */ 216 struct v4l2_clk *clk; 217 unsigned int width; /* output */ 218 unsigned int height; /* sizes */ 219 struct mutex power_lock; /* lock to protect power_count */ 220 int power_count; 221 const struct mt9m111_datafmt *fmt; 222 int lastpage; /* PageMap cache value */ 223 #ifdef CONFIG_MEDIA_CONTROLLER 224 struct media_pad pad; 225 #endif 226 }; 227 228 /* Find a data format by a pixel code */ 229 static const struct mt9m111_datafmt *mt9m111_find_datafmt(struct mt9m111 *mt9m111, 230 u32 code) 231 { 232 int i; 233 for (i = 0; i < ARRAY_SIZE(mt9m111_colour_fmts); i++) 234 if (mt9m111_colour_fmts[i].code == code) 235 return mt9m111_colour_fmts + i; 236 237 return mt9m111->fmt; 238 } 239 240 static struct mt9m111 *to_mt9m111(const struct i2c_client *client) 241 { 242 return container_of(i2c_get_clientdata(client), struct mt9m111, subdev); 243 } 244 245 static int reg_page_map_set(struct i2c_client *client, const u16 reg) 246 { 247 int ret; 248 u16 page; 249 struct mt9m111 *mt9m111 = to_mt9m111(client); 250 251 page = (reg >> 8); 252 if (page == mt9m111->lastpage) 253 return 0; 254 if (page > 2) 255 return -EINVAL; 256 257 ret = i2c_smbus_write_word_swapped(client, MT9M111_PAGE_MAP, page); 258 if (!ret) 259 mt9m111->lastpage = page; 260 return ret; 261 } 262 263 static int mt9m111_reg_read(struct i2c_client *client, const u16 reg) 264 { 265 int ret; 266 267 ret = reg_page_map_set(client, reg); 268 if (!ret) 269 ret = i2c_smbus_read_word_swapped(client, reg & 0xff); 270 271 dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret); 272 return ret; 273 } 274 275 static int mt9m111_reg_write(struct i2c_client *client, const u16 reg, 276 const u16 data) 277 { 278 int ret; 279 280 ret = reg_page_map_set(client, reg); 281 if (!ret) 282 ret = i2c_smbus_write_word_swapped(client, reg & 0xff, data); 283 dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret); 284 return ret; 285 } 286 287 static int mt9m111_reg_set(struct i2c_client *client, const u16 reg, 288 const u16 data) 289 { 290 int ret; 291 292 ret = mt9m111_reg_read(client, reg); 293 if (ret >= 0) 294 ret = mt9m111_reg_write(client, reg, ret | data); 295 return ret; 296 } 297 298 static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg, 299 const u16 data) 300 { 301 int ret; 302 303 ret = mt9m111_reg_read(client, reg); 304 if (ret >= 0) 305 ret = mt9m111_reg_write(client, reg, ret & ~data); 306 return ret; 307 } 308 309 static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg, 310 const u16 data, const u16 mask) 311 { 312 int ret; 313 314 ret = mt9m111_reg_read(client, reg); 315 if (ret >= 0) 316 ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data); 317 return ret; 318 } 319 320 static int mt9m111_set_context(struct mt9m111 *mt9m111, 321 struct mt9m111_context *ctx) 322 { 323 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 324 return reg_write(CONTEXT_CONTROL, ctx->control); 325 } 326 327 static int mt9m111_setup_rect_ctx(struct mt9m111 *mt9m111, 328 struct mt9m111_context *ctx, struct v4l2_rect *rect, 329 unsigned int width, unsigned int height) 330 { 331 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 332 int ret = mt9m111_reg_write(client, ctx->reducer_xzoom, rect->width); 333 if (!ret) 334 ret = mt9m111_reg_write(client, ctx->reducer_yzoom, rect->height); 335 if (!ret) 336 ret = mt9m111_reg_write(client, ctx->reducer_xsize, width); 337 if (!ret) 338 ret = mt9m111_reg_write(client, ctx->reducer_ysize, height); 339 return ret; 340 } 341 342 static int mt9m111_setup_geometry(struct mt9m111 *mt9m111, struct v4l2_rect *rect, 343 int width, int height, u32 code) 344 { 345 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 346 int ret; 347 348 ret = reg_write(COLUMN_START, rect->left); 349 if (!ret) 350 ret = reg_write(ROW_START, rect->top); 351 352 if (!ret) 353 ret = reg_write(WINDOW_WIDTH, rect->width); 354 if (!ret) 355 ret = reg_write(WINDOW_HEIGHT, rect->height); 356 357 if (code != MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) { 358 /* IFP in use, down-scaling possible */ 359 if (!ret) 360 ret = mt9m111_setup_rect_ctx(mt9m111, &context_b, 361 rect, width, height); 362 if (!ret) 363 ret = mt9m111_setup_rect_ctx(mt9m111, &context_a, 364 rect, width, height); 365 } 366 367 dev_dbg(&client->dev, "%s(%x): %ux%u@%u:%u -> %ux%u = %d\n", 368 __func__, code, rect->width, rect->height, rect->left, rect->top, 369 width, height, ret); 370 371 return ret; 372 } 373 374 static int mt9m111_enable(struct mt9m111 *mt9m111) 375 { 376 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 377 return reg_write(RESET, MT9M111_RESET_CHIP_ENABLE); 378 } 379 380 static int mt9m111_reset(struct mt9m111 *mt9m111) 381 { 382 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 383 int ret; 384 385 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); 386 if (!ret) 387 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC); 388 if (!ret) 389 ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE 390 | MT9M111_RESET_RESET_SOC); 391 392 return ret; 393 } 394 395 static int mt9m111_set_selection(struct v4l2_subdev *sd, 396 struct v4l2_subdev_pad_config *cfg, 397 struct v4l2_subdev_selection *sel) 398 { 399 struct i2c_client *client = v4l2_get_subdevdata(sd); 400 struct mt9m111 *mt9m111 = to_mt9m111(client); 401 struct v4l2_rect rect = sel->r; 402 int width, height; 403 int ret, align = 0; 404 405 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE || 406 sel->target != V4L2_SEL_TGT_CROP) 407 return -EINVAL; 408 409 if (mt9m111->fmt->code == MEDIA_BUS_FMT_SBGGR8_1X8 || 410 mt9m111->fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) { 411 /* Bayer format - even size lengths */ 412 align = 1; 413 /* Let the user play with the starting pixel */ 414 } 415 416 /* FIXME: the datasheet doesn't specify minimum sizes */ 417 v4l_bound_align_image(&rect.width, 2, MT9M111_MAX_WIDTH, align, 418 &rect.height, 2, MT9M111_MAX_HEIGHT, align, 0); 419 rect.left = clamp(rect.left, MT9M111_MIN_DARK_COLS, 420 MT9M111_MIN_DARK_COLS + MT9M111_MAX_WIDTH - 421 (__s32)rect.width); 422 rect.top = clamp(rect.top, MT9M111_MIN_DARK_ROWS, 423 MT9M111_MIN_DARK_ROWS + MT9M111_MAX_HEIGHT - 424 (__s32)rect.height); 425 426 width = min(mt9m111->width, rect.width); 427 height = min(mt9m111->height, rect.height); 428 429 ret = mt9m111_setup_geometry(mt9m111, &rect, width, height, mt9m111->fmt->code); 430 if (!ret) { 431 mt9m111->rect = rect; 432 mt9m111->width = width; 433 mt9m111->height = height; 434 } 435 436 return ret; 437 } 438 439 static int mt9m111_get_selection(struct v4l2_subdev *sd, 440 struct v4l2_subdev_pad_config *cfg, 441 struct v4l2_subdev_selection *sel) 442 { 443 struct i2c_client *client = v4l2_get_subdevdata(sd); 444 struct mt9m111 *mt9m111 = to_mt9m111(client); 445 446 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) 447 return -EINVAL; 448 449 switch (sel->target) { 450 case V4L2_SEL_TGT_CROP_BOUNDS: 451 sel->r.left = MT9M111_MIN_DARK_COLS; 452 sel->r.top = MT9M111_MIN_DARK_ROWS; 453 sel->r.width = MT9M111_MAX_WIDTH; 454 sel->r.height = MT9M111_MAX_HEIGHT; 455 return 0; 456 case V4L2_SEL_TGT_CROP: 457 sel->r = mt9m111->rect; 458 return 0; 459 default: 460 return -EINVAL; 461 } 462 } 463 464 static int mt9m111_get_fmt(struct v4l2_subdev *sd, 465 struct v4l2_subdev_pad_config *cfg, 466 struct v4l2_subdev_format *format) 467 { 468 struct v4l2_mbus_framefmt *mf = &format->format; 469 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 470 471 if (format->pad) 472 return -EINVAL; 473 474 mf->width = mt9m111->width; 475 mf->height = mt9m111->height; 476 mf->code = mt9m111->fmt->code; 477 mf->colorspace = mt9m111->fmt->colorspace; 478 mf->field = V4L2_FIELD_NONE; 479 480 return 0; 481 } 482 483 static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111, 484 u32 code) 485 { 486 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 487 u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER | 488 MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB | 489 MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 | 490 MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 | 491 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | 492 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 493 int ret; 494 495 switch (code) { 496 case MEDIA_BUS_FMT_SBGGR8_1X8: 497 data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER | 498 MT9M111_OUTFMT_RGB; 499 break; 500 case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE: 501 data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB; 502 break; 503 case MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE: 504 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 | 505 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; 506 break; 507 case MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE: 508 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555; 509 break; 510 case MEDIA_BUS_FMT_RGB565_2X8_LE: 511 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | 512 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; 513 break; 514 case MEDIA_BUS_FMT_RGB565_2X8_BE: 515 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565; 516 break; 517 case MEDIA_BUS_FMT_BGR565_2X8_BE: 518 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | 519 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 520 break; 521 case MEDIA_BUS_FMT_BGR565_2X8_LE: 522 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | 523 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | 524 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 525 break; 526 case MEDIA_BUS_FMT_UYVY8_2X8: 527 data_outfmt2 = 0; 528 break; 529 case MEDIA_BUS_FMT_VYUY8_2X8: 530 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 531 break; 532 case MEDIA_BUS_FMT_YUYV8_2X8: 533 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; 534 break; 535 case MEDIA_BUS_FMT_YVYU8_2X8: 536 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | 537 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 538 break; 539 default: 540 dev_err(&client->dev, "Pixel format not handled: %x\n", code); 541 return -EINVAL; 542 } 543 544 ret = mt9m111_reg_mask(client, context_a.output_fmt_ctrl2, 545 data_outfmt2, mask_outfmt2); 546 if (!ret) 547 ret = mt9m111_reg_mask(client, context_b.output_fmt_ctrl2, 548 data_outfmt2, mask_outfmt2); 549 550 return ret; 551 } 552 553 static int mt9m111_set_fmt(struct v4l2_subdev *sd, 554 struct v4l2_subdev_pad_config *cfg, 555 struct v4l2_subdev_format *format) 556 { 557 struct v4l2_mbus_framefmt *mf = &format->format; 558 struct i2c_client *client = v4l2_get_subdevdata(sd); 559 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 560 const struct mt9m111_datafmt *fmt; 561 struct v4l2_rect *rect = &mt9m111->rect; 562 bool bayer; 563 int ret; 564 565 if (format->pad) 566 return -EINVAL; 567 568 fmt = mt9m111_find_datafmt(mt9m111, mf->code); 569 570 bayer = fmt->code == MEDIA_BUS_FMT_SBGGR8_1X8 || 571 fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE; 572 573 /* 574 * With Bayer format enforce even side lengths, but let the user play 575 * with the starting pixel 576 */ 577 if (bayer) { 578 rect->width = ALIGN(rect->width, 2); 579 rect->height = ALIGN(rect->height, 2); 580 } 581 582 if (fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) { 583 /* IFP bypass mode, no scaling */ 584 mf->width = rect->width; 585 mf->height = rect->height; 586 } else { 587 /* No upscaling */ 588 if (mf->width > rect->width) 589 mf->width = rect->width; 590 if (mf->height > rect->height) 591 mf->height = rect->height; 592 } 593 594 dev_dbg(&client->dev, "%s(): %ux%u, code=%x\n", __func__, 595 mf->width, mf->height, fmt->code); 596 597 mf->code = fmt->code; 598 mf->colorspace = fmt->colorspace; 599 600 if (format->which == V4L2_SUBDEV_FORMAT_TRY) { 601 cfg->try_fmt = *mf; 602 return 0; 603 } 604 605 ret = mt9m111_setup_geometry(mt9m111, rect, mf->width, mf->height, mf->code); 606 if (!ret) 607 ret = mt9m111_set_pixfmt(mt9m111, mf->code); 608 if (!ret) { 609 mt9m111->width = mf->width; 610 mt9m111->height = mf->height; 611 mt9m111->fmt = fmt; 612 } 613 614 return ret; 615 } 616 617 #ifdef CONFIG_VIDEO_ADV_DEBUG 618 static int mt9m111_g_register(struct v4l2_subdev *sd, 619 struct v4l2_dbg_register *reg) 620 { 621 struct i2c_client *client = v4l2_get_subdevdata(sd); 622 int val; 623 624 if (reg->reg > 0x2ff) 625 return -EINVAL; 626 627 val = mt9m111_reg_read(client, reg->reg); 628 reg->size = 2; 629 reg->val = (u64)val; 630 631 if (reg->val > 0xffff) 632 return -EIO; 633 634 return 0; 635 } 636 637 static int mt9m111_s_register(struct v4l2_subdev *sd, 638 const struct v4l2_dbg_register *reg) 639 { 640 struct i2c_client *client = v4l2_get_subdevdata(sd); 641 642 if (reg->reg > 0x2ff) 643 return -EINVAL; 644 645 if (mt9m111_reg_write(client, reg->reg, reg->val) < 0) 646 return -EIO; 647 648 return 0; 649 } 650 #endif 651 652 static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask) 653 { 654 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 655 int ret; 656 657 if (flip) 658 ret = mt9m111_reg_set(client, mt9m111->ctx->read_mode, mask); 659 else 660 ret = mt9m111_reg_clear(client, mt9m111->ctx->read_mode, mask); 661 662 return ret; 663 } 664 665 static int mt9m111_get_global_gain(struct mt9m111 *mt9m111) 666 { 667 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 668 int data; 669 670 data = reg_read(GLOBAL_GAIN); 671 if (data >= 0) 672 return (data & 0x2f) * (1 << ((data >> 10) & 1)) * 673 (1 << ((data >> 9) & 1)); 674 return data; 675 } 676 677 static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain) 678 { 679 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 680 u16 val; 681 682 if (gain > 63 * 2 * 2) 683 return -EINVAL; 684 685 if ((gain >= 64 * 2) && (gain < 63 * 2 * 2)) 686 val = (1 << 10) | (1 << 9) | (gain / 4); 687 else if ((gain >= 64) && (gain < 64 * 2)) 688 val = (1 << 9) | (gain / 2); 689 else 690 val = gain; 691 692 return reg_write(GLOBAL_GAIN, val); 693 } 694 695 static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int val) 696 { 697 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 698 699 if (val == V4L2_EXPOSURE_AUTO) 700 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN); 701 return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN); 702 } 703 704 static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on) 705 { 706 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 707 708 if (on) 709 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN); 710 return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN); 711 } 712 713 static const char * const mt9m111_test_pattern_menu[] = { 714 "Disabled", 715 "Vertical monochrome gradient", 716 "Flat color type 1", 717 "Flat color type 2", 718 "Flat color type 3", 719 "Flat color type 4", 720 "Flat color type 5", 721 "Color bar", 722 }; 723 724 static int mt9m111_set_test_pattern(struct mt9m111 *mt9m111, int val) 725 { 726 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 727 728 return mt9m111_reg_mask(client, MT9M111_TPG_CTRL, val, 729 MT9M111_TPG_SEL_MASK); 730 } 731 732 static int mt9m111_set_colorfx(struct mt9m111 *mt9m111, int val) 733 { 734 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 735 static const struct v4l2_control colorfx[] = { 736 { V4L2_COLORFX_NONE, 0 }, 737 { V4L2_COLORFX_BW, 1 }, 738 { V4L2_COLORFX_SEPIA, 2 }, 739 { V4L2_COLORFX_NEGATIVE, 3 }, 740 { V4L2_COLORFX_SOLARIZATION, 4 }, 741 }; 742 int i; 743 744 for (i = 0; i < ARRAY_SIZE(colorfx); i++) { 745 if (colorfx[i].id == val) { 746 return mt9m111_reg_mask(client, MT9M111_EFFECTS_MODE, 747 colorfx[i].value, 748 MT9M111_EFFECTS_MODE_MASK); 749 } 750 } 751 752 return -EINVAL; 753 } 754 755 static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl) 756 { 757 struct mt9m111 *mt9m111 = container_of(ctrl->handler, 758 struct mt9m111, hdl); 759 760 switch (ctrl->id) { 761 case V4L2_CID_VFLIP: 762 return mt9m111_set_flip(mt9m111, ctrl->val, 763 MT9M111_RMB_MIRROR_ROWS); 764 case V4L2_CID_HFLIP: 765 return mt9m111_set_flip(mt9m111, ctrl->val, 766 MT9M111_RMB_MIRROR_COLS); 767 case V4L2_CID_GAIN: 768 return mt9m111_set_global_gain(mt9m111, ctrl->val); 769 case V4L2_CID_EXPOSURE_AUTO: 770 return mt9m111_set_autoexposure(mt9m111, ctrl->val); 771 case V4L2_CID_AUTO_WHITE_BALANCE: 772 return mt9m111_set_autowhitebalance(mt9m111, ctrl->val); 773 case V4L2_CID_TEST_PATTERN: 774 return mt9m111_set_test_pattern(mt9m111, ctrl->val); 775 case V4L2_CID_COLORFX: 776 return mt9m111_set_colorfx(mt9m111, ctrl->val); 777 } 778 779 return -EINVAL; 780 } 781 782 static int mt9m111_suspend(struct mt9m111 *mt9m111) 783 { 784 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 785 int ret; 786 787 v4l2_ctrl_s_ctrl(mt9m111->gain, mt9m111_get_global_gain(mt9m111)); 788 789 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); 790 if (!ret) 791 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC | 792 MT9M111_RESET_OUTPUT_DISABLE | 793 MT9M111_RESET_ANALOG_STANDBY); 794 if (!ret) 795 ret = reg_clear(RESET, MT9M111_RESET_CHIP_ENABLE); 796 797 return ret; 798 } 799 800 static void mt9m111_restore_state(struct mt9m111 *mt9m111) 801 { 802 mt9m111_set_context(mt9m111, mt9m111->ctx); 803 mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code); 804 mt9m111_setup_geometry(mt9m111, &mt9m111->rect, 805 mt9m111->width, mt9m111->height, mt9m111->fmt->code); 806 v4l2_ctrl_handler_setup(&mt9m111->hdl); 807 } 808 809 static int mt9m111_resume(struct mt9m111 *mt9m111) 810 { 811 int ret = mt9m111_enable(mt9m111); 812 if (!ret) 813 ret = mt9m111_reset(mt9m111); 814 if (!ret) 815 mt9m111_restore_state(mt9m111); 816 817 return ret; 818 } 819 820 static int mt9m111_init(struct mt9m111 *mt9m111) 821 { 822 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 823 int ret; 824 825 ret = mt9m111_enable(mt9m111); 826 if (!ret) 827 ret = mt9m111_reset(mt9m111); 828 if (!ret) 829 ret = mt9m111_set_context(mt9m111, mt9m111->ctx); 830 if (ret) 831 dev_err(&client->dev, "mt9m111 init failed: %d\n", ret); 832 return ret; 833 } 834 835 static int mt9m111_power_on(struct mt9m111 *mt9m111) 836 { 837 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 838 int ret; 839 840 ret = v4l2_clk_enable(mt9m111->clk); 841 if (ret < 0) 842 return ret; 843 844 ret = mt9m111_resume(mt9m111); 845 if (ret < 0) { 846 dev_err(&client->dev, "Failed to resume the sensor: %d\n", ret); 847 v4l2_clk_disable(mt9m111->clk); 848 } 849 850 return ret; 851 } 852 853 static void mt9m111_power_off(struct mt9m111 *mt9m111) 854 { 855 mt9m111_suspend(mt9m111); 856 v4l2_clk_disable(mt9m111->clk); 857 } 858 859 static int mt9m111_s_power(struct v4l2_subdev *sd, int on) 860 { 861 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 862 int ret = 0; 863 864 mutex_lock(&mt9m111->power_lock); 865 866 /* 867 * If the power count is modified from 0 to != 0 or from != 0 to 0, 868 * update the power state. 869 */ 870 if (mt9m111->power_count == !on) { 871 if (on) 872 ret = mt9m111_power_on(mt9m111); 873 else 874 mt9m111_power_off(mt9m111); 875 } 876 877 if (!ret) { 878 /* Update the power count. */ 879 mt9m111->power_count += on ? 1 : -1; 880 WARN_ON(mt9m111->power_count < 0); 881 } 882 883 mutex_unlock(&mt9m111->power_lock); 884 return ret; 885 } 886 887 static const struct v4l2_ctrl_ops mt9m111_ctrl_ops = { 888 .s_ctrl = mt9m111_s_ctrl, 889 }; 890 891 static const struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = { 892 .s_power = mt9m111_s_power, 893 .log_status = v4l2_ctrl_subdev_log_status, 894 .subscribe_event = v4l2_ctrl_subdev_subscribe_event, 895 .unsubscribe_event = v4l2_event_subdev_unsubscribe, 896 #ifdef CONFIG_VIDEO_ADV_DEBUG 897 .g_register = mt9m111_g_register, 898 .s_register = mt9m111_s_register, 899 #endif 900 }; 901 902 static int mt9m111_enum_mbus_code(struct v4l2_subdev *sd, 903 struct v4l2_subdev_pad_config *cfg, 904 struct v4l2_subdev_mbus_code_enum *code) 905 { 906 if (code->pad || code->index >= ARRAY_SIZE(mt9m111_colour_fmts)) 907 return -EINVAL; 908 909 code->code = mt9m111_colour_fmts[code->index].code; 910 return 0; 911 } 912 913 static int mt9m111_g_mbus_config(struct v4l2_subdev *sd, 914 struct v4l2_mbus_config *cfg) 915 { 916 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING | 917 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH | 918 V4L2_MBUS_DATA_ACTIVE_HIGH; 919 cfg->type = V4L2_MBUS_PARALLEL; 920 921 return 0; 922 } 923 924 static const struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = { 925 .g_mbus_config = mt9m111_g_mbus_config, 926 }; 927 928 static const struct v4l2_subdev_pad_ops mt9m111_subdev_pad_ops = { 929 .enum_mbus_code = mt9m111_enum_mbus_code, 930 .get_selection = mt9m111_get_selection, 931 .set_selection = mt9m111_set_selection, 932 .get_fmt = mt9m111_get_fmt, 933 .set_fmt = mt9m111_set_fmt, 934 }; 935 936 static const struct v4l2_subdev_ops mt9m111_subdev_ops = { 937 .core = &mt9m111_subdev_core_ops, 938 .video = &mt9m111_subdev_video_ops, 939 .pad = &mt9m111_subdev_pad_ops, 940 }; 941 942 /* 943 * Interface active, can use i2c. If it fails, it can indeed mean, that 944 * this wasn't our capture interface, so, we wait for the right one 945 */ 946 static int mt9m111_video_probe(struct i2c_client *client) 947 { 948 struct mt9m111 *mt9m111 = to_mt9m111(client); 949 s32 data; 950 int ret; 951 952 ret = mt9m111_s_power(&mt9m111->subdev, 1); 953 if (ret < 0) 954 return ret; 955 956 data = reg_read(CHIP_VERSION); 957 958 switch (data) { 959 case 0x143a: /* MT9M111 or MT9M131 */ 960 dev_info(&client->dev, 961 "Detected a MT9M111/MT9M131 chip ID %x\n", data); 962 break; 963 case 0x148c: /* MT9M112 */ 964 dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data); 965 break; 966 default: 967 dev_err(&client->dev, 968 "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n", 969 data); 970 ret = -ENODEV; 971 goto done; 972 } 973 974 ret = mt9m111_init(mt9m111); 975 if (ret) 976 goto done; 977 978 ret = v4l2_ctrl_handler_setup(&mt9m111->hdl); 979 980 done: 981 mt9m111_s_power(&mt9m111->subdev, 0); 982 return ret; 983 } 984 985 static int mt9m111_probe(struct i2c_client *client, 986 const struct i2c_device_id *did) 987 { 988 struct mt9m111 *mt9m111; 989 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 990 int ret; 991 992 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { 993 dev_warn(&adapter->dev, 994 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); 995 return -EIO; 996 } 997 998 mt9m111 = devm_kzalloc(&client->dev, sizeof(struct mt9m111), GFP_KERNEL); 999 if (!mt9m111) 1000 return -ENOMEM; 1001 1002 mt9m111->clk = v4l2_clk_get(&client->dev, "mclk"); 1003 if (IS_ERR(mt9m111->clk)) 1004 return PTR_ERR(mt9m111->clk); 1005 1006 /* Default HIGHPOWER context */ 1007 mt9m111->ctx = &context_b; 1008 1009 v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops); 1010 mt9m111->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | 1011 V4L2_SUBDEV_FL_HAS_EVENTS; 1012 1013 v4l2_ctrl_handler_init(&mt9m111->hdl, 7); 1014 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 1015 V4L2_CID_VFLIP, 0, 1, 1, 0); 1016 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 1017 V4L2_CID_HFLIP, 0, 1, 1, 0); 1018 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 1019 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1); 1020 mt9m111->gain = v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 1021 V4L2_CID_GAIN, 0, 63 * 2 * 2, 1, 32); 1022 v4l2_ctrl_new_std_menu(&mt9m111->hdl, 1023 &mt9m111_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0, 1024 V4L2_EXPOSURE_AUTO); 1025 v4l2_ctrl_new_std_menu_items(&mt9m111->hdl, 1026 &mt9m111_ctrl_ops, V4L2_CID_TEST_PATTERN, 1027 ARRAY_SIZE(mt9m111_test_pattern_menu) - 1, 0, 0, 1028 mt9m111_test_pattern_menu); 1029 v4l2_ctrl_new_std_menu(&mt9m111->hdl, &mt9m111_ctrl_ops, 1030 V4L2_CID_COLORFX, V4L2_COLORFX_SOLARIZATION, 1031 ~(BIT(V4L2_COLORFX_NONE) | 1032 BIT(V4L2_COLORFX_BW) | 1033 BIT(V4L2_COLORFX_SEPIA) | 1034 BIT(V4L2_COLORFX_NEGATIVE) | 1035 BIT(V4L2_COLORFX_SOLARIZATION)), 1036 V4L2_COLORFX_NONE); 1037 mt9m111->subdev.ctrl_handler = &mt9m111->hdl; 1038 if (mt9m111->hdl.error) { 1039 ret = mt9m111->hdl.error; 1040 goto out_clkput; 1041 } 1042 1043 #ifdef CONFIG_MEDIA_CONTROLLER 1044 mt9m111->pad.flags = MEDIA_PAD_FL_SOURCE; 1045 mt9m111->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1046 ret = media_entity_pads_init(&mt9m111->subdev.entity, 1, &mt9m111->pad); 1047 if (ret < 0) 1048 goto out_hdlfree; 1049 #endif 1050 1051 /* Second stage probe - when a capture adapter is there */ 1052 mt9m111->rect.left = MT9M111_MIN_DARK_COLS; 1053 mt9m111->rect.top = MT9M111_MIN_DARK_ROWS; 1054 mt9m111->rect.width = MT9M111_MAX_WIDTH; 1055 mt9m111->rect.height = MT9M111_MAX_HEIGHT; 1056 mt9m111->fmt = &mt9m111_colour_fmts[0]; 1057 mt9m111->lastpage = -1; 1058 mutex_init(&mt9m111->power_lock); 1059 1060 ret = mt9m111_video_probe(client); 1061 if (ret < 0) 1062 goto out_entityclean; 1063 1064 mt9m111->subdev.dev = &client->dev; 1065 ret = v4l2_async_register_subdev(&mt9m111->subdev); 1066 if (ret < 0) 1067 goto out_entityclean; 1068 1069 return 0; 1070 1071 out_entityclean: 1072 #ifdef CONFIG_MEDIA_CONTROLLER 1073 media_entity_cleanup(&mt9m111->subdev.entity); 1074 out_hdlfree: 1075 #endif 1076 v4l2_ctrl_handler_free(&mt9m111->hdl); 1077 out_clkput: 1078 v4l2_clk_put(mt9m111->clk); 1079 1080 return ret; 1081 } 1082 1083 static int mt9m111_remove(struct i2c_client *client) 1084 { 1085 struct mt9m111 *mt9m111 = to_mt9m111(client); 1086 1087 v4l2_async_unregister_subdev(&mt9m111->subdev); 1088 media_entity_cleanup(&mt9m111->subdev.entity); 1089 v4l2_clk_put(mt9m111->clk); 1090 v4l2_ctrl_handler_free(&mt9m111->hdl); 1091 1092 return 0; 1093 } 1094 static const struct of_device_id mt9m111_of_match[] = { 1095 { .compatible = "micron,mt9m111", }, 1096 {}, 1097 }; 1098 MODULE_DEVICE_TABLE(of, mt9m111_of_match); 1099 1100 static const struct i2c_device_id mt9m111_id[] = { 1101 { "mt9m111", 0 }, 1102 { } 1103 }; 1104 MODULE_DEVICE_TABLE(i2c, mt9m111_id); 1105 1106 static struct i2c_driver mt9m111_i2c_driver = { 1107 .driver = { 1108 .name = "mt9m111", 1109 .of_match_table = of_match_ptr(mt9m111_of_match), 1110 }, 1111 .probe = mt9m111_probe, 1112 .remove = mt9m111_remove, 1113 .id_table = mt9m111_id, 1114 }; 1115 1116 module_i2c_driver(mt9m111_i2c_driver); 1117 1118 MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver"); 1119 MODULE_AUTHOR("Robert Jarzmik"); 1120 MODULE_LICENSE("GPL"); 1121