1 /* 2 * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina 3 * 4 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 #include <linux/videodev2.h> 11 #include <linux/slab.h> 12 #include <linux/i2c.h> 13 #include <linux/log2.h> 14 #include <linux/gpio.h> 15 #include <linux/delay.h> 16 #include <linux/v4l2-mediabus.h> 17 #include <linux/module.h> 18 19 #include <media/v4l2-async.h> 20 #include <media/v4l2-clk.h> 21 #include <media/v4l2-common.h> 22 #include <media/v4l2-ctrls.h> 23 #include <media/v4l2-device.h> 24 #include <media/v4l2-event.h> 25 26 /* 27 * MT9M111, MT9M112 and MT9M131: 28 * i2c address is 0x48 or 0x5d (depending on SADDR pin) 29 * The platform has to define struct i2c_board_info objects and link to them 30 * from struct soc_camera_host_desc 31 */ 32 33 /* 34 * Sensor core register addresses (0x000..0x0ff) 35 */ 36 #define MT9M111_CHIP_VERSION 0x000 37 #define MT9M111_ROW_START 0x001 38 #define MT9M111_COLUMN_START 0x002 39 #define MT9M111_WINDOW_HEIGHT 0x003 40 #define MT9M111_WINDOW_WIDTH 0x004 41 #define MT9M111_HORIZONTAL_BLANKING_B 0x005 42 #define MT9M111_VERTICAL_BLANKING_B 0x006 43 #define MT9M111_HORIZONTAL_BLANKING_A 0x007 44 #define MT9M111_VERTICAL_BLANKING_A 0x008 45 #define MT9M111_SHUTTER_WIDTH 0x009 46 #define MT9M111_ROW_SPEED 0x00a 47 #define MT9M111_EXTRA_DELAY 0x00b 48 #define MT9M111_SHUTTER_DELAY 0x00c 49 #define MT9M111_RESET 0x00d 50 #define MT9M111_READ_MODE_B 0x020 51 #define MT9M111_READ_MODE_A 0x021 52 #define MT9M111_FLASH_CONTROL 0x023 53 #define MT9M111_GREEN1_GAIN 0x02b 54 #define MT9M111_BLUE_GAIN 0x02c 55 #define MT9M111_RED_GAIN 0x02d 56 #define MT9M111_GREEN2_GAIN 0x02e 57 #define MT9M111_GLOBAL_GAIN 0x02f 58 #define MT9M111_CONTEXT_CONTROL 0x0c8 59 #define MT9M111_PAGE_MAP 0x0f0 60 #define MT9M111_BYTE_WISE_ADDR 0x0f1 61 62 #define MT9M111_RESET_SYNC_CHANGES (1 << 15) 63 #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9) 64 #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8) 65 #define MT9M111_RESET_RESET_SOC (1 << 5) 66 #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4) 67 #define MT9M111_RESET_CHIP_ENABLE (1 << 3) 68 #define MT9M111_RESET_ANALOG_STANDBY (1 << 2) 69 #define MT9M111_RESET_RESTART_FRAME (1 << 1) 70 #define MT9M111_RESET_RESET_MODE (1 << 0) 71 72 #define MT9M111_RM_FULL_POWER_RD (0 << 10) 73 #define MT9M111_RM_LOW_POWER_RD (1 << 10) 74 #define MT9M111_RM_COL_SKIP_4X (1 << 5) 75 #define MT9M111_RM_ROW_SKIP_4X (1 << 4) 76 #define MT9M111_RM_COL_SKIP_2X (1 << 3) 77 #define MT9M111_RM_ROW_SKIP_2X (1 << 2) 78 #define MT9M111_RMB_MIRROR_COLS (1 << 1) 79 #define MT9M111_RMB_MIRROR_ROWS (1 << 0) 80 #define MT9M111_CTXT_CTRL_RESTART (1 << 15) 81 #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12) 82 #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10) 83 #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9) 84 #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8) 85 #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7) 86 #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3) 87 #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2) 88 #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1) 89 #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0) 90 91 /* 92 * Colorpipe register addresses (0x100..0x1ff) 93 */ 94 #define MT9M111_OPER_MODE_CTRL 0x106 95 #define MT9M111_OUTPUT_FORMAT_CTRL 0x108 96 #define MT9M111_TPG_CTRL 0x148 97 #define MT9M111_REDUCER_XZOOM_B 0x1a0 98 #define MT9M111_REDUCER_XSIZE_B 0x1a1 99 #define MT9M111_REDUCER_YZOOM_B 0x1a3 100 #define MT9M111_REDUCER_YSIZE_B 0x1a4 101 #define MT9M111_REDUCER_XZOOM_A 0x1a6 102 #define MT9M111_REDUCER_XSIZE_A 0x1a7 103 #define MT9M111_REDUCER_YZOOM_A 0x1a9 104 #define MT9M111_REDUCER_YSIZE_A 0x1aa 105 #define MT9M111_EFFECTS_MODE 0x1e2 106 107 #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a 108 #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b 109 110 #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14) 111 #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1) 112 #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9) 113 #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8) 114 #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14) 115 #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10) 116 #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9) 117 #define MT9M111_OUTFMT_RGB (1 << 8) 118 #define MT9M111_OUTFMT_RGB565 (0 << 6) 119 #define MT9M111_OUTFMT_RGB555 (1 << 6) 120 #define MT9M111_OUTFMT_RGB444x (2 << 6) 121 #define MT9M111_OUTFMT_RGBx444 (3 << 6) 122 #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4) 123 #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4) 124 #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4) 125 #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4) 126 #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3) 127 #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2) 128 #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1) 129 #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0) 130 #define MT9M111_TPG_SEL_MASK GENMASK(2, 0) 131 #define MT9M111_EFFECTS_MODE_MASK GENMASK(2, 0) 132 133 /* 134 * Camera control register addresses (0x200..0x2ff not implemented) 135 */ 136 137 #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg) 138 #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val)) 139 #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val)) 140 #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val)) 141 #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \ 142 (val), (mask)) 143 144 #define MT9M111_MIN_DARK_ROWS 8 145 #define MT9M111_MIN_DARK_COLS 26 146 #define MT9M111_MAX_HEIGHT 1024 147 #define MT9M111_MAX_WIDTH 1280 148 149 struct mt9m111_context { 150 u16 read_mode; 151 u16 blanking_h; 152 u16 blanking_v; 153 u16 reducer_xzoom; 154 u16 reducer_yzoom; 155 u16 reducer_xsize; 156 u16 reducer_ysize; 157 u16 output_fmt_ctrl2; 158 u16 control; 159 }; 160 161 static struct mt9m111_context context_a = { 162 .read_mode = MT9M111_READ_MODE_A, 163 .blanking_h = MT9M111_HORIZONTAL_BLANKING_A, 164 .blanking_v = MT9M111_VERTICAL_BLANKING_A, 165 .reducer_xzoom = MT9M111_REDUCER_XZOOM_A, 166 .reducer_yzoom = MT9M111_REDUCER_YZOOM_A, 167 .reducer_xsize = MT9M111_REDUCER_XSIZE_A, 168 .reducer_ysize = MT9M111_REDUCER_YSIZE_A, 169 .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_A, 170 .control = MT9M111_CTXT_CTRL_RESTART, 171 }; 172 173 static struct mt9m111_context context_b = { 174 .read_mode = MT9M111_READ_MODE_B, 175 .blanking_h = MT9M111_HORIZONTAL_BLANKING_B, 176 .blanking_v = MT9M111_VERTICAL_BLANKING_B, 177 .reducer_xzoom = MT9M111_REDUCER_XZOOM_B, 178 .reducer_yzoom = MT9M111_REDUCER_YZOOM_B, 179 .reducer_xsize = MT9M111_REDUCER_XSIZE_B, 180 .reducer_ysize = MT9M111_REDUCER_YSIZE_B, 181 .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_B, 182 .control = MT9M111_CTXT_CTRL_RESTART | 183 MT9M111_CTXT_CTRL_DEFECTCOR_B | MT9M111_CTXT_CTRL_RESIZE_B | 184 MT9M111_CTXT_CTRL_CTRL2_B | MT9M111_CTXT_CTRL_GAMMA_B | 185 MT9M111_CTXT_CTRL_READ_MODE_B | MT9M111_CTXT_CTRL_VBLANK_SEL_B | 186 MT9M111_CTXT_CTRL_HBLANK_SEL_B, 187 }; 188 189 /* MT9M111 has only one fixed colorspace per pixelcode */ 190 struct mt9m111_datafmt { 191 u32 code; 192 enum v4l2_colorspace colorspace; 193 }; 194 195 static const struct mt9m111_datafmt mt9m111_colour_fmts[] = { 196 {MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB}, 197 {MEDIA_BUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_SRGB}, 198 {MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB}, 199 {MEDIA_BUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_SRGB}, 200 {MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, 201 {MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB}, 202 {MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB}, 203 {MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB}, 204 {MEDIA_BUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB}, 205 {MEDIA_BUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB}, 206 {MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB}, 207 {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, 208 }; 209 210 struct mt9m111 { 211 struct v4l2_subdev subdev; 212 struct v4l2_ctrl_handler hdl; 213 struct v4l2_ctrl *gain; 214 struct mt9m111_context *ctx; 215 struct v4l2_rect rect; /* cropping rectangle */ 216 struct v4l2_clk *clk; 217 unsigned int width; /* output */ 218 unsigned int height; /* sizes */ 219 struct mutex power_lock; /* lock to protect power_count */ 220 int power_count; 221 const struct mt9m111_datafmt *fmt; 222 int lastpage; /* PageMap cache value */ 223 bool is_streaming; 224 #ifdef CONFIG_MEDIA_CONTROLLER 225 struct media_pad pad; 226 #endif 227 }; 228 229 /* Find a data format by a pixel code */ 230 static const struct mt9m111_datafmt *mt9m111_find_datafmt(struct mt9m111 *mt9m111, 231 u32 code) 232 { 233 int i; 234 for (i = 0; i < ARRAY_SIZE(mt9m111_colour_fmts); i++) 235 if (mt9m111_colour_fmts[i].code == code) 236 return mt9m111_colour_fmts + i; 237 238 return mt9m111->fmt; 239 } 240 241 static struct mt9m111 *to_mt9m111(const struct i2c_client *client) 242 { 243 return container_of(i2c_get_clientdata(client), struct mt9m111, subdev); 244 } 245 246 static int reg_page_map_set(struct i2c_client *client, const u16 reg) 247 { 248 int ret; 249 u16 page; 250 struct mt9m111 *mt9m111 = to_mt9m111(client); 251 252 page = (reg >> 8); 253 if (page == mt9m111->lastpage) 254 return 0; 255 if (page > 2) 256 return -EINVAL; 257 258 ret = i2c_smbus_write_word_swapped(client, MT9M111_PAGE_MAP, page); 259 if (!ret) 260 mt9m111->lastpage = page; 261 return ret; 262 } 263 264 static int mt9m111_reg_read(struct i2c_client *client, const u16 reg) 265 { 266 int ret; 267 268 ret = reg_page_map_set(client, reg); 269 if (!ret) 270 ret = i2c_smbus_read_word_swapped(client, reg & 0xff); 271 272 dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret); 273 return ret; 274 } 275 276 static int mt9m111_reg_write(struct i2c_client *client, const u16 reg, 277 const u16 data) 278 { 279 int ret; 280 281 ret = reg_page_map_set(client, reg); 282 if (!ret) 283 ret = i2c_smbus_write_word_swapped(client, reg & 0xff, data); 284 dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret); 285 return ret; 286 } 287 288 static int mt9m111_reg_set(struct i2c_client *client, const u16 reg, 289 const u16 data) 290 { 291 int ret; 292 293 ret = mt9m111_reg_read(client, reg); 294 if (ret >= 0) 295 ret = mt9m111_reg_write(client, reg, ret | data); 296 return ret; 297 } 298 299 static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg, 300 const u16 data) 301 { 302 int ret; 303 304 ret = mt9m111_reg_read(client, reg); 305 if (ret >= 0) 306 ret = mt9m111_reg_write(client, reg, ret & ~data); 307 return ret; 308 } 309 310 static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg, 311 const u16 data, const u16 mask) 312 { 313 int ret; 314 315 ret = mt9m111_reg_read(client, reg); 316 if (ret >= 0) 317 ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data); 318 return ret; 319 } 320 321 static int mt9m111_set_context(struct mt9m111 *mt9m111, 322 struct mt9m111_context *ctx) 323 { 324 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 325 return reg_write(CONTEXT_CONTROL, ctx->control); 326 } 327 328 static int mt9m111_setup_rect_ctx(struct mt9m111 *mt9m111, 329 struct mt9m111_context *ctx, struct v4l2_rect *rect, 330 unsigned int width, unsigned int height) 331 { 332 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 333 int ret = mt9m111_reg_write(client, ctx->reducer_xzoom, rect->width); 334 if (!ret) 335 ret = mt9m111_reg_write(client, ctx->reducer_yzoom, rect->height); 336 if (!ret) 337 ret = mt9m111_reg_write(client, ctx->reducer_xsize, width); 338 if (!ret) 339 ret = mt9m111_reg_write(client, ctx->reducer_ysize, height); 340 return ret; 341 } 342 343 static int mt9m111_setup_geometry(struct mt9m111 *mt9m111, struct v4l2_rect *rect, 344 int width, int height, u32 code) 345 { 346 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 347 int ret; 348 349 ret = reg_write(COLUMN_START, rect->left); 350 if (!ret) 351 ret = reg_write(ROW_START, rect->top); 352 353 if (!ret) 354 ret = reg_write(WINDOW_WIDTH, rect->width); 355 if (!ret) 356 ret = reg_write(WINDOW_HEIGHT, rect->height); 357 358 if (code != MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) { 359 /* IFP in use, down-scaling possible */ 360 if (!ret) 361 ret = mt9m111_setup_rect_ctx(mt9m111, &context_b, 362 rect, width, height); 363 if (!ret) 364 ret = mt9m111_setup_rect_ctx(mt9m111, &context_a, 365 rect, width, height); 366 } 367 368 dev_dbg(&client->dev, "%s(%x): %ux%u@%u:%u -> %ux%u = %d\n", 369 __func__, code, rect->width, rect->height, rect->left, rect->top, 370 width, height, ret); 371 372 return ret; 373 } 374 375 static int mt9m111_enable(struct mt9m111 *mt9m111) 376 { 377 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 378 return reg_write(RESET, MT9M111_RESET_CHIP_ENABLE); 379 } 380 381 static int mt9m111_reset(struct mt9m111 *mt9m111) 382 { 383 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 384 int ret; 385 386 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); 387 if (!ret) 388 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC); 389 if (!ret) 390 ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE 391 | MT9M111_RESET_RESET_SOC); 392 393 return ret; 394 } 395 396 static int mt9m111_set_selection(struct v4l2_subdev *sd, 397 struct v4l2_subdev_pad_config *cfg, 398 struct v4l2_subdev_selection *sel) 399 { 400 struct i2c_client *client = v4l2_get_subdevdata(sd); 401 struct mt9m111 *mt9m111 = to_mt9m111(client); 402 struct v4l2_rect rect = sel->r; 403 int width, height; 404 int ret, align = 0; 405 406 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE || 407 sel->target != V4L2_SEL_TGT_CROP) 408 return -EINVAL; 409 410 if (mt9m111->fmt->code == MEDIA_BUS_FMT_SBGGR8_1X8 || 411 mt9m111->fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) { 412 /* Bayer format - even size lengths */ 413 align = 1; 414 /* Let the user play with the starting pixel */ 415 } 416 417 /* FIXME: the datasheet doesn't specify minimum sizes */ 418 v4l_bound_align_image(&rect.width, 2, MT9M111_MAX_WIDTH, align, 419 &rect.height, 2, MT9M111_MAX_HEIGHT, align, 0); 420 rect.left = clamp(rect.left, MT9M111_MIN_DARK_COLS, 421 MT9M111_MIN_DARK_COLS + MT9M111_MAX_WIDTH - 422 (__s32)rect.width); 423 rect.top = clamp(rect.top, MT9M111_MIN_DARK_ROWS, 424 MT9M111_MIN_DARK_ROWS + MT9M111_MAX_HEIGHT - 425 (__s32)rect.height); 426 427 width = min(mt9m111->width, rect.width); 428 height = min(mt9m111->height, rect.height); 429 430 ret = mt9m111_setup_geometry(mt9m111, &rect, width, height, mt9m111->fmt->code); 431 if (!ret) { 432 mt9m111->rect = rect; 433 mt9m111->width = width; 434 mt9m111->height = height; 435 } 436 437 return ret; 438 } 439 440 static int mt9m111_get_selection(struct v4l2_subdev *sd, 441 struct v4l2_subdev_pad_config *cfg, 442 struct v4l2_subdev_selection *sel) 443 { 444 struct i2c_client *client = v4l2_get_subdevdata(sd); 445 struct mt9m111 *mt9m111 = to_mt9m111(client); 446 447 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) 448 return -EINVAL; 449 450 switch (sel->target) { 451 case V4L2_SEL_TGT_CROP_BOUNDS: 452 sel->r.left = MT9M111_MIN_DARK_COLS; 453 sel->r.top = MT9M111_MIN_DARK_ROWS; 454 sel->r.width = MT9M111_MAX_WIDTH; 455 sel->r.height = MT9M111_MAX_HEIGHT; 456 return 0; 457 case V4L2_SEL_TGT_CROP: 458 sel->r = mt9m111->rect; 459 return 0; 460 default: 461 return -EINVAL; 462 } 463 } 464 465 static int mt9m111_get_fmt(struct v4l2_subdev *sd, 466 struct v4l2_subdev_pad_config *cfg, 467 struct v4l2_subdev_format *format) 468 { 469 struct v4l2_mbus_framefmt *mf = &format->format; 470 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 471 472 if (format->pad) 473 return -EINVAL; 474 475 mf->width = mt9m111->width; 476 mf->height = mt9m111->height; 477 mf->code = mt9m111->fmt->code; 478 mf->colorspace = mt9m111->fmt->colorspace; 479 mf->field = V4L2_FIELD_NONE; 480 481 return 0; 482 } 483 484 static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111, 485 u32 code) 486 { 487 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 488 u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER | 489 MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB | 490 MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 | 491 MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 | 492 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | 493 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 494 int ret; 495 496 switch (code) { 497 case MEDIA_BUS_FMT_SBGGR8_1X8: 498 data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER | 499 MT9M111_OUTFMT_RGB; 500 break; 501 case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE: 502 data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB; 503 break; 504 case MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE: 505 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 | 506 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; 507 break; 508 case MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE: 509 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555; 510 break; 511 case MEDIA_BUS_FMT_RGB565_2X8_LE: 512 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | 513 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; 514 break; 515 case MEDIA_BUS_FMT_RGB565_2X8_BE: 516 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565; 517 break; 518 case MEDIA_BUS_FMT_BGR565_2X8_BE: 519 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | 520 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 521 break; 522 case MEDIA_BUS_FMT_BGR565_2X8_LE: 523 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | 524 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | 525 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 526 break; 527 case MEDIA_BUS_FMT_UYVY8_2X8: 528 data_outfmt2 = 0; 529 break; 530 case MEDIA_BUS_FMT_VYUY8_2X8: 531 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 532 break; 533 case MEDIA_BUS_FMT_YUYV8_2X8: 534 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; 535 break; 536 case MEDIA_BUS_FMT_YVYU8_2X8: 537 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | 538 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 539 break; 540 default: 541 dev_err(&client->dev, "Pixel format not handled: %x\n", code); 542 return -EINVAL; 543 } 544 545 ret = mt9m111_reg_mask(client, context_a.output_fmt_ctrl2, 546 data_outfmt2, mask_outfmt2); 547 if (!ret) 548 ret = mt9m111_reg_mask(client, context_b.output_fmt_ctrl2, 549 data_outfmt2, mask_outfmt2); 550 551 return ret; 552 } 553 554 static int mt9m111_set_fmt(struct v4l2_subdev *sd, 555 struct v4l2_subdev_pad_config *cfg, 556 struct v4l2_subdev_format *format) 557 { 558 struct v4l2_mbus_framefmt *mf = &format->format; 559 struct i2c_client *client = v4l2_get_subdevdata(sd); 560 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 561 const struct mt9m111_datafmt *fmt; 562 struct v4l2_rect *rect = &mt9m111->rect; 563 bool bayer; 564 int ret; 565 566 if (mt9m111->is_streaming) 567 return -EBUSY; 568 569 if (format->pad) 570 return -EINVAL; 571 572 fmt = mt9m111_find_datafmt(mt9m111, mf->code); 573 574 bayer = fmt->code == MEDIA_BUS_FMT_SBGGR8_1X8 || 575 fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE; 576 577 /* 578 * With Bayer format enforce even side lengths, but let the user play 579 * with the starting pixel 580 */ 581 if (bayer) { 582 rect->width = ALIGN(rect->width, 2); 583 rect->height = ALIGN(rect->height, 2); 584 } 585 586 if (fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) { 587 /* IFP bypass mode, no scaling */ 588 mf->width = rect->width; 589 mf->height = rect->height; 590 } else { 591 /* No upscaling */ 592 if (mf->width > rect->width) 593 mf->width = rect->width; 594 if (mf->height > rect->height) 595 mf->height = rect->height; 596 } 597 598 dev_dbg(&client->dev, "%s(): %ux%u, code=%x\n", __func__, 599 mf->width, mf->height, fmt->code); 600 601 mf->code = fmt->code; 602 mf->colorspace = fmt->colorspace; 603 604 if (format->which == V4L2_SUBDEV_FORMAT_TRY) { 605 cfg->try_fmt = *mf; 606 return 0; 607 } 608 609 ret = mt9m111_setup_geometry(mt9m111, rect, mf->width, mf->height, mf->code); 610 if (!ret) 611 ret = mt9m111_set_pixfmt(mt9m111, mf->code); 612 if (!ret) { 613 mt9m111->width = mf->width; 614 mt9m111->height = mf->height; 615 mt9m111->fmt = fmt; 616 } 617 618 return ret; 619 } 620 621 #ifdef CONFIG_VIDEO_ADV_DEBUG 622 static int mt9m111_g_register(struct v4l2_subdev *sd, 623 struct v4l2_dbg_register *reg) 624 { 625 struct i2c_client *client = v4l2_get_subdevdata(sd); 626 int val; 627 628 if (reg->reg > 0x2ff) 629 return -EINVAL; 630 631 val = mt9m111_reg_read(client, reg->reg); 632 reg->size = 2; 633 reg->val = (u64)val; 634 635 if (reg->val > 0xffff) 636 return -EIO; 637 638 return 0; 639 } 640 641 static int mt9m111_s_register(struct v4l2_subdev *sd, 642 const struct v4l2_dbg_register *reg) 643 { 644 struct i2c_client *client = v4l2_get_subdevdata(sd); 645 646 if (reg->reg > 0x2ff) 647 return -EINVAL; 648 649 if (mt9m111_reg_write(client, reg->reg, reg->val) < 0) 650 return -EIO; 651 652 return 0; 653 } 654 #endif 655 656 static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask) 657 { 658 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 659 int ret; 660 661 if (flip) 662 ret = mt9m111_reg_set(client, mt9m111->ctx->read_mode, mask); 663 else 664 ret = mt9m111_reg_clear(client, mt9m111->ctx->read_mode, mask); 665 666 return ret; 667 } 668 669 static int mt9m111_get_global_gain(struct mt9m111 *mt9m111) 670 { 671 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 672 int data; 673 674 data = reg_read(GLOBAL_GAIN); 675 if (data >= 0) 676 return (data & 0x2f) * (1 << ((data >> 10) & 1)) * 677 (1 << ((data >> 9) & 1)); 678 return data; 679 } 680 681 static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain) 682 { 683 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 684 u16 val; 685 686 if (gain > 63 * 2 * 2) 687 return -EINVAL; 688 689 if ((gain >= 64 * 2) && (gain < 63 * 2 * 2)) 690 val = (1 << 10) | (1 << 9) | (gain / 4); 691 else if ((gain >= 64) && (gain < 64 * 2)) 692 val = (1 << 9) | (gain / 2); 693 else 694 val = gain; 695 696 return reg_write(GLOBAL_GAIN, val); 697 } 698 699 static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int val) 700 { 701 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 702 703 if (val == V4L2_EXPOSURE_AUTO) 704 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN); 705 return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN); 706 } 707 708 static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on) 709 { 710 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 711 712 if (on) 713 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN); 714 return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN); 715 } 716 717 static const char * const mt9m111_test_pattern_menu[] = { 718 "Disabled", 719 "Vertical monochrome gradient", 720 "Flat color type 1", 721 "Flat color type 2", 722 "Flat color type 3", 723 "Flat color type 4", 724 "Flat color type 5", 725 "Color bar", 726 }; 727 728 static int mt9m111_set_test_pattern(struct mt9m111 *mt9m111, int val) 729 { 730 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 731 732 return mt9m111_reg_mask(client, MT9M111_TPG_CTRL, val, 733 MT9M111_TPG_SEL_MASK); 734 } 735 736 static int mt9m111_set_colorfx(struct mt9m111 *mt9m111, int val) 737 { 738 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 739 static const struct v4l2_control colorfx[] = { 740 { V4L2_COLORFX_NONE, 0 }, 741 { V4L2_COLORFX_BW, 1 }, 742 { V4L2_COLORFX_SEPIA, 2 }, 743 { V4L2_COLORFX_NEGATIVE, 3 }, 744 { V4L2_COLORFX_SOLARIZATION, 4 }, 745 }; 746 int i; 747 748 for (i = 0; i < ARRAY_SIZE(colorfx); i++) { 749 if (colorfx[i].id == val) { 750 return mt9m111_reg_mask(client, MT9M111_EFFECTS_MODE, 751 colorfx[i].value, 752 MT9M111_EFFECTS_MODE_MASK); 753 } 754 } 755 756 return -EINVAL; 757 } 758 759 static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl) 760 { 761 struct mt9m111 *mt9m111 = container_of(ctrl->handler, 762 struct mt9m111, hdl); 763 764 switch (ctrl->id) { 765 case V4L2_CID_VFLIP: 766 return mt9m111_set_flip(mt9m111, ctrl->val, 767 MT9M111_RMB_MIRROR_ROWS); 768 case V4L2_CID_HFLIP: 769 return mt9m111_set_flip(mt9m111, ctrl->val, 770 MT9M111_RMB_MIRROR_COLS); 771 case V4L2_CID_GAIN: 772 return mt9m111_set_global_gain(mt9m111, ctrl->val); 773 case V4L2_CID_EXPOSURE_AUTO: 774 return mt9m111_set_autoexposure(mt9m111, ctrl->val); 775 case V4L2_CID_AUTO_WHITE_BALANCE: 776 return mt9m111_set_autowhitebalance(mt9m111, ctrl->val); 777 case V4L2_CID_TEST_PATTERN: 778 return mt9m111_set_test_pattern(mt9m111, ctrl->val); 779 case V4L2_CID_COLORFX: 780 return mt9m111_set_colorfx(mt9m111, ctrl->val); 781 } 782 783 return -EINVAL; 784 } 785 786 static int mt9m111_suspend(struct mt9m111 *mt9m111) 787 { 788 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 789 int ret; 790 791 v4l2_ctrl_s_ctrl(mt9m111->gain, mt9m111_get_global_gain(mt9m111)); 792 793 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); 794 if (!ret) 795 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC | 796 MT9M111_RESET_OUTPUT_DISABLE | 797 MT9M111_RESET_ANALOG_STANDBY); 798 if (!ret) 799 ret = reg_clear(RESET, MT9M111_RESET_CHIP_ENABLE); 800 801 return ret; 802 } 803 804 static void mt9m111_restore_state(struct mt9m111 *mt9m111) 805 { 806 mt9m111_set_context(mt9m111, mt9m111->ctx); 807 mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code); 808 mt9m111_setup_geometry(mt9m111, &mt9m111->rect, 809 mt9m111->width, mt9m111->height, mt9m111->fmt->code); 810 v4l2_ctrl_handler_setup(&mt9m111->hdl); 811 } 812 813 static int mt9m111_resume(struct mt9m111 *mt9m111) 814 { 815 int ret = mt9m111_enable(mt9m111); 816 if (!ret) 817 ret = mt9m111_reset(mt9m111); 818 if (!ret) 819 mt9m111_restore_state(mt9m111); 820 821 return ret; 822 } 823 824 static int mt9m111_init(struct mt9m111 *mt9m111) 825 { 826 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 827 int ret; 828 829 ret = mt9m111_enable(mt9m111); 830 if (!ret) 831 ret = mt9m111_reset(mt9m111); 832 if (!ret) 833 ret = mt9m111_set_context(mt9m111, mt9m111->ctx); 834 if (ret) 835 dev_err(&client->dev, "mt9m111 init failed: %d\n", ret); 836 return ret; 837 } 838 839 static int mt9m111_power_on(struct mt9m111 *mt9m111) 840 { 841 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 842 int ret; 843 844 ret = v4l2_clk_enable(mt9m111->clk); 845 if (ret < 0) 846 return ret; 847 848 ret = mt9m111_resume(mt9m111); 849 if (ret < 0) { 850 dev_err(&client->dev, "Failed to resume the sensor: %d\n", ret); 851 v4l2_clk_disable(mt9m111->clk); 852 } 853 854 return ret; 855 } 856 857 static void mt9m111_power_off(struct mt9m111 *mt9m111) 858 { 859 mt9m111_suspend(mt9m111); 860 v4l2_clk_disable(mt9m111->clk); 861 } 862 863 static int mt9m111_s_power(struct v4l2_subdev *sd, int on) 864 { 865 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 866 int ret = 0; 867 868 mutex_lock(&mt9m111->power_lock); 869 870 /* 871 * If the power count is modified from 0 to != 0 or from != 0 to 0, 872 * update the power state. 873 */ 874 if (mt9m111->power_count == !on) { 875 if (on) 876 ret = mt9m111_power_on(mt9m111); 877 else 878 mt9m111_power_off(mt9m111); 879 } 880 881 if (!ret) { 882 /* Update the power count. */ 883 mt9m111->power_count += on ? 1 : -1; 884 WARN_ON(mt9m111->power_count < 0); 885 } 886 887 mutex_unlock(&mt9m111->power_lock); 888 return ret; 889 } 890 891 static const struct v4l2_ctrl_ops mt9m111_ctrl_ops = { 892 .s_ctrl = mt9m111_s_ctrl, 893 }; 894 895 static const struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = { 896 .s_power = mt9m111_s_power, 897 .log_status = v4l2_ctrl_subdev_log_status, 898 .subscribe_event = v4l2_ctrl_subdev_subscribe_event, 899 .unsubscribe_event = v4l2_event_subdev_unsubscribe, 900 #ifdef CONFIG_VIDEO_ADV_DEBUG 901 .g_register = mt9m111_g_register, 902 .s_register = mt9m111_s_register, 903 #endif 904 }; 905 906 static int mt9m111_enum_mbus_code(struct v4l2_subdev *sd, 907 struct v4l2_subdev_pad_config *cfg, 908 struct v4l2_subdev_mbus_code_enum *code) 909 { 910 if (code->pad || code->index >= ARRAY_SIZE(mt9m111_colour_fmts)) 911 return -EINVAL; 912 913 code->code = mt9m111_colour_fmts[code->index].code; 914 return 0; 915 } 916 917 static int mt9m111_s_stream(struct v4l2_subdev *sd, int enable) 918 { 919 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 920 921 mt9m111->is_streaming = !!enable; 922 return 0; 923 } 924 925 static int mt9m111_g_mbus_config(struct v4l2_subdev *sd, 926 struct v4l2_mbus_config *cfg) 927 { 928 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING | 929 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH | 930 V4L2_MBUS_DATA_ACTIVE_HIGH; 931 cfg->type = V4L2_MBUS_PARALLEL; 932 933 return 0; 934 } 935 936 static const struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = { 937 .g_mbus_config = mt9m111_g_mbus_config, 938 .s_stream = mt9m111_s_stream, 939 }; 940 941 static const struct v4l2_subdev_pad_ops mt9m111_subdev_pad_ops = { 942 .enum_mbus_code = mt9m111_enum_mbus_code, 943 .get_selection = mt9m111_get_selection, 944 .set_selection = mt9m111_set_selection, 945 .get_fmt = mt9m111_get_fmt, 946 .set_fmt = mt9m111_set_fmt, 947 }; 948 949 static const struct v4l2_subdev_ops mt9m111_subdev_ops = { 950 .core = &mt9m111_subdev_core_ops, 951 .video = &mt9m111_subdev_video_ops, 952 .pad = &mt9m111_subdev_pad_ops, 953 }; 954 955 /* 956 * Interface active, can use i2c. If it fails, it can indeed mean, that 957 * this wasn't our capture interface, so, we wait for the right one 958 */ 959 static int mt9m111_video_probe(struct i2c_client *client) 960 { 961 struct mt9m111 *mt9m111 = to_mt9m111(client); 962 s32 data; 963 int ret; 964 965 ret = mt9m111_s_power(&mt9m111->subdev, 1); 966 if (ret < 0) 967 return ret; 968 969 data = reg_read(CHIP_VERSION); 970 971 switch (data) { 972 case 0x143a: /* MT9M111 or MT9M131 */ 973 dev_info(&client->dev, 974 "Detected a MT9M111/MT9M131 chip ID %x\n", data); 975 break; 976 case 0x148c: /* MT9M112 */ 977 dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data); 978 break; 979 default: 980 dev_err(&client->dev, 981 "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n", 982 data); 983 ret = -ENODEV; 984 goto done; 985 } 986 987 ret = mt9m111_init(mt9m111); 988 if (ret) 989 goto done; 990 991 ret = v4l2_ctrl_handler_setup(&mt9m111->hdl); 992 993 done: 994 mt9m111_s_power(&mt9m111->subdev, 0); 995 return ret; 996 } 997 998 static int mt9m111_probe(struct i2c_client *client, 999 const struct i2c_device_id *did) 1000 { 1001 struct mt9m111 *mt9m111; 1002 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 1003 int ret; 1004 1005 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { 1006 dev_warn(&adapter->dev, 1007 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); 1008 return -EIO; 1009 } 1010 1011 mt9m111 = devm_kzalloc(&client->dev, sizeof(struct mt9m111), GFP_KERNEL); 1012 if (!mt9m111) 1013 return -ENOMEM; 1014 1015 mt9m111->clk = v4l2_clk_get(&client->dev, "mclk"); 1016 if (IS_ERR(mt9m111->clk)) 1017 return PTR_ERR(mt9m111->clk); 1018 1019 /* Default HIGHPOWER context */ 1020 mt9m111->ctx = &context_b; 1021 1022 v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops); 1023 mt9m111->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | 1024 V4L2_SUBDEV_FL_HAS_EVENTS; 1025 1026 v4l2_ctrl_handler_init(&mt9m111->hdl, 7); 1027 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 1028 V4L2_CID_VFLIP, 0, 1, 1, 0); 1029 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 1030 V4L2_CID_HFLIP, 0, 1, 1, 0); 1031 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 1032 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1); 1033 mt9m111->gain = v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 1034 V4L2_CID_GAIN, 0, 63 * 2 * 2, 1, 32); 1035 v4l2_ctrl_new_std_menu(&mt9m111->hdl, 1036 &mt9m111_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0, 1037 V4L2_EXPOSURE_AUTO); 1038 v4l2_ctrl_new_std_menu_items(&mt9m111->hdl, 1039 &mt9m111_ctrl_ops, V4L2_CID_TEST_PATTERN, 1040 ARRAY_SIZE(mt9m111_test_pattern_menu) - 1, 0, 0, 1041 mt9m111_test_pattern_menu); 1042 v4l2_ctrl_new_std_menu(&mt9m111->hdl, &mt9m111_ctrl_ops, 1043 V4L2_CID_COLORFX, V4L2_COLORFX_SOLARIZATION, 1044 ~(BIT(V4L2_COLORFX_NONE) | 1045 BIT(V4L2_COLORFX_BW) | 1046 BIT(V4L2_COLORFX_SEPIA) | 1047 BIT(V4L2_COLORFX_NEGATIVE) | 1048 BIT(V4L2_COLORFX_SOLARIZATION)), 1049 V4L2_COLORFX_NONE); 1050 mt9m111->subdev.ctrl_handler = &mt9m111->hdl; 1051 if (mt9m111->hdl.error) { 1052 ret = mt9m111->hdl.error; 1053 goto out_clkput; 1054 } 1055 1056 #ifdef CONFIG_MEDIA_CONTROLLER 1057 mt9m111->pad.flags = MEDIA_PAD_FL_SOURCE; 1058 mt9m111->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1059 ret = media_entity_pads_init(&mt9m111->subdev.entity, 1, &mt9m111->pad); 1060 if (ret < 0) 1061 goto out_hdlfree; 1062 #endif 1063 1064 /* Second stage probe - when a capture adapter is there */ 1065 mt9m111->rect.left = MT9M111_MIN_DARK_COLS; 1066 mt9m111->rect.top = MT9M111_MIN_DARK_ROWS; 1067 mt9m111->rect.width = MT9M111_MAX_WIDTH; 1068 mt9m111->rect.height = MT9M111_MAX_HEIGHT; 1069 mt9m111->fmt = &mt9m111_colour_fmts[0]; 1070 mt9m111->lastpage = -1; 1071 mutex_init(&mt9m111->power_lock); 1072 1073 ret = mt9m111_video_probe(client); 1074 if (ret < 0) 1075 goto out_entityclean; 1076 1077 mt9m111->subdev.dev = &client->dev; 1078 ret = v4l2_async_register_subdev(&mt9m111->subdev); 1079 if (ret < 0) 1080 goto out_entityclean; 1081 1082 return 0; 1083 1084 out_entityclean: 1085 #ifdef CONFIG_MEDIA_CONTROLLER 1086 media_entity_cleanup(&mt9m111->subdev.entity); 1087 out_hdlfree: 1088 #endif 1089 v4l2_ctrl_handler_free(&mt9m111->hdl); 1090 out_clkput: 1091 v4l2_clk_put(mt9m111->clk); 1092 1093 return ret; 1094 } 1095 1096 static int mt9m111_remove(struct i2c_client *client) 1097 { 1098 struct mt9m111 *mt9m111 = to_mt9m111(client); 1099 1100 v4l2_async_unregister_subdev(&mt9m111->subdev); 1101 media_entity_cleanup(&mt9m111->subdev.entity); 1102 v4l2_clk_put(mt9m111->clk); 1103 v4l2_ctrl_handler_free(&mt9m111->hdl); 1104 1105 return 0; 1106 } 1107 static const struct of_device_id mt9m111_of_match[] = { 1108 { .compatible = "micron,mt9m111", }, 1109 {}, 1110 }; 1111 MODULE_DEVICE_TABLE(of, mt9m111_of_match); 1112 1113 static const struct i2c_device_id mt9m111_id[] = { 1114 { "mt9m111", 0 }, 1115 { } 1116 }; 1117 MODULE_DEVICE_TABLE(i2c, mt9m111_id); 1118 1119 static struct i2c_driver mt9m111_i2c_driver = { 1120 .driver = { 1121 .name = "mt9m111", 1122 .of_match_table = of_match_ptr(mt9m111_of_match), 1123 }, 1124 .probe = mt9m111_probe, 1125 .remove = mt9m111_remove, 1126 .id_table = mt9m111_id, 1127 }; 1128 1129 module_i2c_driver(mt9m111_i2c_driver); 1130 1131 MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver"); 1132 MODULE_AUTHOR("Robert Jarzmik"); 1133 MODULE_LICENSE("GPL"); 1134