1 /* 2 * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina 3 * 4 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 #include <linux/videodev2.h> 11 #include <linux/slab.h> 12 #include <linux/i2c.h> 13 #include <linux/log2.h> 14 #include <linux/gpio.h> 15 #include <linux/delay.h> 16 #include <linux/v4l2-mediabus.h> 17 #include <linux/module.h> 18 19 #include <media/v4l2-async.h> 20 #include <media/v4l2-clk.h> 21 #include <media/v4l2-common.h> 22 #include <media/v4l2-ctrls.h> 23 #include <media/v4l2-device.h> 24 25 /* 26 * MT9M111, MT9M112 and MT9M131: 27 * i2c address is 0x48 or 0x5d (depending on SADDR pin) 28 * The platform has to define struct i2c_board_info objects and link to them 29 * from struct soc_camera_host_desc 30 */ 31 32 /* 33 * Sensor core register addresses (0x000..0x0ff) 34 */ 35 #define MT9M111_CHIP_VERSION 0x000 36 #define MT9M111_ROW_START 0x001 37 #define MT9M111_COLUMN_START 0x002 38 #define MT9M111_WINDOW_HEIGHT 0x003 39 #define MT9M111_WINDOW_WIDTH 0x004 40 #define MT9M111_HORIZONTAL_BLANKING_B 0x005 41 #define MT9M111_VERTICAL_BLANKING_B 0x006 42 #define MT9M111_HORIZONTAL_BLANKING_A 0x007 43 #define MT9M111_VERTICAL_BLANKING_A 0x008 44 #define MT9M111_SHUTTER_WIDTH 0x009 45 #define MT9M111_ROW_SPEED 0x00a 46 #define MT9M111_EXTRA_DELAY 0x00b 47 #define MT9M111_SHUTTER_DELAY 0x00c 48 #define MT9M111_RESET 0x00d 49 #define MT9M111_READ_MODE_B 0x020 50 #define MT9M111_READ_MODE_A 0x021 51 #define MT9M111_FLASH_CONTROL 0x023 52 #define MT9M111_GREEN1_GAIN 0x02b 53 #define MT9M111_BLUE_GAIN 0x02c 54 #define MT9M111_RED_GAIN 0x02d 55 #define MT9M111_GREEN2_GAIN 0x02e 56 #define MT9M111_GLOBAL_GAIN 0x02f 57 #define MT9M111_CONTEXT_CONTROL 0x0c8 58 #define MT9M111_PAGE_MAP 0x0f0 59 #define MT9M111_BYTE_WISE_ADDR 0x0f1 60 61 #define MT9M111_RESET_SYNC_CHANGES (1 << 15) 62 #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9) 63 #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8) 64 #define MT9M111_RESET_RESET_SOC (1 << 5) 65 #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4) 66 #define MT9M111_RESET_CHIP_ENABLE (1 << 3) 67 #define MT9M111_RESET_ANALOG_STANDBY (1 << 2) 68 #define MT9M111_RESET_RESTART_FRAME (1 << 1) 69 #define MT9M111_RESET_RESET_MODE (1 << 0) 70 71 #define MT9M111_RM_FULL_POWER_RD (0 << 10) 72 #define MT9M111_RM_LOW_POWER_RD (1 << 10) 73 #define MT9M111_RM_COL_SKIP_4X (1 << 5) 74 #define MT9M111_RM_ROW_SKIP_4X (1 << 4) 75 #define MT9M111_RM_COL_SKIP_2X (1 << 3) 76 #define MT9M111_RM_ROW_SKIP_2X (1 << 2) 77 #define MT9M111_RMB_MIRROR_COLS (1 << 1) 78 #define MT9M111_RMB_MIRROR_ROWS (1 << 0) 79 #define MT9M111_CTXT_CTRL_RESTART (1 << 15) 80 #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12) 81 #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10) 82 #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9) 83 #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8) 84 #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7) 85 #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3) 86 #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2) 87 #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1) 88 #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0) 89 90 /* 91 * Colorpipe register addresses (0x100..0x1ff) 92 */ 93 #define MT9M111_OPER_MODE_CTRL 0x106 94 #define MT9M111_OUTPUT_FORMAT_CTRL 0x108 95 #define MT9M111_REDUCER_XZOOM_B 0x1a0 96 #define MT9M111_REDUCER_XSIZE_B 0x1a1 97 #define MT9M111_REDUCER_YZOOM_B 0x1a3 98 #define MT9M111_REDUCER_YSIZE_B 0x1a4 99 #define MT9M111_REDUCER_XZOOM_A 0x1a6 100 #define MT9M111_REDUCER_XSIZE_A 0x1a7 101 #define MT9M111_REDUCER_YZOOM_A 0x1a9 102 #define MT9M111_REDUCER_YSIZE_A 0x1aa 103 104 #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a 105 #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b 106 107 #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14) 108 #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1) 109 #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9) 110 #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8) 111 #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14) 112 #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10) 113 #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9) 114 #define MT9M111_OUTFMT_RGB (1 << 8) 115 #define MT9M111_OUTFMT_RGB565 (0 << 6) 116 #define MT9M111_OUTFMT_RGB555 (1 << 6) 117 #define MT9M111_OUTFMT_RGB444x (2 << 6) 118 #define MT9M111_OUTFMT_RGBx444 (3 << 6) 119 #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4) 120 #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4) 121 #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4) 122 #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4) 123 #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3) 124 #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2) 125 #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1) 126 #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0) 127 128 /* 129 * Camera control register addresses (0x200..0x2ff not implemented) 130 */ 131 132 #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg) 133 #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val)) 134 #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val)) 135 #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val)) 136 #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \ 137 (val), (mask)) 138 139 #define MT9M111_MIN_DARK_ROWS 8 140 #define MT9M111_MIN_DARK_COLS 26 141 #define MT9M111_MAX_HEIGHT 1024 142 #define MT9M111_MAX_WIDTH 1280 143 144 struct mt9m111_context { 145 u16 read_mode; 146 u16 blanking_h; 147 u16 blanking_v; 148 u16 reducer_xzoom; 149 u16 reducer_yzoom; 150 u16 reducer_xsize; 151 u16 reducer_ysize; 152 u16 output_fmt_ctrl2; 153 u16 control; 154 }; 155 156 static struct mt9m111_context context_a = { 157 .read_mode = MT9M111_READ_MODE_A, 158 .blanking_h = MT9M111_HORIZONTAL_BLANKING_A, 159 .blanking_v = MT9M111_VERTICAL_BLANKING_A, 160 .reducer_xzoom = MT9M111_REDUCER_XZOOM_A, 161 .reducer_yzoom = MT9M111_REDUCER_YZOOM_A, 162 .reducer_xsize = MT9M111_REDUCER_XSIZE_A, 163 .reducer_ysize = MT9M111_REDUCER_YSIZE_A, 164 .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_A, 165 .control = MT9M111_CTXT_CTRL_RESTART, 166 }; 167 168 static struct mt9m111_context context_b = { 169 .read_mode = MT9M111_READ_MODE_B, 170 .blanking_h = MT9M111_HORIZONTAL_BLANKING_B, 171 .blanking_v = MT9M111_VERTICAL_BLANKING_B, 172 .reducer_xzoom = MT9M111_REDUCER_XZOOM_B, 173 .reducer_yzoom = MT9M111_REDUCER_YZOOM_B, 174 .reducer_xsize = MT9M111_REDUCER_XSIZE_B, 175 .reducer_ysize = MT9M111_REDUCER_YSIZE_B, 176 .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_B, 177 .control = MT9M111_CTXT_CTRL_RESTART | 178 MT9M111_CTXT_CTRL_DEFECTCOR_B | MT9M111_CTXT_CTRL_RESIZE_B | 179 MT9M111_CTXT_CTRL_CTRL2_B | MT9M111_CTXT_CTRL_GAMMA_B | 180 MT9M111_CTXT_CTRL_READ_MODE_B | MT9M111_CTXT_CTRL_VBLANK_SEL_B | 181 MT9M111_CTXT_CTRL_HBLANK_SEL_B, 182 }; 183 184 /* MT9M111 has only one fixed colorspace per pixelcode */ 185 struct mt9m111_datafmt { 186 u32 code; 187 enum v4l2_colorspace colorspace; 188 }; 189 190 static const struct mt9m111_datafmt mt9m111_colour_fmts[] = { 191 {MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB}, 192 {MEDIA_BUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_SRGB}, 193 {MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB}, 194 {MEDIA_BUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_SRGB}, 195 {MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, 196 {MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB}, 197 {MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB}, 198 {MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB}, 199 {MEDIA_BUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB}, 200 {MEDIA_BUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB}, 201 {MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB}, 202 {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, 203 }; 204 205 struct mt9m111 { 206 struct v4l2_subdev subdev; 207 struct v4l2_ctrl_handler hdl; 208 struct v4l2_ctrl *gain; 209 struct mt9m111_context *ctx; 210 struct v4l2_rect rect; /* cropping rectangle */ 211 struct v4l2_clk *clk; 212 unsigned int width; /* output */ 213 unsigned int height; /* sizes */ 214 struct mutex power_lock; /* lock to protect power_count */ 215 int power_count; 216 const struct mt9m111_datafmt *fmt; 217 int lastpage; /* PageMap cache value */ 218 }; 219 220 /* Find a data format by a pixel code */ 221 static const struct mt9m111_datafmt *mt9m111_find_datafmt(struct mt9m111 *mt9m111, 222 u32 code) 223 { 224 int i; 225 for (i = 0; i < ARRAY_SIZE(mt9m111_colour_fmts); i++) 226 if (mt9m111_colour_fmts[i].code == code) 227 return mt9m111_colour_fmts + i; 228 229 return mt9m111->fmt; 230 } 231 232 static struct mt9m111 *to_mt9m111(const struct i2c_client *client) 233 { 234 return container_of(i2c_get_clientdata(client), struct mt9m111, subdev); 235 } 236 237 static int reg_page_map_set(struct i2c_client *client, const u16 reg) 238 { 239 int ret; 240 u16 page; 241 struct mt9m111 *mt9m111 = to_mt9m111(client); 242 243 page = (reg >> 8); 244 if (page == mt9m111->lastpage) 245 return 0; 246 if (page > 2) 247 return -EINVAL; 248 249 ret = i2c_smbus_write_word_swapped(client, MT9M111_PAGE_MAP, page); 250 if (!ret) 251 mt9m111->lastpage = page; 252 return ret; 253 } 254 255 static int mt9m111_reg_read(struct i2c_client *client, const u16 reg) 256 { 257 int ret; 258 259 ret = reg_page_map_set(client, reg); 260 if (!ret) 261 ret = i2c_smbus_read_word_swapped(client, reg & 0xff); 262 263 dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret); 264 return ret; 265 } 266 267 static int mt9m111_reg_write(struct i2c_client *client, const u16 reg, 268 const u16 data) 269 { 270 int ret; 271 272 ret = reg_page_map_set(client, reg); 273 if (!ret) 274 ret = i2c_smbus_write_word_swapped(client, reg & 0xff, data); 275 dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret); 276 return ret; 277 } 278 279 static int mt9m111_reg_set(struct i2c_client *client, const u16 reg, 280 const u16 data) 281 { 282 int ret; 283 284 ret = mt9m111_reg_read(client, reg); 285 if (ret >= 0) 286 ret = mt9m111_reg_write(client, reg, ret | data); 287 return ret; 288 } 289 290 static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg, 291 const u16 data) 292 { 293 int ret; 294 295 ret = mt9m111_reg_read(client, reg); 296 if (ret >= 0) 297 ret = mt9m111_reg_write(client, reg, ret & ~data); 298 return ret; 299 } 300 301 static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg, 302 const u16 data, const u16 mask) 303 { 304 int ret; 305 306 ret = mt9m111_reg_read(client, reg); 307 if (ret >= 0) 308 ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data); 309 return ret; 310 } 311 312 static int mt9m111_set_context(struct mt9m111 *mt9m111, 313 struct mt9m111_context *ctx) 314 { 315 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 316 return reg_write(CONTEXT_CONTROL, ctx->control); 317 } 318 319 static int mt9m111_setup_rect_ctx(struct mt9m111 *mt9m111, 320 struct mt9m111_context *ctx, struct v4l2_rect *rect, 321 unsigned int width, unsigned int height) 322 { 323 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 324 int ret = mt9m111_reg_write(client, ctx->reducer_xzoom, rect->width); 325 if (!ret) 326 ret = mt9m111_reg_write(client, ctx->reducer_yzoom, rect->height); 327 if (!ret) 328 ret = mt9m111_reg_write(client, ctx->reducer_xsize, width); 329 if (!ret) 330 ret = mt9m111_reg_write(client, ctx->reducer_ysize, height); 331 return ret; 332 } 333 334 static int mt9m111_setup_geometry(struct mt9m111 *mt9m111, struct v4l2_rect *rect, 335 int width, int height, u32 code) 336 { 337 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 338 int ret; 339 340 ret = reg_write(COLUMN_START, rect->left); 341 if (!ret) 342 ret = reg_write(ROW_START, rect->top); 343 344 if (!ret) 345 ret = reg_write(WINDOW_WIDTH, rect->width); 346 if (!ret) 347 ret = reg_write(WINDOW_HEIGHT, rect->height); 348 349 if (code != MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) { 350 /* IFP in use, down-scaling possible */ 351 if (!ret) 352 ret = mt9m111_setup_rect_ctx(mt9m111, &context_b, 353 rect, width, height); 354 if (!ret) 355 ret = mt9m111_setup_rect_ctx(mt9m111, &context_a, 356 rect, width, height); 357 } 358 359 dev_dbg(&client->dev, "%s(%x): %ux%u@%u:%u -> %ux%u = %d\n", 360 __func__, code, rect->width, rect->height, rect->left, rect->top, 361 width, height, ret); 362 363 return ret; 364 } 365 366 static int mt9m111_enable(struct mt9m111 *mt9m111) 367 { 368 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 369 return reg_write(RESET, MT9M111_RESET_CHIP_ENABLE); 370 } 371 372 static int mt9m111_reset(struct mt9m111 *mt9m111) 373 { 374 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 375 int ret; 376 377 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); 378 if (!ret) 379 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC); 380 if (!ret) 381 ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE 382 | MT9M111_RESET_RESET_SOC); 383 384 return ret; 385 } 386 387 static int mt9m111_set_selection(struct v4l2_subdev *sd, 388 struct v4l2_subdev_pad_config *cfg, 389 struct v4l2_subdev_selection *sel) 390 { 391 struct i2c_client *client = v4l2_get_subdevdata(sd); 392 struct mt9m111 *mt9m111 = to_mt9m111(client); 393 struct v4l2_rect rect = sel->r; 394 int width, height; 395 int ret, align = 0; 396 397 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE || 398 sel->target != V4L2_SEL_TGT_CROP) 399 return -EINVAL; 400 401 if (mt9m111->fmt->code == MEDIA_BUS_FMT_SBGGR8_1X8 || 402 mt9m111->fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) { 403 /* Bayer format - even size lengths */ 404 align = 1; 405 /* Let the user play with the starting pixel */ 406 } 407 408 /* FIXME: the datasheet doesn't specify minimum sizes */ 409 v4l_bound_align_image(&rect.width, 2, MT9M111_MAX_WIDTH, align, 410 &rect.height, 2, MT9M111_MAX_HEIGHT, align, 0); 411 rect.left = clamp(rect.left, MT9M111_MIN_DARK_COLS, 412 MT9M111_MIN_DARK_COLS + MT9M111_MAX_WIDTH - 413 (__s32)rect.width); 414 rect.top = clamp(rect.top, MT9M111_MIN_DARK_ROWS, 415 MT9M111_MIN_DARK_ROWS + MT9M111_MAX_HEIGHT - 416 (__s32)rect.height); 417 418 width = min(mt9m111->width, rect.width); 419 height = min(mt9m111->height, rect.height); 420 421 ret = mt9m111_setup_geometry(mt9m111, &rect, width, height, mt9m111->fmt->code); 422 if (!ret) { 423 mt9m111->rect = rect; 424 mt9m111->width = width; 425 mt9m111->height = height; 426 } 427 428 return ret; 429 } 430 431 static int mt9m111_get_selection(struct v4l2_subdev *sd, 432 struct v4l2_subdev_pad_config *cfg, 433 struct v4l2_subdev_selection *sel) 434 { 435 struct i2c_client *client = v4l2_get_subdevdata(sd); 436 struct mt9m111 *mt9m111 = to_mt9m111(client); 437 438 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) 439 return -EINVAL; 440 441 switch (sel->target) { 442 case V4L2_SEL_TGT_CROP_BOUNDS: 443 case V4L2_SEL_TGT_CROP_DEFAULT: 444 sel->r.left = MT9M111_MIN_DARK_COLS; 445 sel->r.top = MT9M111_MIN_DARK_ROWS; 446 sel->r.width = MT9M111_MAX_WIDTH; 447 sel->r.height = MT9M111_MAX_HEIGHT; 448 return 0; 449 case V4L2_SEL_TGT_CROP: 450 sel->r = mt9m111->rect; 451 return 0; 452 default: 453 return -EINVAL; 454 } 455 } 456 457 static int mt9m111_get_fmt(struct v4l2_subdev *sd, 458 struct v4l2_subdev_pad_config *cfg, 459 struct v4l2_subdev_format *format) 460 { 461 struct v4l2_mbus_framefmt *mf = &format->format; 462 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 463 464 if (format->pad) 465 return -EINVAL; 466 467 mf->width = mt9m111->width; 468 mf->height = mt9m111->height; 469 mf->code = mt9m111->fmt->code; 470 mf->colorspace = mt9m111->fmt->colorspace; 471 mf->field = V4L2_FIELD_NONE; 472 473 return 0; 474 } 475 476 static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111, 477 u32 code) 478 { 479 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 480 u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER | 481 MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB | 482 MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 | 483 MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 | 484 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | 485 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 486 int ret; 487 488 switch (code) { 489 case MEDIA_BUS_FMT_SBGGR8_1X8: 490 data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER | 491 MT9M111_OUTFMT_RGB; 492 break; 493 case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE: 494 data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB; 495 break; 496 case MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE: 497 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 | 498 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; 499 break; 500 case MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE: 501 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555; 502 break; 503 case MEDIA_BUS_FMT_RGB565_2X8_LE: 504 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | 505 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; 506 break; 507 case MEDIA_BUS_FMT_RGB565_2X8_BE: 508 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565; 509 break; 510 case MEDIA_BUS_FMT_BGR565_2X8_BE: 511 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | 512 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 513 break; 514 case MEDIA_BUS_FMT_BGR565_2X8_LE: 515 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | 516 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | 517 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 518 break; 519 case MEDIA_BUS_FMT_UYVY8_2X8: 520 data_outfmt2 = 0; 521 break; 522 case MEDIA_BUS_FMT_VYUY8_2X8: 523 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 524 break; 525 case MEDIA_BUS_FMT_YUYV8_2X8: 526 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; 527 break; 528 case MEDIA_BUS_FMT_YVYU8_2X8: 529 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | 530 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 531 break; 532 default: 533 dev_err(&client->dev, "Pixel format not handled: %x\n", code); 534 return -EINVAL; 535 } 536 537 ret = mt9m111_reg_mask(client, context_a.output_fmt_ctrl2, 538 data_outfmt2, mask_outfmt2); 539 if (!ret) 540 ret = mt9m111_reg_mask(client, context_b.output_fmt_ctrl2, 541 data_outfmt2, mask_outfmt2); 542 543 return ret; 544 } 545 546 static int mt9m111_set_fmt(struct v4l2_subdev *sd, 547 struct v4l2_subdev_pad_config *cfg, 548 struct v4l2_subdev_format *format) 549 { 550 struct v4l2_mbus_framefmt *mf = &format->format; 551 struct i2c_client *client = v4l2_get_subdevdata(sd); 552 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 553 const struct mt9m111_datafmt *fmt; 554 struct v4l2_rect *rect = &mt9m111->rect; 555 bool bayer; 556 int ret; 557 558 if (format->pad) 559 return -EINVAL; 560 561 fmt = mt9m111_find_datafmt(mt9m111, mf->code); 562 563 bayer = fmt->code == MEDIA_BUS_FMT_SBGGR8_1X8 || 564 fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE; 565 566 /* 567 * With Bayer format enforce even side lengths, but let the user play 568 * with the starting pixel 569 */ 570 if (bayer) { 571 rect->width = ALIGN(rect->width, 2); 572 rect->height = ALIGN(rect->height, 2); 573 } 574 575 if (fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) { 576 /* IFP bypass mode, no scaling */ 577 mf->width = rect->width; 578 mf->height = rect->height; 579 } else { 580 /* No upscaling */ 581 if (mf->width > rect->width) 582 mf->width = rect->width; 583 if (mf->height > rect->height) 584 mf->height = rect->height; 585 } 586 587 dev_dbg(&client->dev, "%s(): %ux%u, code=%x\n", __func__, 588 mf->width, mf->height, fmt->code); 589 590 mf->code = fmt->code; 591 mf->colorspace = fmt->colorspace; 592 593 if (format->which == V4L2_SUBDEV_FORMAT_TRY) { 594 cfg->try_fmt = *mf; 595 return 0; 596 } 597 598 ret = mt9m111_setup_geometry(mt9m111, rect, mf->width, mf->height, mf->code); 599 if (!ret) 600 ret = mt9m111_set_pixfmt(mt9m111, mf->code); 601 if (!ret) { 602 mt9m111->width = mf->width; 603 mt9m111->height = mf->height; 604 mt9m111->fmt = fmt; 605 } 606 607 return ret; 608 } 609 610 #ifdef CONFIG_VIDEO_ADV_DEBUG 611 static int mt9m111_g_register(struct v4l2_subdev *sd, 612 struct v4l2_dbg_register *reg) 613 { 614 struct i2c_client *client = v4l2_get_subdevdata(sd); 615 int val; 616 617 if (reg->reg > 0x2ff) 618 return -EINVAL; 619 620 val = mt9m111_reg_read(client, reg->reg); 621 reg->size = 2; 622 reg->val = (u64)val; 623 624 if (reg->val > 0xffff) 625 return -EIO; 626 627 return 0; 628 } 629 630 static int mt9m111_s_register(struct v4l2_subdev *sd, 631 const struct v4l2_dbg_register *reg) 632 { 633 struct i2c_client *client = v4l2_get_subdevdata(sd); 634 635 if (reg->reg > 0x2ff) 636 return -EINVAL; 637 638 if (mt9m111_reg_write(client, reg->reg, reg->val) < 0) 639 return -EIO; 640 641 return 0; 642 } 643 #endif 644 645 static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask) 646 { 647 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 648 int ret; 649 650 if (flip) 651 ret = mt9m111_reg_set(client, mt9m111->ctx->read_mode, mask); 652 else 653 ret = mt9m111_reg_clear(client, mt9m111->ctx->read_mode, mask); 654 655 return ret; 656 } 657 658 static int mt9m111_get_global_gain(struct mt9m111 *mt9m111) 659 { 660 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 661 int data; 662 663 data = reg_read(GLOBAL_GAIN); 664 if (data >= 0) 665 return (data & 0x2f) * (1 << ((data >> 10) & 1)) * 666 (1 << ((data >> 9) & 1)); 667 return data; 668 } 669 670 static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain) 671 { 672 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 673 u16 val; 674 675 if (gain > 63 * 2 * 2) 676 return -EINVAL; 677 678 if ((gain >= 64 * 2) && (gain < 63 * 2 * 2)) 679 val = (1 << 10) | (1 << 9) | (gain / 4); 680 else if ((gain >= 64) && (gain < 64 * 2)) 681 val = (1 << 9) | (gain / 2); 682 else 683 val = gain; 684 685 return reg_write(GLOBAL_GAIN, val); 686 } 687 688 static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int val) 689 { 690 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 691 692 if (val == V4L2_EXPOSURE_AUTO) 693 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN); 694 return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN); 695 } 696 697 static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on) 698 { 699 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 700 701 if (on) 702 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN); 703 return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN); 704 } 705 706 static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl) 707 { 708 struct mt9m111 *mt9m111 = container_of(ctrl->handler, 709 struct mt9m111, hdl); 710 711 switch (ctrl->id) { 712 case V4L2_CID_VFLIP: 713 return mt9m111_set_flip(mt9m111, ctrl->val, 714 MT9M111_RMB_MIRROR_ROWS); 715 case V4L2_CID_HFLIP: 716 return mt9m111_set_flip(mt9m111, ctrl->val, 717 MT9M111_RMB_MIRROR_COLS); 718 case V4L2_CID_GAIN: 719 return mt9m111_set_global_gain(mt9m111, ctrl->val); 720 case V4L2_CID_EXPOSURE_AUTO: 721 return mt9m111_set_autoexposure(mt9m111, ctrl->val); 722 case V4L2_CID_AUTO_WHITE_BALANCE: 723 return mt9m111_set_autowhitebalance(mt9m111, ctrl->val); 724 } 725 726 return -EINVAL; 727 } 728 729 static int mt9m111_suspend(struct mt9m111 *mt9m111) 730 { 731 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 732 int ret; 733 734 v4l2_ctrl_s_ctrl(mt9m111->gain, mt9m111_get_global_gain(mt9m111)); 735 736 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); 737 if (!ret) 738 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC | 739 MT9M111_RESET_OUTPUT_DISABLE | 740 MT9M111_RESET_ANALOG_STANDBY); 741 if (!ret) 742 ret = reg_clear(RESET, MT9M111_RESET_CHIP_ENABLE); 743 744 return ret; 745 } 746 747 static void mt9m111_restore_state(struct mt9m111 *mt9m111) 748 { 749 mt9m111_set_context(mt9m111, mt9m111->ctx); 750 mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code); 751 mt9m111_setup_geometry(mt9m111, &mt9m111->rect, 752 mt9m111->width, mt9m111->height, mt9m111->fmt->code); 753 v4l2_ctrl_handler_setup(&mt9m111->hdl); 754 } 755 756 static int mt9m111_resume(struct mt9m111 *mt9m111) 757 { 758 int ret = mt9m111_enable(mt9m111); 759 if (!ret) 760 ret = mt9m111_reset(mt9m111); 761 if (!ret) 762 mt9m111_restore_state(mt9m111); 763 764 return ret; 765 } 766 767 static int mt9m111_init(struct mt9m111 *mt9m111) 768 { 769 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 770 int ret; 771 772 ret = mt9m111_enable(mt9m111); 773 if (!ret) 774 ret = mt9m111_reset(mt9m111); 775 if (!ret) 776 ret = mt9m111_set_context(mt9m111, mt9m111->ctx); 777 if (ret) 778 dev_err(&client->dev, "mt9m111 init failed: %d\n", ret); 779 return ret; 780 } 781 782 static int mt9m111_power_on(struct mt9m111 *mt9m111) 783 { 784 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 785 int ret; 786 787 ret = v4l2_clk_enable(mt9m111->clk); 788 if (ret < 0) 789 return ret; 790 791 ret = mt9m111_resume(mt9m111); 792 if (ret < 0) { 793 dev_err(&client->dev, "Failed to resume the sensor: %d\n", ret); 794 v4l2_clk_disable(mt9m111->clk); 795 } 796 797 return ret; 798 } 799 800 static void mt9m111_power_off(struct mt9m111 *mt9m111) 801 { 802 mt9m111_suspend(mt9m111); 803 v4l2_clk_disable(mt9m111->clk); 804 } 805 806 static int mt9m111_s_power(struct v4l2_subdev *sd, int on) 807 { 808 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 809 int ret = 0; 810 811 mutex_lock(&mt9m111->power_lock); 812 813 /* 814 * If the power count is modified from 0 to != 0 or from != 0 to 0, 815 * update the power state. 816 */ 817 if (mt9m111->power_count == !on) { 818 if (on) 819 ret = mt9m111_power_on(mt9m111); 820 else 821 mt9m111_power_off(mt9m111); 822 } 823 824 if (!ret) { 825 /* Update the power count. */ 826 mt9m111->power_count += on ? 1 : -1; 827 WARN_ON(mt9m111->power_count < 0); 828 } 829 830 mutex_unlock(&mt9m111->power_lock); 831 return ret; 832 } 833 834 static const struct v4l2_ctrl_ops mt9m111_ctrl_ops = { 835 .s_ctrl = mt9m111_s_ctrl, 836 }; 837 838 static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = { 839 .s_power = mt9m111_s_power, 840 #ifdef CONFIG_VIDEO_ADV_DEBUG 841 .g_register = mt9m111_g_register, 842 .s_register = mt9m111_s_register, 843 #endif 844 }; 845 846 static int mt9m111_enum_mbus_code(struct v4l2_subdev *sd, 847 struct v4l2_subdev_pad_config *cfg, 848 struct v4l2_subdev_mbus_code_enum *code) 849 { 850 if (code->pad || code->index >= ARRAY_SIZE(mt9m111_colour_fmts)) 851 return -EINVAL; 852 853 code->code = mt9m111_colour_fmts[code->index].code; 854 return 0; 855 } 856 857 static int mt9m111_g_mbus_config(struct v4l2_subdev *sd, 858 struct v4l2_mbus_config *cfg) 859 { 860 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING | 861 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH | 862 V4L2_MBUS_DATA_ACTIVE_HIGH; 863 cfg->type = V4L2_MBUS_PARALLEL; 864 865 return 0; 866 } 867 868 static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = { 869 .g_mbus_config = mt9m111_g_mbus_config, 870 }; 871 872 static const struct v4l2_subdev_pad_ops mt9m111_subdev_pad_ops = { 873 .enum_mbus_code = mt9m111_enum_mbus_code, 874 .get_selection = mt9m111_get_selection, 875 .set_selection = mt9m111_set_selection, 876 .get_fmt = mt9m111_get_fmt, 877 .set_fmt = mt9m111_set_fmt, 878 }; 879 880 static struct v4l2_subdev_ops mt9m111_subdev_ops = { 881 .core = &mt9m111_subdev_core_ops, 882 .video = &mt9m111_subdev_video_ops, 883 .pad = &mt9m111_subdev_pad_ops, 884 }; 885 886 /* 887 * Interface active, can use i2c. If it fails, it can indeed mean, that 888 * this wasn't our capture interface, so, we wait for the right one 889 */ 890 static int mt9m111_video_probe(struct i2c_client *client) 891 { 892 struct mt9m111 *mt9m111 = to_mt9m111(client); 893 s32 data; 894 int ret; 895 896 ret = mt9m111_s_power(&mt9m111->subdev, 1); 897 if (ret < 0) 898 return ret; 899 900 data = reg_read(CHIP_VERSION); 901 902 switch (data) { 903 case 0x143a: /* MT9M111 or MT9M131 */ 904 dev_info(&client->dev, 905 "Detected a MT9M111/MT9M131 chip ID %x\n", data); 906 break; 907 case 0x148c: /* MT9M112 */ 908 dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data); 909 break; 910 default: 911 dev_err(&client->dev, 912 "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n", 913 data); 914 ret = -ENODEV; 915 goto done; 916 } 917 918 ret = mt9m111_init(mt9m111); 919 if (ret) 920 goto done; 921 922 ret = v4l2_ctrl_handler_setup(&mt9m111->hdl); 923 924 done: 925 mt9m111_s_power(&mt9m111->subdev, 0); 926 return ret; 927 } 928 929 static int mt9m111_probe(struct i2c_client *client, 930 const struct i2c_device_id *did) 931 { 932 struct mt9m111 *mt9m111; 933 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 934 int ret; 935 936 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { 937 dev_warn(&adapter->dev, 938 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); 939 return -EIO; 940 } 941 942 mt9m111 = devm_kzalloc(&client->dev, sizeof(struct mt9m111), GFP_KERNEL); 943 if (!mt9m111) 944 return -ENOMEM; 945 946 mt9m111->clk = v4l2_clk_get(&client->dev, "mclk"); 947 if (IS_ERR(mt9m111->clk)) 948 return -EPROBE_DEFER; 949 950 /* Default HIGHPOWER context */ 951 mt9m111->ctx = &context_b; 952 953 v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops); 954 v4l2_ctrl_handler_init(&mt9m111->hdl, 5); 955 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 956 V4L2_CID_VFLIP, 0, 1, 1, 0); 957 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 958 V4L2_CID_HFLIP, 0, 1, 1, 0); 959 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 960 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1); 961 mt9m111->gain = v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 962 V4L2_CID_GAIN, 0, 63 * 2 * 2, 1, 32); 963 v4l2_ctrl_new_std_menu(&mt9m111->hdl, 964 &mt9m111_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0, 965 V4L2_EXPOSURE_AUTO); 966 mt9m111->subdev.ctrl_handler = &mt9m111->hdl; 967 if (mt9m111->hdl.error) { 968 ret = mt9m111->hdl.error; 969 goto out_clkput; 970 } 971 972 /* Second stage probe - when a capture adapter is there */ 973 mt9m111->rect.left = MT9M111_MIN_DARK_COLS; 974 mt9m111->rect.top = MT9M111_MIN_DARK_ROWS; 975 mt9m111->rect.width = MT9M111_MAX_WIDTH; 976 mt9m111->rect.height = MT9M111_MAX_HEIGHT; 977 mt9m111->fmt = &mt9m111_colour_fmts[0]; 978 mt9m111->lastpage = -1; 979 mutex_init(&mt9m111->power_lock); 980 981 ret = mt9m111_video_probe(client); 982 if (ret < 0) 983 goto out_hdlfree; 984 985 mt9m111->subdev.dev = &client->dev; 986 ret = v4l2_async_register_subdev(&mt9m111->subdev); 987 if (ret < 0) 988 goto out_hdlfree; 989 990 return 0; 991 992 out_hdlfree: 993 v4l2_ctrl_handler_free(&mt9m111->hdl); 994 out_clkput: 995 v4l2_clk_put(mt9m111->clk); 996 997 return ret; 998 } 999 1000 static int mt9m111_remove(struct i2c_client *client) 1001 { 1002 struct mt9m111 *mt9m111 = to_mt9m111(client); 1003 1004 v4l2_async_unregister_subdev(&mt9m111->subdev); 1005 v4l2_clk_put(mt9m111->clk); 1006 v4l2_ctrl_handler_free(&mt9m111->hdl); 1007 1008 return 0; 1009 } 1010 static const struct of_device_id mt9m111_of_match[] = { 1011 { .compatible = "micron,mt9m111", }, 1012 {}, 1013 }; 1014 MODULE_DEVICE_TABLE(of, mt9m111_of_match); 1015 1016 static const struct i2c_device_id mt9m111_id[] = { 1017 { "mt9m111", 0 }, 1018 { } 1019 }; 1020 MODULE_DEVICE_TABLE(i2c, mt9m111_id); 1021 1022 static struct i2c_driver mt9m111_i2c_driver = { 1023 .driver = { 1024 .name = "mt9m111", 1025 .of_match_table = of_match_ptr(mt9m111_of_match), 1026 }, 1027 .probe = mt9m111_probe, 1028 .remove = mt9m111_remove, 1029 .id_table = mt9m111_id, 1030 }; 1031 1032 module_i2c_driver(mt9m111_i2c_driver); 1033 1034 MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver"); 1035 MODULE_AUTHOR("Robert Jarzmik"); 1036 MODULE_LICENSE("GPL"); 1037