1 /* 2 * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina 3 * 4 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 #include <linux/videodev2.h> 11 #include <linux/slab.h> 12 #include <linux/i2c.h> 13 #include <linux/log2.h> 14 #include <linux/gpio.h> 15 #include <linux/delay.h> 16 #include <linux/v4l2-mediabus.h> 17 #include <linux/module.h> 18 19 #include <media/v4l2-async.h> 20 #include <media/v4l2-clk.h> 21 #include <media/v4l2-common.h> 22 #include <media/v4l2-ctrls.h> 23 #include <media/v4l2-device.h> 24 25 /* 26 * MT9M111, MT9M112 and MT9M131: 27 * i2c address is 0x48 or 0x5d (depending on SADDR pin) 28 * The platform has to define struct i2c_board_info objects and link to them 29 * from struct soc_camera_host_desc 30 */ 31 32 /* 33 * Sensor core register addresses (0x000..0x0ff) 34 */ 35 #define MT9M111_CHIP_VERSION 0x000 36 #define MT9M111_ROW_START 0x001 37 #define MT9M111_COLUMN_START 0x002 38 #define MT9M111_WINDOW_HEIGHT 0x003 39 #define MT9M111_WINDOW_WIDTH 0x004 40 #define MT9M111_HORIZONTAL_BLANKING_B 0x005 41 #define MT9M111_VERTICAL_BLANKING_B 0x006 42 #define MT9M111_HORIZONTAL_BLANKING_A 0x007 43 #define MT9M111_VERTICAL_BLANKING_A 0x008 44 #define MT9M111_SHUTTER_WIDTH 0x009 45 #define MT9M111_ROW_SPEED 0x00a 46 #define MT9M111_EXTRA_DELAY 0x00b 47 #define MT9M111_SHUTTER_DELAY 0x00c 48 #define MT9M111_RESET 0x00d 49 #define MT9M111_READ_MODE_B 0x020 50 #define MT9M111_READ_MODE_A 0x021 51 #define MT9M111_FLASH_CONTROL 0x023 52 #define MT9M111_GREEN1_GAIN 0x02b 53 #define MT9M111_BLUE_GAIN 0x02c 54 #define MT9M111_RED_GAIN 0x02d 55 #define MT9M111_GREEN2_GAIN 0x02e 56 #define MT9M111_GLOBAL_GAIN 0x02f 57 #define MT9M111_CONTEXT_CONTROL 0x0c8 58 #define MT9M111_PAGE_MAP 0x0f0 59 #define MT9M111_BYTE_WISE_ADDR 0x0f1 60 61 #define MT9M111_RESET_SYNC_CHANGES (1 << 15) 62 #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9) 63 #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8) 64 #define MT9M111_RESET_RESET_SOC (1 << 5) 65 #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4) 66 #define MT9M111_RESET_CHIP_ENABLE (1 << 3) 67 #define MT9M111_RESET_ANALOG_STANDBY (1 << 2) 68 #define MT9M111_RESET_RESTART_FRAME (1 << 1) 69 #define MT9M111_RESET_RESET_MODE (1 << 0) 70 71 #define MT9M111_RM_FULL_POWER_RD (0 << 10) 72 #define MT9M111_RM_LOW_POWER_RD (1 << 10) 73 #define MT9M111_RM_COL_SKIP_4X (1 << 5) 74 #define MT9M111_RM_ROW_SKIP_4X (1 << 4) 75 #define MT9M111_RM_COL_SKIP_2X (1 << 3) 76 #define MT9M111_RM_ROW_SKIP_2X (1 << 2) 77 #define MT9M111_RMB_MIRROR_COLS (1 << 1) 78 #define MT9M111_RMB_MIRROR_ROWS (1 << 0) 79 #define MT9M111_CTXT_CTRL_RESTART (1 << 15) 80 #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12) 81 #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10) 82 #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9) 83 #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8) 84 #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7) 85 #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3) 86 #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2) 87 #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1) 88 #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0) 89 90 /* 91 * Colorpipe register addresses (0x100..0x1ff) 92 */ 93 #define MT9M111_OPER_MODE_CTRL 0x106 94 #define MT9M111_OUTPUT_FORMAT_CTRL 0x108 95 #define MT9M111_TPG_CTRL 0x148 96 #define MT9M111_REDUCER_XZOOM_B 0x1a0 97 #define MT9M111_REDUCER_XSIZE_B 0x1a1 98 #define MT9M111_REDUCER_YZOOM_B 0x1a3 99 #define MT9M111_REDUCER_YSIZE_B 0x1a4 100 #define MT9M111_REDUCER_XZOOM_A 0x1a6 101 #define MT9M111_REDUCER_XSIZE_A 0x1a7 102 #define MT9M111_REDUCER_YZOOM_A 0x1a9 103 #define MT9M111_REDUCER_YSIZE_A 0x1aa 104 105 #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a 106 #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b 107 108 #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14) 109 #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1) 110 #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9) 111 #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8) 112 #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14) 113 #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10) 114 #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9) 115 #define MT9M111_OUTFMT_RGB (1 << 8) 116 #define MT9M111_OUTFMT_RGB565 (0 << 6) 117 #define MT9M111_OUTFMT_RGB555 (1 << 6) 118 #define MT9M111_OUTFMT_RGB444x (2 << 6) 119 #define MT9M111_OUTFMT_RGBx444 (3 << 6) 120 #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4) 121 #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4) 122 #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4) 123 #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4) 124 #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3) 125 #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2) 126 #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1) 127 #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0) 128 #define MT9M111_TPG_SEL_MASK GENMASK(2, 0) 129 130 /* 131 * Camera control register addresses (0x200..0x2ff not implemented) 132 */ 133 134 #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg) 135 #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val)) 136 #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val)) 137 #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val)) 138 #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \ 139 (val), (mask)) 140 141 #define MT9M111_MIN_DARK_ROWS 8 142 #define MT9M111_MIN_DARK_COLS 26 143 #define MT9M111_MAX_HEIGHT 1024 144 #define MT9M111_MAX_WIDTH 1280 145 146 struct mt9m111_context { 147 u16 read_mode; 148 u16 blanking_h; 149 u16 blanking_v; 150 u16 reducer_xzoom; 151 u16 reducer_yzoom; 152 u16 reducer_xsize; 153 u16 reducer_ysize; 154 u16 output_fmt_ctrl2; 155 u16 control; 156 }; 157 158 static struct mt9m111_context context_a = { 159 .read_mode = MT9M111_READ_MODE_A, 160 .blanking_h = MT9M111_HORIZONTAL_BLANKING_A, 161 .blanking_v = MT9M111_VERTICAL_BLANKING_A, 162 .reducer_xzoom = MT9M111_REDUCER_XZOOM_A, 163 .reducer_yzoom = MT9M111_REDUCER_YZOOM_A, 164 .reducer_xsize = MT9M111_REDUCER_XSIZE_A, 165 .reducer_ysize = MT9M111_REDUCER_YSIZE_A, 166 .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_A, 167 .control = MT9M111_CTXT_CTRL_RESTART, 168 }; 169 170 static struct mt9m111_context context_b = { 171 .read_mode = MT9M111_READ_MODE_B, 172 .blanking_h = MT9M111_HORIZONTAL_BLANKING_B, 173 .blanking_v = MT9M111_VERTICAL_BLANKING_B, 174 .reducer_xzoom = MT9M111_REDUCER_XZOOM_B, 175 .reducer_yzoom = MT9M111_REDUCER_YZOOM_B, 176 .reducer_xsize = MT9M111_REDUCER_XSIZE_B, 177 .reducer_ysize = MT9M111_REDUCER_YSIZE_B, 178 .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_B, 179 .control = MT9M111_CTXT_CTRL_RESTART | 180 MT9M111_CTXT_CTRL_DEFECTCOR_B | MT9M111_CTXT_CTRL_RESIZE_B | 181 MT9M111_CTXT_CTRL_CTRL2_B | MT9M111_CTXT_CTRL_GAMMA_B | 182 MT9M111_CTXT_CTRL_READ_MODE_B | MT9M111_CTXT_CTRL_VBLANK_SEL_B | 183 MT9M111_CTXT_CTRL_HBLANK_SEL_B, 184 }; 185 186 /* MT9M111 has only one fixed colorspace per pixelcode */ 187 struct mt9m111_datafmt { 188 u32 code; 189 enum v4l2_colorspace colorspace; 190 }; 191 192 static const struct mt9m111_datafmt mt9m111_colour_fmts[] = { 193 {MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB}, 194 {MEDIA_BUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_SRGB}, 195 {MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB}, 196 {MEDIA_BUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_SRGB}, 197 {MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, 198 {MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB}, 199 {MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB}, 200 {MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB}, 201 {MEDIA_BUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB}, 202 {MEDIA_BUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB}, 203 {MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB}, 204 {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, 205 }; 206 207 struct mt9m111 { 208 struct v4l2_subdev subdev; 209 struct v4l2_ctrl_handler hdl; 210 struct v4l2_ctrl *gain; 211 struct mt9m111_context *ctx; 212 struct v4l2_rect rect; /* cropping rectangle */ 213 struct v4l2_clk *clk; 214 unsigned int width; /* output */ 215 unsigned int height; /* sizes */ 216 struct mutex power_lock; /* lock to protect power_count */ 217 int power_count; 218 const struct mt9m111_datafmt *fmt; 219 int lastpage; /* PageMap cache value */ 220 #ifdef CONFIG_MEDIA_CONTROLLER 221 struct media_pad pad; 222 #endif 223 }; 224 225 /* Find a data format by a pixel code */ 226 static const struct mt9m111_datafmt *mt9m111_find_datafmt(struct mt9m111 *mt9m111, 227 u32 code) 228 { 229 int i; 230 for (i = 0; i < ARRAY_SIZE(mt9m111_colour_fmts); i++) 231 if (mt9m111_colour_fmts[i].code == code) 232 return mt9m111_colour_fmts + i; 233 234 return mt9m111->fmt; 235 } 236 237 static struct mt9m111 *to_mt9m111(const struct i2c_client *client) 238 { 239 return container_of(i2c_get_clientdata(client), struct mt9m111, subdev); 240 } 241 242 static int reg_page_map_set(struct i2c_client *client, const u16 reg) 243 { 244 int ret; 245 u16 page; 246 struct mt9m111 *mt9m111 = to_mt9m111(client); 247 248 page = (reg >> 8); 249 if (page == mt9m111->lastpage) 250 return 0; 251 if (page > 2) 252 return -EINVAL; 253 254 ret = i2c_smbus_write_word_swapped(client, MT9M111_PAGE_MAP, page); 255 if (!ret) 256 mt9m111->lastpage = page; 257 return ret; 258 } 259 260 static int mt9m111_reg_read(struct i2c_client *client, const u16 reg) 261 { 262 int ret; 263 264 ret = reg_page_map_set(client, reg); 265 if (!ret) 266 ret = i2c_smbus_read_word_swapped(client, reg & 0xff); 267 268 dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret); 269 return ret; 270 } 271 272 static int mt9m111_reg_write(struct i2c_client *client, const u16 reg, 273 const u16 data) 274 { 275 int ret; 276 277 ret = reg_page_map_set(client, reg); 278 if (!ret) 279 ret = i2c_smbus_write_word_swapped(client, reg & 0xff, data); 280 dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret); 281 return ret; 282 } 283 284 static int mt9m111_reg_set(struct i2c_client *client, const u16 reg, 285 const u16 data) 286 { 287 int ret; 288 289 ret = mt9m111_reg_read(client, reg); 290 if (ret >= 0) 291 ret = mt9m111_reg_write(client, reg, ret | data); 292 return ret; 293 } 294 295 static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg, 296 const u16 data) 297 { 298 int ret; 299 300 ret = mt9m111_reg_read(client, reg); 301 if (ret >= 0) 302 ret = mt9m111_reg_write(client, reg, ret & ~data); 303 return ret; 304 } 305 306 static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg, 307 const u16 data, const u16 mask) 308 { 309 int ret; 310 311 ret = mt9m111_reg_read(client, reg); 312 if (ret >= 0) 313 ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data); 314 return ret; 315 } 316 317 static int mt9m111_set_context(struct mt9m111 *mt9m111, 318 struct mt9m111_context *ctx) 319 { 320 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 321 return reg_write(CONTEXT_CONTROL, ctx->control); 322 } 323 324 static int mt9m111_setup_rect_ctx(struct mt9m111 *mt9m111, 325 struct mt9m111_context *ctx, struct v4l2_rect *rect, 326 unsigned int width, unsigned int height) 327 { 328 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 329 int ret = mt9m111_reg_write(client, ctx->reducer_xzoom, rect->width); 330 if (!ret) 331 ret = mt9m111_reg_write(client, ctx->reducer_yzoom, rect->height); 332 if (!ret) 333 ret = mt9m111_reg_write(client, ctx->reducer_xsize, width); 334 if (!ret) 335 ret = mt9m111_reg_write(client, ctx->reducer_ysize, height); 336 return ret; 337 } 338 339 static int mt9m111_setup_geometry(struct mt9m111 *mt9m111, struct v4l2_rect *rect, 340 int width, int height, u32 code) 341 { 342 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 343 int ret; 344 345 ret = reg_write(COLUMN_START, rect->left); 346 if (!ret) 347 ret = reg_write(ROW_START, rect->top); 348 349 if (!ret) 350 ret = reg_write(WINDOW_WIDTH, rect->width); 351 if (!ret) 352 ret = reg_write(WINDOW_HEIGHT, rect->height); 353 354 if (code != MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) { 355 /* IFP in use, down-scaling possible */ 356 if (!ret) 357 ret = mt9m111_setup_rect_ctx(mt9m111, &context_b, 358 rect, width, height); 359 if (!ret) 360 ret = mt9m111_setup_rect_ctx(mt9m111, &context_a, 361 rect, width, height); 362 } 363 364 dev_dbg(&client->dev, "%s(%x): %ux%u@%u:%u -> %ux%u = %d\n", 365 __func__, code, rect->width, rect->height, rect->left, rect->top, 366 width, height, ret); 367 368 return ret; 369 } 370 371 static int mt9m111_enable(struct mt9m111 *mt9m111) 372 { 373 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 374 return reg_write(RESET, MT9M111_RESET_CHIP_ENABLE); 375 } 376 377 static int mt9m111_reset(struct mt9m111 *mt9m111) 378 { 379 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 380 int ret; 381 382 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); 383 if (!ret) 384 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC); 385 if (!ret) 386 ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE 387 | MT9M111_RESET_RESET_SOC); 388 389 return ret; 390 } 391 392 static int mt9m111_set_selection(struct v4l2_subdev *sd, 393 struct v4l2_subdev_pad_config *cfg, 394 struct v4l2_subdev_selection *sel) 395 { 396 struct i2c_client *client = v4l2_get_subdevdata(sd); 397 struct mt9m111 *mt9m111 = to_mt9m111(client); 398 struct v4l2_rect rect = sel->r; 399 int width, height; 400 int ret, align = 0; 401 402 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE || 403 sel->target != V4L2_SEL_TGT_CROP) 404 return -EINVAL; 405 406 if (mt9m111->fmt->code == MEDIA_BUS_FMT_SBGGR8_1X8 || 407 mt9m111->fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) { 408 /* Bayer format - even size lengths */ 409 align = 1; 410 /* Let the user play with the starting pixel */ 411 } 412 413 /* FIXME: the datasheet doesn't specify minimum sizes */ 414 v4l_bound_align_image(&rect.width, 2, MT9M111_MAX_WIDTH, align, 415 &rect.height, 2, MT9M111_MAX_HEIGHT, align, 0); 416 rect.left = clamp(rect.left, MT9M111_MIN_DARK_COLS, 417 MT9M111_MIN_DARK_COLS + MT9M111_MAX_WIDTH - 418 (__s32)rect.width); 419 rect.top = clamp(rect.top, MT9M111_MIN_DARK_ROWS, 420 MT9M111_MIN_DARK_ROWS + MT9M111_MAX_HEIGHT - 421 (__s32)rect.height); 422 423 width = min(mt9m111->width, rect.width); 424 height = min(mt9m111->height, rect.height); 425 426 ret = mt9m111_setup_geometry(mt9m111, &rect, width, height, mt9m111->fmt->code); 427 if (!ret) { 428 mt9m111->rect = rect; 429 mt9m111->width = width; 430 mt9m111->height = height; 431 } 432 433 return ret; 434 } 435 436 static int mt9m111_get_selection(struct v4l2_subdev *sd, 437 struct v4l2_subdev_pad_config *cfg, 438 struct v4l2_subdev_selection *sel) 439 { 440 struct i2c_client *client = v4l2_get_subdevdata(sd); 441 struct mt9m111 *mt9m111 = to_mt9m111(client); 442 443 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) 444 return -EINVAL; 445 446 switch (sel->target) { 447 case V4L2_SEL_TGT_CROP_BOUNDS: 448 sel->r.left = MT9M111_MIN_DARK_COLS; 449 sel->r.top = MT9M111_MIN_DARK_ROWS; 450 sel->r.width = MT9M111_MAX_WIDTH; 451 sel->r.height = MT9M111_MAX_HEIGHT; 452 return 0; 453 case V4L2_SEL_TGT_CROP: 454 sel->r = mt9m111->rect; 455 return 0; 456 default: 457 return -EINVAL; 458 } 459 } 460 461 static int mt9m111_get_fmt(struct v4l2_subdev *sd, 462 struct v4l2_subdev_pad_config *cfg, 463 struct v4l2_subdev_format *format) 464 { 465 struct v4l2_mbus_framefmt *mf = &format->format; 466 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 467 468 if (format->pad) 469 return -EINVAL; 470 471 mf->width = mt9m111->width; 472 mf->height = mt9m111->height; 473 mf->code = mt9m111->fmt->code; 474 mf->colorspace = mt9m111->fmt->colorspace; 475 mf->field = V4L2_FIELD_NONE; 476 477 return 0; 478 } 479 480 static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111, 481 u32 code) 482 { 483 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 484 u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER | 485 MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB | 486 MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 | 487 MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 | 488 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | 489 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 490 int ret; 491 492 switch (code) { 493 case MEDIA_BUS_FMT_SBGGR8_1X8: 494 data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER | 495 MT9M111_OUTFMT_RGB; 496 break; 497 case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE: 498 data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB; 499 break; 500 case MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE: 501 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 | 502 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; 503 break; 504 case MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE: 505 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555; 506 break; 507 case MEDIA_BUS_FMT_RGB565_2X8_LE: 508 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | 509 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; 510 break; 511 case MEDIA_BUS_FMT_RGB565_2X8_BE: 512 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565; 513 break; 514 case MEDIA_BUS_FMT_BGR565_2X8_BE: 515 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | 516 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 517 break; 518 case MEDIA_BUS_FMT_BGR565_2X8_LE: 519 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | 520 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | 521 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 522 break; 523 case MEDIA_BUS_FMT_UYVY8_2X8: 524 data_outfmt2 = 0; 525 break; 526 case MEDIA_BUS_FMT_VYUY8_2X8: 527 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 528 break; 529 case MEDIA_BUS_FMT_YUYV8_2X8: 530 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; 531 break; 532 case MEDIA_BUS_FMT_YVYU8_2X8: 533 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | 534 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; 535 break; 536 default: 537 dev_err(&client->dev, "Pixel format not handled: %x\n", code); 538 return -EINVAL; 539 } 540 541 ret = mt9m111_reg_mask(client, context_a.output_fmt_ctrl2, 542 data_outfmt2, mask_outfmt2); 543 if (!ret) 544 ret = mt9m111_reg_mask(client, context_b.output_fmt_ctrl2, 545 data_outfmt2, mask_outfmt2); 546 547 return ret; 548 } 549 550 static int mt9m111_set_fmt(struct v4l2_subdev *sd, 551 struct v4l2_subdev_pad_config *cfg, 552 struct v4l2_subdev_format *format) 553 { 554 struct v4l2_mbus_framefmt *mf = &format->format; 555 struct i2c_client *client = v4l2_get_subdevdata(sd); 556 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 557 const struct mt9m111_datafmt *fmt; 558 struct v4l2_rect *rect = &mt9m111->rect; 559 bool bayer; 560 int ret; 561 562 if (format->pad) 563 return -EINVAL; 564 565 fmt = mt9m111_find_datafmt(mt9m111, mf->code); 566 567 bayer = fmt->code == MEDIA_BUS_FMT_SBGGR8_1X8 || 568 fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE; 569 570 /* 571 * With Bayer format enforce even side lengths, but let the user play 572 * with the starting pixel 573 */ 574 if (bayer) { 575 rect->width = ALIGN(rect->width, 2); 576 rect->height = ALIGN(rect->height, 2); 577 } 578 579 if (fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) { 580 /* IFP bypass mode, no scaling */ 581 mf->width = rect->width; 582 mf->height = rect->height; 583 } else { 584 /* No upscaling */ 585 if (mf->width > rect->width) 586 mf->width = rect->width; 587 if (mf->height > rect->height) 588 mf->height = rect->height; 589 } 590 591 dev_dbg(&client->dev, "%s(): %ux%u, code=%x\n", __func__, 592 mf->width, mf->height, fmt->code); 593 594 mf->code = fmt->code; 595 mf->colorspace = fmt->colorspace; 596 597 if (format->which == V4L2_SUBDEV_FORMAT_TRY) { 598 cfg->try_fmt = *mf; 599 return 0; 600 } 601 602 ret = mt9m111_setup_geometry(mt9m111, rect, mf->width, mf->height, mf->code); 603 if (!ret) 604 ret = mt9m111_set_pixfmt(mt9m111, mf->code); 605 if (!ret) { 606 mt9m111->width = mf->width; 607 mt9m111->height = mf->height; 608 mt9m111->fmt = fmt; 609 } 610 611 return ret; 612 } 613 614 #ifdef CONFIG_VIDEO_ADV_DEBUG 615 static int mt9m111_g_register(struct v4l2_subdev *sd, 616 struct v4l2_dbg_register *reg) 617 { 618 struct i2c_client *client = v4l2_get_subdevdata(sd); 619 int val; 620 621 if (reg->reg > 0x2ff) 622 return -EINVAL; 623 624 val = mt9m111_reg_read(client, reg->reg); 625 reg->size = 2; 626 reg->val = (u64)val; 627 628 if (reg->val > 0xffff) 629 return -EIO; 630 631 return 0; 632 } 633 634 static int mt9m111_s_register(struct v4l2_subdev *sd, 635 const struct v4l2_dbg_register *reg) 636 { 637 struct i2c_client *client = v4l2_get_subdevdata(sd); 638 639 if (reg->reg > 0x2ff) 640 return -EINVAL; 641 642 if (mt9m111_reg_write(client, reg->reg, reg->val) < 0) 643 return -EIO; 644 645 return 0; 646 } 647 #endif 648 649 static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask) 650 { 651 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 652 int ret; 653 654 if (flip) 655 ret = mt9m111_reg_set(client, mt9m111->ctx->read_mode, mask); 656 else 657 ret = mt9m111_reg_clear(client, mt9m111->ctx->read_mode, mask); 658 659 return ret; 660 } 661 662 static int mt9m111_get_global_gain(struct mt9m111 *mt9m111) 663 { 664 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 665 int data; 666 667 data = reg_read(GLOBAL_GAIN); 668 if (data >= 0) 669 return (data & 0x2f) * (1 << ((data >> 10) & 1)) * 670 (1 << ((data >> 9) & 1)); 671 return data; 672 } 673 674 static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain) 675 { 676 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 677 u16 val; 678 679 if (gain > 63 * 2 * 2) 680 return -EINVAL; 681 682 if ((gain >= 64 * 2) && (gain < 63 * 2 * 2)) 683 val = (1 << 10) | (1 << 9) | (gain / 4); 684 else if ((gain >= 64) && (gain < 64 * 2)) 685 val = (1 << 9) | (gain / 2); 686 else 687 val = gain; 688 689 return reg_write(GLOBAL_GAIN, val); 690 } 691 692 static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int val) 693 { 694 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 695 696 if (val == V4L2_EXPOSURE_AUTO) 697 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN); 698 return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN); 699 } 700 701 static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on) 702 { 703 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 704 705 if (on) 706 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN); 707 return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN); 708 } 709 710 static const char * const mt9m111_test_pattern_menu[] = { 711 "Disabled", 712 "Vertical monochrome gradient", 713 "Flat color type 1", 714 "Flat color type 2", 715 "Flat color type 3", 716 "Flat color type 4", 717 "Flat color type 5", 718 "Color bar", 719 }; 720 721 static int mt9m111_set_test_pattern(struct mt9m111 *mt9m111, int val) 722 { 723 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 724 725 return mt9m111_reg_mask(client, MT9M111_TPG_CTRL, val, 726 MT9M111_TPG_SEL_MASK); 727 } 728 729 static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl) 730 { 731 struct mt9m111 *mt9m111 = container_of(ctrl->handler, 732 struct mt9m111, hdl); 733 734 switch (ctrl->id) { 735 case V4L2_CID_VFLIP: 736 return mt9m111_set_flip(mt9m111, ctrl->val, 737 MT9M111_RMB_MIRROR_ROWS); 738 case V4L2_CID_HFLIP: 739 return mt9m111_set_flip(mt9m111, ctrl->val, 740 MT9M111_RMB_MIRROR_COLS); 741 case V4L2_CID_GAIN: 742 return mt9m111_set_global_gain(mt9m111, ctrl->val); 743 case V4L2_CID_EXPOSURE_AUTO: 744 return mt9m111_set_autoexposure(mt9m111, ctrl->val); 745 case V4L2_CID_AUTO_WHITE_BALANCE: 746 return mt9m111_set_autowhitebalance(mt9m111, ctrl->val); 747 case V4L2_CID_TEST_PATTERN: 748 return mt9m111_set_test_pattern(mt9m111, ctrl->val); 749 } 750 751 return -EINVAL; 752 } 753 754 static int mt9m111_suspend(struct mt9m111 *mt9m111) 755 { 756 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 757 int ret; 758 759 v4l2_ctrl_s_ctrl(mt9m111->gain, mt9m111_get_global_gain(mt9m111)); 760 761 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); 762 if (!ret) 763 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC | 764 MT9M111_RESET_OUTPUT_DISABLE | 765 MT9M111_RESET_ANALOG_STANDBY); 766 if (!ret) 767 ret = reg_clear(RESET, MT9M111_RESET_CHIP_ENABLE); 768 769 return ret; 770 } 771 772 static void mt9m111_restore_state(struct mt9m111 *mt9m111) 773 { 774 mt9m111_set_context(mt9m111, mt9m111->ctx); 775 mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code); 776 mt9m111_setup_geometry(mt9m111, &mt9m111->rect, 777 mt9m111->width, mt9m111->height, mt9m111->fmt->code); 778 v4l2_ctrl_handler_setup(&mt9m111->hdl); 779 } 780 781 static int mt9m111_resume(struct mt9m111 *mt9m111) 782 { 783 int ret = mt9m111_enable(mt9m111); 784 if (!ret) 785 ret = mt9m111_reset(mt9m111); 786 if (!ret) 787 mt9m111_restore_state(mt9m111); 788 789 return ret; 790 } 791 792 static int mt9m111_init(struct mt9m111 *mt9m111) 793 { 794 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 795 int ret; 796 797 ret = mt9m111_enable(mt9m111); 798 if (!ret) 799 ret = mt9m111_reset(mt9m111); 800 if (!ret) 801 ret = mt9m111_set_context(mt9m111, mt9m111->ctx); 802 if (ret) 803 dev_err(&client->dev, "mt9m111 init failed: %d\n", ret); 804 return ret; 805 } 806 807 static int mt9m111_power_on(struct mt9m111 *mt9m111) 808 { 809 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 810 int ret; 811 812 ret = v4l2_clk_enable(mt9m111->clk); 813 if (ret < 0) 814 return ret; 815 816 ret = mt9m111_resume(mt9m111); 817 if (ret < 0) { 818 dev_err(&client->dev, "Failed to resume the sensor: %d\n", ret); 819 v4l2_clk_disable(mt9m111->clk); 820 } 821 822 return ret; 823 } 824 825 static void mt9m111_power_off(struct mt9m111 *mt9m111) 826 { 827 mt9m111_suspend(mt9m111); 828 v4l2_clk_disable(mt9m111->clk); 829 } 830 831 static int mt9m111_s_power(struct v4l2_subdev *sd, int on) 832 { 833 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 834 int ret = 0; 835 836 mutex_lock(&mt9m111->power_lock); 837 838 /* 839 * If the power count is modified from 0 to != 0 or from != 0 to 0, 840 * update the power state. 841 */ 842 if (mt9m111->power_count == !on) { 843 if (on) 844 ret = mt9m111_power_on(mt9m111); 845 else 846 mt9m111_power_off(mt9m111); 847 } 848 849 if (!ret) { 850 /* Update the power count. */ 851 mt9m111->power_count += on ? 1 : -1; 852 WARN_ON(mt9m111->power_count < 0); 853 } 854 855 mutex_unlock(&mt9m111->power_lock); 856 return ret; 857 } 858 859 static const struct v4l2_ctrl_ops mt9m111_ctrl_ops = { 860 .s_ctrl = mt9m111_s_ctrl, 861 }; 862 863 static const struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = { 864 .s_power = mt9m111_s_power, 865 #ifdef CONFIG_VIDEO_ADV_DEBUG 866 .g_register = mt9m111_g_register, 867 .s_register = mt9m111_s_register, 868 #endif 869 }; 870 871 static int mt9m111_enum_mbus_code(struct v4l2_subdev *sd, 872 struct v4l2_subdev_pad_config *cfg, 873 struct v4l2_subdev_mbus_code_enum *code) 874 { 875 if (code->pad || code->index >= ARRAY_SIZE(mt9m111_colour_fmts)) 876 return -EINVAL; 877 878 code->code = mt9m111_colour_fmts[code->index].code; 879 return 0; 880 } 881 882 static int mt9m111_g_mbus_config(struct v4l2_subdev *sd, 883 struct v4l2_mbus_config *cfg) 884 { 885 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING | 886 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH | 887 V4L2_MBUS_DATA_ACTIVE_HIGH; 888 cfg->type = V4L2_MBUS_PARALLEL; 889 890 return 0; 891 } 892 893 static const struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = { 894 .g_mbus_config = mt9m111_g_mbus_config, 895 }; 896 897 static const struct v4l2_subdev_pad_ops mt9m111_subdev_pad_ops = { 898 .enum_mbus_code = mt9m111_enum_mbus_code, 899 .get_selection = mt9m111_get_selection, 900 .set_selection = mt9m111_set_selection, 901 .get_fmt = mt9m111_get_fmt, 902 .set_fmt = mt9m111_set_fmt, 903 }; 904 905 static const struct v4l2_subdev_ops mt9m111_subdev_ops = { 906 .core = &mt9m111_subdev_core_ops, 907 .video = &mt9m111_subdev_video_ops, 908 .pad = &mt9m111_subdev_pad_ops, 909 }; 910 911 /* 912 * Interface active, can use i2c. If it fails, it can indeed mean, that 913 * this wasn't our capture interface, so, we wait for the right one 914 */ 915 static int mt9m111_video_probe(struct i2c_client *client) 916 { 917 struct mt9m111 *mt9m111 = to_mt9m111(client); 918 s32 data; 919 int ret; 920 921 ret = mt9m111_s_power(&mt9m111->subdev, 1); 922 if (ret < 0) 923 return ret; 924 925 data = reg_read(CHIP_VERSION); 926 927 switch (data) { 928 case 0x143a: /* MT9M111 or MT9M131 */ 929 dev_info(&client->dev, 930 "Detected a MT9M111/MT9M131 chip ID %x\n", data); 931 break; 932 case 0x148c: /* MT9M112 */ 933 dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data); 934 break; 935 default: 936 dev_err(&client->dev, 937 "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n", 938 data); 939 ret = -ENODEV; 940 goto done; 941 } 942 943 ret = mt9m111_init(mt9m111); 944 if (ret) 945 goto done; 946 947 ret = v4l2_ctrl_handler_setup(&mt9m111->hdl); 948 949 done: 950 mt9m111_s_power(&mt9m111->subdev, 0); 951 return ret; 952 } 953 954 static int mt9m111_probe(struct i2c_client *client, 955 const struct i2c_device_id *did) 956 { 957 struct mt9m111 *mt9m111; 958 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 959 int ret; 960 961 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { 962 dev_warn(&adapter->dev, 963 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); 964 return -EIO; 965 } 966 967 mt9m111 = devm_kzalloc(&client->dev, sizeof(struct mt9m111), GFP_KERNEL); 968 if (!mt9m111) 969 return -ENOMEM; 970 971 mt9m111->clk = v4l2_clk_get(&client->dev, "mclk"); 972 if (IS_ERR(mt9m111->clk)) 973 return PTR_ERR(mt9m111->clk); 974 975 /* Default HIGHPOWER context */ 976 mt9m111->ctx = &context_b; 977 978 v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops); 979 mt9m111->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 980 981 v4l2_ctrl_handler_init(&mt9m111->hdl, 5); 982 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 983 V4L2_CID_VFLIP, 0, 1, 1, 0); 984 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 985 V4L2_CID_HFLIP, 0, 1, 1, 0); 986 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 987 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1); 988 mt9m111->gain = v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, 989 V4L2_CID_GAIN, 0, 63 * 2 * 2, 1, 32); 990 v4l2_ctrl_new_std_menu(&mt9m111->hdl, 991 &mt9m111_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0, 992 V4L2_EXPOSURE_AUTO); 993 v4l2_ctrl_new_std_menu_items(&mt9m111->hdl, 994 &mt9m111_ctrl_ops, V4L2_CID_TEST_PATTERN, 995 ARRAY_SIZE(mt9m111_test_pattern_menu) - 1, 0, 0, 996 mt9m111_test_pattern_menu); 997 mt9m111->subdev.ctrl_handler = &mt9m111->hdl; 998 if (mt9m111->hdl.error) { 999 ret = mt9m111->hdl.error; 1000 goto out_clkput; 1001 } 1002 1003 #ifdef CONFIG_MEDIA_CONTROLLER 1004 mt9m111->pad.flags = MEDIA_PAD_FL_SOURCE; 1005 mt9m111->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1006 ret = media_entity_pads_init(&mt9m111->subdev.entity, 1, &mt9m111->pad); 1007 if (ret < 0) 1008 goto out_hdlfree; 1009 #endif 1010 1011 /* Second stage probe - when a capture adapter is there */ 1012 mt9m111->rect.left = MT9M111_MIN_DARK_COLS; 1013 mt9m111->rect.top = MT9M111_MIN_DARK_ROWS; 1014 mt9m111->rect.width = MT9M111_MAX_WIDTH; 1015 mt9m111->rect.height = MT9M111_MAX_HEIGHT; 1016 mt9m111->fmt = &mt9m111_colour_fmts[0]; 1017 mt9m111->lastpage = -1; 1018 mutex_init(&mt9m111->power_lock); 1019 1020 ret = mt9m111_video_probe(client); 1021 if (ret < 0) 1022 goto out_entityclean; 1023 1024 mt9m111->subdev.dev = &client->dev; 1025 ret = v4l2_async_register_subdev(&mt9m111->subdev); 1026 if (ret < 0) 1027 goto out_entityclean; 1028 1029 return 0; 1030 1031 out_entityclean: 1032 #ifdef CONFIG_MEDIA_CONTROLLER 1033 media_entity_cleanup(&mt9m111->subdev.entity); 1034 out_hdlfree: 1035 #endif 1036 v4l2_ctrl_handler_free(&mt9m111->hdl); 1037 out_clkput: 1038 v4l2_clk_put(mt9m111->clk); 1039 1040 return ret; 1041 } 1042 1043 static int mt9m111_remove(struct i2c_client *client) 1044 { 1045 struct mt9m111 *mt9m111 = to_mt9m111(client); 1046 1047 v4l2_async_unregister_subdev(&mt9m111->subdev); 1048 media_entity_cleanup(&mt9m111->subdev.entity); 1049 v4l2_clk_put(mt9m111->clk); 1050 v4l2_ctrl_handler_free(&mt9m111->hdl); 1051 1052 return 0; 1053 } 1054 static const struct of_device_id mt9m111_of_match[] = { 1055 { .compatible = "micron,mt9m111", }, 1056 {}, 1057 }; 1058 MODULE_DEVICE_TABLE(of, mt9m111_of_match); 1059 1060 static const struct i2c_device_id mt9m111_id[] = { 1061 { "mt9m111", 0 }, 1062 { } 1063 }; 1064 MODULE_DEVICE_TABLE(i2c, mt9m111_id); 1065 1066 static struct i2c_driver mt9m111_i2c_driver = { 1067 .driver = { 1068 .name = "mt9m111", 1069 .of_match_table = of_match_ptr(mt9m111_of_match), 1070 }, 1071 .probe = mt9m111_probe, 1072 .remove = mt9m111_remove, 1073 .id_table = mt9m111_id, 1074 }; 1075 1076 module_i2c_driver(mt9m111_i2c_driver); 1077 1078 MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver"); 1079 MODULE_AUTHOR("Robert Jarzmik"); 1080 MODULE_LICENSE("GPL"); 1081