1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Maxim MAX9286 GMSL Deserializer Driver 4 * 5 * Copyright (C) 2017-2019 Jacopo Mondi 6 * Copyright (C) 2017-2019 Kieran Bingham 7 * Copyright (C) 2017-2019 Laurent Pinchart 8 * Copyright (C) 2017-2019 Niklas Söderlund 9 * Copyright (C) 2016 Renesas Electronics Corporation 10 * Copyright (C) 2015 Cogent Embedded, Inc. 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/device.h> 15 #include <linux/fwnode.h> 16 #include <linux/gpio/consumer.h> 17 #include <linux/gpio/driver.h> 18 #include <linux/gpio/machine.h> 19 #include <linux/i2c.h> 20 #include <linux/i2c-mux.h> 21 #include <linux/module.h> 22 #include <linux/mutex.h> 23 #include <linux/of_graph.h> 24 #include <linux/regulator/consumer.h> 25 #include <linux/slab.h> 26 27 #include <media/v4l2-async.h> 28 #include <media/v4l2-ctrls.h> 29 #include <media/v4l2-device.h> 30 #include <media/v4l2-fwnode.h> 31 #include <media/v4l2-subdev.h> 32 33 /* Register 0x00 */ 34 #define MAX9286_MSTLINKSEL_AUTO (7 << 5) 35 #define MAX9286_MSTLINKSEL(n) ((n) << 5) 36 #define MAX9286_EN_VS_GEN BIT(4) 37 #define MAX9286_LINKEN(n) (1 << (n)) 38 /* Register 0x01 */ 39 #define MAX9286_FSYNCMODE_ECU (3 << 6) 40 #define MAX9286_FSYNCMODE_EXT (2 << 6) 41 #define MAX9286_FSYNCMODE_INT_OUT (1 << 6) 42 #define MAX9286_FSYNCMODE_INT_HIZ (0 << 6) 43 #define MAX9286_GPIEN BIT(5) 44 #define MAX9286_ENLMO_RSTFSYNC BIT(2) 45 #define MAX9286_FSYNCMETH_AUTO (2 << 0) 46 #define MAX9286_FSYNCMETH_SEMI_AUTO (1 << 0) 47 #define MAX9286_FSYNCMETH_MANUAL (0 << 0) 48 #define MAX9286_REG_FSYNC_PERIOD_L 0x06 49 #define MAX9286_REG_FSYNC_PERIOD_M 0x07 50 #define MAX9286_REG_FSYNC_PERIOD_H 0x08 51 /* Register 0x0a */ 52 #define MAX9286_FWDCCEN(n) (1 << ((n) + 4)) 53 #define MAX9286_REVCCEN(n) (1 << (n)) 54 /* Register 0x0c */ 55 #define MAX9286_HVEN BIT(7) 56 #define MAX9286_EDC_6BIT_HAMMING (2 << 5) 57 #define MAX9286_EDC_6BIT_CRC (1 << 5) 58 #define MAX9286_EDC_1BIT_PARITY (0 << 5) 59 #define MAX9286_DESEL BIT(4) 60 #define MAX9286_INVVS BIT(3) 61 #define MAX9286_INVHS BIT(2) 62 #define MAX9286_HVSRC_D0 (2 << 0) 63 #define MAX9286_HVSRC_D14 (1 << 0) 64 #define MAX9286_HVSRC_D18 (0 << 0) 65 /* Register 0x0f */ 66 #define MAX9286_0X0F_RESERVED BIT(3) 67 /* Register 0x12 */ 68 #define MAX9286_CSILANECNT(n) (((n) - 1) << 6) 69 #define MAX9286_CSIDBL BIT(5) 70 #define MAX9286_DBL BIT(4) 71 #define MAX9286_DATATYPE_USER_8BIT (11 << 0) 72 #define MAX9286_DATATYPE_USER_YUV_12BIT (10 << 0) 73 #define MAX9286_DATATYPE_USER_24BIT (9 << 0) 74 #define MAX9286_DATATYPE_RAW14 (8 << 0) 75 #define MAX9286_DATATYPE_RAW11 (7 << 0) 76 #define MAX9286_DATATYPE_RAW10 (6 << 0) 77 #define MAX9286_DATATYPE_RAW8 (5 << 0) 78 #define MAX9286_DATATYPE_YUV422_10BIT (4 << 0) 79 #define MAX9286_DATATYPE_YUV422_8BIT (3 << 0) 80 #define MAX9286_DATATYPE_RGB555 (2 << 0) 81 #define MAX9286_DATATYPE_RGB565 (1 << 0) 82 #define MAX9286_DATATYPE_RGB888 (0 << 0) 83 /* Register 0x15 */ 84 #define MAX9286_VC(n) ((n) << 5) 85 #define MAX9286_VCTYPE BIT(4) 86 #define MAX9286_CSIOUTEN BIT(3) 87 #define MAX9286_0X15_RESV (3 << 0) 88 /* Register 0x1b */ 89 #define MAX9286_SWITCHIN(n) (1 << ((n) + 4)) 90 #define MAX9286_ENEQ(n) (1 << (n)) 91 /* Register 0x27 */ 92 #define MAX9286_LOCKED BIT(7) 93 /* Register 0x31 */ 94 #define MAX9286_FSYNC_LOCKED BIT(6) 95 /* Register 0x34 */ 96 #define MAX9286_I2CLOCACK BIT(7) 97 #define MAX9286_I2CSLVSH_1046NS_469NS (3 << 5) 98 #define MAX9286_I2CSLVSH_938NS_352NS (2 << 5) 99 #define MAX9286_I2CSLVSH_469NS_234NS (1 << 5) 100 #define MAX9286_I2CSLVSH_352NS_117NS (0 << 5) 101 #define MAX9286_I2CMSTBT_837KBPS (7 << 2) 102 #define MAX9286_I2CMSTBT_533KBPS (6 << 2) 103 #define MAX9286_I2CMSTBT_339KBPS (5 << 2) 104 #define MAX9286_I2CMSTBT_173KBPS (4 << 2) 105 #define MAX9286_I2CMSTBT_105KBPS (3 << 2) 106 #define MAX9286_I2CMSTBT_84KBPS (2 << 2) 107 #define MAX9286_I2CMSTBT_28KBPS (1 << 2) 108 #define MAX9286_I2CMSTBT_8KBPS (0 << 2) 109 #define MAX9286_I2CSLVTO_NONE (3 << 0) 110 #define MAX9286_I2CSLVTO_1024US (2 << 0) 111 #define MAX9286_I2CSLVTO_256US (1 << 0) 112 #define MAX9286_I2CSLVTO_64US (0 << 0) 113 /* Register 0x3b */ 114 #define MAX9286_REV_TRF(n) ((n) << 4) 115 #define MAX9286_REV_AMP(n) ((((n) - 30) / 10) << 1) /* in mV */ 116 #define MAX9286_REV_AMP_X BIT(0) 117 #define MAX9286_REV_AMP_HIGH 170 118 /* Register 0x3f */ 119 #define MAX9286_EN_REV_CFG BIT(6) 120 #define MAX9286_REV_FLEN(n) ((n) - 20) 121 /* Register 0x49 */ 122 #define MAX9286_VIDEO_DETECT_MASK 0x0f 123 /* Register 0x69 */ 124 #define MAX9286_LFLTBMONMASKED BIT(7) 125 #define MAX9286_LOCKMONMASKED BIT(6) 126 #define MAX9286_AUTOCOMBACKEN BIT(5) 127 #define MAX9286_AUTOMASKEN BIT(4) 128 #define MAX9286_MASKLINK(n) ((n) << 0) 129 130 /* 131 * The sink and source pads are created to match the OF graph port numbers so 132 * that their indexes can be used interchangeably. 133 */ 134 #define MAX9286_NUM_GMSL 4 135 #define MAX9286_N_SINKS 4 136 #define MAX9286_N_PADS 5 137 #define MAX9286_SRC_PAD 4 138 139 struct max9286_source { 140 struct v4l2_subdev *sd; 141 struct fwnode_handle *fwnode; 142 }; 143 144 struct max9286_asd { 145 struct v4l2_async_subdev base; 146 struct max9286_source *source; 147 }; 148 149 static inline struct max9286_asd *to_max9286_asd(struct v4l2_async_subdev *asd) 150 { 151 return container_of(asd, struct max9286_asd, base); 152 } 153 154 struct max9286_priv { 155 struct i2c_client *client; 156 struct gpio_desc *gpiod_pwdn; 157 struct v4l2_subdev sd; 158 struct media_pad pads[MAX9286_N_PADS]; 159 struct regulator *regulator; 160 161 struct gpio_chip gpio; 162 u8 gpio_state; 163 164 struct i2c_mux_core *mux; 165 unsigned int mux_channel; 166 bool mux_open; 167 168 /* The initial reverse control channel amplitude. */ 169 u32 init_rev_chan_mv; 170 u32 rev_chan_mv; 171 172 u32 gpio_poc[2]; 173 174 struct v4l2_ctrl_handler ctrls; 175 struct v4l2_ctrl *pixelrate; 176 177 struct v4l2_mbus_framefmt fmt[MAX9286_N_SINKS]; 178 179 /* Protects controls and fmt structures */ 180 struct mutex mutex; 181 182 unsigned int nsources; 183 unsigned int source_mask; 184 unsigned int route_mask; 185 unsigned int bound_sources; 186 unsigned int csi2_data_lanes; 187 struct max9286_source sources[MAX9286_NUM_GMSL]; 188 struct v4l2_async_notifier notifier; 189 }; 190 191 static struct max9286_source *next_source(struct max9286_priv *priv, 192 struct max9286_source *source) 193 { 194 if (!source) 195 source = &priv->sources[0]; 196 else 197 source++; 198 199 for (; source < &priv->sources[MAX9286_NUM_GMSL]; source++) { 200 if (source->fwnode) 201 return source; 202 } 203 204 return NULL; 205 } 206 207 #define for_each_source(priv, source) \ 208 for ((source) = NULL; ((source) = next_source((priv), (source))); ) 209 210 #define to_index(priv, source) ((source) - &(priv)->sources[0]) 211 212 static inline struct max9286_priv *sd_to_max9286(struct v4l2_subdev *sd) 213 { 214 return container_of(sd, struct max9286_priv, sd); 215 } 216 217 /* ----------------------------------------------------------------------------- 218 * I2C IO 219 */ 220 221 static int max9286_read(struct max9286_priv *priv, u8 reg) 222 { 223 int ret; 224 225 ret = i2c_smbus_read_byte_data(priv->client, reg); 226 if (ret < 0) 227 dev_err(&priv->client->dev, 228 "%s: register 0x%02x read failed (%d)\n", 229 __func__, reg, ret); 230 231 return ret; 232 } 233 234 static int max9286_write(struct max9286_priv *priv, u8 reg, u8 val) 235 { 236 int ret; 237 238 ret = i2c_smbus_write_byte_data(priv->client, reg, val); 239 if (ret < 0) 240 dev_err(&priv->client->dev, 241 "%s: register 0x%02x write failed (%d)\n", 242 __func__, reg, ret); 243 244 return ret; 245 } 246 247 /* ----------------------------------------------------------------------------- 248 * I2C Multiplexer 249 */ 250 251 static void max9286_i2c_mux_configure(struct max9286_priv *priv, u8 conf) 252 { 253 max9286_write(priv, 0x0a, conf); 254 255 /* 256 * We must sleep after any change to the forward or reverse channel 257 * configuration. 258 */ 259 usleep_range(3000, 5000); 260 } 261 262 static void max9286_i2c_mux_open(struct max9286_priv *priv) 263 { 264 /* Open all channels on the MAX9286 */ 265 max9286_i2c_mux_configure(priv, 0xff); 266 267 priv->mux_open = true; 268 } 269 270 static void max9286_i2c_mux_close(struct max9286_priv *priv) 271 { 272 /* 273 * Ensure that both the forward and reverse channel are disabled on the 274 * mux, and that the channel ID is invalidated to ensure we reconfigure 275 * on the next max9286_i2c_mux_select() call. 276 */ 277 max9286_i2c_mux_configure(priv, 0x00); 278 279 priv->mux_open = false; 280 priv->mux_channel = -1; 281 } 282 283 static int max9286_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan) 284 { 285 struct max9286_priv *priv = i2c_mux_priv(muxc); 286 287 /* Channel select is disabled when configured in the opened state. */ 288 if (priv->mux_open) 289 return 0; 290 291 if (priv->mux_channel == chan) 292 return 0; 293 294 priv->mux_channel = chan; 295 296 max9286_i2c_mux_configure(priv, MAX9286_FWDCCEN(chan) | 297 MAX9286_REVCCEN(chan)); 298 299 return 0; 300 } 301 302 static int max9286_i2c_mux_init(struct max9286_priv *priv) 303 { 304 struct max9286_source *source; 305 int ret; 306 307 if (!i2c_check_functionality(priv->client->adapter, 308 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) 309 return -ENODEV; 310 311 priv->mux = i2c_mux_alloc(priv->client->adapter, &priv->client->dev, 312 priv->nsources, 0, I2C_MUX_LOCKED, 313 max9286_i2c_mux_select, NULL); 314 if (!priv->mux) 315 return -ENOMEM; 316 317 priv->mux->priv = priv; 318 319 for_each_source(priv, source) { 320 unsigned int index = to_index(priv, source); 321 322 ret = i2c_mux_add_adapter(priv->mux, 0, index, 0); 323 if (ret < 0) 324 goto error; 325 } 326 327 return 0; 328 329 error: 330 i2c_mux_del_adapters(priv->mux); 331 return ret; 332 } 333 334 static void max9286_configure_i2c(struct max9286_priv *priv, bool localack) 335 { 336 u8 config = MAX9286_I2CSLVSH_469NS_234NS | MAX9286_I2CSLVTO_1024US | 337 MAX9286_I2CMSTBT_105KBPS; 338 339 if (localack) 340 config |= MAX9286_I2CLOCACK; 341 342 max9286_write(priv, 0x34, config); 343 usleep_range(3000, 5000); 344 } 345 346 static void max9286_reverse_channel_setup(struct max9286_priv *priv, 347 unsigned int chan_amplitude) 348 { 349 u8 chan_config; 350 351 if (priv->rev_chan_mv == chan_amplitude) 352 return; 353 354 priv->rev_chan_mv = chan_amplitude; 355 356 /* Reverse channel transmission time: default to 1. */ 357 chan_config = MAX9286_REV_TRF(1); 358 359 /* 360 * Reverse channel setup. 361 * 362 * - Enable custom reverse channel configuration (through register 0x3f) 363 * and set the first pulse length to 35 clock cycles. 364 * - Adjust reverse channel amplitude: values > 130 are programmed 365 * using the additional +100mV REV_AMP_X boost flag 366 */ 367 max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35)); 368 369 if (chan_amplitude > 100) { 370 /* It is not possible to express values (100 < x < 130) */ 371 chan_amplitude = max(30U, chan_amplitude - 100); 372 chan_config |= MAX9286_REV_AMP_X; 373 } 374 max9286_write(priv, 0x3b, chan_config | MAX9286_REV_AMP(chan_amplitude)); 375 usleep_range(2000, 2500); 376 } 377 378 /* 379 * max9286_check_video_links() - Make sure video links are detected and locked 380 * 381 * Performs safety checks on video link status. Make sure they are detected 382 * and all enabled links are locked. 383 * 384 * Returns 0 for success, -EIO for errors. 385 */ 386 static int max9286_check_video_links(struct max9286_priv *priv) 387 { 388 unsigned int i; 389 int ret; 390 391 /* 392 * Make sure valid video links are detected. 393 * The delay is not characterized in de-serializer manual, wait up 394 * to 5 ms. 395 */ 396 for (i = 0; i < 10; i++) { 397 ret = max9286_read(priv, 0x49); 398 if (ret < 0) 399 return -EIO; 400 401 if ((ret & MAX9286_VIDEO_DETECT_MASK) == priv->source_mask) 402 break; 403 404 usleep_range(350, 500); 405 } 406 407 if (i == 10) { 408 dev_err(&priv->client->dev, 409 "Unable to detect video links: 0x%02x\n", ret); 410 return -EIO; 411 } 412 413 /* Make sure all enabled links are locked (4ms max). */ 414 for (i = 0; i < 10; i++) { 415 ret = max9286_read(priv, 0x27); 416 if (ret < 0) 417 return -EIO; 418 419 if (ret & MAX9286_LOCKED) 420 break; 421 422 usleep_range(350, 450); 423 } 424 425 if (i == 10) { 426 dev_err(&priv->client->dev, "Not all enabled links locked\n"); 427 return -EIO; 428 } 429 430 return 0; 431 } 432 433 /* 434 * max9286_check_config_link() - Detect and wait for configuration links 435 * 436 * Determine if the configuration channel is up and settled for a link. 437 * 438 * Returns 0 for success, -EIO for errors. 439 */ 440 static int max9286_check_config_link(struct max9286_priv *priv, 441 unsigned int source_mask) 442 { 443 unsigned int conflink_mask = (source_mask & 0x0f) << 4; 444 unsigned int i; 445 int ret; 446 447 /* 448 * Make sure requested configuration links are detected. 449 * The delay is not characterized in the chip manual: wait up 450 * to 5 milliseconds. 451 */ 452 for (i = 0; i < 10; i++) { 453 ret = max9286_read(priv, 0x49); 454 if (ret < 0) 455 return -EIO; 456 457 ret &= 0xf0; 458 if (ret == conflink_mask) 459 break; 460 461 usleep_range(350, 500); 462 } 463 464 if (ret != conflink_mask) { 465 dev_err(&priv->client->dev, 466 "Unable to detect configuration links: 0x%02x expected 0x%02x\n", 467 ret, conflink_mask); 468 return -EIO; 469 } 470 471 dev_info(&priv->client->dev, 472 "Successfully detected configuration links after %u loops: 0x%02x\n", 473 i, conflink_mask); 474 475 return 0; 476 } 477 478 /* ----------------------------------------------------------------------------- 479 * V4L2 Subdev 480 */ 481 482 static int max9286_set_pixelrate(struct max9286_priv *priv) 483 { 484 struct max9286_source *source = NULL; 485 u64 pixelrate = 0; 486 487 for_each_source(priv, source) { 488 struct v4l2_ctrl *ctrl; 489 u64 source_rate = 0; 490 491 /* Pixel rate is mandatory to be reported by sources. */ 492 ctrl = v4l2_ctrl_find(source->sd->ctrl_handler, 493 V4L2_CID_PIXEL_RATE); 494 if (!ctrl) { 495 pixelrate = 0; 496 break; 497 } 498 499 /* All source must report the same pixel rate. */ 500 source_rate = v4l2_ctrl_g_ctrl_int64(ctrl); 501 if (!pixelrate) { 502 pixelrate = source_rate; 503 } else if (pixelrate != source_rate) { 504 dev_err(&priv->client->dev, 505 "Unable to calculate pixel rate\n"); 506 return -EINVAL; 507 } 508 } 509 510 if (!pixelrate) { 511 dev_err(&priv->client->dev, 512 "No pixel rate control available in sources\n"); 513 return -EINVAL; 514 } 515 516 /* 517 * The CSI-2 transmitter pixel rate is the single source rate multiplied 518 * by the number of available sources. 519 */ 520 return v4l2_ctrl_s_ctrl_int64(priv->pixelrate, 521 pixelrate * priv->nsources); 522 } 523 524 static int max9286_notify_bound(struct v4l2_async_notifier *notifier, 525 struct v4l2_subdev *subdev, 526 struct v4l2_async_subdev *asd) 527 { 528 struct max9286_priv *priv = sd_to_max9286(notifier->sd); 529 struct max9286_source *source = to_max9286_asd(asd)->source; 530 unsigned int index = to_index(priv, source); 531 unsigned int src_pad; 532 int ret; 533 534 ret = media_entity_get_fwnode_pad(&subdev->entity, 535 source->fwnode, 536 MEDIA_PAD_FL_SOURCE); 537 if (ret < 0) { 538 dev_err(&priv->client->dev, 539 "Failed to find pad for %s\n", subdev->name); 540 return ret; 541 } 542 543 priv->bound_sources |= BIT(index); 544 source->sd = subdev; 545 src_pad = ret; 546 547 ret = media_create_pad_link(&source->sd->entity, src_pad, 548 &priv->sd.entity, index, 549 MEDIA_LNK_FL_ENABLED | 550 MEDIA_LNK_FL_IMMUTABLE); 551 if (ret) { 552 dev_err(&priv->client->dev, 553 "Unable to link %s:%u -> %s:%u\n", 554 source->sd->name, src_pad, priv->sd.name, index); 555 return ret; 556 } 557 558 dev_dbg(&priv->client->dev, "Bound %s pad: %u on index %u\n", 559 subdev->name, src_pad, index); 560 561 /* 562 * As we register a subdev notifiers we won't get a .complete() callback 563 * here, so we have to use bound_sources to identify when all remote 564 * serializers have probed. 565 */ 566 if (priv->bound_sources != priv->source_mask) 567 return 0; 568 569 /* 570 * All enabled sources have probed and enabled their reverse control 571 * channels: 572 * 573 * - Increase the reverse channel amplitude to compensate for the 574 * remote ends high threshold 575 * - Verify all configuration links are properly detected 576 * - Disable auto-ack as communication on the control channel are now 577 * stable. 578 */ 579 max9286_reverse_channel_setup(priv, MAX9286_REV_AMP_HIGH); 580 max9286_check_config_link(priv, priv->source_mask); 581 max9286_configure_i2c(priv, false); 582 583 return max9286_set_pixelrate(priv); 584 } 585 586 static void max9286_notify_unbind(struct v4l2_async_notifier *notifier, 587 struct v4l2_subdev *subdev, 588 struct v4l2_async_subdev *asd) 589 { 590 struct max9286_priv *priv = sd_to_max9286(notifier->sd); 591 struct max9286_source *source = to_max9286_asd(asd)->source; 592 unsigned int index = to_index(priv, source); 593 594 source->sd = NULL; 595 priv->bound_sources &= ~BIT(index); 596 } 597 598 static const struct v4l2_async_notifier_operations max9286_notify_ops = { 599 .bound = max9286_notify_bound, 600 .unbind = max9286_notify_unbind, 601 }; 602 603 static int max9286_v4l2_notifier_register(struct max9286_priv *priv) 604 { 605 struct device *dev = &priv->client->dev; 606 struct max9286_source *source = NULL; 607 int ret; 608 609 if (!priv->nsources) 610 return 0; 611 612 v4l2_async_nf_init(&priv->notifier); 613 614 for_each_source(priv, source) { 615 unsigned int i = to_index(priv, source); 616 struct max9286_asd *mas; 617 618 mas = v4l2_async_nf_add_fwnode(&priv->notifier, source->fwnode, 619 struct max9286_asd); 620 if (IS_ERR(mas)) { 621 dev_err(dev, "Failed to add subdev for source %u: %ld", 622 i, PTR_ERR(mas)); 623 v4l2_async_nf_cleanup(&priv->notifier); 624 return PTR_ERR(mas); 625 } 626 627 mas->source = source; 628 } 629 630 priv->notifier.ops = &max9286_notify_ops; 631 632 ret = v4l2_async_subdev_nf_register(&priv->sd, &priv->notifier); 633 if (ret) { 634 dev_err(dev, "Failed to register subdev_notifier"); 635 v4l2_async_nf_cleanup(&priv->notifier); 636 return ret; 637 } 638 639 return 0; 640 } 641 642 static void max9286_v4l2_notifier_unregister(struct max9286_priv *priv) 643 { 644 if (!priv->nsources) 645 return; 646 647 v4l2_async_nf_unregister(&priv->notifier); 648 v4l2_async_nf_cleanup(&priv->notifier); 649 } 650 651 static int max9286_s_stream(struct v4l2_subdev *sd, int enable) 652 { 653 struct max9286_priv *priv = sd_to_max9286(sd); 654 struct max9286_source *source; 655 unsigned int i; 656 bool sync = false; 657 int ret; 658 659 if (enable) { 660 /* 661 * The frame sync between cameras is transmitted across the 662 * reverse channel as GPIO. We must open all channels while 663 * streaming to allow this synchronisation signal to be shared. 664 */ 665 max9286_i2c_mux_open(priv); 666 667 /* Start all cameras. */ 668 for_each_source(priv, source) { 669 ret = v4l2_subdev_call(source->sd, video, s_stream, 1); 670 if (ret) 671 return ret; 672 } 673 674 ret = max9286_check_video_links(priv); 675 if (ret) 676 return ret; 677 678 /* 679 * Wait until frame synchronization is locked. 680 * 681 * Manual says frame sync locking should take ~6 VTS. 682 * From practical experience at least 8 are required. Give 683 * 12 complete frames time (~400ms at 30 fps) to achieve frame 684 * locking before returning error. 685 */ 686 for (i = 0; i < 40; i++) { 687 if (max9286_read(priv, 0x31) & MAX9286_FSYNC_LOCKED) { 688 sync = true; 689 break; 690 } 691 usleep_range(9000, 11000); 692 } 693 694 if (!sync) { 695 dev_err(&priv->client->dev, 696 "Failed to get frame synchronization\n"); 697 return -EXDEV; /* Invalid cross-device link */ 698 } 699 700 /* 701 * Enable CSI output, VC set according to link number. 702 * Bit 7 must be set (chip manual says it's 0 and reserved). 703 */ 704 max9286_write(priv, 0x15, 0x80 | MAX9286_VCTYPE | 705 MAX9286_CSIOUTEN | MAX9286_0X15_RESV); 706 } else { 707 max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV); 708 709 /* Stop all cameras. */ 710 for_each_source(priv, source) 711 v4l2_subdev_call(source->sd, video, s_stream, 0); 712 713 max9286_i2c_mux_close(priv); 714 } 715 716 return 0; 717 } 718 719 static int max9286_enum_mbus_code(struct v4l2_subdev *sd, 720 struct v4l2_subdev_state *sd_state, 721 struct v4l2_subdev_mbus_code_enum *code) 722 { 723 if (code->pad || code->index > 0) 724 return -EINVAL; 725 726 code->code = MEDIA_BUS_FMT_UYVY8_1X16; 727 728 return 0; 729 } 730 731 static struct v4l2_mbus_framefmt * 732 max9286_get_pad_format(struct max9286_priv *priv, 733 struct v4l2_subdev_state *sd_state, 734 unsigned int pad, u32 which) 735 { 736 switch (which) { 737 case V4L2_SUBDEV_FORMAT_TRY: 738 return v4l2_subdev_get_try_format(&priv->sd, sd_state, pad); 739 case V4L2_SUBDEV_FORMAT_ACTIVE: 740 return &priv->fmt[pad]; 741 default: 742 return NULL; 743 } 744 } 745 746 static int max9286_set_fmt(struct v4l2_subdev *sd, 747 struct v4l2_subdev_state *sd_state, 748 struct v4l2_subdev_format *format) 749 { 750 struct max9286_priv *priv = sd_to_max9286(sd); 751 struct v4l2_mbus_framefmt *cfg_fmt; 752 753 if (format->pad == MAX9286_SRC_PAD) 754 return -EINVAL; 755 756 /* Refuse non YUV422 formats as we hardcode DT to 8 bit YUV422 */ 757 switch (format->format.code) { 758 case MEDIA_BUS_FMT_UYVY8_1X16: 759 case MEDIA_BUS_FMT_VYUY8_1X16: 760 case MEDIA_BUS_FMT_YUYV8_1X16: 761 case MEDIA_BUS_FMT_YVYU8_1X16: 762 break; 763 default: 764 format->format.code = MEDIA_BUS_FMT_UYVY8_1X16; 765 break; 766 } 767 768 cfg_fmt = max9286_get_pad_format(priv, sd_state, format->pad, 769 format->which); 770 if (!cfg_fmt) 771 return -EINVAL; 772 773 mutex_lock(&priv->mutex); 774 *cfg_fmt = format->format; 775 mutex_unlock(&priv->mutex); 776 777 return 0; 778 } 779 780 static int max9286_get_fmt(struct v4l2_subdev *sd, 781 struct v4l2_subdev_state *sd_state, 782 struct v4l2_subdev_format *format) 783 { 784 struct max9286_priv *priv = sd_to_max9286(sd); 785 struct v4l2_mbus_framefmt *cfg_fmt; 786 unsigned int pad = format->pad; 787 788 /* 789 * Multiplexed Stream Support: Support link validation by returning the 790 * format of the first bound link. All links must have the same format, 791 * as we do not support mixing and matching of cameras connected to the 792 * max9286. 793 */ 794 if (pad == MAX9286_SRC_PAD) 795 pad = __ffs(priv->bound_sources); 796 797 cfg_fmt = max9286_get_pad_format(priv, sd_state, pad, format->which); 798 if (!cfg_fmt) 799 return -EINVAL; 800 801 mutex_lock(&priv->mutex); 802 format->format = *cfg_fmt; 803 mutex_unlock(&priv->mutex); 804 805 return 0; 806 } 807 808 static const struct v4l2_subdev_video_ops max9286_video_ops = { 809 .s_stream = max9286_s_stream, 810 }; 811 812 static const struct v4l2_subdev_pad_ops max9286_pad_ops = { 813 .enum_mbus_code = max9286_enum_mbus_code, 814 .get_fmt = max9286_get_fmt, 815 .set_fmt = max9286_set_fmt, 816 }; 817 818 static const struct v4l2_subdev_ops max9286_subdev_ops = { 819 .video = &max9286_video_ops, 820 .pad = &max9286_pad_ops, 821 }; 822 823 static void max9286_init_format(struct v4l2_mbus_framefmt *fmt) 824 { 825 fmt->width = 1280; 826 fmt->height = 800; 827 fmt->code = MEDIA_BUS_FMT_UYVY8_1X16; 828 fmt->colorspace = V4L2_COLORSPACE_SRGB; 829 fmt->field = V4L2_FIELD_NONE; 830 fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; 831 fmt->quantization = V4L2_QUANTIZATION_DEFAULT; 832 fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT; 833 } 834 835 static int max9286_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh) 836 { 837 struct v4l2_mbus_framefmt *format; 838 unsigned int i; 839 840 for (i = 0; i < MAX9286_N_SINKS; i++) { 841 format = v4l2_subdev_get_try_format(subdev, fh->state, i); 842 max9286_init_format(format); 843 } 844 845 return 0; 846 } 847 848 static const struct v4l2_subdev_internal_ops max9286_subdev_internal_ops = { 849 .open = max9286_open, 850 }; 851 852 static const struct media_entity_operations max9286_media_ops = { 853 .link_validate = v4l2_subdev_link_validate 854 }; 855 856 static int max9286_s_ctrl(struct v4l2_ctrl *ctrl) 857 { 858 switch (ctrl->id) { 859 case V4L2_CID_PIXEL_RATE: 860 return 0; 861 default: 862 return -EINVAL; 863 } 864 } 865 866 static const struct v4l2_ctrl_ops max9286_ctrl_ops = { 867 .s_ctrl = max9286_s_ctrl, 868 }; 869 870 static int max9286_v4l2_register(struct max9286_priv *priv) 871 { 872 struct device *dev = &priv->client->dev; 873 struct fwnode_handle *ep; 874 int ret; 875 int i; 876 877 /* Register v4l2 async notifiers for connected Camera subdevices */ 878 ret = max9286_v4l2_notifier_register(priv); 879 if (ret) { 880 dev_err(dev, "Unable to register V4L2 async notifiers\n"); 881 return ret; 882 } 883 884 /* Configure V4L2 for the MAX9286 itself */ 885 886 for (i = 0; i < MAX9286_N_SINKS; i++) 887 max9286_init_format(&priv->fmt[i]); 888 889 v4l2_i2c_subdev_init(&priv->sd, priv->client, &max9286_subdev_ops); 890 priv->sd.internal_ops = &max9286_subdev_internal_ops; 891 priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 892 893 v4l2_ctrl_handler_init(&priv->ctrls, 1); 894 priv->pixelrate = v4l2_ctrl_new_std(&priv->ctrls, 895 &max9286_ctrl_ops, 896 V4L2_CID_PIXEL_RATE, 897 1, INT_MAX, 1, 50000000); 898 899 priv->sd.ctrl_handler = &priv->ctrls; 900 ret = priv->ctrls.error; 901 if (ret) 902 goto err_async; 903 904 priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; 905 priv->sd.entity.ops = &max9286_media_ops; 906 907 priv->pads[MAX9286_SRC_PAD].flags = MEDIA_PAD_FL_SOURCE; 908 for (i = 0; i < MAX9286_SRC_PAD; i++) 909 priv->pads[i].flags = MEDIA_PAD_FL_SINK; 910 ret = media_entity_pads_init(&priv->sd.entity, MAX9286_N_PADS, 911 priv->pads); 912 if (ret) 913 goto err_async; 914 915 ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), MAX9286_SRC_PAD, 916 0, 0); 917 if (!ep) { 918 dev_err(dev, "Unable to retrieve endpoint on \"port@4\"\n"); 919 ret = -ENOENT; 920 goto err_async; 921 } 922 priv->sd.fwnode = ep; 923 924 ret = v4l2_async_register_subdev(&priv->sd); 925 if (ret < 0) { 926 dev_err(dev, "Unable to register subdevice\n"); 927 goto err_put_node; 928 } 929 930 return 0; 931 932 err_put_node: 933 fwnode_handle_put(ep); 934 err_async: 935 max9286_v4l2_notifier_unregister(priv); 936 937 return ret; 938 } 939 940 static void max9286_v4l2_unregister(struct max9286_priv *priv) 941 { 942 fwnode_handle_put(priv->sd.fwnode); 943 v4l2_async_unregister_subdev(&priv->sd); 944 max9286_v4l2_notifier_unregister(priv); 945 } 946 947 /* ----------------------------------------------------------------------------- 948 * Probe/Remove 949 */ 950 951 static int max9286_setup(struct max9286_priv *priv) 952 { 953 /* 954 * Link ordering values for all enabled links combinations. Orders must 955 * be assigned sequentially from 0 to the number of enabled links 956 * without leaving any hole for disabled links. We thus assign orders to 957 * enabled links first, and use the remaining order values for disabled 958 * links are all links must have a different order value; 959 */ 960 static const u8 link_order[] = { 961 (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxxx */ 962 (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxx0 */ 963 (3 << 6) | (2 << 4) | (0 << 2) | (1 << 0), /* xx0x */ 964 (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xx10 */ 965 (3 << 6) | (0 << 4) | (2 << 2) | (1 << 0), /* x0xx */ 966 (3 << 6) | (1 << 4) | (2 << 2) | (0 << 0), /* x1x0 */ 967 (3 << 6) | (1 << 4) | (0 << 2) | (2 << 0), /* x10x */ 968 (3 << 6) | (1 << 4) | (1 << 2) | (0 << 0), /* x210 */ 969 (0 << 6) | (3 << 4) | (2 << 2) | (1 << 0), /* 0xxx */ 970 (1 << 6) | (3 << 4) | (2 << 2) | (0 << 0), /* 1xx0 */ 971 (1 << 6) | (3 << 4) | (0 << 2) | (2 << 0), /* 1x0x */ 972 (2 << 6) | (3 << 4) | (1 << 2) | (0 << 0), /* 2x10 */ 973 (1 << 6) | (0 << 4) | (3 << 2) | (2 << 0), /* 10xx */ 974 (2 << 6) | (1 << 4) | (3 << 2) | (0 << 0), /* 21x0 */ 975 (2 << 6) | (1 << 4) | (0 << 2) | (3 << 0), /* 210x */ 976 (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* 3210 */ 977 }; 978 979 /* 980 * Set the I2C bus speed. 981 * 982 * Enable I2C Local Acknowledge during the probe sequences of the camera 983 * only. This should be disabled after the mux is initialised. 984 */ 985 max9286_configure_i2c(priv, true); 986 max9286_reverse_channel_setup(priv, priv->init_rev_chan_mv); 987 988 /* 989 * Enable GMSL links, mask unused ones and autodetect link 990 * used as CSI clock source. 991 */ 992 max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask); 993 max9286_write(priv, 0x0b, link_order[priv->route_mask]); 994 max9286_write(priv, 0x69, (0xf & ~priv->route_mask)); 995 996 /* 997 * Video format setup: 998 * Disable CSI output, VC is set according to Link number. 999 */ 1000 max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV); 1001 1002 /* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */ 1003 max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL | 1004 MAX9286_CSILANECNT(priv->csi2_data_lanes) | 1005 MAX9286_DATATYPE_YUV422_8BIT); 1006 1007 /* Automatic: FRAMESYNC taken from the slowest Link. */ 1008 max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ | 1009 MAX9286_FSYNCMETH_AUTO); 1010 1011 /* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */ 1012 max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS | 1013 MAX9286_HVSRC_D14); 1014 1015 /* 1016 * The overlap window seems to provide additional validation by tracking 1017 * the delay between vsync and frame sync, generating an error if the 1018 * delay is bigger than the programmed window, though it's not yet clear 1019 * what value should be set. 1020 * 1021 * As it's an optional value and can be disabled, we do so by setting 1022 * a 0 overlap value. 1023 */ 1024 max9286_write(priv, 0x63, 0); 1025 max9286_write(priv, 0x64, 0); 1026 1027 /* 1028 * Wait for 2ms to allow the link to resynchronize after the 1029 * configuration change. 1030 */ 1031 usleep_range(2000, 5000); 1032 1033 return 0; 1034 } 1035 1036 static int max9286_gpio_set(struct max9286_priv *priv, unsigned int offset, 1037 int value) 1038 { 1039 if (value) 1040 priv->gpio_state |= BIT(offset); 1041 else 1042 priv->gpio_state &= ~BIT(offset); 1043 1044 return max9286_write(priv, 0x0f, 1045 MAX9286_0X0F_RESERVED | priv->gpio_state); 1046 } 1047 1048 static void max9286_gpiochip_set(struct gpio_chip *chip, 1049 unsigned int offset, int value) 1050 { 1051 struct max9286_priv *priv = gpiochip_get_data(chip); 1052 1053 max9286_gpio_set(priv, offset, value); 1054 } 1055 1056 static int max9286_gpiochip_get(struct gpio_chip *chip, unsigned int offset) 1057 { 1058 struct max9286_priv *priv = gpiochip_get_data(chip); 1059 1060 return priv->gpio_state & BIT(offset); 1061 } 1062 1063 static int max9286_register_gpio(struct max9286_priv *priv) 1064 { 1065 struct device *dev = &priv->client->dev; 1066 struct gpio_chip *gpio = &priv->gpio; 1067 int ret; 1068 1069 /* Configure the GPIO */ 1070 gpio->label = dev_name(dev); 1071 gpio->parent = dev; 1072 gpio->owner = THIS_MODULE; 1073 gpio->ngpio = 2; 1074 gpio->base = -1; 1075 gpio->set = max9286_gpiochip_set; 1076 gpio->get = max9286_gpiochip_get; 1077 gpio->can_sleep = true; 1078 1079 ret = devm_gpiochip_add_data(dev, gpio, priv); 1080 if (ret) 1081 dev_err(dev, "Unable to create gpio_chip\n"); 1082 1083 return ret; 1084 } 1085 1086 static int max9286_parse_gpios(struct max9286_priv *priv) 1087 { 1088 struct device *dev = &priv->client->dev; 1089 int ret; 1090 1091 /* GPIO values default to high */ 1092 priv->gpio_state = BIT(0) | BIT(1); 1093 1094 /* 1095 * Parse the "gpio-poc" vendor property. If the property is not 1096 * specified the camera power is controlled by a regulator. 1097 */ 1098 ret = of_property_read_u32_array(dev->of_node, "maxim,gpio-poc", 1099 priv->gpio_poc, 2); 1100 if (ret == -EINVAL) { 1101 /* 1102 * If gpio lines are not used for the camera power, register 1103 * a gpio controller for consumers. 1104 */ 1105 ret = max9286_register_gpio(priv); 1106 if (ret) 1107 return ret; 1108 1109 priv->regulator = devm_regulator_get(dev, "poc"); 1110 if (IS_ERR(priv->regulator)) { 1111 return dev_err_probe(dev, PTR_ERR(priv->regulator), 1112 "Unable to get PoC regulator (%ld)\n", 1113 PTR_ERR(priv->regulator)); 1114 } 1115 1116 return 0; 1117 } 1118 1119 /* If the property is specified make sure it is well formed. */ 1120 if (ret || priv->gpio_poc[0] > 1 || 1121 (priv->gpio_poc[1] != GPIO_ACTIVE_HIGH && 1122 priv->gpio_poc[1] != GPIO_ACTIVE_LOW)) { 1123 dev_err(dev, "Invalid 'gpio-poc' property\n"); 1124 return -EINVAL; 1125 } 1126 1127 return 0; 1128 } 1129 1130 static int max9286_poc_enable(struct max9286_priv *priv, bool enable) 1131 { 1132 int ret; 1133 1134 /* If the regulator is not available, use gpio to control power. */ 1135 if (!priv->regulator) 1136 ret = max9286_gpio_set(priv, priv->gpio_poc[0], 1137 enable ^ priv->gpio_poc[1]); 1138 else if (enable) 1139 ret = regulator_enable(priv->regulator); 1140 else 1141 ret = regulator_disable(priv->regulator); 1142 1143 if (ret < 0) 1144 dev_err(&priv->client->dev, "Unable to turn power %s\n", 1145 enable ? "on" : "off"); 1146 1147 return ret; 1148 } 1149 1150 static int max9286_init(struct max9286_priv *priv) 1151 { 1152 struct i2c_client *client = priv->client; 1153 int ret; 1154 1155 ret = max9286_poc_enable(priv, true); 1156 if (ret) 1157 return ret; 1158 1159 ret = max9286_setup(priv); 1160 if (ret) { 1161 dev_err(&client->dev, "Unable to setup max9286\n"); 1162 goto err_poc_disable; 1163 } 1164 1165 /* 1166 * Register all V4L2 interactions for the MAX9286 and notifiers for 1167 * any subdevices connected. 1168 */ 1169 ret = max9286_v4l2_register(priv); 1170 if (ret) { 1171 dev_err(&client->dev, "Failed to register with V4L2\n"); 1172 goto err_poc_disable; 1173 } 1174 1175 ret = max9286_i2c_mux_init(priv); 1176 if (ret) { 1177 dev_err(&client->dev, "Unable to initialize I2C multiplexer\n"); 1178 goto err_v4l2_register; 1179 } 1180 1181 /* Leave the mux channels disabled until they are selected. */ 1182 max9286_i2c_mux_close(priv); 1183 1184 return 0; 1185 1186 err_v4l2_register: 1187 max9286_v4l2_unregister(priv); 1188 err_poc_disable: 1189 max9286_poc_enable(priv, false); 1190 1191 return ret; 1192 } 1193 1194 static void max9286_cleanup_dt(struct max9286_priv *priv) 1195 { 1196 struct max9286_source *source; 1197 1198 for_each_source(priv, source) { 1199 fwnode_handle_put(source->fwnode); 1200 source->fwnode = NULL; 1201 } 1202 } 1203 1204 static int max9286_parse_dt(struct max9286_priv *priv) 1205 { 1206 struct device *dev = &priv->client->dev; 1207 struct device_node *i2c_mux; 1208 struct device_node *node = NULL; 1209 unsigned int i2c_mux_mask = 0; 1210 u32 reverse_channel_microvolt; 1211 1212 /* Balance the of_node_put() performed by of_find_node_by_name(). */ 1213 of_node_get(dev->of_node); 1214 i2c_mux = of_find_node_by_name(dev->of_node, "i2c-mux"); 1215 if (!i2c_mux) { 1216 dev_err(dev, "Failed to find i2c-mux node\n"); 1217 return -EINVAL; 1218 } 1219 1220 /* Identify which i2c-mux channels are enabled */ 1221 for_each_child_of_node(i2c_mux, node) { 1222 u32 id = 0; 1223 1224 of_property_read_u32(node, "reg", &id); 1225 if (id >= MAX9286_NUM_GMSL) 1226 continue; 1227 1228 if (!of_device_is_available(node)) { 1229 dev_dbg(dev, "Skipping disabled I2C bus port %u\n", id); 1230 continue; 1231 } 1232 1233 i2c_mux_mask |= BIT(id); 1234 } 1235 of_node_put(node); 1236 of_node_put(i2c_mux); 1237 1238 /* Parse the endpoints */ 1239 for_each_endpoint_of_node(dev->of_node, node) { 1240 struct max9286_source *source; 1241 struct of_endpoint ep; 1242 1243 of_graph_parse_endpoint(node, &ep); 1244 dev_dbg(dev, "Endpoint %pOF on port %d", 1245 ep.local_node, ep.port); 1246 1247 if (ep.port > MAX9286_NUM_GMSL) { 1248 dev_err(dev, "Invalid endpoint %s on port %d", 1249 of_node_full_name(ep.local_node), ep.port); 1250 continue; 1251 } 1252 1253 /* For the source endpoint just parse the bus configuration. */ 1254 if (ep.port == MAX9286_SRC_PAD) { 1255 struct v4l2_fwnode_endpoint vep = { 1256 .bus_type = V4L2_MBUS_CSI2_DPHY 1257 }; 1258 int ret; 1259 1260 ret = v4l2_fwnode_endpoint_parse( 1261 of_fwnode_handle(node), &vep); 1262 if (ret) { 1263 of_node_put(node); 1264 return ret; 1265 } 1266 1267 priv->csi2_data_lanes = 1268 vep.bus.mipi_csi2.num_data_lanes; 1269 1270 continue; 1271 } 1272 1273 /* Skip if the corresponding GMSL link is unavailable. */ 1274 if (!(i2c_mux_mask & BIT(ep.port))) 1275 continue; 1276 1277 if (priv->sources[ep.port].fwnode) { 1278 dev_err(dev, 1279 "Multiple port endpoints are not supported: %d", 1280 ep.port); 1281 1282 continue; 1283 } 1284 1285 source = &priv->sources[ep.port]; 1286 source->fwnode = fwnode_graph_get_remote_endpoint( 1287 of_fwnode_handle(node)); 1288 if (!source->fwnode) { 1289 dev_err(dev, 1290 "Endpoint %pOF has no remote endpoint connection\n", 1291 ep.local_node); 1292 1293 continue; 1294 } 1295 1296 priv->source_mask |= BIT(ep.port); 1297 priv->nsources++; 1298 } 1299 of_node_put(node); 1300 1301 /* 1302 * Parse the initial value of the reverse channel amplitude from 1303 * the firmware interface and convert it to millivolts. 1304 * 1305 * Default it to 170mV for backward compatibility with DTBs that do not 1306 * provide the property. 1307 */ 1308 if (of_property_read_u32(dev->of_node, 1309 "maxim,reverse-channel-microvolt", 1310 &reverse_channel_microvolt)) 1311 priv->init_rev_chan_mv = 170; 1312 else 1313 priv->init_rev_chan_mv = reverse_channel_microvolt / 1000U; 1314 1315 priv->route_mask = priv->source_mask; 1316 1317 return 0; 1318 } 1319 1320 static int max9286_probe(struct i2c_client *client) 1321 { 1322 struct max9286_priv *priv; 1323 int ret; 1324 1325 priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); 1326 if (!priv) 1327 return -ENOMEM; 1328 1329 mutex_init(&priv->mutex); 1330 1331 priv->client = client; 1332 1333 priv->gpiod_pwdn = devm_gpiod_get_optional(&client->dev, "enable", 1334 GPIOD_OUT_HIGH); 1335 if (IS_ERR(priv->gpiod_pwdn)) 1336 return PTR_ERR(priv->gpiod_pwdn); 1337 1338 gpiod_set_consumer_name(priv->gpiod_pwdn, "max9286-pwdn"); 1339 gpiod_set_value_cansleep(priv->gpiod_pwdn, 1); 1340 1341 /* Wait at least 4ms before the I2C lines latch to the address */ 1342 if (priv->gpiod_pwdn) 1343 usleep_range(4000, 5000); 1344 1345 /* 1346 * The MAX9286 starts by default with all ports enabled, we disable all 1347 * ports early to ensure that all channels are disabled if we error out 1348 * and keep the bus consistent. 1349 */ 1350 max9286_i2c_mux_close(priv); 1351 1352 /* 1353 * The MAX9286 initialises with auto-acknowledge enabled by default. 1354 * This can be invasive to other transactions on the same bus, so 1355 * disable it early. It will be enabled only as and when needed. 1356 */ 1357 max9286_configure_i2c(priv, false); 1358 1359 ret = max9286_parse_gpios(priv); 1360 if (ret) 1361 goto err_powerdown; 1362 1363 ret = max9286_parse_dt(priv); 1364 if (ret) 1365 goto err_powerdown; 1366 1367 ret = max9286_init(priv); 1368 if (ret < 0) 1369 goto err_cleanup_dt; 1370 1371 return 0; 1372 1373 err_cleanup_dt: 1374 max9286_cleanup_dt(priv); 1375 err_powerdown: 1376 gpiod_set_value_cansleep(priv->gpiod_pwdn, 0); 1377 1378 return ret; 1379 } 1380 1381 static int max9286_remove(struct i2c_client *client) 1382 { 1383 struct max9286_priv *priv = sd_to_max9286(i2c_get_clientdata(client)); 1384 1385 i2c_mux_del_adapters(priv->mux); 1386 1387 max9286_v4l2_unregister(priv); 1388 1389 max9286_poc_enable(priv, false); 1390 1391 gpiod_set_value_cansleep(priv->gpiod_pwdn, 0); 1392 1393 max9286_cleanup_dt(priv); 1394 1395 return 0; 1396 } 1397 1398 static const struct of_device_id max9286_dt_ids[] = { 1399 { .compatible = "maxim,max9286" }, 1400 {}, 1401 }; 1402 MODULE_DEVICE_TABLE(of, max9286_dt_ids); 1403 1404 static struct i2c_driver max9286_i2c_driver = { 1405 .driver = { 1406 .name = "max9286", 1407 .of_match_table = of_match_ptr(max9286_dt_ids), 1408 }, 1409 .probe_new = max9286_probe, 1410 .remove = max9286_remove, 1411 }; 1412 1413 module_i2c_driver(max9286_i2c_driver); 1414 1415 MODULE_DESCRIPTION("Maxim MAX9286 GMSL Deserializer Driver"); 1416 MODULE_AUTHOR("Jacopo Mondi, Kieran Bingham, Laurent Pinchart, Niklas Söderlund, Vladimir Barinov"); 1417 MODULE_LICENSE("GPL"); 1418