1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (C) 2018 Intel Corporation 3 4 #include <linux/acpi.h> 5 #include <linux/clk.h> 6 #include <linux/delay.h> 7 #include <linux/i2c.h> 8 #include <linux/module.h> 9 #include <linux/pm_runtime.h> 10 #include <media/v4l2-ctrls.h> 11 #include <media/v4l2-device.h> 12 #include <asm/unaligned.h> 13 14 #define IMX258_REG_VALUE_08BIT 1 15 #define IMX258_REG_VALUE_16BIT 2 16 17 #define IMX258_REG_MODE_SELECT 0x0100 18 #define IMX258_MODE_STANDBY 0x00 19 #define IMX258_MODE_STREAMING 0x01 20 21 /* Chip ID */ 22 #define IMX258_REG_CHIP_ID 0x0016 23 #define IMX258_CHIP_ID 0x0258 24 25 /* V_TIMING internal */ 26 #define IMX258_VTS_30FPS 0x0c98 27 #define IMX258_VTS_30FPS_2K 0x0638 28 #define IMX258_VTS_30FPS_VGA 0x034c 29 #define IMX258_VTS_MAX 0xffff 30 31 /*Frame Length Line*/ 32 #define IMX258_FLL_MIN 0x08a6 33 #define IMX258_FLL_MAX 0xffff 34 #define IMX258_FLL_STEP 1 35 #define IMX258_FLL_DEFAULT 0x0c98 36 37 /* HBLANK control - read only */ 38 #define IMX258_PPL_DEFAULT 5352 39 40 /* Exposure control */ 41 #define IMX258_REG_EXPOSURE 0x0202 42 #define IMX258_EXPOSURE_MIN 4 43 #define IMX258_EXPOSURE_STEP 1 44 #define IMX258_EXPOSURE_DEFAULT 0x640 45 #define IMX258_EXPOSURE_MAX 65535 46 47 /* Analog gain control */ 48 #define IMX258_REG_ANALOG_GAIN 0x0204 49 #define IMX258_ANA_GAIN_MIN 0 50 #define IMX258_ANA_GAIN_MAX 0x1fff 51 #define IMX258_ANA_GAIN_STEP 1 52 #define IMX258_ANA_GAIN_DEFAULT 0x0 53 54 /* Digital gain control */ 55 #define IMX258_REG_GR_DIGITAL_GAIN 0x020e 56 #define IMX258_REG_R_DIGITAL_GAIN 0x0210 57 #define IMX258_REG_B_DIGITAL_GAIN 0x0212 58 #define IMX258_REG_GB_DIGITAL_GAIN 0x0214 59 #define IMX258_DGTL_GAIN_MIN 0 60 #define IMX258_DGTL_GAIN_MAX 4096 /* Max = 0xFFF */ 61 #define IMX258_DGTL_GAIN_DEFAULT 1024 62 #define IMX258_DGTL_GAIN_STEP 1 63 64 /* Test Pattern Control */ 65 #define IMX258_REG_TEST_PATTERN 0x0600 66 67 /* Orientation */ 68 #define REG_MIRROR_FLIP_CONTROL 0x0101 69 #define REG_CONFIG_MIRROR_FLIP 0x03 70 #define REG_CONFIG_FLIP_TEST_PATTERN 0x02 71 72 /* Input clock frequency in Hz */ 73 #define IMX258_INPUT_CLOCK_FREQ 19200000 74 75 struct imx258_reg { 76 u16 address; 77 u8 val; 78 }; 79 80 struct imx258_reg_list { 81 u32 num_of_regs; 82 const struct imx258_reg *regs; 83 }; 84 85 /* Link frequency config */ 86 struct imx258_link_freq_config { 87 u32 pixels_per_line; 88 89 /* PLL registers for this link frequency */ 90 struct imx258_reg_list reg_list; 91 }; 92 93 /* Mode : resolution and related config&values */ 94 struct imx258_mode { 95 /* Frame width */ 96 u32 width; 97 /* Frame height */ 98 u32 height; 99 100 /* V-timing */ 101 u32 vts_def; 102 u32 vts_min; 103 104 /* Index of Link frequency config to be used */ 105 u32 link_freq_index; 106 /* Default register values */ 107 struct imx258_reg_list reg_list; 108 }; 109 110 /* 4208x3118 needs 1267Mbps/lane, 4 lanes */ 111 static const struct imx258_reg mipi_data_rate_1267mbps[] = { 112 { 0x0301, 0x05 }, 113 { 0x0303, 0x02 }, 114 { 0x0305, 0x03 }, 115 { 0x0306, 0x00 }, 116 { 0x0307, 0xC6 }, 117 { 0x0309, 0x0A }, 118 { 0x030B, 0x01 }, 119 { 0x030D, 0x02 }, 120 { 0x030E, 0x00 }, 121 { 0x030F, 0xD8 }, 122 { 0x0310, 0x00 }, 123 { 0x0820, 0x13 }, 124 { 0x0821, 0x4C }, 125 { 0x0822, 0xCC }, 126 { 0x0823, 0xCC }, 127 }; 128 129 static const struct imx258_reg mipi_data_rate_640mbps[] = { 130 { 0x0301, 0x05 }, 131 { 0x0303, 0x02 }, 132 { 0x0305, 0x03 }, 133 { 0x0306, 0x00 }, 134 { 0x0307, 0x64 }, 135 { 0x0309, 0x0A }, 136 { 0x030B, 0x01 }, 137 { 0x030D, 0x02 }, 138 { 0x030E, 0x00 }, 139 { 0x030F, 0xD8 }, 140 { 0x0310, 0x00 }, 141 { 0x0820, 0x0A }, 142 { 0x0821, 0x00 }, 143 { 0x0822, 0x00 }, 144 { 0x0823, 0x00 }, 145 }; 146 147 static const struct imx258_reg mode_4208x3118_regs[] = { 148 { 0x0136, 0x13 }, 149 { 0x0137, 0x33 }, 150 { 0x3051, 0x00 }, 151 { 0x3052, 0x00 }, 152 { 0x4E21, 0x14 }, 153 { 0x6B11, 0xCF }, 154 { 0x7FF0, 0x08 }, 155 { 0x7FF1, 0x0F }, 156 { 0x7FF2, 0x08 }, 157 { 0x7FF3, 0x1B }, 158 { 0x7FF4, 0x23 }, 159 { 0x7FF5, 0x60 }, 160 { 0x7FF6, 0x00 }, 161 { 0x7FF7, 0x01 }, 162 { 0x7FF8, 0x00 }, 163 { 0x7FF9, 0x78 }, 164 { 0x7FFA, 0x00 }, 165 { 0x7FFB, 0x00 }, 166 { 0x7FFC, 0x00 }, 167 { 0x7FFD, 0x00 }, 168 { 0x7FFE, 0x00 }, 169 { 0x7FFF, 0x03 }, 170 { 0x7F76, 0x03 }, 171 { 0x7F77, 0xFE }, 172 { 0x7FA8, 0x03 }, 173 { 0x7FA9, 0xFE }, 174 { 0x7B24, 0x81 }, 175 { 0x7B25, 0x00 }, 176 { 0x6564, 0x07 }, 177 { 0x6B0D, 0x41 }, 178 { 0x653D, 0x04 }, 179 { 0x6B05, 0x8C }, 180 { 0x6B06, 0xF9 }, 181 { 0x6B08, 0x65 }, 182 { 0x6B09, 0xFC }, 183 { 0x6B0A, 0xCF }, 184 { 0x6B0B, 0xD2 }, 185 { 0x6700, 0x0E }, 186 { 0x6707, 0x0E }, 187 { 0x9104, 0x00 }, 188 { 0x4648, 0x7F }, 189 { 0x7420, 0x00 }, 190 { 0x7421, 0x1C }, 191 { 0x7422, 0x00 }, 192 { 0x7423, 0xD7 }, 193 { 0x5F04, 0x00 }, 194 { 0x5F05, 0xED }, 195 { 0x0112, 0x0A }, 196 { 0x0113, 0x0A }, 197 { 0x0114, 0x03 }, 198 { 0x0342, 0x14 }, 199 { 0x0343, 0xE8 }, 200 { 0x0340, 0x0C }, 201 { 0x0341, 0x50 }, 202 { 0x0344, 0x00 }, 203 { 0x0345, 0x00 }, 204 { 0x0346, 0x00 }, 205 { 0x0347, 0x00 }, 206 { 0x0348, 0x10 }, 207 { 0x0349, 0x6F }, 208 { 0x034A, 0x0C }, 209 { 0x034B, 0x2E }, 210 { 0x0381, 0x01 }, 211 { 0x0383, 0x01 }, 212 { 0x0385, 0x01 }, 213 { 0x0387, 0x01 }, 214 { 0x0900, 0x00 }, 215 { 0x0901, 0x11 }, 216 { 0x0401, 0x00 }, 217 { 0x0404, 0x00 }, 218 { 0x0405, 0x10 }, 219 { 0x0408, 0x00 }, 220 { 0x0409, 0x00 }, 221 { 0x040A, 0x00 }, 222 { 0x040B, 0x00 }, 223 { 0x040C, 0x10 }, 224 { 0x040D, 0x70 }, 225 { 0x040E, 0x0C }, 226 { 0x040F, 0x30 }, 227 { 0x3038, 0x00 }, 228 { 0x303A, 0x00 }, 229 { 0x303B, 0x10 }, 230 { 0x300D, 0x00 }, 231 { 0x034C, 0x10 }, 232 { 0x034D, 0x70 }, 233 { 0x034E, 0x0C }, 234 { 0x034F, 0x30 }, 235 { 0x0350, 0x01 }, 236 { 0x0202, 0x0C }, 237 { 0x0203, 0x46 }, 238 { 0x0204, 0x00 }, 239 { 0x0205, 0x00 }, 240 { 0x020E, 0x01 }, 241 { 0x020F, 0x00 }, 242 { 0x0210, 0x01 }, 243 { 0x0211, 0x00 }, 244 { 0x0212, 0x01 }, 245 { 0x0213, 0x00 }, 246 { 0x0214, 0x01 }, 247 { 0x0215, 0x00 }, 248 { 0x7BCD, 0x00 }, 249 { 0x94DC, 0x20 }, 250 { 0x94DD, 0x20 }, 251 { 0x94DE, 0x20 }, 252 { 0x95DC, 0x20 }, 253 { 0x95DD, 0x20 }, 254 { 0x95DE, 0x20 }, 255 { 0x7FB0, 0x00 }, 256 { 0x9010, 0x3E }, 257 { 0x9419, 0x50 }, 258 { 0x941B, 0x50 }, 259 { 0x9519, 0x50 }, 260 { 0x951B, 0x50 }, 261 { 0x3030, 0x00 }, 262 { 0x3032, 0x00 }, 263 { 0x0220, 0x00 }, 264 }; 265 266 static const struct imx258_reg mode_2104_1560_regs[] = { 267 { 0x0136, 0x13 }, 268 { 0x0137, 0x33 }, 269 { 0x3051, 0x00 }, 270 { 0x3052, 0x00 }, 271 { 0x4E21, 0x14 }, 272 { 0x6B11, 0xCF }, 273 { 0x7FF0, 0x08 }, 274 { 0x7FF1, 0x0F }, 275 { 0x7FF2, 0x08 }, 276 { 0x7FF3, 0x1B }, 277 { 0x7FF4, 0x23 }, 278 { 0x7FF5, 0x60 }, 279 { 0x7FF6, 0x00 }, 280 { 0x7FF7, 0x01 }, 281 { 0x7FF8, 0x00 }, 282 { 0x7FF9, 0x78 }, 283 { 0x7FFA, 0x00 }, 284 { 0x7FFB, 0x00 }, 285 { 0x7FFC, 0x00 }, 286 { 0x7FFD, 0x00 }, 287 { 0x7FFE, 0x00 }, 288 { 0x7FFF, 0x03 }, 289 { 0x7F76, 0x03 }, 290 { 0x7F77, 0xFE }, 291 { 0x7FA8, 0x03 }, 292 { 0x7FA9, 0xFE }, 293 { 0x7B24, 0x81 }, 294 { 0x7B25, 0x00 }, 295 { 0x6564, 0x07 }, 296 { 0x6B0D, 0x41 }, 297 { 0x653D, 0x04 }, 298 { 0x6B05, 0x8C }, 299 { 0x6B06, 0xF9 }, 300 { 0x6B08, 0x65 }, 301 { 0x6B09, 0xFC }, 302 { 0x6B0A, 0xCF }, 303 { 0x6B0B, 0xD2 }, 304 { 0x6700, 0x0E }, 305 { 0x6707, 0x0E }, 306 { 0x9104, 0x00 }, 307 { 0x4648, 0x7F }, 308 { 0x7420, 0x00 }, 309 { 0x7421, 0x1C }, 310 { 0x7422, 0x00 }, 311 { 0x7423, 0xD7 }, 312 { 0x5F04, 0x00 }, 313 { 0x5F05, 0xED }, 314 { 0x0112, 0x0A }, 315 { 0x0113, 0x0A }, 316 { 0x0114, 0x03 }, 317 { 0x0342, 0x14 }, 318 { 0x0343, 0xE8 }, 319 { 0x0340, 0x06 }, 320 { 0x0341, 0x38 }, 321 { 0x0344, 0x00 }, 322 { 0x0345, 0x00 }, 323 { 0x0346, 0x00 }, 324 { 0x0347, 0x00 }, 325 { 0x0348, 0x10 }, 326 { 0x0349, 0x6F }, 327 { 0x034A, 0x0C }, 328 { 0x034B, 0x2E }, 329 { 0x0381, 0x01 }, 330 { 0x0383, 0x01 }, 331 { 0x0385, 0x01 }, 332 { 0x0387, 0x01 }, 333 { 0x0900, 0x01 }, 334 { 0x0901, 0x12 }, 335 { 0x0401, 0x01 }, 336 { 0x0404, 0x00 }, 337 { 0x0405, 0x20 }, 338 { 0x0408, 0x00 }, 339 { 0x0409, 0x02 }, 340 { 0x040A, 0x00 }, 341 { 0x040B, 0x00 }, 342 { 0x040C, 0x10 }, 343 { 0x040D, 0x6A }, 344 { 0x040E, 0x06 }, 345 { 0x040F, 0x18 }, 346 { 0x3038, 0x00 }, 347 { 0x303A, 0x00 }, 348 { 0x303B, 0x10 }, 349 { 0x300D, 0x00 }, 350 { 0x034C, 0x08 }, 351 { 0x034D, 0x38 }, 352 { 0x034E, 0x06 }, 353 { 0x034F, 0x18 }, 354 { 0x0350, 0x01 }, 355 { 0x0202, 0x06 }, 356 { 0x0203, 0x2E }, 357 { 0x0204, 0x00 }, 358 { 0x0205, 0x00 }, 359 { 0x020E, 0x01 }, 360 { 0x020F, 0x00 }, 361 { 0x0210, 0x01 }, 362 { 0x0211, 0x00 }, 363 { 0x0212, 0x01 }, 364 { 0x0213, 0x00 }, 365 { 0x0214, 0x01 }, 366 { 0x0215, 0x00 }, 367 { 0x7BCD, 0x01 }, 368 { 0x94DC, 0x20 }, 369 { 0x94DD, 0x20 }, 370 { 0x94DE, 0x20 }, 371 { 0x95DC, 0x20 }, 372 { 0x95DD, 0x20 }, 373 { 0x95DE, 0x20 }, 374 { 0x7FB0, 0x00 }, 375 { 0x9010, 0x3E }, 376 { 0x9419, 0x50 }, 377 { 0x941B, 0x50 }, 378 { 0x9519, 0x50 }, 379 { 0x951B, 0x50 }, 380 { 0x3030, 0x00 }, 381 { 0x3032, 0x00 }, 382 { 0x0220, 0x00 }, 383 }; 384 385 static const struct imx258_reg mode_1048_780_regs[] = { 386 { 0x0136, 0x13 }, 387 { 0x0137, 0x33 }, 388 { 0x3051, 0x00 }, 389 { 0x3052, 0x00 }, 390 { 0x4E21, 0x14 }, 391 { 0x6B11, 0xCF }, 392 { 0x7FF0, 0x08 }, 393 { 0x7FF1, 0x0F }, 394 { 0x7FF2, 0x08 }, 395 { 0x7FF3, 0x1B }, 396 { 0x7FF4, 0x23 }, 397 { 0x7FF5, 0x60 }, 398 { 0x7FF6, 0x00 }, 399 { 0x7FF7, 0x01 }, 400 { 0x7FF8, 0x00 }, 401 { 0x7FF9, 0x78 }, 402 { 0x7FFA, 0x00 }, 403 { 0x7FFB, 0x00 }, 404 { 0x7FFC, 0x00 }, 405 { 0x7FFD, 0x00 }, 406 { 0x7FFE, 0x00 }, 407 { 0x7FFF, 0x03 }, 408 { 0x7F76, 0x03 }, 409 { 0x7F77, 0xFE }, 410 { 0x7FA8, 0x03 }, 411 { 0x7FA9, 0xFE }, 412 { 0x7B24, 0x81 }, 413 { 0x7B25, 0x00 }, 414 { 0x6564, 0x07 }, 415 { 0x6B0D, 0x41 }, 416 { 0x653D, 0x04 }, 417 { 0x6B05, 0x8C }, 418 { 0x6B06, 0xF9 }, 419 { 0x6B08, 0x65 }, 420 { 0x6B09, 0xFC }, 421 { 0x6B0A, 0xCF }, 422 { 0x6B0B, 0xD2 }, 423 { 0x6700, 0x0E }, 424 { 0x6707, 0x0E }, 425 { 0x9104, 0x00 }, 426 { 0x4648, 0x7F }, 427 { 0x7420, 0x00 }, 428 { 0x7421, 0x1C }, 429 { 0x7422, 0x00 }, 430 { 0x7423, 0xD7 }, 431 { 0x5F04, 0x00 }, 432 { 0x5F05, 0xED }, 433 { 0x0112, 0x0A }, 434 { 0x0113, 0x0A }, 435 { 0x0114, 0x03 }, 436 { 0x0342, 0x14 }, 437 { 0x0343, 0xE8 }, 438 { 0x0340, 0x03 }, 439 { 0x0341, 0x4C }, 440 { 0x0344, 0x00 }, 441 { 0x0345, 0x00 }, 442 { 0x0346, 0x00 }, 443 { 0x0347, 0x00 }, 444 { 0x0348, 0x10 }, 445 { 0x0349, 0x6F }, 446 { 0x034A, 0x0C }, 447 { 0x034B, 0x2E }, 448 { 0x0381, 0x01 }, 449 { 0x0383, 0x01 }, 450 { 0x0385, 0x01 }, 451 { 0x0387, 0x01 }, 452 { 0x0900, 0x01 }, 453 { 0x0901, 0x14 }, 454 { 0x0401, 0x01 }, 455 { 0x0404, 0x00 }, 456 { 0x0405, 0x40 }, 457 { 0x0408, 0x00 }, 458 { 0x0409, 0x06 }, 459 { 0x040A, 0x00 }, 460 { 0x040B, 0x00 }, 461 { 0x040C, 0x10 }, 462 { 0x040D, 0x64 }, 463 { 0x040E, 0x03 }, 464 { 0x040F, 0x0C }, 465 { 0x3038, 0x00 }, 466 { 0x303A, 0x00 }, 467 { 0x303B, 0x10 }, 468 { 0x300D, 0x00 }, 469 { 0x034C, 0x04 }, 470 { 0x034D, 0x18 }, 471 { 0x034E, 0x03 }, 472 { 0x034F, 0x0C }, 473 { 0x0350, 0x01 }, 474 { 0x0202, 0x03 }, 475 { 0x0203, 0x42 }, 476 { 0x0204, 0x00 }, 477 { 0x0205, 0x00 }, 478 { 0x020E, 0x01 }, 479 { 0x020F, 0x00 }, 480 { 0x0210, 0x01 }, 481 { 0x0211, 0x00 }, 482 { 0x0212, 0x01 }, 483 { 0x0213, 0x00 }, 484 { 0x0214, 0x01 }, 485 { 0x0215, 0x00 }, 486 { 0x7BCD, 0x00 }, 487 { 0x94DC, 0x20 }, 488 { 0x94DD, 0x20 }, 489 { 0x94DE, 0x20 }, 490 { 0x95DC, 0x20 }, 491 { 0x95DD, 0x20 }, 492 { 0x95DE, 0x20 }, 493 { 0x7FB0, 0x00 }, 494 { 0x9010, 0x3E }, 495 { 0x9419, 0x50 }, 496 { 0x941B, 0x50 }, 497 { 0x9519, 0x50 }, 498 { 0x951B, 0x50 }, 499 { 0x3030, 0x00 }, 500 { 0x3032, 0x00 }, 501 { 0x0220, 0x00 }, 502 }; 503 504 static const char * const imx258_test_pattern_menu[] = { 505 "Disabled", 506 "Solid Colour", 507 "Eight Vertical Colour Bars", 508 "Colour Bars With Fade to Grey", 509 "Pseudorandom Sequence (PN9)", 510 }; 511 512 /* Configurations for supported link frequencies */ 513 #define IMX258_LINK_FREQ_634MHZ 633600000ULL 514 #define IMX258_LINK_FREQ_320MHZ 320000000ULL 515 516 enum { 517 IMX258_LINK_FREQ_1267MBPS, 518 IMX258_LINK_FREQ_640MBPS, 519 }; 520 521 /* 522 * pixel_rate = link_freq * data-rate * nr_of_lanes / bits_per_sample 523 * data rate => double data rate; number of lanes => 4; bits per pixel => 10 524 */ 525 static u64 link_freq_to_pixel_rate(u64 f) 526 { 527 f *= 2 * 4; 528 do_div(f, 10); 529 530 return f; 531 } 532 533 /* Menu items for LINK_FREQ V4L2 control */ 534 static const s64 link_freq_menu_items[] = { 535 IMX258_LINK_FREQ_634MHZ, 536 IMX258_LINK_FREQ_320MHZ, 537 }; 538 539 /* Link frequency configs */ 540 static const struct imx258_link_freq_config link_freq_configs[] = { 541 [IMX258_LINK_FREQ_1267MBPS] = { 542 .pixels_per_line = IMX258_PPL_DEFAULT, 543 .reg_list = { 544 .num_of_regs = ARRAY_SIZE(mipi_data_rate_1267mbps), 545 .regs = mipi_data_rate_1267mbps, 546 } 547 }, 548 [IMX258_LINK_FREQ_640MBPS] = { 549 .pixels_per_line = IMX258_PPL_DEFAULT, 550 .reg_list = { 551 .num_of_regs = ARRAY_SIZE(mipi_data_rate_640mbps), 552 .regs = mipi_data_rate_640mbps, 553 } 554 }, 555 }; 556 557 /* Mode configs */ 558 static const struct imx258_mode supported_modes[] = { 559 { 560 .width = 4208, 561 .height = 3118, 562 .vts_def = IMX258_VTS_30FPS, 563 .vts_min = IMX258_VTS_30FPS, 564 .reg_list = { 565 .num_of_regs = ARRAY_SIZE(mode_4208x3118_regs), 566 .regs = mode_4208x3118_regs, 567 }, 568 .link_freq_index = IMX258_LINK_FREQ_1267MBPS, 569 }, 570 { 571 .width = 2104, 572 .height = 1560, 573 .vts_def = IMX258_VTS_30FPS_2K, 574 .vts_min = IMX258_VTS_30FPS_2K, 575 .reg_list = { 576 .num_of_regs = ARRAY_SIZE(mode_2104_1560_regs), 577 .regs = mode_2104_1560_regs, 578 }, 579 .link_freq_index = IMX258_LINK_FREQ_640MBPS, 580 }, 581 { 582 .width = 1048, 583 .height = 780, 584 .vts_def = IMX258_VTS_30FPS_VGA, 585 .vts_min = IMX258_VTS_30FPS_VGA, 586 .reg_list = { 587 .num_of_regs = ARRAY_SIZE(mode_1048_780_regs), 588 .regs = mode_1048_780_regs, 589 }, 590 .link_freq_index = IMX258_LINK_FREQ_640MBPS, 591 }, 592 }; 593 594 struct imx258 { 595 struct v4l2_subdev sd; 596 struct media_pad pad; 597 598 struct v4l2_ctrl_handler ctrl_handler; 599 /* V4L2 Controls */ 600 struct v4l2_ctrl *link_freq; 601 struct v4l2_ctrl *pixel_rate; 602 struct v4l2_ctrl *vblank; 603 struct v4l2_ctrl *hblank; 604 struct v4l2_ctrl *exposure; 605 606 /* Current mode */ 607 const struct imx258_mode *cur_mode; 608 609 /* 610 * Mutex for serialized access: 611 * Protect sensor module set pad format and start/stop streaming safely. 612 */ 613 struct mutex mutex; 614 615 /* Streaming on/off */ 616 bool streaming; 617 618 struct clk *clk; 619 }; 620 621 static inline struct imx258 *to_imx258(struct v4l2_subdev *_sd) 622 { 623 return container_of(_sd, struct imx258, sd); 624 } 625 626 /* Read registers up to 2 at a time */ 627 static int imx258_read_reg(struct imx258 *imx258, u16 reg, u32 len, u32 *val) 628 { 629 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd); 630 struct i2c_msg msgs[2]; 631 u8 addr_buf[2] = { reg >> 8, reg & 0xff }; 632 u8 data_buf[4] = { 0, }; 633 int ret; 634 635 if (len > 4) 636 return -EINVAL; 637 638 /* Write register address */ 639 msgs[0].addr = client->addr; 640 msgs[0].flags = 0; 641 msgs[0].len = ARRAY_SIZE(addr_buf); 642 msgs[0].buf = addr_buf; 643 644 /* Read data from register */ 645 msgs[1].addr = client->addr; 646 msgs[1].flags = I2C_M_RD; 647 msgs[1].len = len; 648 msgs[1].buf = &data_buf[4 - len]; 649 650 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 651 if (ret != ARRAY_SIZE(msgs)) 652 return -EIO; 653 654 *val = get_unaligned_be32(data_buf); 655 656 return 0; 657 } 658 659 /* Write registers up to 2 at a time */ 660 static int imx258_write_reg(struct imx258 *imx258, u16 reg, u32 len, u32 val) 661 { 662 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd); 663 u8 buf[6]; 664 665 if (len > 4) 666 return -EINVAL; 667 668 put_unaligned_be16(reg, buf); 669 put_unaligned_be32(val << (8 * (4 - len)), buf + 2); 670 if (i2c_master_send(client, buf, len + 2) != len + 2) 671 return -EIO; 672 673 return 0; 674 } 675 676 /* Write a list of registers */ 677 static int imx258_write_regs(struct imx258 *imx258, 678 const struct imx258_reg *regs, u32 len) 679 { 680 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd); 681 unsigned int i; 682 int ret; 683 684 for (i = 0; i < len; i++) { 685 ret = imx258_write_reg(imx258, regs[i].address, 1, 686 regs[i].val); 687 if (ret) { 688 dev_err_ratelimited( 689 &client->dev, 690 "Failed to write reg 0x%4.4x. error = %d\n", 691 regs[i].address, ret); 692 693 return ret; 694 } 695 } 696 697 return 0; 698 } 699 700 /* Open sub-device */ 701 static int imx258_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) 702 { 703 struct v4l2_mbus_framefmt *try_fmt = 704 v4l2_subdev_get_try_format(sd, fh->pad, 0); 705 706 /* Initialize try_fmt */ 707 try_fmt->width = supported_modes[0].width; 708 try_fmt->height = supported_modes[0].height; 709 try_fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; 710 try_fmt->field = V4L2_FIELD_NONE; 711 712 return 0; 713 } 714 715 static int imx258_update_digital_gain(struct imx258 *imx258, u32 len, u32 val) 716 { 717 int ret; 718 719 ret = imx258_write_reg(imx258, IMX258_REG_GR_DIGITAL_GAIN, 720 IMX258_REG_VALUE_16BIT, 721 val); 722 if (ret) 723 return ret; 724 ret = imx258_write_reg(imx258, IMX258_REG_GB_DIGITAL_GAIN, 725 IMX258_REG_VALUE_16BIT, 726 val); 727 if (ret) 728 return ret; 729 ret = imx258_write_reg(imx258, IMX258_REG_R_DIGITAL_GAIN, 730 IMX258_REG_VALUE_16BIT, 731 val); 732 if (ret) 733 return ret; 734 ret = imx258_write_reg(imx258, IMX258_REG_B_DIGITAL_GAIN, 735 IMX258_REG_VALUE_16BIT, 736 val); 737 if (ret) 738 return ret; 739 return 0; 740 } 741 742 static int imx258_set_ctrl(struct v4l2_ctrl *ctrl) 743 { 744 struct imx258 *imx258 = 745 container_of(ctrl->handler, struct imx258, ctrl_handler); 746 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd); 747 int ret = 0; 748 749 /* 750 * Applying V4L2 control value only happens 751 * when power is up for streaming 752 */ 753 if (pm_runtime_get_if_in_use(&client->dev) == 0) 754 return 0; 755 756 switch (ctrl->id) { 757 case V4L2_CID_ANALOGUE_GAIN: 758 ret = imx258_write_reg(imx258, IMX258_REG_ANALOG_GAIN, 759 IMX258_REG_VALUE_16BIT, 760 ctrl->val); 761 break; 762 case V4L2_CID_EXPOSURE: 763 ret = imx258_write_reg(imx258, IMX258_REG_EXPOSURE, 764 IMX258_REG_VALUE_16BIT, 765 ctrl->val); 766 break; 767 case V4L2_CID_DIGITAL_GAIN: 768 ret = imx258_update_digital_gain(imx258, IMX258_REG_VALUE_16BIT, 769 ctrl->val); 770 break; 771 case V4L2_CID_TEST_PATTERN: 772 ret = imx258_write_reg(imx258, IMX258_REG_TEST_PATTERN, 773 IMX258_REG_VALUE_16BIT, 774 ctrl->val); 775 ret = imx258_write_reg(imx258, REG_MIRROR_FLIP_CONTROL, 776 IMX258_REG_VALUE_08BIT, 777 !ctrl->val ? REG_CONFIG_MIRROR_FLIP : 778 REG_CONFIG_FLIP_TEST_PATTERN); 779 break; 780 default: 781 dev_info(&client->dev, 782 "ctrl(id:0x%x,val:0x%x) is not handled\n", 783 ctrl->id, ctrl->val); 784 ret = -EINVAL; 785 break; 786 } 787 788 pm_runtime_put(&client->dev); 789 790 return ret; 791 } 792 793 static const struct v4l2_ctrl_ops imx258_ctrl_ops = { 794 .s_ctrl = imx258_set_ctrl, 795 }; 796 797 static int imx258_enum_mbus_code(struct v4l2_subdev *sd, 798 struct v4l2_subdev_pad_config *cfg, 799 struct v4l2_subdev_mbus_code_enum *code) 800 { 801 /* Only one bayer order(GRBG) is supported */ 802 if (code->index > 0) 803 return -EINVAL; 804 805 code->code = MEDIA_BUS_FMT_SGRBG10_1X10; 806 807 return 0; 808 } 809 810 static int imx258_enum_frame_size(struct v4l2_subdev *sd, 811 struct v4l2_subdev_pad_config *cfg, 812 struct v4l2_subdev_frame_size_enum *fse) 813 { 814 if (fse->index >= ARRAY_SIZE(supported_modes)) 815 return -EINVAL; 816 817 if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10) 818 return -EINVAL; 819 820 fse->min_width = supported_modes[fse->index].width; 821 fse->max_width = fse->min_width; 822 fse->min_height = supported_modes[fse->index].height; 823 fse->max_height = fse->min_height; 824 825 return 0; 826 } 827 828 static void imx258_update_pad_format(const struct imx258_mode *mode, 829 struct v4l2_subdev_format *fmt) 830 { 831 fmt->format.width = mode->width; 832 fmt->format.height = mode->height; 833 fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10; 834 fmt->format.field = V4L2_FIELD_NONE; 835 } 836 837 static int __imx258_get_pad_format(struct imx258 *imx258, 838 struct v4l2_subdev_pad_config *cfg, 839 struct v4l2_subdev_format *fmt) 840 { 841 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) 842 fmt->format = *v4l2_subdev_get_try_format(&imx258->sd, cfg, 843 fmt->pad); 844 else 845 imx258_update_pad_format(imx258->cur_mode, fmt); 846 847 return 0; 848 } 849 850 static int imx258_get_pad_format(struct v4l2_subdev *sd, 851 struct v4l2_subdev_pad_config *cfg, 852 struct v4l2_subdev_format *fmt) 853 { 854 struct imx258 *imx258 = to_imx258(sd); 855 int ret; 856 857 mutex_lock(&imx258->mutex); 858 ret = __imx258_get_pad_format(imx258, cfg, fmt); 859 mutex_unlock(&imx258->mutex); 860 861 return ret; 862 } 863 864 static int imx258_set_pad_format(struct v4l2_subdev *sd, 865 struct v4l2_subdev_pad_config *cfg, 866 struct v4l2_subdev_format *fmt) 867 { 868 struct imx258 *imx258 = to_imx258(sd); 869 const struct imx258_mode *mode; 870 struct v4l2_mbus_framefmt *framefmt; 871 s32 vblank_def; 872 s32 vblank_min; 873 s64 h_blank; 874 s64 pixel_rate; 875 s64 link_freq; 876 877 mutex_lock(&imx258->mutex); 878 879 /* Only one raw bayer(GBRG) order is supported */ 880 fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10; 881 882 mode = v4l2_find_nearest_size(supported_modes, 883 ARRAY_SIZE(supported_modes), width, height, 884 fmt->format.width, fmt->format.height); 885 imx258_update_pad_format(mode, fmt); 886 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 887 framefmt = v4l2_subdev_get_try_format(sd, cfg, fmt->pad); 888 *framefmt = fmt->format; 889 } else { 890 imx258->cur_mode = mode; 891 __v4l2_ctrl_s_ctrl(imx258->link_freq, mode->link_freq_index); 892 893 link_freq = link_freq_menu_items[mode->link_freq_index]; 894 pixel_rate = link_freq_to_pixel_rate(link_freq); 895 __v4l2_ctrl_s_ctrl_int64(imx258->pixel_rate, pixel_rate); 896 /* Update limits and set FPS to default */ 897 vblank_def = imx258->cur_mode->vts_def - 898 imx258->cur_mode->height; 899 vblank_min = imx258->cur_mode->vts_min - 900 imx258->cur_mode->height; 901 __v4l2_ctrl_modify_range( 902 imx258->vblank, vblank_min, 903 IMX258_VTS_MAX - imx258->cur_mode->height, 1, 904 vblank_def); 905 __v4l2_ctrl_s_ctrl(imx258->vblank, vblank_def); 906 h_blank = 907 link_freq_configs[mode->link_freq_index].pixels_per_line 908 - imx258->cur_mode->width; 909 __v4l2_ctrl_modify_range(imx258->hblank, h_blank, 910 h_blank, 1, h_blank); 911 } 912 913 mutex_unlock(&imx258->mutex); 914 915 return 0; 916 } 917 918 /* Start streaming */ 919 static int imx258_start_streaming(struct imx258 *imx258) 920 { 921 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd); 922 const struct imx258_reg_list *reg_list; 923 int ret, link_freq_index; 924 925 /* Setup PLL */ 926 link_freq_index = imx258->cur_mode->link_freq_index; 927 reg_list = &link_freq_configs[link_freq_index].reg_list; 928 ret = imx258_write_regs(imx258, reg_list->regs, reg_list->num_of_regs); 929 if (ret) { 930 dev_err(&client->dev, "%s failed to set plls\n", __func__); 931 return ret; 932 } 933 934 /* Apply default values of current mode */ 935 reg_list = &imx258->cur_mode->reg_list; 936 ret = imx258_write_regs(imx258, reg_list->regs, reg_list->num_of_regs); 937 if (ret) { 938 dev_err(&client->dev, "%s failed to set mode\n", __func__); 939 return ret; 940 } 941 942 /* Set Orientation be 180 degree */ 943 ret = imx258_write_reg(imx258, REG_MIRROR_FLIP_CONTROL, 944 IMX258_REG_VALUE_08BIT, REG_CONFIG_MIRROR_FLIP); 945 if (ret) { 946 dev_err(&client->dev, "%s failed to set orientation\n", 947 __func__); 948 return ret; 949 } 950 951 /* Apply customized values from user */ 952 ret = __v4l2_ctrl_handler_setup(imx258->sd.ctrl_handler); 953 if (ret) 954 return ret; 955 956 /* set stream on register */ 957 return imx258_write_reg(imx258, IMX258_REG_MODE_SELECT, 958 IMX258_REG_VALUE_08BIT, 959 IMX258_MODE_STREAMING); 960 } 961 962 /* Stop streaming */ 963 static int imx258_stop_streaming(struct imx258 *imx258) 964 { 965 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd); 966 int ret; 967 968 /* set stream off register */ 969 ret = imx258_write_reg(imx258, IMX258_REG_MODE_SELECT, 970 IMX258_REG_VALUE_08BIT, IMX258_MODE_STANDBY); 971 if (ret) 972 dev_err(&client->dev, "%s failed to set stream\n", __func__); 973 974 /* 975 * Return success even if it was an error, as there is nothing the 976 * caller can do about it. 977 */ 978 return 0; 979 } 980 981 static int imx258_power_on(struct device *dev) 982 { 983 struct v4l2_subdev *sd = dev_get_drvdata(dev); 984 struct imx258 *imx258 = to_imx258(sd); 985 int ret; 986 987 ret = clk_prepare_enable(imx258->clk); 988 if (ret) 989 dev_err(dev, "failed to enable clock\n"); 990 991 return ret; 992 } 993 994 static int imx258_power_off(struct device *dev) 995 { 996 struct v4l2_subdev *sd = dev_get_drvdata(dev); 997 struct imx258 *imx258 = to_imx258(sd); 998 999 clk_disable_unprepare(imx258->clk); 1000 1001 return 0; 1002 } 1003 1004 static int imx258_set_stream(struct v4l2_subdev *sd, int enable) 1005 { 1006 struct imx258 *imx258 = to_imx258(sd); 1007 struct i2c_client *client = v4l2_get_subdevdata(sd); 1008 int ret = 0; 1009 1010 mutex_lock(&imx258->mutex); 1011 if (imx258->streaming == enable) { 1012 mutex_unlock(&imx258->mutex); 1013 return 0; 1014 } 1015 1016 if (enable) { 1017 ret = pm_runtime_get_sync(&client->dev); 1018 if (ret < 0) { 1019 pm_runtime_put_noidle(&client->dev); 1020 goto err_unlock; 1021 } 1022 1023 /* 1024 * Apply default & customized values 1025 * and then start streaming. 1026 */ 1027 ret = imx258_start_streaming(imx258); 1028 if (ret) 1029 goto err_rpm_put; 1030 } else { 1031 imx258_stop_streaming(imx258); 1032 pm_runtime_put(&client->dev); 1033 } 1034 1035 imx258->streaming = enable; 1036 mutex_unlock(&imx258->mutex); 1037 1038 return ret; 1039 1040 err_rpm_put: 1041 pm_runtime_put(&client->dev); 1042 err_unlock: 1043 mutex_unlock(&imx258->mutex); 1044 1045 return ret; 1046 } 1047 1048 static int __maybe_unused imx258_suspend(struct device *dev) 1049 { 1050 struct v4l2_subdev *sd = dev_get_drvdata(dev); 1051 struct imx258 *imx258 = to_imx258(sd); 1052 1053 if (imx258->streaming) 1054 imx258_stop_streaming(imx258); 1055 1056 return 0; 1057 } 1058 1059 static int __maybe_unused imx258_resume(struct device *dev) 1060 { 1061 struct v4l2_subdev *sd = dev_get_drvdata(dev); 1062 struct imx258 *imx258 = to_imx258(sd); 1063 int ret; 1064 1065 if (imx258->streaming) { 1066 ret = imx258_start_streaming(imx258); 1067 if (ret) 1068 goto error; 1069 } 1070 1071 return 0; 1072 1073 error: 1074 imx258_stop_streaming(imx258); 1075 imx258->streaming = 0; 1076 return ret; 1077 } 1078 1079 /* Verify chip ID */ 1080 static int imx258_identify_module(struct imx258 *imx258) 1081 { 1082 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd); 1083 int ret; 1084 u32 val; 1085 1086 ret = imx258_read_reg(imx258, IMX258_REG_CHIP_ID, 1087 IMX258_REG_VALUE_16BIT, &val); 1088 if (ret) { 1089 dev_err(&client->dev, "failed to read chip id %x\n", 1090 IMX258_CHIP_ID); 1091 return ret; 1092 } 1093 1094 if (val != IMX258_CHIP_ID) { 1095 dev_err(&client->dev, "chip id mismatch: %x!=%x\n", 1096 IMX258_CHIP_ID, val); 1097 return -EIO; 1098 } 1099 1100 return 0; 1101 } 1102 1103 static const struct v4l2_subdev_video_ops imx258_video_ops = { 1104 .s_stream = imx258_set_stream, 1105 }; 1106 1107 static const struct v4l2_subdev_pad_ops imx258_pad_ops = { 1108 .enum_mbus_code = imx258_enum_mbus_code, 1109 .get_fmt = imx258_get_pad_format, 1110 .set_fmt = imx258_set_pad_format, 1111 .enum_frame_size = imx258_enum_frame_size, 1112 }; 1113 1114 static const struct v4l2_subdev_ops imx258_subdev_ops = { 1115 .video = &imx258_video_ops, 1116 .pad = &imx258_pad_ops, 1117 }; 1118 1119 static const struct v4l2_subdev_internal_ops imx258_internal_ops = { 1120 .open = imx258_open, 1121 }; 1122 1123 /* Initialize control handlers */ 1124 static int imx258_init_controls(struct imx258 *imx258) 1125 { 1126 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd); 1127 struct v4l2_ctrl_handler *ctrl_hdlr; 1128 s64 vblank_def; 1129 s64 vblank_min; 1130 s64 pixel_rate_min; 1131 s64 pixel_rate_max; 1132 int ret; 1133 1134 ctrl_hdlr = &imx258->ctrl_handler; 1135 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8); 1136 if (ret) 1137 return ret; 1138 1139 mutex_init(&imx258->mutex); 1140 ctrl_hdlr->lock = &imx258->mutex; 1141 imx258->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, 1142 &imx258_ctrl_ops, 1143 V4L2_CID_LINK_FREQ, 1144 ARRAY_SIZE(link_freq_menu_items) - 1, 1145 0, 1146 link_freq_menu_items); 1147 1148 if (imx258->link_freq) 1149 imx258->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1150 1151 pixel_rate_max = link_freq_to_pixel_rate(link_freq_menu_items[0]); 1152 pixel_rate_min = link_freq_to_pixel_rate(link_freq_menu_items[1]); 1153 /* By default, PIXEL_RATE is read only */ 1154 imx258->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, 1155 V4L2_CID_PIXEL_RATE, 1156 pixel_rate_min, pixel_rate_max, 1157 1, pixel_rate_max); 1158 1159 1160 vblank_def = imx258->cur_mode->vts_def - imx258->cur_mode->height; 1161 vblank_min = imx258->cur_mode->vts_min - imx258->cur_mode->height; 1162 imx258->vblank = v4l2_ctrl_new_std( 1163 ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_VBLANK, 1164 vblank_min, 1165 IMX258_VTS_MAX - imx258->cur_mode->height, 1, 1166 vblank_def); 1167 1168 if (imx258->vblank) 1169 imx258->vblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1170 1171 imx258->hblank = v4l2_ctrl_new_std( 1172 ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_HBLANK, 1173 IMX258_PPL_DEFAULT - imx258->cur_mode->width, 1174 IMX258_PPL_DEFAULT - imx258->cur_mode->width, 1175 1, 1176 IMX258_PPL_DEFAULT - imx258->cur_mode->width); 1177 1178 if (imx258->hblank) 1179 imx258->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1180 1181 imx258->exposure = v4l2_ctrl_new_std( 1182 ctrl_hdlr, &imx258_ctrl_ops, 1183 V4L2_CID_EXPOSURE, IMX258_EXPOSURE_MIN, 1184 IMX258_EXPOSURE_MAX, IMX258_EXPOSURE_STEP, 1185 IMX258_EXPOSURE_DEFAULT); 1186 1187 v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, 1188 IMX258_ANA_GAIN_MIN, IMX258_ANA_GAIN_MAX, 1189 IMX258_ANA_GAIN_STEP, IMX258_ANA_GAIN_DEFAULT); 1190 1191 v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_DIGITAL_GAIN, 1192 IMX258_DGTL_GAIN_MIN, IMX258_DGTL_GAIN_MAX, 1193 IMX258_DGTL_GAIN_STEP, 1194 IMX258_DGTL_GAIN_DEFAULT); 1195 1196 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx258_ctrl_ops, 1197 V4L2_CID_TEST_PATTERN, 1198 ARRAY_SIZE(imx258_test_pattern_menu) - 1, 1199 0, 0, imx258_test_pattern_menu); 1200 1201 if (ctrl_hdlr->error) { 1202 ret = ctrl_hdlr->error; 1203 dev_err(&client->dev, "%s control init failed (%d)\n", 1204 __func__, ret); 1205 goto error; 1206 } 1207 1208 imx258->sd.ctrl_handler = ctrl_hdlr; 1209 1210 return 0; 1211 1212 error: 1213 v4l2_ctrl_handler_free(ctrl_hdlr); 1214 mutex_destroy(&imx258->mutex); 1215 1216 return ret; 1217 } 1218 1219 static void imx258_free_controls(struct imx258 *imx258) 1220 { 1221 v4l2_ctrl_handler_free(imx258->sd.ctrl_handler); 1222 mutex_destroy(&imx258->mutex); 1223 } 1224 1225 static int imx258_probe(struct i2c_client *client) 1226 { 1227 struct imx258 *imx258; 1228 int ret; 1229 u32 val = 0; 1230 1231 imx258 = devm_kzalloc(&client->dev, sizeof(*imx258), GFP_KERNEL); 1232 if (!imx258) 1233 return -ENOMEM; 1234 1235 imx258->clk = devm_clk_get_optional(&client->dev, NULL); 1236 if (!imx258->clk) { 1237 dev_dbg(&client->dev, 1238 "no clock provided, using clock-frequency property\n"); 1239 1240 device_property_read_u32(&client->dev, "clock-frequency", &val); 1241 if (val != IMX258_INPUT_CLOCK_FREQ) 1242 return -EINVAL; 1243 } else if (IS_ERR(imx258->clk)) { 1244 return dev_err_probe(&client->dev, PTR_ERR(imx258->clk), 1245 "error getting clock\n"); 1246 } 1247 if (clk_get_rate(imx258->clk) != IMX258_INPUT_CLOCK_FREQ) { 1248 dev_err(&client->dev, "input clock frequency not supported\n"); 1249 return -EINVAL; 1250 } 1251 1252 /* 1253 * Check that the device is mounted upside down. The driver only 1254 * supports a single pixel order right now. 1255 */ 1256 ret = device_property_read_u32(&client->dev, "rotation", &val); 1257 if (ret || val != 180) 1258 return -EINVAL; 1259 1260 /* Initialize subdev */ 1261 v4l2_i2c_subdev_init(&imx258->sd, client, &imx258_subdev_ops); 1262 1263 /* Will be powered off via pm_runtime_idle */ 1264 ret = imx258_power_on(&client->dev); 1265 if (ret) 1266 return ret; 1267 1268 /* Check module identity */ 1269 ret = imx258_identify_module(imx258); 1270 if (ret) 1271 goto error_identify; 1272 1273 /* Set default mode to max resolution */ 1274 imx258->cur_mode = &supported_modes[0]; 1275 1276 ret = imx258_init_controls(imx258); 1277 if (ret) 1278 goto error_identify; 1279 1280 /* Initialize subdev */ 1281 imx258->sd.internal_ops = &imx258_internal_ops; 1282 imx258->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 1283 imx258->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1284 1285 /* Initialize source pad */ 1286 imx258->pad.flags = MEDIA_PAD_FL_SOURCE; 1287 1288 ret = media_entity_pads_init(&imx258->sd.entity, 1, &imx258->pad); 1289 if (ret) 1290 goto error_handler_free; 1291 1292 ret = v4l2_async_register_subdev_sensor_common(&imx258->sd); 1293 if (ret < 0) 1294 goto error_media_entity; 1295 1296 pm_runtime_set_active(&client->dev); 1297 pm_runtime_enable(&client->dev); 1298 pm_runtime_idle(&client->dev); 1299 1300 return 0; 1301 1302 error_media_entity: 1303 media_entity_cleanup(&imx258->sd.entity); 1304 1305 error_handler_free: 1306 imx258_free_controls(imx258); 1307 1308 error_identify: 1309 imx258_power_off(&client->dev); 1310 1311 return ret; 1312 } 1313 1314 static int imx258_remove(struct i2c_client *client) 1315 { 1316 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1317 struct imx258 *imx258 = to_imx258(sd); 1318 1319 v4l2_async_unregister_subdev(sd); 1320 media_entity_cleanup(&sd->entity); 1321 imx258_free_controls(imx258); 1322 1323 pm_runtime_disable(&client->dev); 1324 if (!pm_runtime_status_suspended(&client->dev)) 1325 imx258_power_off(&client->dev); 1326 pm_runtime_set_suspended(&client->dev); 1327 1328 return 0; 1329 } 1330 1331 static const struct dev_pm_ops imx258_pm_ops = { 1332 SET_SYSTEM_SLEEP_PM_OPS(imx258_suspend, imx258_resume) 1333 SET_RUNTIME_PM_OPS(imx258_power_off, imx258_power_on, NULL) 1334 }; 1335 1336 #ifdef CONFIG_ACPI 1337 static const struct acpi_device_id imx258_acpi_ids[] = { 1338 { "SONY258A" }, 1339 { /* sentinel */ } 1340 }; 1341 1342 MODULE_DEVICE_TABLE(acpi, imx258_acpi_ids); 1343 #endif 1344 1345 static const struct of_device_id imx258_dt_ids[] = { 1346 { .compatible = "sony,imx258" }, 1347 { /* sentinel */ } 1348 }; 1349 MODULE_DEVICE_TABLE(of, imx258_dt_ids); 1350 1351 static struct i2c_driver imx258_i2c_driver = { 1352 .driver = { 1353 .name = "imx258", 1354 .pm = &imx258_pm_ops, 1355 .acpi_match_table = ACPI_PTR(imx258_acpi_ids), 1356 .of_match_table = imx258_dt_ids, 1357 }, 1358 .probe_new = imx258_probe, 1359 .remove = imx258_remove, 1360 }; 1361 1362 module_i2c_driver(imx258_i2c_driver); 1363 1364 MODULE_AUTHOR("Yeh, Andy <andy.yeh@intel.com>"); 1365 MODULE_AUTHOR("Chiang, Alan"); 1366 MODULE_AUTHOR("Chen, Jason"); 1367 MODULE_DESCRIPTION("Sony IMX258 sensor driver"); 1368 MODULE_LICENSE("GPL v2"); 1369