1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * A V4L2 driver for Sony IMX219 cameras. 4 * Copyright (C) 2019, Raspberry Pi (Trading) Ltd 5 * 6 * Based on Sony imx258 camera driver 7 * Copyright (C) 2018 Intel Corporation 8 * 9 * DT / fwnode changes, and regulator / GPIO control taken from imx214 driver 10 * Copyright 2018 Qtechnology A/S 11 * 12 * Flip handling taken from the Sony IMX319 driver. 13 * Copyright (C) 2018 Intel Corporation 14 * 15 */ 16 17 #include <linux/clk.h> 18 #include <linux/delay.h> 19 #include <linux/gpio/consumer.h> 20 #include <linux/i2c.h> 21 #include <linux/module.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/regulator/consumer.h> 24 #include <media/v4l2-ctrls.h> 25 #include <media/v4l2-device.h> 26 #include <media/v4l2-event.h> 27 #include <media/v4l2-fwnode.h> 28 #include <media/v4l2-mediabus.h> 29 #include <asm/unaligned.h> 30 31 #define IMX219_REG_VALUE_08BIT 1 32 #define IMX219_REG_VALUE_16BIT 2 33 34 #define IMX219_REG_MODE_SELECT 0x0100 35 #define IMX219_MODE_STANDBY 0x00 36 #define IMX219_MODE_STREAMING 0x01 37 38 /* Chip ID */ 39 #define IMX219_REG_CHIP_ID 0x0000 40 #define IMX219_CHIP_ID 0x0219 41 42 /* External clock frequency is 24.0M */ 43 #define IMX219_XCLK_FREQ 24000000 44 45 /* Pixel rate is fixed at 182.4M for all the modes */ 46 #define IMX219_PIXEL_RATE 182400000 47 48 #define IMX219_DEFAULT_LINK_FREQ 456000000 49 50 /* V_TIMING internal */ 51 #define IMX219_REG_VTS 0x0160 52 #define IMX219_VTS_15FPS 0x0dc6 53 #define IMX219_VTS_30FPS_1080P 0x06e3 54 #define IMX219_VTS_30FPS_BINNED 0x06e3 55 #define IMX219_VTS_30FPS_640x480 0x06e3 56 #define IMX219_VTS_MAX 0xffff 57 58 #define IMX219_VBLANK_MIN 4 59 60 /*Frame Length Line*/ 61 #define IMX219_FLL_MIN 0x08a6 62 #define IMX219_FLL_MAX 0xffff 63 #define IMX219_FLL_STEP 1 64 #define IMX219_FLL_DEFAULT 0x0c98 65 66 /* HBLANK control - read only */ 67 #define IMX219_PPL_DEFAULT 3448 68 69 /* Exposure control */ 70 #define IMX219_REG_EXPOSURE 0x015a 71 #define IMX219_EXPOSURE_MIN 4 72 #define IMX219_EXPOSURE_STEP 1 73 #define IMX219_EXPOSURE_DEFAULT 0x640 74 #define IMX219_EXPOSURE_MAX 65535 75 76 /* Analog gain control */ 77 #define IMX219_REG_ANALOG_GAIN 0x0157 78 #define IMX219_ANA_GAIN_MIN 0 79 #define IMX219_ANA_GAIN_MAX 232 80 #define IMX219_ANA_GAIN_STEP 1 81 #define IMX219_ANA_GAIN_DEFAULT 0x0 82 83 /* Digital gain control */ 84 #define IMX219_REG_DIGITAL_GAIN 0x0158 85 #define IMX219_DGTL_GAIN_MIN 0x0100 86 #define IMX219_DGTL_GAIN_MAX 0x0fff 87 #define IMX219_DGTL_GAIN_DEFAULT 0x0100 88 #define IMX219_DGTL_GAIN_STEP 1 89 90 #define IMX219_REG_ORIENTATION 0x0172 91 92 /* Test Pattern Control */ 93 #define IMX219_REG_TEST_PATTERN 0x0600 94 #define IMX219_TEST_PATTERN_DISABLE 0 95 #define IMX219_TEST_PATTERN_SOLID_COLOR 1 96 #define IMX219_TEST_PATTERN_COLOR_BARS 2 97 #define IMX219_TEST_PATTERN_GREY_COLOR 3 98 #define IMX219_TEST_PATTERN_PN9 4 99 100 /* Test pattern colour components */ 101 #define IMX219_REG_TESTP_RED 0x0602 102 #define IMX219_REG_TESTP_GREENR 0x0604 103 #define IMX219_REG_TESTP_BLUE 0x0606 104 #define IMX219_REG_TESTP_GREENB 0x0608 105 #define IMX219_TESTP_COLOUR_MIN 0 106 #define IMX219_TESTP_COLOUR_MAX 0x03ff 107 #define IMX219_TESTP_COLOUR_STEP 1 108 #define IMX219_TESTP_RED_DEFAULT IMX219_TESTP_COLOUR_MAX 109 #define IMX219_TESTP_GREENR_DEFAULT 0 110 #define IMX219_TESTP_BLUE_DEFAULT 0 111 #define IMX219_TESTP_GREENB_DEFAULT 0 112 113 /* IMX219 native and active pixel array size. */ 114 #define IMX219_NATIVE_WIDTH 3296U 115 #define IMX219_NATIVE_HEIGHT 2480U 116 #define IMX219_PIXEL_ARRAY_LEFT 8U 117 #define IMX219_PIXEL_ARRAY_TOP 8U 118 #define IMX219_PIXEL_ARRAY_WIDTH 3280U 119 #define IMX219_PIXEL_ARRAY_HEIGHT 2464U 120 121 struct imx219_reg { 122 u16 address; 123 u8 val; 124 }; 125 126 struct imx219_reg_list { 127 unsigned int num_of_regs; 128 const struct imx219_reg *regs; 129 }; 130 131 /* Mode : resolution and related config&values */ 132 struct imx219_mode { 133 /* Frame width */ 134 unsigned int width; 135 /* Frame height */ 136 unsigned int height; 137 138 /* Analog crop rectangle. */ 139 struct v4l2_rect crop; 140 141 /* V-timing */ 142 unsigned int vts_def; 143 144 /* Default register values */ 145 struct imx219_reg_list reg_list; 146 }; 147 148 /* 149 * Register sets lifted off the i2C interface from the Raspberry Pi firmware 150 * driver. 151 * 3280x2464 = mode 2, 1920x1080 = mode 1, 1640x1232 = mode 4, 640x480 = mode 7. 152 */ 153 static const struct imx219_reg mode_3280x2464_regs[] = { 154 {0x0100, 0x00}, 155 {0x30eb, 0x0c}, 156 {0x30eb, 0x05}, 157 {0x300a, 0xff}, 158 {0x300b, 0xff}, 159 {0x30eb, 0x05}, 160 {0x30eb, 0x09}, 161 {0x0114, 0x01}, 162 {0x0128, 0x00}, 163 {0x012a, 0x18}, 164 {0x012b, 0x00}, 165 {0x0164, 0x00}, 166 {0x0165, 0x00}, 167 {0x0166, 0x0c}, 168 {0x0167, 0xcf}, 169 {0x0168, 0x00}, 170 {0x0169, 0x00}, 171 {0x016a, 0x09}, 172 {0x016b, 0x9f}, 173 {0x016c, 0x0c}, 174 {0x016d, 0xd0}, 175 {0x016e, 0x09}, 176 {0x016f, 0xa0}, 177 {0x0170, 0x01}, 178 {0x0171, 0x01}, 179 {0x0174, 0x00}, 180 {0x0175, 0x00}, 181 {0x0301, 0x05}, 182 {0x0303, 0x01}, 183 {0x0304, 0x03}, 184 {0x0305, 0x03}, 185 {0x0306, 0x00}, 186 {0x0307, 0x39}, 187 {0x030b, 0x01}, 188 {0x030c, 0x00}, 189 {0x030d, 0x72}, 190 {0x0624, 0x0c}, 191 {0x0625, 0xd0}, 192 {0x0626, 0x09}, 193 {0x0627, 0xa0}, 194 {0x455e, 0x00}, 195 {0x471e, 0x4b}, 196 {0x4767, 0x0f}, 197 {0x4750, 0x14}, 198 {0x4540, 0x00}, 199 {0x47b4, 0x14}, 200 {0x4713, 0x30}, 201 {0x478b, 0x10}, 202 {0x478f, 0x10}, 203 {0x4793, 0x10}, 204 {0x4797, 0x0e}, 205 {0x479b, 0x0e}, 206 {0x0162, 0x0d}, 207 {0x0163, 0x78}, 208 }; 209 210 static const struct imx219_reg mode_1920_1080_regs[] = { 211 {0x0100, 0x00}, 212 {0x30eb, 0x05}, 213 {0x30eb, 0x0c}, 214 {0x300a, 0xff}, 215 {0x300b, 0xff}, 216 {0x30eb, 0x05}, 217 {0x30eb, 0x09}, 218 {0x0114, 0x01}, 219 {0x0128, 0x00}, 220 {0x012a, 0x18}, 221 {0x012b, 0x00}, 222 {0x0162, 0x0d}, 223 {0x0163, 0x78}, 224 {0x0164, 0x02}, 225 {0x0165, 0xa8}, 226 {0x0166, 0x0a}, 227 {0x0167, 0x27}, 228 {0x0168, 0x02}, 229 {0x0169, 0xb4}, 230 {0x016a, 0x06}, 231 {0x016b, 0xeb}, 232 {0x016c, 0x07}, 233 {0x016d, 0x80}, 234 {0x016e, 0x04}, 235 {0x016f, 0x38}, 236 {0x0170, 0x01}, 237 {0x0171, 0x01}, 238 {0x0174, 0x00}, 239 {0x0175, 0x00}, 240 {0x0301, 0x05}, 241 {0x0303, 0x01}, 242 {0x0304, 0x03}, 243 {0x0305, 0x03}, 244 {0x0306, 0x00}, 245 {0x0307, 0x39}, 246 {0x030b, 0x01}, 247 {0x030c, 0x00}, 248 {0x030d, 0x72}, 249 {0x0624, 0x07}, 250 {0x0625, 0x80}, 251 {0x0626, 0x04}, 252 {0x0627, 0x38}, 253 {0x455e, 0x00}, 254 {0x471e, 0x4b}, 255 {0x4767, 0x0f}, 256 {0x4750, 0x14}, 257 {0x4540, 0x00}, 258 {0x47b4, 0x14}, 259 {0x4713, 0x30}, 260 {0x478b, 0x10}, 261 {0x478f, 0x10}, 262 {0x4793, 0x10}, 263 {0x4797, 0x0e}, 264 {0x479b, 0x0e}, 265 }; 266 267 static const struct imx219_reg mode_1640_1232_regs[] = { 268 {0x0100, 0x00}, 269 {0x30eb, 0x0c}, 270 {0x30eb, 0x05}, 271 {0x300a, 0xff}, 272 {0x300b, 0xff}, 273 {0x30eb, 0x05}, 274 {0x30eb, 0x09}, 275 {0x0114, 0x01}, 276 {0x0128, 0x00}, 277 {0x012a, 0x18}, 278 {0x012b, 0x00}, 279 {0x0164, 0x00}, 280 {0x0165, 0x00}, 281 {0x0166, 0x0c}, 282 {0x0167, 0xcf}, 283 {0x0168, 0x00}, 284 {0x0169, 0x00}, 285 {0x016a, 0x09}, 286 {0x016b, 0x9f}, 287 {0x016c, 0x06}, 288 {0x016d, 0x68}, 289 {0x016e, 0x04}, 290 {0x016f, 0xd0}, 291 {0x0170, 0x01}, 292 {0x0171, 0x01}, 293 {0x0174, 0x01}, 294 {0x0175, 0x01}, 295 {0x0301, 0x05}, 296 {0x0303, 0x01}, 297 {0x0304, 0x03}, 298 {0x0305, 0x03}, 299 {0x0306, 0x00}, 300 {0x0307, 0x39}, 301 {0x030b, 0x01}, 302 {0x030c, 0x00}, 303 {0x030d, 0x72}, 304 {0x0624, 0x06}, 305 {0x0625, 0x68}, 306 {0x0626, 0x04}, 307 {0x0627, 0xd0}, 308 {0x455e, 0x00}, 309 {0x471e, 0x4b}, 310 {0x4767, 0x0f}, 311 {0x4750, 0x14}, 312 {0x4540, 0x00}, 313 {0x47b4, 0x14}, 314 {0x4713, 0x30}, 315 {0x478b, 0x10}, 316 {0x478f, 0x10}, 317 {0x4793, 0x10}, 318 {0x4797, 0x0e}, 319 {0x479b, 0x0e}, 320 {0x0162, 0x0d}, 321 {0x0163, 0x78}, 322 }; 323 324 static const struct imx219_reg mode_640_480_regs[] = { 325 {0x0100, 0x00}, 326 {0x30eb, 0x05}, 327 {0x30eb, 0x0c}, 328 {0x300a, 0xff}, 329 {0x300b, 0xff}, 330 {0x30eb, 0x05}, 331 {0x30eb, 0x09}, 332 {0x0114, 0x01}, 333 {0x0128, 0x00}, 334 {0x012a, 0x18}, 335 {0x012b, 0x00}, 336 {0x0162, 0x0d}, 337 {0x0163, 0x78}, 338 {0x0164, 0x03}, 339 {0x0165, 0xe8}, 340 {0x0166, 0x08}, 341 {0x0167, 0xe7}, 342 {0x0168, 0x02}, 343 {0x0169, 0xf0}, 344 {0x016a, 0x06}, 345 {0x016b, 0xaf}, 346 {0x016c, 0x02}, 347 {0x016d, 0x80}, 348 {0x016e, 0x01}, 349 {0x016f, 0xe0}, 350 {0x0170, 0x01}, 351 {0x0171, 0x01}, 352 {0x0174, 0x03}, 353 {0x0175, 0x03}, 354 {0x0301, 0x05}, 355 {0x0303, 0x01}, 356 {0x0304, 0x03}, 357 {0x0305, 0x03}, 358 {0x0306, 0x00}, 359 {0x0307, 0x39}, 360 {0x030b, 0x01}, 361 {0x030c, 0x00}, 362 {0x030d, 0x72}, 363 {0x0624, 0x06}, 364 {0x0625, 0x68}, 365 {0x0626, 0x04}, 366 {0x0627, 0xd0}, 367 {0x455e, 0x00}, 368 {0x471e, 0x4b}, 369 {0x4767, 0x0f}, 370 {0x4750, 0x14}, 371 {0x4540, 0x00}, 372 {0x47b4, 0x14}, 373 {0x4713, 0x30}, 374 {0x478b, 0x10}, 375 {0x478f, 0x10}, 376 {0x4793, 0x10}, 377 {0x4797, 0x0e}, 378 {0x479b, 0x0e}, 379 }; 380 381 static const struct imx219_reg raw8_framefmt_regs[] = { 382 {0x018c, 0x08}, 383 {0x018d, 0x08}, 384 {0x0309, 0x08}, 385 }; 386 387 static const struct imx219_reg raw10_framefmt_regs[] = { 388 {0x018c, 0x0a}, 389 {0x018d, 0x0a}, 390 {0x0309, 0x0a}, 391 }; 392 393 static const char * const imx219_test_pattern_menu[] = { 394 "Disabled", 395 "Color Bars", 396 "Solid Color", 397 "Grey Color Bars", 398 "PN9" 399 }; 400 401 static const int imx219_test_pattern_val[] = { 402 IMX219_TEST_PATTERN_DISABLE, 403 IMX219_TEST_PATTERN_COLOR_BARS, 404 IMX219_TEST_PATTERN_SOLID_COLOR, 405 IMX219_TEST_PATTERN_GREY_COLOR, 406 IMX219_TEST_PATTERN_PN9, 407 }; 408 409 /* regulator supplies */ 410 static const char * const imx219_supply_name[] = { 411 /* Supplies can be enabled in any order */ 412 "VANA", /* Analog (2.8V) supply */ 413 "VDIG", /* Digital Core (1.8V) supply */ 414 "VDDL", /* IF (1.2V) supply */ 415 }; 416 417 #define IMX219_NUM_SUPPLIES ARRAY_SIZE(imx219_supply_name) 418 419 /* 420 * The supported formats. 421 * This table MUST contain 4 entries per format, to cover the various flip 422 * combinations in the order 423 * - no flip 424 * - h flip 425 * - v flip 426 * - h&v flips 427 */ 428 static const u32 codes[] = { 429 MEDIA_BUS_FMT_SRGGB10_1X10, 430 MEDIA_BUS_FMT_SGRBG10_1X10, 431 MEDIA_BUS_FMT_SGBRG10_1X10, 432 MEDIA_BUS_FMT_SBGGR10_1X10, 433 434 MEDIA_BUS_FMT_SRGGB8_1X8, 435 MEDIA_BUS_FMT_SGRBG8_1X8, 436 MEDIA_BUS_FMT_SGBRG8_1X8, 437 MEDIA_BUS_FMT_SBGGR8_1X8, 438 }; 439 440 /* 441 * Initialisation delay between XCLR low->high and the moment when the sensor 442 * can start capture (i.e. can leave software stanby) must be not less than: 443 * t4 + max(t5, t6 + <time to initialize the sensor register over I2C>) 444 * where 445 * t4 is fixed, and is max 200uS, 446 * t5 is fixed, and is 6000uS, 447 * t6 depends on the sensor external clock, and is max 32000 clock periods. 448 * As per sensor datasheet, the external clock must be from 6MHz to 27MHz. 449 * So for any acceptable external clock t6 is always within the range of 450 * 1185 to 5333 uS, and is always less than t5. 451 * For this reason this is always safe to wait (t4 + t5) = 6200 uS, then 452 * initialize the sensor over I2C, and then exit the software standby. 453 * 454 * This start-up time can be optimized a bit more, if we start the writes 455 * over I2C after (t4+t6), but before (t4+t5) expires. But then sensor 456 * initialization over I2C may complete before (t4+t5) expires, and we must 457 * ensure that capture is not started before (t4+t5). 458 * 459 * This delay doesn't account for the power supply startup time. If needed, 460 * this should be taken care of via the regulator framework. E.g. in the 461 * case of DT for regulator-fixed one should define the startup-delay-us 462 * property. 463 */ 464 #define IMX219_XCLR_MIN_DELAY_US 6200 465 #define IMX219_XCLR_DELAY_RANGE_US 1000 466 467 /* Mode configs */ 468 static const struct imx219_mode supported_modes[] = { 469 { 470 /* 8MPix 15fps mode */ 471 .width = 3280, 472 .height = 2464, 473 .crop = { 474 .left = IMX219_PIXEL_ARRAY_LEFT, 475 .top = IMX219_PIXEL_ARRAY_TOP, 476 .width = 3280, 477 .height = 2464 478 }, 479 .vts_def = IMX219_VTS_15FPS, 480 .reg_list = { 481 .num_of_regs = ARRAY_SIZE(mode_3280x2464_regs), 482 .regs = mode_3280x2464_regs, 483 }, 484 }, 485 { 486 /* 1080P 30fps cropped */ 487 .width = 1920, 488 .height = 1080, 489 .crop = { 490 .left = 688, 491 .top = 700, 492 .width = 1920, 493 .height = 1080 494 }, 495 .vts_def = IMX219_VTS_30FPS_1080P, 496 .reg_list = { 497 .num_of_regs = ARRAY_SIZE(mode_1920_1080_regs), 498 .regs = mode_1920_1080_regs, 499 }, 500 }, 501 { 502 /* 2x2 binned 30fps mode */ 503 .width = 1640, 504 .height = 1232, 505 .crop = { 506 .left = IMX219_PIXEL_ARRAY_LEFT, 507 .top = IMX219_PIXEL_ARRAY_TOP, 508 .width = 3280, 509 .height = 2464 510 }, 511 .vts_def = IMX219_VTS_30FPS_BINNED, 512 .reg_list = { 513 .num_of_regs = ARRAY_SIZE(mode_1640_1232_regs), 514 .regs = mode_1640_1232_regs, 515 }, 516 }, 517 { 518 /* 640x480 30fps mode */ 519 .width = 640, 520 .height = 480, 521 .crop = { 522 .left = 1008, 523 .top = 760, 524 .width = 1280, 525 .height = 960 526 }, 527 .vts_def = IMX219_VTS_30FPS_640x480, 528 .reg_list = { 529 .num_of_regs = ARRAY_SIZE(mode_640_480_regs), 530 .regs = mode_640_480_regs, 531 }, 532 }, 533 }; 534 535 struct imx219 { 536 struct v4l2_subdev sd; 537 struct media_pad pad; 538 539 struct v4l2_mbus_framefmt fmt; 540 541 struct clk *xclk; /* system clock to IMX219 */ 542 u32 xclk_freq; 543 544 struct gpio_desc *reset_gpio; 545 struct regulator_bulk_data supplies[IMX219_NUM_SUPPLIES]; 546 547 struct v4l2_ctrl_handler ctrl_handler; 548 /* V4L2 Controls */ 549 struct v4l2_ctrl *pixel_rate; 550 struct v4l2_ctrl *exposure; 551 struct v4l2_ctrl *vflip; 552 struct v4l2_ctrl *hflip; 553 struct v4l2_ctrl *vblank; 554 struct v4l2_ctrl *hblank; 555 556 /* Current mode */ 557 const struct imx219_mode *mode; 558 559 /* 560 * Mutex for serialized access: 561 * Protect sensor module set pad format and start/stop streaming safely. 562 */ 563 struct mutex mutex; 564 565 /* Streaming on/off */ 566 bool streaming; 567 }; 568 569 static inline struct imx219 *to_imx219(struct v4l2_subdev *_sd) 570 { 571 return container_of(_sd, struct imx219, sd); 572 } 573 574 /* Read registers up to 2 at a time */ 575 static int imx219_read_reg(struct imx219 *imx219, u16 reg, u32 len, u32 *val) 576 { 577 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 578 struct i2c_msg msgs[2]; 579 u8 addr_buf[2] = { reg >> 8, reg & 0xff }; 580 u8 data_buf[4] = { 0, }; 581 int ret; 582 583 if (len > 4) 584 return -EINVAL; 585 586 /* Write register address */ 587 msgs[0].addr = client->addr; 588 msgs[0].flags = 0; 589 msgs[0].len = ARRAY_SIZE(addr_buf); 590 msgs[0].buf = addr_buf; 591 592 /* Read data from register */ 593 msgs[1].addr = client->addr; 594 msgs[1].flags = I2C_M_RD; 595 msgs[1].len = len; 596 msgs[1].buf = &data_buf[4 - len]; 597 598 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 599 if (ret != ARRAY_SIZE(msgs)) 600 return -EIO; 601 602 *val = get_unaligned_be32(data_buf); 603 604 return 0; 605 } 606 607 /* Write registers up to 2 at a time */ 608 static int imx219_write_reg(struct imx219 *imx219, u16 reg, u32 len, u32 val) 609 { 610 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 611 u8 buf[6]; 612 613 if (len > 4) 614 return -EINVAL; 615 616 put_unaligned_be16(reg, buf); 617 put_unaligned_be32(val << (8 * (4 - len)), buf + 2); 618 if (i2c_master_send(client, buf, len + 2) != len + 2) 619 return -EIO; 620 621 return 0; 622 } 623 624 /* Write a list of registers */ 625 static int imx219_write_regs(struct imx219 *imx219, 626 const struct imx219_reg *regs, u32 len) 627 { 628 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 629 unsigned int i; 630 int ret; 631 632 for (i = 0; i < len; i++) { 633 ret = imx219_write_reg(imx219, regs[i].address, 1, regs[i].val); 634 if (ret) { 635 dev_err_ratelimited(&client->dev, 636 "Failed to write reg 0x%4.4x. error = %d\n", 637 regs[i].address, ret); 638 639 return ret; 640 } 641 } 642 643 return 0; 644 } 645 646 /* Get bayer order based on flip setting. */ 647 static u32 imx219_get_format_code(struct imx219 *imx219, u32 code) 648 { 649 unsigned int i; 650 651 lockdep_assert_held(&imx219->mutex); 652 653 for (i = 0; i < ARRAY_SIZE(codes); i++) 654 if (codes[i] == code) 655 break; 656 657 if (i >= ARRAY_SIZE(codes)) 658 i = 0; 659 660 i = (i & ~3) | (imx219->vflip->val ? 2 : 0) | 661 (imx219->hflip->val ? 1 : 0); 662 663 return codes[i]; 664 } 665 666 static void imx219_set_default_format(struct imx219 *imx219) 667 { 668 struct v4l2_mbus_framefmt *fmt; 669 670 fmt = &imx219->fmt; 671 fmt->code = MEDIA_BUS_FMT_SRGGB10_1X10; 672 fmt->colorspace = V4L2_COLORSPACE_SRGB; 673 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); 674 fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true, 675 fmt->colorspace, 676 fmt->ycbcr_enc); 677 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); 678 fmt->width = supported_modes[0].width; 679 fmt->height = supported_modes[0].height; 680 fmt->field = V4L2_FIELD_NONE; 681 } 682 683 static int imx219_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) 684 { 685 struct imx219 *imx219 = to_imx219(sd); 686 struct v4l2_mbus_framefmt *try_fmt = 687 v4l2_subdev_get_try_format(sd, fh->pad, 0); 688 struct v4l2_rect *try_crop; 689 690 mutex_lock(&imx219->mutex); 691 692 /* Initialize try_fmt */ 693 try_fmt->width = supported_modes[0].width; 694 try_fmt->height = supported_modes[0].height; 695 try_fmt->code = imx219_get_format_code(imx219, 696 MEDIA_BUS_FMT_SRGGB10_1X10); 697 try_fmt->field = V4L2_FIELD_NONE; 698 699 /* Initialize try_crop rectangle. */ 700 try_crop = v4l2_subdev_get_try_crop(sd, fh->pad, 0); 701 try_crop->top = IMX219_PIXEL_ARRAY_TOP; 702 try_crop->left = IMX219_PIXEL_ARRAY_LEFT; 703 try_crop->width = IMX219_PIXEL_ARRAY_WIDTH; 704 try_crop->height = IMX219_PIXEL_ARRAY_HEIGHT; 705 706 mutex_unlock(&imx219->mutex); 707 708 return 0; 709 } 710 711 static int imx219_set_ctrl(struct v4l2_ctrl *ctrl) 712 { 713 struct imx219 *imx219 = 714 container_of(ctrl->handler, struct imx219, ctrl_handler); 715 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 716 int ret; 717 718 if (ctrl->id == V4L2_CID_VBLANK) { 719 int exposure_max, exposure_def; 720 721 /* Update max exposure while meeting expected vblanking */ 722 exposure_max = imx219->mode->height + ctrl->val - 4; 723 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ? 724 exposure_max : IMX219_EXPOSURE_DEFAULT; 725 __v4l2_ctrl_modify_range(imx219->exposure, 726 imx219->exposure->minimum, 727 exposure_max, imx219->exposure->step, 728 exposure_def); 729 } 730 731 /* 732 * Applying V4L2 control value only happens 733 * when power is up for streaming 734 */ 735 if (pm_runtime_get_if_in_use(&client->dev) == 0) 736 return 0; 737 738 switch (ctrl->id) { 739 case V4L2_CID_ANALOGUE_GAIN: 740 ret = imx219_write_reg(imx219, IMX219_REG_ANALOG_GAIN, 741 IMX219_REG_VALUE_08BIT, ctrl->val); 742 break; 743 case V4L2_CID_EXPOSURE: 744 ret = imx219_write_reg(imx219, IMX219_REG_EXPOSURE, 745 IMX219_REG_VALUE_16BIT, ctrl->val); 746 break; 747 case V4L2_CID_DIGITAL_GAIN: 748 ret = imx219_write_reg(imx219, IMX219_REG_DIGITAL_GAIN, 749 IMX219_REG_VALUE_16BIT, ctrl->val); 750 break; 751 case V4L2_CID_TEST_PATTERN: 752 ret = imx219_write_reg(imx219, IMX219_REG_TEST_PATTERN, 753 IMX219_REG_VALUE_16BIT, 754 imx219_test_pattern_val[ctrl->val]); 755 break; 756 case V4L2_CID_HFLIP: 757 case V4L2_CID_VFLIP: 758 ret = imx219_write_reg(imx219, IMX219_REG_ORIENTATION, 1, 759 imx219->hflip->val | 760 imx219->vflip->val << 1); 761 break; 762 case V4L2_CID_VBLANK: 763 ret = imx219_write_reg(imx219, IMX219_REG_VTS, 764 IMX219_REG_VALUE_16BIT, 765 imx219->mode->height + ctrl->val); 766 break; 767 case V4L2_CID_TEST_PATTERN_RED: 768 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_RED, 769 IMX219_REG_VALUE_16BIT, ctrl->val); 770 break; 771 case V4L2_CID_TEST_PATTERN_GREENR: 772 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENR, 773 IMX219_REG_VALUE_16BIT, ctrl->val); 774 break; 775 case V4L2_CID_TEST_PATTERN_BLUE: 776 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_BLUE, 777 IMX219_REG_VALUE_16BIT, ctrl->val); 778 break; 779 case V4L2_CID_TEST_PATTERN_GREENB: 780 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENB, 781 IMX219_REG_VALUE_16BIT, ctrl->val); 782 break; 783 default: 784 dev_info(&client->dev, 785 "ctrl(id:0x%x,val:0x%x) is not handled\n", 786 ctrl->id, ctrl->val); 787 ret = -EINVAL; 788 break; 789 } 790 791 pm_runtime_put(&client->dev); 792 793 return ret; 794 } 795 796 static const struct v4l2_ctrl_ops imx219_ctrl_ops = { 797 .s_ctrl = imx219_set_ctrl, 798 }; 799 800 static int imx219_enum_mbus_code(struct v4l2_subdev *sd, 801 struct v4l2_subdev_pad_config *cfg, 802 struct v4l2_subdev_mbus_code_enum *code) 803 { 804 struct imx219 *imx219 = to_imx219(sd); 805 806 if (code->index >= (ARRAY_SIZE(codes) / 4)) 807 return -EINVAL; 808 809 mutex_lock(&imx219->mutex); 810 code->code = imx219_get_format_code(imx219, codes[code->index * 4]); 811 mutex_unlock(&imx219->mutex); 812 813 return 0; 814 } 815 816 static int imx219_enum_frame_size(struct v4l2_subdev *sd, 817 struct v4l2_subdev_pad_config *cfg, 818 struct v4l2_subdev_frame_size_enum *fse) 819 { 820 struct imx219 *imx219 = to_imx219(sd); 821 u32 code; 822 823 if (fse->index >= ARRAY_SIZE(supported_modes)) 824 return -EINVAL; 825 826 mutex_lock(&imx219->mutex); 827 code = imx219_get_format_code(imx219, fse->code); 828 mutex_unlock(&imx219->mutex); 829 if (fse->code != code) 830 return -EINVAL; 831 832 fse->min_width = supported_modes[fse->index].width; 833 fse->max_width = fse->min_width; 834 fse->min_height = supported_modes[fse->index].height; 835 fse->max_height = fse->min_height; 836 837 return 0; 838 } 839 840 static void imx219_reset_colorspace(struct v4l2_mbus_framefmt *fmt) 841 { 842 fmt->colorspace = V4L2_COLORSPACE_SRGB; 843 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); 844 fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true, 845 fmt->colorspace, 846 fmt->ycbcr_enc); 847 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); 848 } 849 850 static void imx219_update_pad_format(struct imx219 *imx219, 851 const struct imx219_mode *mode, 852 struct v4l2_subdev_format *fmt) 853 { 854 fmt->format.width = mode->width; 855 fmt->format.height = mode->height; 856 fmt->format.field = V4L2_FIELD_NONE; 857 imx219_reset_colorspace(&fmt->format); 858 } 859 860 static int __imx219_get_pad_format(struct imx219 *imx219, 861 struct v4l2_subdev_pad_config *cfg, 862 struct v4l2_subdev_format *fmt) 863 { 864 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 865 struct v4l2_mbus_framefmt *try_fmt = 866 v4l2_subdev_get_try_format(&imx219->sd, cfg, fmt->pad); 867 /* update the code which could change due to vflip or hflip: */ 868 try_fmt->code = imx219_get_format_code(imx219, try_fmt->code); 869 fmt->format = *try_fmt; 870 } else { 871 imx219_update_pad_format(imx219, imx219->mode, fmt); 872 fmt->format.code = imx219_get_format_code(imx219, 873 imx219->fmt.code); 874 } 875 876 return 0; 877 } 878 879 static int imx219_get_pad_format(struct v4l2_subdev *sd, 880 struct v4l2_subdev_pad_config *cfg, 881 struct v4l2_subdev_format *fmt) 882 { 883 struct imx219 *imx219 = to_imx219(sd); 884 int ret; 885 886 mutex_lock(&imx219->mutex); 887 ret = __imx219_get_pad_format(imx219, cfg, fmt); 888 mutex_unlock(&imx219->mutex); 889 890 return ret; 891 } 892 893 static int imx219_set_pad_format(struct v4l2_subdev *sd, 894 struct v4l2_subdev_pad_config *cfg, 895 struct v4l2_subdev_format *fmt) 896 { 897 struct imx219 *imx219 = to_imx219(sd); 898 const struct imx219_mode *mode; 899 struct v4l2_mbus_framefmt *framefmt; 900 int exposure_max, exposure_def, hblank; 901 unsigned int i; 902 903 mutex_lock(&imx219->mutex); 904 905 for (i = 0; i < ARRAY_SIZE(codes); i++) 906 if (codes[i] == fmt->format.code) 907 break; 908 if (i >= ARRAY_SIZE(codes)) 909 i = 0; 910 911 /* Bayer order varies with flips */ 912 fmt->format.code = imx219_get_format_code(imx219, codes[i]); 913 914 mode = v4l2_find_nearest_size(supported_modes, 915 ARRAY_SIZE(supported_modes), 916 width, height, 917 fmt->format.width, fmt->format.height); 918 imx219_update_pad_format(imx219, mode, fmt); 919 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 920 framefmt = v4l2_subdev_get_try_format(sd, cfg, fmt->pad); 921 *framefmt = fmt->format; 922 } else if (imx219->mode != mode || 923 imx219->fmt.code != fmt->format.code) { 924 imx219->fmt = fmt->format; 925 imx219->mode = mode; 926 /* Update limits and set FPS to default */ 927 __v4l2_ctrl_modify_range(imx219->vblank, IMX219_VBLANK_MIN, 928 IMX219_VTS_MAX - mode->height, 1, 929 mode->vts_def - mode->height); 930 __v4l2_ctrl_s_ctrl(imx219->vblank, 931 mode->vts_def - mode->height); 932 /* Update max exposure while meeting expected vblanking */ 933 exposure_max = mode->vts_def - 4; 934 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ? 935 exposure_max : IMX219_EXPOSURE_DEFAULT; 936 __v4l2_ctrl_modify_range(imx219->exposure, 937 imx219->exposure->minimum, 938 exposure_max, imx219->exposure->step, 939 exposure_def); 940 /* 941 * Currently PPL is fixed to IMX219_PPL_DEFAULT, so hblank 942 * depends on mode->width only, and is not changeble in any 943 * way other than changing the mode. 944 */ 945 hblank = IMX219_PPL_DEFAULT - mode->width; 946 __v4l2_ctrl_modify_range(imx219->hblank, hblank, hblank, 1, 947 hblank); 948 } 949 950 mutex_unlock(&imx219->mutex); 951 952 return 0; 953 } 954 955 static int imx219_set_framefmt(struct imx219 *imx219) 956 { 957 switch (imx219->fmt.code) { 958 case MEDIA_BUS_FMT_SRGGB8_1X8: 959 case MEDIA_BUS_FMT_SGRBG8_1X8: 960 case MEDIA_BUS_FMT_SGBRG8_1X8: 961 case MEDIA_BUS_FMT_SBGGR8_1X8: 962 return imx219_write_regs(imx219, raw8_framefmt_regs, 963 ARRAY_SIZE(raw8_framefmt_regs)); 964 965 case MEDIA_BUS_FMT_SRGGB10_1X10: 966 case MEDIA_BUS_FMT_SGRBG10_1X10: 967 case MEDIA_BUS_FMT_SGBRG10_1X10: 968 case MEDIA_BUS_FMT_SBGGR10_1X10: 969 return imx219_write_regs(imx219, raw10_framefmt_regs, 970 ARRAY_SIZE(raw10_framefmt_regs)); 971 } 972 973 return -EINVAL; 974 } 975 976 static const struct v4l2_rect * 977 __imx219_get_pad_crop(struct imx219 *imx219, struct v4l2_subdev_pad_config *cfg, 978 unsigned int pad, enum v4l2_subdev_format_whence which) 979 { 980 switch (which) { 981 case V4L2_SUBDEV_FORMAT_TRY: 982 return v4l2_subdev_get_try_crop(&imx219->sd, cfg, pad); 983 case V4L2_SUBDEV_FORMAT_ACTIVE: 984 return &imx219->mode->crop; 985 } 986 987 return NULL; 988 } 989 990 static int imx219_get_selection(struct v4l2_subdev *sd, 991 struct v4l2_subdev_pad_config *cfg, 992 struct v4l2_subdev_selection *sel) 993 { 994 switch (sel->target) { 995 case V4L2_SEL_TGT_CROP: { 996 struct imx219 *imx219 = to_imx219(sd); 997 998 mutex_lock(&imx219->mutex); 999 sel->r = *__imx219_get_pad_crop(imx219, cfg, sel->pad, 1000 sel->which); 1001 mutex_unlock(&imx219->mutex); 1002 1003 return 0; 1004 } 1005 1006 case V4L2_SEL_TGT_NATIVE_SIZE: 1007 sel->r.top = 0; 1008 sel->r.left = 0; 1009 sel->r.width = IMX219_NATIVE_WIDTH; 1010 sel->r.height = IMX219_NATIVE_HEIGHT; 1011 1012 return 0; 1013 1014 case V4L2_SEL_TGT_CROP_DEFAULT: 1015 case V4L2_SEL_TGT_CROP_BOUNDS: 1016 sel->r.top = IMX219_PIXEL_ARRAY_TOP; 1017 sel->r.left = IMX219_PIXEL_ARRAY_LEFT; 1018 sel->r.width = IMX219_PIXEL_ARRAY_WIDTH; 1019 sel->r.height = IMX219_PIXEL_ARRAY_HEIGHT; 1020 1021 return 0; 1022 } 1023 1024 return -EINVAL; 1025 } 1026 1027 static int imx219_start_streaming(struct imx219 *imx219) 1028 { 1029 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 1030 const struct imx219_reg_list *reg_list; 1031 int ret; 1032 1033 /* Apply default values of current mode */ 1034 reg_list = &imx219->mode->reg_list; 1035 ret = imx219_write_regs(imx219, reg_list->regs, reg_list->num_of_regs); 1036 if (ret) { 1037 dev_err(&client->dev, "%s failed to set mode\n", __func__); 1038 return ret; 1039 } 1040 1041 ret = imx219_set_framefmt(imx219); 1042 if (ret) { 1043 dev_err(&client->dev, "%s failed to set frame format: %d\n", 1044 __func__, ret); 1045 return ret; 1046 } 1047 1048 /* Apply customized values from user */ 1049 ret = __v4l2_ctrl_handler_setup(imx219->sd.ctrl_handler); 1050 if (ret) 1051 return ret; 1052 1053 /* set stream on register */ 1054 return imx219_write_reg(imx219, IMX219_REG_MODE_SELECT, 1055 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING); 1056 } 1057 1058 static void imx219_stop_streaming(struct imx219 *imx219) 1059 { 1060 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 1061 int ret; 1062 1063 /* set stream off register */ 1064 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT, 1065 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY); 1066 if (ret) 1067 dev_err(&client->dev, "%s failed to set stream\n", __func__); 1068 } 1069 1070 static int imx219_set_stream(struct v4l2_subdev *sd, int enable) 1071 { 1072 struct imx219 *imx219 = to_imx219(sd); 1073 struct i2c_client *client = v4l2_get_subdevdata(sd); 1074 int ret = 0; 1075 1076 mutex_lock(&imx219->mutex); 1077 if (imx219->streaming == enable) { 1078 mutex_unlock(&imx219->mutex); 1079 return 0; 1080 } 1081 1082 if (enable) { 1083 ret = pm_runtime_get_sync(&client->dev); 1084 if (ret < 0) { 1085 pm_runtime_put_noidle(&client->dev); 1086 goto err_unlock; 1087 } 1088 1089 /* 1090 * Apply default & customized values 1091 * and then start streaming. 1092 */ 1093 ret = imx219_start_streaming(imx219); 1094 if (ret) 1095 goto err_rpm_put; 1096 } else { 1097 imx219_stop_streaming(imx219); 1098 pm_runtime_put(&client->dev); 1099 } 1100 1101 imx219->streaming = enable; 1102 1103 /* vflip and hflip cannot change during streaming */ 1104 __v4l2_ctrl_grab(imx219->vflip, enable); 1105 __v4l2_ctrl_grab(imx219->hflip, enable); 1106 1107 mutex_unlock(&imx219->mutex); 1108 1109 return ret; 1110 1111 err_rpm_put: 1112 pm_runtime_put(&client->dev); 1113 err_unlock: 1114 mutex_unlock(&imx219->mutex); 1115 1116 return ret; 1117 } 1118 1119 /* Power/clock management functions */ 1120 static int imx219_power_on(struct device *dev) 1121 { 1122 struct v4l2_subdev *sd = dev_get_drvdata(dev); 1123 struct imx219 *imx219 = to_imx219(sd); 1124 int ret; 1125 1126 ret = regulator_bulk_enable(IMX219_NUM_SUPPLIES, 1127 imx219->supplies); 1128 if (ret) { 1129 dev_err(dev, "%s: failed to enable regulators\n", 1130 __func__); 1131 return ret; 1132 } 1133 1134 ret = clk_prepare_enable(imx219->xclk); 1135 if (ret) { 1136 dev_err(dev, "%s: failed to enable clock\n", 1137 __func__); 1138 goto reg_off; 1139 } 1140 1141 gpiod_set_value_cansleep(imx219->reset_gpio, 1); 1142 usleep_range(IMX219_XCLR_MIN_DELAY_US, 1143 IMX219_XCLR_MIN_DELAY_US + IMX219_XCLR_DELAY_RANGE_US); 1144 1145 return 0; 1146 1147 reg_off: 1148 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies); 1149 1150 return ret; 1151 } 1152 1153 static int imx219_power_off(struct device *dev) 1154 { 1155 struct v4l2_subdev *sd = dev_get_drvdata(dev); 1156 struct imx219 *imx219 = to_imx219(sd); 1157 1158 gpiod_set_value_cansleep(imx219->reset_gpio, 0); 1159 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies); 1160 clk_disable_unprepare(imx219->xclk); 1161 1162 return 0; 1163 } 1164 1165 static int __maybe_unused imx219_suspend(struct device *dev) 1166 { 1167 struct v4l2_subdev *sd = dev_get_drvdata(dev); 1168 struct imx219 *imx219 = to_imx219(sd); 1169 1170 if (imx219->streaming) 1171 imx219_stop_streaming(imx219); 1172 1173 return 0; 1174 } 1175 1176 static int __maybe_unused imx219_resume(struct device *dev) 1177 { 1178 struct v4l2_subdev *sd = dev_get_drvdata(dev); 1179 struct imx219 *imx219 = to_imx219(sd); 1180 int ret; 1181 1182 if (imx219->streaming) { 1183 ret = imx219_start_streaming(imx219); 1184 if (ret) 1185 goto error; 1186 } 1187 1188 return 0; 1189 1190 error: 1191 imx219_stop_streaming(imx219); 1192 imx219->streaming = false; 1193 1194 return ret; 1195 } 1196 1197 static int imx219_get_regulators(struct imx219 *imx219) 1198 { 1199 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 1200 unsigned int i; 1201 1202 for (i = 0; i < IMX219_NUM_SUPPLIES; i++) 1203 imx219->supplies[i].supply = imx219_supply_name[i]; 1204 1205 return devm_regulator_bulk_get(&client->dev, 1206 IMX219_NUM_SUPPLIES, 1207 imx219->supplies); 1208 } 1209 1210 /* Verify chip ID */ 1211 static int imx219_identify_module(struct imx219 *imx219) 1212 { 1213 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 1214 int ret; 1215 u32 val; 1216 1217 ret = imx219_read_reg(imx219, IMX219_REG_CHIP_ID, 1218 IMX219_REG_VALUE_16BIT, &val); 1219 if (ret) { 1220 dev_err(&client->dev, "failed to read chip id %x\n", 1221 IMX219_CHIP_ID); 1222 return ret; 1223 } 1224 1225 if (val != IMX219_CHIP_ID) { 1226 dev_err(&client->dev, "chip id mismatch: %x!=%x\n", 1227 IMX219_CHIP_ID, val); 1228 return -EIO; 1229 } 1230 1231 return 0; 1232 } 1233 1234 static const struct v4l2_subdev_core_ops imx219_core_ops = { 1235 .subscribe_event = v4l2_ctrl_subdev_subscribe_event, 1236 .unsubscribe_event = v4l2_event_subdev_unsubscribe, 1237 }; 1238 1239 static const struct v4l2_subdev_video_ops imx219_video_ops = { 1240 .s_stream = imx219_set_stream, 1241 }; 1242 1243 static const struct v4l2_subdev_pad_ops imx219_pad_ops = { 1244 .enum_mbus_code = imx219_enum_mbus_code, 1245 .get_fmt = imx219_get_pad_format, 1246 .set_fmt = imx219_set_pad_format, 1247 .get_selection = imx219_get_selection, 1248 .enum_frame_size = imx219_enum_frame_size, 1249 }; 1250 1251 static const struct v4l2_subdev_ops imx219_subdev_ops = { 1252 .core = &imx219_core_ops, 1253 .video = &imx219_video_ops, 1254 .pad = &imx219_pad_ops, 1255 }; 1256 1257 static const struct v4l2_subdev_internal_ops imx219_internal_ops = { 1258 .open = imx219_open, 1259 }; 1260 1261 /* Initialize control handlers */ 1262 static int imx219_init_controls(struct imx219 *imx219) 1263 { 1264 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 1265 struct v4l2_ctrl_handler *ctrl_hdlr; 1266 unsigned int height = imx219->mode->height; 1267 struct v4l2_fwnode_device_properties props; 1268 int exposure_max, exposure_def, hblank; 1269 int i, ret; 1270 1271 ctrl_hdlr = &imx219->ctrl_handler; 1272 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 11); 1273 if (ret) 1274 return ret; 1275 1276 mutex_init(&imx219->mutex); 1277 ctrl_hdlr->lock = &imx219->mutex; 1278 1279 /* By default, PIXEL_RATE is read only */ 1280 imx219->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1281 V4L2_CID_PIXEL_RATE, 1282 IMX219_PIXEL_RATE, 1283 IMX219_PIXEL_RATE, 1, 1284 IMX219_PIXEL_RATE); 1285 1286 /* Initial vblank/hblank/exposure parameters based on current mode */ 1287 imx219->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1288 V4L2_CID_VBLANK, IMX219_VBLANK_MIN, 1289 IMX219_VTS_MAX - height, 1, 1290 imx219->mode->vts_def - height); 1291 hblank = IMX219_PPL_DEFAULT - imx219->mode->width; 1292 imx219->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1293 V4L2_CID_HBLANK, hblank, hblank, 1294 1, hblank); 1295 if (imx219->hblank) 1296 imx219->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1297 exposure_max = imx219->mode->vts_def - 4; 1298 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ? 1299 exposure_max : IMX219_EXPOSURE_DEFAULT; 1300 imx219->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1301 V4L2_CID_EXPOSURE, 1302 IMX219_EXPOSURE_MIN, exposure_max, 1303 IMX219_EXPOSURE_STEP, 1304 exposure_def); 1305 1306 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, 1307 IMX219_ANA_GAIN_MIN, IMX219_ANA_GAIN_MAX, 1308 IMX219_ANA_GAIN_STEP, IMX219_ANA_GAIN_DEFAULT); 1309 1310 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_DIGITAL_GAIN, 1311 IMX219_DGTL_GAIN_MIN, IMX219_DGTL_GAIN_MAX, 1312 IMX219_DGTL_GAIN_STEP, IMX219_DGTL_GAIN_DEFAULT); 1313 1314 imx219->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1315 V4L2_CID_HFLIP, 0, 1, 1, 0); 1316 if (imx219->hflip) 1317 imx219->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; 1318 1319 imx219->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1320 V4L2_CID_VFLIP, 0, 1, 1, 0); 1321 if (imx219->vflip) 1322 imx219->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; 1323 1324 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx219_ctrl_ops, 1325 V4L2_CID_TEST_PATTERN, 1326 ARRAY_SIZE(imx219_test_pattern_menu) - 1, 1327 0, 0, imx219_test_pattern_menu); 1328 for (i = 0; i < 4; i++) { 1329 /* 1330 * The assumption is that 1331 * V4L2_CID_TEST_PATTERN_GREENR == V4L2_CID_TEST_PATTERN_RED + 1 1332 * V4L2_CID_TEST_PATTERN_BLUE == V4L2_CID_TEST_PATTERN_RED + 2 1333 * V4L2_CID_TEST_PATTERN_GREENB == V4L2_CID_TEST_PATTERN_RED + 3 1334 */ 1335 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1336 V4L2_CID_TEST_PATTERN_RED + i, 1337 IMX219_TESTP_COLOUR_MIN, 1338 IMX219_TESTP_COLOUR_MAX, 1339 IMX219_TESTP_COLOUR_STEP, 1340 IMX219_TESTP_COLOUR_MAX); 1341 /* The "Solid color" pattern is white by default */ 1342 } 1343 1344 if (ctrl_hdlr->error) { 1345 ret = ctrl_hdlr->error; 1346 dev_err(&client->dev, "%s control init failed (%d)\n", 1347 __func__, ret); 1348 goto error; 1349 } 1350 1351 ret = v4l2_fwnode_device_parse(&client->dev, &props); 1352 if (ret) 1353 goto error; 1354 1355 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx219_ctrl_ops, 1356 &props); 1357 if (ret) 1358 goto error; 1359 1360 imx219->sd.ctrl_handler = ctrl_hdlr; 1361 1362 return 0; 1363 1364 error: 1365 v4l2_ctrl_handler_free(ctrl_hdlr); 1366 mutex_destroy(&imx219->mutex); 1367 1368 return ret; 1369 } 1370 1371 static void imx219_free_controls(struct imx219 *imx219) 1372 { 1373 v4l2_ctrl_handler_free(imx219->sd.ctrl_handler); 1374 mutex_destroy(&imx219->mutex); 1375 } 1376 1377 static int imx219_check_hwcfg(struct device *dev) 1378 { 1379 struct fwnode_handle *endpoint; 1380 struct v4l2_fwnode_endpoint ep_cfg = { 1381 .bus_type = V4L2_MBUS_CSI2_DPHY 1382 }; 1383 int ret = -EINVAL; 1384 1385 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL); 1386 if (!endpoint) { 1387 dev_err(dev, "endpoint node not found\n"); 1388 return -EINVAL; 1389 } 1390 1391 if (v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep_cfg)) { 1392 dev_err(dev, "could not parse endpoint\n"); 1393 goto error_out; 1394 } 1395 1396 /* Check the number of MIPI CSI2 data lanes */ 1397 if (ep_cfg.bus.mipi_csi2.num_data_lanes != 2) { 1398 dev_err(dev, "only 2 data lanes are currently supported\n"); 1399 goto error_out; 1400 } 1401 1402 /* Check the link frequency set in device tree */ 1403 if (!ep_cfg.nr_of_link_frequencies) { 1404 dev_err(dev, "link-frequency property not found in DT\n"); 1405 goto error_out; 1406 } 1407 1408 if (ep_cfg.nr_of_link_frequencies != 1 || 1409 ep_cfg.link_frequencies[0] != IMX219_DEFAULT_LINK_FREQ) { 1410 dev_err(dev, "Link frequency not supported: %lld\n", 1411 ep_cfg.link_frequencies[0]); 1412 goto error_out; 1413 } 1414 1415 ret = 0; 1416 1417 error_out: 1418 v4l2_fwnode_endpoint_free(&ep_cfg); 1419 fwnode_handle_put(endpoint); 1420 1421 return ret; 1422 } 1423 1424 static int imx219_probe(struct i2c_client *client) 1425 { 1426 struct device *dev = &client->dev; 1427 struct imx219 *imx219; 1428 int ret; 1429 1430 imx219 = devm_kzalloc(&client->dev, sizeof(*imx219), GFP_KERNEL); 1431 if (!imx219) 1432 return -ENOMEM; 1433 1434 v4l2_i2c_subdev_init(&imx219->sd, client, &imx219_subdev_ops); 1435 1436 /* Check the hardware configuration in device tree */ 1437 if (imx219_check_hwcfg(dev)) 1438 return -EINVAL; 1439 1440 /* Get system clock (xclk) */ 1441 imx219->xclk = devm_clk_get(dev, NULL); 1442 if (IS_ERR(imx219->xclk)) { 1443 dev_err(dev, "failed to get xclk\n"); 1444 return PTR_ERR(imx219->xclk); 1445 } 1446 1447 imx219->xclk_freq = clk_get_rate(imx219->xclk); 1448 if (imx219->xclk_freq != IMX219_XCLK_FREQ) { 1449 dev_err(dev, "xclk frequency not supported: %d Hz\n", 1450 imx219->xclk_freq); 1451 return -EINVAL; 1452 } 1453 1454 ret = imx219_get_regulators(imx219); 1455 if (ret) { 1456 dev_err(dev, "failed to get regulators\n"); 1457 return ret; 1458 } 1459 1460 /* Request optional enable pin */ 1461 imx219->reset_gpio = devm_gpiod_get_optional(dev, "reset", 1462 GPIOD_OUT_HIGH); 1463 1464 /* 1465 * The sensor must be powered for imx219_identify_module() 1466 * to be able to read the CHIP_ID register 1467 */ 1468 ret = imx219_power_on(dev); 1469 if (ret) 1470 return ret; 1471 1472 ret = imx219_identify_module(imx219); 1473 if (ret) 1474 goto error_power_off; 1475 1476 /* Set default mode to max resolution */ 1477 imx219->mode = &supported_modes[0]; 1478 1479 /* sensor doesn't enter LP-11 state upon power up until and unless 1480 * streaming is started, so upon power up switch the modes to: 1481 * streaming -> standby 1482 */ 1483 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT, 1484 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING); 1485 if (ret < 0) 1486 goto error_power_off; 1487 usleep_range(100, 110); 1488 1489 /* put sensor back to standby mode */ 1490 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT, 1491 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY); 1492 if (ret < 0) 1493 goto error_power_off; 1494 usleep_range(100, 110); 1495 1496 ret = imx219_init_controls(imx219); 1497 if (ret) 1498 goto error_power_off; 1499 1500 /* Initialize subdev */ 1501 imx219->sd.internal_ops = &imx219_internal_ops; 1502 imx219->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | 1503 V4L2_SUBDEV_FL_HAS_EVENTS; 1504 imx219->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1505 1506 /* Initialize source pad */ 1507 imx219->pad.flags = MEDIA_PAD_FL_SOURCE; 1508 1509 /* Initialize default format */ 1510 imx219_set_default_format(imx219); 1511 1512 ret = media_entity_pads_init(&imx219->sd.entity, 1, &imx219->pad); 1513 if (ret) { 1514 dev_err(dev, "failed to init entity pads: %d\n", ret); 1515 goto error_handler_free; 1516 } 1517 1518 ret = v4l2_async_register_subdev_sensor_common(&imx219->sd); 1519 if (ret < 0) { 1520 dev_err(dev, "failed to register sensor sub-device: %d\n", ret); 1521 goto error_media_entity; 1522 } 1523 1524 /* Enable runtime PM and turn off the device */ 1525 pm_runtime_set_active(dev); 1526 pm_runtime_enable(dev); 1527 pm_runtime_idle(dev); 1528 1529 return 0; 1530 1531 error_media_entity: 1532 media_entity_cleanup(&imx219->sd.entity); 1533 1534 error_handler_free: 1535 imx219_free_controls(imx219); 1536 1537 error_power_off: 1538 imx219_power_off(dev); 1539 1540 return ret; 1541 } 1542 1543 static int imx219_remove(struct i2c_client *client) 1544 { 1545 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1546 struct imx219 *imx219 = to_imx219(sd); 1547 1548 v4l2_async_unregister_subdev(sd); 1549 media_entity_cleanup(&sd->entity); 1550 imx219_free_controls(imx219); 1551 1552 pm_runtime_disable(&client->dev); 1553 if (!pm_runtime_status_suspended(&client->dev)) 1554 imx219_power_off(&client->dev); 1555 pm_runtime_set_suspended(&client->dev); 1556 1557 return 0; 1558 } 1559 1560 static const struct of_device_id imx219_dt_ids[] = { 1561 { .compatible = "sony,imx219" }, 1562 { /* sentinel */ } 1563 }; 1564 MODULE_DEVICE_TABLE(of, imx219_dt_ids); 1565 1566 static const struct dev_pm_ops imx219_pm_ops = { 1567 SET_SYSTEM_SLEEP_PM_OPS(imx219_suspend, imx219_resume) 1568 SET_RUNTIME_PM_OPS(imx219_power_off, imx219_power_on, NULL) 1569 }; 1570 1571 static struct i2c_driver imx219_i2c_driver = { 1572 .driver = { 1573 .name = "imx219", 1574 .of_match_table = imx219_dt_ids, 1575 .pm = &imx219_pm_ops, 1576 }, 1577 .probe_new = imx219_probe, 1578 .remove = imx219_remove, 1579 }; 1580 1581 module_i2c_driver(imx219_i2c_driver); 1582 1583 MODULE_AUTHOR("Dave Stevenson <dave.stevenson@raspberrypi.com"); 1584 MODULE_DESCRIPTION("Sony IMX219 sensor driver"); 1585 MODULE_LICENSE("GPL v2"); 1586