xref: /openbmc/linux/drivers/media/i2c/hi556.c (revision f71a261a)
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2019 Intel Corporation.
3 
4 #include <asm/unaligned.h>
5 #include <linux/acpi.h>
6 #include <linux/delay.h>
7 #include <linux/i2c.h>
8 #include <linux/module.h>
9 #include <linux/pm_runtime.h>
10 #include <media/v4l2-ctrls.h>
11 #include <media/v4l2-device.h>
12 #include <media/v4l2-fwnode.h>
13 
14 #define HI556_REG_VALUE_08BIT		1
15 #define HI556_REG_VALUE_16BIT		2
16 #define HI556_REG_VALUE_24BIT		3
17 
18 #define HI556_LINK_FREQ_437MHZ		437000000ULL
19 #define HI556_MCLK			19200000
20 #define HI556_DATA_LANES		2
21 #define HI556_RGB_DEPTH			10
22 
23 #define HI556_REG_CHIP_ID		0x0f16
24 #define HI556_CHIP_ID			0x0556
25 
26 #define HI556_REG_MODE_SELECT		0x0a00
27 #define HI556_MODE_STANDBY		0x0000
28 #define HI556_MODE_STREAMING		0x0100
29 
30 /* vertical-timings from sensor */
31 #define HI556_REG_FLL			0x0006
32 #define HI556_FLL_30FPS			0x0814
33 #define HI556_FLL_30FPS_MIN		0x0814
34 #define HI556_FLL_MAX			0x7fff
35 
36 /* horizontal-timings from sensor */
37 #define HI556_REG_LLP			0x0008
38 
39 /* Exposure controls from sensor */
40 #define HI556_REG_EXPOSURE		0x0074
41 #define HI556_EXPOSURE_MIN		6
42 #define HI556_EXPOSURE_MAX_MARGIN	2
43 #define HI556_EXPOSURE_STEP		1
44 
45 /* Analog gain controls from sensor */
46 #define HI556_REG_ANALOG_GAIN		0x0077
47 #define HI556_ANAL_GAIN_MIN		0
48 #define HI556_ANAL_GAIN_MAX		240
49 #define HI556_ANAL_GAIN_STEP		1
50 
51 /* Digital gain controls from sensor */
52 #define HI556_REG_MWB_GR_GAIN		0x0078
53 #define HI556_REG_MWB_GB_GAIN		0x007a
54 #define HI556_REG_MWB_R_GAIN		0x007c
55 #define HI556_REG_MWB_B_GAIN		0x007e
56 #define HI556_DGTL_GAIN_MIN		0
57 #define HI556_DGTL_GAIN_MAX		2048
58 #define HI556_DGTL_GAIN_STEP		1
59 #define HI556_DGTL_GAIN_DEFAULT		256
60 
61 /* Test Pattern Control */
62 #define HI556_REG_ISP			0X0a05
63 #define HI556_REG_ISP_TPG_EN		0x01
64 #define HI556_REG_TEST_PATTERN		0x0201
65 
66 enum {
67 	HI556_LINK_FREQ_437MHZ_INDEX,
68 };
69 
70 struct hi556_reg {
71 	u16 address;
72 	u16 val;
73 };
74 
75 struct hi556_reg_list {
76 	u32 num_of_regs;
77 	const struct hi556_reg *regs;
78 };
79 
80 struct hi556_link_freq_config {
81 	const struct hi556_reg_list reg_list;
82 };
83 
84 struct hi556_mode {
85 	/* Frame width in pixels */
86 	u32 width;
87 
88 	/* Frame height in pixels */
89 	u32 height;
90 
91 	/* Horizontal timining size */
92 	u32 llp;
93 
94 	/* Default vertical timining size */
95 	u32 fll_def;
96 
97 	/* Min vertical timining size */
98 	u32 fll_min;
99 
100 	/* Link frequency needed for this resolution */
101 	u32 link_freq_index;
102 
103 	/* Sensor register settings for this resolution */
104 	const struct hi556_reg_list reg_list;
105 };
106 
107 #define to_hi556(_sd) container_of(_sd, struct hi556, sd)
108 
109 //SENSOR_INITIALIZATION
110 static const struct hi556_reg mipi_data_rate_874mbps[] = {
111 	{0x0e00, 0x0102},
112 	{0x0e02, 0x0102},
113 	{0x0e0c, 0x0100},
114 	{0x2000, 0x7400},
115 	{0x2002, 0x001c},
116 	{0x2004, 0x0242},
117 	{0x2006, 0x0942},
118 	{0x2008, 0x7007},
119 	{0x200a, 0x0fd9},
120 	{0x200c, 0x0259},
121 	{0x200e, 0x7008},
122 	{0x2010, 0x160e},
123 	{0x2012, 0x0047},
124 	{0x2014, 0x2118},
125 	{0x2016, 0x0041},
126 	{0x2018, 0x00d8},
127 	{0x201a, 0x0145},
128 	{0x201c, 0x0006},
129 	{0x201e, 0x0181},
130 	{0x2020, 0x13cc},
131 	{0x2022, 0x2057},
132 	{0x2024, 0x7001},
133 	{0x2026, 0x0fca},
134 	{0x2028, 0x00cb},
135 	{0x202a, 0x009f},
136 	{0x202c, 0x7002},
137 	{0x202e, 0x13cc},
138 	{0x2030, 0x019b},
139 	{0x2032, 0x014d},
140 	{0x2034, 0x2987},
141 	{0x2036, 0x2766},
142 	{0x2038, 0x0020},
143 	{0x203a, 0x2060},
144 	{0x203c, 0x0e5d},
145 	{0x203e, 0x181d},
146 	{0x2040, 0x2066},
147 	{0x2042, 0x20c4},
148 	{0x2044, 0x5000},
149 	{0x2046, 0x0005},
150 	{0x2048, 0x0000},
151 	{0x204a, 0x01db},
152 	{0x204c, 0x025a},
153 	{0x204e, 0x00c0},
154 	{0x2050, 0x0005},
155 	{0x2052, 0x0006},
156 	{0x2054, 0x0ad9},
157 	{0x2056, 0x0259},
158 	{0x2058, 0x0618},
159 	{0x205a, 0x0258},
160 	{0x205c, 0x2266},
161 	{0x205e, 0x20c8},
162 	{0x2060, 0x2060},
163 	{0x2062, 0x707b},
164 	{0x2064, 0x0fdd},
165 	{0x2066, 0x81b8},
166 	{0x2068, 0x5040},
167 	{0x206a, 0x0020},
168 	{0x206c, 0x5060},
169 	{0x206e, 0x3143},
170 	{0x2070, 0x5081},
171 	{0x2072, 0x025c},
172 	{0x2074, 0x7800},
173 	{0x2076, 0x7400},
174 	{0x2078, 0x001c},
175 	{0x207a, 0x0242},
176 	{0x207c, 0x0942},
177 	{0x207e, 0x0bd9},
178 	{0x2080, 0x0259},
179 	{0x2082, 0x7008},
180 	{0x2084, 0x160e},
181 	{0x2086, 0x0047},
182 	{0x2088, 0x2118},
183 	{0x208a, 0x0041},
184 	{0x208c, 0x00d8},
185 	{0x208e, 0x0145},
186 	{0x2090, 0x0006},
187 	{0x2092, 0x0181},
188 	{0x2094, 0x13cc},
189 	{0x2096, 0x2057},
190 	{0x2098, 0x7001},
191 	{0x209a, 0x0fca},
192 	{0x209c, 0x00cb},
193 	{0x209e, 0x009f},
194 	{0x20a0, 0x7002},
195 	{0x20a2, 0x13cc},
196 	{0x20a4, 0x019b},
197 	{0x20a6, 0x014d},
198 	{0x20a8, 0x2987},
199 	{0x20aa, 0x2766},
200 	{0x20ac, 0x0020},
201 	{0x20ae, 0x2060},
202 	{0x20b0, 0x0e5d},
203 	{0x20b2, 0x181d},
204 	{0x20b4, 0x2066},
205 	{0x20b6, 0x20c4},
206 	{0x20b8, 0x50a0},
207 	{0x20ba, 0x0005},
208 	{0x20bc, 0x0000},
209 	{0x20be, 0x01db},
210 	{0x20c0, 0x025a},
211 	{0x20c2, 0x00c0},
212 	{0x20c4, 0x0005},
213 	{0x20c6, 0x0006},
214 	{0x20c8, 0x0ad9},
215 	{0x20ca, 0x0259},
216 	{0x20cc, 0x0618},
217 	{0x20ce, 0x0258},
218 	{0x20d0, 0x2266},
219 	{0x20d2, 0x20c8},
220 	{0x20d4, 0x2060},
221 	{0x20d6, 0x707b},
222 	{0x20d8, 0x0fdd},
223 	{0x20da, 0x86b8},
224 	{0x20dc, 0x50e0},
225 	{0x20de, 0x0020},
226 	{0x20e0, 0x5100},
227 	{0x20e2, 0x3143},
228 	{0x20e4, 0x5121},
229 	{0x20e6, 0x7800},
230 	{0x20e8, 0x3140},
231 	{0x20ea, 0x01c4},
232 	{0x20ec, 0x01c1},
233 	{0x20ee, 0x01c0},
234 	{0x20f0, 0x01c4},
235 	{0x20f2, 0x2700},
236 	{0x20f4, 0x3d40},
237 	{0x20f6, 0x7800},
238 	{0x20f8, 0xffff},
239 	{0x27fe, 0xe000},
240 	{0x3000, 0x60f8},
241 	{0x3002, 0x187f},
242 	{0x3004, 0x7060},
243 	{0x3006, 0x0114},
244 	{0x3008, 0x60b0},
245 	{0x300a, 0x1473},
246 	{0x300c, 0x0013},
247 	{0x300e, 0x140f},
248 	{0x3010, 0x0040},
249 	{0x3012, 0x100f},
250 	{0x3014, 0x60f8},
251 	{0x3016, 0x187f},
252 	{0x3018, 0x7060},
253 	{0x301a, 0x0114},
254 	{0x301c, 0x60b0},
255 	{0x301e, 0x1473},
256 	{0x3020, 0x0013},
257 	{0x3022, 0x140f},
258 	{0x3024, 0x0040},
259 	{0x3026, 0x000f},
260 
261 	{0x0b00, 0x0000},
262 	{0x0b02, 0x0045},
263 	{0x0b04, 0xb405},
264 	{0x0b06, 0xc403},
265 	{0x0b08, 0x0081},
266 	{0x0b0a, 0x8252},
267 	{0x0b0c, 0xf814},
268 	{0x0b0e, 0xc618},
269 	{0x0b10, 0xa828},
270 	{0x0b12, 0x004c},
271 	{0x0b14, 0x4068},
272 	{0x0b16, 0x0000},
273 	{0x0f30, 0x5b15},
274 	{0x0f32, 0x7067},
275 	{0x0954, 0x0009},
276 	{0x0956, 0x0000},
277 	{0x0958, 0xbb80},
278 	{0x095a, 0x5140},
279 	{0x0c00, 0x1110},
280 	{0x0c02, 0x0011},
281 	{0x0c04, 0x0000},
282 	{0x0c06, 0x0200},
283 	{0x0c10, 0x0040},
284 	{0x0c12, 0x0040},
285 	{0x0c14, 0x0040},
286 	{0x0c16, 0x0040},
287 	{0x0a10, 0x4000},
288 	{0x3068, 0xf800},
289 	{0x306a, 0xf876},
290 	{0x006c, 0x0000},
291 	{0x005e, 0x0200},
292 	{0x000e, 0x0100},
293 	{0x0e0a, 0x0001},
294 	{0x004a, 0x0100},
295 	{0x004c, 0x0000},
296 	{0x004e, 0x0100},
297 	{0x000c, 0x0022},
298 	{0x0008, 0x0b00},
299 	{0x005a, 0x0202},
300 	{0x0012, 0x000e},
301 	{0x0018, 0x0a33},
302 	{0x0022, 0x0008},
303 	{0x0028, 0x0017},
304 	{0x0024, 0x0028},
305 	{0x002a, 0x002d},
306 	{0x0026, 0x0030},
307 	{0x002c, 0x07c9},
308 	{0x002e, 0x1111},
309 	{0x0030, 0x1111},
310 	{0x0032, 0x1111},
311 	{0x0006, 0x07bc},
312 	{0x0a22, 0x0000},
313 	{0x0a12, 0x0a20},
314 	{0x0a14, 0x0798},
315 	{0x003e, 0x0000},
316 	{0x0074, 0x080e},
317 	{0x0070, 0x0407},
318 	{0x0002, 0x0000},
319 	{0x0a02, 0x0100},
320 	{0x0a24, 0x0100},
321 	{0x0046, 0x0000},
322 	{0x0076, 0x0000},
323 	{0x0060, 0x0000},
324 	{0x0062, 0x0530},
325 	{0x0064, 0x0500},
326 	{0x0066, 0x0530},
327 	{0x0068, 0x0500},
328 	{0x0122, 0x0300},
329 	{0x015a, 0xff08},
330 	{0x0804, 0x0300},
331 	{0x0806, 0x0100},
332 	{0x005c, 0x0102},
333 	{0x0a1a, 0x0800},
334 };
335 
336 static const struct hi556_reg mode_2592x1944_regs[] = {
337 	{0x0a00, 0x0000},
338 	{0x0b0a, 0x8252},
339 	{0x0f30, 0x5b15},
340 	{0x0f32, 0x7067},
341 	{0x004a, 0x0100},
342 	{0x004c, 0x0000},
343 	{0x004e, 0x0100},
344 	{0x000c, 0x0022},
345 	{0x0008, 0x0b00},
346 	{0x005a, 0x0202},
347 	{0x0012, 0x000e},
348 	{0x0018, 0x0a33},
349 	{0x0022, 0x0008},
350 	{0x0028, 0x0017},
351 	{0x0024, 0x0028},
352 	{0x002a, 0x002d},
353 	{0x0026, 0x0030},
354 	{0x002c, 0x07c9},
355 	{0x002e, 0x1111},
356 	{0x0030, 0x1111},
357 	{0x0032, 0x1111},
358 	{0x0006, 0x0814},
359 	{0x0a22, 0x0000},
360 	{0x0a12, 0x0a20},
361 	{0x0a14, 0x0798},
362 	{0x003e, 0x0000},
363 	{0x0074, 0x0812},
364 	{0x0070, 0x0409},
365 	{0x0804, 0x0300},
366 	{0x0806, 0x0100},
367 	{0x0a04, 0x014a},
368 	{0x090c, 0x0fdc},
369 	{0x090e, 0x002d},
370 
371 	{0x0902, 0x4319},
372 	{0x0914, 0xc10a},
373 	{0x0916, 0x071f},
374 	{0x0918, 0x0408},
375 	{0x091a, 0x0c0d},
376 	{0x091c, 0x0f09},
377 	{0x091e, 0x0a00},
378 	{0x0958, 0xbb80},
379 };
380 
381 static const struct hi556_reg mode_1296x972_regs[] = {
382 	{0x0a00, 0x0000},
383 	{0x0b0a, 0x8259},
384 	{0x0f30, 0x5b15},
385 	{0x0f32, 0x7167},
386 	{0x004a, 0x0100},
387 	{0x004c, 0x0000},
388 	{0x004e, 0x0100},
389 	{0x000c, 0x0122},
390 	{0x0008, 0x0b00},
391 	{0x005a, 0x0404},
392 	{0x0012, 0x000c},
393 	{0x0018, 0x0a33},
394 	{0x0022, 0x0008},
395 	{0x0028, 0x0017},
396 	{0x0024, 0x0022},
397 	{0x002a, 0x002b},
398 	{0x0026, 0x0030},
399 	{0x002c, 0x07c9},
400 	{0x002e, 0x3311},
401 	{0x0030, 0x3311},
402 	{0x0032, 0x3311},
403 	{0x0006, 0x0814},
404 	{0x0a22, 0x0000},
405 	{0x0a12, 0x0510},
406 	{0x0a14, 0x03cc},
407 	{0x003e, 0x0000},
408 	{0x0074, 0x0812},
409 	{0x0070, 0x0409},
410 	{0x0804, 0x0308},
411 	{0x0806, 0x0100},
412 	{0x0a04, 0x016a},
413 	{0x090e, 0x0010},
414 	{0x090c, 0x09c0},
415 
416 	{0x0902, 0x4319},
417 	{0x0914, 0xc106},
418 	{0x0916, 0x040e},
419 	{0x0918, 0x0304},
420 	{0x091a, 0x0708},
421 	{0x091c, 0x0e06},
422 	{0x091e, 0x0300},
423 	{0x0958, 0xbb80},
424 };
425 
426 static const char * const hi556_test_pattern_menu[] = {
427 	"Disabled",
428 	"Solid Colour",
429 	"100% Colour Bars",
430 	"Fade To Grey Colour Bars",
431 	"PN9",
432 	"Gradient Horizontal",
433 	"Gradient Vertical",
434 	"Check Board",
435 	"Slant Pattern",
436 };
437 
438 static const s64 link_freq_menu_items[] = {
439 	HI556_LINK_FREQ_437MHZ,
440 };
441 
442 static const struct hi556_link_freq_config link_freq_configs[] = {
443 	[HI556_LINK_FREQ_437MHZ_INDEX] = {
444 		.reg_list = {
445 			.num_of_regs = ARRAY_SIZE(mipi_data_rate_874mbps),
446 			.regs = mipi_data_rate_874mbps,
447 		}
448 	}
449 };
450 
451 static const struct hi556_mode supported_modes[] = {
452 	{
453 		.width = 2592,
454 		.height = 1944,
455 		.fll_def = HI556_FLL_30FPS,
456 		.fll_min = HI556_FLL_30FPS_MIN,
457 		.llp = 0x0b00,
458 		.reg_list = {
459 			.num_of_regs = ARRAY_SIZE(mode_2592x1944_regs),
460 			.regs = mode_2592x1944_regs,
461 		},
462 		.link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX,
463 	},
464 	{
465 		.width = 1296,
466 		.height = 972,
467 		.fll_def = HI556_FLL_30FPS,
468 		.fll_min = HI556_FLL_30FPS_MIN,
469 		.llp = 0x0b00,
470 		.reg_list = {
471 			.num_of_regs = ARRAY_SIZE(mode_1296x972_regs),
472 			.regs = mode_1296x972_regs,
473 		},
474 		.link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX,
475 	}
476 };
477 
478 struct hi556 {
479 	struct v4l2_subdev sd;
480 	struct media_pad pad;
481 	struct v4l2_ctrl_handler ctrl_handler;
482 
483 	/* V4L2 Controls */
484 	struct v4l2_ctrl *link_freq;
485 	struct v4l2_ctrl *pixel_rate;
486 	struct v4l2_ctrl *vblank;
487 	struct v4l2_ctrl *hblank;
488 	struct v4l2_ctrl *exposure;
489 
490 	/* Current mode */
491 	const struct hi556_mode *cur_mode;
492 
493 	/* To serialize asynchronus callbacks */
494 	struct mutex mutex;
495 
496 	/* Streaming on/off */
497 	bool streaming;
498 
499 	/* True if the device has been identified */
500 	bool identified;
501 };
502 
503 static u64 to_pixel_rate(u32 f_index)
504 {
505 	u64 pixel_rate = link_freq_menu_items[f_index] * 2 * HI556_DATA_LANES;
506 
507 	do_div(pixel_rate, HI556_RGB_DEPTH);
508 
509 	return pixel_rate;
510 }
511 
512 static int hi556_read_reg(struct hi556 *hi556, u16 reg, u16 len, u32 *val)
513 {
514 	struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
515 	struct i2c_msg msgs[2];
516 	u8 addr_buf[2];
517 	u8 data_buf[4] = {0};
518 	int ret;
519 
520 	if (len > 4)
521 		return -EINVAL;
522 
523 	put_unaligned_be16(reg, addr_buf);
524 	msgs[0].addr = client->addr;
525 	msgs[0].flags = 0;
526 	msgs[0].len = sizeof(addr_buf);
527 	msgs[0].buf = addr_buf;
528 	msgs[1].addr = client->addr;
529 	msgs[1].flags = I2C_M_RD;
530 	msgs[1].len = len;
531 	msgs[1].buf = &data_buf[4 - len];
532 
533 	ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
534 	if (ret != ARRAY_SIZE(msgs))
535 		return -EIO;
536 
537 	*val = get_unaligned_be32(data_buf);
538 
539 	return 0;
540 }
541 
542 static int hi556_write_reg(struct hi556 *hi556, u16 reg, u16 len, u32 val)
543 {
544 	struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
545 	u8 buf[6];
546 
547 	if (len > 4)
548 		return -EINVAL;
549 
550 	put_unaligned_be16(reg, buf);
551 	put_unaligned_be32(val << 8 * (4 - len), buf + 2);
552 	if (i2c_master_send(client, buf, len + 2) != len + 2)
553 		return -EIO;
554 
555 	return 0;
556 }
557 
558 static int hi556_write_reg_list(struct hi556 *hi556,
559 				const struct hi556_reg_list *r_list)
560 {
561 	struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
562 	unsigned int i;
563 	int ret;
564 
565 	for (i = 0; i < r_list->num_of_regs; i++) {
566 		ret = hi556_write_reg(hi556, r_list->regs[i].address,
567 				      HI556_REG_VALUE_16BIT,
568 				      r_list->regs[i].val);
569 		if (ret) {
570 			dev_err_ratelimited(&client->dev,
571 					    "failed to write reg 0x%4.4x. error = %d",
572 					    r_list->regs[i].address, ret);
573 			return ret;
574 		}
575 	}
576 
577 	return 0;
578 }
579 
580 static int hi556_update_digital_gain(struct hi556 *hi556, u32 d_gain)
581 {
582 	int ret;
583 
584 	ret = hi556_write_reg(hi556, HI556_REG_MWB_GR_GAIN,
585 			      HI556_REG_VALUE_16BIT, d_gain);
586 	if (ret)
587 		return ret;
588 
589 	ret = hi556_write_reg(hi556, HI556_REG_MWB_GB_GAIN,
590 			      HI556_REG_VALUE_16BIT, d_gain);
591 	if (ret)
592 		return ret;
593 
594 	ret = hi556_write_reg(hi556, HI556_REG_MWB_R_GAIN,
595 			      HI556_REG_VALUE_16BIT, d_gain);
596 	if (ret)
597 		return ret;
598 
599 	return hi556_write_reg(hi556, HI556_REG_MWB_B_GAIN,
600 			       HI556_REG_VALUE_16BIT, d_gain);
601 }
602 
603 static int hi556_test_pattern(struct hi556 *hi556, u32 pattern)
604 {
605 	int ret;
606 	u32 val;
607 
608 	if (pattern) {
609 		ret = hi556_read_reg(hi556, HI556_REG_ISP,
610 				     HI556_REG_VALUE_08BIT, &val);
611 		if (ret)
612 			return ret;
613 
614 		ret = hi556_write_reg(hi556, HI556_REG_ISP,
615 				      HI556_REG_VALUE_08BIT,
616 				      val | HI556_REG_ISP_TPG_EN);
617 		if (ret)
618 			return ret;
619 	}
620 
621 	return hi556_write_reg(hi556, HI556_REG_TEST_PATTERN,
622 			       HI556_REG_VALUE_08BIT, pattern);
623 }
624 
625 static int hi556_set_ctrl(struct v4l2_ctrl *ctrl)
626 {
627 	struct hi556 *hi556 = container_of(ctrl->handler,
628 					     struct hi556, ctrl_handler);
629 	struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
630 	s64 exposure_max;
631 	int ret = 0;
632 
633 	/* Propagate change of current control to all related controls */
634 	if (ctrl->id == V4L2_CID_VBLANK) {
635 		/* Update max exposure while meeting expected vblanking */
636 		exposure_max = hi556->cur_mode->height + ctrl->val -
637 			       HI556_EXPOSURE_MAX_MARGIN;
638 		__v4l2_ctrl_modify_range(hi556->exposure,
639 					 hi556->exposure->minimum,
640 					 exposure_max, hi556->exposure->step,
641 					 exposure_max);
642 	}
643 
644 	/* V4L2 controls values will be applied only when power is already up */
645 	if (!pm_runtime_get_if_in_use(&client->dev))
646 		return 0;
647 
648 	switch (ctrl->id) {
649 	case V4L2_CID_ANALOGUE_GAIN:
650 		ret = hi556_write_reg(hi556, HI556_REG_ANALOG_GAIN,
651 				      HI556_REG_VALUE_16BIT, ctrl->val);
652 		break;
653 
654 	case V4L2_CID_DIGITAL_GAIN:
655 		ret = hi556_update_digital_gain(hi556, ctrl->val);
656 		break;
657 
658 	case V4L2_CID_EXPOSURE:
659 		ret = hi556_write_reg(hi556, HI556_REG_EXPOSURE,
660 				      HI556_REG_VALUE_16BIT, ctrl->val);
661 		break;
662 
663 	case V4L2_CID_VBLANK:
664 		/* Update FLL that meets expected vertical blanking */
665 		ret = hi556_write_reg(hi556, HI556_REG_FLL,
666 				      HI556_REG_VALUE_16BIT,
667 				      hi556->cur_mode->height + ctrl->val);
668 		break;
669 
670 	case V4L2_CID_TEST_PATTERN:
671 		ret = hi556_test_pattern(hi556, ctrl->val);
672 		break;
673 
674 	default:
675 		ret = -EINVAL;
676 		break;
677 	}
678 
679 	pm_runtime_put(&client->dev);
680 
681 	return ret;
682 }
683 
684 static const struct v4l2_ctrl_ops hi556_ctrl_ops = {
685 	.s_ctrl = hi556_set_ctrl,
686 };
687 
688 static int hi556_init_controls(struct hi556 *hi556)
689 {
690 	struct v4l2_ctrl_handler *ctrl_hdlr;
691 	s64 exposure_max, h_blank;
692 	int ret;
693 
694 	ctrl_hdlr = &hi556->ctrl_handler;
695 	ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
696 	if (ret)
697 		return ret;
698 
699 	ctrl_hdlr->lock = &hi556->mutex;
700 	hi556->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &hi556_ctrl_ops,
701 						  V4L2_CID_LINK_FREQ,
702 					ARRAY_SIZE(link_freq_menu_items) - 1,
703 					0, link_freq_menu_items);
704 	if (hi556->link_freq)
705 		hi556->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
706 
707 	hi556->pixel_rate = v4l2_ctrl_new_std
708 			    (ctrl_hdlr, &hi556_ctrl_ops,
709 			     V4L2_CID_PIXEL_RATE, 0,
710 			     to_pixel_rate(HI556_LINK_FREQ_437MHZ_INDEX),
711 			     1,
712 			     to_pixel_rate(HI556_LINK_FREQ_437MHZ_INDEX));
713 	hi556->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
714 					  V4L2_CID_VBLANK,
715 					  hi556->cur_mode->fll_min -
716 					  hi556->cur_mode->height,
717 					  HI556_FLL_MAX -
718 					  hi556->cur_mode->height, 1,
719 					  hi556->cur_mode->fll_def -
720 					  hi556->cur_mode->height);
721 
722 	h_blank = hi556->cur_mode->llp - hi556->cur_mode->width;
723 
724 	hi556->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
725 					  V4L2_CID_HBLANK, h_blank, h_blank, 1,
726 					  h_blank);
727 	if (hi556->hblank)
728 		hi556->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
729 
730 	v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
731 			  HI556_ANAL_GAIN_MIN, HI556_ANAL_GAIN_MAX,
732 			  HI556_ANAL_GAIN_STEP, HI556_ANAL_GAIN_MIN);
733 	v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
734 			  HI556_DGTL_GAIN_MIN, HI556_DGTL_GAIN_MAX,
735 			  HI556_DGTL_GAIN_STEP, HI556_DGTL_GAIN_DEFAULT);
736 	exposure_max = hi556->cur_mode->fll_def - HI556_EXPOSURE_MAX_MARGIN;
737 	hi556->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
738 					    V4L2_CID_EXPOSURE,
739 					    HI556_EXPOSURE_MIN, exposure_max,
740 					    HI556_EXPOSURE_STEP,
741 					    exposure_max);
742 	v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &hi556_ctrl_ops,
743 				     V4L2_CID_TEST_PATTERN,
744 				     ARRAY_SIZE(hi556_test_pattern_menu) - 1,
745 				     0, 0, hi556_test_pattern_menu);
746 	if (ctrl_hdlr->error)
747 		return ctrl_hdlr->error;
748 
749 	hi556->sd.ctrl_handler = ctrl_hdlr;
750 
751 	return 0;
752 }
753 
754 static void hi556_assign_pad_format(const struct hi556_mode *mode,
755 				    struct v4l2_mbus_framefmt *fmt)
756 {
757 	fmt->width = mode->width;
758 	fmt->height = mode->height;
759 	fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
760 	fmt->field = V4L2_FIELD_NONE;
761 }
762 
763 static int hi556_identify_module(struct hi556 *hi556)
764 {
765 	struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
766 	int ret;
767 	u32 val;
768 
769 	if (hi556->identified)
770 		return 0;
771 
772 	ret = hi556_read_reg(hi556, HI556_REG_CHIP_ID,
773 			     HI556_REG_VALUE_16BIT, &val);
774 	if (ret)
775 		return ret;
776 
777 	if (val != HI556_CHIP_ID) {
778 		dev_err(&client->dev, "chip id mismatch: %x!=%x",
779 			HI556_CHIP_ID, val);
780 		return -ENXIO;
781 	}
782 
783 	hi556->identified = true;
784 
785 	return 0;
786 }
787 
788 static int hi556_start_streaming(struct hi556 *hi556)
789 {
790 	struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
791 	const struct hi556_reg_list *reg_list;
792 	int link_freq_index, ret;
793 
794 	ret = hi556_identify_module(hi556);
795 	if (ret)
796 		return ret;
797 
798 	link_freq_index = hi556->cur_mode->link_freq_index;
799 	reg_list = &link_freq_configs[link_freq_index].reg_list;
800 	ret = hi556_write_reg_list(hi556, reg_list);
801 	if (ret) {
802 		dev_err(&client->dev, "failed to set plls");
803 		return ret;
804 	}
805 
806 	reg_list = &hi556->cur_mode->reg_list;
807 	ret = hi556_write_reg_list(hi556, reg_list);
808 	if (ret) {
809 		dev_err(&client->dev, "failed to set mode");
810 		return ret;
811 	}
812 
813 	ret = __v4l2_ctrl_handler_setup(hi556->sd.ctrl_handler);
814 	if (ret)
815 		return ret;
816 
817 	ret = hi556_write_reg(hi556, HI556_REG_MODE_SELECT,
818 			      HI556_REG_VALUE_16BIT, HI556_MODE_STREAMING);
819 
820 	if (ret) {
821 		dev_err(&client->dev, "failed to set stream");
822 		return ret;
823 	}
824 
825 	return 0;
826 }
827 
828 static void hi556_stop_streaming(struct hi556 *hi556)
829 {
830 	struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
831 
832 	if (hi556_write_reg(hi556, HI556_REG_MODE_SELECT,
833 			    HI556_REG_VALUE_16BIT, HI556_MODE_STANDBY))
834 		dev_err(&client->dev, "failed to set stream");
835 }
836 
837 static int hi556_set_stream(struct v4l2_subdev *sd, int enable)
838 {
839 	struct hi556 *hi556 = to_hi556(sd);
840 	struct i2c_client *client = v4l2_get_subdevdata(sd);
841 	int ret = 0;
842 
843 	if (hi556->streaming == enable)
844 		return 0;
845 
846 	mutex_lock(&hi556->mutex);
847 	if (enable) {
848 		ret = pm_runtime_resume_and_get(&client->dev);
849 		if (ret < 0) {
850 			mutex_unlock(&hi556->mutex);
851 			return ret;
852 		}
853 
854 		ret = hi556_start_streaming(hi556);
855 		if (ret) {
856 			enable = 0;
857 			hi556_stop_streaming(hi556);
858 			pm_runtime_put(&client->dev);
859 		}
860 	} else {
861 		hi556_stop_streaming(hi556);
862 		pm_runtime_put(&client->dev);
863 	}
864 
865 	hi556->streaming = enable;
866 	mutex_unlock(&hi556->mutex);
867 
868 	return ret;
869 }
870 
871 static int __maybe_unused hi556_suspend(struct device *dev)
872 {
873 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
874 	struct hi556 *hi556 = to_hi556(sd);
875 
876 	mutex_lock(&hi556->mutex);
877 	if (hi556->streaming)
878 		hi556_stop_streaming(hi556);
879 
880 	mutex_unlock(&hi556->mutex);
881 
882 	return 0;
883 }
884 
885 static int __maybe_unused hi556_resume(struct device *dev)
886 {
887 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
888 	struct hi556 *hi556 = to_hi556(sd);
889 	int ret;
890 
891 	mutex_lock(&hi556->mutex);
892 	if (hi556->streaming) {
893 		ret = hi556_start_streaming(hi556);
894 		if (ret)
895 			goto error;
896 	}
897 
898 	mutex_unlock(&hi556->mutex);
899 
900 	return 0;
901 
902 error:
903 	hi556_stop_streaming(hi556);
904 	hi556->streaming = 0;
905 	mutex_unlock(&hi556->mutex);
906 	return ret;
907 }
908 
909 static int hi556_set_format(struct v4l2_subdev *sd,
910 			    struct v4l2_subdev_state *sd_state,
911 			    struct v4l2_subdev_format *fmt)
912 {
913 	struct hi556 *hi556 = to_hi556(sd);
914 	const struct hi556_mode *mode;
915 	s32 vblank_def, h_blank;
916 
917 	mode = v4l2_find_nearest_size(supported_modes,
918 				      ARRAY_SIZE(supported_modes), width,
919 				      height, fmt->format.width,
920 				      fmt->format.height);
921 
922 	mutex_lock(&hi556->mutex);
923 	hi556_assign_pad_format(mode, &fmt->format);
924 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
925 		*v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
926 	} else {
927 		hi556->cur_mode = mode;
928 		__v4l2_ctrl_s_ctrl(hi556->link_freq, mode->link_freq_index);
929 		__v4l2_ctrl_s_ctrl_int64(hi556->pixel_rate,
930 					 to_pixel_rate(mode->link_freq_index));
931 
932 		/* Update limits and set FPS to default */
933 		vblank_def = mode->fll_def - mode->height;
934 		__v4l2_ctrl_modify_range(hi556->vblank,
935 					 mode->fll_min - mode->height,
936 					 HI556_FLL_MAX - mode->height, 1,
937 					 vblank_def);
938 		__v4l2_ctrl_s_ctrl(hi556->vblank, vblank_def);
939 
940 		h_blank = hi556->cur_mode->llp - hi556->cur_mode->width;
941 
942 		__v4l2_ctrl_modify_range(hi556->hblank, h_blank, h_blank, 1,
943 					 h_blank);
944 	}
945 
946 	mutex_unlock(&hi556->mutex);
947 
948 	return 0;
949 }
950 
951 static int hi556_get_format(struct v4l2_subdev *sd,
952 			    struct v4l2_subdev_state *sd_state,
953 			    struct v4l2_subdev_format *fmt)
954 {
955 	struct hi556 *hi556 = to_hi556(sd);
956 
957 	mutex_lock(&hi556->mutex);
958 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
959 		fmt->format = *v4l2_subdev_get_try_format(&hi556->sd,
960 							  sd_state,
961 							  fmt->pad);
962 	else
963 		hi556_assign_pad_format(hi556->cur_mode, &fmt->format);
964 
965 	mutex_unlock(&hi556->mutex);
966 
967 	return 0;
968 }
969 
970 static int hi556_enum_mbus_code(struct v4l2_subdev *sd,
971 				struct v4l2_subdev_state *sd_state,
972 				struct v4l2_subdev_mbus_code_enum *code)
973 {
974 	if (code->index > 0)
975 		return -EINVAL;
976 
977 	code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
978 
979 	return 0;
980 }
981 
982 static int hi556_enum_frame_size(struct v4l2_subdev *sd,
983 				 struct v4l2_subdev_state *sd_state,
984 				 struct v4l2_subdev_frame_size_enum *fse)
985 {
986 	if (fse->index >= ARRAY_SIZE(supported_modes))
987 		return -EINVAL;
988 
989 	if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
990 		return -EINVAL;
991 
992 	fse->min_width = supported_modes[fse->index].width;
993 	fse->max_width = fse->min_width;
994 	fse->min_height = supported_modes[fse->index].height;
995 	fse->max_height = fse->min_height;
996 
997 	return 0;
998 }
999 
1000 static int hi556_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1001 {
1002 	struct hi556 *hi556 = to_hi556(sd);
1003 
1004 	mutex_lock(&hi556->mutex);
1005 	hi556_assign_pad_format(&supported_modes[0],
1006 				v4l2_subdev_get_try_format(sd, fh->state, 0));
1007 	mutex_unlock(&hi556->mutex);
1008 
1009 	return 0;
1010 }
1011 
1012 static const struct v4l2_subdev_video_ops hi556_video_ops = {
1013 	.s_stream = hi556_set_stream,
1014 };
1015 
1016 static const struct v4l2_subdev_pad_ops hi556_pad_ops = {
1017 	.set_fmt = hi556_set_format,
1018 	.get_fmt = hi556_get_format,
1019 	.enum_mbus_code = hi556_enum_mbus_code,
1020 	.enum_frame_size = hi556_enum_frame_size,
1021 };
1022 
1023 static const struct v4l2_subdev_ops hi556_subdev_ops = {
1024 	.video = &hi556_video_ops,
1025 	.pad = &hi556_pad_ops,
1026 };
1027 
1028 static const struct media_entity_operations hi556_subdev_entity_ops = {
1029 	.link_validate = v4l2_subdev_link_validate,
1030 };
1031 
1032 static const struct v4l2_subdev_internal_ops hi556_internal_ops = {
1033 	.open = hi556_open,
1034 };
1035 
1036 static int hi556_check_hwcfg(struct device *dev)
1037 {
1038 	struct fwnode_handle *ep;
1039 	struct fwnode_handle *fwnode = dev_fwnode(dev);
1040 	struct v4l2_fwnode_endpoint bus_cfg = {
1041 		.bus_type = V4L2_MBUS_CSI2_DPHY
1042 	};
1043 	u32 mclk;
1044 	int ret = 0;
1045 	unsigned int i, j;
1046 
1047 	if (!fwnode)
1048 		return -ENXIO;
1049 
1050 	ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
1051 	if (ret) {
1052 		dev_err(dev, "can't get clock frequency");
1053 		return ret;
1054 	}
1055 
1056 	if (mclk != HI556_MCLK) {
1057 		dev_err(dev, "external clock %d is not supported", mclk);
1058 		return -EINVAL;
1059 	}
1060 
1061 	ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
1062 	if (!ep)
1063 		return -ENXIO;
1064 
1065 	ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
1066 	fwnode_handle_put(ep);
1067 	if (ret)
1068 		return ret;
1069 
1070 	if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2) {
1071 		dev_err(dev, "number of CSI2 data lanes %d is not supported",
1072 			bus_cfg.bus.mipi_csi2.num_data_lanes);
1073 		ret = -EINVAL;
1074 		goto check_hwcfg_error;
1075 	}
1076 
1077 	if (!bus_cfg.nr_of_link_frequencies) {
1078 		dev_err(dev, "no link frequencies defined");
1079 		ret = -EINVAL;
1080 		goto check_hwcfg_error;
1081 	}
1082 
1083 	for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
1084 		for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
1085 			if (link_freq_menu_items[i] ==
1086 				bus_cfg.link_frequencies[j])
1087 				break;
1088 		}
1089 
1090 		if (j == bus_cfg.nr_of_link_frequencies) {
1091 			dev_err(dev, "no link frequency %lld supported",
1092 				link_freq_menu_items[i]);
1093 			ret = -EINVAL;
1094 			goto check_hwcfg_error;
1095 		}
1096 	}
1097 
1098 check_hwcfg_error:
1099 	v4l2_fwnode_endpoint_free(&bus_cfg);
1100 
1101 	return ret;
1102 }
1103 
1104 static int hi556_remove(struct i2c_client *client)
1105 {
1106 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1107 	struct hi556 *hi556 = to_hi556(sd);
1108 
1109 	v4l2_async_unregister_subdev(sd);
1110 	media_entity_cleanup(&sd->entity);
1111 	v4l2_ctrl_handler_free(sd->ctrl_handler);
1112 	pm_runtime_disable(&client->dev);
1113 	mutex_destroy(&hi556->mutex);
1114 
1115 	return 0;
1116 }
1117 
1118 static int hi556_probe(struct i2c_client *client)
1119 {
1120 	struct hi556 *hi556;
1121 	bool full_power;
1122 	int ret;
1123 
1124 	ret = hi556_check_hwcfg(&client->dev);
1125 	if (ret) {
1126 		dev_err(&client->dev, "failed to check HW configuration: %d",
1127 			ret);
1128 		return ret;
1129 	}
1130 
1131 	hi556 = devm_kzalloc(&client->dev, sizeof(*hi556), GFP_KERNEL);
1132 	if (!hi556)
1133 		return -ENOMEM;
1134 
1135 	v4l2_i2c_subdev_init(&hi556->sd, client, &hi556_subdev_ops);
1136 
1137 	full_power = acpi_dev_state_d0(&client->dev);
1138 	if (full_power) {
1139 		ret = hi556_identify_module(hi556);
1140 		if (ret) {
1141 			dev_err(&client->dev, "failed to find sensor: %d", ret);
1142 			return ret;
1143 		}
1144 	}
1145 
1146 	mutex_init(&hi556->mutex);
1147 	hi556->cur_mode = &supported_modes[0];
1148 	ret = hi556_init_controls(hi556);
1149 	if (ret) {
1150 		dev_err(&client->dev, "failed to init controls: %d", ret);
1151 		goto probe_error_v4l2_ctrl_handler_free;
1152 	}
1153 
1154 	hi556->sd.internal_ops = &hi556_internal_ops;
1155 	hi556->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1156 	hi556->sd.entity.ops = &hi556_subdev_entity_ops;
1157 	hi556->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1158 	hi556->pad.flags = MEDIA_PAD_FL_SOURCE;
1159 	ret = media_entity_pads_init(&hi556->sd.entity, 1, &hi556->pad);
1160 	if (ret) {
1161 		dev_err(&client->dev, "failed to init entity pads: %d", ret);
1162 		goto probe_error_v4l2_ctrl_handler_free;
1163 	}
1164 
1165 	ret = v4l2_async_register_subdev_sensor(&hi556->sd);
1166 	if (ret < 0) {
1167 		dev_err(&client->dev, "failed to register V4L2 subdev: %d",
1168 			ret);
1169 		goto probe_error_media_entity_cleanup;
1170 	}
1171 
1172 	/* Set the device's state to active if it's in D0 state. */
1173 	if (full_power)
1174 		pm_runtime_set_active(&client->dev);
1175 	pm_runtime_enable(&client->dev);
1176 	pm_runtime_idle(&client->dev);
1177 
1178 	return 0;
1179 
1180 probe_error_media_entity_cleanup:
1181 	media_entity_cleanup(&hi556->sd.entity);
1182 
1183 probe_error_v4l2_ctrl_handler_free:
1184 	v4l2_ctrl_handler_free(hi556->sd.ctrl_handler);
1185 	mutex_destroy(&hi556->mutex);
1186 
1187 	return ret;
1188 }
1189 
1190 static const struct dev_pm_ops hi556_pm_ops = {
1191 	SET_SYSTEM_SLEEP_PM_OPS(hi556_suspend, hi556_resume)
1192 };
1193 
1194 #ifdef CONFIG_ACPI
1195 static const struct acpi_device_id hi556_acpi_ids[] = {
1196 	{"INT3537"},
1197 	{}
1198 };
1199 
1200 MODULE_DEVICE_TABLE(acpi, hi556_acpi_ids);
1201 #endif
1202 
1203 static struct i2c_driver hi556_i2c_driver = {
1204 	.driver = {
1205 		.name = "hi556",
1206 		.pm = &hi556_pm_ops,
1207 		.acpi_match_table = ACPI_PTR(hi556_acpi_ids),
1208 	},
1209 	.probe_new = hi556_probe,
1210 	.remove = hi556_remove,
1211 	.flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
1212 };
1213 
1214 module_i2c_driver(hi556_i2c_driver);
1215 
1216 MODULE_AUTHOR("Shawn Tu <shawnx.tu@intel.com>");
1217 MODULE_DESCRIPTION("Hynix HI556 sensor driver");
1218 MODULE_LICENSE("GPL v2");
1219