1 /*
2  * et8ek8_mode.c
3  *
4  * Copyright (C) 2008 Nokia Corporation
5  *
6  * Contact: Sakari Ailus <sakari.ailus@iki.fi>
7  *          Tuukka Toivonen <tuukkat76@gmail.com>
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License
11  * version 2 as published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16  * General Public License for more details.
17  */
18 
19 #include "et8ek8_reg.h"
20 
21 /*
22  * Stingray sensor mode settings for Scooby
23  */
24 
25 /* Mode1_poweron_Mode2_16VGA_2592x1968_12.07fps */
26 static struct et8ek8_reglist mode1_poweron_mode2_16vga_2592x1968_12_07fps = {
27 /* (without the +1)
28  * SPCK       = 80 MHz
29  * CCP2       = 640 MHz
30  * VCO        = 640 MHz
31  * VCOUNT     = 84 (2016)
32  * HCOUNT     = 137 (3288)
33  * CKREF_DIV  = 2
34  * CKVAR_DIV  = 200
35  * VCO_DIV    = 0
36  * SPCK_DIV   = 7
37  * MRCK_DIV   = 7
38  * LVDSCK_DIV = 0
39  */
40 	.type = ET8EK8_REGLIST_POWERON,
41 	.mode = {
42 		.sensor_width = 2592,
43 		.sensor_height = 1968,
44 		.sensor_window_origin_x = 0,
45 		.sensor_window_origin_y = 0,
46 		.sensor_window_width = 2592,
47 		.sensor_window_height = 1968,
48 		.width = 3288,
49 		.height = 2016,
50 		.window_origin_x = 0,
51 		.window_origin_y = 0,
52 		.window_width = 2592,
53 		.window_height = 1968,
54 		.pixel_clock = 80000000,
55 		.ext_clock = 9600000,
56 		.timeperframe = {
57 			.numerator = 100,
58 			.denominator = 1207
59 		},
60 		.max_exp = 2012,
61 		/* .max_gain = 0, */
62 		.bus_format = MEDIA_BUS_FMT_SGRBG10_1X10,
63 		.sensitivity = 65536
64 	},
65 	.regs = {
66 		/* Need to set firstly */
67 		{ ET8EK8_REG_8BIT, 0x126C, 0xCC },
68 		/* Strobe and Data of CCP2 delay are minimized. */
69 		{ ET8EK8_REG_8BIT, 0x1269, 0x00 },
70 		/* Refined value of Min H_COUNT  */
71 		{ ET8EK8_REG_8BIT, 0x1220, 0x89 },
72 		/* Frequency of SPCK setting (SPCK=MRCK) */
73 		{ ET8EK8_REG_8BIT, 0x123A, 0x07 },
74 		{ ET8EK8_REG_8BIT, 0x1241, 0x94 },
75 		{ ET8EK8_REG_8BIT, 0x1242, 0x02 },
76 		{ ET8EK8_REG_8BIT, 0x124B, 0x00 },
77 		{ ET8EK8_REG_8BIT, 0x1255, 0xFF },
78 		{ ET8EK8_REG_8BIT, 0x1256, 0x9F },
79 		{ ET8EK8_REG_8BIT, 0x1258, 0x00 },
80 		/* From parallel out to serial out */
81 		{ ET8EK8_REG_8BIT, 0x125D, 0x88 },
82 		/* From w/ embeded data to w/o embeded data */
83 		{ ET8EK8_REG_8BIT, 0x125E, 0xC0 },
84 		/* CCP2 out is from STOP to ACTIVE */
85 		{ ET8EK8_REG_8BIT, 0x1263, 0x98 },
86 		{ ET8EK8_REG_8BIT, 0x1268, 0xC6 },
87 		{ ET8EK8_REG_8BIT, 0x1434, 0x00 },
88 		{ ET8EK8_REG_8BIT, 0x1163, 0x44 },
89 		{ ET8EK8_REG_8BIT, 0x1166, 0x29 },
90 		{ ET8EK8_REG_8BIT, 0x1140, 0x02 },
91 		{ ET8EK8_REG_8BIT, 0x1011, 0x24 },
92 		{ ET8EK8_REG_8BIT, 0x1151, 0x80 },
93 		{ ET8EK8_REG_8BIT, 0x1152, 0x23 },
94 		/* Initial setting for improvement2 of lower frequency noise */
95 		{ ET8EK8_REG_8BIT, 0x1014, 0x05 },
96 		{ ET8EK8_REG_8BIT, 0x1033, 0x06 },
97 		{ ET8EK8_REG_8BIT, 0x1034, 0x79 },
98 		{ ET8EK8_REG_8BIT, 0x1423, 0x3F },
99 		{ ET8EK8_REG_8BIT, 0x1424, 0x3F },
100 		{ ET8EK8_REG_8BIT, 0x1426, 0x00 },
101 		/* Switch of Preset-White-balance (0d:disable / 1d:enable) */
102 		{ ET8EK8_REG_8BIT, 0x1439, 0x00 },
103 		/* Switch of blemish correction (0d:disable / 1d:enable) */
104 		{ ET8EK8_REG_8BIT, 0x161F, 0x60 },
105 		/* Switch of auto noise correction (0d:disable / 1d:enable) */
106 		{ ET8EK8_REG_8BIT, 0x1634, 0x00 },
107 		{ ET8EK8_REG_8BIT, 0x1646, 0x00 },
108 		{ ET8EK8_REG_8BIT, 0x1648, 0x00 },
109 		{ ET8EK8_REG_8BIT, 0x113E, 0x01 },
110 		{ ET8EK8_REG_8BIT, 0x113F, 0x22 },
111 		{ ET8EK8_REG_8BIT, 0x1239, 0x64 },
112 		{ ET8EK8_REG_8BIT, 0x1238, 0x02 },
113 		{ ET8EK8_REG_8BIT, 0x123B, 0x70 },
114 		{ ET8EK8_REG_8BIT, 0x123A, 0x07 },
115 		{ ET8EK8_REG_8BIT, 0x121B, 0x64 },
116 		{ ET8EK8_REG_8BIT, 0x121D, 0x64 },
117 		{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
118 		{ ET8EK8_REG_8BIT, 0x1220, 0x89 },
119 		{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
120 		{ ET8EK8_REG_8BIT, 0x1222, 0x54 },
121 		{ ET8EK8_REG_8BIT, 0x125D, 0x88 }, /* CCP_LVDS_MODE/  */
122 		{ ET8EK8_REG_TERM, 0, 0}
123 	}
124 };
125 
126 /* Mode1_16VGA_2592x1968_13.12fps_DPCM10-8 */
127 static struct et8ek8_reglist mode1_16vga_2592x1968_13_12fps_dpcm10_8 = {
128 /* (without the +1)
129  * SPCK       = 80 MHz
130  * CCP2       = 560 MHz
131  * VCO        = 560 MHz
132  * VCOUNT     = 84 (2016)
133  * HCOUNT     = 128 (3072)
134  * CKREF_DIV  = 2
135  * CKVAR_DIV  = 175
136  * VCO_DIV    = 0
137  * SPCK_DIV   = 6
138  * MRCK_DIV   = 7
139  * LVDSCK_DIV = 0
140  */
141 	.type = ET8EK8_REGLIST_MODE,
142 	.mode = {
143 		.sensor_width = 2592,
144 		.sensor_height = 1968,
145 		.sensor_window_origin_x = 0,
146 		.sensor_window_origin_y = 0,
147 		.sensor_window_width = 2592,
148 		.sensor_window_height = 1968,
149 		.width = 3072,
150 		.height = 2016,
151 		.window_origin_x = 0,
152 		.window_origin_y = 0,
153 		.window_width = 2592,
154 		.window_height = 1968,
155 		.pixel_clock = 80000000,
156 		.ext_clock = 9600000,
157 		.timeperframe = {
158 			.numerator = 100,
159 			.denominator = 1292
160 		},
161 		.max_exp = 2012,
162 		/* .max_gain = 0, */
163 		.bus_format = MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8,
164 		.sensitivity = 65536
165 	},
166 	.regs = {
167 		{ ET8EK8_REG_8BIT, 0x1239, 0x57 },
168 		{ ET8EK8_REG_8BIT, 0x1238, 0x82 },
169 		{ ET8EK8_REG_8BIT, 0x123B, 0x70 },
170 		{ ET8EK8_REG_8BIT, 0x123A, 0x06 },
171 		{ ET8EK8_REG_8BIT, 0x121B, 0x64 },
172 		{ ET8EK8_REG_8BIT, 0x121D, 0x64 },
173 		{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
174 		{ ET8EK8_REG_8BIT, 0x1220, 0x80 }, /* <-changed to v14 7E->80 */
175 		{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
176 		{ ET8EK8_REG_8BIT, 0x1222, 0x54 },
177 		{ ET8EK8_REG_8BIT, 0x125D, 0x83 }, /* CCP_LVDS_MODE/  */
178 		{ ET8EK8_REG_TERM, 0, 0}
179 	}
180 };
181 
182 /* Mode3_4VGA_1296x984_29.99fps_DPCM10-8 */
183 static struct et8ek8_reglist mode3_4vga_1296x984_29_99fps_dpcm10_8 = {
184 /* (without the +1)
185  * SPCK       = 96.5333333333333 MHz
186  * CCP2       = 579.2 MHz
187  * VCO        = 579.2 MHz
188  * VCOUNT     = 84 (2016)
189  * HCOUNT     = 133 (3192)
190  * CKREF_DIV  = 2
191  * CKVAR_DIV  = 181
192  * VCO_DIV    = 0
193  * SPCK_DIV   = 5
194  * MRCK_DIV   = 7
195  * LVDSCK_DIV = 0
196  */
197 	.type = ET8EK8_REGLIST_MODE,
198 	.mode = {
199 		.sensor_width = 2592,
200 		.sensor_height = 1968,
201 		.sensor_window_origin_x = 0,
202 		.sensor_window_origin_y = 0,
203 		.sensor_window_width = 2592,
204 		.sensor_window_height = 1968,
205 		.width = 3192,
206 		.height = 1008,
207 		.window_origin_x = 0,
208 		.window_origin_y = 0,
209 		.window_width = 1296,
210 		.window_height = 984,
211 		.pixel_clock = 96533333,
212 		.ext_clock = 9600000,
213 		.timeperframe = {
214 			.numerator = 100,
215 			.denominator = 3000
216 		},
217 		.max_exp = 1004,
218 		/* .max_gain = 0, */
219 		.bus_format = MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8,
220 		.sensitivity = 65536
221 	},
222 	.regs = {
223 		{ ET8EK8_REG_8BIT, 0x1239, 0x5A },
224 		{ ET8EK8_REG_8BIT, 0x1238, 0x82 },
225 		{ ET8EK8_REG_8BIT, 0x123B, 0x70 },
226 		{ ET8EK8_REG_8BIT, 0x123A, 0x05 },
227 		{ ET8EK8_REG_8BIT, 0x121B, 0x63 },
228 		{ ET8EK8_REG_8BIT, 0x1220, 0x85 },
229 		{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
230 		{ ET8EK8_REG_8BIT, 0x1222, 0x54 },
231 		{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
232 		{ ET8EK8_REG_8BIT, 0x121D, 0x63 },
233 		{ ET8EK8_REG_8BIT, 0x125D, 0x83 }, /* CCP_LVDS_MODE/  */
234 		{ ET8EK8_REG_TERM, 0, 0}
235 	}
236 };
237 
238 /* Mode4_SVGA_864x656_29.88fps */
239 static struct et8ek8_reglist mode4_svga_864x656_29_88fps = {
240 /* (without the +1)
241  * SPCK       = 80 MHz
242  * CCP2       = 320 MHz
243  * VCO        = 640 MHz
244  * VCOUNT     = 84 (2016)
245  * HCOUNT     = 166 (3984)
246  * CKREF_DIV  = 2
247  * CKVAR_DIV  = 200
248  * VCO_DIV    = 0
249  * SPCK_DIV   = 7
250  * MRCK_DIV   = 7
251  * LVDSCK_DIV = 1
252  */
253 	.type = ET8EK8_REGLIST_MODE,
254 	.mode = {
255 		.sensor_width = 2592,
256 		.sensor_height = 1968,
257 		.sensor_window_origin_x = 0,
258 		.sensor_window_origin_y = 0,
259 		.sensor_window_width = 2592,
260 		.sensor_window_height = 1968,
261 		.width = 3984,
262 		.height = 672,
263 		.window_origin_x = 0,
264 		.window_origin_y = 0,
265 		.window_width = 864,
266 		.window_height = 656,
267 		.pixel_clock = 80000000,
268 		.ext_clock = 9600000,
269 		.timeperframe = {
270 			.numerator = 100,
271 			.denominator = 2988
272 		},
273 		.max_exp = 668,
274 		/* .max_gain = 0, */
275 		.bus_format = MEDIA_BUS_FMT_SGRBG10_1X10,
276 		.sensitivity = 65536
277 	},
278 	.regs = {
279 		{ ET8EK8_REG_8BIT, 0x1239, 0x64 },
280 		{ ET8EK8_REG_8BIT, 0x1238, 0x02 },
281 		{ ET8EK8_REG_8BIT, 0x123B, 0x71 },
282 		{ ET8EK8_REG_8BIT, 0x123A, 0x07 },
283 		{ ET8EK8_REG_8BIT, 0x121B, 0x62 },
284 		{ ET8EK8_REG_8BIT, 0x121D, 0x62 },
285 		{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
286 		{ ET8EK8_REG_8BIT, 0x1220, 0xA6 },
287 		{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
288 		{ ET8EK8_REG_8BIT, 0x1222, 0x54 },
289 		{ ET8EK8_REG_8BIT, 0x125D, 0x88 }, /* CCP_LVDS_MODE/  */
290 		{ ET8EK8_REG_TERM, 0, 0}
291 	}
292 };
293 
294 /* Mode5_VGA_648x492_29.93fps */
295 static struct et8ek8_reglist mode5_vga_648x492_29_93fps = {
296 /* (without the +1)
297  * SPCK       = 80 MHz
298  * CCP2       = 320 MHz
299  * VCO        = 640 MHz
300  * VCOUNT     = 84 (2016)
301  * HCOUNT     = 221 (5304)
302  * CKREF_DIV  = 2
303  * CKVAR_DIV  = 200
304  * VCO_DIV    = 0
305  * SPCK_DIV   = 7
306  * MRCK_DIV   = 7
307  * LVDSCK_DIV = 1
308  */
309 	.type = ET8EK8_REGLIST_MODE,
310 	.mode = {
311 		.sensor_width = 2592,
312 		.sensor_height = 1968,
313 		.sensor_window_origin_x = 0,
314 		.sensor_window_origin_y = 0,
315 		.sensor_window_width = 2592,
316 		.sensor_window_height = 1968,
317 		.width = 5304,
318 		.height = 504,
319 		.window_origin_x = 0,
320 		.window_origin_y = 0,
321 		.window_width = 648,
322 		.window_height = 492,
323 		.pixel_clock = 80000000,
324 		.ext_clock = 9600000,
325 		.timeperframe = {
326 			.numerator = 100,
327 			.denominator = 2993
328 		},
329 		.max_exp = 500,
330 		/* .max_gain = 0, */
331 		.bus_format = MEDIA_BUS_FMT_SGRBG10_1X10,
332 		.sensitivity = 65536
333 	},
334 	.regs = {
335 		{ ET8EK8_REG_8BIT, 0x1239, 0x64 },
336 		{ ET8EK8_REG_8BIT, 0x1238, 0x02 },
337 		{ ET8EK8_REG_8BIT, 0x123B, 0x71 },
338 		{ ET8EK8_REG_8BIT, 0x123A, 0x07 },
339 		{ ET8EK8_REG_8BIT, 0x121B, 0x61 },
340 		{ ET8EK8_REG_8BIT, 0x121D, 0x61 },
341 		{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
342 		{ ET8EK8_REG_8BIT, 0x1220, 0xDD },
343 		{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
344 		{ ET8EK8_REG_8BIT, 0x1222, 0x54 },
345 		{ ET8EK8_REG_8BIT, 0x125D, 0x88 }, /* CCP_LVDS_MODE/  */
346 		{ ET8EK8_REG_TERM, 0, 0}
347 	}
348 };
349 
350 /* Mode2_16VGA_2592x1968_3.99fps */
351 static struct et8ek8_reglist mode2_16vga_2592x1968_3_99fps = {
352 /* (without the +1)
353  * SPCK       = 80 MHz
354  * CCP2       = 640 MHz
355  * VCO        = 640 MHz
356  * VCOUNT     = 254 (6096)
357  * HCOUNT     = 137 (3288)
358  * CKREF_DIV  = 2
359  * CKVAR_DIV  = 200
360  * VCO_DIV    = 0
361  * SPCK_DIV   = 7
362  * MRCK_DIV   = 7
363  * LVDSCK_DIV = 0
364  */
365 	.type = ET8EK8_REGLIST_MODE,
366 	.mode = {
367 		.sensor_width = 2592,
368 		.sensor_height = 1968,
369 		.sensor_window_origin_x = 0,
370 		.sensor_window_origin_y = 0,
371 		.sensor_window_width = 2592,
372 		.sensor_window_height = 1968,
373 		.width = 3288,
374 		.height = 6096,
375 		.window_origin_x = 0,
376 		.window_origin_y = 0,
377 		.window_width = 2592,
378 		.window_height = 1968,
379 		.pixel_clock = 80000000,
380 		.ext_clock = 9600000,
381 		.timeperframe = {
382 			.numerator = 100,
383 			.denominator = 399
384 		},
385 		.max_exp = 6092,
386 		/* .max_gain = 0, */
387 		.bus_format = MEDIA_BUS_FMT_SGRBG10_1X10,
388 		.sensitivity = 65536
389 	},
390 	.regs = {
391 		{ ET8EK8_REG_8BIT, 0x1239, 0x64 },
392 		{ ET8EK8_REG_8BIT, 0x1238, 0x02 },
393 		{ ET8EK8_REG_8BIT, 0x123B, 0x70 },
394 		{ ET8EK8_REG_8BIT, 0x123A, 0x07 },
395 		{ ET8EK8_REG_8BIT, 0x121B, 0x64 },
396 		{ ET8EK8_REG_8BIT, 0x121D, 0x64 },
397 		{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
398 		{ ET8EK8_REG_8BIT, 0x1220, 0x89 },
399 		{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
400 		{ ET8EK8_REG_8BIT, 0x1222, 0xFE },
401 		{ ET8EK8_REG_TERM, 0, 0}
402 	}
403 };
404 
405 /* Mode_648x492_5fps */
406 static struct et8ek8_reglist mode_648x492_5fps = {
407 /* (without the +1)
408  * SPCK       = 13.3333333333333 MHz
409  * CCP2       = 53.3333333333333 MHz
410  * VCO        = 640 MHz
411  * VCOUNT     = 84 (2016)
412  * HCOUNT     = 221 (5304)
413  * CKREF_DIV  = 2
414  * CKVAR_DIV  = 200
415  * VCO_DIV    = 5
416  * SPCK_DIV   = 7
417  * MRCK_DIV   = 7
418  * LVDSCK_DIV = 1
419  */
420 	.type = ET8EK8_REGLIST_MODE,
421 	.mode = {
422 		.sensor_width = 2592,
423 		.sensor_height = 1968,
424 		.sensor_window_origin_x = 0,
425 		.sensor_window_origin_y = 0,
426 		.sensor_window_width = 2592,
427 		.sensor_window_height = 1968,
428 		.width = 5304,
429 		.height = 504,
430 		.window_origin_x = 0,
431 		.window_origin_y = 0,
432 		.window_width = 648,
433 		.window_height = 492,
434 		.pixel_clock = 13333333,
435 		.ext_clock = 9600000,
436 		.timeperframe = {
437 			.numerator = 100,
438 			.denominator = 499
439 		},
440 		.max_exp = 500,
441 		/* .max_gain = 0, */
442 		.bus_format = MEDIA_BUS_FMT_SGRBG10_1X10,
443 		.sensitivity = 65536
444 	},
445 	.regs = {
446 		{ ET8EK8_REG_8BIT, 0x1239, 0x64 },
447 		{ ET8EK8_REG_8BIT, 0x1238, 0x02 },
448 		{ ET8EK8_REG_8BIT, 0x123B, 0x71 },
449 		{ ET8EK8_REG_8BIT, 0x123A, 0x57 },
450 		{ ET8EK8_REG_8BIT, 0x121B, 0x61 },
451 		{ ET8EK8_REG_8BIT, 0x121D, 0x61 },
452 		{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
453 		{ ET8EK8_REG_8BIT, 0x1220, 0xDD },
454 		{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
455 		{ ET8EK8_REG_8BIT, 0x1222, 0x54 },
456 		{ ET8EK8_REG_8BIT, 0x125D, 0x88 }, /* CCP_LVDS_MODE/  */
457 		{ ET8EK8_REG_TERM, 0, 0}
458 	}
459 };
460 
461 /* Mode3_4VGA_1296x984_5fps */
462 static struct et8ek8_reglist mode3_4vga_1296x984_5fps = {
463 /* (without the +1)
464  * SPCK       = 49.4 MHz
465  * CCP2       = 395.2 MHz
466  * VCO        = 790.4 MHz
467  * VCOUNT     = 250 (6000)
468  * HCOUNT     = 137 (3288)
469  * CKREF_DIV  = 2
470  * CKVAR_DIV  = 247
471  * VCO_DIV    = 1
472  * SPCK_DIV   = 7
473  * MRCK_DIV   = 7
474  * LVDSCK_DIV = 0
475  */
476 	.type = ET8EK8_REGLIST_MODE,
477 	.mode = {
478 		.sensor_width = 2592,
479 		.sensor_height = 1968,
480 		.sensor_window_origin_x = 0,
481 		.sensor_window_origin_y = 0,
482 		.sensor_window_width = 2592,
483 		.sensor_window_height = 1968,
484 		.width = 3288,
485 		.height = 3000,
486 		.window_origin_x = 0,
487 		.window_origin_y = 0,
488 		.window_width = 1296,
489 		.window_height = 984,
490 		.pixel_clock = 49400000,
491 		.ext_clock = 9600000,
492 		.timeperframe = {
493 			.numerator = 100,
494 			.denominator = 501
495 		},
496 		.max_exp = 2996,
497 		/* .max_gain = 0, */
498 		.bus_format = MEDIA_BUS_FMT_SGRBG10_1X10,
499 		.sensitivity = 65536
500 	},
501 	.regs = {
502 		{ ET8EK8_REG_8BIT, 0x1239, 0x7B },
503 		{ ET8EK8_REG_8BIT, 0x1238, 0x82 },
504 		{ ET8EK8_REG_8BIT, 0x123B, 0x70 },
505 		{ ET8EK8_REG_8BIT, 0x123A, 0x17 },
506 		{ ET8EK8_REG_8BIT, 0x121B, 0x63 },
507 		{ ET8EK8_REG_8BIT, 0x121D, 0x63 },
508 		{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
509 		{ ET8EK8_REG_8BIT, 0x1220, 0x89 },
510 		{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
511 		{ ET8EK8_REG_8BIT, 0x1222, 0xFA },
512 		{ ET8EK8_REG_8BIT, 0x125D, 0x88 }, /* CCP_LVDS_MODE/  */
513 		{ ET8EK8_REG_TERM, 0, 0}
514 	}
515 };
516 
517 /* Mode_4VGA_1296x984_25fps_DPCM10-8 */
518 static struct et8ek8_reglist mode_4vga_1296x984_25fps_dpcm10_8 = {
519 /* (without the +1)
520  * SPCK       = 84.2666666666667 MHz
521  * CCP2       = 505.6 MHz
522  * VCO        = 505.6 MHz
523  * VCOUNT     = 88 (2112)
524  * HCOUNT     = 133 (3192)
525  * CKREF_DIV  = 2
526  * CKVAR_DIV  = 158
527  * VCO_DIV    = 0
528  * SPCK_DIV   = 5
529  * MRCK_DIV   = 7
530  * LVDSCK_DIV = 0
531  */
532 	.type = ET8EK8_REGLIST_MODE,
533 	.mode = {
534 		.sensor_width = 2592,
535 		.sensor_height = 1968,
536 		.sensor_window_origin_x = 0,
537 		.sensor_window_origin_y = 0,
538 		.sensor_window_width = 2592,
539 		.sensor_window_height = 1968,
540 		.width = 3192,
541 		.height = 1056,
542 		.window_origin_x = 0,
543 		.window_origin_y = 0,
544 		.window_width = 1296,
545 		.window_height = 984,
546 		.pixel_clock = 84266667,
547 		.ext_clock = 9600000,
548 		.timeperframe = {
549 			.numerator = 100,
550 			.denominator = 2500
551 		},
552 		.max_exp = 1052,
553 		/* .max_gain = 0, */
554 		.bus_format = MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8,
555 		.sensitivity = 65536
556 	},
557 	.regs = {
558 		{ ET8EK8_REG_8BIT, 0x1239, 0x4F },
559 		{ ET8EK8_REG_8BIT, 0x1238, 0x02 },
560 		{ ET8EK8_REG_8BIT, 0x123B, 0x70 },
561 		{ ET8EK8_REG_8BIT, 0x123A, 0x05 },
562 		{ ET8EK8_REG_8BIT, 0x121B, 0x63 },
563 		{ ET8EK8_REG_8BIT, 0x1220, 0x85 },
564 		{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
565 		{ ET8EK8_REG_8BIT, 0x1222, 0x58 },
566 		{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
567 		{ ET8EK8_REG_8BIT, 0x121D, 0x63 },
568 		{ ET8EK8_REG_8BIT, 0x125D, 0x83 },
569 		{ ET8EK8_REG_TERM, 0, 0}
570 	}
571 };
572 
573 struct et8ek8_meta_reglist meta_reglist = {
574 	.version = "V14 03-June-2008",
575 	.reglist = {
576 		{ .ptr = &mode1_poweron_mode2_16vga_2592x1968_12_07fps },
577 		{ .ptr = &mode1_16vga_2592x1968_13_12fps_dpcm10_8 },
578 		{ .ptr = &mode3_4vga_1296x984_29_99fps_dpcm10_8 },
579 		{ .ptr = &mode4_svga_864x656_29_88fps },
580 		{ .ptr = &mode5_vga_648x492_29_93fps },
581 		{ .ptr = &mode2_16vga_2592x1968_3_99fps },
582 		{ .ptr = &mode_648x492_5fps },
583 		{ .ptr = &mode3_4vga_1296x984_5fps },
584 		{ .ptr = &mode_4vga_1296x984_25fps_dpcm10_8 },
585 		{ .ptr = NULL }
586 	}
587 };
588