xref: /openbmc/linux/drivers/media/i2c/ccs/ccs.h (revision 6b3980e0)
1b24cc2a1SSakari Ailus /* SPDX-License-Identifier: GPL-2.0-only */
2b24cc2a1SSakari Ailus /*
3b24cc2a1SSakari Ailus  * drivers/media/i2c/smiapp/ccs.h
4b24cc2a1SSakari Ailus  *
5b24cc2a1SSakari Ailus  * Generic driver for MIPI CCS/SMIA/SMIA++ compliant camera sensors
6b24cc2a1SSakari Ailus  *
7b24cc2a1SSakari Ailus  * Copyright (C) 2020 Intel Corporation
8b24cc2a1SSakari Ailus  * Copyright (C) 2010--2012 Nokia Corporation
97389d01cSSakari Ailus  * Contact: Sakari Ailus <sakari.ailus@linux.intel.com>
10b24cc2a1SSakari Ailus  */
11b24cc2a1SSakari Ailus 
12b24cc2a1SSakari Ailus #ifndef __CCS_H__
13b24cc2a1SSakari Ailus #define __CCS_H__
14b24cc2a1SSakari Ailus 
15b24cc2a1SSakari Ailus #include <linux/mutex.h>
16b24cc2a1SSakari Ailus #include <media/v4l2-ctrls.h>
17b24cc2a1SSakari Ailus #include <media/v4l2-subdev.h>
18b24cc2a1SSakari Ailus 
19a11d3d68SSakari Ailus #include "ccs-data.h"
20fe652254SSakari Ailus #include "ccs-limits.h"
21b24cc2a1SSakari Ailus #include "ccs-quirk.h"
22b24cc2a1SSakari Ailus #include "ccs-regs.h"
23b24cc2a1SSakari Ailus #include "ccs-reg-access.h"
249e05bbacSSakari Ailus #include "../ccs-pll.h"
25b24cc2a1SSakari Ailus #include "smiapp-reg-defs.h"
26b24cc2a1SSakari Ailus 
27b24cc2a1SSakari Ailus /*
28b24cc2a1SSakari Ailus  * Standard SMIA++ constants
29b24cc2a1SSakari Ailus  */
30b24cc2a1SSakari Ailus #define SMIA_VERSION_1			10
31b24cc2a1SSakari Ailus #define SMIAPP_VERSION_0_8		8 /* Draft 0.8 */
32b24cc2a1SSakari Ailus #define SMIAPP_VERSION_0_9		9 /* Draft 0.9 */
33b24cc2a1SSakari Ailus #define SMIAPP_VERSION_1		10
34b24cc2a1SSakari Ailus 
35b24cc2a1SSakari Ailus #define SMIAPP_PROFILE_0		0
36b24cc2a1SSakari Ailus #define SMIAPP_PROFILE_1		1
37b24cc2a1SSakari Ailus #define SMIAPP_PROFILE_2		2
38b24cc2a1SSakari Ailus 
39b24cc2a1SSakari Ailus #define SMIAPP_NVM_PAGE_SIZE		64	/* bytes */
40b24cc2a1SSakari Ailus 
41b24cc2a1SSakari Ailus #define SMIAPP_RESET_DELAY_CLOCKS	2400
42b24cc2a1SSakari Ailus #define SMIAPP_RESET_DELAY(clk)				\
43b24cc2a1SSakari Ailus 	(1000 +	(SMIAPP_RESET_DELAY_CLOCKS * 1000	\
44b24cc2a1SSakari Ailus 		 + (clk) / 1000 - 1) / ((clk) / 1000))
45b24cc2a1SSakari Ailus 
46b24cc2a1SSakari Ailus #define CCS_COLOUR_COMPONENTS		4
47b24cc2a1SSakari Ailus 
48b24cc2a1SSakari Ailus #define SMIAPP_NAME			"smiapp"
49b24cc2a1SSakari Ailus #define CCS_NAME			"ccs"
50b24cc2a1SSakari Ailus 
51b24cc2a1SSakari Ailus #define CCS_DFL_I2C_ADDR	(0x20 >> 1) /* Default I2C Address */
52b24cc2a1SSakari Ailus #define CCS_ALT_I2C_ADDR	(0x6e >> 1) /* Alternate I2C Address */
53b24cc2a1SSakari Ailus 
54fe652254SSakari Ailus #define CCS_LIM(sensor, limit) \
55fe652254SSakari Ailus 	ccs_get_limit(sensor, CCS_L_##limit, 0)
56fe652254SSakari Ailus 
57fe652254SSakari Ailus #define CCS_LIM_AT(sensor, limit, offset)	\
58fe652254SSakari Ailus 	ccs_get_limit(sensor, CCS_L_##limit, CCS_L_##limit##_OFFSET(offset))
59fe652254SSakari Ailus 
60b24cc2a1SSakari Ailus struct ccs_flash_strobe_parms {
61b24cc2a1SSakari Ailus 	u8 mode;
62b24cc2a1SSakari Ailus 	u32 strobe_width_high_us;
63b24cc2a1SSakari Ailus 	u16 strobe_delay;
64b24cc2a1SSakari Ailus 	u16 stobe_start_point;
65b24cc2a1SSakari Ailus 	u8 trigger;
66b24cc2a1SSakari Ailus };
67b24cc2a1SSakari Ailus 
68b24cc2a1SSakari Ailus struct ccs_hwconfig {
69b24cc2a1SSakari Ailus 	/*
70b24cc2a1SSakari Ailus 	 * Change the cci address if i2c_addr_alt is set.
71b24cc2a1SSakari Ailus 	 * Both default and alternate cci addr need to be present
72b24cc2a1SSakari Ailus 	 */
73b24cc2a1SSakari Ailus 	unsigned short i2c_addr_dfl;	/* Default i2c addr */
74b24cc2a1SSakari Ailus 	unsigned short i2c_addr_alt;	/* Alternate i2c addr */
75b24cc2a1SSakari Ailus 
76*dffbdf37SSakari Ailus 	u32 ext_clk;			/* sensor external clk */
77b24cc2a1SSakari Ailus 
78b24cc2a1SSakari Ailus 	unsigned int lanes;		/* Number of CSI-2 lanes */
79*dffbdf37SSakari Ailus 	u32 csi_signalling_mode;	/* CCS_CSI_SIGNALLING_MODE_* */
80*dffbdf37SSakari Ailus 	u64 *op_sys_clock;
81b24cc2a1SSakari Ailus 
82b24cc2a1SSakari Ailus 	struct ccs_flash_strobe_parms *strobe_setup;
83b24cc2a1SSakari Ailus };
84b24cc2a1SSakari Ailus 
85b24cc2a1SSakari Ailus struct ccs_quirk;
86b24cc2a1SSakari Ailus 
87b24cc2a1SSakari Ailus #define CCS_MODULE_IDENT_FLAG_REV_LE		(1 << 0)
88b24cc2a1SSakari Ailus 
89b24cc2a1SSakari Ailus struct ccs_module_ident {
90b24cc2a1SSakari Ailus 	u16 mipi_manufacturer_id;
91b24cc2a1SSakari Ailus 	u16 model_id;
92b24cc2a1SSakari Ailus 	u8 smia_manufacturer_id;
93b24cc2a1SSakari Ailus 	u8 revision_number_major;
94b24cc2a1SSakari Ailus 
95b24cc2a1SSakari Ailus 	u8 flags;
96b24cc2a1SSakari Ailus 
97b24cc2a1SSakari Ailus 	char *name;
98b24cc2a1SSakari Ailus 	const struct ccs_quirk *quirk;
99b24cc2a1SSakari Ailus };
100b24cc2a1SSakari Ailus 
101b24cc2a1SSakari Ailus struct ccs_module_info {
102b24cc2a1SSakari Ailus 	u32 smia_manufacturer_id;
103b24cc2a1SSakari Ailus 	u32 mipi_manufacturer_id;
104b24cc2a1SSakari Ailus 	u32 model_id;
105f86ae916SSakari Ailus 	u32 revision_number;
106b24cc2a1SSakari Ailus 
107b24cc2a1SSakari Ailus 	u32 module_year;
108b24cc2a1SSakari Ailus 	u32 module_month;
109b24cc2a1SSakari Ailus 	u32 module_day;
110b24cc2a1SSakari Ailus 
111b24cc2a1SSakari Ailus 	u32 sensor_smia_manufacturer_id;
112b24cc2a1SSakari Ailus 	u32 sensor_mipi_manufacturer_id;
113b24cc2a1SSakari Ailus 	u32 sensor_model_id;
114b24cc2a1SSakari Ailus 	u32 sensor_revision_number;
115b24cc2a1SSakari Ailus 	u32 sensor_firmware_version;
116b24cc2a1SSakari Ailus 
117b24cc2a1SSakari Ailus 	u32 smia_version;
118b24cc2a1SSakari Ailus 	u32 smiapp_version;
119b24cc2a1SSakari Ailus 	u32 ccs_version;
120b24cc2a1SSakari Ailus 
121b24cc2a1SSakari Ailus 	char *name;
122b24cc2a1SSakari Ailus 	const struct ccs_quirk *quirk;
123b24cc2a1SSakari Ailus };
124b24cc2a1SSakari Ailus 
125b24cc2a1SSakari Ailus #define CCS_IDENT_FQ(manufacturer, model, rev, fl, _name, _quirk)	\
126b24cc2a1SSakari Ailus 	{ .smia_manufacturer_id = manufacturer,				\
127b24cc2a1SSakari Ailus 	  .model_id = model,						\
128b24cc2a1SSakari Ailus 	  .revision_number_major = rev,					\
129b24cc2a1SSakari Ailus 	  .flags = fl,							\
130b24cc2a1SSakari Ailus 	  .name = _name,						\
131b24cc2a1SSakari Ailus 	  .quirk = _quirk, }
132b24cc2a1SSakari Ailus 
133b24cc2a1SSakari Ailus #define CCS_IDENT_LQ(manufacturer, model, rev, _name, _quirk)	\
134b24cc2a1SSakari Ailus 	{ .smia_manufacturer_id = manufacturer,				\
135b24cc2a1SSakari Ailus 	  .model_id = model,						\
136b24cc2a1SSakari Ailus 	  .revision_number_major = rev,					\
137b24cc2a1SSakari Ailus 	  .flags = CCS_MODULE_IDENT_FLAG_REV_LE,			\
138b24cc2a1SSakari Ailus 	  .name = _name,						\
139b24cc2a1SSakari Ailus 	  .quirk = _quirk, }
140b24cc2a1SSakari Ailus 
141b24cc2a1SSakari Ailus #define CCS_IDENT_L(manufacturer, model, rev, _name)			\
142b24cc2a1SSakari Ailus 	{ .smia_manufacturer_id = manufacturer,				\
143b24cc2a1SSakari Ailus 	  .model_id = model,						\
144b24cc2a1SSakari Ailus 	  .revision_number_major = rev,					\
145b24cc2a1SSakari Ailus 	  .flags = CCS_MODULE_IDENT_FLAG_REV_LE,			\
146b24cc2a1SSakari Ailus 	  .name = _name, }
147b24cc2a1SSakari Ailus 
148b24cc2a1SSakari Ailus #define CCS_IDENT_Q(manufacturer, model, rev, _name, _quirk)		\
149b24cc2a1SSakari Ailus 	{ .smia_manufacturer_id = manufacturer,				\
150b24cc2a1SSakari Ailus 	  .model_id = model,						\
151b24cc2a1SSakari Ailus 	  .revision_number_major = rev,					\
152b24cc2a1SSakari Ailus 	  .flags = 0,							\
153b24cc2a1SSakari Ailus 	  .name = _name,						\
154b24cc2a1SSakari Ailus 	  .quirk = _quirk, }
155b24cc2a1SSakari Ailus 
156b24cc2a1SSakari Ailus #define CCS_IDENT(manufacturer, model, rev, _name)			\
157b24cc2a1SSakari Ailus 	{ .smia_manufacturer_id = manufacturer,				\
158b24cc2a1SSakari Ailus 	  .model_id = model,						\
159b24cc2a1SSakari Ailus 	  .revision_number_major = rev,					\
160b24cc2a1SSakari Ailus 	  .flags = 0,							\
161b24cc2a1SSakari Ailus 	  .name = _name, }
162b24cc2a1SSakari Ailus 
163b24cc2a1SSakari Ailus struct ccs_csi_data_format {
164b24cc2a1SSakari Ailus 	u32 code;
165b24cc2a1SSakari Ailus 	u8 width;
166b24cc2a1SSakari Ailus 	u8 compressed;
167b24cc2a1SSakari Ailus 	u8 pixel_order;
168b24cc2a1SSakari Ailus };
169b24cc2a1SSakari Ailus 
170b24cc2a1SSakari Ailus #define CCS_SUBDEVS			3
171b24cc2a1SSakari Ailus 
172b24cc2a1SSakari Ailus #define CCS_PA_PAD_SRC			0
173b24cc2a1SSakari Ailus #define CCS_PAD_SINK			0
174b24cc2a1SSakari Ailus #define CCS_PAD_SRC			1
175b24cc2a1SSakari Ailus #define CCS_PADS			2
176b24cc2a1SSakari Ailus 
177b24cc2a1SSakari Ailus struct ccs_binning_subtype {
178b24cc2a1SSakari Ailus 	u8 horizontal:4;
179b24cc2a1SSakari Ailus 	u8 vertical:4;
180b24cc2a1SSakari Ailus } __packed;
181b24cc2a1SSakari Ailus 
182b24cc2a1SSakari Ailus struct ccs_subdev {
183b24cc2a1SSakari Ailus 	struct v4l2_subdev sd;
184b24cc2a1SSakari Ailus 	struct media_pad pads[CCS_PADS];
185b24cc2a1SSakari Ailus 	struct v4l2_rect sink_fmt;
186b24cc2a1SSakari Ailus 	struct v4l2_rect crop[CCS_PADS];
187b24cc2a1SSakari Ailus 	struct v4l2_rect compose; /* compose on sink */
188b24cc2a1SSakari Ailus 	unsigned short sink_pad;
189b24cc2a1SSakari Ailus 	unsigned short source_pad;
190b24cc2a1SSakari Ailus 	int npads;
191b24cc2a1SSakari Ailus 	struct ccs_sensor *sensor;
192b24cc2a1SSakari Ailus 	struct v4l2_ctrl_handler ctrl_handler;
193b24cc2a1SSakari Ailus };
194b24cc2a1SSakari Ailus 
195b24cc2a1SSakari Ailus /*
196b24cc2a1SSakari Ailus  * struct ccs_sensor - Main device structure
197b24cc2a1SSakari Ailus  */
198b24cc2a1SSakari Ailus struct ccs_sensor {
199b24cc2a1SSakari Ailus 	/*
200b24cc2a1SSakari Ailus 	 * "mutex" is used to serialise access to all fields here
201b24cc2a1SSakari Ailus 	 * except v4l2_ctrls at the end of the struct. "mutex" is also
202b24cc2a1SSakari Ailus 	 * used to serialise access to file handle specific
203b24cc2a1SSakari Ailus 	 * information.
204b24cc2a1SSakari Ailus 	 */
205b24cc2a1SSakari Ailus 	struct mutex mutex;
206b24cc2a1SSakari Ailus 	struct ccs_subdev ssds[CCS_SUBDEVS];
207b24cc2a1SSakari Ailus 	u32 ssds_used;
208b24cc2a1SSakari Ailus 	struct ccs_subdev *src;
209b24cc2a1SSakari Ailus 	struct ccs_subdev *binner;
210b24cc2a1SSakari Ailus 	struct ccs_subdev *scaler;
211b24cc2a1SSakari Ailus 	struct ccs_subdev *pixel_array;
2127b1dd0f8SSakari Ailus 	struct ccs_hwconfig hwcfg;
213621214c3SSakari Ailus 	struct regulator_bulk_data *regulators;
214b24cc2a1SSakari Ailus 	struct clk *ext_clk;
215b24cc2a1SSakari Ailus 	struct gpio_desc *xshutdown;
216d0fbdcbeSSakari Ailus 	struct gpio_desc *reset;
217b24cc2a1SSakari Ailus 	void *ccs_limits;
218b24cc2a1SSakari Ailus 	u8 nbinning_subtypes;
219b24cc2a1SSakari Ailus 	struct ccs_binning_subtype binning_subtypes[CCS_LIM_BINNING_SUB_TYPE_MAX_N + 1];
220b24cc2a1SSakari Ailus 	u32 mbus_frame_fmts;
221b24cc2a1SSakari Ailus 	const struct ccs_csi_data_format *csi_format;
222b24cc2a1SSakari Ailus 	const struct ccs_csi_data_format *internal_csi_format;
223b24cc2a1SSakari Ailus 	u32 default_mbus_frame_fmts;
224b24cc2a1SSakari Ailus 	int default_pixel_order;
225a11d3d68SSakari Ailus 	struct ccs_data_container sdata, mdata;
226b24cc2a1SSakari Ailus 
227b24cc2a1SSakari Ailus 	u8 binning_horizontal;
228b24cc2a1SSakari Ailus 	u8 binning_vertical;
229b24cc2a1SSakari Ailus 
230b24cc2a1SSakari Ailus 	u8 scale_m;
231b24cc2a1SSakari Ailus 	u8 scaling_mode;
232b24cc2a1SSakari Ailus 
233b24cc2a1SSakari Ailus 	u8 frame_skip;
234b24cc2a1SSakari Ailus 	u16 embedded_start; /* embedded data start line */
235b24cc2a1SSakari Ailus 	u16 embedded_end;
236b24cc2a1SSakari Ailus 	u16 image_start; /* image data start line */
237b24cc2a1SSakari Ailus 	u16 visible_pixel_start; /* start pixel of the visible image */
238b24cc2a1SSakari Ailus 
239b24cc2a1SSakari Ailus 	bool streaming;
240b24cc2a1SSakari Ailus 	bool dev_init_done;
241b24cc2a1SSakari Ailus 	u8 compressed_min_bpp;
242b24cc2a1SSakari Ailus 
243b24cc2a1SSakari Ailus 	struct ccs_module_info minfo;
244b24cc2a1SSakari Ailus 
2459e05bbacSSakari Ailus 	struct ccs_pll pll;
246b24cc2a1SSakari Ailus 
247b24cc2a1SSakari Ailus 	/* Is a default format supported for a given BPP? */
248b24cc2a1SSakari Ailus 	unsigned long *valid_link_freqs;
249b24cc2a1SSakari Ailus 
250b24cc2a1SSakari Ailus 	/* Pixel array controls */
251b24cc2a1SSakari Ailus 	struct v4l2_ctrl *exposure;
252b24cc2a1SSakari Ailus 	struct v4l2_ctrl *hflip;
253b24cc2a1SSakari Ailus 	struct v4l2_ctrl *vflip;
254b24cc2a1SSakari Ailus 	struct v4l2_ctrl *vblank;
255b24cc2a1SSakari Ailus 	struct v4l2_ctrl *hblank;
256b24cc2a1SSakari Ailus 	struct v4l2_ctrl *pixel_rate_parray;
25733039a88SSakari Ailus 	struct v4l2_ctrl *luminance_level;
258b24cc2a1SSakari Ailus 	/* src controls */
259b24cc2a1SSakari Ailus 	struct v4l2_ctrl *link_freq;
260b24cc2a1SSakari Ailus 	struct v4l2_ctrl *pixel_rate_csi;
261b24cc2a1SSakari Ailus 	/* test pattern colour components */
262b24cc2a1SSakari Ailus 	struct v4l2_ctrl *test_data[CCS_COLOUR_COMPONENTS];
263b24cc2a1SSakari Ailus };
264b24cc2a1SSakari Ailus 
265b24cc2a1SSakari Ailus #define to_ccs_subdev(_sd)				\
266b24cc2a1SSakari Ailus 	container_of(_sd, struct ccs_subdev, sd)
267b24cc2a1SSakari Ailus 
268b24cc2a1SSakari Ailus #define to_ccs_sensor(_sd)	\
269b24cc2a1SSakari Ailus 	(to_ccs_subdev(_sd)->sensor)
270b24cc2a1SSakari Ailus 
271b24cc2a1SSakari Ailus void ccs_replace_limit(struct ccs_sensor *sensor,
272b24cc2a1SSakari Ailus 		       unsigned int limit, unsigned int offset, u32 val);
273fe652254SSakari Ailus u32 ccs_get_limit(struct ccs_sensor *sensor, unsigned int limit,
274fe652254SSakari Ailus 		  unsigned int offset);
275b24cc2a1SSakari Ailus 
276b24cc2a1SSakari Ailus #endif /* __CCS_H__ */
277