1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Analog Devices ADV7511 HDMI Transmitter Device Driver 4 * 5 * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved. 6 */ 7 8 /* 9 * This file is named adv7511-v4l2.c so it doesn't conflict with the Analog 10 * Device ADV7511 (config fragment CONFIG_DRM_I2C_ADV7511). 11 */ 12 13 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/slab.h> 17 #include <linux/i2c.h> 18 #include <linux/delay.h> 19 #include <linux/videodev2.h> 20 #include <linux/gpio.h> 21 #include <linux/workqueue.h> 22 #include <linux/hdmi.h> 23 #include <linux/v4l2-dv-timings.h> 24 #include <media/v4l2-device.h> 25 #include <media/v4l2-common.h> 26 #include <media/v4l2-ctrls.h> 27 #include <media/v4l2-dv-timings.h> 28 #include <media/i2c/adv7511.h> 29 #include <media/cec.h> 30 31 static int debug; 32 module_param(debug, int, 0644); 33 MODULE_PARM_DESC(debug, "debug level (0-2)"); 34 35 MODULE_DESCRIPTION("Analog Devices ADV7511 HDMI Transmitter Device Driver"); 36 MODULE_AUTHOR("Hans Verkuil"); 37 MODULE_LICENSE("GPL v2"); 38 39 #define MASK_ADV7511_EDID_RDY_INT 0x04 40 #define MASK_ADV7511_MSEN_INT 0x40 41 #define MASK_ADV7511_HPD_INT 0x80 42 43 #define MASK_ADV7511_HPD_DETECT 0x40 44 #define MASK_ADV7511_MSEN_DETECT 0x20 45 #define MASK_ADV7511_EDID_RDY 0x10 46 47 #define EDID_MAX_RETRIES (8) 48 #define EDID_DELAY 250 49 #define EDID_MAX_SEGM 8 50 51 #define ADV7511_MAX_WIDTH 1920 52 #define ADV7511_MAX_HEIGHT 1200 53 #define ADV7511_MIN_PIXELCLOCK 20000000 54 #define ADV7511_MAX_PIXELCLOCK 225000000 55 56 #define ADV7511_MAX_ADDRS (3) 57 58 /* 59 ********************************************************************** 60 * 61 * Arrays with configuration parameters for the ADV7511 62 * 63 ********************************************************************** 64 */ 65 66 struct i2c_reg_value { 67 unsigned char reg; 68 unsigned char value; 69 }; 70 71 struct adv7511_state_edid { 72 /* total number of blocks */ 73 u32 blocks; 74 /* Number of segments read */ 75 u32 segments; 76 u8 data[EDID_MAX_SEGM * 256]; 77 /* Number of EDID read retries left */ 78 unsigned read_retries; 79 bool complete; 80 }; 81 82 struct adv7511_state { 83 struct adv7511_platform_data pdata; 84 struct v4l2_subdev sd; 85 struct media_pad pad; 86 struct v4l2_ctrl_handler hdl; 87 int chip_revision; 88 u8 i2c_edid_addr; 89 u8 i2c_pktmem_addr; 90 u8 i2c_cec_addr; 91 92 struct i2c_client *i2c_cec; 93 struct cec_adapter *cec_adap; 94 u8 cec_addr[ADV7511_MAX_ADDRS]; 95 u8 cec_valid_addrs; 96 bool cec_enabled_adap; 97 98 /* Is the adv7511 powered on? */ 99 bool power_on; 100 /* Did we receive hotplug and rx-sense signals? */ 101 bool have_monitor; 102 bool enabled_irq; 103 /* timings from s_dv_timings */ 104 struct v4l2_dv_timings dv_timings; 105 u32 fmt_code; 106 u32 colorspace; 107 u32 ycbcr_enc; 108 u32 quantization; 109 u32 xfer_func; 110 u32 content_type; 111 /* controls */ 112 struct v4l2_ctrl *hdmi_mode_ctrl; 113 struct v4l2_ctrl *hotplug_ctrl; 114 struct v4l2_ctrl *rx_sense_ctrl; 115 struct v4l2_ctrl *have_edid0_ctrl; 116 struct v4l2_ctrl *rgb_quantization_range_ctrl; 117 struct v4l2_ctrl *content_type_ctrl; 118 struct i2c_client *i2c_edid; 119 struct i2c_client *i2c_pktmem; 120 struct adv7511_state_edid edid; 121 /* Running counter of the number of detected EDIDs (for debugging) */ 122 unsigned edid_detect_counter; 123 struct workqueue_struct *work_queue; 124 struct delayed_work edid_handler; /* work entry */ 125 }; 126 127 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd); 128 static bool adv7511_check_edid_status(struct v4l2_subdev *sd); 129 static void adv7511_setup(struct v4l2_subdev *sd); 130 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq); 131 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq); 132 133 134 static const struct v4l2_dv_timings_cap adv7511_timings_cap = { 135 .type = V4L2_DV_BT_656_1120, 136 /* keep this initialization for compatibility with GCC < 4.4.6 */ 137 .reserved = { 0 }, 138 V4L2_INIT_BT_TIMINGS(640, ADV7511_MAX_WIDTH, 350, ADV7511_MAX_HEIGHT, 139 ADV7511_MIN_PIXELCLOCK, ADV7511_MAX_PIXELCLOCK, 140 V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT | 141 V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT, 142 V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING | 143 V4L2_DV_BT_CAP_CUSTOM) 144 }; 145 146 static inline struct adv7511_state *get_adv7511_state(struct v4l2_subdev *sd) 147 { 148 return container_of(sd, struct adv7511_state, sd); 149 } 150 151 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) 152 { 153 return &container_of(ctrl->handler, struct adv7511_state, hdl)->sd; 154 } 155 156 /* ------------------------ I2C ----------------------------------------------- */ 157 158 static s32 adv_smbus_read_byte_data_check(struct i2c_client *client, 159 u8 command, bool check) 160 { 161 union i2c_smbus_data data; 162 163 if (!i2c_smbus_xfer(client->adapter, client->addr, client->flags, 164 I2C_SMBUS_READ, command, 165 I2C_SMBUS_BYTE_DATA, &data)) 166 return data.byte; 167 if (check) 168 v4l_err(client, "error reading %02x, %02x\n", 169 client->addr, command); 170 return -1; 171 } 172 173 static s32 adv_smbus_read_byte_data(struct i2c_client *client, u8 command) 174 { 175 int i; 176 for (i = 0; i < 3; i++) { 177 int ret = adv_smbus_read_byte_data_check(client, command, true); 178 if (ret >= 0) { 179 if (i) 180 v4l_err(client, "read ok after %d retries\n", i); 181 return ret; 182 } 183 } 184 v4l_err(client, "read failed\n"); 185 return -1; 186 } 187 188 static int adv7511_rd(struct v4l2_subdev *sd, u8 reg) 189 { 190 struct i2c_client *client = v4l2_get_subdevdata(sd); 191 192 return adv_smbus_read_byte_data(client, reg); 193 } 194 195 static int adv7511_wr(struct v4l2_subdev *sd, u8 reg, u8 val) 196 { 197 struct i2c_client *client = v4l2_get_subdevdata(sd); 198 int ret; 199 int i; 200 201 for (i = 0; i < 3; i++) { 202 ret = i2c_smbus_write_byte_data(client, reg, val); 203 if (ret == 0) 204 return 0; 205 } 206 v4l2_err(sd, "%s: i2c write error\n", __func__); 207 return ret; 208 } 209 210 /* To set specific bits in the register, a clear-mask is given (to be AND-ed), 211 and then the value-mask (to be OR-ed). */ 212 static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask) 213 { 214 adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask); 215 } 216 217 static int adv7511_edid_rd(struct v4l2_subdev *sd, uint16_t len, uint8_t *buf) 218 { 219 struct adv7511_state *state = get_adv7511_state(sd); 220 int i; 221 222 v4l2_dbg(1, debug, sd, "%s:\n", __func__); 223 224 for (i = 0; i < len; i += I2C_SMBUS_BLOCK_MAX) { 225 s32 ret; 226 227 ret = i2c_smbus_read_i2c_block_data(state->i2c_edid, i, 228 I2C_SMBUS_BLOCK_MAX, buf + i); 229 if (ret < 0) { 230 v4l2_err(sd, "%s: i2c read error\n", __func__); 231 return ret; 232 } 233 } 234 235 return 0; 236 } 237 238 static inline int adv7511_cec_read(struct v4l2_subdev *sd, u8 reg) 239 { 240 struct adv7511_state *state = get_adv7511_state(sd); 241 242 return i2c_smbus_read_byte_data(state->i2c_cec, reg); 243 } 244 245 static int adv7511_cec_write(struct v4l2_subdev *sd, u8 reg, u8 val) 246 { 247 struct adv7511_state *state = get_adv7511_state(sd); 248 int ret; 249 int i; 250 251 for (i = 0; i < 3; i++) { 252 ret = i2c_smbus_write_byte_data(state->i2c_cec, reg, val); 253 if (ret == 0) 254 return 0; 255 } 256 v4l2_err(sd, "%s: I2C Write Problem\n", __func__); 257 return ret; 258 } 259 260 static inline int adv7511_cec_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, 261 u8 val) 262 { 263 return adv7511_cec_write(sd, reg, (adv7511_cec_read(sd, reg) & mask) | val); 264 } 265 266 static int adv7511_pktmem_rd(struct v4l2_subdev *sd, u8 reg) 267 { 268 struct adv7511_state *state = get_adv7511_state(sd); 269 270 return adv_smbus_read_byte_data(state->i2c_pktmem, reg); 271 } 272 273 static inline bool adv7511_have_hotplug(struct v4l2_subdev *sd) 274 { 275 return adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT; 276 } 277 278 static inline bool adv7511_have_rx_sense(struct v4l2_subdev *sd) 279 { 280 return adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT; 281 } 282 283 static void adv7511_csc_conversion_mode(struct v4l2_subdev *sd, u8 mode) 284 { 285 adv7511_wr_and_or(sd, 0x18, 0x9f, (mode & 0x3)<<5); 286 } 287 288 static void adv7511_csc_coeff(struct v4l2_subdev *sd, 289 u16 A1, u16 A2, u16 A3, u16 A4, 290 u16 B1, u16 B2, u16 B3, u16 B4, 291 u16 C1, u16 C2, u16 C3, u16 C4) 292 { 293 /* A */ 294 adv7511_wr_and_or(sd, 0x18, 0xe0, A1>>8); 295 adv7511_wr(sd, 0x19, A1); 296 adv7511_wr_and_or(sd, 0x1A, 0xe0, A2>>8); 297 adv7511_wr(sd, 0x1B, A2); 298 adv7511_wr_and_or(sd, 0x1c, 0xe0, A3>>8); 299 adv7511_wr(sd, 0x1d, A3); 300 adv7511_wr_and_or(sd, 0x1e, 0xe0, A4>>8); 301 adv7511_wr(sd, 0x1f, A4); 302 303 /* B */ 304 adv7511_wr_and_or(sd, 0x20, 0xe0, B1>>8); 305 adv7511_wr(sd, 0x21, B1); 306 adv7511_wr_and_or(sd, 0x22, 0xe0, B2>>8); 307 adv7511_wr(sd, 0x23, B2); 308 adv7511_wr_and_or(sd, 0x24, 0xe0, B3>>8); 309 adv7511_wr(sd, 0x25, B3); 310 adv7511_wr_and_or(sd, 0x26, 0xe0, B4>>8); 311 adv7511_wr(sd, 0x27, B4); 312 313 /* C */ 314 adv7511_wr_and_or(sd, 0x28, 0xe0, C1>>8); 315 adv7511_wr(sd, 0x29, C1); 316 adv7511_wr_and_or(sd, 0x2A, 0xe0, C2>>8); 317 adv7511_wr(sd, 0x2B, C2); 318 adv7511_wr_and_or(sd, 0x2C, 0xe0, C3>>8); 319 adv7511_wr(sd, 0x2D, C3); 320 adv7511_wr_and_or(sd, 0x2E, 0xe0, C4>>8); 321 adv7511_wr(sd, 0x2F, C4); 322 } 323 324 static void adv7511_csc_rgb_full2limit(struct v4l2_subdev *sd, bool enable) 325 { 326 if (enable) { 327 u8 csc_mode = 0; 328 adv7511_csc_conversion_mode(sd, csc_mode); 329 adv7511_csc_coeff(sd, 330 4096-564, 0, 0, 256, 331 0, 4096-564, 0, 256, 332 0, 0, 4096-564, 256); 333 /* enable CSC */ 334 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x80); 335 /* AVI infoframe: Limited range RGB (16-235) */ 336 adv7511_wr_and_or(sd, 0x57, 0xf3, 0x04); 337 } else { 338 /* disable CSC */ 339 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0); 340 /* AVI infoframe: Full range RGB (0-255) */ 341 adv7511_wr_and_or(sd, 0x57, 0xf3, 0x08); 342 } 343 } 344 345 static void adv7511_set_rgb_quantization_mode(struct v4l2_subdev *sd, struct v4l2_ctrl *ctrl) 346 { 347 struct adv7511_state *state = get_adv7511_state(sd); 348 349 /* Only makes sense for RGB formats */ 350 if (state->fmt_code != MEDIA_BUS_FMT_RGB888_1X24) { 351 /* so just keep quantization */ 352 adv7511_csc_rgb_full2limit(sd, false); 353 return; 354 } 355 356 switch (ctrl->val) { 357 case V4L2_DV_RGB_RANGE_AUTO: 358 /* automatic */ 359 if (state->dv_timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) { 360 /* CE format, RGB limited range (16-235) */ 361 adv7511_csc_rgb_full2limit(sd, true); 362 } else { 363 /* not CE format, RGB full range (0-255) */ 364 adv7511_csc_rgb_full2limit(sd, false); 365 } 366 break; 367 case V4L2_DV_RGB_RANGE_LIMITED: 368 /* RGB limited range (16-235) */ 369 adv7511_csc_rgb_full2limit(sd, true); 370 break; 371 case V4L2_DV_RGB_RANGE_FULL: 372 /* RGB full range (0-255) */ 373 adv7511_csc_rgb_full2limit(sd, false); 374 break; 375 } 376 } 377 378 /* ------------------------------ CTRL OPS ------------------------------ */ 379 380 static int adv7511_s_ctrl(struct v4l2_ctrl *ctrl) 381 { 382 struct v4l2_subdev *sd = to_sd(ctrl); 383 struct adv7511_state *state = get_adv7511_state(sd); 384 385 v4l2_dbg(1, debug, sd, "%s: ctrl id: %d, ctrl->val %d\n", __func__, ctrl->id, ctrl->val); 386 387 if (state->hdmi_mode_ctrl == ctrl) { 388 /* Set HDMI or DVI-D */ 389 adv7511_wr_and_or(sd, 0xaf, 0xfd, ctrl->val == V4L2_DV_TX_MODE_HDMI ? 0x02 : 0x00); 390 return 0; 391 } 392 if (state->rgb_quantization_range_ctrl == ctrl) { 393 adv7511_set_rgb_quantization_mode(sd, ctrl); 394 return 0; 395 } 396 if (state->content_type_ctrl == ctrl) { 397 u8 itc, cn; 398 399 state->content_type = ctrl->val; 400 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC; 401 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS; 402 adv7511_wr_and_or(sd, 0x57, 0x7f, itc << 7); 403 adv7511_wr_and_or(sd, 0x59, 0xcf, cn << 4); 404 return 0; 405 } 406 407 return -EINVAL; 408 } 409 410 static const struct v4l2_ctrl_ops adv7511_ctrl_ops = { 411 .s_ctrl = adv7511_s_ctrl, 412 }; 413 414 /* ---------------------------- CORE OPS ------------------------------------------- */ 415 416 #ifdef CONFIG_VIDEO_ADV_DEBUG 417 static void adv7511_inv_register(struct v4l2_subdev *sd) 418 { 419 struct adv7511_state *state = get_adv7511_state(sd); 420 421 v4l2_info(sd, "0x000-0x0ff: Main Map\n"); 422 if (state->i2c_cec) 423 v4l2_info(sd, "0x100-0x1ff: CEC Map\n"); 424 } 425 426 static int adv7511_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) 427 { 428 struct adv7511_state *state = get_adv7511_state(sd); 429 430 reg->size = 1; 431 switch (reg->reg >> 8) { 432 case 0: 433 reg->val = adv7511_rd(sd, reg->reg & 0xff); 434 break; 435 case 1: 436 if (state->i2c_cec) { 437 reg->val = adv7511_cec_read(sd, reg->reg & 0xff); 438 break; 439 } 440 fallthrough; 441 default: 442 v4l2_info(sd, "Register %03llx not supported\n", reg->reg); 443 adv7511_inv_register(sd); 444 break; 445 } 446 return 0; 447 } 448 449 static int adv7511_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg) 450 { 451 struct adv7511_state *state = get_adv7511_state(sd); 452 453 switch (reg->reg >> 8) { 454 case 0: 455 adv7511_wr(sd, reg->reg & 0xff, reg->val & 0xff); 456 break; 457 case 1: 458 if (state->i2c_cec) { 459 adv7511_cec_write(sd, reg->reg & 0xff, reg->val & 0xff); 460 break; 461 } 462 fallthrough; 463 default: 464 v4l2_info(sd, "Register %03llx not supported\n", reg->reg); 465 adv7511_inv_register(sd); 466 break; 467 } 468 return 0; 469 } 470 #endif 471 472 struct adv7511_cfg_read_infoframe { 473 const char *desc; 474 u8 present_reg; 475 u8 present_mask; 476 u8 header[3]; 477 u16 payload_addr; 478 }; 479 480 static u8 hdmi_infoframe_checksum(u8 *ptr, size_t size) 481 { 482 u8 csum = 0; 483 size_t i; 484 485 /* compute checksum */ 486 for (i = 0; i < size; i++) 487 csum += ptr[i]; 488 489 return 256 - csum; 490 } 491 492 static void log_infoframe(struct v4l2_subdev *sd, const struct adv7511_cfg_read_infoframe *cri) 493 { 494 struct i2c_client *client = v4l2_get_subdevdata(sd); 495 struct device *dev = &client->dev; 496 union hdmi_infoframe frame; 497 u8 buffer[32]; 498 u8 len; 499 int i; 500 501 if (!(adv7511_rd(sd, cri->present_reg) & cri->present_mask)) { 502 v4l2_info(sd, "%s infoframe not transmitted\n", cri->desc); 503 return; 504 } 505 506 memcpy(buffer, cri->header, sizeof(cri->header)); 507 508 len = buffer[2]; 509 510 if (len + 4 > sizeof(buffer)) { 511 v4l2_err(sd, "%s: invalid %s infoframe length %d\n", __func__, cri->desc, len); 512 return; 513 } 514 515 if (cri->payload_addr >= 0x100) { 516 for (i = 0; i < len; i++) 517 buffer[i + 4] = adv7511_pktmem_rd(sd, cri->payload_addr + i - 0x100); 518 } else { 519 for (i = 0; i < len; i++) 520 buffer[i + 4] = adv7511_rd(sd, cri->payload_addr + i); 521 } 522 buffer[3] = 0; 523 buffer[3] = hdmi_infoframe_checksum(buffer, len + 4); 524 525 if (hdmi_infoframe_unpack(&frame, buffer, sizeof(buffer)) < 0) { 526 v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__, cri->desc); 527 return; 528 } 529 530 hdmi_infoframe_log(KERN_INFO, dev, &frame); 531 } 532 533 static void adv7511_log_infoframes(struct v4l2_subdev *sd) 534 { 535 static const struct adv7511_cfg_read_infoframe cri[] = { 536 { "AVI", 0x44, 0x10, { 0x82, 2, 13 }, 0x55 }, 537 { "Audio", 0x44, 0x08, { 0x84, 1, 10 }, 0x73 }, 538 { "SDP", 0x40, 0x40, { 0x83, 1, 25 }, 0x103 }, 539 }; 540 int i; 541 542 for (i = 0; i < ARRAY_SIZE(cri); i++) 543 log_infoframe(sd, &cri[i]); 544 } 545 546 static int adv7511_log_status(struct v4l2_subdev *sd) 547 { 548 struct adv7511_state *state = get_adv7511_state(sd); 549 struct adv7511_state_edid *edid = &state->edid; 550 int i; 551 552 static const char * const states[] = { 553 "in reset", 554 "reading EDID", 555 "idle", 556 "initializing HDCP", 557 "HDCP enabled", 558 "initializing HDCP repeater", 559 "6", "7", "8", "9", "A", "B", "C", "D", "E", "F" 560 }; 561 static const char * const errors[] = { 562 "no error", 563 "bad receiver BKSV", 564 "Ri mismatch", 565 "Pj mismatch", 566 "i2c error", 567 "timed out", 568 "max repeater cascade exceeded", 569 "hash check failed", 570 "too many devices", 571 "9", "A", "B", "C", "D", "E", "F" 572 }; 573 574 v4l2_info(sd, "power %s\n", state->power_on ? "on" : "off"); 575 v4l2_info(sd, "%s hotplug, %s Rx Sense, %s EDID (%d block(s))\n", 576 (adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT) ? "detected" : "no", 577 (adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT) ? "detected" : "no", 578 edid->segments ? "found" : "no", 579 edid->blocks); 580 v4l2_info(sd, "%s output %s\n", 581 (adv7511_rd(sd, 0xaf) & 0x02) ? 582 "HDMI" : "DVI-D", 583 (adv7511_rd(sd, 0xa1) & 0x3c) ? 584 "disabled" : "enabled"); 585 v4l2_info(sd, "state: %s, error: %s, detect count: %u, msk/irq: %02x/%02x\n", 586 states[adv7511_rd(sd, 0xc8) & 0xf], 587 errors[adv7511_rd(sd, 0xc8) >> 4], state->edid_detect_counter, 588 adv7511_rd(sd, 0x94), adv7511_rd(sd, 0x96)); 589 v4l2_info(sd, "RGB quantization: %s range\n", adv7511_rd(sd, 0x18) & 0x80 ? "limited" : "full"); 590 if (adv7511_rd(sd, 0xaf) & 0x02) { 591 /* HDMI only */ 592 u8 manual_cts = adv7511_rd(sd, 0x0a) & 0x80; 593 u32 N = (adv7511_rd(sd, 0x01) & 0xf) << 16 | 594 adv7511_rd(sd, 0x02) << 8 | 595 adv7511_rd(sd, 0x03); 596 u8 vic_detect = adv7511_rd(sd, 0x3e) >> 2; 597 u8 vic_sent = adv7511_rd(sd, 0x3d) & 0x3f; 598 u32 CTS; 599 600 if (manual_cts) 601 CTS = (adv7511_rd(sd, 0x07) & 0xf) << 16 | 602 adv7511_rd(sd, 0x08) << 8 | 603 adv7511_rd(sd, 0x09); 604 else 605 CTS = (adv7511_rd(sd, 0x04) & 0xf) << 16 | 606 adv7511_rd(sd, 0x05) << 8 | 607 adv7511_rd(sd, 0x06); 608 v4l2_info(sd, "CTS %s mode: N %d, CTS %d\n", 609 manual_cts ? "manual" : "automatic", N, CTS); 610 v4l2_info(sd, "VIC: detected %d, sent %d\n", 611 vic_detect, vic_sent); 612 adv7511_log_infoframes(sd); 613 } 614 if (state->dv_timings.type == V4L2_DV_BT_656_1120) 615 v4l2_print_dv_timings(sd->name, "timings: ", 616 &state->dv_timings, false); 617 else 618 v4l2_info(sd, "no timings set\n"); 619 v4l2_info(sd, "i2c edid addr: 0x%x\n", state->i2c_edid_addr); 620 621 if (state->i2c_cec == NULL) 622 return 0; 623 624 v4l2_info(sd, "i2c cec addr: 0x%x\n", state->i2c_cec_addr); 625 626 v4l2_info(sd, "CEC: %s\n", state->cec_enabled_adap ? 627 "enabled" : "disabled"); 628 if (state->cec_enabled_adap) { 629 for (i = 0; i < ADV7511_MAX_ADDRS; i++) { 630 bool is_valid = state->cec_valid_addrs & (1 << i); 631 632 if (is_valid) 633 v4l2_info(sd, "CEC Logical Address: 0x%x\n", 634 state->cec_addr[i]); 635 } 636 } 637 v4l2_info(sd, "i2c pktmem addr: 0x%x\n", state->i2c_pktmem_addr); 638 return 0; 639 } 640 641 /* Power up/down adv7511 */ 642 static int adv7511_s_power(struct v4l2_subdev *sd, int on) 643 { 644 struct adv7511_state *state = get_adv7511_state(sd); 645 const int retries = 20; 646 int i; 647 648 v4l2_dbg(1, debug, sd, "%s: power %s\n", __func__, on ? "on" : "off"); 649 650 state->power_on = on; 651 652 if (!on) { 653 /* Power down */ 654 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40); 655 return true; 656 } 657 658 /* Power up */ 659 /* The adv7511 does not always come up immediately. 660 Retry multiple times. */ 661 for (i = 0; i < retries; i++) { 662 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x0); 663 if ((adv7511_rd(sd, 0x41) & 0x40) == 0) 664 break; 665 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40); 666 msleep(10); 667 } 668 if (i == retries) { 669 v4l2_dbg(1, debug, sd, "%s: failed to powerup the adv7511!\n", __func__); 670 adv7511_s_power(sd, 0); 671 return false; 672 } 673 if (i > 1) 674 v4l2_dbg(1, debug, sd, "%s: needed %d retries to powerup the adv7511\n", __func__, i); 675 676 /* Reserved registers that must be set */ 677 adv7511_wr(sd, 0x98, 0x03); 678 adv7511_wr_and_or(sd, 0x9a, 0xfe, 0x70); 679 adv7511_wr(sd, 0x9c, 0x30); 680 adv7511_wr_and_or(sd, 0x9d, 0xfc, 0x01); 681 adv7511_wr(sd, 0xa2, 0xa4); 682 adv7511_wr(sd, 0xa3, 0xa4); 683 adv7511_wr(sd, 0xe0, 0xd0); 684 adv7511_wr(sd, 0xf9, 0x00); 685 686 adv7511_wr(sd, 0x43, state->i2c_edid_addr); 687 adv7511_wr(sd, 0x45, state->i2c_pktmem_addr); 688 689 /* Set number of attempts to read the EDID */ 690 adv7511_wr(sd, 0xc9, 0xf); 691 return true; 692 } 693 694 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC) 695 static int adv7511_cec_adap_enable(struct cec_adapter *adap, bool enable) 696 { 697 struct adv7511_state *state = cec_get_drvdata(adap); 698 struct v4l2_subdev *sd = &state->sd; 699 700 if (state->i2c_cec == NULL) 701 return -EIO; 702 703 if (!state->cec_enabled_adap && enable) { 704 /* power up cec section */ 705 adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x01); 706 /* legacy mode and clear all rx buffers */ 707 adv7511_cec_write(sd, 0x4a, 0x00); 708 adv7511_cec_write(sd, 0x4a, 0x07); 709 adv7511_cec_write_and_or(sd, 0x11, 0xfe, 0); /* initially disable tx */ 710 /* enabled irqs: */ 711 /* tx: ready */ 712 /* tx: arbitration lost */ 713 /* tx: retry timeout */ 714 /* rx: ready 1 */ 715 if (state->enabled_irq) 716 adv7511_wr_and_or(sd, 0x95, 0xc0, 0x39); 717 } else if (state->cec_enabled_adap && !enable) { 718 if (state->enabled_irq) 719 adv7511_wr_and_or(sd, 0x95, 0xc0, 0x00); 720 /* disable address mask 1-3 */ 721 adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0x00); 722 /* power down cec section */ 723 adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x00); 724 state->cec_valid_addrs = 0; 725 } 726 state->cec_enabled_adap = enable; 727 return 0; 728 } 729 730 static int adv7511_cec_adap_log_addr(struct cec_adapter *adap, u8 addr) 731 { 732 struct adv7511_state *state = cec_get_drvdata(adap); 733 struct v4l2_subdev *sd = &state->sd; 734 unsigned int i, free_idx = ADV7511_MAX_ADDRS; 735 736 if (!state->cec_enabled_adap) 737 return addr == CEC_LOG_ADDR_INVALID ? 0 : -EIO; 738 739 if (addr == CEC_LOG_ADDR_INVALID) { 740 adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0); 741 state->cec_valid_addrs = 0; 742 return 0; 743 } 744 745 for (i = 0; i < ADV7511_MAX_ADDRS; i++) { 746 bool is_valid = state->cec_valid_addrs & (1 << i); 747 748 if (free_idx == ADV7511_MAX_ADDRS && !is_valid) 749 free_idx = i; 750 if (is_valid && state->cec_addr[i] == addr) 751 return 0; 752 } 753 if (i == ADV7511_MAX_ADDRS) { 754 i = free_idx; 755 if (i == ADV7511_MAX_ADDRS) 756 return -ENXIO; 757 } 758 state->cec_addr[i] = addr; 759 state->cec_valid_addrs |= 1 << i; 760 761 switch (i) { 762 case 0: 763 /* enable address mask 0 */ 764 adv7511_cec_write_and_or(sd, 0x4b, 0xef, 0x10); 765 /* set address for mask 0 */ 766 adv7511_cec_write_and_or(sd, 0x4c, 0xf0, addr); 767 break; 768 case 1: 769 /* enable address mask 1 */ 770 adv7511_cec_write_and_or(sd, 0x4b, 0xdf, 0x20); 771 /* set address for mask 1 */ 772 adv7511_cec_write_and_or(sd, 0x4c, 0x0f, addr << 4); 773 break; 774 case 2: 775 /* enable address mask 2 */ 776 adv7511_cec_write_and_or(sd, 0x4b, 0xbf, 0x40); 777 /* set address for mask 1 */ 778 adv7511_cec_write_and_or(sd, 0x4d, 0xf0, addr); 779 break; 780 } 781 return 0; 782 } 783 784 static int adv7511_cec_adap_transmit(struct cec_adapter *adap, u8 attempts, 785 u32 signal_free_time, struct cec_msg *msg) 786 { 787 struct adv7511_state *state = cec_get_drvdata(adap); 788 struct v4l2_subdev *sd = &state->sd; 789 u8 len = msg->len; 790 unsigned int i; 791 792 v4l2_dbg(1, debug, sd, "%s: len %d\n", __func__, len); 793 794 if (len > 16) { 795 v4l2_err(sd, "%s: len exceeded 16 (%d)\n", __func__, len); 796 return -EINVAL; 797 } 798 799 /* 800 * The number of retries is the number of attempts - 1, but retry 801 * at least once. It's not clear if a value of 0 is allowed, so 802 * let's do at least one retry. 803 */ 804 adv7511_cec_write_and_or(sd, 0x12, ~0x70, max(1, attempts - 1) << 4); 805 806 /* clear cec tx irq status */ 807 adv7511_wr(sd, 0x97, 0x38); 808 809 /* write data */ 810 for (i = 0; i < len; i++) 811 adv7511_cec_write(sd, i, msg->msg[i]); 812 813 /* set length (data + header) */ 814 adv7511_cec_write(sd, 0x10, len); 815 /* start transmit, enable tx */ 816 adv7511_cec_write(sd, 0x11, 0x01); 817 return 0; 818 } 819 820 static void adv_cec_tx_raw_status(struct v4l2_subdev *sd, u8 tx_raw_status) 821 { 822 struct adv7511_state *state = get_adv7511_state(sd); 823 824 if ((adv7511_cec_read(sd, 0x11) & 0x01) == 0) { 825 v4l2_dbg(1, debug, sd, "%s: tx raw: tx disabled\n", __func__); 826 return; 827 } 828 829 if (tx_raw_status & 0x10) { 830 v4l2_dbg(1, debug, sd, 831 "%s: tx raw: arbitration lost\n", __func__); 832 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_ARB_LOST, 833 1, 0, 0, 0); 834 return; 835 } 836 if (tx_raw_status & 0x08) { 837 u8 status; 838 u8 nack_cnt; 839 u8 low_drive_cnt; 840 841 v4l2_dbg(1, debug, sd, "%s: tx raw: retry failed\n", __func__); 842 /* 843 * We set this status bit since this hardware performs 844 * retransmissions. 845 */ 846 status = CEC_TX_STATUS_MAX_RETRIES; 847 nack_cnt = adv7511_cec_read(sd, 0x14) & 0xf; 848 if (nack_cnt) 849 status |= CEC_TX_STATUS_NACK; 850 low_drive_cnt = adv7511_cec_read(sd, 0x14) >> 4; 851 if (low_drive_cnt) 852 status |= CEC_TX_STATUS_LOW_DRIVE; 853 cec_transmit_done(state->cec_adap, status, 854 0, nack_cnt, low_drive_cnt, 0); 855 return; 856 } 857 if (tx_raw_status & 0x20) { 858 v4l2_dbg(1, debug, sd, "%s: tx raw: ready ok\n", __func__); 859 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_OK, 0, 0, 0, 0); 860 return; 861 } 862 } 863 864 static const struct cec_adap_ops adv7511_cec_adap_ops = { 865 .adap_enable = adv7511_cec_adap_enable, 866 .adap_log_addr = adv7511_cec_adap_log_addr, 867 .adap_transmit = adv7511_cec_adap_transmit, 868 }; 869 #endif 870 871 /* Enable interrupts */ 872 static void adv7511_set_isr(struct v4l2_subdev *sd, bool enable) 873 { 874 struct adv7511_state *state = get_adv7511_state(sd); 875 u8 irqs = MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT; 876 u8 irqs_rd; 877 int retries = 100; 878 879 v4l2_dbg(2, debug, sd, "%s: %s\n", __func__, enable ? "enable" : "disable"); 880 881 if (state->enabled_irq == enable) 882 return; 883 state->enabled_irq = enable; 884 885 /* The datasheet says that the EDID ready interrupt should be 886 disabled if there is no hotplug. */ 887 if (!enable) 888 irqs = 0; 889 else if (adv7511_have_hotplug(sd)) 890 irqs |= MASK_ADV7511_EDID_RDY_INT; 891 892 /* 893 * This i2c write can fail (approx. 1 in 1000 writes). But it 894 * is essential that this register is correct, so retry it 895 * multiple times. 896 * 897 * Note that the i2c write does not report an error, but the readback 898 * clearly shows the wrong value. 899 */ 900 do { 901 adv7511_wr(sd, 0x94, irqs); 902 irqs_rd = adv7511_rd(sd, 0x94); 903 } while (retries-- && irqs_rd != irqs); 904 905 if (irqs_rd != irqs) 906 v4l2_err(sd, "Could not set interrupts: hw failure?\n"); 907 908 adv7511_wr_and_or(sd, 0x95, 0xc0, 909 (state->cec_enabled_adap && enable) ? 0x39 : 0x00); 910 } 911 912 /* Interrupt handler */ 913 static int adv7511_isr(struct v4l2_subdev *sd, u32 status, bool *handled) 914 { 915 u8 irq_status; 916 u8 cec_irq; 917 918 /* disable interrupts to prevent a race condition */ 919 adv7511_set_isr(sd, false); 920 irq_status = adv7511_rd(sd, 0x96); 921 cec_irq = adv7511_rd(sd, 0x97); 922 /* clear detected interrupts */ 923 adv7511_wr(sd, 0x96, irq_status); 924 adv7511_wr(sd, 0x97, cec_irq); 925 926 v4l2_dbg(1, debug, sd, "%s: irq 0x%x, cec-irq 0x%x\n", __func__, 927 irq_status, cec_irq); 928 929 if (irq_status & (MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT)) 930 adv7511_check_monitor_present_status(sd); 931 if (irq_status & MASK_ADV7511_EDID_RDY_INT) 932 adv7511_check_edid_status(sd); 933 934 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC) 935 if (cec_irq & 0x38) 936 adv_cec_tx_raw_status(sd, cec_irq); 937 938 if (cec_irq & 1) { 939 struct adv7511_state *state = get_adv7511_state(sd); 940 struct cec_msg msg; 941 942 msg.len = adv7511_cec_read(sd, 0x25) & 0x1f; 943 944 v4l2_dbg(1, debug, sd, "%s: cec msg len %d\n", __func__, 945 msg.len); 946 947 if (msg.len > 16) 948 msg.len = 16; 949 950 if (msg.len) { 951 u8 i; 952 953 for (i = 0; i < msg.len; i++) 954 msg.msg[i] = adv7511_cec_read(sd, i + 0x15); 955 956 adv7511_cec_write(sd, 0x4a, 0); /* toggle to re-enable rx 1 */ 957 adv7511_cec_write(sd, 0x4a, 1); 958 cec_received_msg(state->cec_adap, &msg); 959 } 960 } 961 #endif 962 963 /* enable interrupts */ 964 adv7511_set_isr(sd, true); 965 966 if (handled) 967 *handled = true; 968 return 0; 969 } 970 971 static const struct v4l2_subdev_core_ops adv7511_core_ops = { 972 .log_status = adv7511_log_status, 973 #ifdef CONFIG_VIDEO_ADV_DEBUG 974 .g_register = adv7511_g_register, 975 .s_register = adv7511_s_register, 976 #endif 977 .s_power = adv7511_s_power, 978 .interrupt_service_routine = adv7511_isr, 979 }; 980 981 /* ------------------------------ VIDEO OPS ------------------------------ */ 982 983 /* Enable/disable adv7511 output */ 984 static int adv7511_s_stream(struct v4l2_subdev *sd, int enable) 985 { 986 struct adv7511_state *state = get_adv7511_state(sd); 987 988 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis")); 989 adv7511_wr_and_or(sd, 0xa1, ~0x3c, (enable ? 0 : 0x3c)); 990 if (enable) { 991 adv7511_check_monitor_present_status(sd); 992 } else { 993 adv7511_s_power(sd, 0); 994 state->have_monitor = false; 995 } 996 return 0; 997 } 998 999 static int adv7511_s_dv_timings(struct v4l2_subdev *sd, 1000 struct v4l2_dv_timings *timings) 1001 { 1002 struct adv7511_state *state = get_adv7511_state(sd); 1003 struct v4l2_bt_timings *bt = &timings->bt; 1004 u32 fps; 1005 1006 v4l2_dbg(1, debug, sd, "%s:\n", __func__); 1007 1008 /* quick sanity check */ 1009 if (!v4l2_valid_dv_timings(timings, &adv7511_timings_cap, NULL, NULL)) 1010 return -EINVAL; 1011 1012 /* Fill the optional fields .standards and .flags in struct v4l2_dv_timings 1013 if the format is one of the CEA or DMT timings. */ 1014 v4l2_find_dv_timings_cap(timings, &adv7511_timings_cap, 0, NULL, NULL); 1015 1016 /* save timings */ 1017 state->dv_timings = *timings; 1018 1019 /* set h/vsync polarities */ 1020 adv7511_wr_and_or(sd, 0x17, 0x9f, 1021 ((bt->polarities & V4L2_DV_VSYNC_POS_POL) ? 0 : 0x40) | 1022 ((bt->polarities & V4L2_DV_HSYNC_POS_POL) ? 0 : 0x20)); 1023 1024 fps = (u32)bt->pixelclock / (V4L2_DV_BT_FRAME_WIDTH(bt) * V4L2_DV_BT_FRAME_HEIGHT(bt)); 1025 switch (fps) { 1026 case 24: 1027 adv7511_wr_and_or(sd, 0xfb, 0xf9, 1 << 1); 1028 break; 1029 case 25: 1030 adv7511_wr_and_or(sd, 0xfb, 0xf9, 2 << 1); 1031 break; 1032 case 30: 1033 adv7511_wr_and_or(sd, 0xfb, 0xf9, 3 << 1); 1034 break; 1035 default: 1036 adv7511_wr_and_or(sd, 0xfb, 0xf9, 0); 1037 break; 1038 } 1039 1040 /* update quantization range based on new dv_timings */ 1041 adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl); 1042 1043 return 0; 1044 } 1045 1046 static int adv7511_g_dv_timings(struct v4l2_subdev *sd, 1047 struct v4l2_dv_timings *timings) 1048 { 1049 struct adv7511_state *state = get_adv7511_state(sd); 1050 1051 v4l2_dbg(1, debug, sd, "%s:\n", __func__); 1052 1053 if (!timings) 1054 return -EINVAL; 1055 1056 *timings = state->dv_timings; 1057 1058 return 0; 1059 } 1060 1061 static int adv7511_enum_dv_timings(struct v4l2_subdev *sd, 1062 struct v4l2_enum_dv_timings *timings) 1063 { 1064 if (timings->pad != 0) 1065 return -EINVAL; 1066 1067 return v4l2_enum_dv_timings_cap(timings, &adv7511_timings_cap, NULL, NULL); 1068 } 1069 1070 static int adv7511_dv_timings_cap(struct v4l2_subdev *sd, 1071 struct v4l2_dv_timings_cap *cap) 1072 { 1073 if (cap->pad != 0) 1074 return -EINVAL; 1075 1076 *cap = adv7511_timings_cap; 1077 return 0; 1078 } 1079 1080 static const struct v4l2_subdev_video_ops adv7511_video_ops = { 1081 .s_stream = adv7511_s_stream, 1082 .s_dv_timings = adv7511_s_dv_timings, 1083 .g_dv_timings = adv7511_g_dv_timings, 1084 }; 1085 1086 /* ------------------------------ AUDIO OPS ------------------------------ */ 1087 static int adv7511_s_audio_stream(struct v4l2_subdev *sd, int enable) 1088 { 1089 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis")); 1090 1091 if (enable) 1092 adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x80); 1093 else 1094 adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x40); 1095 1096 return 0; 1097 } 1098 1099 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq) 1100 { 1101 u32 N; 1102 1103 switch (freq) { 1104 case 32000: N = 4096; break; 1105 case 44100: N = 6272; break; 1106 case 48000: N = 6144; break; 1107 case 88200: N = 12544; break; 1108 case 96000: N = 12288; break; 1109 case 176400: N = 25088; break; 1110 case 192000: N = 24576; break; 1111 default: 1112 return -EINVAL; 1113 } 1114 1115 /* Set N (used with CTS to regenerate the audio clock) */ 1116 adv7511_wr(sd, 0x01, (N >> 16) & 0xf); 1117 adv7511_wr(sd, 0x02, (N >> 8) & 0xff); 1118 adv7511_wr(sd, 0x03, N & 0xff); 1119 1120 return 0; 1121 } 1122 1123 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq) 1124 { 1125 u32 i2s_sf; 1126 1127 switch (freq) { 1128 case 32000: i2s_sf = 0x30; break; 1129 case 44100: i2s_sf = 0x00; break; 1130 case 48000: i2s_sf = 0x20; break; 1131 case 88200: i2s_sf = 0x80; break; 1132 case 96000: i2s_sf = 0xa0; break; 1133 case 176400: i2s_sf = 0xc0; break; 1134 case 192000: i2s_sf = 0xe0; break; 1135 default: 1136 return -EINVAL; 1137 } 1138 1139 /* Set sampling frequency for I2S audio to 48 kHz */ 1140 adv7511_wr_and_or(sd, 0x15, 0xf, i2s_sf); 1141 1142 return 0; 1143 } 1144 1145 static int adv7511_s_routing(struct v4l2_subdev *sd, u32 input, u32 output, u32 config) 1146 { 1147 /* Only 2 channels in use for application */ 1148 adv7511_wr_and_or(sd, 0x73, 0xf8, 0x1); 1149 /* Speaker mapping */ 1150 adv7511_wr(sd, 0x76, 0x00); 1151 1152 /* 16 bit audio word length */ 1153 adv7511_wr_and_or(sd, 0x14, 0xf0, 0x02); 1154 1155 return 0; 1156 } 1157 1158 static const struct v4l2_subdev_audio_ops adv7511_audio_ops = { 1159 .s_stream = adv7511_s_audio_stream, 1160 .s_clock_freq = adv7511_s_clock_freq, 1161 .s_i2s_clock_freq = adv7511_s_i2s_clock_freq, 1162 .s_routing = adv7511_s_routing, 1163 }; 1164 1165 /* ---------------------------- PAD OPS ------------------------------------- */ 1166 1167 static int adv7511_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid) 1168 { 1169 struct adv7511_state *state = get_adv7511_state(sd); 1170 1171 memset(edid->reserved, 0, sizeof(edid->reserved)); 1172 1173 if (edid->pad != 0) 1174 return -EINVAL; 1175 1176 if (edid->start_block == 0 && edid->blocks == 0) { 1177 edid->blocks = state->edid.blocks; 1178 return 0; 1179 } 1180 1181 if (state->edid.blocks == 0) 1182 return -ENODATA; 1183 1184 if (edid->start_block >= state->edid.blocks) 1185 return -EINVAL; 1186 1187 if (edid->start_block + edid->blocks > state->edid.blocks) 1188 edid->blocks = state->edid.blocks - edid->start_block; 1189 1190 memcpy(edid->edid, &state->edid.data[edid->start_block * 128], 1191 128 * edid->blocks); 1192 1193 return 0; 1194 } 1195 1196 static int adv7511_enum_mbus_code(struct v4l2_subdev *sd, 1197 struct v4l2_subdev_state *sd_state, 1198 struct v4l2_subdev_mbus_code_enum *code) 1199 { 1200 if (code->pad != 0) 1201 return -EINVAL; 1202 1203 switch (code->index) { 1204 case 0: 1205 code->code = MEDIA_BUS_FMT_RGB888_1X24; 1206 break; 1207 case 1: 1208 code->code = MEDIA_BUS_FMT_YUYV8_1X16; 1209 break; 1210 case 2: 1211 code->code = MEDIA_BUS_FMT_UYVY8_1X16; 1212 break; 1213 default: 1214 return -EINVAL; 1215 } 1216 return 0; 1217 } 1218 1219 static void adv7511_fill_format(struct adv7511_state *state, 1220 struct v4l2_mbus_framefmt *format) 1221 { 1222 format->width = state->dv_timings.bt.width; 1223 format->height = state->dv_timings.bt.height; 1224 format->field = V4L2_FIELD_NONE; 1225 } 1226 1227 static int adv7511_get_fmt(struct v4l2_subdev *sd, 1228 struct v4l2_subdev_state *sd_state, 1229 struct v4l2_subdev_format *format) 1230 { 1231 struct adv7511_state *state = get_adv7511_state(sd); 1232 1233 if (format->pad != 0) 1234 return -EINVAL; 1235 1236 memset(&format->format, 0, sizeof(format->format)); 1237 adv7511_fill_format(state, &format->format); 1238 1239 if (format->which == V4L2_SUBDEV_FORMAT_TRY) { 1240 struct v4l2_mbus_framefmt *fmt; 1241 1242 fmt = v4l2_subdev_get_try_format(sd, sd_state, format->pad); 1243 format->format.code = fmt->code; 1244 format->format.colorspace = fmt->colorspace; 1245 format->format.ycbcr_enc = fmt->ycbcr_enc; 1246 format->format.quantization = fmt->quantization; 1247 format->format.xfer_func = fmt->xfer_func; 1248 } else { 1249 format->format.code = state->fmt_code; 1250 format->format.colorspace = state->colorspace; 1251 format->format.ycbcr_enc = state->ycbcr_enc; 1252 format->format.quantization = state->quantization; 1253 format->format.xfer_func = state->xfer_func; 1254 } 1255 1256 return 0; 1257 } 1258 1259 static int adv7511_set_fmt(struct v4l2_subdev *sd, 1260 struct v4l2_subdev_state *sd_state, 1261 struct v4l2_subdev_format *format) 1262 { 1263 struct adv7511_state *state = get_adv7511_state(sd); 1264 /* 1265 * Bitfield namings come the CEA-861-F standard, table 8 "Auxiliary 1266 * Video Information (AVI) InfoFrame Format" 1267 * 1268 * c = Colorimetry 1269 * ec = Extended Colorimetry 1270 * y = RGB or YCbCr 1271 * q = RGB Quantization Range 1272 * yq = YCC Quantization Range 1273 */ 1274 u8 c = HDMI_COLORIMETRY_NONE; 1275 u8 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601; 1276 u8 y = HDMI_COLORSPACE_RGB; 1277 u8 q = HDMI_QUANTIZATION_RANGE_DEFAULT; 1278 u8 yq = HDMI_YCC_QUANTIZATION_RANGE_LIMITED; 1279 u8 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC; 1280 u8 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS; 1281 1282 if (format->pad != 0) 1283 return -EINVAL; 1284 switch (format->format.code) { 1285 case MEDIA_BUS_FMT_UYVY8_1X16: 1286 case MEDIA_BUS_FMT_YUYV8_1X16: 1287 case MEDIA_BUS_FMT_RGB888_1X24: 1288 break; 1289 default: 1290 return -EINVAL; 1291 } 1292 1293 adv7511_fill_format(state, &format->format); 1294 if (format->which == V4L2_SUBDEV_FORMAT_TRY) { 1295 struct v4l2_mbus_framefmt *fmt; 1296 1297 fmt = v4l2_subdev_get_try_format(sd, sd_state, format->pad); 1298 fmt->code = format->format.code; 1299 fmt->colorspace = format->format.colorspace; 1300 fmt->ycbcr_enc = format->format.ycbcr_enc; 1301 fmt->quantization = format->format.quantization; 1302 fmt->xfer_func = format->format.xfer_func; 1303 return 0; 1304 } 1305 1306 switch (format->format.code) { 1307 case MEDIA_BUS_FMT_UYVY8_1X16: 1308 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01); 1309 adv7511_wr_and_or(sd, 0x16, 0x03, 0xb8); 1310 y = HDMI_COLORSPACE_YUV422; 1311 break; 1312 case MEDIA_BUS_FMT_YUYV8_1X16: 1313 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01); 1314 adv7511_wr_and_or(sd, 0x16, 0x03, 0xbc); 1315 y = HDMI_COLORSPACE_YUV422; 1316 break; 1317 case MEDIA_BUS_FMT_RGB888_1X24: 1318 default: 1319 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x00); 1320 adv7511_wr_and_or(sd, 0x16, 0x03, 0x00); 1321 break; 1322 } 1323 state->fmt_code = format->format.code; 1324 state->colorspace = format->format.colorspace; 1325 state->ycbcr_enc = format->format.ycbcr_enc; 1326 state->quantization = format->format.quantization; 1327 state->xfer_func = format->format.xfer_func; 1328 1329 switch (format->format.colorspace) { 1330 case V4L2_COLORSPACE_OPRGB: 1331 c = HDMI_COLORIMETRY_EXTENDED; 1332 ec = y ? HDMI_EXTENDED_COLORIMETRY_OPYCC_601 : 1333 HDMI_EXTENDED_COLORIMETRY_OPRGB; 1334 break; 1335 case V4L2_COLORSPACE_SMPTE170M: 1336 c = y ? HDMI_COLORIMETRY_ITU_601 : HDMI_COLORIMETRY_NONE; 1337 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV601) { 1338 c = HDMI_COLORIMETRY_EXTENDED; 1339 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601; 1340 } 1341 break; 1342 case V4L2_COLORSPACE_REC709: 1343 c = y ? HDMI_COLORIMETRY_ITU_709 : HDMI_COLORIMETRY_NONE; 1344 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV709) { 1345 c = HDMI_COLORIMETRY_EXTENDED; 1346 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_709; 1347 } 1348 break; 1349 case V4L2_COLORSPACE_SRGB: 1350 c = y ? HDMI_COLORIMETRY_EXTENDED : HDMI_COLORIMETRY_NONE; 1351 ec = y ? HDMI_EXTENDED_COLORIMETRY_S_YCC_601 : 1352 HDMI_EXTENDED_COLORIMETRY_XV_YCC_601; 1353 break; 1354 case V4L2_COLORSPACE_BT2020: 1355 c = HDMI_COLORIMETRY_EXTENDED; 1356 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_BT2020_CONST_LUM) 1357 ec = 5; /* Not yet available in hdmi.h */ 1358 else 1359 ec = 6; /* Not yet available in hdmi.h */ 1360 break; 1361 default: 1362 break; 1363 } 1364 1365 /* 1366 * CEA-861-F says that for RGB formats the YCC range must match the 1367 * RGB range, although sources should ignore the YCC range. 1368 * 1369 * The RGB quantization range shouldn't be non-zero if the EDID doesn't 1370 * have the Q bit set in the Video Capabilities Data Block, however this 1371 * isn't checked at the moment. The assumption is that the application 1372 * knows the EDID and can detect this. 1373 * 1374 * The same is true for the YCC quantization range: non-standard YCC 1375 * quantization ranges should only be sent if the EDID has the YQ bit 1376 * set in the Video Capabilities Data Block. 1377 */ 1378 switch (format->format.quantization) { 1379 case V4L2_QUANTIZATION_FULL_RANGE: 1380 q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT : 1381 HDMI_QUANTIZATION_RANGE_FULL; 1382 yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_FULL; 1383 break; 1384 case V4L2_QUANTIZATION_LIM_RANGE: 1385 q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT : 1386 HDMI_QUANTIZATION_RANGE_LIMITED; 1387 yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_LIMITED; 1388 break; 1389 } 1390 1391 adv7511_wr_and_or(sd, 0x4a, 0xbf, 0); 1392 adv7511_wr_and_or(sd, 0x55, 0x9f, y << 5); 1393 adv7511_wr_and_or(sd, 0x56, 0x3f, c << 6); 1394 adv7511_wr_and_or(sd, 0x57, 0x83, (ec << 4) | (q << 2) | (itc << 7)); 1395 adv7511_wr_and_or(sd, 0x59, 0x0f, (yq << 6) | (cn << 4)); 1396 adv7511_wr_and_or(sd, 0x4a, 0xff, 1); 1397 adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl); 1398 1399 return 0; 1400 } 1401 1402 static const struct v4l2_subdev_pad_ops adv7511_pad_ops = { 1403 .get_edid = adv7511_get_edid, 1404 .enum_mbus_code = adv7511_enum_mbus_code, 1405 .get_fmt = adv7511_get_fmt, 1406 .set_fmt = adv7511_set_fmt, 1407 .enum_dv_timings = adv7511_enum_dv_timings, 1408 .dv_timings_cap = adv7511_dv_timings_cap, 1409 }; 1410 1411 /* --------------------- SUBDEV OPS --------------------------------------- */ 1412 1413 static const struct v4l2_subdev_ops adv7511_ops = { 1414 .core = &adv7511_core_ops, 1415 .pad = &adv7511_pad_ops, 1416 .video = &adv7511_video_ops, 1417 .audio = &adv7511_audio_ops, 1418 }; 1419 1420 /* ----------------------------------------------------------------------- */ 1421 static void adv7511_dbg_dump_edid(int lvl, int debug, struct v4l2_subdev *sd, int segment, u8 *buf) 1422 { 1423 if (debug >= lvl) { 1424 int i, j; 1425 v4l2_dbg(lvl, debug, sd, "edid segment %d\n", segment); 1426 for (i = 0; i < 256; i += 16) { 1427 u8 b[128]; 1428 u8 *bp = b; 1429 if (i == 128) 1430 v4l2_dbg(lvl, debug, sd, "\n"); 1431 for (j = i; j < i + 16; j++) { 1432 sprintf(bp, "0x%02x, ", buf[j]); 1433 bp += 6; 1434 } 1435 bp[0] = '\0'; 1436 v4l2_dbg(lvl, debug, sd, "%s\n", b); 1437 } 1438 } 1439 } 1440 1441 static void adv7511_notify_no_edid(struct v4l2_subdev *sd) 1442 { 1443 struct adv7511_state *state = get_adv7511_state(sd); 1444 struct adv7511_edid_detect ed; 1445 1446 /* We failed to read the EDID, so send an event for this. */ 1447 ed.present = false; 1448 ed.segment = adv7511_rd(sd, 0xc4); 1449 ed.phys_addr = CEC_PHYS_ADDR_INVALID; 1450 cec_s_phys_addr(state->cec_adap, ed.phys_addr, false); 1451 v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed); 1452 v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x0); 1453 } 1454 1455 static void adv7511_edid_handler(struct work_struct *work) 1456 { 1457 struct delayed_work *dwork = to_delayed_work(work); 1458 struct adv7511_state *state = container_of(dwork, struct adv7511_state, edid_handler); 1459 struct v4l2_subdev *sd = &state->sd; 1460 1461 v4l2_dbg(1, debug, sd, "%s:\n", __func__); 1462 1463 if (adv7511_check_edid_status(sd)) { 1464 /* Return if we received the EDID. */ 1465 return; 1466 } 1467 1468 if (adv7511_have_hotplug(sd)) { 1469 /* We must retry reading the EDID several times, it is possible 1470 * that initially the EDID couldn't be read due to i2c errors 1471 * (DVI connectors are particularly prone to this problem). */ 1472 if (state->edid.read_retries) { 1473 state->edid.read_retries--; 1474 v4l2_dbg(1, debug, sd, "%s: edid read failed\n", __func__); 1475 state->have_monitor = false; 1476 adv7511_s_power(sd, false); 1477 adv7511_s_power(sd, true); 1478 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY); 1479 return; 1480 } 1481 } 1482 1483 /* We failed to read the EDID, so send an event for this. */ 1484 adv7511_notify_no_edid(sd); 1485 v4l2_dbg(1, debug, sd, "%s: no edid found\n", __func__); 1486 } 1487 1488 static void adv7511_audio_setup(struct v4l2_subdev *sd) 1489 { 1490 v4l2_dbg(1, debug, sd, "%s\n", __func__); 1491 1492 adv7511_s_i2s_clock_freq(sd, 48000); 1493 adv7511_s_clock_freq(sd, 48000); 1494 adv7511_s_routing(sd, 0, 0, 0); 1495 } 1496 1497 /* Configure hdmi transmitter. */ 1498 static void adv7511_setup(struct v4l2_subdev *sd) 1499 { 1500 struct adv7511_state *state = get_adv7511_state(sd); 1501 v4l2_dbg(1, debug, sd, "%s\n", __func__); 1502 1503 /* Input format: RGB 4:4:4 */ 1504 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x0); 1505 /* Output format: RGB 4:4:4 */ 1506 adv7511_wr_and_or(sd, 0x16, 0x7f, 0x0); 1507 /* 1st order interpolation 4:2:2 -> 4:4:4 up conversion, Aspect ratio: 16:9 */ 1508 adv7511_wr_and_or(sd, 0x17, 0xf9, 0x06); 1509 /* Disable pixel repetition */ 1510 adv7511_wr_and_or(sd, 0x3b, 0x9f, 0x0); 1511 /* Disable CSC */ 1512 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0); 1513 /* Output format: RGB 4:4:4, Active Format Information is valid, 1514 * underscanned */ 1515 adv7511_wr_and_or(sd, 0x55, 0x9c, 0x12); 1516 /* AVI Info frame packet enable, Audio Info frame disable */ 1517 adv7511_wr_and_or(sd, 0x44, 0xe7, 0x10); 1518 /* Colorimetry, Active format aspect ratio: same as picure. */ 1519 adv7511_wr(sd, 0x56, 0xa8); 1520 /* No encryption */ 1521 adv7511_wr_and_or(sd, 0xaf, 0xed, 0x0); 1522 1523 /* Positive clk edge capture for input video clock */ 1524 adv7511_wr_and_or(sd, 0xba, 0x1f, 0x60); 1525 1526 adv7511_audio_setup(sd); 1527 1528 v4l2_ctrl_handler_setup(&state->hdl); 1529 } 1530 1531 static void adv7511_notify_monitor_detect(struct v4l2_subdev *sd) 1532 { 1533 struct adv7511_monitor_detect mdt; 1534 struct adv7511_state *state = get_adv7511_state(sd); 1535 1536 mdt.present = state->have_monitor; 1537 v4l2_subdev_notify(sd, ADV7511_MONITOR_DETECT, (void *)&mdt); 1538 } 1539 1540 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd) 1541 { 1542 struct adv7511_state *state = get_adv7511_state(sd); 1543 /* read hotplug and rx-sense state */ 1544 u8 status = adv7511_rd(sd, 0x42); 1545 1546 v4l2_dbg(1, debug, sd, "%s: status: 0x%x%s%s\n", 1547 __func__, 1548 status, 1549 status & MASK_ADV7511_HPD_DETECT ? ", hotplug" : "", 1550 status & MASK_ADV7511_MSEN_DETECT ? ", rx-sense" : ""); 1551 1552 /* update read only ctrls */ 1553 v4l2_ctrl_s_ctrl(state->hotplug_ctrl, adv7511_have_hotplug(sd) ? 0x1 : 0x0); 1554 v4l2_ctrl_s_ctrl(state->rx_sense_ctrl, adv7511_have_rx_sense(sd) ? 0x1 : 0x0); 1555 1556 if ((status & MASK_ADV7511_HPD_DETECT) && ((status & MASK_ADV7511_MSEN_DETECT) || state->edid.segments)) { 1557 v4l2_dbg(1, debug, sd, "%s: hotplug and (rx-sense or edid)\n", __func__); 1558 if (!state->have_monitor) { 1559 v4l2_dbg(1, debug, sd, "%s: monitor detected\n", __func__); 1560 state->have_monitor = true; 1561 adv7511_set_isr(sd, true); 1562 if (!adv7511_s_power(sd, true)) { 1563 v4l2_dbg(1, debug, sd, "%s: monitor detected, powerup failed\n", __func__); 1564 return; 1565 } 1566 adv7511_setup(sd); 1567 adv7511_notify_monitor_detect(sd); 1568 state->edid.read_retries = EDID_MAX_RETRIES; 1569 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY); 1570 } 1571 } else if (status & MASK_ADV7511_HPD_DETECT) { 1572 v4l2_dbg(1, debug, sd, "%s: hotplug detected\n", __func__); 1573 state->edid.read_retries = EDID_MAX_RETRIES; 1574 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY); 1575 } else if (!(status & MASK_ADV7511_HPD_DETECT)) { 1576 v4l2_dbg(1, debug, sd, "%s: hotplug not detected\n", __func__); 1577 if (state->have_monitor) { 1578 v4l2_dbg(1, debug, sd, "%s: monitor not detected\n", __func__); 1579 state->have_monitor = false; 1580 adv7511_notify_monitor_detect(sd); 1581 } 1582 adv7511_s_power(sd, false); 1583 memset(&state->edid, 0, sizeof(struct adv7511_state_edid)); 1584 adv7511_notify_no_edid(sd); 1585 } 1586 } 1587 1588 static bool edid_block_verify_crc(u8 *edid_block) 1589 { 1590 u8 sum = 0; 1591 int i; 1592 1593 for (i = 0; i < 128; i++) 1594 sum += edid_block[i]; 1595 return sum == 0; 1596 } 1597 1598 static bool edid_verify_crc(struct v4l2_subdev *sd, u32 segment) 1599 { 1600 struct adv7511_state *state = get_adv7511_state(sd); 1601 u32 blocks = state->edid.blocks; 1602 u8 *data = state->edid.data; 1603 1604 if (!edid_block_verify_crc(&data[segment * 256])) 1605 return false; 1606 if ((segment + 1) * 2 <= blocks) 1607 return edid_block_verify_crc(&data[segment * 256 + 128]); 1608 return true; 1609 } 1610 1611 static bool edid_verify_header(struct v4l2_subdev *sd, u32 segment) 1612 { 1613 static const u8 hdmi_header[] = { 1614 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 1615 }; 1616 struct adv7511_state *state = get_adv7511_state(sd); 1617 u8 *data = state->edid.data; 1618 1619 if (segment != 0) 1620 return true; 1621 return !memcmp(data, hdmi_header, sizeof(hdmi_header)); 1622 } 1623 1624 static bool adv7511_check_edid_status(struct v4l2_subdev *sd) 1625 { 1626 struct adv7511_state *state = get_adv7511_state(sd); 1627 u8 edidRdy = adv7511_rd(sd, 0xc5); 1628 1629 v4l2_dbg(1, debug, sd, "%s: edid ready (retries: %d)\n", 1630 __func__, EDID_MAX_RETRIES - state->edid.read_retries); 1631 1632 if (state->edid.complete) 1633 return true; 1634 1635 if (edidRdy & MASK_ADV7511_EDID_RDY) { 1636 int segment = adv7511_rd(sd, 0xc4); 1637 struct adv7511_edid_detect ed; 1638 int err; 1639 1640 if (segment >= EDID_MAX_SEGM) { 1641 v4l2_err(sd, "edid segment number too big\n"); 1642 return false; 1643 } 1644 v4l2_dbg(1, debug, sd, "%s: got segment %d\n", __func__, segment); 1645 err = adv7511_edid_rd(sd, 256, &state->edid.data[segment * 256]); 1646 if (!err) { 1647 adv7511_dbg_dump_edid(2, debug, sd, segment, &state->edid.data[segment * 256]); 1648 if (segment == 0) { 1649 state->edid.blocks = state->edid.data[0x7e] + 1; 1650 v4l2_dbg(1, debug, sd, "%s: %d blocks in total\n", 1651 __func__, state->edid.blocks); 1652 } 1653 } 1654 1655 if (err || !edid_verify_crc(sd, segment) || !edid_verify_header(sd, segment)) { 1656 /* Couldn't read EDID or EDID is invalid. Force retry! */ 1657 if (!err) 1658 v4l2_err(sd, "%s: edid crc or header error\n", __func__); 1659 state->have_monitor = false; 1660 adv7511_s_power(sd, false); 1661 adv7511_s_power(sd, true); 1662 return false; 1663 } 1664 /* one more segment read ok */ 1665 state->edid.segments = segment + 1; 1666 v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x1); 1667 if (((state->edid.data[0x7e] >> 1) + 1) > state->edid.segments) { 1668 /* Request next EDID segment */ 1669 v4l2_dbg(1, debug, sd, "%s: request segment %d\n", __func__, state->edid.segments); 1670 adv7511_wr(sd, 0xc9, 0xf); 1671 adv7511_wr(sd, 0xc4, state->edid.segments); 1672 state->edid.read_retries = EDID_MAX_RETRIES; 1673 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY); 1674 return false; 1675 } 1676 1677 v4l2_dbg(1, debug, sd, "%s: edid complete with %d segment(s)\n", __func__, state->edid.segments); 1678 state->edid.complete = true; 1679 ed.phys_addr = cec_get_edid_phys_addr(state->edid.data, 1680 state->edid.segments * 256, 1681 NULL); 1682 /* report when we have all segments 1683 but report only for segment 0 1684 */ 1685 ed.present = true; 1686 ed.segment = 0; 1687 state->edid_detect_counter++; 1688 cec_s_phys_addr(state->cec_adap, ed.phys_addr, false); 1689 v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed); 1690 return ed.present; 1691 } 1692 1693 return false; 1694 } 1695 1696 static int adv7511_registered(struct v4l2_subdev *sd) 1697 { 1698 struct adv7511_state *state = get_adv7511_state(sd); 1699 struct i2c_client *client = v4l2_get_subdevdata(sd); 1700 int err; 1701 1702 err = cec_register_adapter(state->cec_adap, &client->dev); 1703 if (err) 1704 cec_delete_adapter(state->cec_adap); 1705 return err; 1706 } 1707 1708 static void adv7511_unregistered(struct v4l2_subdev *sd) 1709 { 1710 struct adv7511_state *state = get_adv7511_state(sd); 1711 1712 cec_unregister_adapter(state->cec_adap); 1713 } 1714 1715 static const struct v4l2_subdev_internal_ops adv7511_int_ops = { 1716 .registered = adv7511_registered, 1717 .unregistered = adv7511_unregistered, 1718 }; 1719 1720 /* ----------------------------------------------------------------------- */ 1721 /* Setup ADV7511 */ 1722 static void adv7511_init_setup(struct v4l2_subdev *sd) 1723 { 1724 struct adv7511_state *state = get_adv7511_state(sd); 1725 struct adv7511_state_edid *edid = &state->edid; 1726 u32 cec_clk = state->pdata.cec_clk; 1727 u8 ratio; 1728 1729 v4l2_dbg(1, debug, sd, "%s\n", __func__); 1730 1731 /* clear all interrupts */ 1732 adv7511_wr(sd, 0x96, 0xff); 1733 adv7511_wr(sd, 0x97, 0xff); 1734 /* 1735 * Stop HPD from resetting a lot of registers. 1736 * It might leave the chip in a partly un-initialized state, 1737 * in particular with regards to hotplug bounces. 1738 */ 1739 adv7511_wr_and_or(sd, 0xd6, 0x3f, 0xc0); 1740 memset(edid, 0, sizeof(struct adv7511_state_edid)); 1741 state->have_monitor = false; 1742 adv7511_set_isr(sd, false); 1743 adv7511_s_stream(sd, false); 1744 adv7511_s_audio_stream(sd, false); 1745 1746 if (state->i2c_cec == NULL) 1747 return; 1748 1749 v4l2_dbg(1, debug, sd, "%s: cec_clk %d\n", __func__, cec_clk); 1750 1751 /* cec soft reset */ 1752 adv7511_cec_write(sd, 0x50, 0x01); 1753 adv7511_cec_write(sd, 0x50, 0x00); 1754 1755 /* legacy mode */ 1756 adv7511_cec_write(sd, 0x4a, 0x00); 1757 adv7511_cec_write(sd, 0x4a, 0x07); 1758 1759 if (cec_clk % 750000 != 0) 1760 v4l2_err(sd, "%s: cec_clk %d, not multiple of 750 Khz\n", 1761 __func__, cec_clk); 1762 1763 ratio = (cec_clk / 750000) - 1; 1764 adv7511_cec_write(sd, 0x4e, ratio << 2); 1765 } 1766 1767 static int adv7511_probe(struct i2c_client *client, const struct i2c_device_id *id) 1768 { 1769 struct adv7511_state *state; 1770 struct adv7511_platform_data *pdata = client->dev.platform_data; 1771 struct v4l2_ctrl_handler *hdl; 1772 struct v4l2_subdev *sd; 1773 u8 chip_id[2]; 1774 int err = -EIO; 1775 1776 /* Check if the adapter supports the needed features */ 1777 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 1778 return -EIO; 1779 1780 state = devm_kzalloc(&client->dev, sizeof(struct adv7511_state), GFP_KERNEL); 1781 if (!state) 1782 return -ENOMEM; 1783 1784 /* Platform data */ 1785 if (!pdata) { 1786 v4l_err(client, "No platform data!\n"); 1787 return -ENODEV; 1788 } 1789 memcpy(&state->pdata, pdata, sizeof(state->pdata)); 1790 state->fmt_code = MEDIA_BUS_FMT_RGB888_1X24; 1791 state->colorspace = V4L2_COLORSPACE_SRGB; 1792 1793 sd = &state->sd; 1794 1795 v4l2_dbg(1, debug, sd, "detecting adv7511 client on address 0x%x\n", 1796 client->addr << 1); 1797 1798 v4l2_i2c_subdev_init(sd, client, &adv7511_ops); 1799 sd->internal_ops = &adv7511_int_ops; 1800 1801 hdl = &state->hdl; 1802 v4l2_ctrl_handler_init(hdl, 10); 1803 /* add in ascending ID order */ 1804 state->hdmi_mode_ctrl = v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops, 1805 V4L2_CID_DV_TX_MODE, V4L2_DV_TX_MODE_HDMI, 1806 0, V4L2_DV_TX_MODE_DVI_D); 1807 state->hotplug_ctrl = v4l2_ctrl_new_std(hdl, NULL, 1808 V4L2_CID_DV_TX_HOTPLUG, 0, 1, 0, 0); 1809 state->rx_sense_ctrl = v4l2_ctrl_new_std(hdl, NULL, 1810 V4L2_CID_DV_TX_RXSENSE, 0, 1, 0, 0); 1811 state->have_edid0_ctrl = v4l2_ctrl_new_std(hdl, NULL, 1812 V4L2_CID_DV_TX_EDID_PRESENT, 0, 1, 0, 0); 1813 state->rgb_quantization_range_ctrl = 1814 v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops, 1815 V4L2_CID_DV_TX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL, 1816 0, V4L2_DV_RGB_RANGE_AUTO); 1817 state->content_type_ctrl = 1818 v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops, 1819 V4L2_CID_DV_TX_IT_CONTENT_TYPE, V4L2_DV_IT_CONTENT_TYPE_NO_ITC, 1820 0, V4L2_DV_IT_CONTENT_TYPE_NO_ITC); 1821 sd->ctrl_handler = hdl; 1822 if (hdl->error) { 1823 err = hdl->error; 1824 goto err_hdl; 1825 } 1826 state->pad.flags = MEDIA_PAD_FL_SINK; 1827 sd->entity.function = MEDIA_ENT_F_DV_ENCODER; 1828 err = media_entity_pads_init(&sd->entity, 1, &state->pad); 1829 if (err) 1830 goto err_hdl; 1831 1832 /* EDID and CEC i2c addr */ 1833 state->i2c_edid_addr = state->pdata.i2c_edid << 1; 1834 state->i2c_cec_addr = state->pdata.i2c_cec << 1; 1835 state->i2c_pktmem_addr = state->pdata.i2c_pktmem << 1; 1836 1837 state->chip_revision = adv7511_rd(sd, 0x0); 1838 chip_id[0] = adv7511_rd(sd, 0xf5); 1839 chip_id[1] = adv7511_rd(sd, 0xf6); 1840 if (chip_id[0] != 0x75 || chip_id[1] != 0x11) { 1841 v4l2_err(sd, "chip_id != 0x7511, read 0x%02x%02x\n", chip_id[0], 1842 chip_id[1]); 1843 err = -EIO; 1844 goto err_entity; 1845 } 1846 1847 state->i2c_edid = i2c_new_dummy_device(client->adapter, 1848 state->i2c_edid_addr >> 1); 1849 if (IS_ERR(state->i2c_edid)) { 1850 v4l2_err(sd, "failed to register edid i2c client\n"); 1851 err = PTR_ERR(state->i2c_edid); 1852 goto err_entity; 1853 } 1854 1855 adv7511_wr(sd, 0xe1, state->i2c_cec_addr); 1856 if (state->pdata.cec_clk < 3000000 || 1857 state->pdata.cec_clk > 100000000) { 1858 v4l2_err(sd, "%s: cec_clk %u outside range, disabling cec\n", 1859 __func__, state->pdata.cec_clk); 1860 state->pdata.cec_clk = 0; 1861 } 1862 1863 if (state->pdata.cec_clk) { 1864 state->i2c_cec = i2c_new_dummy_device(client->adapter, 1865 state->i2c_cec_addr >> 1); 1866 if (IS_ERR(state->i2c_cec)) { 1867 v4l2_err(sd, "failed to register cec i2c client\n"); 1868 err = PTR_ERR(state->i2c_cec); 1869 goto err_unreg_edid; 1870 } 1871 adv7511_wr(sd, 0xe2, 0x00); /* power up cec section */ 1872 } else { 1873 adv7511_wr(sd, 0xe2, 0x01); /* power down cec section */ 1874 } 1875 1876 state->i2c_pktmem = i2c_new_dummy_device(client->adapter, state->i2c_pktmem_addr >> 1); 1877 if (IS_ERR(state->i2c_pktmem)) { 1878 v4l2_err(sd, "failed to register pktmem i2c client\n"); 1879 err = PTR_ERR(state->i2c_pktmem); 1880 goto err_unreg_cec; 1881 } 1882 1883 state->work_queue = create_singlethread_workqueue(sd->name); 1884 if (state->work_queue == NULL) { 1885 v4l2_err(sd, "could not create workqueue\n"); 1886 err = -ENOMEM; 1887 goto err_unreg_pktmem; 1888 } 1889 1890 INIT_DELAYED_WORK(&state->edid_handler, adv7511_edid_handler); 1891 1892 adv7511_init_setup(sd); 1893 1894 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC) 1895 state->cec_adap = cec_allocate_adapter(&adv7511_cec_adap_ops, 1896 state, dev_name(&client->dev), CEC_CAP_DEFAULTS, 1897 ADV7511_MAX_ADDRS); 1898 err = PTR_ERR_OR_ZERO(state->cec_adap); 1899 if (err) { 1900 destroy_workqueue(state->work_queue); 1901 goto err_unreg_pktmem; 1902 } 1903 #endif 1904 1905 adv7511_set_isr(sd, true); 1906 adv7511_check_monitor_present_status(sd); 1907 1908 v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name, 1909 client->addr << 1, client->adapter->name); 1910 return 0; 1911 1912 err_unreg_pktmem: 1913 i2c_unregister_device(state->i2c_pktmem); 1914 err_unreg_cec: 1915 i2c_unregister_device(state->i2c_cec); 1916 err_unreg_edid: 1917 i2c_unregister_device(state->i2c_edid); 1918 err_entity: 1919 media_entity_cleanup(&sd->entity); 1920 err_hdl: 1921 v4l2_ctrl_handler_free(&state->hdl); 1922 return err; 1923 } 1924 1925 /* ----------------------------------------------------------------------- */ 1926 1927 static int adv7511_remove(struct i2c_client *client) 1928 { 1929 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1930 struct adv7511_state *state = get_adv7511_state(sd); 1931 1932 state->chip_revision = -1; 1933 1934 v4l2_dbg(1, debug, sd, "%s removed @ 0x%x (%s)\n", client->name, 1935 client->addr << 1, client->adapter->name); 1936 1937 adv7511_set_isr(sd, false); 1938 adv7511_init_setup(sd); 1939 cancel_delayed_work_sync(&state->edid_handler); 1940 i2c_unregister_device(state->i2c_edid); 1941 i2c_unregister_device(state->i2c_cec); 1942 i2c_unregister_device(state->i2c_pktmem); 1943 destroy_workqueue(state->work_queue); 1944 v4l2_device_unregister_subdev(sd); 1945 media_entity_cleanup(&sd->entity); 1946 v4l2_ctrl_handler_free(sd->ctrl_handler); 1947 return 0; 1948 } 1949 1950 /* ----------------------------------------------------------------------- */ 1951 1952 static const struct i2c_device_id adv7511_id[] = { 1953 { "adv7511-v4l2", 0 }, 1954 { } 1955 }; 1956 MODULE_DEVICE_TABLE(i2c, adv7511_id); 1957 1958 static struct i2c_driver adv7511_driver = { 1959 .driver = { 1960 .name = "adv7511-v4l2", 1961 }, 1962 .probe = adv7511_probe, 1963 .remove = adv7511_remove, 1964 .id_table = adv7511_id, 1965 }; 1966 1967 module_i2c_driver(adv7511_driver); 1968