1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Driver for Analog Devices ADV748X HDMI receiver with AFE 4 * 5 * Copyright (C) 2017 Renesas Electronics Corp. 6 * 7 * Authors: 8 * Koji Matsuoka <koji.matsuoka.xm@renesas.com> 9 * Niklas Söderlund <niklas.soderlund@ragnatech.se> 10 * Kieran Bingham <kieran.bingham@ideasonboard.com> 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/errno.h> 15 #include <linux/i2c.h> 16 #include <linux/module.h> 17 #include <linux/mutex.h> 18 #include <linux/of_graph.h> 19 #include <linux/regmap.h> 20 #include <linux/slab.h> 21 #include <linux/v4l2-dv-timings.h> 22 23 #include <media/v4l2-ctrls.h> 24 #include <media/v4l2-device.h> 25 #include <media/v4l2-dv-timings.h> 26 #include <media/v4l2-ioctl.h> 27 28 #include "adv748x.h" 29 30 /* ----------------------------------------------------------------------------- 31 * Register manipulation 32 */ 33 34 #define ADV748X_REGMAP_CONF(n) \ 35 { \ 36 .name = n, \ 37 .reg_bits = 8, \ 38 .val_bits = 8, \ 39 .max_register = 0xff, \ 40 .cache_type = REGCACHE_NONE, \ 41 } 42 43 static const struct regmap_config adv748x_regmap_cnf[] = { 44 ADV748X_REGMAP_CONF("io"), 45 ADV748X_REGMAP_CONF("dpll"), 46 ADV748X_REGMAP_CONF("cp"), 47 ADV748X_REGMAP_CONF("hdmi"), 48 ADV748X_REGMAP_CONF("edid"), 49 ADV748X_REGMAP_CONF("repeater"), 50 ADV748X_REGMAP_CONF("infoframe"), 51 ADV748X_REGMAP_CONF("cbus"), 52 ADV748X_REGMAP_CONF("cec"), 53 ADV748X_REGMAP_CONF("sdp"), 54 ADV748X_REGMAP_CONF("txa"), 55 ADV748X_REGMAP_CONF("txb"), 56 }; 57 58 static int adv748x_configure_regmap(struct adv748x_state *state, int region) 59 { 60 int err; 61 62 if (!state->i2c_clients[region]) 63 return -ENODEV; 64 65 state->regmap[region] = 66 devm_regmap_init_i2c(state->i2c_clients[region], 67 &adv748x_regmap_cnf[region]); 68 69 if (IS_ERR(state->regmap[region])) { 70 err = PTR_ERR(state->regmap[region]); 71 adv_err(state, 72 "Error initializing regmap %d with error %d\n", 73 region, err); 74 return -EINVAL; 75 } 76 77 return 0; 78 } 79 struct adv748x_register_map { 80 const char *name; 81 u8 default_addr; 82 }; 83 84 static const struct adv748x_register_map adv748x_default_addresses[] = { 85 [ADV748X_PAGE_IO] = { "main", 0x70 }, 86 [ADV748X_PAGE_DPLL] = { "dpll", 0x26 }, 87 [ADV748X_PAGE_CP] = { "cp", 0x22 }, 88 [ADV748X_PAGE_HDMI] = { "hdmi", 0x34 }, 89 [ADV748X_PAGE_EDID] = { "edid", 0x36 }, 90 [ADV748X_PAGE_REPEATER] = { "repeater", 0x32 }, 91 [ADV748X_PAGE_INFOFRAME] = { "infoframe", 0x31 }, 92 [ADV748X_PAGE_CBUS] = { "cbus", 0x30 }, 93 [ADV748X_PAGE_CEC] = { "cec", 0x41 }, 94 [ADV748X_PAGE_SDP] = { "sdp", 0x79 }, 95 [ADV748X_PAGE_TXB] = { "txb", 0x48 }, 96 [ADV748X_PAGE_TXA] = { "txa", 0x4a }, 97 }; 98 99 static int adv748x_read_check(struct adv748x_state *state, 100 int client_page, u8 reg) 101 { 102 struct i2c_client *client = state->i2c_clients[client_page]; 103 int err; 104 unsigned int val; 105 106 err = regmap_read(state->regmap[client_page], reg, &val); 107 108 if (err) { 109 adv_err(state, "error reading %02x, %02x\n", 110 client->addr, reg); 111 return err; 112 } 113 114 return val; 115 } 116 117 int adv748x_read(struct adv748x_state *state, u8 page, u8 reg) 118 { 119 return adv748x_read_check(state, page, reg); 120 } 121 122 int adv748x_write(struct adv748x_state *state, u8 page, u8 reg, u8 value) 123 { 124 return regmap_write(state->regmap[page], reg, value); 125 } 126 127 /* adv748x_write_block(): Write raw data with a maximum of I2C_SMBUS_BLOCK_MAX 128 * size to one or more registers. 129 * 130 * A value of zero will be returned on success, a negative errno will 131 * be returned in error cases. 132 */ 133 int adv748x_write_block(struct adv748x_state *state, int client_page, 134 unsigned int init_reg, const void *val, 135 size_t val_len) 136 { 137 struct regmap *regmap = state->regmap[client_page]; 138 139 if (val_len > I2C_SMBUS_BLOCK_MAX) 140 val_len = I2C_SMBUS_BLOCK_MAX; 141 142 return regmap_raw_write(regmap, init_reg, val, val_len); 143 } 144 145 static int adv748x_set_slave_addresses(struct adv748x_state *state) 146 { 147 struct i2c_client *client; 148 unsigned int i; 149 u8 io_reg; 150 151 for (i = ADV748X_PAGE_DPLL; i < ADV748X_PAGE_MAX; ++i) { 152 io_reg = ADV748X_IO_SLAVE_ADDR_BASE + i; 153 client = state->i2c_clients[i]; 154 155 io_write(state, io_reg, client->addr << 1); 156 } 157 158 return 0; 159 } 160 161 static void adv748x_unregister_clients(struct adv748x_state *state) 162 { 163 unsigned int i; 164 165 for (i = 1; i < ARRAY_SIZE(state->i2c_clients); ++i) 166 i2c_unregister_device(state->i2c_clients[i]); 167 } 168 169 static int adv748x_initialise_clients(struct adv748x_state *state) 170 { 171 unsigned int i; 172 int ret; 173 174 for (i = ADV748X_PAGE_DPLL; i < ADV748X_PAGE_MAX; ++i) { 175 state->i2c_clients[i] = i2c_new_secondary_device( 176 state->client, 177 adv748x_default_addresses[i].name, 178 adv748x_default_addresses[i].default_addr); 179 180 if (state->i2c_clients[i] == NULL) { 181 adv_err(state, "failed to create i2c client %u\n", i); 182 return -ENOMEM; 183 } 184 185 ret = adv748x_configure_regmap(state, i); 186 if (ret) 187 return ret; 188 } 189 190 return adv748x_set_slave_addresses(state); 191 } 192 193 /** 194 * struct adv748x_reg_value - Register write instruction 195 * @page: Regmap page identifier 196 * @reg: I2C register 197 * @value: value to write to @page at @reg 198 */ 199 struct adv748x_reg_value { 200 u8 page; 201 u8 reg; 202 u8 value; 203 }; 204 205 static int adv748x_write_regs(struct adv748x_state *state, 206 const struct adv748x_reg_value *regs) 207 { 208 int ret; 209 210 while (regs->page != ADV748X_PAGE_EOR) { 211 if (regs->page == ADV748X_PAGE_WAIT) { 212 msleep(regs->value); 213 } else { 214 ret = adv748x_write(state, regs->page, regs->reg, 215 regs->value); 216 if (ret < 0) { 217 adv_err(state, 218 "Error regs page: 0x%02x reg: 0x%02x\n", 219 regs->page, regs->reg); 220 return ret; 221 } 222 } 223 regs++; 224 } 225 226 return 0; 227 } 228 229 /* ----------------------------------------------------------------------------- 230 * TXA and TXB 231 */ 232 233 static const struct adv748x_reg_value adv748x_power_up_txa_4lane[] = { 234 235 {ADV748X_PAGE_TXA, 0x00, 0x84}, /* Enable 4-lane MIPI */ 236 {ADV748X_PAGE_TXA, 0x00, 0xa4}, /* Set Auto DPHY Timing */ 237 238 {ADV748X_PAGE_TXA, 0x31, 0x82}, /* ADI Required Write */ 239 {ADV748X_PAGE_TXA, 0x1e, 0x40}, /* ADI Required Write */ 240 {ADV748X_PAGE_TXA, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */ 241 {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */ 242 {ADV748X_PAGE_TXA, 0x00, 0x24 },/* Power-up CSI-TX */ 243 {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ 244 {ADV748X_PAGE_TXA, 0xc1, 0x2b}, /* ADI Required Write */ 245 {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ 246 {ADV748X_PAGE_TXA, 0x31, 0x80}, /* ADI Required Write */ 247 248 {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ 249 }; 250 251 static const struct adv748x_reg_value adv748x_power_down_txa_4lane[] = { 252 253 {ADV748X_PAGE_TXA, 0x31, 0x82}, /* ADI Required Write */ 254 {ADV748X_PAGE_TXA, 0x1e, 0x00}, /* ADI Required Write */ 255 {ADV748X_PAGE_TXA, 0x00, 0x84}, /* Enable 4-lane MIPI */ 256 {ADV748X_PAGE_TXA, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */ 257 {ADV748X_PAGE_TXA, 0xc1, 0x3b}, /* ADI Required Write */ 258 259 {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ 260 }; 261 262 static const struct adv748x_reg_value adv748x_power_up_txb_1lane[] = { 263 264 {ADV748X_PAGE_TXB, 0x00, 0x81}, /* Enable 1-lane MIPI */ 265 {ADV748X_PAGE_TXB, 0x00, 0xa1}, /* Set Auto DPHY Timing */ 266 267 {ADV748X_PAGE_TXB, 0x31, 0x82}, /* ADI Required Write */ 268 {ADV748X_PAGE_TXB, 0x1e, 0x40}, /* ADI Required Write */ 269 {ADV748X_PAGE_TXB, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */ 270 {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */ 271 {ADV748X_PAGE_TXB, 0x00, 0x21 },/* Power-up CSI-TX */ 272 {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ 273 {ADV748X_PAGE_TXB, 0xc1, 0x2b}, /* ADI Required Write */ 274 {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ 275 {ADV748X_PAGE_TXB, 0x31, 0x80}, /* ADI Required Write */ 276 277 {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ 278 }; 279 280 static const struct adv748x_reg_value adv748x_power_down_txb_1lane[] = { 281 282 {ADV748X_PAGE_TXB, 0x31, 0x82}, /* ADI Required Write */ 283 {ADV748X_PAGE_TXB, 0x1e, 0x00}, /* ADI Required Write */ 284 {ADV748X_PAGE_TXB, 0x00, 0x81}, /* Enable 1-lane MIPI */ 285 {ADV748X_PAGE_TXB, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */ 286 {ADV748X_PAGE_TXB, 0xc1, 0x3b}, /* ADI Required Write */ 287 288 {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ 289 }; 290 291 int adv748x_tx_power(struct adv748x_csi2 *tx, bool on) 292 { 293 struct adv748x_state *state = tx->state; 294 const struct adv748x_reg_value *reglist; 295 int val; 296 297 if (!is_tx_enabled(tx)) 298 return 0; 299 300 val = tx_read(tx, ADV748X_CSI_FS_AS_LS); 301 if (val < 0) 302 return val; 303 304 /* 305 * This test against BIT(6) is not documented by the datasheet, but was 306 * specified in the downstream driver. 307 * Track with a WARN_ONCE to determine if it is ever set by HW. 308 */ 309 WARN_ONCE((on && val & ADV748X_CSI_FS_AS_LS_UNKNOWN), 310 "Enabling with unknown bit set"); 311 312 if (on) 313 reglist = is_txa(tx) ? adv748x_power_up_txa_4lane : 314 adv748x_power_up_txb_1lane; 315 else 316 reglist = is_txa(tx) ? adv748x_power_down_txa_4lane : 317 adv748x_power_down_txb_1lane; 318 319 return adv748x_write_regs(state, reglist); 320 } 321 322 /* ----------------------------------------------------------------------------- 323 * Media Operations 324 */ 325 326 static const struct media_entity_operations adv748x_media_ops = { 327 .link_validate = v4l2_subdev_link_validate, 328 }; 329 330 /* ----------------------------------------------------------------------------- 331 * HW setup 332 */ 333 334 static const struct adv748x_reg_value adv748x_sw_reset[] = { 335 336 {ADV748X_PAGE_IO, 0xff, 0xff}, /* SW reset */ 337 {ADV748X_PAGE_WAIT, 0x00, 0x05},/* delay 5 */ 338 {ADV748X_PAGE_IO, 0x01, 0x76}, /* ADI Required Write */ 339 {ADV748X_PAGE_IO, 0xf2, 0x01}, /* Enable I2C Read Auto-Increment */ 340 {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ 341 }; 342 343 /* Supported Formats For Script Below */ 344 /* - 01-29 HDMI to MIPI TxA CSI 4-Lane - RGB888: */ 345 static const struct adv748x_reg_value adv748x_init_txa_4lane[] = { 346 /* Disable chip powerdown & Enable HDMI Rx block */ 347 {ADV748X_PAGE_IO, 0x00, 0x40}, 348 349 {ADV748X_PAGE_REPEATER, 0x40, 0x83}, /* Enable HDCP 1.1 */ 350 351 {ADV748X_PAGE_HDMI, 0x00, 0x08},/* Foreground Channel = A */ 352 {ADV748X_PAGE_HDMI, 0x98, 0xff},/* ADI Required Write */ 353 {ADV748X_PAGE_HDMI, 0x99, 0xa3},/* ADI Required Write */ 354 {ADV748X_PAGE_HDMI, 0x9a, 0x00},/* ADI Required Write */ 355 {ADV748X_PAGE_HDMI, 0x9b, 0x0a},/* ADI Required Write */ 356 {ADV748X_PAGE_HDMI, 0x9d, 0x40},/* ADI Required Write */ 357 {ADV748X_PAGE_HDMI, 0xcb, 0x09},/* ADI Required Write */ 358 {ADV748X_PAGE_HDMI, 0x3d, 0x10},/* ADI Required Write */ 359 {ADV748X_PAGE_HDMI, 0x3e, 0x7b},/* ADI Required Write */ 360 {ADV748X_PAGE_HDMI, 0x3f, 0x5e},/* ADI Required Write */ 361 {ADV748X_PAGE_HDMI, 0x4e, 0xfe},/* ADI Required Write */ 362 {ADV748X_PAGE_HDMI, 0x4f, 0x18},/* ADI Required Write */ 363 {ADV748X_PAGE_HDMI, 0x57, 0xa3},/* ADI Required Write */ 364 {ADV748X_PAGE_HDMI, 0x58, 0x04},/* ADI Required Write */ 365 {ADV748X_PAGE_HDMI, 0x85, 0x10},/* ADI Required Write */ 366 367 {ADV748X_PAGE_HDMI, 0x83, 0x00},/* Enable All Terminations */ 368 {ADV748X_PAGE_HDMI, 0xa3, 0x01},/* ADI Required Write */ 369 {ADV748X_PAGE_HDMI, 0xbe, 0x00},/* ADI Required Write */ 370 371 {ADV748X_PAGE_HDMI, 0x6c, 0x01},/* HPA Manual Enable */ 372 {ADV748X_PAGE_HDMI, 0xf8, 0x01},/* HPA Asserted */ 373 {ADV748X_PAGE_HDMI, 0x0f, 0x00},/* Audio Mute Speed Set to Fastest */ 374 /* (Smallest Step Size) */ 375 376 {ADV748X_PAGE_IO, 0x04, 0x02}, /* RGB Out of CP */ 377 {ADV748X_PAGE_IO, 0x12, 0xf0}, /* CSC Depends on ip Packets, SDR 444 */ 378 {ADV748X_PAGE_IO, 0x17, 0x80}, /* Luma & Chroma can reach 254d */ 379 {ADV748X_PAGE_IO, 0x03, 0x86}, /* CP-Insert_AV_Code */ 380 381 {ADV748X_PAGE_CP, 0x7c, 0x00}, /* ADI Required Write */ 382 383 {ADV748X_PAGE_IO, 0x0c, 0xe0}, /* Enable LLC_DLL & Double LLC Timing */ 384 {ADV748X_PAGE_IO, 0x0e, 0xdd}, /* LLC/PIX/SPI PINS TRISTATED AUD */ 385 386 {ADV748X_PAGE_TXA, 0x00, 0x84}, /* Enable 4-lane MIPI */ 387 {ADV748X_PAGE_TXA, 0x00, 0xa4}, /* Set Auto DPHY Timing */ 388 {ADV748X_PAGE_TXA, 0xdb, 0x10}, /* ADI Required Write */ 389 {ADV748X_PAGE_TXA, 0xd6, 0x07}, /* ADI Required Write */ 390 {ADV748X_PAGE_TXA, 0xc4, 0x0a}, /* ADI Required Write */ 391 {ADV748X_PAGE_TXA, 0x71, 0x33}, /* ADI Required Write */ 392 {ADV748X_PAGE_TXA, 0x72, 0x11}, /* ADI Required Write */ 393 {ADV748X_PAGE_TXA, 0xf0, 0x00}, /* i2c_dphy_pwdn - 1'b0 */ 394 395 {ADV748X_PAGE_TXA, 0x31, 0x82}, /* ADI Required Write */ 396 {ADV748X_PAGE_TXA, 0x1e, 0x40}, /* ADI Required Write */ 397 {ADV748X_PAGE_TXA, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */ 398 {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */ 399 {ADV748X_PAGE_TXA, 0x00, 0x24 },/* Power-up CSI-TX */ 400 {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ 401 {ADV748X_PAGE_TXA, 0xc1, 0x2b}, /* ADI Required Write */ 402 {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ 403 {ADV748X_PAGE_TXA, 0x31, 0x80}, /* ADI Required Write */ 404 405 {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ 406 }; 407 408 /* 02-01 Analog CVBS to MIPI TX-B CSI 1-Lane - */ 409 /* Autodetect CVBS Single Ended In Ain 1 - MIPI Out */ 410 static const struct adv748x_reg_value adv748x_init_txb_1lane[] = { 411 412 {ADV748X_PAGE_IO, 0x00, 0x30}, /* Disable chip powerdown Rx */ 413 {ADV748X_PAGE_IO, 0xf2, 0x01}, /* Enable I2C Read Auto-Increment */ 414 415 {ADV748X_PAGE_IO, 0x0e, 0xff}, /* LLC/PIX/AUD/SPI PINS TRISTATED */ 416 417 {ADV748X_PAGE_SDP, 0x0f, 0x00}, /* Exit Power Down Mode */ 418 {ADV748X_PAGE_SDP, 0x52, 0xcd}, /* ADI Required Write */ 419 420 {ADV748X_PAGE_SDP, 0x0e, 0x80}, /* ADI Required Write */ 421 {ADV748X_PAGE_SDP, 0x9c, 0x00}, /* ADI Required Write */ 422 {ADV748X_PAGE_SDP, 0x9c, 0xff}, /* ADI Required Write */ 423 {ADV748X_PAGE_SDP, 0x0e, 0x00}, /* ADI Required Write */ 424 425 /* ADI recommended writes for improved video quality */ 426 {ADV748X_PAGE_SDP, 0x80, 0x51}, /* ADI Required Write */ 427 {ADV748X_PAGE_SDP, 0x81, 0x51}, /* ADI Required Write */ 428 {ADV748X_PAGE_SDP, 0x82, 0x68}, /* ADI Required Write */ 429 430 {ADV748X_PAGE_SDP, 0x03, 0x42}, /* Tri-S Output , PwrDwn 656 pads */ 431 {ADV748X_PAGE_SDP, 0x04, 0xb5}, /* ITU-R BT.656-4 compatible */ 432 {ADV748X_PAGE_SDP, 0x13, 0x00}, /* ADI Required Write */ 433 434 {ADV748X_PAGE_SDP, 0x17, 0x41}, /* Select SH1 */ 435 {ADV748X_PAGE_SDP, 0x31, 0x12}, /* ADI Required Write */ 436 {ADV748X_PAGE_SDP, 0xe6, 0x4f}, /* V bit end pos manually in NTSC */ 437 438 {ADV748X_PAGE_TXB, 0x00, 0x81}, /* Enable 1-lane MIPI */ 439 {ADV748X_PAGE_TXB, 0x00, 0xa1}, /* Set Auto DPHY Timing */ 440 {ADV748X_PAGE_TXB, 0xd2, 0x40}, /* ADI Required Write */ 441 {ADV748X_PAGE_TXB, 0xc4, 0x0a}, /* ADI Required Write */ 442 {ADV748X_PAGE_TXB, 0x71, 0x33}, /* ADI Required Write */ 443 {ADV748X_PAGE_TXB, 0x72, 0x11}, /* ADI Required Write */ 444 {ADV748X_PAGE_TXB, 0xf0, 0x00}, /* i2c_dphy_pwdn - 1'b0 */ 445 {ADV748X_PAGE_TXB, 0x31, 0x82}, /* ADI Required Write */ 446 {ADV748X_PAGE_TXB, 0x1e, 0x40}, /* ADI Required Write */ 447 {ADV748X_PAGE_TXB, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */ 448 449 {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */ 450 {ADV748X_PAGE_TXB, 0x00, 0x21 },/* Power-up CSI-TX */ 451 {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ 452 {ADV748X_PAGE_TXB, 0xc1, 0x2b}, /* ADI Required Write */ 453 {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ 454 {ADV748X_PAGE_TXB, 0x31, 0x80}, /* ADI Required Write */ 455 456 {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ 457 }; 458 459 static int adv748x_reset(struct adv748x_state *state) 460 { 461 int ret; 462 u8 regval = 0; 463 464 ret = adv748x_write_regs(state, adv748x_sw_reset); 465 if (ret < 0) 466 return ret; 467 468 ret = adv748x_set_slave_addresses(state); 469 if (ret < 0) 470 return ret; 471 472 /* Init and power down TXA */ 473 ret = adv748x_write_regs(state, adv748x_init_txa_4lane); 474 if (ret) 475 return ret; 476 477 adv748x_tx_power(&state->txa, 0); 478 479 /* Init and power down TXB */ 480 ret = adv748x_write_regs(state, adv748x_init_txb_1lane); 481 if (ret) 482 return ret; 483 484 adv748x_tx_power(&state->txb, 0); 485 486 /* Disable chip powerdown & Enable HDMI Rx block */ 487 io_write(state, ADV748X_IO_PD, ADV748X_IO_PD_RX_EN); 488 489 /* Conditionally enable TXa and TXb. */ 490 if (is_tx_enabled(&state->txa)) 491 regval |= ADV748X_IO_10_CSI4_EN; 492 if (is_tx_enabled(&state->txb)) 493 regval |= ADV748X_IO_10_CSI1_EN; 494 io_write(state, ADV748X_IO_10, regval); 495 496 /* Use vid_std and v_freq as freerun resolution for CP */ 497 cp_clrset(state, ADV748X_CP_CLMP_POS, ADV748X_CP_CLMP_POS_DIS_AUTO, 498 ADV748X_CP_CLMP_POS_DIS_AUTO); 499 500 return 0; 501 } 502 503 static int adv748x_identify_chip(struct adv748x_state *state) 504 { 505 int msb, lsb; 506 507 lsb = io_read(state, ADV748X_IO_CHIP_REV_ID_1); 508 msb = io_read(state, ADV748X_IO_CHIP_REV_ID_2); 509 510 if (lsb < 0 || msb < 0) { 511 adv_err(state, "Failed to read chip revision\n"); 512 return -EIO; 513 } 514 515 adv_info(state, "chip found @ 0x%02x revision %02x%02x\n", 516 state->client->addr << 1, lsb, msb); 517 518 return 0; 519 } 520 521 /* ----------------------------------------------------------------------------- 522 * i2c driver 523 */ 524 525 void adv748x_subdev_init(struct v4l2_subdev *sd, struct adv748x_state *state, 526 const struct v4l2_subdev_ops *ops, u32 function, 527 const char *ident) 528 { 529 v4l2_subdev_init(sd, ops); 530 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 531 532 /* the owner is the same as the i2c_client's driver owner */ 533 sd->owner = state->dev->driver->owner; 534 sd->dev = state->dev; 535 536 v4l2_set_subdevdata(sd, state); 537 538 /* initialize name */ 539 snprintf(sd->name, sizeof(sd->name), "%s %d-%04x %s", 540 state->dev->driver->name, 541 i2c_adapter_id(state->client->adapter), 542 state->client->addr, ident); 543 544 sd->entity.function = function; 545 sd->entity.ops = &adv748x_media_ops; 546 } 547 548 static int adv748x_parse_dt(struct adv748x_state *state) 549 { 550 struct device_node *ep_np = NULL; 551 struct of_endpoint ep; 552 bool out_found = false; 553 bool in_found = false; 554 555 for_each_endpoint_of_node(state->dev->of_node, ep_np) { 556 of_graph_parse_endpoint(ep_np, &ep); 557 adv_info(state, "Endpoint %pOF on port %d", ep.local_node, 558 ep.port); 559 560 if (ep.port >= ADV748X_PORT_MAX) { 561 adv_err(state, "Invalid endpoint %pOF on port %d", 562 ep.local_node, ep.port); 563 564 continue; 565 } 566 567 if (state->endpoints[ep.port]) { 568 adv_err(state, 569 "Multiple port endpoints are not supported"); 570 continue; 571 } 572 573 of_node_get(ep_np); 574 state->endpoints[ep.port] = ep_np; 575 576 /* 577 * At least one input endpoint and one output endpoint shall 578 * be defined. 579 */ 580 if (ep.port < ADV748X_PORT_TXA) 581 in_found = true; 582 else 583 out_found = true; 584 } 585 586 return in_found && out_found ? 0 : -ENODEV; 587 } 588 589 static void adv748x_dt_cleanup(struct adv748x_state *state) 590 { 591 unsigned int i; 592 593 for (i = 0; i < ADV748X_PORT_MAX; i++) 594 of_node_put(state->endpoints[i]); 595 } 596 597 static int adv748x_probe(struct i2c_client *client, 598 const struct i2c_device_id *id) 599 { 600 struct adv748x_state *state; 601 int ret; 602 603 /* Check if the adapter supports the needed features */ 604 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 605 return -EIO; 606 607 state = kzalloc(sizeof(struct adv748x_state), GFP_KERNEL); 608 if (!state) 609 return -ENOMEM; 610 611 mutex_init(&state->mutex); 612 613 state->dev = &client->dev; 614 state->client = client; 615 state->i2c_clients[ADV748X_PAGE_IO] = client; 616 i2c_set_clientdata(client, state); 617 618 /* 619 * We can not use container_of to get back to the state with two TXs; 620 * Initialize the TXs's fields unconditionally on the endpoint 621 * presence to access them later. 622 */ 623 state->txa.state = state->txb.state = state; 624 state->txa.page = ADV748X_PAGE_TXA; 625 state->txb.page = ADV748X_PAGE_TXB; 626 state->txa.port = ADV748X_PORT_TXA; 627 state->txb.port = ADV748X_PORT_TXB; 628 629 /* Discover and process ports declared by the Device tree endpoints */ 630 ret = adv748x_parse_dt(state); 631 if (ret) { 632 adv_err(state, "Failed to parse device tree"); 633 goto err_free_mutex; 634 } 635 636 /* Configure IO Regmap region */ 637 ret = adv748x_configure_regmap(state, ADV748X_PAGE_IO); 638 if (ret) { 639 adv_err(state, "Error configuring IO regmap region"); 640 goto err_cleanup_dt; 641 } 642 643 ret = adv748x_identify_chip(state); 644 if (ret) { 645 adv_err(state, "Failed to identify chip"); 646 goto err_cleanup_dt; 647 } 648 649 /* Configure remaining pages as I2C clients with regmap access */ 650 ret = adv748x_initialise_clients(state); 651 if (ret) { 652 adv_err(state, "Failed to setup client regmap pages"); 653 goto err_cleanup_clients; 654 } 655 656 /* SW reset ADV748X to its default values */ 657 ret = adv748x_reset(state); 658 if (ret) { 659 adv_err(state, "Failed to reset hardware"); 660 goto err_cleanup_clients; 661 } 662 663 /* Initialise HDMI */ 664 ret = adv748x_hdmi_init(&state->hdmi); 665 if (ret) { 666 adv_err(state, "Failed to probe HDMI"); 667 goto err_cleanup_clients; 668 } 669 670 /* Initialise AFE */ 671 ret = adv748x_afe_init(&state->afe); 672 if (ret) { 673 adv_err(state, "Failed to probe AFE"); 674 goto err_cleanup_hdmi; 675 } 676 677 /* Initialise TXA */ 678 ret = adv748x_csi2_init(state, &state->txa); 679 if (ret) { 680 adv_err(state, "Failed to probe TXA"); 681 goto err_cleanup_afe; 682 } 683 684 /* Initialise TXB */ 685 ret = adv748x_csi2_init(state, &state->txb); 686 if (ret) { 687 adv_err(state, "Failed to probe TXB"); 688 goto err_cleanup_txa; 689 } 690 691 return 0; 692 693 err_cleanup_txa: 694 adv748x_csi2_cleanup(&state->txa); 695 err_cleanup_afe: 696 adv748x_afe_cleanup(&state->afe); 697 err_cleanup_hdmi: 698 adv748x_hdmi_cleanup(&state->hdmi); 699 err_cleanup_clients: 700 adv748x_unregister_clients(state); 701 err_cleanup_dt: 702 adv748x_dt_cleanup(state); 703 err_free_mutex: 704 mutex_destroy(&state->mutex); 705 kfree(state); 706 707 return ret; 708 } 709 710 static int adv748x_remove(struct i2c_client *client) 711 { 712 struct adv748x_state *state = i2c_get_clientdata(client); 713 714 adv748x_afe_cleanup(&state->afe); 715 adv748x_hdmi_cleanup(&state->hdmi); 716 717 adv748x_csi2_cleanup(&state->txa); 718 adv748x_csi2_cleanup(&state->txb); 719 720 adv748x_unregister_clients(state); 721 adv748x_dt_cleanup(state); 722 mutex_destroy(&state->mutex); 723 724 kfree(state); 725 726 return 0; 727 } 728 729 static const struct i2c_device_id adv748x_id[] = { 730 { "adv7481", 0 }, 731 { "adv7482", 0 }, 732 { }, 733 }; 734 MODULE_DEVICE_TABLE(i2c, adv748x_id); 735 736 static const struct of_device_id adv748x_of_table[] = { 737 { .compatible = "adi,adv7481", }, 738 { .compatible = "adi,adv7482", }, 739 { } 740 }; 741 MODULE_DEVICE_TABLE(of, adv748x_of_table); 742 743 static struct i2c_driver adv748x_driver = { 744 .driver = { 745 .name = "adv748x", 746 .of_match_table = adv748x_of_table, 747 }, 748 .probe = adv748x_probe, 749 .remove = adv748x_remove, 750 .id_table = adv748x_id, 751 }; 752 753 module_i2c_driver(adv748x_driver); 754 755 MODULE_AUTHOR("Kieran Bingham <kieran.bingham@ideasonboard.com>"); 756 MODULE_DESCRIPTION("ADV748X video decoder"); 757 MODULE_LICENSE("GPL"); 758