1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for Zarlink zl10036 DVB-S silicon tuner 4 * 5 * Copyright (C) 2006 Tino Reichardt 6 * Copyright (C) 2007-2009 Matthias Schwarzott <zzam@gentoo.de> 7 * 8 ** 9 * The data sheet for this tuner can be found at: 10 * http://www.mcmilk.de/projects/dvb-card/datasheets/ZL10036.pdf 11 * 12 * This one is working: (at my Avermedia DVB-S Pro) 13 * - zl10036 (40pin, FTA) 14 * 15 * A driver for zl10038 should be very similar. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/dvb/frontend.h> 20 #include <linux/slab.h> 21 #include <linux/types.h> 22 23 #include "zl10036.h" 24 25 static int zl10036_debug; 26 #define dprintk(level, args...) \ 27 do { if (zl10036_debug & level) printk(KERN_DEBUG "zl10036: " args); \ 28 } while (0) 29 30 #define deb_info(args...) dprintk(0x01, args) 31 #define deb_i2c(args...) dprintk(0x02, args) 32 33 struct zl10036_state { 34 struct i2c_adapter *i2c; 35 const struct zl10036_config *config; 36 u32 frequency; 37 u8 br, bf; 38 }; 39 40 41 /* This driver assumes the tuner is driven by a 10.111MHz Cristal */ 42 #define _XTAL 10111 43 44 /* Some of the possible dividers: 45 * 64, (write 0x05 to reg), freq step size 158kHz 46 * 10, (write 0x0a to reg), freq step size 1.011kHz (used here) 47 * 5, (write 0x09 to reg), freq step size 2.022kHz 48 */ 49 50 #define _RDIV 10 51 #define _RDIV_REG 0x0a 52 #define _FR (_XTAL/_RDIV) 53 54 #define STATUS_POR 0x80 /* Power on Reset */ 55 #define STATUS_FL 0x40 /* Frequency & Phase Lock */ 56 57 /* read/write for zl10036 and zl10038 */ 58 59 static int zl10036_read_status_reg(struct zl10036_state *state) 60 { 61 u8 status; 62 struct i2c_msg msg[1] = { 63 { .addr = state->config->tuner_address, .flags = I2C_M_RD, 64 .buf = &status, .len = sizeof(status) }, 65 }; 66 67 if (i2c_transfer(state->i2c, msg, 1) != 1) { 68 printk(KERN_ERR "%s: i2c read failed at addr=%02x\n", 69 __func__, state->config->tuner_address); 70 return -EIO; 71 } 72 73 deb_i2c("R(status): %02x [FL=%d]\n", status, 74 (status & STATUS_FL) ? 1 : 0); 75 if (status & STATUS_POR) 76 deb_info("%s: Power-On-Reset bit enabled - need to initialize the tuner\n", 77 __func__); 78 79 return status; 80 } 81 82 static int zl10036_write(struct zl10036_state *state, u8 buf[], u8 count) 83 { 84 struct i2c_msg msg[1] = { 85 { .addr = state->config->tuner_address, .flags = 0, 86 .buf = buf, .len = count }, 87 }; 88 u8 reg = 0; 89 int ret; 90 91 if (zl10036_debug & 0x02) { 92 /* every 8bit-value satisifes this! 93 * so only check for debug log */ 94 if ((buf[0] & 0x80) == 0x00) 95 reg = 2; 96 else if ((buf[0] & 0xc0) == 0x80) 97 reg = 4; 98 else if ((buf[0] & 0xf0) == 0xc0) 99 reg = 6; 100 else if ((buf[0] & 0xf0) == 0xd0) 101 reg = 8; 102 else if ((buf[0] & 0xf0) == 0xe0) 103 reg = 10; 104 else if ((buf[0] & 0xf0) == 0xf0) 105 reg = 12; 106 107 deb_i2c("W(%d):", reg); 108 { 109 int i; 110 for (i = 0; i < count; i++) 111 printk(KERN_CONT " %02x", buf[i]); 112 printk(KERN_CONT "\n"); 113 } 114 } 115 116 ret = i2c_transfer(state->i2c, msg, 1); 117 if (ret != 1) { 118 printk(KERN_ERR "%s: i2c error, ret=%d\n", __func__, ret); 119 return -EIO; 120 } 121 122 return 0; 123 } 124 125 static void zl10036_release(struct dvb_frontend *fe) 126 { 127 struct zl10036_state *state = fe->tuner_priv; 128 129 fe->tuner_priv = NULL; 130 kfree(state); 131 } 132 133 static int zl10036_sleep(struct dvb_frontend *fe) 134 { 135 struct zl10036_state *state = fe->tuner_priv; 136 u8 buf[] = { 0xf0, 0x80 }; /* regs 12/13 */ 137 int ret; 138 139 deb_info("%s\n", __func__); 140 141 if (fe->ops.i2c_gate_ctrl) 142 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */ 143 144 ret = zl10036_write(state, buf, sizeof(buf)); 145 146 if (fe->ops.i2c_gate_ctrl) 147 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */ 148 149 return ret; 150 } 151 152 /* 153 * register map of the ZL10036/ZL10038 154 * 155 * reg[default] content 156 * 2[0x00]: 0 | N14 | N13 | N12 | N11 | N10 | N9 | N8 157 * 3[0x00]: N7 | N6 | N5 | N4 | N3 | N2 | N1 | N0 158 * 4[0x80]: 1 | 0 | RFG | BA1 | BA0 | BG1 | BG0 | LEN 159 * 5[0x00]: P0 | C1 | C0 | R4 | R3 | R2 | R1 | R0 160 * 6[0xc0]: 1 | 1 | 0 | 0 | RSD | 0 | 0 | 0 161 * 7[0x20]: P1 | BF6 | BF5 | BF4 | BF3 | BF2 | BF1 | 0 162 * 8[0xdb]: 1 | 1 | 0 | 1 | 0 | CC | 1 | 1 163 * 9[0x30]: VSD | V2 | V1 | V0 | S3 | S2 | S1 | S0 164 * 10[0xe1]: 1 | 1 | 1 | 0 | 0 | LS2 | LS1 | LS0 165 * 11[0xf5]: WS | WH2 | WH1 | WH0 | WL2 | WL1 | WL0 | WRE 166 * 12[0xf0]: 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 167 * 13[0x28]: PD | BR4 | BR3 | BR2 | BR1 | BR0 | CLR | TL 168 */ 169 170 static int zl10036_set_frequency(struct zl10036_state *state, u32 frequency) 171 { 172 u8 buf[2]; 173 u32 div, foffset; 174 175 div = (frequency + _FR/2) / _FR; 176 state->frequency = div * _FR; 177 178 foffset = frequency - state->frequency; 179 180 buf[0] = (div >> 8) & 0x7f; 181 buf[1] = (div >> 0) & 0xff; 182 183 deb_info("%s: ftodo=%u fpriv=%u ferr=%d div=%u\n", __func__, 184 frequency, state->frequency, foffset, div); 185 186 return zl10036_write(state, buf, sizeof(buf)); 187 } 188 189 static int zl10036_set_bandwidth(struct zl10036_state *state, u32 fbw) 190 { 191 /* fbw is measured in kHz */ 192 u8 br, bf; 193 int ret; 194 u8 buf_bf[] = { 195 0xc0, 0x00, /* 6/7: rsd=0 bf=0 */ 196 }; 197 u8 buf_br[] = { 198 0xf0, 0x00, /* 12/13: br=0xa clr=0 tl=0*/ 199 }; 200 u8 zl10036_rsd_off[] = { 0xc8 }; /* set RSD=1 */ 201 202 /* ensure correct values */ 203 if (fbw > 35000) 204 fbw = 35000; 205 if (fbw < 8000) 206 fbw = 8000; 207 208 #define _BR_MAXIMUM (_XTAL/575) /* _XTAL / 575kHz = 17 */ 209 210 /* <= 28,82 MHz */ 211 if (fbw <= 28820) { 212 br = _BR_MAXIMUM; 213 } else { 214 /* 215 * f(bw)=34,6MHz f(xtal)=10.111MHz 216 * br = (10111/34600) * 63 * 1/K = 14; 217 */ 218 br = ((_XTAL * 21 * 1000) / (fbw * 419)); 219 } 220 221 /* ensure correct values */ 222 if (br < 4) 223 br = 4; 224 if (br > _BR_MAXIMUM) 225 br = _BR_MAXIMUM; 226 227 /* 228 * k = 1.257 229 * bf = fbw/_XTAL * br * k - 1 */ 230 231 bf = (fbw * br * 1257) / (_XTAL * 1000) - 1; 232 233 /* ensure correct values */ 234 if (bf > 62) 235 bf = 62; 236 237 buf_bf[1] = (bf << 1) & 0x7e; 238 buf_br[1] = (br << 2) & 0x7c; 239 deb_info("%s: BW=%d br=%u bf=%u\n", __func__, fbw, br, bf); 240 241 if (br != state->br) { 242 ret = zl10036_write(state, buf_br, sizeof(buf_br)); 243 if (ret < 0) 244 return ret; 245 } 246 247 if (bf != state->bf) { 248 ret = zl10036_write(state, buf_bf, sizeof(buf_bf)); 249 if (ret < 0) 250 return ret; 251 252 /* time = br/(32* fxtal) */ 253 /* minimal sleep time to be calculated 254 * maximum br is 63 -> max time = 2 /10 MHz = 2e-7 */ 255 msleep(1); 256 257 ret = zl10036_write(state, zl10036_rsd_off, 258 sizeof(zl10036_rsd_off)); 259 if (ret < 0) 260 return ret; 261 } 262 263 state->br = br; 264 state->bf = bf; 265 266 return 0; 267 } 268 269 static int zl10036_set_gain_params(struct zl10036_state *state, 270 int c) 271 { 272 u8 buf[2]; 273 u8 rfg, ba, bg; 274 275 /* default values */ 276 rfg = 0; /* enable when using an lna */ 277 ba = 1; 278 bg = 1; 279 280 /* reg 4 */ 281 buf[0] = 0x80 | ((rfg << 5) & 0x20) 282 | ((ba << 3) & 0x18) | ((bg << 1) & 0x06); 283 284 if (!state->config->rf_loop_enable) 285 buf[0] |= 0x01; 286 287 /* P0=0 */ 288 buf[1] = _RDIV_REG | ((c << 5) & 0x60); 289 290 deb_info("%s: c=%u rfg=%u ba=%u bg=%u\n", __func__, c, rfg, ba, bg); 291 return zl10036_write(state, buf, sizeof(buf)); 292 } 293 294 static int zl10036_set_params(struct dvb_frontend *fe) 295 { 296 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 297 struct zl10036_state *state = fe->tuner_priv; 298 int ret = 0; 299 u32 frequency = p->frequency; 300 u32 fbw; 301 int i; 302 u8 c; 303 304 /* ensure correct values 305 * maybe redundant as core already checks this */ 306 if ((frequency < fe->ops.info.frequency_min_hz / kHz) 307 || (frequency > fe->ops.info.frequency_max_hz / kHz)) 308 return -EINVAL; 309 310 /* 311 * alpha = 1.35 for dvb-s 312 * fBW = (alpha*symbolrate)/(2*0.8) 313 * 1.35 / (2*0.8) = 27 / 32 314 */ 315 fbw = (27 * p->symbol_rate) / 32; 316 317 /* scale to kHz */ 318 fbw /= 1000; 319 320 /* Add safe margin of 3MHz */ 321 fbw += 3000; 322 323 /* setting the charge pump - guessed values */ 324 if (frequency < 950000) 325 return -EINVAL; 326 else if (frequency < 1250000) 327 c = 0; 328 else if (frequency < 1750000) 329 c = 1; 330 else if (frequency < 2175000) 331 c = 2; 332 else 333 return -EINVAL; 334 335 if (fe->ops.i2c_gate_ctrl) 336 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */ 337 338 ret = zl10036_set_gain_params(state, c); 339 if (ret < 0) 340 goto error; 341 342 ret = zl10036_set_frequency(state, p->frequency); 343 if (ret < 0) 344 goto error; 345 346 ret = zl10036_set_bandwidth(state, fbw); 347 if (ret < 0) 348 goto error; 349 350 /* wait for tuner lock - no idea if this is really needed */ 351 for (i = 0; i < 20; i++) { 352 ret = zl10036_read_status_reg(state); 353 if (ret < 0) 354 goto error; 355 356 /* check Frequency & Phase Lock Bit */ 357 if (ret & STATUS_FL) 358 break; 359 360 msleep(10); 361 } 362 363 error: 364 if (fe->ops.i2c_gate_ctrl) 365 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */ 366 367 return ret; 368 } 369 370 static int zl10036_get_frequency(struct dvb_frontend *fe, u32 *frequency) 371 { 372 struct zl10036_state *state = fe->tuner_priv; 373 374 *frequency = state->frequency; 375 376 return 0; 377 } 378 379 static int zl10036_init_regs(struct zl10036_state *state) 380 { 381 int ret; 382 int i; 383 384 /* could also be one block from reg 2 to 13 and additional 10/11 */ 385 u8 zl10036_init_tab[][2] = { 386 { 0x04, 0x00 }, /* 2/3: div=0x400 - arbitrary value */ 387 { 0x8b, _RDIV_REG }, /* 4/5: rfg=0 ba=1 bg=1 len=? */ 388 /* p0=0 c=0 r=_RDIV_REG */ 389 { 0xc0, 0x20 }, /* 6/7: rsd=0 bf=0x10 */ 390 { 0xd3, 0x40 }, /* 8/9: from datasheet */ 391 { 0xe3, 0x5b }, /* 10/11: lock window level */ 392 { 0xf0, 0x28 }, /* 12/13: br=0xa clr=0 tl=0*/ 393 { 0xe3, 0xf9 }, /* 10/11: unlock window level */ 394 }; 395 396 /* invalid values to trigger writing */ 397 state->br = 0xff; 398 state->bf = 0xff; 399 400 if (!state->config->rf_loop_enable) 401 zl10036_init_tab[1][0] |= 0x01; 402 403 deb_info("%s\n", __func__); 404 405 for (i = 0; i < ARRAY_SIZE(zl10036_init_tab); i++) { 406 ret = zl10036_write(state, zl10036_init_tab[i], 2); 407 if (ret < 0) 408 return ret; 409 } 410 411 return 0; 412 } 413 414 static int zl10036_init(struct dvb_frontend *fe) 415 { 416 struct zl10036_state *state = fe->tuner_priv; 417 int ret = 0; 418 419 if (fe->ops.i2c_gate_ctrl) 420 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */ 421 422 ret = zl10036_read_status_reg(state); 423 if (ret < 0) 424 return ret; 425 426 /* Only init if Power-on-Reset bit is set? */ 427 ret = zl10036_init_regs(state); 428 429 if (fe->ops.i2c_gate_ctrl) 430 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */ 431 432 return ret; 433 } 434 435 static const struct dvb_tuner_ops zl10036_tuner_ops = { 436 .info = { 437 .name = "Zarlink ZL10036", 438 .frequency_min_hz = 950 * MHz, 439 .frequency_max_hz = 2175 * MHz 440 }, 441 .init = zl10036_init, 442 .release = zl10036_release, 443 .sleep = zl10036_sleep, 444 .set_params = zl10036_set_params, 445 .get_frequency = zl10036_get_frequency, 446 }; 447 448 struct dvb_frontend *zl10036_attach(struct dvb_frontend *fe, 449 const struct zl10036_config *config, 450 struct i2c_adapter *i2c) 451 { 452 struct zl10036_state *state; 453 int ret; 454 455 if (!config) { 456 printk(KERN_ERR "%s: no config specified", __func__); 457 return NULL; 458 } 459 460 state = kzalloc(sizeof(struct zl10036_state), GFP_KERNEL); 461 if (!state) 462 return NULL; 463 464 state->config = config; 465 state->i2c = i2c; 466 467 if (fe->ops.i2c_gate_ctrl) 468 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */ 469 470 ret = zl10036_read_status_reg(state); 471 if (ret < 0) { 472 printk(KERN_ERR "%s: No zl10036 found\n", __func__); 473 goto error; 474 } 475 476 ret = zl10036_init_regs(state); 477 if (ret < 0) { 478 printk(KERN_ERR "%s: tuner initialization failed\n", 479 __func__); 480 goto error; 481 } 482 483 if (fe->ops.i2c_gate_ctrl) 484 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */ 485 486 fe->tuner_priv = state; 487 488 memcpy(&fe->ops.tuner_ops, &zl10036_tuner_ops, 489 sizeof(struct dvb_tuner_ops)); 490 printk(KERN_INFO "%s: tuner initialization (%s addr=0x%02x) ok\n", 491 __func__, fe->ops.tuner_ops.info.name, config->tuner_address); 492 493 return fe; 494 495 error: 496 kfree(state); 497 return NULL; 498 } 499 EXPORT_SYMBOL_GPL(zl10036_attach); 500 501 module_param_named(debug, zl10036_debug, int, 0644); 502 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); 503 MODULE_DESCRIPTION("DVB ZL10036 driver"); 504 MODULE_AUTHOR("Tino Reichardt"); 505 MODULE_AUTHOR("Matthias Schwarzott"); 506 MODULE_LICENSE("GPL"); 507