1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* z0194a.h Sharp z0194a tuner support 3 * 4 * Copyright (C) 2008 Igor M. Liplianin (liplianin@me.by) 5 * 6 * see Documentation/media/dvb-drivers/dvb-usb.rst for more information 7 */ 8 9 #ifndef Z0194A 10 #define Z0194A 11 12 static int sharp_z0194a_set_symbol_rate(struct dvb_frontend *fe, 13 u32 srate, u32 ratio) 14 { 15 u8 aclk = 0; 16 u8 bclk = 0; 17 18 if (srate < 1500000) { 19 aclk = 0xb7; bclk = 0x47; } 20 else if (srate < 3000000) { 21 aclk = 0xb7; bclk = 0x4b; } 22 else if (srate < 7000000) { 23 aclk = 0xb7; bclk = 0x4f; } 24 else if (srate < 14000000) { 25 aclk = 0xb7; bclk = 0x53; } 26 else if (srate < 30000000) { 27 aclk = 0xb6; bclk = 0x53; } 28 else if (srate < 45000000) { 29 aclk = 0xb4; bclk = 0x51; } 30 31 stv0299_writereg(fe, 0x13, aclk); 32 stv0299_writereg(fe, 0x14, bclk); 33 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff); 34 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff); 35 stv0299_writereg(fe, 0x21, (ratio) & 0xf0); 36 37 return 0; 38 } 39 40 static u8 sharp_z0194a_inittab[] = { 41 0x01, 0x15, 42 0x02, 0x30, 43 0x03, 0x00, 44 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */ 45 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */ 46 0x06, 0x40, /* DAC not used, set to high impendance mode */ 47 0x07, 0x00, /* DAC LSB */ 48 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */ 49 0x09, 0x00, /* FIFO */ 50 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */ 51 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */ 52 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */ 53 0x10, 0x3f, /* AGC2 0x3d */ 54 0x11, 0x84, 55 0x12, 0xb9, 56 0x15, 0xc9, /* lock detector threshold */ 57 0x16, 0x00, 58 0x17, 0x00, 59 0x18, 0x00, 60 0x19, 0x00, 61 0x1a, 0x00, 62 0x1f, 0x50, 63 0x20, 0x00, 64 0x21, 0x00, 65 0x22, 0x00, 66 0x23, 0x00, 67 0x28, 0x00, /* out imp: normal out type: parallel FEC mode:0 */ 68 0x29, 0x1e, /* 1/2 threshold */ 69 0x2a, 0x14, /* 2/3 threshold */ 70 0x2b, 0x0f, /* 3/4 threshold */ 71 0x2c, 0x09, /* 5/6 threshold */ 72 0x2d, 0x05, /* 7/8 threshold */ 73 0x2e, 0x01, 74 0x31, 0x1f, /* test all FECs */ 75 0x32, 0x19, /* viterbi and synchro search */ 76 0x33, 0xfc, /* rs control */ 77 0x34, 0x93, /* error control */ 78 0x0f, 0x52, 79 0xff, 0xff 80 }; 81 82 #endif 83