1 /*
2     Montage Technology TS2020 - Silicon Tuner driver
3     Copyright (C) 2009-2012 Konstantin Dimitrov <kosio.dimitrov@gmail.com>
4 
5     Copyright (C) 2009-2012 TurboSight.com
6 
7     This program is free software; you can redistribute it and/or modify
8     it under the terms of the GNU General Public License as published by
9     the Free Software Foundation; either version 2 of the License, or
10     (at your option) any later version.
11 
12     This program is distributed in the hope that it will be useful,
13     but WITHOUT ANY WARRANTY; without even the implied warranty of
14     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15     GNU General Public License for more details.
16 
17     You should have received a copy of the GNU General Public License
18     along with this program; if not, write to the Free Software
19     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20  */
21 
22 #include "dvb_frontend.h"
23 #include "ts2020.h"
24 #include <linux/regmap.h>
25 #include <linux/math64.h>
26 
27 #define TS2020_XTAL_FREQ   27000 /* in kHz */
28 #define FREQ_OFFSET_LOW_SYM_RATE 3000
29 
30 struct ts2020_priv {
31 	struct i2c_client *client;
32 	struct mutex regmap_mutex;
33 	struct regmap_config regmap_config;
34 	struct regmap *regmap;
35 	struct dvb_frontend *fe;
36 	struct delayed_work stat_work;
37 	int (*get_agc_pwm)(struct dvb_frontend *fe, u8 *_agc_pwm);
38 	/* i2c details */
39 	struct i2c_adapter *i2c;
40 	int i2c_address;
41 	bool loop_through:1;
42 	u8 clk_out:2;
43 	u8 clk_out_div:5;
44 	bool dont_poll:1;
45 	u32 frequency_div; /* LO output divider switch frequency */
46 	u32 frequency_khz; /* actual used LO frequency */
47 #define TS2020_M88TS2020 0
48 #define TS2020_M88TS2022 1
49 	u8 tuner;
50 };
51 
52 struct ts2020_reg_val {
53 	u8 reg;
54 	u8 val;
55 };
56 
57 static void ts2020_stat_work(struct work_struct *work);
58 
59 static int ts2020_release(struct dvb_frontend *fe)
60 {
61 	struct ts2020_priv *priv = fe->tuner_priv;
62 	struct i2c_client *client = priv->client;
63 
64 	dev_dbg(&client->dev, "\n");
65 
66 	i2c_unregister_device(client);
67 	return 0;
68 }
69 
70 static int ts2020_sleep(struct dvb_frontend *fe)
71 {
72 	struct ts2020_priv *priv = fe->tuner_priv;
73 	int ret;
74 	u8 u8tmp;
75 
76 	if (priv->tuner == TS2020_M88TS2020)
77 		u8tmp = 0x0a; /* XXX: probably wrong */
78 	else
79 		u8tmp = 0x00;
80 
81 	ret = regmap_write(priv->regmap, u8tmp, 0x00);
82 	if (ret < 0)
83 		return ret;
84 
85 	/* stop statistics polling */
86 	if (!priv->dont_poll)
87 		cancel_delayed_work_sync(&priv->stat_work);
88 	return 0;
89 }
90 
91 static int ts2020_init(struct dvb_frontend *fe)
92 {
93 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
94 	struct ts2020_priv *priv = fe->tuner_priv;
95 	int i;
96 	u8 u8tmp;
97 
98 	if (priv->tuner == TS2020_M88TS2020) {
99 		regmap_write(priv->regmap, 0x42, 0x73);
100 		regmap_write(priv->regmap, 0x05, priv->clk_out_div);
101 		regmap_write(priv->regmap, 0x20, 0x27);
102 		regmap_write(priv->regmap, 0x07, 0x02);
103 		regmap_write(priv->regmap, 0x11, 0xff);
104 		regmap_write(priv->regmap, 0x60, 0xf9);
105 		regmap_write(priv->regmap, 0x08, 0x01);
106 		regmap_write(priv->regmap, 0x00, 0x41);
107 	} else {
108 		static const struct ts2020_reg_val reg_vals[] = {
109 			{0x7d, 0x9d},
110 			{0x7c, 0x9a},
111 			{0x7a, 0x76},
112 			{0x3b, 0x01},
113 			{0x63, 0x88},
114 			{0x61, 0x85},
115 			{0x22, 0x30},
116 			{0x30, 0x40},
117 			{0x20, 0x23},
118 			{0x24, 0x02},
119 			{0x12, 0xa0},
120 		};
121 
122 		regmap_write(priv->regmap, 0x00, 0x01);
123 		regmap_write(priv->regmap, 0x00, 0x03);
124 
125 		switch (priv->clk_out) {
126 		case TS2020_CLK_OUT_DISABLED:
127 			u8tmp = 0x60;
128 			break;
129 		case TS2020_CLK_OUT_ENABLED:
130 			u8tmp = 0x70;
131 			regmap_write(priv->regmap, 0x05, priv->clk_out_div);
132 			break;
133 		case TS2020_CLK_OUT_ENABLED_XTALOUT:
134 			u8tmp = 0x6c;
135 			break;
136 		default:
137 			u8tmp = 0x60;
138 			break;
139 		}
140 
141 		regmap_write(priv->regmap, 0x42, u8tmp);
142 
143 		if (priv->loop_through)
144 			u8tmp = 0xec;
145 		else
146 			u8tmp = 0x6c;
147 
148 		regmap_write(priv->regmap, 0x62, u8tmp);
149 
150 		for (i = 0; i < ARRAY_SIZE(reg_vals); i++)
151 			regmap_write(priv->regmap, reg_vals[i].reg,
152 				     reg_vals[i].val);
153 	}
154 
155 	/* Initialise v5 stats here */
156 	c->strength.len = 1;
157 	c->strength.stat[0].scale = FE_SCALE_DECIBEL;
158 	c->strength.stat[0].uvalue = 0;
159 
160 	/* Start statistics polling by invoking the work function */
161 	ts2020_stat_work(&priv->stat_work.work);
162 	return 0;
163 }
164 
165 static int ts2020_tuner_gate_ctrl(struct dvb_frontend *fe, u8 offset)
166 {
167 	struct ts2020_priv *priv = fe->tuner_priv;
168 	int ret;
169 	ret = regmap_write(priv->regmap, 0x51, 0x1f - offset);
170 	ret |= regmap_write(priv->regmap, 0x51, 0x1f);
171 	ret |= regmap_write(priv->regmap, 0x50, offset);
172 	ret |= regmap_write(priv->regmap, 0x50, 0x00);
173 	msleep(20);
174 	return ret;
175 }
176 
177 static int ts2020_set_tuner_rf(struct dvb_frontend *fe)
178 {
179 	struct ts2020_priv *dev = fe->tuner_priv;
180 	int ret;
181 	unsigned int utmp;
182 
183 	ret = regmap_read(dev->regmap, 0x3d, &utmp);
184 	utmp &= 0x7f;
185 	if (utmp < 0x16)
186 		utmp = 0xa1;
187 	else if (utmp == 0x16)
188 		utmp = 0x99;
189 	else
190 		utmp = 0xf9;
191 
192 	regmap_write(dev->regmap, 0x60, utmp);
193 	ret = ts2020_tuner_gate_ctrl(fe, 0x08);
194 
195 	return ret;
196 }
197 
198 static int ts2020_set_params(struct dvb_frontend *fe)
199 {
200 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
201 	struct ts2020_priv *priv = fe->tuner_priv;
202 	int ret;
203 	unsigned int utmp;
204 	u32 f3db, gdiv28;
205 	u16 u16tmp, value, lpf_coeff;
206 	u8 buf[3], reg10, lpf_mxdiv, mlpf_max, mlpf_min, nlpf;
207 	unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n;
208 	unsigned int frequency_khz = c->frequency;
209 
210 	/*
211 	 * Integer-N PLL synthesizer
212 	 * kHz is used for all calculations to keep calculations within 32-bit
213 	 */
214 	f_ref_khz = TS2020_XTAL_FREQ;
215 	div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000);
216 
217 	/* select LO output divider */
218 	if (frequency_khz < priv->frequency_div) {
219 		div_out = 4;
220 		reg10 = 0x10;
221 	} else {
222 		div_out = 2;
223 		reg10 = 0x00;
224 	}
225 
226 	f_vco_khz = frequency_khz * div_out;
227 	pll_n = f_vco_khz * div_ref / f_ref_khz;
228 	pll_n += pll_n % 2;
229 	priv->frequency_khz = pll_n * f_ref_khz / div_ref / div_out;
230 
231 	pr_debug("frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n",
232 		 priv->frequency_khz, priv->frequency_khz - c->frequency,
233 		 f_vco_khz, pll_n, div_ref, div_out);
234 
235 	if (priv->tuner == TS2020_M88TS2020) {
236 		lpf_coeff = 2766;
237 		reg10 |= 0x01;
238 		ret = regmap_write(priv->regmap, 0x10, reg10);
239 	} else {
240 		lpf_coeff = 3200;
241 		reg10 |= 0x0b;
242 		ret = regmap_write(priv->regmap, 0x10, reg10);
243 		ret |= regmap_write(priv->regmap, 0x11, 0x40);
244 	}
245 
246 	u16tmp = pll_n - 1024;
247 	buf[0] = (u16tmp >> 8) & 0xff;
248 	buf[1] = (u16tmp >> 0) & 0xff;
249 	buf[2] = div_ref - 8;
250 
251 	ret |= regmap_write(priv->regmap, 0x01, buf[0]);
252 	ret |= regmap_write(priv->regmap, 0x02, buf[1]);
253 	ret |= regmap_write(priv->regmap, 0x03, buf[2]);
254 
255 	ret |= ts2020_tuner_gate_ctrl(fe, 0x10);
256 	if (ret < 0)
257 		return -ENODEV;
258 
259 	ret |= ts2020_tuner_gate_ctrl(fe, 0x08);
260 
261 	/* Tuner RF */
262 	if (priv->tuner == TS2020_M88TS2020)
263 		ret |= ts2020_set_tuner_rf(fe);
264 
265 	gdiv28 = (TS2020_XTAL_FREQ / 1000 * 1694 + 500) / 1000;
266 	ret |= regmap_write(priv->regmap, 0x04, gdiv28 & 0xff);
267 	ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
268 	if (ret < 0)
269 		return -ENODEV;
270 
271 	if (priv->tuner == TS2020_M88TS2022) {
272 		ret = regmap_write(priv->regmap, 0x25, 0x00);
273 		ret |= regmap_write(priv->regmap, 0x27, 0x70);
274 		ret |= regmap_write(priv->regmap, 0x41, 0x09);
275 		ret |= regmap_write(priv->regmap, 0x08, 0x0b);
276 		if (ret < 0)
277 			return -ENODEV;
278 	}
279 
280 	regmap_read(priv->regmap, 0x26, &utmp);
281 	value = utmp;
282 
283 	f3db = (c->bandwidth_hz / 1000 / 2) + 2000;
284 	f3db += FREQ_OFFSET_LOW_SYM_RATE; /* FIXME: ~always too wide filter */
285 	f3db = clamp(f3db, 7000U, 40000U);
286 
287 	gdiv28 = gdiv28 * 207 / (value * 2 + 151);
288 	mlpf_max = gdiv28 * 135 / 100;
289 	mlpf_min = gdiv28 * 78 / 100;
290 	if (mlpf_max > 63)
291 		mlpf_max = 63;
292 
293 	nlpf = (f3db * gdiv28 * 2 / lpf_coeff /
294 		(TS2020_XTAL_FREQ / 1000)  + 1) / 2;
295 	if (nlpf > 23)
296 		nlpf = 23;
297 	if (nlpf < 1)
298 		nlpf = 1;
299 
300 	lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
301 		* lpf_coeff * 2  / f3db + 1) / 2;
302 
303 	if (lpf_mxdiv < mlpf_min) {
304 		nlpf++;
305 		lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
306 			* lpf_coeff * 2  / f3db + 1) / 2;
307 	}
308 
309 	if (lpf_mxdiv > mlpf_max)
310 		lpf_mxdiv = mlpf_max;
311 
312 	ret = regmap_write(priv->regmap, 0x04, lpf_mxdiv);
313 	ret |= regmap_write(priv->regmap, 0x06, nlpf);
314 
315 	ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
316 
317 	ret |= ts2020_tuner_gate_ctrl(fe, 0x01);
318 
319 	msleep(80);
320 
321 	return (ret < 0) ? -EINVAL : 0;
322 }
323 
324 static int ts2020_get_frequency(struct dvb_frontend *fe, u32 *frequency)
325 {
326 	struct ts2020_priv *priv = fe->tuner_priv;
327 
328 	*frequency = priv->frequency_khz;
329 	return 0;
330 }
331 
332 static int ts2020_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
333 {
334 	*frequency = 0; /* Zero-IF */
335 	return 0;
336 }
337 
338 /*
339  * Get the tuner gain.
340  * @fe: The front end for which we're determining the gain
341  * @v_agc: The voltage of the AGC from the demodulator (0-2600mV)
342  * @_gain: Where to store the gain (in 0.001dB units)
343  *
344  * Returns 0 or a negative error code.
345  */
346 static int ts2020_read_tuner_gain(struct dvb_frontend *fe, unsigned v_agc,
347 				  __s64 *_gain)
348 {
349 	struct ts2020_priv *priv = fe->tuner_priv;
350 	unsigned long gain1, gain2, gain3;
351 	unsigned utmp;
352 	int ret;
353 
354 	/* Read the RF gain */
355 	ret = regmap_read(priv->regmap, 0x3d, &utmp);
356 	if (ret < 0)
357 		return ret;
358 	gain1 = utmp & 0x1f;
359 
360 	/* Read the baseband gain */
361 	ret = regmap_read(priv->regmap, 0x21, &utmp);
362 	if (ret < 0)
363 		return ret;
364 	gain2 = utmp & 0x1f;
365 
366 	switch (priv->tuner) {
367 	case TS2020_M88TS2020:
368 		gain1 = clamp_t(long, gain1, 0, 15);
369 		gain2 = clamp_t(long, gain2, 0, 13);
370 		v_agc = clamp_t(long, v_agc, 400, 1100);
371 
372 		*_gain = -(gain1 * 2330 +
373 			   gain2 * 3500 +
374 			   v_agc * 24 / 10 * 10 +
375 			   10000);
376 		/* gain in range -19600 to -116850 in units of 0.001dB */
377 		break;
378 
379 	case TS2020_M88TS2022:
380 		ret = regmap_read(priv->regmap, 0x66, &utmp);
381 		if (ret < 0)
382 			return ret;
383 		gain3 = (utmp >> 3) & 0x07;
384 
385 		gain1 = clamp_t(long, gain1, 0, 15);
386 		gain2 = clamp_t(long, gain2, 2, 16);
387 		gain3 = clamp_t(long, gain3, 0, 6);
388 		v_agc = clamp_t(long, v_agc, 600, 1600);
389 
390 		*_gain = -(gain1 * 2650 +
391 			   gain2 * 3380 +
392 			   gain3 * 2850 +
393 			   v_agc * 176 / 100 * 10 -
394 			   30000);
395 		/* gain in range -47320 to -158950 in units of 0.001dB */
396 		break;
397 	}
398 
399 	return 0;
400 }
401 
402 /*
403  * Get the AGC information from the demodulator and use that to calculate the
404  * tuner gain.
405  */
406 static int ts2020_get_tuner_gain(struct dvb_frontend *fe, __s64 *_gain)
407 {
408 	struct ts2020_priv *priv = fe->tuner_priv;
409 	int v_agc = 0, ret;
410 	u8 agc_pwm;
411 
412 	/* Read the AGC PWM rate from the demodulator */
413 	if (priv->get_agc_pwm) {
414 		ret = priv->get_agc_pwm(fe, &agc_pwm);
415 		if (ret < 0)
416 			return ret;
417 
418 		switch (priv->tuner) {
419 		case TS2020_M88TS2020:
420 			v_agc = (int)agc_pwm * 20 - 1166;
421 			break;
422 		case TS2020_M88TS2022:
423 			v_agc = (int)agc_pwm * 16 - 670;
424 			break;
425 		}
426 
427 		if (v_agc < 0)
428 			v_agc = 0;
429 	}
430 
431 	return ts2020_read_tuner_gain(fe, v_agc, _gain);
432 }
433 
434 /*
435  * Gather statistics on a regular basis
436  */
437 static void ts2020_stat_work(struct work_struct *work)
438 {
439 	struct ts2020_priv *priv = container_of(work, struct ts2020_priv,
440 					       stat_work.work);
441 	struct i2c_client *client = priv->client;
442 	struct dtv_frontend_properties *c = &priv->fe->dtv_property_cache;
443 	int ret;
444 
445 	dev_dbg(&client->dev, "\n");
446 
447 	ret = ts2020_get_tuner_gain(priv->fe, &c->strength.stat[0].svalue);
448 	if (ret < 0)
449 		goto err;
450 
451 	c->strength.stat[0].scale = FE_SCALE_DECIBEL;
452 
453 	if (!priv->dont_poll)
454 		schedule_delayed_work(&priv->stat_work, msecs_to_jiffies(2000));
455 	return;
456 err:
457 	dev_dbg(&client->dev, "failed=%d\n", ret);
458 }
459 
460 /*
461  * Read TS2020 signal strength in v3 format.
462  */
463 static int ts2020_read_signal_strength(struct dvb_frontend *fe,
464 				       u16 *_signal_strength)
465 {
466 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
467 	struct ts2020_priv *priv = fe->tuner_priv;
468 	unsigned strength;
469 	__s64 gain;
470 
471 	if (priv->dont_poll)
472 		ts2020_stat_work(&priv->stat_work.work);
473 
474 	if (c->strength.stat[0].scale == FE_SCALE_NOT_AVAILABLE) {
475 		*_signal_strength = 0;
476 		return 0;
477 	}
478 
479 	gain = c->strength.stat[0].svalue;
480 
481 	/* Calculate the signal strength based on the total gain of the tuner */
482 	if (gain < -85000)
483 		/* 0%: no signal or weak signal */
484 		strength = 0;
485 	else if (gain < -65000)
486 		/* 0% - 60%: weak signal */
487 		strength = 0 + div64_s64((85000 + gain) * 3, 1000);
488 	else if (gain < -45000)
489 		/* 60% - 90%: normal signal */
490 		strength = 60 + div64_s64((65000 + gain) * 3, 2000);
491 	else
492 		/* 90% - 99%: strong signal */
493 		strength = 90 + div64_s64((45000 + gain), 5000);
494 
495 	*_signal_strength = strength * 65535 / 100;
496 	return 0;
497 }
498 
499 static struct dvb_tuner_ops ts2020_tuner_ops = {
500 	.info = {
501 		.name = "TS2020",
502 		.frequency_min = 950000,
503 		.frequency_max = 2150000
504 	},
505 	.init = ts2020_init,
506 	.release = ts2020_release,
507 	.sleep = ts2020_sleep,
508 	.set_params = ts2020_set_params,
509 	.get_frequency = ts2020_get_frequency,
510 	.get_if_frequency = ts2020_get_if_frequency,
511 	.get_rf_strength = ts2020_read_signal_strength,
512 };
513 
514 struct dvb_frontend *ts2020_attach(struct dvb_frontend *fe,
515 					const struct ts2020_config *config,
516 					struct i2c_adapter *i2c)
517 {
518 	struct i2c_client *client;
519 	struct i2c_board_info board_info;
520 
521 	/* This is only used by ts2020_probe() so can be on the stack */
522 	struct ts2020_config pdata;
523 
524 	memcpy(&pdata, config, sizeof(pdata));
525 	pdata.fe = fe;
526 	pdata.attach_in_use = true;
527 
528 	memset(&board_info, 0, sizeof(board_info));
529 	strlcpy(board_info.type, "ts2020", I2C_NAME_SIZE);
530 	board_info.addr = config->tuner_address;
531 	board_info.platform_data = &pdata;
532 	client = i2c_new_device(i2c, &board_info);
533 	if (!client || !client->dev.driver)
534 		return NULL;
535 
536 	return fe;
537 }
538 EXPORT_SYMBOL(ts2020_attach);
539 
540 /*
541  * We implement own regmap locking due to legacy DVB attach which uses frontend
542  * gate control callback to control I2C bus access. We can open / close gate and
543  * serialize whole open / I2C-operation / close sequence at the same.
544  */
545 static void ts2020_regmap_lock(void *__dev)
546 {
547 	struct ts2020_priv *dev = __dev;
548 
549 	mutex_lock(&dev->regmap_mutex);
550 	if (dev->fe->ops.i2c_gate_ctrl)
551 		dev->fe->ops.i2c_gate_ctrl(dev->fe, 1);
552 }
553 
554 static void ts2020_regmap_unlock(void *__dev)
555 {
556 	struct ts2020_priv *dev = __dev;
557 
558 	if (dev->fe->ops.i2c_gate_ctrl)
559 		dev->fe->ops.i2c_gate_ctrl(dev->fe, 0);
560 	mutex_unlock(&dev->regmap_mutex);
561 }
562 
563 static int ts2020_probe(struct i2c_client *client,
564 		const struct i2c_device_id *id)
565 {
566 	struct ts2020_config *pdata = client->dev.platform_data;
567 	struct dvb_frontend *fe = pdata->fe;
568 	struct ts2020_priv *dev;
569 	int ret;
570 	u8 u8tmp;
571 	unsigned int utmp;
572 	char *chip_str;
573 
574 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
575 	if (!dev) {
576 		ret = -ENOMEM;
577 		goto err;
578 	}
579 
580 	/* create regmap */
581 	mutex_init(&dev->regmap_mutex);
582 	dev->regmap_config.reg_bits = 8,
583 	dev->regmap_config.val_bits = 8,
584 	dev->regmap_config.lock = ts2020_regmap_lock,
585 	dev->regmap_config.unlock = ts2020_regmap_unlock,
586 	dev->regmap_config.lock_arg = dev,
587 	dev->regmap = regmap_init_i2c(client, &dev->regmap_config);
588 	if (IS_ERR(dev->regmap)) {
589 		ret = PTR_ERR(dev->regmap);
590 		goto err_kfree;
591 	}
592 
593 	dev->i2c = client->adapter;
594 	dev->i2c_address = client->addr;
595 	dev->loop_through = pdata->loop_through;
596 	dev->clk_out = pdata->clk_out;
597 	dev->clk_out_div = pdata->clk_out_div;
598 	dev->dont_poll = pdata->dont_poll;
599 	dev->frequency_div = pdata->frequency_div;
600 	dev->fe = fe;
601 	dev->get_agc_pwm = pdata->get_agc_pwm;
602 	fe->tuner_priv = dev;
603 	dev->client = client;
604 	INIT_DELAYED_WORK(&dev->stat_work, ts2020_stat_work);
605 
606 	/* check if the tuner is there */
607 	ret = regmap_read(dev->regmap, 0x00, &utmp);
608 	if (ret)
609 		goto err_regmap_exit;
610 
611 	if ((utmp & 0x03) == 0x00) {
612 		ret = regmap_write(dev->regmap, 0x00, 0x01);
613 		if (ret)
614 			goto err_regmap_exit;
615 
616 		usleep_range(2000, 50000);
617 	}
618 
619 	ret = regmap_write(dev->regmap, 0x00, 0x03);
620 	if (ret)
621 		goto err_regmap_exit;
622 
623 	usleep_range(2000, 50000);
624 
625 	ret = regmap_read(dev->regmap, 0x00, &utmp);
626 	if (ret)
627 		goto err_regmap_exit;
628 
629 	dev_dbg(&client->dev, "chip_id=%02x\n", utmp);
630 
631 	switch (utmp) {
632 	case 0x01:
633 	case 0x41:
634 	case 0x81:
635 		dev->tuner = TS2020_M88TS2020;
636 		chip_str = "TS2020";
637 		if (!dev->frequency_div)
638 			dev->frequency_div = 1060000;
639 		break;
640 	case 0xc3:
641 	case 0x83:
642 		dev->tuner = TS2020_M88TS2022;
643 		chip_str = "TS2022";
644 		if (!dev->frequency_div)
645 			dev->frequency_div = 1103000;
646 		break;
647 	default:
648 		ret = -ENODEV;
649 		goto err_regmap_exit;
650 	}
651 
652 	if (dev->tuner == TS2020_M88TS2022) {
653 		switch (dev->clk_out) {
654 		case TS2020_CLK_OUT_DISABLED:
655 			u8tmp = 0x60;
656 			break;
657 		case TS2020_CLK_OUT_ENABLED:
658 			u8tmp = 0x70;
659 			ret = regmap_write(dev->regmap, 0x05, dev->clk_out_div);
660 			if (ret)
661 				goto err_regmap_exit;
662 			break;
663 		case TS2020_CLK_OUT_ENABLED_XTALOUT:
664 			u8tmp = 0x6c;
665 			break;
666 		default:
667 			ret = -EINVAL;
668 			goto err_regmap_exit;
669 		}
670 
671 		ret = regmap_write(dev->regmap, 0x42, u8tmp);
672 		if (ret)
673 			goto err_regmap_exit;
674 
675 		if (dev->loop_through)
676 			u8tmp = 0xec;
677 		else
678 			u8tmp = 0x6c;
679 
680 		ret = regmap_write(dev->regmap, 0x62, u8tmp);
681 		if (ret)
682 			goto err_regmap_exit;
683 	}
684 
685 	/* sleep */
686 	ret = regmap_write(dev->regmap, 0x00, 0x00);
687 	if (ret)
688 		goto err_regmap_exit;
689 
690 	dev_info(&client->dev,
691 		 "Montage Technology %s successfully identified\n", chip_str);
692 
693 	memcpy(&fe->ops.tuner_ops, &ts2020_tuner_ops,
694 			sizeof(struct dvb_tuner_ops));
695 	if (!pdata->attach_in_use)
696 		fe->ops.tuner_ops.release = NULL;
697 
698 	i2c_set_clientdata(client, dev);
699 	return 0;
700 err_regmap_exit:
701 	regmap_exit(dev->regmap);
702 err_kfree:
703 	kfree(dev);
704 err:
705 	dev_dbg(&client->dev, "failed=%d\n", ret);
706 	return ret;
707 }
708 
709 static int ts2020_remove(struct i2c_client *client)
710 {
711 	struct ts2020_priv *dev = i2c_get_clientdata(client);
712 
713 	dev_dbg(&client->dev, "\n");
714 
715 	/* stop statistics polling */
716 	if (!dev->dont_poll)
717 		cancel_delayed_work_sync(&dev->stat_work);
718 
719 	regmap_exit(dev->regmap);
720 	kfree(dev);
721 	return 0;
722 }
723 
724 static const struct i2c_device_id ts2020_id_table[] = {
725 	{"ts2020", 0},
726 	{"ts2022", 0},
727 	{}
728 };
729 MODULE_DEVICE_TABLE(i2c, ts2020_id_table);
730 
731 static struct i2c_driver ts2020_driver = {
732 	.driver = {
733 		.name	= "ts2020",
734 	},
735 	.probe		= ts2020_probe,
736 	.remove		= ts2020_remove,
737 	.id_table	= ts2020_id_table,
738 };
739 
740 module_i2c_driver(ts2020_driver);
741 
742 MODULE_AUTHOR("Konstantin Dimitrov <kosio.dimitrov@gmail.com>");
743 MODULE_DESCRIPTION("Montage Technology TS2020 - Silicon tuner driver module");
744 MODULE_LICENSE("GPL");
745