174ba9207SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
29a0bf528SMauro Carvalho Chehab /*
39a0bf528SMauro Carvalho Chehab 	TDA8261 8PSK/QPSK tuner driver
49a0bf528SMauro Carvalho Chehab 	Copyright (C) Manu Abraham (abraham.manu@gmail.com)
59a0bf528SMauro Carvalho Chehab 
69a0bf528SMauro Carvalho Chehab */
79a0bf528SMauro Carvalho Chehab 
89a0bf528SMauro Carvalho Chehab 
99a0bf528SMauro Carvalho Chehab #include <linux/init.h>
109a0bf528SMauro Carvalho Chehab #include <linux/kernel.h>
119a0bf528SMauro Carvalho Chehab #include <linux/module.h>
129a0bf528SMauro Carvalho Chehab #include <linux/slab.h>
139a0bf528SMauro Carvalho Chehab 
14fada1935SMauro Carvalho Chehab #include <media/dvb_frontend.h>
159a0bf528SMauro Carvalho Chehab #include "tda8261.h"
169a0bf528SMauro Carvalho Chehab 
179a0bf528SMauro Carvalho Chehab struct tda8261_state {
189a0bf528SMauro Carvalho Chehab 	struct dvb_frontend		*fe;
199a0bf528SMauro Carvalho Chehab 	struct i2c_adapter		*i2c;
209a0bf528SMauro Carvalho Chehab 	const struct tda8261_config	*config;
219a0bf528SMauro Carvalho Chehab 
229a0bf528SMauro Carvalho Chehab 	/* state cache */
239a0bf528SMauro Carvalho Chehab 	u32 frequency;
249a0bf528SMauro Carvalho Chehab 	u32 bandwidth;
259a0bf528SMauro Carvalho Chehab };
269a0bf528SMauro Carvalho Chehab 
tda8261_read(struct tda8261_state * state,u8 * buf)279a0bf528SMauro Carvalho Chehab static int tda8261_read(struct tda8261_state *state, u8 *buf)
289a0bf528SMauro Carvalho Chehab {
299a0bf528SMauro Carvalho Chehab 	const struct tda8261_config *config = state->config;
309a0bf528SMauro Carvalho Chehab 	int err = 0;
319a0bf528SMauro Carvalho Chehab 	struct i2c_msg msg = { .addr	= config->addr, .flags = I2C_M_RD,.buf = buf,  .len = 1 };
329a0bf528SMauro Carvalho Chehab 
339a0bf528SMauro Carvalho Chehab 	if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1)
34eb2e2652SAlan Cox 		pr_err("%s: read error, err=%d\n", __func__, err);
359a0bf528SMauro Carvalho Chehab 
369a0bf528SMauro Carvalho Chehab 	return err;
379a0bf528SMauro Carvalho Chehab }
389a0bf528SMauro Carvalho Chehab 
tda8261_write(struct tda8261_state * state,u8 * buf)399a0bf528SMauro Carvalho Chehab static int tda8261_write(struct tda8261_state *state, u8 *buf)
409a0bf528SMauro Carvalho Chehab {
419a0bf528SMauro Carvalho Chehab 	const struct tda8261_config *config = state->config;
429a0bf528SMauro Carvalho Chehab 	int err = 0;
439a0bf528SMauro Carvalho Chehab 	struct i2c_msg msg = { .addr = config->addr, .flags = 0, .buf = buf, .len = 4 };
449a0bf528SMauro Carvalho Chehab 
459a0bf528SMauro Carvalho Chehab 	if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1)
46eb2e2652SAlan Cox 		pr_err("%s: write error, err=%d\n", __func__, err);
479a0bf528SMauro Carvalho Chehab 
489a0bf528SMauro Carvalho Chehab 	return err;
499a0bf528SMauro Carvalho Chehab }
509a0bf528SMauro Carvalho Chehab 
tda8261_get_status(struct dvb_frontend * fe,u32 * status)519a0bf528SMauro Carvalho Chehab static int tda8261_get_status(struct dvb_frontend *fe, u32 *status)
529a0bf528SMauro Carvalho Chehab {
539a0bf528SMauro Carvalho Chehab 	struct tda8261_state *state = fe->tuner_priv;
549a0bf528SMauro Carvalho Chehab 	u8 result = 0;
559a0bf528SMauro Carvalho Chehab 	int err = 0;
569a0bf528SMauro Carvalho Chehab 
579a0bf528SMauro Carvalho Chehab 	*status = 0;
589a0bf528SMauro Carvalho Chehab 
599a0bf528SMauro Carvalho Chehab 	if ((err = tda8261_read(state, &result)) < 0) {
60eb2e2652SAlan Cox 		pr_err("%s: I/O Error\n", __func__);
619a0bf528SMauro Carvalho Chehab 		return err;
629a0bf528SMauro Carvalho Chehab 	}
639a0bf528SMauro Carvalho Chehab 	if ((result >> 6) & 0x01) {
64eb2e2652SAlan Cox 		pr_debug("%s: Tuner Phase Locked\n", __func__);
659a0bf528SMauro Carvalho Chehab 		*status = 1;
669a0bf528SMauro Carvalho Chehab 	}
679a0bf528SMauro Carvalho Chehab 
689a0bf528SMauro Carvalho Chehab 	return err;
699a0bf528SMauro Carvalho Chehab }
709a0bf528SMauro Carvalho Chehab 
719a0bf528SMauro Carvalho Chehab static const u32 div_tab[] = { 2000, 1000,  500,  250,  125 }; /* kHz */
729a0bf528SMauro Carvalho Chehab static const u8  ref_div[] = { 0x00, 0x01, 0x02, 0x05, 0x07 };
739a0bf528SMauro Carvalho Chehab 
tda8261_get_frequency(struct dvb_frontend * fe,u32 * frequency)74e417668dSMauro Carvalho Chehab static int tda8261_get_frequency(struct dvb_frontend *fe, u32 *frequency)
759a0bf528SMauro Carvalho Chehab {
769a0bf528SMauro Carvalho Chehab 	struct tda8261_state *state = fe->tuner_priv;
779a0bf528SMauro Carvalho Chehab 
78e417668dSMauro Carvalho Chehab 	*frequency = state->frequency;
79e417668dSMauro Carvalho Chehab 
80e417668dSMauro Carvalho Chehab 	return 0;
819a0bf528SMauro Carvalho Chehab }
829a0bf528SMauro Carvalho Chehab 
tda8261_set_params(struct dvb_frontend * fe)83e417668dSMauro Carvalho Chehab static int tda8261_set_params(struct dvb_frontend *fe)
849a0bf528SMauro Carvalho Chehab {
85e417668dSMauro Carvalho Chehab 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
869a0bf528SMauro Carvalho Chehab 	struct tda8261_state *state = fe->tuner_priv;
879a0bf528SMauro Carvalho Chehab 	const struct tda8261_config *config = state->config;
889a0bf528SMauro Carvalho Chehab 	u32 frequency, N, status = 0;
899a0bf528SMauro Carvalho Chehab 	u8 buf[4];
909a0bf528SMauro Carvalho Chehab 	int err = 0;
919a0bf528SMauro Carvalho Chehab 
92e417668dSMauro Carvalho Chehab 	/*
939a0bf528SMauro Carvalho Chehab 	 * N = Max VCO Frequency / Channel Spacing
949a0bf528SMauro Carvalho Chehab 	 * Max VCO Frequency = VCO frequency + (channel spacing - 1)
959a0bf528SMauro Carvalho Chehab 	 * (to account for half channel spacing on either side)
969a0bf528SMauro Carvalho Chehab 	 */
97e417668dSMauro Carvalho Chehab 	frequency = c->frequency;
989a0bf528SMauro Carvalho Chehab 	if ((frequency < 950000) || (frequency > 2150000)) {
99e417668dSMauro Carvalho Chehab 		pr_warn("%s: Frequency beyond limits, frequency=%d\n",
100e417668dSMauro Carvalho Chehab 			__func__, frequency);
1019a0bf528SMauro Carvalho Chehab 		return -EINVAL;
1029a0bf528SMauro Carvalho Chehab 	}
1039a0bf528SMauro Carvalho Chehab 	N = (frequency + (div_tab[config->step_size] - 1)) / div_tab[config->step_size];
104eb2e2652SAlan Cox 	pr_debug("%s: Step size=%d, Divider=%d, PG=0x%02x (%d)\n",
1059a0bf528SMauro Carvalho Chehab 		__func__, config->step_size, div_tab[config->step_size], N, N);
1069a0bf528SMauro Carvalho Chehab 
1079a0bf528SMauro Carvalho Chehab 	buf[0] = (N >> 8) & 0xff;
1089a0bf528SMauro Carvalho Chehab 	buf[1] = N & 0xff;
1099a0bf528SMauro Carvalho Chehab 	buf[2] = (0x01 << 7) | ((ref_div[config->step_size] & 0x07) << 1);
1109a0bf528SMauro Carvalho Chehab 
1119a0bf528SMauro Carvalho Chehab 	if (frequency < 1450000)
1129a0bf528SMauro Carvalho Chehab 		buf[3] = 0x00;
1139a0bf528SMauro Carvalho Chehab 	else if (frequency < 2000000)
1149a0bf528SMauro Carvalho Chehab 		buf[3] = 0x40;
1159a0bf528SMauro Carvalho Chehab 	else if (frequency < 2150000)
1169a0bf528SMauro Carvalho Chehab 		buf[3] = 0x80;
1179a0bf528SMauro Carvalho Chehab 
1189a0bf528SMauro Carvalho Chehab 	/* Set params */
119e417668dSMauro Carvalho Chehab 	err = tda8261_write(state, buf);
120e417668dSMauro Carvalho Chehab 	if (err < 0) {
121eb2e2652SAlan Cox 		pr_err("%s: I/O Error\n", __func__);
1229a0bf528SMauro Carvalho Chehab 		return err;
1239a0bf528SMauro Carvalho Chehab 	}
1249a0bf528SMauro Carvalho Chehab 	/* sleep for some time */
125eb2e2652SAlan Cox 	pr_debug("%s: Waiting to Phase LOCK\n", __func__);
1269a0bf528SMauro Carvalho Chehab 	msleep(20);
1279a0bf528SMauro Carvalho Chehab 	/* check status */
1289a0bf528SMauro Carvalho Chehab 	if ((err = tda8261_get_status(fe, &status)) < 0) {
129eb2e2652SAlan Cox 		pr_err("%s: I/O Error\n", __func__);
1309a0bf528SMauro Carvalho Chehab 		return err;
1319a0bf528SMauro Carvalho Chehab 	}
1329a0bf528SMauro Carvalho Chehab 	if (status == 1) {
133e417668dSMauro Carvalho Chehab 		pr_debug("%s: Tuner Phase locked: status=%d\n", __func__,
134e417668dSMauro Carvalho Chehab 			 status);
1359a0bf528SMauro Carvalho Chehab 		state->frequency = frequency; /* cache successful state */
1369a0bf528SMauro Carvalho Chehab 	} else {
137eb2e2652SAlan Cox 		pr_debug("%s: No Phase lock: status=%d\n", __func__, status);
1389a0bf528SMauro Carvalho Chehab 	}
1399a0bf528SMauro Carvalho Chehab 
1409a0bf528SMauro Carvalho Chehab 	return 0;
1419a0bf528SMauro Carvalho Chehab }
1429a0bf528SMauro Carvalho Chehab 
tda8261_release(struct dvb_frontend * fe)143f2709c20SMauro Carvalho Chehab static void tda8261_release(struct dvb_frontend *fe)
144f2709c20SMauro Carvalho Chehab {
145f2709c20SMauro Carvalho Chehab 	struct tda8261_state *state = fe->tuner_priv;
146f2709c20SMauro Carvalho Chehab 
147f2709c20SMauro Carvalho Chehab 	fe->tuner_priv = NULL;
148f2709c20SMauro Carvalho Chehab 	kfree(state);
149f2709c20SMauro Carvalho Chehab }
150f2709c20SMauro Carvalho Chehab 
15114c4bf3cSJulia Lawall static const struct dvb_tuner_ops tda8261_ops = {
1529a0bf528SMauro Carvalho Chehab 
1539a0bf528SMauro Carvalho Chehab 	.info = {
1549a0bf528SMauro Carvalho Chehab 		.name		   = "TDA8261",
155a3f90c75SMauro Carvalho Chehab 		.frequency_min_hz  =  950 * MHz,
156a3f90c75SMauro Carvalho Chehab 		.frequency_max_hz  = 2150 * MHz,
1579a0bf528SMauro Carvalho Chehab 	},
1589a0bf528SMauro Carvalho Chehab 
159e417668dSMauro Carvalho Chehab 	.set_params	= tda8261_set_params,
160e417668dSMauro Carvalho Chehab 	.get_frequency	= tda8261_get_frequency,
1619a0bf528SMauro Carvalho Chehab 	.get_status	= tda8261_get_status,
162f2709c20SMauro Carvalho Chehab 	.release	= tda8261_release
1639a0bf528SMauro Carvalho Chehab };
1649a0bf528SMauro Carvalho Chehab 
tda8261_attach(struct dvb_frontend * fe,const struct tda8261_config * config,struct i2c_adapter * i2c)1659a0bf528SMauro Carvalho Chehab struct dvb_frontend *tda8261_attach(struct dvb_frontend *fe,
1669a0bf528SMauro Carvalho Chehab 				    const struct tda8261_config *config,
1679a0bf528SMauro Carvalho Chehab 				    struct i2c_adapter *i2c)
1689a0bf528SMauro Carvalho Chehab {
1699a0bf528SMauro Carvalho Chehab 	struct tda8261_state *state = NULL;
1709a0bf528SMauro Carvalho Chehab 
1719a0bf528SMauro Carvalho Chehab 	if ((state = kzalloc(sizeof (struct tda8261_state), GFP_KERNEL)) == NULL)
1729a0bf528SMauro Carvalho Chehab 		goto exit;
1739a0bf528SMauro Carvalho Chehab 
1749a0bf528SMauro Carvalho Chehab 	state->config		= config;
1759a0bf528SMauro Carvalho Chehab 	state->i2c		= i2c;
1769a0bf528SMauro Carvalho Chehab 	state->fe		= fe;
1779a0bf528SMauro Carvalho Chehab 	fe->tuner_priv		= state;
1789a0bf528SMauro Carvalho Chehab 	fe->ops.tuner_ops	= tda8261_ops;
1799a0bf528SMauro Carvalho Chehab 
180a3f90c75SMauro Carvalho Chehab 	fe->ops.tuner_ops.info.frequency_step_hz = div_tab[config->step_size] * kHz;
1819a0bf528SMauro Carvalho Chehab 
182eb2e2652SAlan Cox 	pr_info("%s: Attaching TDA8261 8PSK/QPSK tuner\n", __func__);
1839a0bf528SMauro Carvalho Chehab 
1849a0bf528SMauro Carvalho Chehab 	return fe;
1859a0bf528SMauro Carvalho Chehab 
1869a0bf528SMauro Carvalho Chehab exit:
1879a0bf528SMauro Carvalho Chehab 	kfree(state);
1889a0bf528SMauro Carvalho Chehab 	return NULL;
1899a0bf528SMauro Carvalho Chehab }
1909a0bf528SMauro Carvalho Chehab 
191*86495af1SGreg Kroah-Hartman EXPORT_SYMBOL_GPL(tda8261_attach);
1929a0bf528SMauro Carvalho Chehab 
1939a0bf528SMauro Carvalho Chehab MODULE_AUTHOR("Manu Abraham");
1949a0bf528SMauro Carvalho Chehab MODULE_DESCRIPTION("TDA8261 8PSK/QPSK Tuner");
1959a0bf528SMauro Carvalho Chehab MODULE_LICENSE("GPL");
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