1 /* 2 Driver for Philips tda10086 DVBS Demodulator 3 4 (c) 2006 Andrew de Quincey 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 2 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 21 */ 22 23 #include <linux/init.h> 24 #include <linux/module.h> 25 #include <linux/device.h> 26 #include <linux/jiffies.h> 27 #include <linux/string.h> 28 #include <linux/slab.h> 29 30 #include "dvb_frontend.h" 31 #include "tda10086.h" 32 33 #define SACLK 96000000 34 35 struct tda10086_state { 36 struct i2c_adapter* i2c; 37 const struct tda10086_config* config; 38 struct dvb_frontend frontend; 39 40 /* private demod data */ 41 u32 frequency; 42 u32 symbol_rate; 43 bool has_lock; 44 }; 45 46 static int debug; 47 #define dprintk(args...) \ 48 do { \ 49 if (debug) printk(KERN_DEBUG "tda10086: " args); \ 50 } while (0) 51 52 static int tda10086_write_byte(struct tda10086_state *state, int reg, int data) 53 { 54 int ret; 55 u8 b0[] = { reg, data }; 56 struct i2c_msg msg = { .flags = 0, .buf = b0, .len = 2 }; 57 58 msg.addr = state->config->demod_address; 59 ret = i2c_transfer(state->i2c, &msg, 1); 60 61 if (ret != 1) 62 dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n", 63 __func__, reg, data, ret); 64 65 return (ret != 1) ? ret : 0; 66 } 67 68 static int tda10086_read_byte(struct tda10086_state *state, int reg) 69 { 70 int ret; 71 u8 b0[] = { reg }; 72 u8 b1[] = { 0 }; 73 struct i2c_msg msg[] = {{ .flags = 0, .buf = b0, .len = 1 }, 74 { .flags = I2C_M_RD, .buf = b1, .len = 1 }}; 75 76 msg[0].addr = state->config->demod_address; 77 msg[1].addr = state->config->demod_address; 78 ret = i2c_transfer(state->i2c, msg, 2); 79 80 if (ret != 2) { 81 dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg, 82 ret); 83 return ret; 84 } 85 86 return b1[0]; 87 } 88 89 static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask, int data) 90 { 91 int val; 92 93 /* read a byte and check */ 94 val = tda10086_read_byte(state, reg); 95 if (val < 0) 96 return val; 97 98 /* mask if off */ 99 val = val & ~mask; 100 val |= data & 0xff; 101 102 /* write it out again */ 103 return tda10086_write_byte(state, reg, val); 104 } 105 106 static int tda10086_init(struct dvb_frontend* fe) 107 { 108 struct tda10086_state* state = fe->demodulator_priv; 109 u8 t22k_off = 0x80; 110 111 dprintk ("%s\n", __func__); 112 113 if (state->config->diseqc_tone) 114 t22k_off = 0; 115 /* reset */ 116 tda10086_write_byte(state, 0x00, 0x00); 117 msleep(10); 118 119 /* misc setup */ 120 tda10086_write_byte(state, 0x01, 0x94); 121 tda10086_write_byte(state, 0x02, 0x35); /* NOTE: TT drivers appear to disable CSWP */ 122 tda10086_write_byte(state, 0x03, 0xe4); 123 tda10086_write_byte(state, 0x04, 0x43); 124 tda10086_write_byte(state, 0x0c, 0x0c); 125 tda10086_write_byte(state, 0x1b, 0xb0); /* noise threshold */ 126 tda10086_write_byte(state, 0x20, 0x89); /* misc */ 127 tda10086_write_byte(state, 0x30, 0x04); /* acquisition period length */ 128 tda10086_write_byte(state, 0x32, 0x00); /* irq off */ 129 tda10086_write_byte(state, 0x31, 0x56); /* setup AFC */ 130 131 /* setup PLL (this assumes SACLK = 96MHz) */ 132 tda10086_write_byte(state, 0x55, 0x2c); /* misc PLL setup */ 133 if (state->config->xtal_freq == TDA10086_XTAL_16M) { 134 tda10086_write_byte(state, 0x3a, 0x0b); /* M=12 */ 135 tda10086_write_byte(state, 0x3b, 0x01); /* P=2 */ 136 } else { 137 tda10086_write_byte(state, 0x3a, 0x17); /* M=24 */ 138 tda10086_write_byte(state, 0x3b, 0x00); /* P=1 */ 139 } 140 tda10086_write_mask(state, 0x55, 0x20, 0x00); /* powerup PLL */ 141 142 /* setup TS interface */ 143 tda10086_write_byte(state, 0x11, 0x81); 144 tda10086_write_byte(state, 0x12, 0x81); 145 tda10086_write_byte(state, 0x19, 0x40); /* parallel mode A + MSBFIRST */ 146 tda10086_write_byte(state, 0x56, 0x80); /* powerdown WPLL - unused in the mode we use */ 147 tda10086_write_byte(state, 0x57, 0x08); /* bypass WPLL - unused in the mode we use */ 148 tda10086_write_byte(state, 0x10, 0x2a); 149 150 /* setup ADC */ 151 tda10086_write_byte(state, 0x58, 0x61); /* ADC setup */ 152 tda10086_write_mask(state, 0x58, 0x01, 0x00); /* powerup ADC */ 153 154 /* setup AGC */ 155 tda10086_write_byte(state, 0x05, 0x0B); 156 tda10086_write_byte(state, 0x37, 0x63); 157 tda10086_write_byte(state, 0x3f, 0x0a); /* NOTE: flydvb varies it */ 158 tda10086_write_byte(state, 0x40, 0x64); 159 tda10086_write_byte(state, 0x41, 0x4f); 160 tda10086_write_byte(state, 0x42, 0x43); 161 162 /* setup viterbi */ 163 tda10086_write_byte(state, 0x1a, 0x11); /* VBER 10^6, DVB, QPSK */ 164 165 /* setup carrier recovery */ 166 tda10086_write_byte(state, 0x3d, 0x80); 167 168 /* setup SEC */ 169 tda10086_write_byte(state, 0x36, t22k_off); /* all SEC off, 22k tone */ 170 tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000))); 171 tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8); 172 173 return 0; 174 } 175 176 static void tda10086_diseqc_wait(struct tda10086_state *state) 177 { 178 unsigned long timeout = jiffies + msecs_to_jiffies(200); 179 while (!(tda10086_read_byte(state, 0x50) & 0x01)) { 180 if(time_after(jiffies, timeout)) { 181 printk("%s: diseqc queue not ready, command may be lost.\n", __func__); 182 break; 183 } 184 msleep(10); 185 } 186 } 187 188 static int tda10086_set_tone(struct dvb_frontend *fe, 189 enum fe_sec_tone_mode tone) 190 { 191 struct tda10086_state* state = fe->demodulator_priv; 192 u8 t22k_off = 0x80; 193 194 dprintk ("%s\n", __func__); 195 196 if (state->config->diseqc_tone) 197 t22k_off = 0; 198 199 switch (tone) { 200 case SEC_TONE_OFF: 201 tda10086_write_byte(state, 0x36, t22k_off); 202 break; 203 204 case SEC_TONE_ON: 205 tda10086_write_byte(state, 0x36, 0x01 + t22k_off); 206 break; 207 } 208 209 return 0; 210 } 211 212 static int tda10086_send_master_cmd (struct dvb_frontend* fe, 213 struct dvb_diseqc_master_cmd* cmd) 214 { 215 struct tda10086_state* state = fe->demodulator_priv; 216 int i; 217 u8 oldval; 218 u8 t22k_off = 0x80; 219 220 dprintk ("%s\n", __func__); 221 222 if (state->config->diseqc_tone) 223 t22k_off = 0; 224 225 if (cmd->msg_len > 6) 226 return -EINVAL; 227 oldval = tda10086_read_byte(state, 0x36); 228 229 for(i=0; i< cmd->msg_len; i++) { 230 tda10086_write_byte(state, 0x48+i, cmd->msg[i]); 231 } 232 tda10086_write_byte(state, 0x36, (0x08 + t22k_off) 233 | ((cmd->msg_len - 1) << 4)); 234 235 tda10086_diseqc_wait(state); 236 237 tda10086_write_byte(state, 0x36, oldval); 238 239 return 0; 240 } 241 242 static int tda10086_send_burst(struct dvb_frontend *fe, 243 enum fe_sec_mini_cmd minicmd) 244 { 245 struct tda10086_state* state = fe->demodulator_priv; 246 u8 oldval = tda10086_read_byte(state, 0x36); 247 u8 t22k_off = 0x80; 248 249 dprintk ("%s\n", __func__); 250 251 if (state->config->diseqc_tone) 252 t22k_off = 0; 253 254 switch(minicmd) { 255 case SEC_MINI_A: 256 tda10086_write_byte(state, 0x36, 0x04 + t22k_off); 257 break; 258 259 case SEC_MINI_B: 260 tda10086_write_byte(state, 0x36, 0x06 + t22k_off); 261 break; 262 } 263 264 tda10086_diseqc_wait(state); 265 266 tda10086_write_byte(state, 0x36, oldval); 267 268 return 0; 269 } 270 271 static int tda10086_set_inversion(struct tda10086_state *state, 272 struct dtv_frontend_properties *fe_params) 273 { 274 u8 invval = 0x80; 275 276 dprintk ("%s %i %i\n", __func__, fe_params->inversion, state->config->invert); 277 278 switch(fe_params->inversion) { 279 case INVERSION_OFF: 280 if (state->config->invert) 281 invval = 0x40; 282 break; 283 case INVERSION_ON: 284 if (!state->config->invert) 285 invval = 0x40; 286 break; 287 case INVERSION_AUTO: 288 invval = 0x00; 289 break; 290 } 291 tda10086_write_mask(state, 0x0c, 0xc0, invval); 292 293 return 0; 294 } 295 296 static int tda10086_set_symbol_rate(struct tda10086_state *state, 297 struct dtv_frontend_properties *fe_params) 298 { 299 u8 dfn = 0; 300 u8 afs = 0; 301 u8 byp = 0; 302 u8 reg37 = 0x43; 303 u8 reg42 = 0x43; 304 u64 big; 305 u32 tmp; 306 u32 bdr; 307 u32 bdri; 308 u32 symbol_rate = fe_params->symbol_rate; 309 310 dprintk ("%s %i\n", __func__, symbol_rate); 311 312 /* setup the decimation and anti-aliasing filters.. */ 313 if (symbol_rate < (u32) (SACLK * 0.0137)) { 314 dfn=4; 315 afs=1; 316 } else if (symbol_rate < (u32) (SACLK * 0.0208)) { 317 dfn=4; 318 afs=0; 319 } else if (symbol_rate < (u32) (SACLK * 0.0270)) { 320 dfn=3; 321 afs=1; 322 } else if (symbol_rate < (u32) (SACLK * 0.0416)) { 323 dfn=3; 324 afs=0; 325 } else if (symbol_rate < (u32) (SACLK * 0.0550)) { 326 dfn=2; 327 afs=1; 328 } else if (symbol_rate < (u32) (SACLK * 0.0833)) { 329 dfn=2; 330 afs=0; 331 } else if (symbol_rate < (u32) (SACLK * 0.1100)) { 332 dfn=1; 333 afs=1; 334 } else if (symbol_rate < (u32) (SACLK * 0.1666)) { 335 dfn=1; 336 afs=0; 337 } else if (symbol_rate < (u32) (SACLK * 0.2200)) { 338 dfn=0; 339 afs=1; 340 } else if (symbol_rate < (u32) (SACLK * 0.3333)) { 341 dfn=0; 342 afs=0; 343 } else { 344 reg37 = 0x63; 345 reg42 = 0x4f; 346 byp=1; 347 } 348 349 /* calculate BDR */ 350 big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn); 351 big += ((SACLK/1000ULL)-1ULL); 352 do_div(big, (SACLK/1000ULL)); 353 bdr = big & 0xfffff; 354 355 /* calculate BDRI */ 356 tmp = (1<<dfn)*(symbol_rate/1000); 357 bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp; 358 359 tda10086_write_byte(state, 0x21, (afs << 7) | dfn); 360 tda10086_write_mask(state, 0x20, 0x08, byp << 3); 361 tda10086_write_byte(state, 0x06, bdr); 362 tda10086_write_byte(state, 0x07, bdr >> 8); 363 tda10086_write_byte(state, 0x08, bdr >> 16); 364 tda10086_write_byte(state, 0x09, bdri); 365 tda10086_write_byte(state, 0x37, reg37); 366 tda10086_write_byte(state, 0x42, reg42); 367 368 return 0; 369 } 370 371 static int tda10086_set_fec(struct tda10086_state *state, 372 struct dtv_frontend_properties *fe_params) 373 { 374 u8 fecval; 375 376 dprintk("%s %i\n", __func__, fe_params->fec_inner); 377 378 switch (fe_params->fec_inner) { 379 case FEC_1_2: 380 fecval = 0x00; 381 break; 382 case FEC_2_3: 383 fecval = 0x01; 384 break; 385 case FEC_3_4: 386 fecval = 0x02; 387 break; 388 case FEC_4_5: 389 fecval = 0x03; 390 break; 391 case FEC_5_6: 392 fecval = 0x04; 393 break; 394 case FEC_6_7: 395 fecval = 0x05; 396 break; 397 case FEC_7_8: 398 fecval = 0x06; 399 break; 400 case FEC_8_9: 401 fecval = 0x07; 402 break; 403 case FEC_AUTO: 404 fecval = 0x08; 405 break; 406 default: 407 return -1; 408 } 409 tda10086_write_byte(state, 0x0d, fecval); 410 411 return 0; 412 } 413 414 static int tda10086_set_frontend(struct dvb_frontend *fe) 415 { 416 struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache; 417 struct tda10086_state *state = fe->demodulator_priv; 418 int ret; 419 u32 freq = 0; 420 int freqoff; 421 422 dprintk ("%s\n", __func__); 423 424 /* modify parameters for tuning */ 425 tda10086_write_byte(state, 0x02, 0x35); 426 state->has_lock = false; 427 428 /* set params */ 429 if (fe->ops.tuner_ops.set_params) { 430 fe->ops.tuner_ops.set_params(fe); 431 if (fe->ops.i2c_gate_ctrl) 432 fe->ops.i2c_gate_ctrl(fe, 0); 433 434 if (fe->ops.tuner_ops.get_frequency) 435 fe->ops.tuner_ops.get_frequency(fe, &freq); 436 if (fe->ops.i2c_gate_ctrl) 437 fe->ops.i2c_gate_ctrl(fe, 0); 438 } 439 440 /* calcluate the frequency offset (in *Hz* not kHz) */ 441 freqoff = fe_params->frequency - freq; 442 freqoff = ((1<<16) * freqoff) / (SACLK/1000); 443 tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f)); 444 tda10086_write_byte(state, 0x3e, freqoff); 445 446 if ((ret = tda10086_set_inversion(state, fe_params)) < 0) 447 return ret; 448 if ((ret = tda10086_set_symbol_rate(state, fe_params)) < 0) 449 return ret; 450 if ((ret = tda10086_set_fec(state, fe_params)) < 0) 451 return ret; 452 453 /* soft reset + disable TS output until lock */ 454 tda10086_write_mask(state, 0x10, 0x40, 0x40); 455 tda10086_write_mask(state, 0x00, 0x01, 0x00); 456 457 state->symbol_rate = fe_params->symbol_rate; 458 state->frequency = fe_params->frequency; 459 return 0; 460 } 461 462 static int tda10086_get_frontend(struct dvb_frontend *fe, 463 struct dtv_frontend_properties *fe_params) 464 { 465 struct tda10086_state* state = fe->demodulator_priv; 466 u8 val; 467 int tmp; 468 u64 tmp64; 469 470 dprintk ("%s\n", __func__); 471 472 /* check for invalid symbol rate */ 473 if (fe_params->symbol_rate < 500000) 474 return -EINVAL; 475 476 /* calculate the updated frequency (note: we convert from Hz->kHz) */ 477 tmp64 = ((u64)tda10086_read_byte(state, 0x52) 478 | (tda10086_read_byte(state, 0x51) << 8)); 479 if (tmp64 & 0x8000) 480 tmp64 |= 0xffffffffffff0000ULL; 481 tmp64 = (tmp64 * (SACLK/1000ULL)); 482 do_div(tmp64, (1ULL<<15) * (1ULL<<1)); 483 fe_params->frequency = (int) state->frequency + (int) tmp64; 484 485 /* the inversion */ 486 val = tda10086_read_byte(state, 0x0c); 487 if (val & 0x80) { 488 switch(val & 0x40) { 489 case 0x00: 490 fe_params->inversion = INVERSION_OFF; 491 if (state->config->invert) 492 fe_params->inversion = INVERSION_ON; 493 break; 494 default: 495 fe_params->inversion = INVERSION_ON; 496 if (state->config->invert) 497 fe_params->inversion = INVERSION_OFF; 498 break; 499 } 500 } else { 501 tda10086_read_byte(state, 0x0f); 502 switch(val & 0x02) { 503 case 0x00: 504 fe_params->inversion = INVERSION_OFF; 505 if (state->config->invert) 506 fe_params->inversion = INVERSION_ON; 507 break; 508 default: 509 fe_params->inversion = INVERSION_ON; 510 if (state->config->invert) 511 fe_params->inversion = INVERSION_OFF; 512 break; 513 } 514 } 515 516 /* calculate the updated symbol rate */ 517 tmp = tda10086_read_byte(state, 0x1d); 518 if (tmp & 0x80) 519 tmp |= 0xffffff00; 520 tmp = (tmp * 480 * (1<<1)) / 128; 521 tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000); 522 fe_params->symbol_rate = state->symbol_rate + tmp; 523 524 /* the FEC */ 525 val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4; 526 switch(val) { 527 case 0x00: 528 fe_params->fec_inner = FEC_1_2; 529 break; 530 case 0x01: 531 fe_params->fec_inner = FEC_2_3; 532 break; 533 case 0x02: 534 fe_params->fec_inner = FEC_3_4; 535 break; 536 case 0x03: 537 fe_params->fec_inner = FEC_4_5; 538 break; 539 case 0x04: 540 fe_params->fec_inner = FEC_5_6; 541 break; 542 case 0x05: 543 fe_params->fec_inner = FEC_6_7; 544 break; 545 case 0x06: 546 fe_params->fec_inner = FEC_7_8; 547 break; 548 case 0x07: 549 fe_params->fec_inner = FEC_8_9; 550 break; 551 } 552 553 return 0; 554 } 555 556 static int tda10086_read_status(struct dvb_frontend *fe, 557 enum fe_status *fe_status) 558 { 559 struct tda10086_state* state = fe->demodulator_priv; 560 u8 val; 561 562 dprintk ("%s\n", __func__); 563 564 val = tda10086_read_byte(state, 0x0e); 565 *fe_status = 0; 566 if (val & 0x01) 567 *fe_status |= FE_HAS_SIGNAL; 568 if (val & 0x02) 569 *fe_status |= FE_HAS_CARRIER; 570 if (val & 0x04) 571 *fe_status |= FE_HAS_VITERBI; 572 if (val & 0x08) 573 *fe_status |= FE_HAS_SYNC; 574 if (val & 0x10) { 575 *fe_status |= FE_HAS_LOCK; 576 if (!state->has_lock) { 577 state->has_lock = true; 578 /* modify parameters for stable reception */ 579 tda10086_write_byte(state, 0x02, 0x00); 580 } 581 } 582 583 return 0; 584 } 585 586 static int tda10086_read_signal_strength(struct dvb_frontend* fe, u16 * signal) 587 { 588 struct tda10086_state* state = fe->demodulator_priv; 589 u8 _str; 590 591 dprintk ("%s\n", __func__); 592 593 _str = 0xff - tda10086_read_byte(state, 0x43); 594 *signal = (_str << 8) | _str; 595 596 return 0; 597 } 598 599 static int tda10086_read_snr(struct dvb_frontend* fe, u16 * snr) 600 { 601 struct tda10086_state* state = fe->demodulator_priv; 602 u8 _snr; 603 604 dprintk ("%s\n", __func__); 605 606 _snr = 0xff - tda10086_read_byte(state, 0x1c); 607 *snr = (_snr << 8) | _snr; 608 609 return 0; 610 } 611 612 static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) 613 { 614 struct tda10086_state* state = fe->demodulator_priv; 615 616 dprintk ("%s\n", __func__); 617 618 /* read it */ 619 *ucblocks = tda10086_read_byte(state, 0x18) & 0x7f; 620 621 /* reset counter */ 622 tda10086_write_byte(state, 0x18, 0x00); 623 tda10086_write_byte(state, 0x18, 0x80); 624 625 return 0; 626 } 627 628 static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber) 629 { 630 struct tda10086_state* state = fe->demodulator_priv; 631 632 dprintk ("%s\n", __func__); 633 634 /* read it */ 635 *ber = 0; 636 *ber |= tda10086_read_byte(state, 0x15); 637 *ber |= tda10086_read_byte(state, 0x16) << 8; 638 *ber |= (tda10086_read_byte(state, 0x17) & 0xf) << 16; 639 640 return 0; 641 } 642 643 static int tda10086_sleep(struct dvb_frontend* fe) 644 { 645 struct tda10086_state* state = fe->demodulator_priv; 646 647 dprintk ("%s\n", __func__); 648 649 tda10086_write_mask(state, 0x00, 0x08, 0x08); 650 651 return 0; 652 } 653 654 static int tda10086_i2c_gate_ctrl(struct dvb_frontend* fe, int enable) 655 { 656 struct tda10086_state* state = fe->demodulator_priv; 657 658 dprintk ("%s\n", __func__); 659 660 if (enable) { 661 tda10086_write_mask(state, 0x00, 0x10, 0x10); 662 } else { 663 tda10086_write_mask(state, 0x00, 0x10, 0x00); 664 } 665 666 return 0; 667 } 668 669 static int tda10086_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) 670 { 671 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 672 673 if (p->symbol_rate > 20000000) { 674 fesettings->min_delay_ms = 50; 675 fesettings->step_size = 2000; 676 fesettings->max_drift = 8000; 677 } else if (p->symbol_rate > 12000000) { 678 fesettings->min_delay_ms = 100; 679 fesettings->step_size = 1500; 680 fesettings->max_drift = 9000; 681 } else if (p->symbol_rate > 8000000) { 682 fesettings->min_delay_ms = 100; 683 fesettings->step_size = 1000; 684 fesettings->max_drift = 8000; 685 } else if (p->symbol_rate > 4000000) { 686 fesettings->min_delay_ms = 100; 687 fesettings->step_size = 500; 688 fesettings->max_drift = 7000; 689 } else if (p->symbol_rate > 2000000) { 690 fesettings->min_delay_ms = 200; 691 fesettings->step_size = p->symbol_rate / 8000; 692 fesettings->max_drift = 14 * fesettings->step_size; 693 } else { 694 fesettings->min_delay_ms = 200; 695 fesettings->step_size = p->symbol_rate / 8000; 696 fesettings->max_drift = 18 * fesettings->step_size; 697 } 698 699 return 0; 700 } 701 702 static void tda10086_release(struct dvb_frontend* fe) 703 { 704 struct tda10086_state *state = fe->demodulator_priv; 705 tda10086_sleep(fe); 706 kfree(state); 707 } 708 709 static struct dvb_frontend_ops tda10086_ops = { 710 .delsys = { SYS_DVBS }, 711 .info = { 712 .name = "Philips TDA10086 DVB-S", 713 .frequency_min = 950000, 714 .frequency_max = 2150000, 715 .frequency_stepsize = 125, /* kHz for QPSK frontends */ 716 .symbol_rate_min = 1000000, 717 .symbol_rate_max = 45000000, 718 .caps = FE_CAN_INVERSION_AUTO | 719 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 720 FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 721 FE_CAN_QPSK 722 }, 723 724 .release = tda10086_release, 725 726 .init = tda10086_init, 727 .sleep = tda10086_sleep, 728 .i2c_gate_ctrl = tda10086_i2c_gate_ctrl, 729 730 .set_frontend = tda10086_set_frontend, 731 .get_frontend = tda10086_get_frontend, 732 .get_tune_settings = tda10086_get_tune_settings, 733 734 .read_status = tda10086_read_status, 735 .read_ber = tda10086_read_ber, 736 .read_signal_strength = tda10086_read_signal_strength, 737 .read_snr = tda10086_read_snr, 738 .read_ucblocks = tda10086_read_ucblocks, 739 740 .diseqc_send_master_cmd = tda10086_send_master_cmd, 741 .diseqc_send_burst = tda10086_send_burst, 742 .set_tone = tda10086_set_tone, 743 }; 744 745 struct dvb_frontend* tda10086_attach(const struct tda10086_config* config, 746 struct i2c_adapter* i2c) 747 { 748 struct tda10086_state *state; 749 750 dprintk ("%s\n", __func__); 751 752 /* allocate memory for the internal state */ 753 state = kzalloc(sizeof(struct tda10086_state), GFP_KERNEL); 754 if (!state) 755 return NULL; 756 757 /* setup the state */ 758 state->config = config; 759 state->i2c = i2c; 760 761 /* check if the demod is there */ 762 if (tda10086_read_byte(state, 0x1e) != 0xe1) { 763 kfree(state); 764 return NULL; 765 } 766 767 /* create dvb_frontend */ 768 memcpy(&state->frontend.ops, &tda10086_ops, sizeof(struct dvb_frontend_ops)); 769 state->frontend.demodulator_priv = state; 770 return &state->frontend; 771 } 772 773 module_param(debug, int, 0644); 774 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); 775 776 MODULE_DESCRIPTION("Philips TDA10086 DVB-S Demodulator"); 777 MODULE_AUTHOR("Andrew de Quincey"); 778 MODULE_LICENSE("GPL"); 779 780 EXPORT_SYMBOL(tda10086_attach); 781