116216333SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
29a0bf528SMauro Carvalho Chehab /*
39a0bf528SMauro Carvalho Chehab  * NXP TDA10071 + Conexant CX24118A DVB-S/S2 demodulator + tuner driver
49a0bf528SMauro Carvalho Chehab  *
59a0bf528SMauro Carvalho Chehab  * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
69a0bf528SMauro Carvalho Chehab  */
79a0bf528SMauro Carvalho Chehab 
89a0bf528SMauro Carvalho Chehab #include "tda10071_priv.h"
99a0bf528SMauro Carvalho Chehab 
10bd336e63SMax Kellermann static const struct dvb_frontend_ops tda10071_ops;
119a0bf528SMauro Carvalho Chehab 
1254ab48edSAntti Palosaari /*
1354ab48edSAntti Palosaari  * XXX: regmap_update_bits() does not fit our needs as it does not support
1454ab48edSAntti Palosaari  * partially volatile registers. Also it performs register read even mask is as
1554ab48edSAntti Palosaari  * wide as register value.
1654ab48edSAntti Palosaari  */
179a0bf528SMauro Carvalho Chehab /* write single register with mask */
tda10071_wr_reg_mask(struct tda10071_dev * dev,u8 reg,u8 val,u8 mask)18fca3e007SAntti Palosaari static int tda10071_wr_reg_mask(struct tda10071_dev *dev,
19babb618dSMauro Carvalho Chehab 				u8 reg, u8 val, u8 mask)
209a0bf528SMauro Carvalho Chehab {
219a0bf528SMauro Carvalho Chehab 	int ret;
229a0bf528SMauro Carvalho Chehab 	u8 tmp;
239a0bf528SMauro Carvalho Chehab 
249a0bf528SMauro Carvalho Chehab 	/* no need for read if whole reg is written */
259a0bf528SMauro Carvalho Chehab 	if (mask != 0xff) {
2654ab48edSAntti Palosaari 		ret = regmap_bulk_read(dev->regmap, reg, &tmp, 1);
279a0bf528SMauro Carvalho Chehab 		if (ret)
289a0bf528SMauro Carvalho Chehab 			return ret;
299a0bf528SMauro Carvalho Chehab 
309a0bf528SMauro Carvalho Chehab 		val &= mask;
319a0bf528SMauro Carvalho Chehab 		tmp &= ~mask;
329a0bf528SMauro Carvalho Chehab 		val |= tmp;
339a0bf528SMauro Carvalho Chehab 	}
349a0bf528SMauro Carvalho Chehab 
3554ab48edSAntti Palosaari 	return regmap_bulk_write(dev->regmap, reg, &val, 1);
369a0bf528SMauro Carvalho Chehab }
379a0bf528SMauro Carvalho Chehab 
389a0bf528SMauro Carvalho Chehab /* execute firmware command */
tda10071_cmd_execute(struct tda10071_dev * dev,struct tda10071_cmd * cmd)39fca3e007SAntti Palosaari static int tda10071_cmd_execute(struct tda10071_dev *dev,
409a0bf528SMauro Carvalho Chehab 	struct tda10071_cmd *cmd)
419a0bf528SMauro Carvalho Chehab {
42fca3e007SAntti Palosaari 	struct i2c_client *client = dev->client;
439a0bf528SMauro Carvalho Chehab 	int ret, i;
4454ab48edSAntti Palosaari 	unsigned int uitmp;
459a0bf528SMauro Carvalho Chehab 
46fca3e007SAntti Palosaari 	if (!dev->warm) {
479a0bf528SMauro Carvalho Chehab 		ret = -EFAULT;
489a0bf528SMauro Carvalho Chehab 		goto error;
499a0bf528SMauro Carvalho Chehab 	}
509a0bf528SMauro Carvalho Chehab 
51e14432a5SAntti Palosaari 	mutex_lock(&dev->cmd_execute_mutex);
52e14432a5SAntti Palosaari 
539a0bf528SMauro Carvalho Chehab 	/* write cmd and args for firmware */
5454ab48edSAntti Palosaari 	ret = regmap_bulk_write(dev->regmap, 0x00, cmd->args, cmd->len);
559a0bf528SMauro Carvalho Chehab 	if (ret)
56e14432a5SAntti Palosaari 		goto error_mutex_unlock;
579a0bf528SMauro Carvalho Chehab 
589a0bf528SMauro Carvalho Chehab 	/* start cmd execution */
5954ab48edSAntti Palosaari 	ret = regmap_write(dev->regmap, 0x1f, 1);
609a0bf528SMauro Carvalho Chehab 	if (ret)
61e14432a5SAntti Palosaari 		goto error_mutex_unlock;
629a0bf528SMauro Carvalho Chehab 
639a0bf528SMauro Carvalho Chehab 	/* wait cmd execution terminate */
6454ab48edSAntti Palosaari 	for (i = 1000, uitmp = 1; i && uitmp; i--) {
6554ab48edSAntti Palosaari 		ret = regmap_read(dev->regmap, 0x1f, &uitmp);
669a0bf528SMauro Carvalho Chehab 		if (ret)
67e14432a5SAntti Palosaari 			goto error_mutex_unlock;
689a0bf528SMauro Carvalho Chehab 
699a0bf528SMauro Carvalho Chehab 		usleep_range(200, 5000);
709a0bf528SMauro Carvalho Chehab 	}
719a0bf528SMauro Carvalho Chehab 
72e14432a5SAntti Palosaari 	mutex_unlock(&dev->cmd_execute_mutex);
7359ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "loop=%d\n", i);
749a0bf528SMauro Carvalho Chehab 
759a0bf528SMauro Carvalho Chehab 	if (i == 0) {
769a0bf528SMauro Carvalho Chehab 		ret = -ETIMEDOUT;
779a0bf528SMauro Carvalho Chehab 		goto error;
789a0bf528SMauro Carvalho Chehab 	}
799a0bf528SMauro Carvalho Chehab 
809a0bf528SMauro Carvalho Chehab 	return ret;
81e14432a5SAntti Palosaari error_mutex_unlock:
82e14432a5SAntti Palosaari 	mutex_unlock(&dev->cmd_execute_mutex);
839a0bf528SMauro Carvalho Chehab error:
8459ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "failed=%d\n", ret);
859a0bf528SMauro Carvalho Chehab 	return ret;
869a0bf528SMauro Carvalho Chehab }
879a0bf528SMauro Carvalho Chehab 
tda10071_set_tone(struct dvb_frontend * fe,enum fe_sec_tone_mode fe_sec_tone_mode)889a0bf528SMauro Carvalho Chehab static int tda10071_set_tone(struct dvb_frontend *fe,
890df289a2SMauro Carvalho Chehab 	enum fe_sec_tone_mode fe_sec_tone_mode)
909a0bf528SMauro Carvalho Chehab {
91fca3e007SAntti Palosaari 	struct tda10071_dev *dev = fe->demodulator_priv;
92fca3e007SAntti Palosaari 	struct i2c_client *client = dev->client;
939a0bf528SMauro Carvalho Chehab 	struct tda10071_cmd cmd;
949a0bf528SMauro Carvalho Chehab 	int ret;
959a0bf528SMauro Carvalho Chehab 	u8 tone;
969a0bf528SMauro Carvalho Chehab 
97fca3e007SAntti Palosaari 	if (!dev->warm) {
989a0bf528SMauro Carvalho Chehab 		ret = -EFAULT;
999a0bf528SMauro Carvalho Chehab 		goto error;
1009a0bf528SMauro Carvalho Chehab 	}
1019a0bf528SMauro Carvalho Chehab 
10259ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "tone_mode=%d\n", fe_sec_tone_mode);
1039a0bf528SMauro Carvalho Chehab 
1049a0bf528SMauro Carvalho Chehab 	switch (fe_sec_tone_mode) {
1059a0bf528SMauro Carvalho Chehab 	case SEC_TONE_ON:
1069a0bf528SMauro Carvalho Chehab 		tone = 1;
1079a0bf528SMauro Carvalho Chehab 		break;
1089a0bf528SMauro Carvalho Chehab 	case SEC_TONE_OFF:
1099a0bf528SMauro Carvalho Chehab 		tone = 0;
1109a0bf528SMauro Carvalho Chehab 		break;
1119a0bf528SMauro Carvalho Chehab 	default:
11259ca2ce1SAntti Palosaari 		dev_dbg(&client->dev, "invalid fe_sec_tone_mode\n");
1139a0bf528SMauro Carvalho Chehab 		ret = -EINVAL;
1149a0bf528SMauro Carvalho Chehab 		goto error;
1159a0bf528SMauro Carvalho Chehab 	}
1169a0bf528SMauro Carvalho Chehab 
1179a0bf528SMauro Carvalho Chehab 	cmd.args[0] = CMD_LNB_PCB_CONFIG;
1189a0bf528SMauro Carvalho Chehab 	cmd.args[1] = 0;
1199a0bf528SMauro Carvalho Chehab 	cmd.args[2] = 0x00;
1209a0bf528SMauro Carvalho Chehab 	cmd.args[3] = 0x00;
1219a0bf528SMauro Carvalho Chehab 	cmd.args[4] = tone;
1229a0bf528SMauro Carvalho Chehab 	cmd.len = 5;
123fca3e007SAntti Palosaari 	ret = tda10071_cmd_execute(dev, &cmd);
1249a0bf528SMauro Carvalho Chehab 	if (ret)
1259a0bf528SMauro Carvalho Chehab 		goto error;
1269a0bf528SMauro Carvalho Chehab 
1279a0bf528SMauro Carvalho Chehab 	return ret;
1289a0bf528SMauro Carvalho Chehab error:
12959ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "failed=%d\n", ret);
1309a0bf528SMauro Carvalho Chehab 	return ret;
1319a0bf528SMauro Carvalho Chehab }
1329a0bf528SMauro Carvalho Chehab 
tda10071_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage fe_sec_voltage)1339a0bf528SMauro Carvalho Chehab static int tda10071_set_voltage(struct dvb_frontend *fe,
1340df289a2SMauro Carvalho Chehab 	enum fe_sec_voltage fe_sec_voltage)
1359a0bf528SMauro Carvalho Chehab {
136fca3e007SAntti Palosaari 	struct tda10071_dev *dev = fe->demodulator_priv;
137fca3e007SAntti Palosaari 	struct i2c_client *client = dev->client;
1389a0bf528SMauro Carvalho Chehab 	struct tda10071_cmd cmd;
1399a0bf528SMauro Carvalho Chehab 	int ret;
1409a0bf528SMauro Carvalho Chehab 	u8 voltage;
1419a0bf528SMauro Carvalho Chehab 
142fca3e007SAntti Palosaari 	if (!dev->warm) {
1439a0bf528SMauro Carvalho Chehab 		ret = -EFAULT;
1449a0bf528SMauro Carvalho Chehab 		goto error;
1459a0bf528SMauro Carvalho Chehab 	}
1469a0bf528SMauro Carvalho Chehab 
14759ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "voltage=%d\n", fe_sec_voltage);
1489a0bf528SMauro Carvalho Chehab 
1499a0bf528SMauro Carvalho Chehab 	switch (fe_sec_voltage) {
1509a0bf528SMauro Carvalho Chehab 	case SEC_VOLTAGE_13:
1519a0bf528SMauro Carvalho Chehab 		voltage = 0;
1529a0bf528SMauro Carvalho Chehab 		break;
1539a0bf528SMauro Carvalho Chehab 	case SEC_VOLTAGE_18:
1549a0bf528SMauro Carvalho Chehab 		voltage = 1;
1559a0bf528SMauro Carvalho Chehab 		break;
1569a0bf528SMauro Carvalho Chehab 	case SEC_VOLTAGE_OFF:
1579a0bf528SMauro Carvalho Chehab 		voltage = 0;
1589a0bf528SMauro Carvalho Chehab 		break;
1599a0bf528SMauro Carvalho Chehab 	default:
16059ca2ce1SAntti Palosaari 		dev_dbg(&client->dev, "invalid fe_sec_voltage\n");
1619a0bf528SMauro Carvalho Chehab 		ret = -EINVAL;
1629a0bf528SMauro Carvalho Chehab 		goto error;
1638f5c997fSPeter Senna Tschudin 	}
1649a0bf528SMauro Carvalho Chehab 
1659a0bf528SMauro Carvalho Chehab 	cmd.args[0] = CMD_LNB_SET_DC_LEVEL;
1669a0bf528SMauro Carvalho Chehab 	cmd.args[1] = 0;
1679a0bf528SMauro Carvalho Chehab 	cmd.args[2] = voltage;
1689a0bf528SMauro Carvalho Chehab 	cmd.len = 3;
169fca3e007SAntti Palosaari 	ret = tda10071_cmd_execute(dev, &cmd);
1709a0bf528SMauro Carvalho Chehab 	if (ret)
1719a0bf528SMauro Carvalho Chehab 		goto error;
1729a0bf528SMauro Carvalho Chehab 
1739a0bf528SMauro Carvalho Chehab 	return ret;
1749a0bf528SMauro Carvalho Chehab error:
17559ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "failed=%d\n", ret);
1769a0bf528SMauro Carvalho Chehab 	return ret;
1779a0bf528SMauro Carvalho Chehab }
1789a0bf528SMauro Carvalho Chehab 
tda10071_diseqc_send_master_cmd(struct dvb_frontend * fe,struct dvb_diseqc_master_cmd * diseqc_cmd)1799a0bf528SMauro Carvalho Chehab static int tda10071_diseqc_send_master_cmd(struct dvb_frontend *fe,
1809a0bf528SMauro Carvalho Chehab 	struct dvb_diseqc_master_cmd *diseqc_cmd)
1819a0bf528SMauro Carvalho Chehab {
182fca3e007SAntti Palosaari 	struct tda10071_dev *dev = fe->demodulator_priv;
183fca3e007SAntti Palosaari 	struct i2c_client *client = dev->client;
1849a0bf528SMauro Carvalho Chehab 	struct tda10071_cmd cmd;
1859a0bf528SMauro Carvalho Chehab 	int ret, i;
18654ab48edSAntti Palosaari 	unsigned int uitmp;
1879a0bf528SMauro Carvalho Chehab 
188fca3e007SAntti Palosaari 	if (!dev->warm) {
1899a0bf528SMauro Carvalho Chehab 		ret = -EFAULT;
1909a0bf528SMauro Carvalho Chehab 		goto error;
1919a0bf528SMauro Carvalho Chehab 	}
1929a0bf528SMauro Carvalho Chehab 
19359ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "msg_len=%d\n", diseqc_cmd->msg_len);
1949a0bf528SMauro Carvalho Chehab 
1959a0bf528SMauro Carvalho Chehab 	if (diseqc_cmd->msg_len < 3 || diseqc_cmd->msg_len > 6) {
1969a0bf528SMauro Carvalho Chehab 		ret = -EINVAL;
1979a0bf528SMauro Carvalho Chehab 		goto error;
1989a0bf528SMauro Carvalho Chehab 	}
1999a0bf528SMauro Carvalho Chehab 
2009a0bf528SMauro Carvalho Chehab 	/* wait LNB TX */
20154ab48edSAntti Palosaari 	for (i = 500, uitmp = 0; i && !uitmp; i--) {
20254ab48edSAntti Palosaari 		ret = regmap_read(dev->regmap, 0x47, &uitmp);
2039a0bf528SMauro Carvalho Chehab 		if (ret)
2049a0bf528SMauro Carvalho Chehab 			goto error;
20554ab48edSAntti Palosaari 		uitmp = (uitmp >> 0) & 1;
2069a0bf528SMauro Carvalho Chehab 		usleep_range(10000, 20000);
2079a0bf528SMauro Carvalho Chehab 	}
2089a0bf528SMauro Carvalho Chehab 
20959ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "loop=%d\n", i);
2109a0bf528SMauro Carvalho Chehab 
2119a0bf528SMauro Carvalho Chehab 	if (i == 0) {
2129a0bf528SMauro Carvalho Chehab 		ret = -ETIMEDOUT;
2139a0bf528SMauro Carvalho Chehab 		goto error;
2149a0bf528SMauro Carvalho Chehab 	}
2159a0bf528SMauro Carvalho Chehab 
21654ab48edSAntti Palosaari 	ret = regmap_update_bits(dev->regmap, 0x47, 0x01, 0x00);
2179a0bf528SMauro Carvalho Chehab 	if (ret)
2189a0bf528SMauro Carvalho Chehab 		goto error;
2199a0bf528SMauro Carvalho Chehab 
2209a0bf528SMauro Carvalho Chehab 	cmd.args[0] = CMD_LNB_SEND_DISEQC;
2219a0bf528SMauro Carvalho Chehab 	cmd.args[1] = 0;
2229a0bf528SMauro Carvalho Chehab 	cmd.args[2] = 0;
2239a0bf528SMauro Carvalho Chehab 	cmd.args[3] = 0;
2249a0bf528SMauro Carvalho Chehab 	cmd.args[4] = 2;
2259a0bf528SMauro Carvalho Chehab 	cmd.args[5] = 0;
2269a0bf528SMauro Carvalho Chehab 	cmd.args[6] = diseqc_cmd->msg_len;
2279a0bf528SMauro Carvalho Chehab 	memcpy(&cmd.args[7], diseqc_cmd->msg, diseqc_cmd->msg_len);
2289a0bf528SMauro Carvalho Chehab 	cmd.len = 7 + diseqc_cmd->msg_len;
229fca3e007SAntti Palosaari 	ret = tda10071_cmd_execute(dev, &cmd);
2309a0bf528SMauro Carvalho Chehab 	if (ret)
2319a0bf528SMauro Carvalho Chehab 		goto error;
2329a0bf528SMauro Carvalho Chehab 
2339a0bf528SMauro Carvalho Chehab 	return ret;
2349a0bf528SMauro Carvalho Chehab error:
23559ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "failed=%d\n", ret);
2369a0bf528SMauro Carvalho Chehab 	return ret;
2379a0bf528SMauro Carvalho Chehab }
2389a0bf528SMauro Carvalho Chehab 
tda10071_diseqc_recv_slave_reply(struct dvb_frontend * fe,struct dvb_diseqc_slave_reply * reply)2399a0bf528SMauro Carvalho Chehab static int tda10071_diseqc_recv_slave_reply(struct dvb_frontend *fe,
2409a0bf528SMauro Carvalho Chehab 	struct dvb_diseqc_slave_reply *reply)
2419a0bf528SMauro Carvalho Chehab {
242fca3e007SAntti Palosaari 	struct tda10071_dev *dev = fe->demodulator_priv;
243fca3e007SAntti Palosaari 	struct i2c_client *client = dev->client;
2449a0bf528SMauro Carvalho Chehab 	struct tda10071_cmd cmd;
2459a0bf528SMauro Carvalho Chehab 	int ret, i;
24654ab48edSAntti Palosaari 	unsigned int uitmp;
2479a0bf528SMauro Carvalho Chehab 
248fca3e007SAntti Palosaari 	if (!dev->warm) {
2499a0bf528SMauro Carvalho Chehab 		ret = -EFAULT;
2509a0bf528SMauro Carvalho Chehab 		goto error;
2519a0bf528SMauro Carvalho Chehab 	}
2529a0bf528SMauro Carvalho Chehab 
25359ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "\n");
2549a0bf528SMauro Carvalho Chehab 
2559a0bf528SMauro Carvalho Chehab 	/* wait LNB RX */
25654ab48edSAntti Palosaari 	for (i = 500, uitmp = 0; i && !uitmp; i--) {
25754ab48edSAntti Palosaari 		ret = regmap_read(dev->regmap, 0x47, &uitmp);
2589a0bf528SMauro Carvalho Chehab 		if (ret)
2599a0bf528SMauro Carvalho Chehab 			goto error;
26054ab48edSAntti Palosaari 		uitmp = (uitmp >> 1) & 1;
2619a0bf528SMauro Carvalho Chehab 		usleep_range(10000, 20000);
2629a0bf528SMauro Carvalho Chehab 	}
2639a0bf528SMauro Carvalho Chehab 
26459ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "loop=%d\n", i);
2659a0bf528SMauro Carvalho Chehab 
2669a0bf528SMauro Carvalho Chehab 	if (i == 0) {
2679a0bf528SMauro Carvalho Chehab 		ret = -ETIMEDOUT;
2689a0bf528SMauro Carvalho Chehab 		goto error;
2699a0bf528SMauro Carvalho Chehab 	}
2709a0bf528SMauro Carvalho Chehab 
2719a0bf528SMauro Carvalho Chehab 	/* reply len */
27254ab48edSAntti Palosaari 	ret = regmap_read(dev->regmap, 0x46, &uitmp);
2739a0bf528SMauro Carvalho Chehab 	if (ret)
2749a0bf528SMauro Carvalho Chehab 		goto error;
2759a0bf528SMauro Carvalho Chehab 
27654ab48edSAntti Palosaari 	reply->msg_len = uitmp & 0x1f; /* [4:0] */
2779a0bf528SMauro Carvalho Chehab 	if (reply->msg_len > sizeof(reply->msg))
2789a0bf528SMauro Carvalho Chehab 		reply->msg_len = sizeof(reply->msg); /* truncate API max */
2799a0bf528SMauro Carvalho Chehab 
2809a0bf528SMauro Carvalho Chehab 	/* read reply */
2819a0bf528SMauro Carvalho Chehab 	cmd.args[0] = CMD_LNB_UPDATE_REPLY;
2829a0bf528SMauro Carvalho Chehab 	cmd.args[1] = 0;
2839a0bf528SMauro Carvalho Chehab 	cmd.len = 2;
284fca3e007SAntti Palosaari 	ret = tda10071_cmd_execute(dev, &cmd);
2859a0bf528SMauro Carvalho Chehab 	if (ret)
2869a0bf528SMauro Carvalho Chehab 		goto error;
2879a0bf528SMauro Carvalho Chehab 
28854ab48edSAntti Palosaari 	ret = regmap_bulk_read(dev->regmap, cmd.len, reply->msg,
28954ab48edSAntti Palosaari 			       reply->msg_len);
2909a0bf528SMauro Carvalho Chehab 	if (ret)
2919a0bf528SMauro Carvalho Chehab 		goto error;
2929a0bf528SMauro Carvalho Chehab 
2939a0bf528SMauro Carvalho Chehab 	return ret;
2949a0bf528SMauro Carvalho Chehab error:
29559ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "failed=%d\n", ret);
2969a0bf528SMauro Carvalho Chehab 	return ret;
2979a0bf528SMauro Carvalho Chehab }
2989a0bf528SMauro Carvalho Chehab 
tda10071_diseqc_send_burst(struct dvb_frontend * fe,enum fe_sec_mini_cmd fe_sec_mini_cmd)2999a0bf528SMauro Carvalho Chehab static int tda10071_diseqc_send_burst(struct dvb_frontend *fe,
3000df289a2SMauro Carvalho Chehab 	enum fe_sec_mini_cmd fe_sec_mini_cmd)
3019a0bf528SMauro Carvalho Chehab {
302fca3e007SAntti Palosaari 	struct tda10071_dev *dev = fe->demodulator_priv;
303fca3e007SAntti Palosaari 	struct i2c_client *client = dev->client;
3049a0bf528SMauro Carvalho Chehab 	struct tda10071_cmd cmd;
3059a0bf528SMauro Carvalho Chehab 	int ret, i;
30654ab48edSAntti Palosaari 	unsigned int uitmp;
30754ab48edSAntti Palosaari 	u8 burst;
3089a0bf528SMauro Carvalho Chehab 
309fca3e007SAntti Palosaari 	if (!dev->warm) {
3109a0bf528SMauro Carvalho Chehab 		ret = -EFAULT;
3119a0bf528SMauro Carvalho Chehab 		goto error;
3129a0bf528SMauro Carvalho Chehab 	}
3139a0bf528SMauro Carvalho Chehab 
31459ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "fe_sec_mini_cmd=%d\n", fe_sec_mini_cmd);
3159a0bf528SMauro Carvalho Chehab 
3169a0bf528SMauro Carvalho Chehab 	switch (fe_sec_mini_cmd) {
3179a0bf528SMauro Carvalho Chehab 	case SEC_MINI_A:
3189a0bf528SMauro Carvalho Chehab 		burst = 0;
3199a0bf528SMauro Carvalho Chehab 		break;
3209a0bf528SMauro Carvalho Chehab 	case SEC_MINI_B:
3219a0bf528SMauro Carvalho Chehab 		burst = 1;
3229a0bf528SMauro Carvalho Chehab 		break;
3239a0bf528SMauro Carvalho Chehab 	default:
32459ca2ce1SAntti Palosaari 		dev_dbg(&client->dev, "invalid fe_sec_mini_cmd\n");
3259a0bf528SMauro Carvalho Chehab 		ret = -EINVAL;
3269a0bf528SMauro Carvalho Chehab 		goto error;
3279a0bf528SMauro Carvalho Chehab 	}
3289a0bf528SMauro Carvalho Chehab 
3299a0bf528SMauro Carvalho Chehab 	/* wait LNB TX */
33054ab48edSAntti Palosaari 	for (i = 500, uitmp = 0; i && !uitmp; i--) {
33154ab48edSAntti Palosaari 		ret = regmap_read(dev->regmap, 0x47, &uitmp);
3329a0bf528SMauro Carvalho Chehab 		if (ret)
3339a0bf528SMauro Carvalho Chehab 			goto error;
33454ab48edSAntti Palosaari 		uitmp = (uitmp >> 0) & 1;
3359a0bf528SMauro Carvalho Chehab 		usleep_range(10000, 20000);
3369a0bf528SMauro Carvalho Chehab 	}
3379a0bf528SMauro Carvalho Chehab 
33859ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "loop=%d\n", i);
3399a0bf528SMauro Carvalho Chehab 
3409a0bf528SMauro Carvalho Chehab 	if (i == 0) {
3419a0bf528SMauro Carvalho Chehab 		ret = -ETIMEDOUT;
3429a0bf528SMauro Carvalho Chehab 		goto error;
3439a0bf528SMauro Carvalho Chehab 	}
3449a0bf528SMauro Carvalho Chehab 
34554ab48edSAntti Palosaari 	ret = regmap_update_bits(dev->regmap, 0x47, 0x01, 0x00);
3469a0bf528SMauro Carvalho Chehab 	if (ret)
3479a0bf528SMauro Carvalho Chehab 		goto error;
3489a0bf528SMauro Carvalho Chehab 
3499a0bf528SMauro Carvalho Chehab 	cmd.args[0] = CMD_LNB_SEND_TONEBURST;
3509a0bf528SMauro Carvalho Chehab 	cmd.args[1] = 0;
3519a0bf528SMauro Carvalho Chehab 	cmd.args[2] = burst;
3529a0bf528SMauro Carvalho Chehab 	cmd.len = 3;
353fca3e007SAntti Palosaari 	ret = tda10071_cmd_execute(dev, &cmd);
3549a0bf528SMauro Carvalho Chehab 	if (ret)
3559a0bf528SMauro Carvalho Chehab 		goto error;
3569a0bf528SMauro Carvalho Chehab 
3579a0bf528SMauro Carvalho Chehab 	return ret;
3589a0bf528SMauro Carvalho Chehab error:
35959ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "failed=%d\n", ret);
3609a0bf528SMauro Carvalho Chehab 	return ret;
3619a0bf528SMauro Carvalho Chehab }
3629a0bf528SMauro Carvalho Chehab 
tda10071_read_status(struct dvb_frontend * fe,enum fe_status * status)3630df289a2SMauro Carvalho Chehab static int tda10071_read_status(struct dvb_frontend *fe, enum fe_status *status)
3649a0bf528SMauro Carvalho Chehab {
365fca3e007SAntti Palosaari 	struct tda10071_dev *dev = fe->demodulator_priv;
366fca3e007SAntti Palosaari 	struct i2c_client *client = dev->client;
367267897a4SAntti Palosaari 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
368267897a4SAntti Palosaari 	struct tda10071_cmd cmd;
3699a0bf528SMauro Carvalho Chehab 	int ret;
37054ab48edSAntti Palosaari 	unsigned int uitmp;
371267897a4SAntti Palosaari 	u8 buf[8];
3729a0bf528SMauro Carvalho Chehab 
3739a0bf528SMauro Carvalho Chehab 	*status = 0;
3749a0bf528SMauro Carvalho Chehab 
375fca3e007SAntti Palosaari 	if (!dev->warm) {
3769a0bf528SMauro Carvalho Chehab 		ret = 0;
3779a0bf528SMauro Carvalho Chehab 		goto error;
3789a0bf528SMauro Carvalho Chehab 	}
3799a0bf528SMauro Carvalho Chehab 
38054ab48edSAntti Palosaari 	ret = regmap_read(dev->regmap, 0x39, &uitmp);
3819a0bf528SMauro Carvalho Chehab 	if (ret)
3829a0bf528SMauro Carvalho Chehab 		goto error;
3839a0bf528SMauro Carvalho Chehab 
38407115606SAntti Palosaari 	/* 0x39[0] tuner PLL */
38554ab48edSAntti Palosaari 	if (uitmp & 0x02) /* demod PLL */
38607115606SAntti Palosaari 		*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
38754ab48edSAntti Palosaari 	if (uitmp & 0x04) /* viterbi or LDPC*/
3889a0bf528SMauro Carvalho Chehab 		*status |= FE_HAS_VITERBI;
38954ab48edSAntti Palosaari 	if (uitmp & 0x08) /* RS or BCH */
3909a0bf528SMauro Carvalho Chehab 		*status |= FE_HAS_SYNC | FE_HAS_LOCK;
3919a0bf528SMauro Carvalho Chehab 
392fca3e007SAntti Palosaari 	dev->fe_status = *status;
3939a0bf528SMauro Carvalho Chehab 
394267897a4SAntti Palosaari 	/* signal strength */
395267897a4SAntti Palosaari 	if (dev->fe_status & FE_HAS_SIGNAL) {
3969a0bf528SMauro Carvalho Chehab 		cmd.args[0] = CMD_GET_AGCACC;
3979a0bf528SMauro Carvalho Chehab 		cmd.args[1] = 0;
3989a0bf528SMauro Carvalho Chehab 		cmd.len = 2;
399fca3e007SAntti Palosaari 		ret = tda10071_cmd_execute(dev, &cmd);
4009a0bf528SMauro Carvalho Chehab 		if (ret)
4019a0bf528SMauro Carvalho Chehab 			goto error;
4029a0bf528SMauro Carvalho Chehab 
4039a0bf528SMauro Carvalho Chehab 		/* input power estimate dBm */
40454ab48edSAntti Palosaari 		ret = regmap_read(dev->regmap, 0x50, &uitmp);
4059a0bf528SMauro Carvalho Chehab 		if (ret)
4069a0bf528SMauro Carvalho Chehab 			goto error;
4079a0bf528SMauro Carvalho Chehab 
408267897a4SAntti Palosaari 		c->strength.stat[0].scale = FE_SCALE_DECIBEL;
409267897a4SAntti Palosaari 		c->strength.stat[0].svalue = (int) (uitmp - 256) * 1000;
410267897a4SAntti Palosaari 	} else {
411267897a4SAntti Palosaari 		c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
4129a0bf528SMauro Carvalho Chehab 	}
4139a0bf528SMauro Carvalho Chehab 
414267897a4SAntti Palosaari 	/* CNR */
415267897a4SAntti Palosaari 	if (dev->fe_status & FE_HAS_VITERBI) {
416267897a4SAntti Palosaari 		/* Es/No */
417267897a4SAntti Palosaari 		ret = regmap_bulk_read(dev->regmap, 0x3a, buf, 2);
418267897a4SAntti Palosaari 		if (ret)
4199a0bf528SMauro Carvalho Chehab 			goto error;
420267897a4SAntti Palosaari 
421267897a4SAntti Palosaari 		c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
422267897a4SAntti Palosaari 		c->cnr.stat[0].svalue = (buf[0] << 8 | buf[1] << 0) * 100;
423267897a4SAntti Palosaari 	} else {
424267897a4SAntti Palosaari 		c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
4259a0bf528SMauro Carvalho Chehab 	}
4269a0bf528SMauro Carvalho Chehab 
427267897a4SAntti Palosaari 	/* UCB/PER/BER */
428267897a4SAntti Palosaari 	if (dev->fe_status & FE_HAS_LOCK) {
429267897a4SAntti Palosaari 		/* TODO: report total bits/packets */
430267897a4SAntti Palosaari 		u8 delivery_system, reg, len;
431267897a4SAntti Palosaari 
432fca3e007SAntti Palosaari 		switch (dev->delivery_system) {
4339a0bf528SMauro Carvalho Chehab 		case SYS_DVBS:
4349a0bf528SMauro Carvalho Chehab 			reg = 0x4c;
4359a0bf528SMauro Carvalho Chehab 			len = 8;
436267897a4SAntti Palosaari 			delivery_system = 1;
4379a0bf528SMauro Carvalho Chehab 			break;
4389a0bf528SMauro Carvalho Chehab 		case SYS_DVBS2:
4399a0bf528SMauro Carvalho Chehab 			reg = 0x4d;
4409a0bf528SMauro Carvalho Chehab 			len = 4;
441267897a4SAntti Palosaari 			delivery_system = 0;
4429a0bf528SMauro Carvalho Chehab 			break;
4439a0bf528SMauro Carvalho Chehab 		default:
444267897a4SAntti Palosaari 			ret = -EINVAL;
445267897a4SAntti Palosaari 			goto error;
4469a0bf528SMauro Carvalho Chehab 		}
4479a0bf528SMauro Carvalho Chehab 
44854ab48edSAntti Palosaari 		ret = regmap_read(dev->regmap, reg, &uitmp);
4499a0bf528SMauro Carvalho Chehab 		if (ret)
4509a0bf528SMauro Carvalho Chehab 			goto error;
4519a0bf528SMauro Carvalho Chehab 
452267897a4SAntti Palosaari 		if (dev->meas_count == uitmp) {
45354ab48edSAntti Palosaari 			dev_dbg(&client->dev, "meas not ready=%02x\n", uitmp);
454267897a4SAntti Palosaari 			ret = 0;
455267897a4SAntti Palosaari 			goto error;
4569a0bf528SMauro Carvalho Chehab 		} else {
457267897a4SAntti Palosaari 			dev->meas_count = uitmp;
4589a0bf528SMauro Carvalho Chehab 		}
4599a0bf528SMauro Carvalho Chehab 
4609a0bf528SMauro Carvalho Chehab 		cmd.args[0] = CMD_BER_UPDATE_COUNTERS;
4619a0bf528SMauro Carvalho Chehab 		cmd.args[1] = 0;
462267897a4SAntti Palosaari 		cmd.args[2] = delivery_system;
4639a0bf528SMauro Carvalho Chehab 		cmd.len = 3;
464fca3e007SAntti Palosaari 		ret = tda10071_cmd_execute(dev, &cmd);
4659a0bf528SMauro Carvalho Chehab 		if (ret)
4669a0bf528SMauro Carvalho Chehab 			goto error;
4679a0bf528SMauro Carvalho Chehab 
46854ab48edSAntti Palosaari 		ret = regmap_bulk_read(dev->regmap, cmd.len, buf, len);
4699a0bf528SMauro Carvalho Chehab 		if (ret)
4709a0bf528SMauro Carvalho Chehab 			goto error;
4719a0bf528SMauro Carvalho Chehab 
472fca3e007SAntti Palosaari 		if (dev->delivery_system == SYS_DVBS) {
473a7463e2dSColin Ian King 			u32 bit_error = buf[0] << 24 | buf[1] << 16 |
474267897a4SAntti Palosaari 					buf[2] << 8 | buf[3] << 0;
475a7463e2dSColin Ian King 
476a7463e2dSColin Ian King 			dev->dvbv3_ber = bit_error;
477a7463e2dSColin Ian King 			dev->post_bit_error += bit_error;
478267897a4SAntti Palosaari 			c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
479267897a4SAntti Palosaari 			c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
480267897a4SAntti Palosaari 			dev->block_error += buf[4] << 8 | buf[5] << 0;
481267897a4SAntti Palosaari 			c->block_error.stat[0].scale = FE_SCALE_COUNTER;
482267897a4SAntti Palosaari 			c->block_error.stat[0].uvalue = dev->block_error;
4839a0bf528SMauro Carvalho Chehab 		} else {
484267897a4SAntti Palosaari 			dev->dvbv3_ber = buf[0] << 8 | buf[1] << 0;
485267897a4SAntti Palosaari 			dev->post_bit_error += buf[0] << 8 | buf[1] << 0;
486267897a4SAntti Palosaari 			c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
487267897a4SAntti Palosaari 			c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
488267897a4SAntti Palosaari 			c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
4899a0bf528SMauro Carvalho Chehab 		}
490267897a4SAntti Palosaari 	} else {
491267897a4SAntti Palosaari 		c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
492267897a4SAntti Palosaari 		c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
493267897a4SAntti Palosaari 	}
4949a0bf528SMauro Carvalho Chehab 
4959a0bf528SMauro Carvalho Chehab 	return ret;
4969a0bf528SMauro Carvalho Chehab error:
49759ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "failed=%d\n", ret);
4989a0bf528SMauro Carvalho Chehab 	return ret;
4999a0bf528SMauro Carvalho Chehab }
5009a0bf528SMauro Carvalho Chehab 
tda10071_read_snr(struct dvb_frontend * fe,u16 * snr)501267897a4SAntti Palosaari static int tda10071_read_snr(struct dvb_frontend *fe, u16 *snr)
502267897a4SAntti Palosaari {
503267897a4SAntti Palosaari 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
504267897a4SAntti Palosaari 
505267897a4SAntti Palosaari 	if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
506267897a4SAntti Palosaari 		*snr = div_s64(c->cnr.stat[0].svalue, 100);
507267897a4SAntti Palosaari 	else
508267897a4SAntti Palosaari 		*snr = 0;
509267897a4SAntti Palosaari 	return 0;
510267897a4SAntti Palosaari }
511267897a4SAntti Palosaari 
tda10071_read_signal_strength(struct dvb_frontend * fe,u16 * strength)512267897a4SAntti Palosaari static int tda10071_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
513267897a4SAntti Palosaari {
514267897a4SAntti Palosaari 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
515267897a4SAntti Palosaari 	unsigned int uitmp;
516267897a4SAntti Palosaari 
517267897a4SAntti Palosaari 	if (c->strength.stat[0].scale == FE_SCALE_DECIBEL) {
5187d0ddc91SMauro Carvalho Chehab 		uitmp = div_s64(c->strength.stat[0].svalue, 1000) + 256;
519267897a4SAntti Palosaari 		uitmp = clamp(uitmp, 181U, 236U); /* -75dBm - -20dBm */
520267897a4SAntti Palosaari 		/* scale value to 0x0000-0xffff */
521267897a4SAntti Palosaari 		*strength = (uitmp-181) * 0xffff / (236-181);
522267897a4SAntti Palosaari 	} else {
523267897a4SAntti Palosaari 		*strength = 0;
524267897a4SAntti Palosaari 	}
525267897a4SAntti Palosaari 	return 0;
526267897a4SAntti Palosaari }
527267897a4SAntti Palosaari 
tda10071_read_ber(struct dvb_frontend * fe,u32 * ber)528267897a4SAntti Palosaari static int tda10071_read_ber(struct dvb_frontend *fe, u32 *ber)
529267897a4SAntti Palosaari {
530267897a4SAntti Palosaari 	struct tda10071_dev *dev = fe->demodulator_priv;
531267897a4SAntti Palosaari 
532267897a4SAntti Palosaari 	*ber = dev->dvbv3_ber;
533267897a4SAntti Palosaari 	return 0;
534267897a4SAntti Palosaari }
535267897a4SAntti Palosaari 
tda10071_read_ucblocks(struct dvb_frontend * fe,u32 * ucblocks)5369a0bf528SMauro Carvalho Chehab static int tda10071_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
5379a0bf528SMauro Carvalho Chehab {
538267897a4SAntti Palosaari 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
5399a0bf528SMauro Carvalho Chehab 
540267897a4SAntti Palosaari 	if (c->block_error.stat[0].scale == FE_SCALE_COUNTER)
541267897a4SAntti Palosaari 		*ucblocks = c->block_error.stat[0].uvalue;
542267897a4SAntti Palosaari 	else
5439a0bf528SMauro Carvalho Chehab 		*ucblocks = 0;
544267897a4SAntti Palosaari 	return 0;
5459a0bf528SMauro Carvalho Chehab }
5469a0bf528SMauro Carvalho Chehab 
tda10071_set_frontend(struct dvb_frontend * fe)5479a0bf528SMauro Carvalho Chehab static int tda10071_set_frontend(struct dvb_frontend *fe)
5489a0bf528SMauro Carvalho Chehab {
549fca3e007SAntti Palosaari 	struct tda10071_dev *dev = fe->demodulator_priv;
550fca3e007SAntti Palosaari 	struct i2c_client *client = dev->client;
5519a0bf528SMauro Carvalho Chehab 	struct tda10071_cmd cmd;
5529a0bf528SMauro Carvalho Chehab 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
5539a0bf528SMauro Carvalho Chehab 	int ret, i;
5549a0bf528SMauro Carvalho Chehab 	u8 mode, rolloff, pilot, inversion, div;
5550df289a2SMauro Carvalho Chehab 	enum fe_modulation modulation;
5569a0bf528SMauro Carvalho Chehab 
55759ca2ce1SAntti Palosaari 	dev_dbg(&client->dev,
55859ca2ce1SAntti Palosaari 		"delivery_system=%d modulation=%d frequency=%u symbol_rate=%d inversion=%d pilot=%d rolloff=%d\n",
55959ca2ce1SAntti Palosaari 		c->delivery_system, c->modulation, c->frequency, c->symbol_rate,
56059ca2ce1SAntti Palosaari 		c->inversion, c->pilot, c->rolloff);
5619a0bf528SMauro Carvalho Chehab 
562fca3e007SAntti Palosaari 	dev->delivery_system = SYS_UNDEFINED;
5639a0bf528SMauro Carvalho Chehab 
564fca3e007SAntti Palosaari 	if (!dev->warm) {
5659a0bf528SMauro Carvalho Chehab 		ret = -EFAULT;
5669a0bf528SMauro Carvalho Chehab 		goto error;
5679a0bf528SMauro Carvalho Chehab 	}
5689a0bf528SMauro Carvalho Chehab 
5699a0bf528SMauro Carvalho Chehab 	switch (c->inversion) {
5709a0bf528SMauro Carvalho Chehab 	case INVERSION_OFF:
5719a0bf528SMauro Carvalho Chehab 		inversion = 1;
5729a0bf528SMauro Carvalho Chehab 		break;
5739a0bf528SMauro Carvalho Chehab 	case INVERSION_ON:
5749a0bf528SMauro Carvalho Chehab 		inversion = 0;
5759a0bf528SMauro Carvalho Chehab 		break;
5769a0bf528SMauro Carvalho Chehab 	case INVERSION_AUTO:
5779a0bf528SMauro Carvalho Chehab 		/* 2 = auto; try first on then off
5789a0bf528SMauro Carvalho Chehab 		 * 3 = auto; try first off then on */
5799a0bf528SMauro Carvalho Chehab 		inversion = 3;
5809a0bf528SMauro Carvalho Chehab 		break;
5819a0bf528SMauro Carvalho Chehab 	default:
58259ca2ce1SAntti Palosaari 		dev_dbg(&client->dev, "invalid inversion\n");
5839a0bf528SMauro Carvalho Chehab 		ret = -EINVAL;
5849a0bf528SMauro Carvalho Chehab 		goto error;
5859a0bf528SMauro Carvalho Chehab 	}
5869a0bf528SMauro Carvalho Chehab 
5879a0bf528SMauro Carvalho Chehab 	switch (c->delivery_system) {
5889a0bf528SMauro Carvalho Chehab 	case SYS_DVBS:
589db4175aeSAntti Palosaari 		modulation = QPSK;
5909a0bf528SMauro Carvalho Chehab 		rolloff = 0;
5919a0bf528SMauro Carvalho Chehab 		pilot = 2;
5929a0bf528SMauro Carvalho Chehab 		break;
5939a0bf528SMauro Carvalho Chehab 	case SYS_DVBS2:
594db4175aeSAntti Palosaari 		modulation = c->modulation;
595db4175aeSAntti Palosaari 
5969a0bf528SMauro Carvalho Chehab 		switch (c->rolloff) {
5979a0bf528SMauro Carvalho Chehab 		case ROLLOFF_20:
5989a0bf528SMauro Carvalho Chehab 			rolloff = 2;
5999a0bf528SMauro Carvalho Chehab 			break;
6009a0bf528SMauro Carvalho Chehab 		case ROLLOFF_25:
6019a0bf528SMauro Carvalho Chehab 			rolloff = 1;
6029a0bf528SMauro Carvalho Chehab 			break;
6039a0bf528SMauro Carvalho Chehab 		case ROLLOFF_35:
6049a0bf528SMauro Carvalho Chehab 			rolloff = 0;
6059a0bf528SMauro Carvalho Chehab 			break;
6069a0bf528SMauro Carvalho Chehab 		case ROLLOFF_AUTO:
6079a0bf528SMauro Carvalho Chehab 		default:
60859ca2ce1SAntti Palosaari 			dev_dbg(&client->dev, "invalid rolloff\n");
6099a0bf528SMauro Carvalho Chehab 			ret = -EINVAL;
6109a0bf528SMauro Carvalho Chehab 			goto error;
6119a0bf528SMauro Carvalho Chehab 		}
6129a0bf528SMauro Carvalho Chehab 
6139a0bf528SMauro Carvalho Chehab 		switch (c->pilot) {
6149a0bf528SMauro Carvalho Chehab 		case PILOT_OFF:
6159a0bf528SMauro Carvalho Chehab 			pilot = 0;
6169a0bf528SMauro Carvalho Chehab 			break;
6179a0bf528SMauro Carvalho Chehab 		case PILOT_ON:
6189a0bf528SMauro Carvalho Chehab 			pilot = 1;
6199a0bf528SMauro Carvalho Chehab 			break;
6209a0bf528SMauro Carvalho Chehab 		case PILOT_AUTO:
6219a0bf528SMauro Carvalho Chehab 			pilot = 2;
6229a0bf528SMauro Carvalho Chehab 			break;
6239a0bf528SMauro Carvalho Chehab 		default:
62459ca2ce1SAntti Palosaari 			dev_dbg(&client->dev, "invalid pilot\n");
6259a0bf528SMauro Carvalho Chehab 			ret = -EINVAL;
6269a0bf528SMauro Carvalho Chehab 			goto error;
6279a0bf528SMauro Carvalho Chehab 		}
6289a0bf528SMauro Carvalho Chehab 		break;
6299a0bf528SMauro Carvalho Chehab 	default:
63059ca2ce1SAntti Palosaari 		dev_dbg(&client->dev, "invalid delivery_system\n");
6319a0bf528SMauro Carvalho Chehab 		ret = -EINVAL;
6329a0bf528SMauro Carvalho Chehab 		goto error;
6339a0bf528SMauro Carvalho Chehab 	}
6349a0bf528SMauro Carvalho Chehab 
6359a0bf528SMauro Carvalho Chehab 	for (i = 0, mode = 0xff; i < ARRAY_SIZE(TDA10071_MODCOD); i++) {
6369a0bf528SMauro Carvalho Chehab 		if (c->delivery_system == TDA10071_MODCOD[i].delivery_system &&
637db4175aeSAntti Palosaari 			modulation == TDA10071_MODCOD[i].modulation &&
6389a0bf528SMauro Carvalho Chehab 			c->fec_inner == TDA10071_MODCOD[i].fec) {
6399a0bf528SMauro Carvalho Chehab 			mode = TDA10071_MODCOD[i].val;
64059ca2ce1SAntti Palosaari 			dev_dbg(&client->dev, "mode found=%02x\n", mode);
6419a0bf528SMauro Carvalho Chehab 			break;
6429a0bf528SMauro Carvalho Chehab 		}
6439a0bf528SMauro Carvalho Chehab 	}
6449a0bf528SMauro Carvalho Chehab 
6459a0bf528SMauro Carvalho Chehab 	if (mode == 0xff) {
64659ca2ce1SAntti Palosaari 		dev_dbg(&client->dev, "invalid parameter combination\n");
6479a0bf528SMauro Carvalho Chehab 		ret = -EINVAL;
6489a0bf528SMauro Carvalho Chehab 		goto error;
6499a0bf528SMauro Carvalho Chehab 	}
6509a0bf528SMauro Carvalho Chehab 
6519a0bf528SMauro Carvalho Chehab 	if (c->symbol_rate <= 5000000)
6529a0bf528SMauro Carvalho Chehab 		div = 14;
6539a0bf528SMauro Carvalho Chehab 	else
6549a0bf528SMauro Carvalho Chehab 		div = 4;
6559a0bf528SMauro Carvalho Chehab 
65654ab48edSAntti Palosaari 	ret = regmap_write(dev->regmap, 0x81, div);
6579a0bf528SMauro Carvalho Chehab 	if (ret)
6589a0bf528SMauro Carvalho Chehab 		goto error;
6599a0bf528SMauro Carvalho Chehab 
66054ab48edSAntti Palosaari 	ret = regmap_write(dev->regmap, 0xe3, div);
6619a0bf528SMauro Carvalho Chehab 	if (ret)
6629a0bf528SMauro Carvalho Chehab 		goto error;
6639a0bf528SMauro Carvalho Chehab 
6649a0bf528SMauro Carvalho Chehab 	cmd.args[0] = CMD_CHANGE_CHANNEL;
6659a0bf528SMauro Carvalho Chehab 	cmd.args[1] = 0;
6669a0bf528SMauro Carvalho Chehab 	cmd.args[2] = mode;
6679a0bf528SMauro Carvalho Chehab 	cmd.args[3] = (c->frequency >> 16) & 0xff;
6689a0bf528SMauro Carvalho Chehab 	cmd.args[4] = (c->frequency >>  8) & 0xff;
6699a0bf528SMauro Carvalho Chehab 	cmd.args[5] = (c->frequency >>  0) & 0xff;
6709a0bf528SMauro Carvalho Chehab 	cmd.args[6] = ((c->symbol_rate / 1000) >> 8) & 0xff;
6719a0bf528SMauro Carvalho Chehab 	cmd.args[7] = ((c->symbol_rate / 1000) >> 0) & 0xff;
672f1b1eabfSMauro Carvalho Chehab 	cmd.args[8] = ((tda10071_ops.info.frequency_tolerance_hz / 1000) >> 8) & 0xff;
673f1b1eabfSMauro Carvalho Chehab 	cmd.args[9] = ((tda10071_ops.info.frequency_tolerance_hz / 1000) >> 0) & 0xff;
6749a0bf528SMauro Carvalho Chehab 	cmd.args[10] = rolloff;
6759a0bf528SMauro Carvalho Chehab 	cmd.args[11] = inversion;
6769a0bf528SMauro Carvalho Chehab 	cmd.args[12] = pilot;
6779a0bf528SMauro Carvalho Chehab 	cmd.args[13] = 0x00;
6789a0bf528SMauro Carvalho Chehab 	cmd.args[14] = 0x00;
6799a0bf528SMauro Carvalho Chehab 	cmd.len = 15;
680fca3e007SAntti Palosaari 	ret = tda10071_cmd_execute(dev, &cmd);
6819a0bf528SMauro Carvalho Chehab 	if (ret)
6829a0bf528SMauro Carvalho Chehab 		goto error;
6839a0bf528SMauro Carvalho Chehab 
684fca3e007SAntti Palosaari 	dev->delivery_system = c->delivery_system;
6859a0bf528SMauro Carvalho Chehab 
6869a0bf528SMauro Carvalho Chehab 	return ret;
6879a0bf528SMauro Carvalho Chehab error:
68859ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "failed=%d\n", ret);
6899a0bf528SMauro Carvalho Chehab 	return ret;
6909a0bf528SMauro Carvalho Chehab }
6919a0bf528SMauro Carvalho Chehab 
tda10071_get_frontend(struct dvb_frontend * fe,struct dtv_frontend_properties * c)6927e3e68bcSMauro Carvalho Chehab static int tda10071_get_frontend(struct dvb_frontend *fe,
6937e3e68bcSMauro Carvalho Chehab 				 struct dtv_frontend_properties *c)
6949a0bf528SMauro Carvalho Chehab {
695fca3e007SAntti Palosaari 	struct tda10071_dev *dev = fe->demodulator_priv;
696fca3e007SAntti Palosaari 	struct i2c_client *client = dev->client;
6979a0bf528SMauro Carvalho Chehab 	int ret, i;
6989a0bf528SMauro Carvalho Chehab 	u8 buf[5], tmp;
6999a0bf528SMauro Carvalho Chehab 
700fca3e007SAntti Palosaari 	if (!dev->warm || !(dev->fe_status & FE_HAS_LOCK)) {
7014c4acb7aSAntti Palosaari 		ret = 0;
7029a0bf528SMauro Carvalho Chehab 		goto error;
7039a0bf528SMauro Carvalho Chehab 	}
7049a0bf528SMauro Carvalho Chehab 
70554ab48edSAntti Palosaari 	ret = regmap_bulk_read(dev->regmap, 0x30, buf, 5);
7069a0bf528SMauro Carvalho Chehab 	if (ret)
7079a0bf528SMauro Carvalho Chehab 		goto error;
7089a0bf528SMauro Carvalho Chehab 
7099a0bf528SMauro Carvalho Chehab 	tmp = buf[0] & 0x3f;
7109a0bf528SMauro Carvalho Chehab 	for (i = 0; i < ARRAY_SIZE(TDA10071_MODCOD); i++) {
7119a0bf528SMauro Carvalho Chehab 		if (tmp == TDA10071_MODCOD[i].val) {
7129a0bf528SMauro Carvalho Chehab 			c->modulation = TDA10071_MODCOD[i].modulation;
7139a0bf528SMauro Carvalho Chehab 			c->fec_inner = TDA10071_MODCOD[i].fec;
7149a0bf528SMauro Carvalho Chehab 			c->delivery_system = TDA10071_MODCOD[i].delivery_system;
7159a0bf528SMauro Carvalho Chehab 		}
7169a0bf528SMauro Carvalho Chehab 	}
7179a0bf528SMauro Carvalho Chehab 
7189a0bf528SMauro Carvalho Chehab 	switch ((buf[1] >> 0) & 0x01) {
7199a0bf528SMauro Carvalho Chehab 	case 0:
720b32725e8SAntti Palosaari 		c->inversion = INVERSION_ON;
7219a0bf528SMauro Carvalho Chehab 		break;
7229a0bf528SMauro Carvalho Chehab 	case 1:
723b32725e8SAntti Palosaari 		c->inversion = INVERSION_OFF;
7249a0bf528SMauro Carvalho Chehab 		break;
7259a0bf528SMauro Carvalho Chehab 	}
7269a0bf528SMauro Carvalho Chehab 
7279a0bf528SMauro Carvalho Chehab 	switch ((buf[1] >> 7) & 0x01) {
7289a0bf528SMauro Carvalho Chehab 	case 0:
7299a0bf528SMauro Carvalho Chehab 		c->pilot = PILOT_OFF;
7309a0bf528SMauro Carvalho Chehab 		break;
7319a0bf528SMauro Carvalho Chehab 	case 1:
7329a0bf528SMauro Carvalho Chehab 		c->pilot = PILOT_ON;
7339a0bf528SMauro Carvalho Chehab 		break;
7349a0bf528SMauro Carvalho Chehab 	}
7359a0bf528SMauro Carvalho Chehab 
7369a0bf528SMauro Carvalho Chehab 	c->frequency = (buf[2] << 16) | (buf[3] << 8) | (buf[4] << 0);
7379a0bf528SMauro Carvalho Chehab 
73854ab48edSAntti Palosaari 	ret = regmap_bulk_read(dev->regmap, 0x52, buf, 3);
7399a0bf528SMauro Carvalho Chehab 	if (ret)
7409a0bf528SMauro Carvalho Chehab 		goto error;
7419a0bf528SMauro Carvalho Chehab 
742c2c1a6e5SAntti Palosaari 	c->symbol_rate = ((buf[0] << 16) | (buf[1] << 8) | (buf[2] << 0)) * 1000;
7439a0bf528SMauro Carvalho Chehab 
7449a0bf528SMauro Carvalho Chehab 	return ret;
7459a0bf528SMauro Carvalho Chehab error:
74659ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "failed=%d\n", ret);
7479a0bf528SMauro Carvalho Chehab 	return ret;
7489a0bf528SMauro Carvalho Chehab }
7499a0bf528SMauro Carvalho Chehab 
tda10071_init(struct dvb_frontend * fe)7509a0bf528SMauro Carvalho Chehab static int tda10071_init(struct dvb_frontend *fe)
7519a0bf528SMauro Carvalho Chehab {
752fca3e007SAntti Palosaari 	struct tda10071_dev *dev = fe->demodulator_priv;
753fca3e007SAntti Palosaari 	struct i2c_client *client = dev->client;
754267897a4SAntti Palosaari 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
7559a0bf528SMauro Carvalho Chehab 	struct tda10071_cmd cmd;
7569a0bf528SMauro Carvalho Chehab 	int ret, i, len, remaining, fw_size;
75754ab48edSAntti Palosaari 	unsigned int uitmp;
7589a0bf528SMauro Carvalho Chehab 	const struct firmware *fw;
75903f4efc3SAntti Palosaari 	u8 *fw_file = TDA10071_FIRMWARE;
7609a0bf528SMauro Carvalho Chehab 	u8 tmp, buf[4];
7619a0bf528SMauro Carvalho Chehab 	struct tda10071_reg_val_mask tab[] = {
7629a0bf528SMauro Carvalho Chehab 		{ 0xcd, 0x00, 0x07 },
7639a0bf528SMauro Carvalho Chehab 		{ 0x80, 0x00, 0x02 },
7649a0bf528SMauro Carvalho Chehab 		{ 0xcd, 0x00, 0xc0 },
7659a0bf528SMauro Carvalho Chehab 		{ 0xce, 0x00, 0x1b },
7669a0bf528SMauro Carvalho Chehab 		{ 0x9d, 0x00, 0x01 },
7679a0bf528SMauro Carvalho Chehab 		{ 0x9d, 0x00, 0x02 },
7689a0bf528SMauro Carvalho Chehab 		{ 0x9e, 0x00, 0x01 },
7699a0bf528SMauro Carvalho Chehab 		{ 0x87, 0x00, 0x80 },
7709a0bf528SMauro Carvalho Chehab 		{ 0xce, 0x00, 0x08 },
7719a0bf528SMauro Carvalho Chehab 		{ 0xce, 0x00, 0x10 },
7729a0bf528SMauro Carvalho Chehab 	};
7739a0bf528SMauro Carvalho Chehab 	struct tda10071_reg_val_mask tab2[] = {
7749a0bf528SMauro Carvalho Chehab 		{ 0xf1, 0x70, 0xff },
775fca3e007SAntti Palosaari 		{ 0x88, dev->pll_multiplier, 0x3f },
7769a0bf528SMauro Carvalho Chehab 		{ 0x89, 0x00, 0x10 },
7779a0bf528SMauro Carvalho Chehab 		{ 0x89, 0x10, 0x10 },
7789a0bf528SMauro Carvalho Chehab 		{ 0xc0, 0x01, 0x01 },
7799a0bf528SMauro Carvalho Chehab 		{ 0xc0, 0x00, 0x01 },
7809a0bf528SMauro Carvalho Chehab 		{ 0xe0, 0xff, 0xff },
7819a0bf528SMauro Carvalho Chehab 		{ 0xe0, 0x00, 0xff },
7829a0bf528SMauro Carvalho Chehab 		{ 0x96, 0x1e, 0x7e },
7839a0bf528SMauro Carvalho Chehab 		{ 0x8b, 0x08, 0x08 },
7849a0bf528SMauro Carvalho Chehab 		{ 0x8b, 0x00, 0x08 },
7859a0bf528SMauro Carvalho Chehab 		{ 0x8f, 0x1a, 0x7e },
7869a0bf528SMauro Carvalho Chehab 		{ 0x8c, 0x68, 0xff },
7879a0bf528SMauro Carvalho Chehab 		{ 0x8d, 0x08, 0xff },
7889a0bf528SMauro Carvalho Chehab 		{ 0x8e, 0x4c, 0xff },
7899a0bf528SMauro Carvalho Chehab 		{ 0x8f, 0x01, 0x01 },
7909a0bf528SMauro Carvalho Chehab 		{ 0x8b, 0x04, 0x04 },
7919a0bf528SMauro Carvalho Chehab 		{ 0x8b, 0x00, 0x04 },
7929a0bf528SMauro Carvalho Chehab 		{ 0x87, 0x05, 0x07 },
7939a0bf528SMauro Carvalho Chehab 		{ 0x80, 0x00, 0x20 },
7949a0bf528SMauro Carvalho Chehab 		{ 0xc8, 0x01, 0xff },
7959a0bf528SMauro Carvalho Chehab 		{ 0xb4, 0x47, 0xff },
7969a0bf528SMauro Carvalho Chehab 		{ 0xb5, 0x9c, 0xff },
7979a0bf528SMauro Carvalho Chehab 		{ 0xb6, 0x7d, 0xff },
7989a0bf528SMauro Carvalho Chehab 		{ 0xba, 0x00, 0x03 },
7999a0bf528SMauro Carvalho Chehab 		{ 0xb7, 0x47, 0xff },
8009a0bf528SMauro Carvalho Chehab 		{ 0xb8, 0x9c, 0xff },
8019a0bf528SMauro Carvalho Chehab 		{ 0xb9, 0x7d, 0xff },
8029a0bf528SMauro Carvalho Chehab 		{ 0xba, 0x00, 0x0c },
8039a0bf528SMauro Carvalho Chehab 		{ 0xc8, 0x00, 0xff },
8049a0bf528SMauro Carvalho Chehab 		{ 0xcd, 0x00, 0x04 },
8059a0bf528SMauro Carvalho Chehab 		{ 0xcd, 0x00, 0x20 },
8069a0bf528SMauro Carvalho Chehab 		{ 0xe8, 0x02, 0xff },
8079a0bf528SMauro Carvalho Chehab 		{ 0xcf, 0x20, 0xff },
8089a0bf528SMauro Carvalho Chehab 		{ 0x9b, 0xd7, 0xff },
8099a0bf528SMauro Carvalho Chehab 		{ 0x9a, 0x01, 0x03 },
8109a0bf528SMauro Carvalho Chehab 		{ 0xa8, 0x05, 0x0f },
8119a0bf528SMauro Carvalho Chehab 		{ 0xa8, 0x65, 0xf0 },
8129a0bf528SMauro Carvalho Chehab 		{ 0xa6, 0xa0, 0xf0 },
8139a0bf528SMauro Carvalho Chehab 		{ 0x9d, 0x50, 0xfc },
8149a0bf528SMauro Carvalho Chehab 		{ 0x9e, 0x20, 0xe0 },
8159a0bf528SMauro Carvalho Chehab 		{ 0xa3, 0x1c, 0x7c },
8169a0bf528SMauro Carvalho Chehab 		{ 0xd5, 0x03, 0x03 },
8179a0bf528SMauro Carvalho Chehab 	};
8189a0bf528SMauro Carvalho Chehab 
819fca3e007SAntti Palosaari 	if (dev->warm) {
8209a0bf528SMauro Carvalho Chehab 		/* warm state - wake up device from sleep */
8219a0bf528SMauro Carvalho Chehab 
8229a0bf528SMauro Carvalho Chehab 		for (i = 0; i < ARRAY_SIZE(tab); i++) {
823fca3e007SAntti Palosaari 			ret = tda10071_wr_reg_mask(dev, tab[i].reg,
8249a0bf528SMauro Carvalho Chehab 				tab[i].val, tab[i].mask);
8259a0bf528SMauro Carvalho Chehab 			if (ret)
8269a0bf528SMauro Carvalho Chehab 				goto error;
8279a0bf528SMauro Carvalho Chehab 		}
8289a0bf528SMauro Carvalho Chehab 
8299a0bf528SMauro Carvalho Chehab 		cmd.args[0] = CMD_SET_SLEEP_MODE;
8309a0bf528SMauro Carvalho Chehab 		cmd.args[1] = 0;
8319a0bf528SMauro Carvalho Chehab 		cmd.args[2] = 0;
8329a0bf528SMauro Carvalho Chehab 		cmd.len = 3;
833fca3e007SAntti Palosaari 		ret = tda10071_cmd_execute(dev, &cmd);
8349a0bf528SMauro Carvalho Chehab 		if (ret)
8359a0bf528SMauro Carvalho Chehab 			goto error;
8369a0bf528SMauro Carvalho Chehab 	} else {
8379a0bf528SMauro Carvalho Chehab 		/* cold state - try to download firmware */
8389a0bf528SMauro Carvalho Chehab 
8399a0bf528SMauro Carvalho Chehab 		/* request the firmware, this will block and timeout */
84059ca2ce1SAntti Palosaari 		ret = request_firmware(&fw, fw_file, &client->dev);
8419a0bf528SMauro Carvalho Chehab 		if (ret) {
84259ca2ce1SAntti Palosaari 			dev_err(&client->dev,
843fe63a1a6SMauro Carvalho Chehab 				"did not find the firmware file '%s' (status %d). You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware\n",
84459ca2ce1SAntti Palosaari 				fw_file, ret);
8459a0bf528SMauro Carvalho Chehab 			goto error;
8469a0bf528SMauro Carvalho Chehab 		}
8479a0bf528SMauro Carvalho Chehab 
8489a0bf528SMauro Carvalho Chehab 		/* init */
8499a0bf528SMauro Carvalho Chehab 		for (i = 0; i < ARRAY_SIZE(tab2); i++) {
850fca3e007SAntti Palosaari 			ret = tda10071_wr_reg_mask(dev, tab2[i].reg,
8519a0bf528SMauro Carvalho Chehab 				tab2[i].val, tab2[i].mask);
8529a0bf528SMauro Carvalho Chehab 			if (ret)
8539a0bf528SMauro Carvalho Chehab 				goto error_release_firmware;
8549a0bf528SMauro Carvalho Chehab 		}
8559a0bf528SMauro Carvalho Chehab 
8569a0bf528SMauro Carvalho Chehab 		/*  download firmware */
85754ab48edSAntti Palosaari 		ret = regmap_write(dev->regmap, 0xe0, 0x7f);
8589a0bf528SMauro Carvalho Chehab 		if (ret)
8599a0bf528SMauro Carvalho Chehab 			goto error_release_firmware;
8609a0bf528SMauro Carvalho Chehab 
86154ab48edSAntti Palosaari 		ret = regmap_write(dev->regmap, 0xf7, 0x81);
8629a0bf528SMauro Carvalho Chehab 		if (ret)
8639a0bf528SMauro Carvalho Chehab 			goto error_release_firmware;
8649a0bf528SMauro Carvalho Chehab 
86554ab48edSAntti Palosaari 		ret = regmap_write(dev->regmap, 0xf8, 0x00);
8669a0bf528SMauro Carvalho Chehab 		if (ret)
8679a0bf528SMauro Carvalho Chehab 			goto error_release_firmware;
8689a0bf528SMauro Carvalho Chehab 
86954ab48edSAntti Palosaari 		ret = regmap_write(dev->regmap, 0xf9, 0x00);
8709a0bf528SMauro Carvalho Chehab 		if (ret)
8719a0bf528SMauro Carvalho Chehab 			goto error_release_firmware;
8729a0bf528SMauro Carvalho Chehab 
87359ca2ce1SAntti Palosaari 		dev_info(&client->dev,
87459ca2ce1SAntti Palosaari 			 "found a '%s' in cold state, will try to load a firmware\n",
87559ca2ce1SAntti Palosaari 			 tda10071_ops.info.name);
87659ca2ce1SAntti Palosaari 		dev_info(&client->dev, "downloading firmware from file '%s'\n",
87759ca2ce1SAntti Palosaari 			 fw_file);
8789a0bf528SMauro Carvalho Chehab 
8799a0bf528SMauro Carvalho Chehab 		/* do not download last byte */
8809a0bf528SMauro Carvalho Chehab 		fw_size = fw->size - 1;
8819a0bf528SMauro Carvalho Chehab 
8829a0bf528SMauro Carvalho Chehab 		for (remaining = fw_size; remaining > 0;
883fca3e007SAntti Palosaari 			remaining -= (dev->i2c_wr_max - 1)) {
8849a0bf528SMauro Carvalho Chehab 			len = remaining;
885fca3e007SAntti Palosaari 			if (len > (dev->i2c_wr_max - 1))
886fca3e007SAntti Palosaari 				len = (dev->i2c_wr_max - 1);
8879a0bf528SMauro Carvalho Chehab 
88854ab48edSAntti Palosaari 			ret = regmap_bulk_write(dev->regmap, 0xfa,
8899a0bf528SMauro Carvalho Chehab 				(u8 *) &fw->data[fw_size - remaining], len);
8909a0bf528SMauro Carvalho Chehab 			if (ret) {
89159ca2ce1SAntti Palosaari 				dev_err(&client->dev,
89259ca2ce1SAntti Palosaari 					"firmware download failed=%d\n", ret);
8939a0bf528SMauro Carvalho Chehab 				goto error_release_firmware;
8949a0bf528SMauro Carvalho Chehab 			}
8959a0bf528SMauro Carvalho Chehab 		}
8969a0bf528SMauro Carvalho Chehab 		release_firmware(fw);
8979a0bf528SMauro Carvalho Chehab 
89854ab48edSAntti Palosaari 		ret = regmap_write(dev->regmap, 0xf7, 0x0c);
8999a0bf528SMauro Carvalho Chehab 		if (ret)
9009a0bf528SMauro Carvalho Chehab 			goto error;
9019a0bf528SMauro Carvalho Chehab 
90254ab48edSAntti Palosaari 		ret = regmap_write(dev->regmap, 0xe0, 0x00);
9039a0bf528SMauro Carvalho Chehab 		if (ret)
9049a0bf528SMauro Carvalho Chehab 			goto error;
9059a0bf528SMauro Carvalho Chehab 
9069a0bf528SMauro Carvalho Chehab 		/* wait firmware start */
9079a0bf528SMauro Carvalho Chehab 		msleep(250);
9089a0bf528SMauro Carvalho Chehab 
9099a0bf528SMauro Carvalho Chehab 		/* firmware status */
91054ab48edSAntti Palosaari 		ret = regmap_read(dev->regmap, 0x51, &uitmp);
9119a0bf528SMauro Carvalho Chehab 		if (ret)
9129a0bf528SMauro Carvalho Chehab 			goto error;
9139a0bf528SMauro Carvalho Chehab 
91454ab48edSAntti Palosaari 		if (uitmp) {
91559ca2ce1SAntti Palosaari 			dev_info(&client->dev, "firmware did not run\n");
9169a0bf528SMauro Carvalho Chehab 			ret = -EFAULT;
9179a0bf528SMauro Carvalho Chehab 			goto error;
9189a0bf528SMauro Carvalho Chehab 		} else {
919fca3e007SAntti Palosaari 			dev->warm = true;
9209a0bf528SMauro Carvalho Chehab 		}
9219a0bf528SMauro Carvalho Chehab 
9229a0bf528SMauro Carvalho Chehab 		cmd.args[0] = CMD_GET_FW_VERSION;
9239a0bf528SMauro Carvalho Chehab 		cmd.len = 1;
924fca3e007SAntti Palosaari 		ret = tda10071_cmd_execute(dev, &cmd);
9259a0bf528SMauro Carvalho Chehab 		if (ret)
9269a0bf528SMauro Carvalho Chehab 			goto error;
9279a0bf528SMauro Carvalho Chehab 
92854ab48edSAntti Palosaari 		ret = regmap_bulk_read(dev->regmap, cmd.len, buf, 4);
9299a0bf528SMauro Carvalho Chehab 		if (ret)
9309a0bf528SMauro Carvalho Chehab 			goto error;
9319a0bf528SMauro Carvalho Chehab 
93259ca2ce1SAntti Palosaari 		dev_info(&client->dev, "firmware version %d.%d.%d.%d\n",
93359ca2ce1SAntti Palosaari 			 buf[0], buf[1], buf[2], buf[3]);
93459ca2ce1SAntti Palosaari 		dev_info(&client->dev, "found a '%s' in warm state\n",
93559ca2ce1SAntti Palosaari 			 tda10071_ops.info.name);
9369a0bf528SMauro Carvalho Chehab 
93754ab48edSAntti Palosaari 		ret = regmap_bulk_read(dev->regmap, 0x81, buf, 2);
9389a0bf528SMauro Carvalho Chehab 		if (ret)
9399a0bf528SMauro Carvalho Chehab 			goto error;
9409a0bf528SMauro Carvalho Chehab 
9419a0bf528SMauro Carvalho Chehab 		cmd.args[0] = CMD_DEMOD_INIT;
942fca3e007SAntti Palosaari 		cmd.args[1] = ((dev->clk / 1000) >> 8) & 0xff;
943fca3e007SAntti Palosaari 		cmd.args[2] = ((dev->clk / 1000) >> 0) & 0xff;
9449a0bf528SMauro Carvalho Chehab 		cmd.args[3] = buf[0];
9459a0bf528SMauro Carvalho Chehab 		cmd.args[4] = buf[1];
946fca3e007SAntti Palosaari 		cmd.args[5] = dev->pll_multiplier;
947fca3e007SAntti Palosaari 		cmd.args[6] = dev->spec_inv;
9489a0bf528SMauro Carvalho Chehab 		cmd.args[7] = 0x00;
9499a0bf528SMauro Carvalho Chehab 		cmd.len = 8;
950fca3e007SAntti Palosaari 		ret = tda10071_cmd_execute(dev, &cmd);
9519a0bf528SMauro Carvalho Chehab 		if (ret)
9529a0bf528SMauro Carvalho Chehab 			goto error;
9539a0bf528SMauro Carvalho Chehab 
954fca3e007SAntti Palosaari 		if (dev->tuner_i2c_addr)
955fca3e007SAntti Palosaari 			tmp = dev->tuner_i2c_addr;
956116802f1SAntti Palosaari 		else
957116802f1SAntti Palosaari 			tmp = 0x14;
958116802f1SAntti Palosaari 
9599a0bf528SMauro Carvalho Chehab 		cmd.args[0] = CMD_TUNER_INIT;
9609a0bf528SMauro Carvalho Chehab 		cmd.args[1] = 0x00;
9619a0bf528SMauro Carvalho Chehab 		cmd.args[2] = 0x00;
9629a0bf528SMauro Carvalho Chehab 		cmd.args[3] = 0x00;
9639a0bf528SMauro Carvalho Chehab 		cmd.args[4] = 0x00;
964116802f1SAntti Palosaari 		cmd.args[5] = tmp;
9659a0bf528SMauro Carvalho Chehab 		cmd.args[6] = 0x00;
9669a0bf528SMauro Carvalho Chehab 		cmd.args[7] = 0x03;
9679a0bf528SMauro Carvalho Chehab 		cmd.args[8] = 0x02;
9689a0bf528SMauro Carvalho Chehab 		cmd.args[9] = 0x02;
9699a0bf528SMauro Carvalho Chehab 		cmd.args[10] = 0x00;
9709a0bf528SMauro Carvalho Chehab 		cmd.args[11] = 0x00;
9719a0bf528SMauro Carvalho Chehab 		cmd.args[12] = 0x00;
9729a0bf528SMauro Carvalho Chehab 		cmd.args[13] = 0x00;
9739a0bf528SMauro Carvalho Chehab 		cmd.args[14] = 0x00;
9749a0bf528SMauro Carvalho Chehab 		cmd.len = 15;
975fca3e007SAntti Palosaari 		ret = tda10071_cmd_execute(dev, &cmd);
9769a0bf528SMauro Carvalho Chehab 		if (ret)
9779a0bf528SMauro Carvalho Chehab 			goto error;
9789a0bf528SMauro Carvalho Chehab 
9799a0bf528SMauro Carvalho Chehab 		cmd.args[0] = CMD_MPEG_CONFIG;
9809a0bf528SMauro Carvalho Chehab 		cmd.args[1] = 0;
981fca3e007SAntti Palosaari 		cmd.args[2] = dev->ts_mode;
9829a0bf528SMauro Carvalho Chehab 		cmd.args[3] = 0x00;
9839a0bf528SMauro Carvalho Chehab 		cmd.args[4] = 0x04;
9849a0bf528SMauro Carvalho Chehab 		cmd.args[5] = 0x00;
9859a0bf528SMauro Carvalho Chehab 		cmd.len = 6;
986fca3e007SAntti Palosaari 		ret = tda10071_cmd_execute(dev, &cmd);
9879a0bf528SMauro Carvalho Chehab 		if (ret)
9889a0bf528SMauro Carvalho Chehab 			goto error;
9899a0bf528SMauro Carvalho Chehab 
99054ab48edSAntti Palosaari 		ret = regmap_update_bits(dev->regmap, 0xf0, 0x01, 0x01);
9919a0bf528SMauro Carvalho Chehab 		if (ret)
9929a0bf528SMauro Carvalho Chehab 			goto error;
9939a0bf528SMauro Carvalho Chehab 
9949a0bf528SMauro Carvalho Chehab 		cmd.args[0] = CMD_LNB_CONFIG;
9959a0bf528SMauro Carvalho Chehab 		cmd.args[1] = 0;
9969a0bf528SMauro Carvalho Chehab 		cmd.args[2] = 150;
9979a0bf528SMauro Carvalho Chehab 		cmd.args[3] = 3;
9989a0bf528SMauro Carvalho Chehab 		cmd.args[4] = 22;
9999a0bf528SMauro Carvalho Chehab 		cmd.args[5] = 1;
10009a0bf528SMauro Carvalho Chehab 		cmd.args[6] = 1;
10019a0bf528SMauro Carvalho Chehab 		cmd.args[7] = 30;
10029a0bf528SMauro Carvalho Chehab 		cmd.args[8] = 30;
10039a0bf528SMauro Carvalho Chehab 		cmd.args[9] = 30;
10049a0bf528SMauro Carvalho Chehab 		cmd.args[10] = 30;
10059a0bf528SMauro Carvalho Chehab 		cmd.len = 11;
1006fca3e007SAntti Palosaari 		ret = tda10071_cmd_execute(dev, &cmd);
10079a0bf528SMauro Carvalho Chehab 		if (ret)
10089a0bf528SMauro Carvalho Chehab 			goto error;
10099a0bf528SMauro Carvalho Chehab 
10109a0bf528SMauro Carvalho Chehab 		cmd.args[0] = CMD_BER_CONTROL;
10119a0bf528SMauro Carvalho Chehab 		cmd.args[1] = 0;
10129a0bf528SMauro Carvalho Chehab 		cmd.args[2] = 14;
10139a0bf528SMauro Carvalho Chehab 		cmd.args[3] = 14;
10149a0bf528SMauro Carvalho Chehab 		cmd.len = 4;
1015fca3e007SAntti Palosaari 		ret = tda10071_cmd_execute(dev, &cmd);
10169a0bf528SMauro Carvalho Chehab 		if (ret)
10179a0bf528SMauro Carvalho Chehab 			goto error;
10189a0bf528SMauro Carvalho Chehab 	}
10199a0bf528SMauro Carvalho Chehab 
1020267897a4SAntti Palosaari 	/* init stats here in order signal app which stats are supported */
1021267897a4SAntti Palosaari 	c->strength.len = 1;
1022267897a4SAntti Palosaari 	c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1023267897a4SAntti Palosaari 	c->cnr.len = 1;
1024267897a4SAntti Palosaari 	c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1025267897a4SAntti Palosaari 	c->post_bit_error.len = 1;
1026267897a4SAntti Palosaari 	c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1027267897a4SAntti Palosaari 	c->block_error.len = 1;
1028267897a4SAntti Palosaari 	c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1029267897a4SAntti Palosaari 
10309a0bf528SMauro Carvalho Chehab 	return ret;
10319a0bf528SMauro Carvalho Chehab error_release_firmware:
10329a0bf528SMauro Carvalho Chehab 	release_firmware(fw);
10339a0bf528SMauro Carvalho Chehab error:
103459ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "failed=%d\n", ret);
10359a0bf528SMauro Carvalho Chehab 	return ret;
10369a0bf528SMauro Carvalho Chehab }
10379a0bf528SMauro Carvalho Chehab 
tda10071_sleep(struct dvb_frontend * fe)10389a0bf528SMauro Carvalho Chehab static int tda10071_sleep(struct dvb_frontend *fe)
10399a0bf528SMauro Carvalho Chehab {
1040fca3e007SAntti Palosaari 	struct tda10071_dev *dev = fe->demodulator_priv;
1041fca3e007SAntti Palosaari 	struct i2c_client *client = dev->client;
10429a0bf528SMauro Carvalho Chehab 	struct tda10071_cmd cmd;
10439a0bf528SMauro Carvalho Chehab 	int ret, i;
10449a0bf528SMauro Carvalho Chehab 	struct tda10071_reg_val_mask tab[] = {
10459a0bf528SMauro Carvalho Chehab 		{ 0xcd, 0x07, 0x07 },
10469a0bf528SMauro Carvalho Chehab 		{ 0x80, 0x02, 0x02 },
10479a0bf528SMauro Carvalho Chehab 		{ 0xcd, 0xc0, 0xc0 },
10489a0bf528SMauro Carvalho Chehab 		{ 0xce, 0x1b, 0x1b },
10499a0bf528SMauro Carvalho Chehab 		{ 0x9d, 0x01, 0x01 },
10509a0bf528SMauro Carvalho Chehab 		{ 0x9d, 0x02, 0x02 },
10519a0bf528SMauro Carvalho Chehab 		{ 0x9e, 0x01, 0x01 },
10529a0bf528SMauro Carvalho Chehab 		{ 0x87, 0x80, 0x80 },
10539a0bf528SMauro Carvalho Chehab 		{ 0xce, 0x08, 0x08 },
10549a0bf528SMauro Carvalho Chehab 		{ 0xce, 0x10, 0x10 },
10559a0bf528SMauro Carvalho Chehab 	};
10569a0bf528SMauro Carvalho Chehab 
1057fca3e007SAntti Palosaari 	if (!dev->warm) {
10589a0bf528SMauro Carvalho Chehab 		ret = -EFAULT;
10599a0bf528SMauro Carvalho Chehab 		goto error;
10609a0bf528SMauro Carvalho Chehab 	}
10619a0bf528SMauro Carvalho Chehab 
10629a0bf528SMauro Carvalho Chehab 	cmd.args[0] = CMD_SET_SLEEP_MODE;
10639a0bf528SMauro Carvalho Chehab 	cmd.args[1] = 0;
10649a0bf528SMauro Carvalho Chehab 	cmd.args[2] = 1;
10659a0bf528SMauro Carvalho Chehab 	cmd.len = 3;
1066fca3e007SAntti Palosaari 	ret = tda10071_cmd_execute(dev, &cmd);
10679a0bf528SMauro Carvalho Chehab 	if (ret)
10689a0bf528SMauro Carvalho Chehab 		goto error;
10699a0bf528SMauro Carvalho Chehab 
10709a0bf528SMauro Carvalho Chehab 	for (i = 0; i < ARRAY_SIZE(tab); i++) {
1071fca3e007SAntti Palosaari 		ret = tda10071_wr_reg_mask(dev, tab[i].reg, tab[i].val,
10729a0bf528SMauro Carvalho Chehab 			tab[i].mask);
10739a0bf528SMauro Carvalho Chehab 		if (ret)
10749a0bf528SMauro Carvalho Chehab 			goto error;
10759a0bf528SMauro Carvalho Chehab 	}
10769a0bf528SMauro Carvalho Chehab 
10779a0bf528SMauro Carvalho Chehab 	return ret;
10789a0bf528SMauro Carvalho Chehab error:
107959ca2ce1SAntti Palosaari 	dev_dbg(&client->dev, "failed=%d\n", ret);
10809a0bf528SMauro Carvalho Chehab 	return ret;
10819a0bf528SMauro Carvalho Chehab }
10829a0bf528SMauro Carvalho Chehab 
tda10071_get_tune_settings(struct dvb_frontend * fe,struct dvb_frontend_tune_settings * s)10839a0bf528SMauro Carvalho Chehab static int tda10071_get_tune_settings(struct dvb_frontend *fe,
10849a0bf528SMauro Carvalho Chehab 	struct dvb_frontend_tune_settings *s)
10859a0bf528SMauro Carvalho Chehab {
10869a0bf528SMauro Carvalho Chehab 	s->min_delay_ms = 8000;
10879a0bf528SMauro Carvalho Chehab 	s->step_size = 0;
10889a0bf528SMauro Carvalho Chehab 	s->max_drift = 0;
10899a0bf528SMauro Carvalho Chehab 
10909a0bf528SMauro Carvalho Chehab 	return 0;
10919a0bf528SMauro Carvalho Chehab }
10929a0bf528SMauro Carvalho Chehab 
1093bd336e63SMax Kellermann static const struct dvb_frontend_ops tda10071_ops = {
10949a0bf528SMauro Carvalho Chehab 	.delsys = { SYS_DVBS, SYS_DVBS2 },
10959a0bf528SMauro Carvalho Chehab 	.info = {
10969a0bf528SMauro Carvalho Chehab 		.name = "NXP TDA10071",
1097f1b1eabfSMauro Carvalho Chehab 		.frequency_min_hz    =  950 * MHz,
1098f1b1eabfSMauro Carvalho Chehab 		.frequency_max_hz    = 2150 * MHz,
1099f1b1eabfSMauro Carvalho Chehab 		.frequency_tolerance_hz = 5 * MHz,
11009a0bf528SMauro Carvalho Chehab 		.symbol_rate_min = 1000000,
11019a0bf528SMauro Carvalho Chehab 		.symbol_rate_max = 45000000,
11029a0bf528SMauro Carvalho Chehab 		.caps = FE_CAN_INVERSION_AUTO |
11039a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_1_2 |
11049a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_2_3 |
11059a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_3_4 |
11069a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_4_5 |
11079a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_5_6 |
11089a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_6_7 |
11099a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_7_8 |
11109a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_8_9 |
11119a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_AUTO |
11129a0bf528SMauro Carvalho Chehab 			FE_CAN_QPSK |
11139a0bf528SMauro Carvalho Chehab 			FE_CAN_RECOVER |
11149a0bf528SMauro Carvalho Chehab 			FE_CAN_2G_MODULATION
11159a0bf528SMauro Carvalho Chehab 	},
11169a0bf528SMauro Carvalho Chehab 
11179a0bf528SMauro Carvalho Chehab 	.get_tune_settings = tda10071_get_tune_settings,
11189a0bf528SMauro Carvalho Chehab 
11199a0bf528SMauro Carvalho Chehab 	.init = tda10071_init,
11209a0bf528SMauro Carvalho Chehab 	.sleep = tda10071_sleep,
11219a0bf528SMauro Carvalho Chehab 
11229a0bf528SMauro Carvalho Chehab 	.set_frontend = tda10071_set_frontend,
11239a0bf528SMauro Carvalho Chehab 	.get_frontend = tda10071_get_frontend,
11249a0bf528SMauro Carvalho Chehab 
11259a0bf528SMauro Carvalho Chehab 	.read_status = tda10071_read_status,
11269a0bf528SMauro Carvalho Chehab 	.read_snr = tda10071_read_snr,
11279a0bf528SMauro Carvalho Chehab 	.read_signal_strength = tda10071_read_signal_strength,
11289a0bf528SMauro Carvalho Chehab 	.read_ber = tda10071_read_ber,
11299a0bf528SMauro Carvalho Chehab 	.read_ucblocks = tda10071_read_ucblocks,
11309a0bf528SMauro Carvalho Chehab 
11319a0bf528SMauro Carvalho Chehab 	.diseqc_send_master_cmd = tda10071_diseqc_send_master_cmd,
11329a0bf528SMauro Carvalho Chehab 	.diseqc_recv_slave_reply = tda10071_diseqc_recv_slave_reply,
11339a0bf528SMauro Carvalho Chehab 	.diseqc_send_burst = tda10071_diseqc_send_burst,
11349a0bf528SMauro Carvalho Chehab 
11359a0bf528SMauro Carvalho Chehab 	.set_tone = tda10071_set_tone,
11369a0bf528SMauro Carvalho Chehab 	.set_voltage = tda10071_set_voltage,
11379a0bf528SMauro Carvalho Chehab };
11389a0bf528SMauro Carvalho Chehab 
tda10071_get_dvb_frontend(struct i2c_client * client)1139d69abb79SAntti Palosaari static struct dvb_frontend *tda10071_get_dvb_frontend(struct i2c_client *client)
1140d69abb79SAntti Palosaari {
1141fca3e007SAntti Palosaari 	struct tda10071_dev *dev = i2c_get_clientdata(client);
1142d69abb79SAntti Palosaari 
1143d69abb79SAntti Palosaari 	dev_dbg(&client->dev, "\n");
1144d69abb79SAntti Palosaari 
1145d69abb79SAntti Palosaari 	return &dev->fe;
1146d69abb79SAntti Palosaari }
1147d69abb79SAntti Palosaari 
tda10071_probe(struct i2c_client * client)11482caaba0bSUwe Kleine-König static int tda10071_probe(struct i2c_client *client)
1149d69abb79SAntti Palosaari {
1150fca3e007SAntti Palosaari 	struct tda10071_dev *dev;
1151d69abb79SAntti Palosaari 	struct tda10071_platform_data *pdata = client->dev.platform_data;
1152d69abb79SAntti Palosaari 	int ret;
115354ab48edSAntti Palosaari 	unsigned int uitmp;
115454ab48edSAntti Palosaari 	static const struct regmap_config regmap_config = {
115554ab48edSAntti Palosaari 		.reg_bits = 8,
115654ab48edSAntti Palosaari 		.val_bits = 8,
115754ab48edSAntti Palosaari 	};
1158d69abb79SAntti Palosaari 
1159d69abb79SAntti Palosaari 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1160d69abb79SAntti Palosaari 	if (!dev) {
1161d69abb79SAntti Palosaari 		ret = -ENOMEM;
1162d69abb79SAntti Palosaari 		goto err;
1163d69abb79SAntti Palosaari 	}
1164d69abb79SAntti Palosaari 
1165d69abb79SAntti Palosaari 	dev->client = client;
1166e14432a5SAntti Palosaari 	mutex_init(&dev->cmd_execute_mutex);
116759ca2ce1SAntti Palosaari 	dev->clk = pdata->clk;
116859ca2ce1SAntti Palosaari 	dev->i2c_wr_max = pdata->i2c_wr_max;
116959ca2ce1SAntti Palosaari 	dev->ts_mode = pdata->ts_mode;
117059ca2ce1SAntti Palosaari 	dev->spec_inv = pdata->spec_inv;
117159ca2ce1SAntti Palosaari 	dev->pll_multiplier = pdata->pll_multiplier;
117259ca2ce1SAntti Palosaari 	dev->tuner_i2c_addr = pdata->tuner_i2c_addr;
117354ab48edSAntti Palosaari 	dev->regmap = devm_regmap_init_i2c(client, &regmap_config);
117454ab48edSAntti Palosaari 	if (IS_ERR(dev->regmap)) {
117554ab48edSAntti Palosaari 		ret = PTR_ERR(dev->regmap);
117654ab48edSAntti Palosaari 		goto err_kfree;
117754ab48edSAntti Palosaari 	}
1178d69abb79SAntti Palosaari 
1179d69abb79SAntti Palosaari 	/* chip ID */
118054ab48edSAntti Palosaari 	ret = regmap_read(dev->regmap, 0xff, &uitmp);
1181ab80b19bSAntti Palosaari 	if (ret)
1182d69abb79SAntti Palosaari 		goto err_kfree;
118354ab48edSAntti Palosaari 	if (uitmp != 0x0f) {
1184ab80b19bSAntti Palosaari 		ret = -ENODEV;
1185ab80b19bSAntti Palosaari 		goto err_kfree;
1186ab80b19bSAntti Palosaari 	}
1187d69abb79SAntti Palosaari 
1188d69abb79SAntti Palosaari 	/* chip type */
118954ab48edSAntti Palosaari 	ret = regmap_read(dev->regmap, 0xdd, &uitmp);
1190ab80b19bSAntti Palosaari 	if (ret)
1191d69abb79SAntti Palosaari 		goto err_kfree;
119254ab48edSAntti Palosaari 	if (uitmp != 0x00) {
1193ab80b19bSAntti Palosaari 		ret = -ENODEV;
1194ab80b19bSAntti Palosaari 		goto err_kfree;
1195ab80b19bSAntti Palosaari 	}
1196d69abb79SAntti Palosaari 
1197d69abb79SAntti Palosaari 	/* chip version */
119854ab48edSAntti Palosaari 	ret = regmap_read(dev->regmap, 0xfe, &uitmp);
1199ab80b19bSAntti Palosaari 	if (ret)
1200d69abb79SAntti Palosaari 		goto err_kfree;
120154ab48edSAntti Palosaari 	if (uitmp != 0x01) {
1202ab80b19bSAntti Palosaari 		ret = -ENODEV;
1203ab80b19bSAntti Palosaari 		goto err_kfree;
1204ab80b19bSAntti Palosaari 	}
1205d69abb79SAntti Palosaari 
1206d69abb79SAntti Palosaari 	/* create dvb_frontend */
1207d69abb79SAntti Palosaari 	memcpy(&dev->fe.ops, &tda10071_ops, sizeof(struct dvb_frontend_ops));
1208d69abb79SAntti Palosaari 	dev->fe.demodulator_priv = dev;
1209d69abb79SAntti Palosaari 	i2c_set_clientdata(client, dev);
1210d69abb79SAntti Palosaari 
1211d69abb79SAntti Palosaari 	/* setup callbacks */
1212d69abb79SAntti Palosaari 	pdata->get_dvb_frontend = tda10071_get_dvb_frontend;
1213d69abb79SAntti Palosaari 
1214d69abb79SAntti Palosaari 	dev_info(&client->dev, "NXP TDA10071 successfully identified\n");
1215d69abb79SAntti Palosaari 	return 0;
1216d69abb79SAntti Palosaari err_kfree:
1217d69abb79SAntti Palosaari 	kfree(dev);
1218d69abb79SAntti Palosaari err:
1219d69abb79SAntti Palosaari 	dev_dbg(&client->dev, "failed=%d\n", ret);
1220d69abb79SAntti Palosaari 	return ret;
1221d69abb79SAntti Palosaari }
1222d69abb79SAntti Palosaari 
tda10071_remove(struct i2c_client * client)1223ed5c2f5fSUwe Kleine-König static void tda10071_remove(struct i2c_client *client)
1224d69abb79SAntti Palosaari {
1225d69abb79SAntti Palosaari 	struct tda10071_dev *dev = i2c_get_clientdata(client);
1226d69abb79SAntti Palosaari 
1227d69abb79SAntti Palosaari 	dev_dbg(&client->dev, "\n");
1228d69abb79SAntti Palosaari 
1229d69abb79SAntti Palosaari 	kfree(dev);
1230d69abb79SAntti Palosaari }
1231d69abb79SAntti Palosaari 
1232d69abb79SAntti Palosaari static const struct i2c_device_id tda10071_id_table[] = {
1233d69abb79SAntti Palosaari 	{"tda10071_cx24118", 0},
1234d69abb79SAntti Palosaari 	{}
1235d69abb79SAntti Palosaari };
1236d69abb79SAntti Palosaari MODULE_DEVICE_TABLE(i2c, tda10071_id_table);
1237d69abb79SAntti Palosaari 
1238d69abb79SAntti Palosaari static struct i2c_driver tda10071_driver = {
1239d69abb79SAntti Palosaari 	.driver = {
1240d69abb79SAntti Palosaari 		.name	= "tda10071",
1241d69abb79SAntti Palosaari 		.suppress_bind_attrs = true,
1242d69abb79SAntti Palosaari 	},
1243*aaeb31c0SUwe Kleine-König 	.probe		= tda10071_probe,
1244d69abb79SAntti Palosaari 	.remove		= tda10071_remove,
1245d69abb79SAntti Palosaari 	.id_table	= tda10071_id_table,
1246d69abb79SAntti Palosaari };
1247d69abb79SAntti Palosaari 
1248d69abb79SAntti Palosaari module_i2c_driver(tda10071_driver);
1249d69abb79SAntti Palosaari 
12509a0bf528SMauro Carvalho Chehab MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
12519a0bf528SMauro Carvalho Chehab MODULE_DESCRIPTION("NXP TDA10071 DVB-S/S2 demodulator driver");
12529a0bf528SMauro Carvalho Chehab MODULE_LICENSE("GPL");
125303f4efc3SAntti Palosaari MODULE_FIRMWARE(TDA10071_FIRMWARE);
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