19a0bf528SMauro Carvalho Chehab /*
29a0bf528SMauro Carvalho Chehab 	STV0900/0903 Multistandard Broadcast Frontend driver
39a0bf528SMauro Carvalho Chehab 	Copyright (C) Manu Abraham <abraham.manu@gmail.com>
49a0bf528SMauro Carvalho Chehab 
59a0bf528SMauro Carvalho Chehab 	Copyright (C) ST Microelectronics
69a0bf528SMauro Carvalho Chehab 
79a0bf528SMauro Carvalho Chehab 	This program is free software; you can redistribute it and/or modify
89a0bf528SMauro Carvalho Chehab 	it under the terms of the GNU General Public License as published by
99a0bf528SMauro Carvalho Chehab 	the Free Software Foundation; either version 2 of the License, or
109a0bf528SMauro Carvalho Chehab 	(at your option) any later version.
119a0bf528SMauro Carvalho Chehab 
129a0bf528SMauro Carvalho Chehab 	This program is distributed in the hope that it will be useful,
139a0bf528SMauro Carvalho Chehab 	but WITHOUT ANY WARRANTY; without even the implied warranty of
149a0bf528SMauro Carvalho Chehab 	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
159a0bf528SMauro Carvalho Chehab 	GNU General Public License for more details.
169a0bf528SMauro Carvalho Chehab 
179a0bf528SMauro Carvalho Chehab 	You should have received a copy of the GNU General Public License
189a0bf528SMauro Carvalho Chehab 	along with this program; if not, write to the Free Software
199a0bf528SMauro Carvalho Chehab 	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
209a0bf528SMauro Carvalho Chehab */
219a0bf528SMauro Carvalho Chehab 
229a0bf528SMauro Carvalho Chehab #include <linux/init.h>
239a0bf528SMauro Carvalho Chehab #include <linux/kernel.h>
249a0bf528SMauro Carvalho Chehab #include <linux/module.h>
259a0bf528SMauro Carvalho Chehab #include <linux/string.h>
269a0bf528SMauro Carvalho Chehab #include <linux/slab.h>
279a0bf528SMauro Carvalho Chehab #include <linux/mutex.h>
289a0bf528SMauro Carvalho Chehab 
299a0bf528SMauro Carvalho Chehab #include <linux/dvb/frontend.h>
309a0bf528SMauro Carvalho Chehab #include "dvb_frontend.h"
319a0bf528SMauro Carvalho Chehab 
329a0bf528SMauro Carvalho Chehab #include "stv6110x.h" /* for demodulator internal modes */
339a0bf528SMauro Carvalho Chehab 
349a0bf528SMauro Carvalho Chehab #include "stv090x_reg.h"
359a0bf528SMauro Carvalho Chehab #include "stv090x.h"
369a0bf528SMauro Carvalho Chehab #include "stv090x_priv.h"
379a0bf528SMauro Carvalho Chehab 
38f7a35df1SMauro Carvalho Chehab /* Max transfer size done by I2C transfer functions */
39f7a35df1SMauro Carvalho Chehab #define MAX_XFER_SIZE  64
40f7a35df1SMauro Carvalho Chehab 
419a0bf528SMauro Carvalho Chehab static unsigned int verbose;
429a0bf528SMauro Carvalho Chehab module_param(verbose, int, 0644);
439a0bf528SMauro Carvalho Chehab 
449a0bf528SMauro Carvalho Chehab /* internal params node */
459a0bf528SMauro Carvalho Chehab struct stv090x_dev {
469a0bf528SMauro Carvalho Chehab 	/* pointer for internal params, one for each pair of demods */
479a0bf528SMauro Carvalho Chehab 	struct stv090x_internal		*internal;
489a0bf528SMauro Carvalho Chehab 	struct stv090x_dev		*next_dev;
499a0bf528SMauro Carvalho Chehab };
509a0bf528SMauro Carvalho Chehab 
519a0bf528SMauro Carvalho Chehab /* first internal params */
529a0bf528SMauro Carvalho Chehab static struct stv090x_dev *stv090x_first_dev;
539a0bf528SMauro Carvalho Chehab 
549a0bf528SMauro Carvalho Chehab /* find chip by i2c adapter and i2c address */
559a0bf528SMauro Carvalho Chehab static struct stv090x_dev *find_dev(struct i2c_adapter *i2c_adap,
569a0bf528SMauro Carvalho Chehab 					u8 i2c_addr)
579a0bf528SMauro Carvalho Chehab {
589a0bf528SMauro Carvalho Chehab 	struct stv090x_dev *temp_dev = stv090x_first_dev;
599a0bf528SMauro Carvalho Chehab 
609a0bf528SMauro Carvalho Chehab 	/*
619a0bf528SMauro Carvalho Chehab 	 Search of the last stv0900 chip or
629a0bf528SMauro Carvalho Chehab 	 find it by i2c adapter and i2c address */
639a0bf528SMauro Carvalho Chehab 	while ((temp_dev != NULL) &&
649a0bf528SMauro Carvalho Chehab 		((temp_dev->internal->i2c_adap != i2c_adap) ||
659a0bf528SMauro Carvalho Chehab 		(temp_dev->internal->i2c_addr != i2c_addr))) {
669a0bf528SMauro Carvalho Chehab 
679a0bf528SMauro Carvalho Chehab 		temp_dev = temp_dev->next_dev;
689a0bf528SMauro Carvalho Chehab 	}
699a0bf528SMauro Carvalho Chehab 
709a0bf528SMauro Carvalho Chehab 	return temp_dev;
719a0bf528SMauro Carvalho Chehab }
729a0bf528SMauro Carvalho Chehab 
739a0bf528SMauro Carvalho Chehab /* deallocating chip */
749a0bf528SMauro Carvalho Chehab static void remove_dev(struct stv090x_internal *internal)
759a0bf528SMauro Carvalho Chehab {
769a0bf528SMauro Carvalho Chehab 	struct stv090x_dev *prev_dev = stv090x_first_dev;
779a0bf528SMauro Carvalho Chehab 	struct stv090x_dev *del_dev = find_dev(internal->i2c_adap,
789a0bf528SMauro Carvalho Chehab 						internal->i2c_addr);
799a0bf528SMauro Carvalho Chehab 
809a0bf528SMauro Carvalho Chehab 	if (del_dev != NULL) {
819a0bf528SMauro Carvalho Chehab 		if (del_dev == stv090x_first_dev) {
829a0bf528SMauro Carvalho Chehab 			stv090x_first_dev = del_dev->next_dev;
839a0bf528SMauro Carvalho Chehab 		} else {
849a0bf528SMauro Carvalho Chehab 			while (prev_dev->next_dev != del_dev)
859a0bf528SMauro Carvalho Chehab 				prev_dev = prev_dev->next_dev;
869a0bf528SMauro Carvalho Chehab 
879a0bf528SMauro Carvalho Chehab 			prev_dev->next_dev = del_dev->next_dev;
889a0bf528SMauro Carvalho Chehab 		}
899a0bf528SMauro Carvalho Chehab 
909a0bf528SMauro Carvalho Chehab 		kfree(del_dev);
919a0bf528SMauro Carvalho Chehab 	}
929a0bf528SMauro Carvalho Chehab }
939a0bf528SMauro Carvalho Chehab 
949a0bf528SMauro Carvalho Chehab /* allocating new chip */
959a0bf528SMauro Carvalho Chehab static struct stv090x_dev *append_internal(struct stv090x_internal *internal)
969a0bf528SMauro Carvalho Chehab {
979a0bf528SMauro Carvalho Chehab 	struct stv090x_dev *new_dev;
989a0bf528SMauro Carvalho Chehab 	struct stv090x_dev *temp_dev;
999a0bf528SMauro Carvalho Chehab 
1009a0bf528SMauro Carvalho Chehab 	new_dev = kmalloc(sizeof(struct stv090x_dev), GFP_KERNEL);
1019a0bf528SMauro Carvalho Chehab 	if (new_dev != NULL) {
1029a0bf528SMauro Carvalho Chehab 		new_dev->internal = internal;
1039a0bf528SMauro Carvalho Chehab 		new_dev->next_dev = NULL;
1049a0bf528SMauro Carvalho Chehab 
1059a0bf528SMauro Carvalho Chehab 		/* append to list */
1069a0bf528SMauro Carvalho Chehab 		if (stv090x_first_dev == NULL) {
1079a0bf528SMauro Carvalho Chehab 			stv090x_first_dev = new_dev;
1089a0bf528SMauro Carvalho Chehab 		} else {
1099a0bf528SMauro Carvalho Chehab 			temp_dev = stv090x_first_dev;
1109a0bf528SMauro Carvalho Chehab 			while (temp_dev->next_dev != NULL)
1119a0bf528SMauro Carvalho Chehab 				temp_dev = temp_dev->next_dev;
1129a0bf528SMauro Carvalho Chehab 
1139a0bf528SMauro Carvalho Chehab 			temp_dev->next_dev = new_dev;
1149a0bf528SMauro Carvalho Chehab 		}
1159a0bf528SMauro Carvalho Chehab 	}
1169a0bf528SMauro Carvalho Chehab 
1179a0bf528SMauro Carvalho Chehab 	return new_dev;
1189a0bf528SMauro Carvalho Chehab }
1199a0bf528SMauro Carvalho Chehab 
1209a0bf528SMauro Carvalho Chehab 
1219a0bf528SMauro Carvalho Chehab /* DVBS1 and DSS C/N Lookup table */
1229a0bf528SMauro Carvalho Chehab static const struct stv090x_tab stv090x_s1cn_tab[] = {
1239a0bf528SMauro Carvalho Chehab 	{   0, 8917 }, /*  0.0dB */
1249a0bf528SMauro Carvalho Chehab 	{   5, 8801 }, /*  0.5dB */
1259a0bf528SMauro Carvalho Chehab 	{  10, 8667 }, /*  1.0dB */
1269a0bf528SMauro Carvalho Chehab 	{  15, 8522 }, /*  1.5dB */
1279a0bf528SMauro Carvalho Chehab 	{  20, 8355 }, /*  2.0dB */
1289a0bf528SMauro Carvalho Chehab 	{  25, 8175 }, /*  2.5dB */
1299a0bf528SMauro Carvalho Chehab 	{  30, 7979 }, /*  3.0dB */
1309a0bf528SMauro Carvalho Chehab 	{  35, 7763 }, /*  3.5dB */
1319a0bf528SMauro Carvalho Chehab 	{  40, 7530 }, /*  4.0dB */
1329a0bf528SMauro Carvalho Chehab 	{  45, 7282 }, /*  4.5dB */
1339a0bf528SMauro Carvalho Chehab 	{  50, 7026 }, /*  5.0dB */
1349a0bf528SMauro Carvalho Chehab 	{  55, 6781 }, /*  5.5dB */
1359a0bf528SMauro Carvalho Chehab 	{  60, 6514 }, /*  6.0dB */
1369a0bf528SMauro Carvalho Chehab 	{  65, 6241 }, /*  6.5dB */
1379a0bf528SMauro Carvalho Chehab 	{  70, 5965 }, /*  7.0dB */
1389a0bf528SMauro Carvalho Chehab 	{  75, 5690 }, /*  7.5dB */
1399a0bf528SMauro Carvalho Chehab 	{  80, 5424 }, /*  8.0dB */
1409a0bf528SMauro Carvalho Chehab 	{  85, 5161 }, /*  8.5dB */
1419a0bf528SMauro Carvalho Chehab 	{  90, 4902 }, /*  9.0dB */
1429a0bf528SMauro Carvalho Chehab 	{  95, 4654 }, /*  9.5dB */
1439a0bf528SMauro Carvalho Chehab 	{ 100, 4417 }, /* 10.0dB */
1449a0bf528SMauro Carvalho Chehab 	{ 105, 4186 }, /* 10.5dB */
1459a0bf528SMauro Carvalho Chehab 	{ 110, 3968 }, /* 11.0dB */
1469a0bf528SMauro Carvalho Chehab 	{ 115, 3757 }, /* 11.5dB */
1479a0bf528SMauro Carvalho Chehab 	{ 120, 3558 }, /* 12.0dB */
1489a0bf528SMauro Carvalho Chehab 	{ 125, 3366 }, /* 12.5dB */
1499a0bf528SMauro Carvalho Chehab 	{ 130, 3185 }, /* 13.0dB */
1509a0bf528SMauro Carvalho Chehab 	{ 135, 3012 }, /* 13.5dB */
1519a0bf528SMauro Carvalho Chehab 	{ 140, 2850 }, /* 14.0dB */
1529a0bf528SMauro Carvalho Chehab 	{ 145, 2698 }, /* 14.5dB */
1539a0bf528SMauro Carvalho Chehab 	{ 150, 2550 }, /* 15.0dB */
1549a0bf528SMauro Carvalho Chehab 	{ 160, 2283 }, /* 16.0dB */
1559a0bf528SMauro Carvalho Chehab 	{ 170, 2042 }, /* 17.0dB */
1569a0bf528SMauro Carvalho Chehab 	{ 180, 1827 }, /* 18.0dB */
1579a0bf528SMauro Carvalho Chehab 	{ 190, 1636 }, /* 19.0dB */
1589a0bf528SMauro Carvalho Chehab 	{ 200, 1466 }, /* 20.0dB */
1599a0bf528SMauro Carvalho Chehab 	{ 210, 1315 }, /* 21.0dB */
1609a0bf528SMauro Carvalho Chehab 	{ 220, 1181 }, /* 22.0dB */
1619a0bf528SMauro Carvalho Chehab 	{ 230, 1064 }, /* 23.0dB */
1629a0bf528SMauro Carvalho Chehab 	{ 240,	960 }, /* 24.0dB */
1639a0bf528SMauro Carvalho Chehab 	{ 250,	869 }, /* 25.0dB */
1649a0bf528SMauro Carvalho Chehab 	{ 260,	792 }, /* 26.0dB */
1659a0bf528SMauro Carvalho Chehab 	{ 270,	724 }, /* 27.0dB */
1669a0bf528SMauro Carvalho Chehab 	{ 280,	665 }, /* 28.0dB */
1679a0bf528SMauro Carvalho Chehab 	{ 290,	616 }, /* 29.0dB */
1689a0bf528SMauro Carvalho Chehab 	{ 300,	573 }, /* 30.0dB */
1699a0bf528SMauro Carvalho Chehab 	{ 310,	537 }, /* 31.0dB */
1709a0bf528SMauro Carvalho Chehab 	{ 320,	507 }, /* 32.0dB */
1719a0bf528SMauro Carvalho Chehab 	{ 330,	483 }, /* 33.0dB */
1729a0bf528SMauro Carvalho Chehab 	{ 400,	398 }, /* 40.0dB */
1739a0bf528SMauro Carvalho Chehab 	{ 450,	381 }, /* 45.0dB */
1749a0bf528SMauro Carvalho Chehab 	{ 500,	377 }  /* 50.0dB */
1759a0bf528SMauro Carvalho Chehab };
1769a0bf528SMauro Carvalho Chehab 
1779a0bf528SMauro Carvalho Chehab /* DVBS2 C/N Lookup table */
1789a0bf528SMauro Carvalho Chehab static const struct stv090x_tab stv090x_s2cn_tab[] = {
1799a0bf528SMauro Carvalho Chehab 	{ -30, 13348 }, /* -3.0dB */
1809a0bf528SMauro Carvalho Chehab 	{ -20, 12640 }, /* -2d.0B */
1819a0bf528SMauro Carvalho Chehab 	{ -10, 11883 }, /* -1.0dB */
1829a0bf528SMauro Carvalho Chehab 	{   0, 11101 }, /* -0.0dB */
1839a0bf528SMauro Carvalho Chehab 	{   5, 10718 }, /*  0.5dB */
1849a0bf528SMauro Carvalho Chehab 	{  10, 10339 }, /*  1.0dB */
1859a0bf528SMauro Carvalho Chehab 	{  15,  9947 }, /*  1.5dB */
1869a0bf528SMauro Carvalho Chehab 	{  20,  9552 }, /*  2.0dB */
1879a0bf528SMauro Carvalho Chehab 	{  25,  9183 }, /*  2.5dB */
1889a0bf528SMauro Carvalho Chehab 	{  30,  8799 }, /*  3.0dB */
1899a0bf528SMauro Carvalho Chehab 	{  35,  8422 }, /*  3.5dB */
1909a0bf528SMauro Carvalho Chehab 	{  40,  8062 }, /*  4.0dB */
1919a0bf528SMauro Carvalho Chehab 	{  45,  7707 }, /*  4.5dB */
1929a0bf528SMauro Carvalho Chehab 	{  50,  7353 }, /*  5.0dB */
1939a0bf528SMauro Carvalho Chehab 	{  55,  7025 }, /*  5.5dB */
1949a0bf528SMauro Carvalho Chehab 	{  60,  6684 }, /*  6.0dB */
1959a0bf528SMauro Carvalho Chehab 	{  65,  6331 }, /*  6.5dB */
1969a0bf528SMauro Carvalho Chehab 	{  70,  6036 }, /*  7.0dB */
1979a0bf528SMauro Carvalho Chehab 	{  75,  5727 }, /*  7.5dB */
1989a0bf528SMauro Carvalho Chehab 	{  80,  5437 }, /*  8.0dB */
1999a0bf528SMauro Carvalho Chehab 	{  85,  5164 }, /*  8.5dB */
2009a0bf528SMauro Carvalho Chehab 	{  90,  4902 }, /*  9.0dB */
2019a0bf528SMauro Carvalho Chehab 	{  95,  4653 }, /*  9.5dB */
2029a0bf528SMauro Carvalho Chehab 	{ 100,  4408 }, /* 10.0dB */
2039a0bf528SMauro Carvalho Chehab 	{ 105,  4187 }, /* 10.5dB */
2049a0bf528SMauro Carvalho Chehab 	{ 110,  3961 }, /* 11.0dB */
2059a0bf528SMauro Carvalho Chehab 	{ 115,  3751 }, /* 11.5dB */
2069a0bf528SMauro Carvalho Chehab 	{ 120,  3558 }, /* 12.0dB */
2079a0bf528SMauro Carvalho Chehab 	{ 125,  3368 }, /* 12.5dB */
2089a0bf528SMauro Carvalho Chehab 	{ 130,  3191 }, /* 13.0dB */
2099a0bf528SMauro Carvalho Chehab 	{ 135,  3017 }, /* 13.5dB */
2109a0bf528SMauro Carvalho Chehab 	{ 140,  2862 }, /* 14.0dB */
2119a0bf528SMauro Carvalho Chehab 	{ 145,  2710 }, /* 14.5dB */
2129a0bf528SMauro Carvalho Chehab 	{ 150,  2565 }, /* 15.0dB */
2139a0bf528SMauro Carvalho Chehab 	{ 160,  2300 }, /* 16.0dB */
2149a0bf528SMauro Carvalho Chehab 	{ 170,  2058 }, /* 17.0dB */
2159a0bf528SMauro Carvalho Chehab 	{ 180,  1849 }, /* 18.0dB */
2169a0bf528SMauro Carvalho Chehab 	{ 190,  1663 }, /* 19.0dB */
2179a0bf528SMauro Carvalho Chehab 	{ 200,  1495 }, /* 20.0dB */
2189a0bf528SMauro Carvalho Chehab 	{ 210,  1349 }, /* 21.0dB */
2199a0bf528SMauro Carvalho Chehab 	{ 220,  1222 }, /* 22.0dB */
2209a0bf528SMauro Carvalho Chehab 	{ 230,  1110 }, /* 23.0dB */
2219a0bf528SMauro Carvalho Chehab 	{ 240,  1011 }, /* 24.0dB */
2229a0bf528SMauro Carvalho Chehab 	{ 250,   925 }, /* 25.0dB */
2239a0bf528SMauro Carvalho Chehab 	{ 260,   853 }, /* 26.0dB */
2249a0bf528SMauro Carvalho Chehab 	{ 270,   789 }, /* 27.0dB */
2259a0bf528SMauro Carvalho Chehab 	{ 280,   734 }, /* 28.0dB */
2269a0bf528SMauro Carvalho Chehab 	{ 290,   690 }, /* 29.0dB */
2279a0bf528SMauro Carvalho Chehab 	{ 300,   650 }, /* 30.0dB */
2289a0bf528SMauro Carvalho Chehab 	{ 310,   619 }, /* 31.0dB */
2299a0bf528SMauro Carvalho Chehab 	{ 320,   593 }, /* 32.0dB */
2309a0bf528SMauro Carvalho Chehab 	{ 330,   571 }, /* 33.0dB */
2319a0bf528SMauro Carvalho Chehab 	{ 400,   498 }, /* 40.0dB */
2329a0bf528SMauro Carvalho Chehab 	{ 450,	 484 }, /* 45.0dB */
2339a0bf528SMauro Carvalho Chehab 	{ 500,	 481 }	/* 50.0dB */
2349a0bf528SMauro Carvalho Chehab };
2359a0bf528SMauro Carvalho Chehab 
2369a0bf528SMauro Carvalho Chehab /* RF level C/N lookup table */
2379a0bf528SMauro Carvalho Chehab static const struct stv090x_tab stv090x_rf_tab[] = {
2389a0bf528SMauro Carvalho Chehab 	{  -5, 0xcaa1 }, /*  -5dBm */
2399a0bf528SMauro Carvalho Chehab 	{ -10, 0xc229 }, /* -10dBm */
2409a0bf528SMauro Carvalho Chehab 	{ -15, 0xbb08 }, /* -15dBm */
2419a0bf528SMauro Carvalho Chehab 	{ -20, 0xb4bc }, /* -20dBm */
2429a0bf528SMauro Carvalho Chehab 	{ -25, 0xad5a }, /* -25dBm */
2439a0bf528SMauro Carvalho Chehab 	{ -30, 0xa298 }, /* -30dBm */
2449a0bf528SMauro Carvalho Chehab 	{ -35, 0x98a8 }, /* -35dBm */
2459a0bf528SMauro Carvalho Chehab 	{ -40, 0x8389 }, /* -40dBm */
2469a0bf528SMauro Carvalho Chehab 	{ -45, 0x59be }, /* -45dBm */
2479a0bf528SMauro Carvalho Chehab 	{ -50, 0x3a14 }, /* -50dBm */
2489a0bf528SMauro Carvalho Chehab 	{ -55, 0x2d11 }, /* -55dBm */
2499a0bf528SMauro Carvalho Chehab 	{ -60, 0x210d }, /* -60dBm */
2509a0bf528SMauro Carvalho Chehab 	{ -65, 0xa14f }, /* -65dBm */
2519a0bf528SMauro Carvalho Chehab 	{ -70, 0x07aa }	 /* -70dBm */
2529a0bf528SMauro Carvalho Chehab };
2539a0bf528SMauro Carvalho Chehab 
2549a0bf528SMauro Carvalho Chehab 
2559a0bf528SMauro Carvalho Chehab static struct stv090x_reg stv0900_initval[] = {
2569a0bf528SMauro Carvalho Chehab 
2579a0bf528SMauro Carvalho Chehab 	{ STV090x_OUTCFG,		0x00 },
2589a0bf528SMauro Carvalho Chehab 	{ STV090x_MODECFG,		0xff },
2599a0bf528SMauro Carvalho Chehab 	{ STV090x_AGCRF1CFG,		0x11 },
2609a0bf528SMauro Carvalho Chehab 	{ STV090x_AGCRF2CFG,		0x13 },
2619a0bf528SMauro Carvalho Chehab 	{ STV090x_TSGENERAL1X,		0x14 },
2629a0bf528SMauro Carvalho Chehab 	{ STV090x_TSTTNR2,		0x21 },
2639a0bf528SMauro Carvalho Chehab 	{ STV090x_TSTTNR4,		0x21 },
2649a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_DISTXCTL,		0x22 },
2659a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_F22TX,		0xc0 },
2669a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_F22RX,		0xc0 },
2679a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_DISRXCTL,		0x00 },
2689a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_DMDCFGMD,		0xF9 },
2699a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_DEMOD,		0x08 },
2709a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_DMDCFG3,		0xc4 },
2719a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_CARFREQ,		0xed },
2729a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_LDT,		0xd0 },
2739a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_LDT2,		0xb8 },
2749a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_TMGCFG,		0xd2 },
2759a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_TMGTHRISE,		0x20 },
2769a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_TMGCFG,		0xd2 },
2779a0bf528SMauro Carvalho Chehab 
2789a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_TMGTHFALL,		0x00 },
2799a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_FECSPY,		0x88 },
2809a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_FSPYDATA,		0x3a },
2819a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_FBERCPT4,		0x00 },
2829a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_FSPYBER,		0x10 },
2839a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_ERRCTRL1,		0x35 },
2849a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_ERRCTRL2,		0xc1 },
2859a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_CFRICFG,		0xf8 },
2869a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_NOSCFG,		0x1c },
2879a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_DMDTOM,		0x20 },
2889a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_CORRELMANT,	0x70 },
2899a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_CORRELABS,		0x88 },
2909a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_AGC2O,		0x5b },
2919a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_AGC2REF,		0x38 },
2929a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_CARCFG,		0xe4 },
2939a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_ACLC,		0x1A },
2949a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_BCLC,		0x09 },
2959a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_CARHDR,		0x08 },
2969a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_KREFTMG,		0xc1 },
2979a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_SFRUPRATIO,	0xf0 },
2989a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_SFRLOWRATIO,	0x70 },
2999a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_SFRSTEP,		0x58 },
3009a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_TMGCFG2,		0x01 },
3019a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_CAR2CFG,		0x26 },
3029a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_BCLC2S2Q,		0x86 },
3039a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_BCLC2S28,		0x86 },
3049a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_SMAPCOEF7,		0x77 },
3059a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_SMAPCOEF6,		0x85 },
3069a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_SMAPCOEF5,		0x77 },
3079a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_TSCFGL,		0x20 },
3089a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_DMDCFG2,		0x3b },
3099a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLST0,	0xff },
3109a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLST1,	0xff },
3119a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLST2,	0xff },
3129a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLST3,	0xff },
3139a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLST4,	0xff },
3149a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLST5,	0xff },
3159a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLST6,	0xff },
3169a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLST7,	0xcc },
3179a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLST8,	0xcc },
3189a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLST9,	0xcc },
3199a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLSTA,	0xcc },
3209a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLSTB,	0xcc },
3219a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLSTC,	0xcc },
3229a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLSTD,	0xcc },
3239a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLSTE,	0xcc },
3249a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_MODCODLSTF,	0xcf },
3259a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DISTXCTL,		0x22 },
3269a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_F22TX,		0xc0 },
3279a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_F22RX,		0xc0 },
3289a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DISRXCTL,		0x00 },
3299a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DMDCFGMD,		0xf9 },
3309a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DEMOD,		0x08 },
3319a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DMDCFG3,		0xc4 },
3329a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DMDTOM,		0x20 },
3339a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CARFREQ,		0xed },
3349a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_LDT,		0xd0 },
3359a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_LDT2,		0xb8 },
3369a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_TMGCFG,		0xd2 },
3379a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_TMGTHRISE,		0x20 },
3389a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_TMGTHFALL,		0x00 },
3399a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SFRUPRATIO,	0xf0 },
3409a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SFRLOWRATIO,	0x70 },
3419a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_TSCFGL,		0x20 },
3429a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_FECSPY,		0x88 },
3439a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_FSPYDATA,		0x3a },
3449a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_FBERCPT4,		0x00 },
3459a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_FSPYBER,		0x10 },
3469a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_ERRCTRL1,		0x35 },
3479a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_ERRCTRL2,		0xc1 },
3489a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CFRICFG,		0xf8 },
3499a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_NOSCFG,		0x1c },
3509a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CORRELMANT,	0x70 },
3519a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CORRELABS,		0x88 },
3529a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_AGC2O,		0x5b },
3539a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_AGC2REF,		0x38 },
3549a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CARCFG,		0xe4 },
3559a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_ACLC,		0x1A },
3569a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_BCLC,		0x09 },
3579a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CARHDR,		0x08 },
3589a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_KREFTMG,		0xc1 },
3599a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SFRSTEP,		0x58 },
3609a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_TMGCFG2,		0x01 },
3619a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CAR2CFG,		0x26 },
3629a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_BCLC2S2Q,		0x86 },
3639a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_BCLC2S28,		0x86 },
3649a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SMAPCOEF7,		0x77 },
3659a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SMAPCOEF6,		0x85 },
3669a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SMAPCOEF5,		0x77 },
3679a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DMDCFG2,		0x3b },
3689a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST0,	0xff },
3699a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST1,	0xff },
3709a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST2,	0xff },
3719a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST3,	0xff },
3729a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST4,	0xff },
3739a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST5,	0xff },
3749a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST6,	0xff },
3759a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST7,	0xcc },
3769a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST8,	0xcc },
3779a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST9,	0xcc },
3789a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLSTA,	0xcc },
3799a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLSTB,	0xcc },
3809a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLSTC,	0xcc },
3819a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLSTD,	0xcc },
3829a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLSTE,	0xcc },
3839a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLSTF,	0xcf },
3849a0bf528SMauro Carvalho Chehab 	{ STV090x_GENCFG,		0x1d },
3859a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF4,		0x37 },
3869a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF5,		0x29 },
3879a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF6,		0x37 },
3889a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF7,		0x33 },
3899a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF8,		0x31 },
3909a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF9,		0x2f },
3919a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF10,		0x39 },
3929a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF11,		0x3a },
3939a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF12,		0x29 },
3949a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF13,		0x37 },
3959a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF14,		0x33 },
3969a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF15,		0x2f },
3979a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF16,		0x39 },
3989a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF17,		0x3a },
3999a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITERNOERR,		0x04 },
4009a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF4,		0x0C },
4019a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF5,		0x0F },
4029a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF6,		0x11 },
4039a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF7,		0x14 },
4049a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF8,		0x17 },
4059a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF9,		0x19 },
4069a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF10,		0x20 },
4079a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF11,		0x21 },
4089a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF12,		0x0D },
4099a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF13,		0x0F },
4109a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF14,		0x13 },
4119a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF15,		0x1A },
4129a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF16,		0x1F },
4139a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF17,		0x21 },
4149a0bf528SMauro Carvalho Chehab 	{ STV090x_RCCFGH,		0x20 },
4159a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_FECM,		0x01 }, /* disable DSS modes */
4169a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_FECM,		0x01 }, /* disable DSS modes */
4179a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_PRVIT,		0x2F }, /* disable PR 6/7 */
4189a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_PRVIT,		0x2F }, /* disable PR 6/7 */
4199a0bf528SMauro Carvalho Chehab };
4209a0bf528SMauro Carvalho Chehab 
4219a0bf528SMauro Carvalho Chehab static struct stv090x_reg stv0903_initval[] = {
4229a0bf528SMauro Carvalho Chehab 	{ STV090x_OUTCFG,		0x00 },
4239a0bf528SMauro Carvalho Chehab 	{ STV090x_AGCRF1CFG,		0x11 },
4249a0bf528SMauro Carvalho Chehab 	{ STV090x_STOPCLK1,		0x48 },
4259a0bf528SMauro Carvalho Chehab 	{ STV090x_STOPCLK2,		0x14 },
4269a0bf528SMauro Carvalho Chehab 	{ STV090x_TSTTNR1,		0x27 },
4279a0bf528SMauro Carvalho Chehab 	{ STV090x_TSTTNR2,		0x21 },
4289a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DISTXCTL,		0x22 },
4299a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_F22TX,		0xc0 },
4309a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_F22RX,		0xc0 },
4319a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DISRXCTL,		0x00 },
4329a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DMDCFGMD,		0xF9 },
4339a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DEMOD,		0x08 },
4349a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DMDCFG3,		0xc4 },
4359a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CARFREQ,		0xed },
4369a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_TNRCFG2,		0x82 },
4379a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_LDT,		0xd0 },
4389a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_LDT2,		0xb8 },
4399a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_TMGCFG,		0xd2 },
4409a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_TMGTHRISE,		0x20 },
4419a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_TMGTHFALL,		0x00 },
4429a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SFRUPRATIO,	0xf0 },
4439a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SFRLOWRATIO,	0x70 },
4449a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_TSCFGL,		0x20 },
4459a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_FECSPY,		0x88 },
4469a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_FSPYDATA,		0x3a },
4479a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_FBERCPT4,		0x00 },
4489a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_FSPYBER,		0x10 },
4499a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_ERRCTRL1,		0x35 },
4509a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_ERRCTRL2,		0xc1 },
4519a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CFRICFG,		0xf8 },
4529a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_NOSCFG,		0x1c },
4539a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DMDTOM,		0x20 },
4549a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CORRELMANT,	0x70 },
4559a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CORRELABS,		0x88 },
4569a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_AGC2O,		0x5b },
4579a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_AGC2REF,		0x38 },
4589a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CARCFG,		0xe4 },
4599a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_ACLC,		0x1A },
4609a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_BCLC,		0x09 },
4619a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CARHDR,		0x08 },
4629a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_KREFTMG,		0xc1 },
4639a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SFRSTEP,		0x58 },
4649a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_TMGCFG2,		0x01 },
4659a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CAR2CFG,		0x26 },
4669a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_BCLC2S2Q,		0x86 },
4679a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_BCLC2S28,		0x86 },
4689a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SMAPCOEF7,		0x77 },
4699a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SMAPCOEF6,		0x85 },
4709a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SMAPCOEF5,		0x77 },
4719a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DMDCFG2,		0x3b },
4729a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST0,	0xff },
4739a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST1,	0xff },
4749a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST2,	0xff },
4759a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST3,	0xff },
4769a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST4,	0xff },
4779a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST5,	0xff },
4789a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST6,	0xff },
4799a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST7,	0xcc },
4809a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST8,	0xcc },
4819a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLST9,	0xcc },
4829a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLSTA,	0xcc },
4839a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLSTB,	0xcc },
4849a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLSTC,	0xcc },
4859a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLSTD,	0xcc },
4869a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLSTE,	0xcc },
4879a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_MODCODLSTF,	0xcf },
4889a0bf528SMauro Carvalho Chehab 	{ STV090x_GENCFG,		0x1c },
4899a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF4,		0x37 },
4909a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF5,		0x29 },
4919a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF6,		0x37 },
4929a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF7,		0x33 },
4939a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF8,		0x31 },
4949a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF9,		0x2f },
4959a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF10,		0x39 },
4969a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF11,		0x3a },
4979a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF12,		0x29 },
4989a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF13,		0x37 },
4999a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF14,		0x33 },
5009a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF15,		0x2f },
5019a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF16,		0x39 },
5029a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITER_NF17,		0x3a },
5039a0bf528SMauro Carvalho Chehab 	{ STV090x_NBITERNOERR,		0x04 },
5049a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF4,		0x0C },
5059a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF5,		0x0F },
5069a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF6,		0x11 },
5079a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF7,		0x14 },
5089a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF8,		0x17 },
5099a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF9,		0x19 },
5109a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF10,		0x20 },
5119a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF11,		0x21 },
5129a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF12,		0x0D },
5139a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF13,		0x0F },
5149a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF14,		0x13 },
5159a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF15,		0x1A },
5169a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF16,		0x1F },
5179a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF17,		0x21 },
5189a0bf528SMauro Carvalho Chehab 	{ STV090x_RCCFGH,		0x20 },
5199a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_FECM,		0x01 }, /*disable the DSS mode */
5209a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_PRVIT,		0x2f }  /*disable puncture rate 6/7*/
5219a0bf528SMauro Carvalho Chehab };
5229a0bf528SMauro Carvalho Chehab 
5239a0bf528SMauro Carvalho Chehab static struct stv090x_reg stv0900_cut20_val[] = {
5249a0bf528SMauro Carvalho Chehab 
5259a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_DMDCFG3,		0xe8 },
5269a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_DMDCFG4,		0x10 },
5279a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_CARFREQ,		0x38 },
5289a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_CARHDR,		0x20 },
5299a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_KREFTMG,		0x5a },
5309a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_SMAPCOEF7,		0x06 },
5319a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_SMAPCOEF6,		0x00 },
5329a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_SMAPCOEF5,		0x04 },
5339a0bf528SMauro Carvalho Chehab 	{ STV090x_P2_NOSCFG,		0x0c },
5349a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DMDCFG3,		0xe8 },
5359a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DMDCFG4,		0x10 },
5369a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CARFREQ,		0x38 },
5379a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CARHDR,		0x20 },
5389a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_KREFTMG,		0x5a },
5399a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SMAPCOEF7,		0x06 },
5409a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SMAPCOEF6,		0x00 },
5419a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SMAPCOEF5,		0x04 },
5429a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_NOSCFG,		0x0c },
5439a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF4,		0x21 },
5449a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF5,		0x21 },
5459a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF6,		0x20 },
5469a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF7,		0x1F },
5479a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF8,		0x1E },
5489a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF9,		0x1E },
5499a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF10,		0x1D },
5509a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF11,		0x1B },
5519a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF12,		0x20 },
5529a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF13,		0x20 },
5539a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF14,		0x20 },
5549a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF15,		0x20 },
5559a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF16,		0x20 },
5569a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF17,		0x21 },
5579a0bf528SMauro Carvalho Chehab };
5589a0bf528SMauro Carvalho Chehab 
5599a0bf528SMauro Carvalho Chehab static struct stv090x_reg stv0903_cut20_val[] = {
5609a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DMDCFG3,		0xe8 },
5619a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_DMDCFG4,		0x10 },
5629a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CARFREQ,		0x38 },
5639a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_CARHDR,		0x20 },
5649a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_KREFTMG,		0x5a },
5659a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SMAPCOEF7,		0x06 },
5669a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SMAPCOEF6,		0x00 },
5679a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_SMAPCOEF5,		0x04 },
5689a0bf528SMauro Carvalho Chehab 	{ STV090x_P1_NOSCFG,		0x0c },
5699a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF4,		0x21 },
5709a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF5,		0x21 },
5719a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF6,		0x20 },
5729a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF7,		0x1F },
5739a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF8,		0x1E },
5749a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF9,		0x1E },
5759a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF10,		0x1D },
5769a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF11,		0x1B },
5779a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF12,		0x20 },
5789a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF13,		0x20 },
5799a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF14,		0x20 },
5809a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF15,		0x20 },
5819a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF16,		0x20 },
5829a0bf528SMauro Carvalho Chehab 	{ STV090x_GAINLLR_NF17,		0x21 }
5839a0bf528SMauro Carvalho Chehab };
5849a0bf528SMauro Carvalho Chehab 
5859a0bf528SMauro Carvalho Chehab /* Cut 2.0 Long Frame Tracking CR loop */
5869a0bf528SMauro Carvalho Chehab static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = {
5879a0bf528SMauro Carvalho Chehab 	/* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
5889a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_12,  0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x1e },
5899a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_35,  0x2f, 0x3f, 0x2e, 0x2f, 0x3d, 0x0f, 0x0e, 0x2e, 0x3d, 0x0e },
5909a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_23,  0x2f, 0x3f, 0x2e, 0x2f, 0x0e, 0x0f, 0x0e, 0x1e, 0x3d, 0x3d },
5919a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_34,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
5929a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_45,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
5939a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_56,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
5949a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_89,  0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
5959a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_910, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
5969a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK_35,  0x3c, 0x3e, 0x1c, 0x2e, 0x0c, 0x1e, 0x2b, 0x2d, 0x1b, 0x1d },
5979a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK_23,  0x1d, 0x3e, 0x3c, 0x2e, 0x2c, 0x1e, 0x0c, 0x2d, 0x2b, 0x1d },
5989a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK_34,  0x0e, 0x3e, 0x3d, 0x2e, 0x0d, 0x1e, 0x2c, 0x2d, 0x0c, 0x1d },
5999a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK_56,  0x2e, 0x3e, 0x1e, 0x2e, 0x2d, 0x1e, 0x3c, 0x2d, 0x2c, 0x1d },
6009a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK_89,  0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x0d, 0x2d, 0x3c, 0x1d },
6019a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d }
6029a0bf528SMauro Carvalho Chehab };
6039a0bf528SMauro Carvalho Chehab 
6049a0bf528SMauro Carvalho Chehab /* Cut 3.0 Long Frame Tracking CR loop */
6059a0bf528SMauro Carvalho Chehab static	struct stv090x_long_frame_crloop stv090x_s2_crl_cut30[] = {
6069a0bf528SMauro Carvalho Chehab 	/* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
6079a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_12,  0x3c, 0x2c, 0x0c, 0x2c, 0x1b, 0x2c, 0x1b, 0x1c, 0x0b, 0x3b },
6089a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_35,  0x0d, 0x0d, 0x0c, 0x0d, 0x1b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
6099a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_23,  0x1d, 0x0d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
6109a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_34,  0x1d, 0x1d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
6119a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_45,  0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
6129a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_56,  0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
6139a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_89,  0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
6149a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_910, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
6159a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK_35,  0x39, 0x29, 0x39, 0x19, 0x19, 0x19, 0x19, 0x19, 0x09, 0x19 },
6169a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK_23,  0x2a, 0x39, 0x1a, 0x0a, 0x39, 0x0a, 0x29, 0x39, 0x29, 0x0a },
6179a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK_34,  0x2b, 0x3a, 0x1b, 0x1b, 0x3a, 0x1b, 0x1a, 0x0b, 0x1a, 0x3a },
6189a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK_56,  0x0c, 0x1b, 0x3b, 0x3b, 0x1b, 0x3b, 0x3a, 0x3b, 0x3a, 0x1b },
6199a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK_89,  0x0d, 0x3c, 0x2c, 0x2c, 0x2b, 0x0c, 0x0b, 0x3b, 0x0b, 0x1b },
6209a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK_910, 0x0d, 0x0d, 0x2c, 0x3c, 0x3b, 0x1c, 0x0b, 0x3b, 0x0b, 0x1b }
6219a0bf528SMauro Carvalho Chehab };
6229a0bf528SMauro Carvalho Chehab 
6239a0bf528SMauro Carvalho Chehab /* Cut 2.0 Long Frame Tracking CR Loop */
6249a0bf528SMauro Carvalho Chehab static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = {
6259a0bf528SMauro Carvalho Chehab 	/* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
6269a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK_23,  0x0c, 0x0c, 0x0c, 0x0c, 0x1d, 0x0c, 0x3c, 0x0c, 0x2c, 0x0c },
6279a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK_34,  0x0c, 0x0c, 0x0c, 0x0c, 0x0e, 0x0c, 0x2d, 0x0c, 0x1d, 0x0c },
6289a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK_45,  0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
6299a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK_56,  0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
6309a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK_89,  0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
6319a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
6329a0bf528SMauro Carvalho Chehab 	{ STV090x_32APSK_34,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
6339a0bf528SMauro Carvalho Chehab 	{ STV090x_32APSK_45,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
6349a0bf528SMauro Carvalho Chehab 	{ STV090x_32APSK_56,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
6359a0bf528SMauro Carvalho Chehab 	{ STV090x_32APSK_89,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
6369a0bf528SMauro Carvalho Chehab 	{ STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c }
6379a0bf528SMauro Carvalho Chehab };
6389a0bf528SMauro Carvalho Chehab 
6399a0bf528SMauro Carvalho Chehab /* Cut 3.0 Long Frame Tracking CR Loop */
6409a0bf528SMauro Carvalho Chehab static struct stv090x_long_frame_crloop	stv090x_s2_apsk_crl_cut30[] = {
6419a0bf528SMauro Carvalho Chehab 	/* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
6429a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK_23,  0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x0a, 0x3a, 0x0a, 0x2a, 0x0a },
6439a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK_34,  0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0a, 0x3b, 0x0a, 0x1b, 0x0a },
6449a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK_45,  0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
6459a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK_56,  0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
6469a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK_89,  0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
6479a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
6489a0bf528SMauro Carvalho Chehab 	{ STV090x_32APSK_34,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
6499a0bf528SMauro Carvalho Chehab 	{ STV090x_32APSK_45,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
6509a0bf528SMauro Carvalho Chehab 	{ STV090x_32APSK_56,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
6519a0bf528SMauro Carvalho Chehab 	{ STV090x_32APSK_89,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
6529a0bf528SMauro Carvalho Chehab 	{ STV090x_32APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }
6539a0bf528SMauro Carvalho Chehab };
6549a0bf528SMauro Carvalho Chehab 
6559a0bf528SMauro Carvalho Chehab static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = {
6569a0bf528SMauro Carvalho Chehab 	/* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
6579a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_14,  0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x2d, 0x1f, 0x3d, 0x3e },
6589a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_13,  0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x3d, 0x0f, 0x3d, 0x2e },
6599a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_25,  0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e }
6609a0bf528SMauro Carvalho Chehab };
6619a0bf528SMauro Carvalho Chehab 
6629a0bf528SMauro Carvalho Chehab static struct stv090x_long_frame_crloop	stv090x_s2_lowqpsk_crl_cut30[] = {
6639a0bf528SMauro Carvalho Chehab 	/* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
6649a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_14,  0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x2a, 0x1c, 0x3a, 0x3b },
6659a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_13,  0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b },
6669a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK_25,  0x1c, 0x3c, 0x1b, 0x3c, 0x3a, 0x1c, 0x3a, 0x3b, 0x3a, 0x2b }
6679a0bf528SMauro Carvalho Chehab };
6689a0bf528SMauro Carvalho Chehab 
6699a0bf528SMauro Carvalho Chehab /* Cut 2.0 Short Frame Tracking CR Loop */
6709a0bf528SMauro Carvalho Chehab static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut20[] = {
6719a0bf528SMauro Carvalho Chehab 	/* MODCOD	  2M    5M    10M   20M   30M */
6729a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK,   0x2f, 0x2e, 0x0e, 0x0e, 0x3d },
6739a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK,   0x3e, 0x0e, 0x2d, 0x0d, 0x3c },
6749a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d },
6759a0bf528SMauro Carvalho Chehab 	{ STV090x_32APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d }
6769a0bf528SMauro Carvalho Chehab };
6779a0bf528SMauro Carvalho Chehab 
6789a0bf528SMauro Carvalho Chehab /* Cut 3.0 Short Frame Tracking CR Loop */
6799a0bf528SMauro Carvalho Chehab static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut30[] = {
6809a0bf528SMauro Carvalho Chehab 	/* MODCOD  	  2M	5M    10M   20M	  30M */
6819a0bf528SMauro Carvalho Chehab 	{ STV090x_QPSK,   0x2C, 0x2B, 0x0B, 0x0B, 0x3A },
6829a0bf528SMauro Carvalho Chehab 	{ STV090x_8PSK,   0x3B, 0x0B, 0x2A, 0x0A, 0x39 },
6839a0bf528SMauro Carvalho Chehab 	{ STV090x_16APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A },
6849a0bf528SMauro Carvalho Chehab 	{ STV090x_32APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A }
6859a0bf528SMauro Carvalho Chehab };
6869a0bf528SMauro Carvalho Chehab 
6879a0bf528SMauro Carvalho Chehab static inline s32 comp2(s32 __x, s32 __width)
6889a0bf528SMauro Carvalho Chehab {
6899a0bf528SMauro Carvalho Chehab 	if (__width == 32)
6909a0bf528SMauro Carvalho Chehab 		return __x;
6919a0bf528SMauro Carvalho Chehab 	else
6929a0bf528SMauro Carvalho Chehab 		return (__x >= (1 << (__width - 1))) ? (__x - (1 << __width)) : __x;
6939a0bf528SMauro Carvalho Chehab }
6949a0bf528SMauro Carvalho Chehab 
6959a0bf528SMauro Carvalho Chehab static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg)
6969a0bf528SMauro Carvalho Chehab {
6979a0bf528SMauro Carvalho Chehab 	const struct stv090x_config *config = state->config;
6989a0bf528SMauro Carvalho Chehab 	int ret;
6999a0bf528SMauro Carvalho Chehab 
7009a0bf528SMauro Carvalho Chehab 	u8 b0[] = { reg >> 8, reg & 0xff };
7019a0bf528SMauro Carvalho Chehab 	u8 buf;
7029a0bf528SMauro Carvalho Chehab 
7039a0bf528SMauro Carvalho Chehab 	struct i2c_msg msg[] = {
7049a0bf528SMauro Carvalho Chehab 		{ .addr	= config->address, .flags	= 0, 		.buf = b0,   .len = 2 },
7059a0bf528SMauro Carvalho Chehab 		{ .addr	= config->address, .flags	= I2C_M_RD,	.buf = &buf, .len = 1 }
7069a0bf528SMauro Carvalho Chehab 	};
7079a0bf528SMauro Carvalho Chehab 
7089a0bf528SMauro Carvalho Chehab 	ret = i2c_transfer(state->i2c, msg, 2);
7099a0bf528SMauro Carvalho Chehab 	if (ret != 2) {
7109a0bf528SMauro Carvalho Chehab 		if (ret != -ERESTARTSYS)
7119a0bf528SMauro Carvalho Chehab 			dprintk(FE_ERROR, 1,
7129a0bf528SMauro Carvalho Chehab 				"Read error, Reg=[0x%02x], Status=%d",
7139a0bf528SMauro Carvalho Chehab 				reg, ret);
7149a0bf528SMauro Carvalho Chehab 
7159a0bf528SMauro Carvalho Chehab 		return ret < 0 ? ret : -EREMOTEIO;
7169a0bf528SMauro Carvalho Chehab 	}
7179a0bf528SMauro Carvalho Chehab 	if (unlikely(*state->verbose >= FE_DEBUGREG))
7189a0bf528SMauro Carvalho Chehab 		dprintk(FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
7199a0bf528SMauro Carvalho Chehab 			reg, buf);
7209a0bf528SMauro Carvalho Chehab 
7219a0bf528SMauro Carvalho Chehab 	return (unsigned int) buf;
7229a0bf528SMauro Carvalho Chehab }
7239a0bf528SMauro Carvalho Chehab 
7249a0bf528SMauro Carvalho Chehab static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count)
7259a0bf528SMauro Carvalho Chehab {
7269a0bf528SMauro Carvalho Chehab 	const struct stv090x_config *config = state->config;
7279a0bf528SMauro Carvalho Chehab 	int ret;
728f7a35df1SMauro Carvalho Chehab 	u8 buf[MAX_XFER_SIZE];
7299a0bf528SMauro Carvalho Chehab 	struct i2c_msg i2c_msg = { .addr = config->address, .flags = 0, .buf = buf, .len = 2 + count };
7309a0bf528SMauro Carvalho Chehab 
731f7a35df1SMauro Carvalho Chehab 	if (2 + count > sizeof(buf)) {
732f7a35df1SMauro Carvalho Chehab 		printk(KERN_WARNING
733f7a35df1SMauro Carvalho Chehab 		       "%s: i2c wr reg=%04x: len=%d is too big!\n",
734f7a35df1SMauro Carvalho Chehab 		       KBUILD_MODNAME, reg, count);
735f7a35df1SMauro Carvalho Chehab 		return -EINVAL;
736f7a35df1SMauro Carvalho Chehab 	}
737f7a35df1SMauro Carvalho Chehab 
7389a0bf528SMauro Carvalho Chehab 	buf[0] = reg >> 8;
7399a0bf528SMauro Carvalho Chehab 	buf[1] = reg & 0xff;
7409a0bf528SMauro Carvalho Chehab 	memcpy(&buf[2], data, count);
7419a0bf528SMauro Carvalho Chehab 
742fed9d8f3SMauro Carvalho Chehab 	dprintk(FE_DEBUGREG, 1, "%s [0x%04x]: %*ph",
743fed9d8f3SMauro Carvalho Chehab 		__func__, reg, count, data);
7449a0bf528SMauro Carvalho Chehab 
7459a0bf528SMauro Carvalho Chehab 	ret = i2c_transfer(state->i2c, &i2c_msg, 1);
7469a0bf528SMauro Carvalho Chehab 	if (ret != 1) {
7479a0bf528SMauro Carvalho Chehab 		if (ret != -ERESTARTSYS)
7489a0bf528SMauro Carvalho Chehab 			dprintk(FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
7499a0bf528SMauro Carvalho Chehab 				reg, data[0], count, ret);
7509a0bf528SMauro Carvalho Chehab 		return ret < 0 ? ret : -EREMOTEIO;
7519a0bf528SMauro Carvalho Chehab 	}
7529a0bf528SMauro Carvalho Chehab 
7539a0bf528SMauro Carvalho Chehab 	return 0;
7549a0bf528SMauro Carvalho Chehab }
7559a0bf528SMauro Carvalho Chehab 
7569a0bf528SMauro Carvalho Chehab static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data)
7579a0bf528SMauro Carvalho Chehab {
7589a0bf528SMauro Carvalho Chehab 	return stv090x_write_regs(state, reg, &data, 1);
7599a0bf528SMauro Carvalho Chehab }
7609a0bf528SMauro Carvalho Chehab 
7619a0bf528SMauro Carvalho Chehab static int stv090x_i2c_gate_ctrl(struct stv090x_state *state, int enable)
7629a0bf528SMauro Carvalho Chehab {
7639a0bf528SMauro Carvalho Chehab 	u32 reg;
7649a0bf528SMauro Carvalho Chehab 
7659a0bf528SMauro Carvalho Chehab 	/*
7669a0bf528SMauro Carvalho Chehab 	 * NOTE! A lock is used as a FSM to control the state in which
7679a0bf528SMauro Carvalho Chehab 	 * access is serialized between two tuners on the same demod.
7689a0bf528SMauro Carvalho Chehab 	 * This has nothing to do with a lock to protect a critical section
7699a0bf528SMauro Carvalho Chehab 	 * which may in some other cases be confused with protecting I/O
7709a0bf528SMauro Carvalho Chehab 	 * access to the demodulator gate.
7719a0bf528SMauro Carvalho Chehab 	 * In case of any error, the lock is unlocked and exit within the
7729a0bf528SMauro Carvalho Chehab 	 * relevant operations themselves.
7739a0bf528SMauro Carvalho Chehab 	 */
7749a0bf528SMauro Carvalho Chehab 	if (enable) {
7759a0bf528SMauro Carvalho Chehab 		if (state->config->tuner_i2c_lock)
7769a0bf528SMauro Carvalho Chehab 			state->config->tuner_i2c_lock(&state->frontend, 1);
7779a0bf528SMauro Carvalho Chehab 		else
7789a0bf528SMauro Carvalho Chehab 			mutex_lock(&state->internal->tuner_lock);
7799a0bf528SMauro Carvalho Chehab 	}
7809a0bf528SMauro Carvalho Chehab 
7819a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, I2CRPT);
7829a0bf528SMauro Carvalho Chehab 	if (enable) {
7839a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Enable Gate");
7849a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
7859a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0)
7869a0bf528SMauro Carvalho Chehab 			goto err;
7879a0bf528SMauro Carvalho Chehab 
7889a0bf528SMauro Carvalho Chehab 	} else {
7899a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Disable Gate");
7909a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 0);
7919a0bf528SMauro Carvalho Chehab 		if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
7929a0bf528SMauro Carvalho Chehab 			goto err;
7939a0bf528SMauro Carvalho Chehab 	}
7949a0bf528SMauro Carvalho Chehab 
7959a0bf528SMauro Carvalho Chehab 	if (!enable) {
7969a0bf528SMauro Carvalho Chehab 		if (state->config->tuner_i2c_lock)
7979a0bf528SMauro Carvalho Chehab 			state->config->tuner_i2c_lock(&state->frontend, 0);
7989a0bf528SMauro Carvalho Chehab 		else
7999a0bf528SMauro Carvalho Chehab 			mutex_unlock(&state->internal->tuner_lock);
8009a0bf528SMauro Carvalho Chehab 	}
8019a0bf528SMauro Carvalho Chehab 
8029a0bf528SMauro Carvalho Chehab 	return 0;
8039a0bf528SMauro Carvalho Chehab err:
8049a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
8059a0bf528SMauro Carvalho Chehab 	if (state->config->tuner_i2c_lock)
8069a0bf528SMauro Carvalho Chehab 		state->config->tuner_i2c_lock(&state->frontend, 0);
8079a0bf528SMauro Carvalho Chehab 	else
8089a0bf528SMauro Carvalho Chehab 		mutex_unlock(&state->internal->tuner_lock);
8099a0bf528SMauro Carvalho Chehab 	return -1;
8109a0bf528SMauro Carvalho Chehab }
8119a0bf528SMauro Carvalho Chehab 
8129a0bf528SMauro Carvalho Chehab static void stv090x_get_lock_tmg(struct stv090x_state *state)
8139a0bf528SMauro Carvalho Chehab {
8149a0bf528SMauro Carvalho Chehab 	switch (state->algo) {
8159a0bf528SMauro Carvalho Chehab 	case STV090x_BLIND_SEARCH:
8169a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Blind Search");
8179a0bf528SMauro Carvalho Chehab 		if (state->srate <= 1500000) {  /*10Msps< SR <=15Msps*/
8189a0bf528SMauro Carvalho Chehab 			state->DemodTimeout = 1500;
8199a0bf528SMauro Carvalho Chehab 			state->FecTimeout = 400;
8209a0bf528SMauro Carvalho Chehab 		} else if (state->srate <= 5000000) {  /*10Msps< SR <=15Msps*/
8219a0bf528SMauro Carvalho Chehab 			state->DemodTimeout = 1000;
8229a0bf528SMauro Carvalho Chehab 			state->FecTimeout = 300;
8239a0bf528SMauro Carvalho Chehab 		} else {  /*SR >20Msps*/
8249a0bf528SMauro Carvalho Chehab 			state->DemodTimeout = 700;
8259a0bf528SMauro Carvalho Chehab 			state->FecTimeout = 100;
8269a0bf528SMauro Carvalho Chehab 		}
8279a0bf528SMauro Carvalho Chehab 		break;
8289a0bf528SMauro Carvalho Chehab 
8299a0bf528SMauro Carvalho Chehab 	case STV090x_COLD_SEARCH:
8309a0bf528SMauro Carvalho Chehab 	case STV090x_WARM_SEARCH:
8319a0bf528SMauro Carvalho Chehab 	default:
8329a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Normal Search");
8339a0bf528SMauro Carvalho Chehab 		if (state->srate <= 1000000) {  /*SR <=1Msps*/
8349a0bf528SMauro Carvalho Chehab 			state->DemodTimeout = 4500;
8359a0bf528SMauro Carvalho Chehab 			state->FecTimeout = 1700;
8369a0bf528SMauro Carvalho Chehab 		} else if (state->srate <= 2000000) { /*1Msps < SR <= 2Msps */
8379a0bf528SMauro Carvalho Chehab 			state->DemodTimeout = 2500;
8389a0bf528SMauro Carvalho Chehab 			state->FecTimeout = 1100;
8399a0bf528SMauro Carvalho Chehab 		} else if (state->srate <= 5000000) { /*2Msps < SR <= 5Msps */
8409a0bf528SMauro Carvalho Chehab 			state->DemodTimeout = 1000;
8419a0bf528SMauro Carvalho Chehab 			state->FecTimeout = 550;
8429a0bf528SMauro Carvalho Chehab 		} else if (state->srate <= 10000000) { /*5Msps < SR <= 10Msps */
8439a0bf528SMauro Carvalho Chehab 			state->DemodTimeout = 700;
8449a0bf528SMauro Carvalho Chehab 			state->FecTimeout = 250;
8459a0bf528SMauro Carvalho Chehab 		} else if (state->srate <= 20000000) { /*10Msps < SR <= 20Msps */
8469a0bf528SMauro Carvalho Chehab 			state->DemodTimeout = 400;
8479a0bf528SMauro Carvalho Chehab 			state->FecTimeout = 130;
8489a0bf528SMauro Carvalho Chehab 		} else {   /*SR >20Msps*/
8499a0bf528SMauro Carvalho Chehab 			state->DemodTimeout = 300;
8509a0bf528SMauro Carvalho Chehab 			state->FecTimeout = 100;
8519a0bf528SMauro Carvalho Chehab 		}
8529a0bf528SMauro Carvalho Chehab 		break;
8539a0bf528SMauro Carvalho Chehab 	}
8549a0bf528SMauro Carvalho Chehab 
8559a0bf528SMauro Carvalho Chehab 	if (state->algo == STV090x_WARM_SEARCH)
8569a0bf528SMauro Carvalho Chehab 		state->DemodTimeout /= 2;
8579a0bf528SMauro Carvalho Chehab }
8589a0bf528SMauro Carvalho Chehab 
8599a0bf528SMauro Carvalho Chehab static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
8609a0bf528SMauro Carvalho Chehab {
8619a0bf528SMauro Carvalho Chehab 	u32 sym;
8629a0bf528SMauro Carvalho Chehab 
8639a0bf528SMauro Carvalho Chehab 	if (srate > 60000000) {
8649a0bf528SMauro Carvalho Chehab 		sym  = (srate << 4); /* SR * 2^16 / master_clk */
8659a0bf528SMauro Carvalho Chehab 		sym /= (state->internal->mclk >> 12);
8669a0bf528SMauro Carvalho Chehab 	} else if (srate > 6000000) {
8679a0bf528SMauro Carvalho Chehab 		sym  = (srate << 6);
8689a0bf528SMauro Carvalho Chehab 		sym /= (state->internal->mclk >> 10);
8699a0bf528SMauro Carvalho Chehab 	} else {
8709a0bf528SMauro Carvalho Chehab 		sym  = (srate << 9);
8719a0bf528SMauro Carvalho Chehab 		sym /= (state->internal->mclk >> 7);
8729a0bf528SMauro Carvalho Chehab 	}
8739a0bf528SMauro Carvalho Chehab 
8749a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */
8759a0bf528SMauro Carvalho Chehab 		goto err;
8769a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRINIT0, (sym & 0xff)) < 0) /* LSB */
8779a0bf528SMauro Carvalho Chehab 		goto err;
8789a0bf528SMauro Carvalho Chehab 
8799a0bf528SMauro Carvalho Chehab 	return 0;
8809a0bf528SMauro Carvalho Chehab err:
8819a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
8829a0bf528SMauro Carvalho Chehab 	return -1;
8839a0bf528SMauro Carvalho Chehab }
8849a0bf528SMauro Carvalho Chehab 
8859a0bf528SMauro Carvalho Chehab static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)
8869a0bf528SMauro Carvalho Chehab {
8879a0bf528SMauro Carvalho Chehab 	u32 sym;
8889a0bf528SMauro Carvalho Chehab 
8899a0bf528SMauro Carvalho Chehab 	srate = 105 * (srate / 100);
8909a0bf528SMauro Carvalho Chehab 	if (srate > 60000000) {
8919a0bf528SMauro Carvalho Chehab 		sym  = (srate << 4); /* SR * 2^16 / master_clk */
8929a0bf528SMauro Carvalho Chehab 		sym /= (state->internal->mclk >> 12);
8939a0bf528SMauro Carvalho Chehab 	} else if (srate > 6000000) {
8949a0bf528SMauro Carvalho Chehab 		sym  = (srate << 6);
8959a0bf528SMauro Carvalho Chehab 		sym /= (state->internal->mclk >> 10);
8969a0bf528SMauro Carvalho Chehab 	} else {
8979a0bf528SMauro Carvalho Chehab 		sym  = (srate << 9);
8989a0bf528SMauro Carvalho Chehab 		sym /= (state->internal->mclk >> 7);
8999a0bf528SMauro Carvalho Chehab 	}
9009a0bf528SMauro Carvalho Chehab 
9019a0bf528SMauro Carvalho Chehab 	if (sym < 0x7fff) {
9029a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) /* MSB */
9039a0bf528SMauro Carvalho Chehab 			goto err;
9049a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) /* LSB */
9059a0bf528SMauro Carvalho Chehab 			goto err;
9069a0bf528SMauro Carvalho Chehab 	} else {
9079a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x7f) < 0) /* MSB */
9089a0bf528SMauro Carvalho Chehab 			goto err;
9099a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xff) < 0) /* LSB */
9109a0bf528SMauro Carvalho Chehab 			goto err;
9119a0bf528SMauro Carvalho Chehab 	}
9129a0bf528SMauro Carvalho Chehab 
9139a0bf528SMauro Carvalho Chehab 	return 0;
9149a0bf528SMauro Carvalho Chehab err:
9159a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
9169a0bf528SMauro Carvalho Chehab 	return -1;
9179a0bf528SMauro Carvalho Chehab }
9189a0bf528SMauro Carvalho Chehab 
9199a0bf528SMauro Carvalho Chehab static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)
9209a0bf528SMauro Carvalho Chehab {
9219a0bf528SMauro Carvalho Chehab 	u32 sym;
9229a0bf528SMauro Carvalho Chehab 
9239a0bf528SMauro Carvalho Chehab 	srate = 95 * (srate / 100);
9249a0bf528SMauro Carvalho Chehab 	if (srate > 60000000) {
9259a0bf528SMauro Carvalho Chehab 		sym  = (srate << 4); /* SR * 2^16 / master_clk */
9269a0bf528SMauro Carvalho Chehab 		sym /= (state->internal->mclk >> 12);
9279a0bf528SMauro Carvalho Chehab 	} else if (srate > 6000000) {
9289a0bf528SMauro Carvalho Chehab 		sym  = (srate << 6);
9299a0bf528SMauro Carvalho Chehab 		sym /= (state->internal->mclk >> 10);
9309a0bf528SMauro Carvalho Chehab 	} else {
9319a0bf528SMauro Carvalho Chehab 		sym  = (srate << 9);
9329a0bf528SMauro Carvalho Chehab 		sym /= (state->internal->mclk >> 7);
9339a0bf528SMauro Carvalho Chehab 	}
9349a0bf528SMauro Carvalho Chehab 
9359a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0x7f)) < 0) /* MSB */
9369a0bf528SMauro Carvalho Chehab 		goto err;
9379a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRLOW0, (sym & 0xff)) < 0) /* LSB */
9389a0bf528SMauro Carvalho Chehab 		goto err;
9399a0bf528SMauro Carvalho Chehab 	return 0;
9409a0bf528SMauro Carvalho Chehab err:
9419a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
9429a0bf528SMauro Carvalho Chehab 	return -1;
9439a0bf528SMauro Carvalho Chehab }
9449a0bf528SMauro Carvalho Chehab 
9459a0bf528SMauro Carvalho Chehab static u32 stv090x_car_width(u32 srate, enum stv090x_rolloff rolloff)
9469a0bf528SMauro Carvalho Chehab {
9479a0bf528SMauro Carvalho Chehab 	u32 ro;
9489a0bf528SMauro Carvalho Chehab 
9499a0bf528SMauro Carvalho Chehab 	switch (rolloff) {
9509a0bf528SMauro Carvalho Chehab 	case STV090x_RO_20:
9519a0bf528SMauro Carvalho Chehab 		ro = 20;
9529a0bf528SMauro Carvalho Chehab 		break;
9539a0bf528SMauro Carvalho Chehab 	case STV090x_RO_25:
9549a0bf528SMauro Carvalho Chehab 		ro = 25;
9559a0bf528SMauro Carvalho Chehab 		break;
9569a0bf528SMauro Carvalho Chehab 	case STV090x_RO_35:
9579a0bf528SMauro Carvalho Chehab 	default:
9589a0bf528SMauro Carvalho Chehab 		ro = 35;
9599a0bf528SMauro Carvalho Chehab 		break;
9609a0bf528SMauro Carvalho Chehab 	}
9619a0bf528SMauro Carvalho Chehab 
9629a0bf528SMauro Carvalho Chehab 	return srate + (srate * ro) / 100;
9639a0bf528SMauro Carvalho Chehab }
9649a0bf528SMauro Carvalho Chehab 
9659a0bf528SMauro Carvalho Chehab static int stv090x_set_vit_thacq(struct stv090x_state *state)
9669a0bf528SMauro Carvalho Chehab {
9679a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, VTH12, 0x96) < 0)
9689a0bf528SMauro Carvalho Chehab 		goto err;
9699a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, VTH23, 0x64) < 0)
9709a0bf528SMauro Carvalho Chehab 		goto err;
9719a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, VTH34, 0x36) < 0)
9729a0bf528SMauro Carvalho Chehab 		goto err;
9739a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, VTH56, 0x23) < 0)
9749a0bf528SMauro Carvalho Chehab 		goto err;
9759a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, VTH67, 0x1e) < 0)
9769a0bf528SMauro Carvalho Chehab 		goto err;
9779a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, VTH78, 0x19) < 0)
9789a0bf528SMauro Carvalho Chehab 		goto err;
9799a0bf528SMauro Carvalho Chehab 	return 0;
9809a0bf528SMauro Carvalho Chehab err:
9819a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
9829a0bf528SMauro Carvalho Chehab 	return -1;
9839a0bf528SMauro Carvalho Chehab }
9849a0bf528SMauro Carvalho Chehab 
9859a0bf528SMauro Carvalho Chehab static int stv090x_set_vit_thtracq(struct stv090x_state *state)
9869a0bf528SMauro Carvalho Chehab {
9879a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, VTH12, 0xd0) < 0)
9889a0bf528SMauro Carvalho Chehab 		goto err;
9899a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, VTH23, 0x7d) < 0)
9909a0bf528SMauro Carvalho Chehab 		goto err;
9919a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, VTH34, 0x53) < 0)
9929a0bf528SMauro Carvalho Chehab 		goto err;
9939a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, VTH56, 0x2f) < 0)
9949a0bf528SMauro Carvalho Chehab 		goto err;
9959a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, VTH67, 0x24) < 0)
9969a0bf528SMauro Carvalho Chehab 		goto err;
9979a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, VTH78, 0x1f) < 0)
9989a0bf528SMauro Carvalho Chehab 		goto err;
9999a0bf528SMauro Carvalho Chehab 	return 0;
10009a0bf528SMauro Carvalho Chehab err:
10019a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
10029a0bf528SMauro Carvalho Chehab 	return -1;
10039a0bf528SMauro Carvalho Chehab }
10049a0bf528SMauro Carvalho Chehab 
10059a0bf528SMauro Carvalho Chehab static int stv090x_set_viterbi(struct stv090x_state *state)
10069a0bf528SMauro Carvalho Chehab {
10079a0bf528SMauro Carvalho Chehab 	switch (state->search_mode) {
10089a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_AUTO:
10099a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, FECM, 0x10) < 0) /* DVB-S and DVB-S2 */
10109a0bf528SMauro Carvalho Chehab 			goto err;
10119a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, PRVIT, 0x3f) < 0) /* all puncture rate */
10129a0bf528SMauro Carvalho Chehab 			goto err;
10139a0bf528SMauro Carvalho Chehab 		break;
10149a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_DVBS1:
10159a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, FECM, 0x00) < 0) /* disable DSS */
10169a0bf528SMauro Carvalho Chehab 			goto err;
10179a0bf528SMauro Carvalho Chehab 		switch (state->fec) {
10189a0bf528SMauro Carvalho Chehab 		case STV090x_PR12:
10199a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
10209a0bf528SMauro Carvalho Chehab 				goto err;
10219a0bf528SMauro Carvalho Chehab 			break;
10229a0bf528SMauro Carvalho Chehab 
10239a0bf528SMauro Carvalho Chehab 		case STV090x_PR23:
10249a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
10259a0bf528SMauro Carvalho Chehab 				goto err;
10269a0bf528SMauro Carvalho Chehab 			break;
10279a0bf528SMauro Carvalho Chehab 
10289a0bf528SMauro Carvalho Chehab 		case STV090x_PR34:
10299a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, PRVIT, 0x04) < 0)
10309a0bf528SMauro Carvalho Chehab 				goto err;
10319a0bf528SMauro Carvalho Chehab 			break;
10329a0bf528SMauro Carvalho Chehab 
10339a0bf528SMauro Carvalho Chehab 		case STV090x_PR56:
10349a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, PRVIT, 0x08) < 0)
10359a0bf528SMauro Carvalho Chehab 				goto err;
10369a0bf528SMauro Carvalho Chehab 			break;
10379a0bf528SMauro Carvalho Chehab 
10389a0bf528SMauro Carvalho Chehab 		case STV090x_PR78:
10399a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, PRVIT, 0x20) < 0)
10409a0bf528SMauro Carvalho Chehab 				goto err;
10419a0bf528SMauro Carvalho Chehab 			break;
10429a0bf528SMauro Carvalho Chehab 
10439a0bf528SMauro Carvalho Chehab 		default:
10449a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, PRVIT, 0x2f) < 0) /* all */
10459a0bf528SMauro Carvalho Chehab 				goto err;
10469a0bf528SMauro Carvalho Chehab 			break;
10479a0bf528SMauro Carvalho Chehab 		}
10489a0bf528SMauro Carvalho Chehab 		break;
10499a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_DSS:
10509a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, FECM, 0x80) < 0)
10519a0bf528SMauro Carvalho Chehab 			goto err;
10529a0bf528SMauro Carvalho Chehab 		switch (state->fec) {
10539a0bf528SMauro Carvalho Chehab 		case STV090x_PR12:
10549a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
10559a0bf528SMauro Carvalho Chehab 				goto err;
10569a0bf528SMauro Carvalho Chehab 			break;
10579a0bf528SMauro Carvalho Chehab 
10589a0bf528SMauro Carvalho Chehab 		case STV090x_PR23:
10599a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
10609a0bf528SMauro Carvalho Chehab 				goto err;
10619a0bf528SMauro Carvalho Chehab 			break;
10629a0bf528SMauro Carvalho Chehab 
10639a0bf528SMauro Carvalho Chehab 		case STV090x_PR67:
10649a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, PRVIT, 0x10) < 0)
10659a0bf528SMauro Carvalho Chehab 				goto err;
10669a0bf528SMauro Carvalho Chehab 			break;
10679a0bf528SMauro Carvalho Chehab 
10689a0bf528SMauro Carvalho Chehab 		default:
10699a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, PRVIT, 0x13) < 0) /* 1/2, 2/3, 6/7 */
10709a0bf528SMauro Carvalho Chehab 				goto err;
10719a0bf528SMauro Carvalho Chehab 			break;
10729a0bf528SMauro Carvalho Chehab 		}
10739a0bf528SMauro Carvalho Chehab 		break;
10749a0bf528SMauro Carvalho Chehab 	default:
10759a0bf528SMauro Carvalho Chehab 		break;
10769a0bf528SMauro Carvalho Chehab 	}
10779a0bf528SMauro Carvalho Chehab 	return 0;
10789a0bf528SMauro Carvalho Chehab err:
10799a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
10809a0bf528SMauro Carvalho Chehab 	return -1;
10819a0bf528SMauro Carvalho Chehab }
10829a0bf528SMauro Carvalho Chehab 
10839a0bf528SMauro Carvalho Chehab static int stv090x_stop_modcod(struct stv090x_state *state)
10849a0bf528SMauro Carvalho Chehab {
10859a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
10869a0bf528SMauro Carvalho Chehab 		goto err;
10879a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
10889a0bf528SMauro Carvalho Chehab 		goto err;
10899a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
10909a0bf528SMauro Carvalho Chehab 		goto err;
10919a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
10929a0bf528SMauro Carvalho Chehab 		goto err;
10939a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
10949a0bf528SMauro Carvalho Chehab 		goto err;
10959a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
10969a0bf528SMauro Carvalho Chehab 		goto err;
10979a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
10989a0bf528SMauro Carvalho Chehab 		goto err;
10999a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xff) < 0)
11009a0bf528SMauro Carvalho Chehab 		goto err;
11019a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xff) < 0)
11029a0bf528SMauro Carvalho Chehab 		goto err;
11039a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xff) < 0)
11049a0bf528SMauro Carvalho Chehab 		goto err;
11059a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xff) < 0)
11069a0bf528SMauro Carvalho Chehab 		goto err;
11079a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xff) < 0)
11089a0bf528SMauro Carvalho Chehab 		goto err;
11099a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xff) < 0)
11109a0bf528SMauro Carvalho Chehab 		goto err;
11119a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xff) < 0)
11129a0bf528SMauro Carvalho Chehab 		goto err;
11139a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
11149a0bf528SMauro Carvalho Chehab 		goto err;
11159a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xff) < 0)
11169a0bf528SMauro Carvalho Chehab 		goto err;
11179a0bf528SMauro Carvalho Chehab 	return 0;
11189a0bf528SMauro Carvalho Chehab err:
11199a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
11209a0bf528SMauro Carvalho Chehab 	return -1;
11219a0bf528SMauro Carvalho Chehab }
11229a0bf528SMauro Carvalho Chehab 
11239a0bf528SMauro Carvalho Chehab static int stv090x_activate_modcod(struct stv090x_state *state)
11249a0bf528SMauro Carvalho Chehab {
11259a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
11269a0bf528SMauro Carvalho Chehab 		goto err;
11279a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0)
11289a0bf528SMauro Carvalho Chehab 		goto err;
11299a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0)
11309a0bf528SMauro Carvalho Chehab 		goto err;
11319a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0)
11329a0bf528SMauro Carvalho Chehab 		goto err;
11339a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0)
11349a0bf528SMauro Carvalho Chehab 		goto err;
11359a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0)
11369a0bf528SMauro Carvalho Chehab 		goto err;
11379a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0)
11389a0bf528SMauro Carvalho Chehab 		goto err;
11399a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
11409a0bf528SMauro Carvalho Chehab 		goto err;
11419a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
11429a0bf528SMauro Carvalho Chehab 		goto err;
11439a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
11449a0bf528SMauro Carvalho Chehab 		goto err;
11459a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
11469a0bf528SMauro Carvalho Chehab 		goto err;
11479a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
11489a0bf528SMauro Carvalho Chehab 		goto err;
11499a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
11509a0bf528SMauro Carvalho Chehab 		goto err;
11519a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
11529a0bf528SMauro Carvalho Chehab 		goto err;
11539a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0)
11549a0bf528SMauro Carvalho Chehab 		goto err;
11559a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
11569a0bf528SMauro Carvalho Chehab 		goto err;
11579a0bf528SMauro Carvalho Chehab 
11589a0bf528SMauro Carvalho Chehab 	return 0;
11599a0bf528SMauro Carvalho Chehab err:
11609a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
11619a0bf528SMauro Carvalho Chehab 	return -1;
11629a0bf528SMauro Carvalho Chehab }
11639a0bf528SMauro Carvalho Chehab 
11649a0bf528SMauro Carvalho Chehab static int stv090x_activate_modcod_single(struct stv090x_state *state)
11659a0bf528SMauro Carvalho Chehab {
11669a0bf528SMauro Carvalho Chehab 
11679a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
11689a0bf528SMauro Carvalho Chehab 		goto err;
11699a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xf0) < 0)
11709a0bf528SMauro Carvalho Chehab 		goto err;
11719a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0x00) < 0)
11729a0bf528SMauro Carvalho Chehab 		goto err;
11739a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0x00) < 0)
11749a0bf528SMauro Carvalho Chehab 		goto err;
11759a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0x00) < 0)
11769a0bf528SMauro Carvalho Chehab 		goto err;
11779a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0x00) < 0)
11789a0bf528SMauro Carvalho Chehab 		goto err;
11799a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0x00) < 0)
11809a0bf528SMauro Carvalho Chehab 		goto err;
11819a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0x00) < 0)
11829a0bf528SMauro Carvalho Chehab 		goto err;
11839a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0x00) < 0)
11849a0bf528SMauro Carvalho Chehab 		goto err;
11859a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0x00) < 0)
11869a0bf528SMauro Carvalho Chehab 		goto err;
11879a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0x00) < 0)
11889a0bf528SMauro Carvalho Chehab 		goto err;
11899a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0x00) < 0)
11909a0bf528SMauro Carvalho Chehab 		goto err;
11919a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0x00) < 0)
11929a0bf528SMauro Carvalho Chehab 		goto err;
11939a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0x00) < 0)
11949a0bf528SMauro Carvalho Chehab 		goto err;
11959a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0x00) < 0)
11969a0bf528SMauro Carvalho Chehab 		goto err;
11979a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0x0f) < 0)
11989a0bf528SMauro Carvalho Chehab 		goto err;
11999a0bf528SMauro Carvalho Chehab 
12009a0bf528SMauro Carvalho Chehab 	return 0;
12019a0bf528SMauro Carvalho Chehab 
12029a0bf528SMauro Carvalho Chehab err:
12039a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
12049a0bf528SMauro Carvalho Chehab 	return -1;
12059a0bf528SMauro Carvalho Chehab }
12069a0bf528SMauro Carvalho Chehab 
12079a0bf528SMauro Carvalho Chehab static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
12089a0bf528SMauro Carvalho Chehab {
12099a0bf528SMauro Carvalho Chehab 	u32 reg;
12109a0bf528SMauro Carvalho Chehab 
12119a0bf528SMauro Carvalho Chehab 	switch (state->demod) {
12129a0bf528SMauro Carvalho Chehab 	case STV090x_DEMODULATOR_0:
12139a0bf528SMauro Carvalho Chehab 		mutex_lock(&state->internal->demod_lock);
12149a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_STOPCLK2);
12159a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
12169a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
12179a0bf528SMauro Carvalho Chehab 			goto err;
12189a0bf528SMauro Carvalho Chehab 		mutex_unlock(&state->internal->demod_lock);
12199a0bf528SMauro Carvalho Chehab 		break;
12209a0bf528SMauro Carvalho Chehab 
12219a0bf528SMauro Carvalho Chehab 	case STV090x_DEMODULATOR_1:
12229a0bf528SMauro Carvalho Chehab 		mutex_lock(&state->internal->demod_lock);
12239a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_STOPCLK2);
12249a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
12259a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
12269a0bf528SMauro Carvalho Chehab 			goto err;
12279a0bf528SMauro Carvalho Chehab 		mutex_unlock(&state->internal->demod_lock);
12289a0bf528SMauro Carvalho Chehab 		break;
12299a0bf528SMauro Carvalho Chehab 
12309a0bf528SMauro Carvalho Chehab 	default:
12319a0bf528SMauro Carvalho Chehab 		dprintk(FE_ERROR, 1, "Wrong demodulator!");
12329a0bf528SMauro Carvalho Chehab 		break;
12339a0bf528SMauro Carvalho Chehab 	}
12349a0bf528SMauro Carvalho Chehab 	return 0;
12359a0bf528SMauro Carvalho Chehab err:
12369a0bf528SMauro Carvalho Chehab 	mutex_unlock(&state->internal->demod_lock);
12379a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
12389a0bf528SMauro Carvalho Chehab 	return -1;
12399a0bf528SMauro Carvalho Chehab }
12409a0bf528SMauro Carvalho Chehab 
12419a0bf528SMauro Carvalho Chehab static int stv090x_dvbs_track_crl(struct stv090x_state *state)
12429a0bf528SMauro Carvalho Chehab {
12439a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver >= 0x30) {
12449a0bf528SMauro Carvalho Chehab 		/* Set ACLC BCLC optimised value vs SR */
12459a0bf528SMauro Carvalho Chehab 		if (state->srate >= 15000000) {
12469a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, ACLC, 0x2b) < 0)
12479a0bf528SMauro Carvalho Chehab 				goto err;
12489a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, BCLC, 0x1a) < 0)
12499a0bf528SMauro Carvalho Chehab 				goto err;
12509a0bf528SMauro Carvalho Chehab 		} else if ((state->srate >= 7000000) && (15000000 > state->srate)) {
12519a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, ACLC, 0x0c) < 0)
12529a0bf528SMauro Carvalho Chehab 				goto err;
12539a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, BCLC, 0x1b) < 0)
12549a0bf528SMauro Carvalho Chehab 				goto err;
12559a0bf528SMauro Carvalho Chehab 		} else if (state->srate < 7000000) {
12569a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, ACLC, 0x2c) < 0)
12579a0bf528SMauro Carvalho Chehab 				goto err;
12589a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, BCLC, 0x1c) < 0)
12599a0bf528SMauro Carvalho Chehab 				goto err;
12609a0bf528SMauro Carvalho Chehab 		}
12619a0bf528SMauro Carvalho Chehab 
12629a0bf528SMauro Carvalho Chehab 	} else {
12639a0bf528SMauro Carvalho Chehab 		/* Cut 2.0 */
12649a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
12659a0bf528SMauro Carvalho Chehab 			goto err;
12669a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
12679a0bf528SMauro Carvalho Chehab 			goto err;
12689a0bf528SMauro Carvalho Chehab 	}
12699a0bf528SMauro Carvalho Chehab 	return 0;
12709a0bf528SMauro Carvalho Chehab err:
12719a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
12729a0bf528SMauro Carvalho Chehab 	return -1;
12739a0bf528SMauro Carvalho Chehab }
12749a0bf528SMauro Carvalho Chehab 
12759a0bf528SMauro Carvalho Chehab static int stv090x_delivery_search(struct stv090x_state *state)
12769a0bf528SMauro Carvalho Chehab {
12779a0bf528SMauro Carvalho Chehab 	u32 reg;
12789a0bf528SMauro Carvalho Chehab 
12799a0bf528SMauro Carvalho Chehab 	switch (state->search_mode) {
12809a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_DVBS1:
12819a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_DSS:
12829a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DMDCFGMD);
12839a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
12849a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
12859a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
12869a0bf528SMauro Carvalho Chehab 			goto err;
12879a0bf528SMauro Carvalho Chehab 
12889a0bf528SMauro Carvalho Chehab 		/* Activate Viterbi decoder in legacy search,
12899a0bf528SMauro Carvalho Chehab 		 * do not use FRESVIT1, might impact VITERBI2
12909a0bf528SMauro Carvalho Chehab 		 */
12919a0bf528SMauro Carvalho Chehab 		if (stv090x_vitclk_ctl(state, 0) < 0)
12929a0bf528SMauro Carvalho Chehab 			goto err;
12939a0bf528SMauro Carvalho Chehab 
12949a0bf528SMauro Carvalho Chehab 		if (stv090x_dvbs_track_crl(state) < 0)
12959a0bf528SMauro Carvalho Chehab 			goto err;
12969a0bf528SMauro Carvalho Chehab 
12979a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */
12989a0bf528SMauro Carvalho Chehab 			goto err;
12999a0bf528SMauro Carvalho Chehab 
13009a0bf528SMauro Carvalho Chehab 		if (stv090x_set_vit_thacq(state) < 0)
13019a0bf528SMauro Carvalho Chehab 			goto err;
13029a0bf528SMauro Carvalho Chehab 		if (stv090x_set_viterbi(state) < 0)
13039a0bf528SMauro Carvalho Chehab 			goto err;
13049a0bf528SMauro Carvalho Chehab 		break;
13059a0bf528SMauro Carvalho Chehab 
13069a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_DVBS2:
13079a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DMDCFGMD);
13089a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
13099a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
13109a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
13119a0bf528SMauro Carvalho Chehab 			goto err;
13129a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
13139a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
13149a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
13159a0bf528SMauro Carvalho Chehab 			goto err;
13169a0bf528SMauro Carvalho Chehab 
13179a0bf528SMauro Carvalho Chehab 		if (stv090x_vitclk_ctl(state, 1) < 0)
13189a0bf528SMauro Carvalho Chehab 			goto err;
13199a0bf528SMauro Carvalho Chehab 
13209a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) /* stop DVB-S CR loop */
13219a0bf528SMauro Carvalho Chehab 			goto err;
13229a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
13239a0bf528SMauro Carvalho Chehab 			goto err;
13249a0bf528SMauro Carvalho Chehab 
13259a0bf528SMauro Carvalho Chehab 		if (state->internal->dev_ver <= 0x20) {
13269a0bf528SMauro Carvalho Chehab 			/* enable S2 carrier loop */
13279a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
13289a0bf528SMauro Carvalho Chehab 				goto err;
13299a0bf528SMauro Carvalho Chehab 		} else {
13309a0bf528SMauro Carvalho Chehab 			/* > Cut 3: Stop carrier 3 */
13319a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
13329a0bf528SMauro Carvalho Chehab 				goto err;
13339a0bf528SMauro Carvalho Chehab 		}
13349a0bf528SMauro Carvalho Chehab 
13359a0bf528SMauro Carvalho Chehab 		if (state->demod_mode != STV090x_SINGLE) {
13369a0bf528SMauro Carvalho Chehab 			/* Cut 2: enable link during search */
13379a0bf528SMauro Carvalho Chehab 			if (stv090x_activate_modcod(state) < 0)
13389a0bf528SMauro Carvalho Chehab 				goto err;
13399a0bf528SMauro Carvalho Chehab 		} else {
13409a0bf528SMauro Carvalho Chehab 			/* Single demodulator
13419a0bf528SMauro Carvalho Chehab 			 * Authorize SHORT and LONG frames,
13429a0bf528SMauro Carvalho Chehab 			 * QPSK, 8PSK, 16APSK and 32APSK
13439a0bf528SMauro Carvalho Chehab 			 */
13449a0bf528SMauro Carvalho Chehab 			if (stv090x_activate_modcod_single(state) < 0)
13459a0bf528SMauro Carvalho Chehab 				goto err;
13469a0bf528SMauro Carvalho Chehab 		}
13479a0bf528SMauro Carvalho Chehab 
13489a0bf528SMauro Carvalho Chehab 		if (stv090x_set_vit_thtracq(state) < 0)
13499a0bf528SMauro Carvalho Chehab 			goto err;
13509a0bf528SMauro Carvalho Chehab 		break;
13519a0bf528SMauro Carvalho Chehab 
13529a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_AUTO:
13539a0bf528SMauro Carvalho Chehab 	default:
13549a0bf528SMauro Carvalho Chehab 		/* enable DVB-S2 and DVB-S2 in Auto MODE */
13559a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DMDCFGMD);
13569a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
13579a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
13589a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
13599a0bf528SMauro Carvalho Chehab 			goto err;
13609a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
13619a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
13629a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
13639a0bf528SMauro Carvalho Chehab 			goto err;
13649a0bf528SMauro Carvalho Chehab 
13659a0bf528SMauro Carvalho Chehab 		if (stv090x_vitclk_ctl(state, 0) < 0)
13669a0bf528SMauro Carvalho Chehab 			goto err;
13679a0bf528SMauro Carvalho Chehab 
13689a0bf528SMauro Carvalho Chehab 		if (stv090x_dvbs_track_crl(state) < 0)
13699a0bf528SMauro Carvalho Chehab 			goto err;
13709a0bf528SMauro Carvalho Chehab 
13719a0bf528SMauro Carvalho Chehab 		if (state->internal->dev_ver <= 0x20) {
13729a0bf528SMauro Carvalho Chehab 			/* enable S2 carrier loop */
13739a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
13749a0bf528SMauro Carvalho Chehab 				goto err;
13759a0bf528SMauro Carvalho Chehab 		} else {
13769a0bf528SMauro Carvalho Chehab 			/* > Cut 3: Stop carrier 3 */
13779a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
13789a0bf528SMauro Carvalho Chehab 				goto err;
13799a0bf528SMauro Carvalho Chehab 		}
13809a0bf528SMauro Carvalho Chehab 
13819a0bf528SMauro Carvalho Chehab 		if (state->demod_mode != STV090x_SINGLE) {
13829a0bf528SMauro Carvalho Chehab 			/* Cut 2: enable link during search */
13839a0bf528SMauro Carvalho Chehab 			if (stv090x_activate_modcod(state) < 0)
13849a0bf528SMauro Carvalho Chehab 				goto err;
13859a0bf528SMauro Carvalho Chehab 		} else {
13869a0bf528SMauro Carvalho Chehab 			/* Single demodulator
13879a0bf528SMauro Carvalho Chehab 			 * Authorize SHORT and LONG frames,
13889a0bf528SMauro Carvalho Chehab 			 * QPSK, 8PSK, 16APSK and 32APSK
13899a0bf528SMauro Carvalho Chehab 			 */
13909a0bf528SMauro Carvalho Chehab 			if (stv090x_activate_modcod_single(state) < 0)
13919a0bf528SMauro Carvalho Chehab 				goto err;
13929a0bf528SMauro Carvalho Chehab 		}
13939a0bf528SMauro Carvalho Chehab 
13949a0bf528SMauro Carvalho Chehab 		if (stv090x_set_vit_thacq(state) < 0)
13959a0bf528SMauro Carvalho Chehab 			goto err;
13969a0bf528SMauro Carvalho Chehab 
13979a0bf528SMauro Carvalho Chehab 		if (stv090x_set_viterbi(state) < 0)
13989a0bf528SMauro Carvalho Chehab 			goto err;
13999a0bf528SMauro Carvalho Chehab 		break;
14009a0bf528SMauro Carvalho Chehab 	}
14019a0bf528SMauro Carvalho Chehab 	return 0;
14029a0bf528SMauro Carvalho Chehab err:
14039a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
14049a0bf528SMauro Carvalho Chehab 	return -1;
14059a0bf528SMauro Carvalho Chehab }
14069a0bf528SMauro Carvalho Chehab 
14079a0bf528SMauro Carvalho Chehab static int stv090x_start_search(struct stv090x_state *state)
14089a0bf528SMauro Carvalho Chehab {
14099a0bf528SMauro Carvalho Chehab 	u32 reg, freq_abs;
14109a0bf528SMauro Carvalho Chehab 	s16 freq;
14119a0bf528SMauro Carvalho Chehab 
14129a0bf528SMauro Carvalho Chehab 	/* Reset demodulator */
14139a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DMDISTATE);
14149a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f);
14159a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
14169a0bf528SMauro Carvalho Chehab 		goto err;
14179a0bf528SMauro Carvalho Chehab 
14189a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver <= 0x20) {
14199a0bf528SMauro Carvalho Chehab 		if (state->srate <= 5000000) {
14209a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
14219a0bf528SMauro Carvalho Chehab 				goto err;
14229a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0)
14239a0bf528SMauro Carvalho Chehab 				goto err;
14249a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CFRUP0, 0xff) < 0)
14259a0bf528SMauro Carvalho Chehab 				goto err;
14269a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0)
14279a0bf528SMauro Carvalho Chehab 				goto err;
14289a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
14299a0bf528SMauro Carvalho Chehab 				goto err;
14309a0bf528SMauro Carvalho Chehab 
14319a0bf528SMauro Carvalho Chehab 			/*enlarge the timing bandwidth for Low SR*/
14329a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
14339a0bf528SMauro Carvalho Chehab 				goto err;
14349a0bf528SMauro Carvalho Chehab 		} else {
14359a0bf528SMauro Carvalho Chehab 			/* If the symbol rate is >5 Msps
14369a0bf528SMauro Carvalho Chehab 			Set The carrier search up and low to auto mode */
14379a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
14389a0bf528SMauro Carvalho Chehab 				goto err;
14399a0bf528SMauro Carvalho Chehab 			/*reduce the timing bandwidth for high SR*/
14409a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
14419a0bf528SMauro Carvalho Chehab 				goto err;
14429a0bf528SMauro Carvalho Chehab 		}
14439a0bf528SMauro Carvalho Chehab 	} else {
14449a0bf528SMauro Carvalho Chehab 		/* >= Cut 3 */
14459a0bf528SMauro Carvalho Chehab 		if (state->srate <= 5000000) {
14469a0bf528SMauro Carvalho Chehab 			/* enlarge the timing bandwidth for Low SR */
14479a0bf528SMauro Carvalho Chehab 			STV090x_WRITE_DEMOD(state, RTCS2, 0x68);
14489a0bf528SMauro Carvalho Chehab 		} else {
14499a0bf528SMauro Carvalho Chehab 			/* reduce timing bandwidth for high SR */
14509a0bf528SMauro Carvalho Chehab 			STV090x_WRITE_DEMOD(state, RTCS2, 0x44);
14519a0bf528SMauro Carvalho Chehab 		}
14529a0bf528SMauro Carvalho Chehab 
14539a0bf528SMauro Carvalho Chehab 		/* Set CFR min and max to manual mode */
14549a0bf528SMauro Carvalho Chehab 		STV090x_WRITE_DEMOD(state, CARCFG, 0x46);
14559a0bf528SMauro Carvalho Chehab 
14569a0bf528SMauro Carvalho Chehab 		if (state->algo == STV090x_WARM_SEARCH) {
14579a0bf528SMauro Carvalho Chehab 			/* WARM Start
14589a0bf528SMauro Carvalho Chehab 			 * CFR min = -1MHz,
14599a0bf528SMauro Carvalho Chehab 			 * CFR max = +1MHz
14609a0bf528SMauro Carvalho Chehab 			 */
14619a0bf528SMauro Carvalho Chehab 			freq_abs  = 1000 << 16;
14629a0bf528SMauro Carvalho Chehab 			freq_abs /= (state->internal->mclk / 1000);
14639a0bf528SMauro Carvalho Chehab 			freq      = (s16) freq_abs;
14649a0bf528SMauro Carvalho Chehab 		} else {
14659a0bf528SMauro Carvalho Chehab 			/* COLD Start
14669a0bf528SMauro Carvalho Chehab 			 * CFR min =- (SearchRange / 2 + 600KHz)
14679a0bf528SMauro Carvalho Chehab 			 * CFR max = +(SearchRange / 2 + 600KHz)
14689a0bf528SMauro Carvalho Chehab 			 * (600KHz for the tuner step size)
14699a0bf528SMauro Carvalho Chehab 			 */
14709a0bf528SMauro Carvalho Chehab 			freq_abs  = (state->search_range / 2000) + 600;
14719a0bf528SMauro Carvalho Chehab 			freq_abs  = freq_abs << 16;
14729a0bf528SMauro Carvalho Chehab 			freq_abs /= (state->internal->mclk / 1000);
14739a0bf528SMauro Carvalho Chehab 			freq      = (s16) freq_abs;
14749a0bf528SMauro Carvalho Chehab 		}
14759a0bf528SMauro Carvalho Chehab 
14769a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRUP1, MSB(freq)) < 0)
14779a0bf528SMauro Carvalho Chehab 			goto err;
14789a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRUP0, LSB(freq)) < 0)
14799a0bf528SMauro Carvalho Chehab 			goto err;
14809a0bf528SMauro Carvalho Chehab 
14819a0bf528SMauro Carvalho Chehab 		freq *= -1;
14829a0bf528SMauro Carvalho Chehab 
14839a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRLOW1, MSB(freq)) < 0)
14849a0bf528SMauro Carvalho Chehab 			goto err;
14859a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRLOW0, LSB(freq)) < 0)
14869a0bf528SMauro Carvalho Chehab 			goto err;
14879a0bf528SMauro Carvalho Chehab 
14889a0bf528SMauro Carvalho Chehab 	}
14899a0bf528SMauro Carvalho Chehab 
14909a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0)
14919a0bf528SMauro Carvalho Chehab 		goto err;
14929a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
14939a0bf528SMauro Carvalho Chehab 		goto err;
14949a0bf528SMauro Carvalho Chehab 
14959a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver >= 0x20) {
14969a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
14979a0bf528SMauro Carvalho Chehab 			goto err;
14989a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
14999a0bf528SMauro Carvalho Chehab 			goto err;
15009a0bf528SMauro Carvalho Chehab 
15019a0bf528SMauro Carvalho Chehab 		if ((state->search_mode == STV090x_SEARCH_DVBS1)	||
15029a0bf528SMauro Carvalho Chehab 			(state->search_mode == STV090x_SEARCH_DSS)	||
15039a0bf528SMauro Carvalho Chehab 			(state->search_mode == STV090x_SEARCH_AUTO)) {
15049a0bf528SMauro Carvalho Chehab 
15059a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
15069a0bf528SMauro Carvalho Chehab 				goto err;
15079a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0)
15089a0bf528SMauro Carvalho Chehab 				goto err;
15099a0bf528SMauro Carvalho Chehab 		}
15109a0bf528SMauro Carvalho Chehab 	}
15119a0bf528SMauro Carvalho Chehab 
15129a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00) < 0)
15139a0bf528SMauro Carvalho Chehab 		goto err;
15149a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xe0) < 0)
15159a0bf528SMauro Carvalho Chehab 		goto err;
15169a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xc0) < 0)
15179a0bf528SMauro Carvalho Chehab 		goto err;
15189a0bf528SMauro Carvalho Chehab 
15199a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DMDCFGMD);
15209a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
15219a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
15229a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
15239a0bf528SMauro Carvalho Chehab 		goto err;
15249a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DMDCFG2);
15259a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, S1S2_SEQUENTIAL_FIELD, 0x0);
15269a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0)
15279a0bf528SMauro Carvalho Chehab 		goto err;
15289a0bf528SMauro Carvalho Chehab 
15299a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0)
15309a0bf528SMauro Carvalho Chehab 		goto err;
15319a0bf528SMauro Carvalho Chehab 
15329a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver >= 0x20) {
15339a0bf528SMauro Carvalho Chehab 		/*Frequency offset detector setting*/
15349a0bf528SMauro Carvalho Chehab 		if (state->srate < 2000000) {
15359a0bf528SMauro Carvalho Chehab 			if (state->internal->dev_ver <= 0x20) {
15369a0bf528SMauro Carvalho Chehab 				/* Cut 2 */
15379a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x39) < 0)
15389a0bf528SMauro Carvalho Chehab 					goto err;
15399a0bf528SMauro Carvalho Chehab 			} else {
15409a0bf528SMauro Carvalho Chehab 				/* Cut 3 */
15419a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x89) < 0)
15429a0bf528SMauro Carvalho Chehab 					goto err;
15439a0bf528SMauro Carvalho Chehab 			}
15449a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARHDR, 0x40) < 0)
15459a0bf528SMauro Carvalho Chehab 				goto err;
15469a0bf528SMauro Carvalho Chehab 		} else if (state->srate < 10000000) {
15479a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0)
15489a0bf528SMauro Carvalho Chehab 				goto err;
15499a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
15509a0bf528SMauro Carvalho Chehab 				goto err;
15519a0bf528SMauro Carvalho Chehab 		} else {
15529a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4b) < 0)
15539a0bf528SMauro Carvalho Chehab 				goto err;
15549a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
15559a0bf528SMauro Carvalho Chehab 				goto err;
15569a0bf528SMauro Carvalho Chehab 		}
15579a0bf528SMauro Carvalho Chehab 	} else {
15589a0bf528SMauro Carvalho Chehab 		if (state->srate < 10000000) {
15599a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
15609a0bf528SMauro Carvalho Chehab 				goto err;
15619a0bf528SMauro Carvalho Chehab 		} else {
15629a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
15639a0bf528SMauro Carvalho Chehab 				goto err;
15649a0bf528SMauro Carvalho Chehab 		}
15659a0bf528SMauro Carvalho Chehab 	}
15669a0bf528SMauro Carvalho Chehab 
15679a0bf528SMauro Carvalho Chehab 	switch (state->algo) {
15689a0bf528SMauro Carvalho Chehab 	case STV090x_WARM_SEARCH:
15699a0bf528SMauro Carvalho Chehab 		/* The symbol rate and the exact
15709a0bf528SMauro Carvalho Chehab 		 * carrier Frequency are known
15719a0bf528SMauro Carvalho Chehab 		 */
15729a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
15739a0bf528SMauro Carvalho Chehab 			goto err;
15749a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
15759a0bf528SMauro Carvalho Chehab 			goto err;
15769a0bf528SMauro Carvalho Chehab 		break;
15779a0bf528SMauro Carvalho Chehab 
15789a0bf528SMauro Carvalho Chehab 	case STV090x_COLD_SEARCH:
15799a0bf528SMauro Carvalho Chehab 		/* The symbol rate is known */
15809a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
15819a0bf528SMauro Carvalho Chehab 			goto err;
15829a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
15839a0bf528SMauro Carvalho Chehab 			goto err;
15849a0bf528SMauro Carvalho Chehab 		break;
15859a0bf528SMauro Carvalho Chehab 
15869a0bf528SMauro Carvalho Chehab 	default:
15879a0bf528SMauro Carvalho Chehab 		break;
15889a0bf528SMauro Carvalho Chehab 	}
15899a0bf528SMauro Carvalho Chehab 	return 0;
15909a0bf528SMauro Carvalho Chehab err:
15919a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
15929a0bf528SMauro Carvalho Chehab 	return -1;
15939a0bf528SMauro Carvalho Chehab }
15949a0bf528SMauro Carvalho Chehab 
15959a0bf528SMauro Carvalho Chehab static int stv090x_get_agc2_min_level(struct stv090x_state *state)
15969a0bf528SMauro Carvalho Chehab {
15979a0bf528SMauro Carvalho Chehab 	u32 agc2_min = 0xffff, agc2 = 0, freq_init, freq_step, reg;
15989a0bf528SMauro Carvalho Chehab 	s32 i, j, steps, dir;
15999a0bf528SMauro Carvalho Chehab 
16009a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
16019a0bf528SMauro Carvalho Chehab 		goto err;
16029a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DMDCFGMD);
16039a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
16049a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
16059a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
16069a0bf528SMauro Carvalho Chehab 		goto err;
16079a0bf528SMauro Carvalho Chehab 
16089a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0) /* SR = 65 Msps Max */
16099a0bf528SMauro Carvalho Chehab 		goto err;
16109a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
16119a0bf528SMauro Carvalho Chehab 		goto err;
16129a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0) /* SR= 400 ksps Min */
16139a0bf528SMauro Carvalho Chehab 		goto err;
16149a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
16159a0bf528SMauro Carvalho Chehab 		goto err;
16169a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */
16179a0bf528SMauro Carvalho Chehab 		goto err;
16189a0bf528SMauro Carvalho Chehab 	if (stv090x_set_srate(state, 1000000) < 0)
16199a0bf528SMauro Carvalho Chehab 		goto err;
16209a0bf528SMauro Carvalho Chehab 
16219a0bf528SMauro Carvalho Chehab 	steps  = state->search_range / 1000000;
16229a0bf528SMauro Carvalho Chehab 	if (steps <= 0)
16239a0bf528SMauro Carvalho Chehab 		steps = 1;
16249a0bf528SMauro Carvalho Chehab 
16259a0bf528SMauro Carvalho Chehab 	dir = 1;
16269a0bf528SMauro Carvalho Chehab 	freq_step = (1000000 * 256) / (state->internal->mclk / 256);
16279a0bf528SMauro Carvalho Chehab 	freq_init = 0;
16289a0bf528SMauro Carvalho Chehab 
16299a0bf528SMauro Carvalho Chehab 	for (i = 0; i < steps; i++) {
16309a0bf528SMauro Carvalho Chehab 		if (dir > 0)
16319a0bf528SMauro Carvalho Chehab 			freq_init = freq_init + (freq_step * i);
16329a0bf528SMauro Carvalho Chehab 		else
16339a0bf528SMauro Carvalho Chehab 			freq_init = freq_init - (freq_step * i);
16349a0bf528SMauro Carvalho Chehab 
16359a0bf528SMauro Carvalho Chehab 		dir *= -1;
16369a0bf528SMauro Carvalho Chehab 
16379a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod RESET */
16389a0bf528SMauro Carvalho Chehab 			goto err;
16399a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_init >> 8) & 0xff) < 0)
16409a0bf528SMauro Carvalho Chehab 			goto err;
16419a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_init & 0xff) < 0)
16429a0bf528SMauro Carvalho Chehab 			goto err;
16439a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
16449a0bf528SMauro Carvalho Chehab 			goto err;
16459a0bf528SMauro Carvalho Chehab 		msleep(10);
16469a0bf528SMauro Carvalho Chehab 
16479a0bf528SMauro Carvalho Chehab 		agc2 = 0;
16489a0bf528SMauro Carvalho Chehab 		for (j = 0; j < 10; j++) {
16499a0bf528SMauro Carvalho Chehab 			agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
16509a0bf528SMauro Carvalho Chehab 				STV090x_READ_DEMOD(state, AGC2I0);
16519a0bf528SMauro Carvalho Chehab 		}
16529a0bf528SMauro Carvalho Chehab 		agc2 /= 10;
16539a0bf528SMauro Carvalho Chehab 		if (agc2 < agc2_min)
16549a0bf528SMauro Carvalho Chehab 			agc2_min = agc2;
16559a0bf528SMauro Carvalho Chehab 	}
16569a0bf528SMauro Carvalho Chehab 
16579a0bf528SMauro Carvalho Chehab 	return agc2_min;
16589a0bf528SMauro Carvalho Chehab err:
16599a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
16609a0bf528SMauro Carvalho Chehab 	return -1;
16619a0bf528SMauro Carvalho Chehab }
16629a0bf528SMauro Carvalho Chehab 
16639a0bf528SMauro Carvalho Chehab static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)
16649a0bf528SMauro Carvalho Chehab {
16659a0bf528SMauro Carvalho Chehab 	u8 r3, r2, r1, r0;
16669a0bf528SMauro Carvalho Chehab 	s32 srate, int_1, int_2, tmp_1, tmp_2;
16679a0bf528SMauro Carvalho Chehab 
16689a0bf528SMauro Carvalho Chehab 	r3 = STV090x_READ_DEMOD(state, SFR3);
16699a0bf528SMauro Carvalho Chehab 	r2 = STV090x_READ_DEMOD(state, SFR2);
16709a0bf528SMauro Carvalho Chehab 	r1 = STV090x_READ_DEMOD(state, SFR1);
16719a0bf528SMauro Carvalho Chehab 	r0 = STV090x_READ_DEMOD(state, SFR0);
16729a0bf528SMauro Carvalho Chehab 
16739a0bf528SMauro Carvalho Chehab 	srate = ((r3 << 24) | (r2 << 16) | (r1 <<  8) | r0);
16749a0bf528SMauro Carvalho Chehab 
16759a0bf528SMauro Carvalho Chehab 	int_1 = clk >> 16;
16769a0bf528SMauro Carvalho Chehab 	int_2 = srate >> 16;
16779a0bf528SMauro Carvalho Chehab 
16789a0bf528SMauro Carvalho Chehab 	tmp_1 = clk % 0x10000;
16799a0bf528SMauro Carvalho Chehab 	tmp_2 = srate % 0x10000;
16809a0bf528SMauro Carvalho Chehab 
16819a0bf528SMauro Carvalho Chehab 	srate = (int_1 * int_2) +
16829a0bf528SMauro Carvalho Chehab 		((int_1 * tmp_2) >> 16) +
16839a0bf528SMauro Carvalho Chehab 		((int_2 * tmp_1) >> 16);
16849a0bf528SMauro Carvalho Chehab 
16859a0bf528SMauro Carvalho Chehab 	return srate;
16869a0bf528SMauro Carvalho Chehab }
16879a0bf528SMauro Carvalho Chehab 
16889a0bf528SMauro Carvalho Chehab static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
16899a0bf528SMauro Carvalho Chehab {
16909a0bf528SMauro Carvalho Chehab 	struct dvb_frontend *fe = &state->frontend;
16919a0bf528SMauro Carvalho Chehab 
16929a0bf528SMauro Carvalho Chehab 	int tmg_lock = 0, i;
16939a0bf528SMauro Carvalho Chehab 	s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
16949a0bf528SMauro Carvalho Chehab 	u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
16959a0bf528SMauro Carvalho Chehab 	u32 agc2th;
16969a0bf528SMauro Carvalho Chehab 
16979a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver >= 0x30)
16989a0bf528SMauro Carvalho Chehab 		agc2th = 0x2e00;
16999a0bf528SMauro Carvalho Chehab 	else
17009a0bf528SMauro Carvalho Chehab 		agc2th = 0x1f00;
17019a0bf528SMauro Carvalho Chehab 
17029a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DMDISTATE);
17039a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
17049a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
17059a0bf528SMauro Carvalho Chehab 		goto err;
17069a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, TMGCFG, 0x12) < 0)
17079a0bf528SMauro Carvalho Chehab 		goto err;
17089a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0)
17099a0bf528SMauro Carvalho Chehab 		goto err;
17109a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xf0) < 0)
17119a0bf528SMauro Carvalho Chehab 		goto err;
17129a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xe0) < 0)
17139a0bf528SMauro Carvalho Chehab 		goto err;
17149a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DMDCFGMD);
17159a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
17169a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
17179a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
17189a0bf528SMauro Carvalho Chehab 		goto err;
17199a0bf528SMauro Carvalho Chehab 
17209a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0)
17219a0bf528SMauro Carvalho Chehab 		goto err;
17229a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
17239a0bf528SMauro Carvalho Chehab 		goto err;
17249a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0)
17259a0bf528SMauro Carvalho Chehab 		goto err;
17269a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
17279a0bf528SMauro Carvalho Chehab 		goto err;
17289a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
17299a0bf528SMauro Carvalho Chehab 		goto err;
17309a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x50) < 0)
17319a0bf528SMauro Carvalho Chehab 		goto err;
17329a0bf528SMauro Carvalho Chehab 
17339a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver >= 0x30) {
17349a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x99) < 0)
17359a0bf528SMauro Carvalho Chehab 			goto err;
17369a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x98) < 0)
17379a0bf528SMauro Carvalho Chehab 			goto err;
17389a0bf528SMauro Carvalho Chehab 
17399a0bf528SMauro Carvalho Chehab 	} else if (state->internal->dev_ver >= 0x20) {
17409a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
17419a0bf528SMauro Carvalho Chehab 			goto err;
17429a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
17439a0bf528SMauro Carvalho Chehab 			goto err;
17449a0bf528SMauro Carvalho Chehab 	}
17459a0bf528SMauro Carvalho Chehab 
17469a0bf528SMauro Carvalho Chehab 	if (state->srate <= 2000000)
17479a0bf528SMauro Carvalho Chehab 		car_step = 1000;
17489a0bf528SMauro Carvalho Chehab 	else if (state->srate <= 5000000)
17499a0bf528SMauro Carvalho Chehab 		car_step = 2000;
17509a0bf528SMauro Carvalho Chehab 	else if (state->srate <= 12000000)
17519a0bf528SMauro Carvalho Chehab 		car_step = 3000;
17529a0bf528SMauro Carvalho Chehab 	else
17539a0bf528SMauro Carvalho Chehab 		car_step = 5000;
17549a0bf528SMauro Carvalho Chehab 
17559a0bf528SMauro Carvalho Chehab 	steps  = -1 + ((state->search_range / 1000) / car_step);
17569a0bf528SMauro Carvalho Chehab 	steps /= 2;
17579a0bf528SMauro Carvalho Chehab 	steps  = (2 * steps) + 1;
17589a0bf528SMauro Carvalho Chehab 	if (steps < 0)
17599a0bf528SMauro Carvalho Chehab 		steps = 1;
17609a0bf528SMauro Carvalho Chehab 	else if (steps > 10) {
17619a0bf528SMauro Carvalho Chehab 		steps = 11;
17629a0bf528SMauro Carvalho Chehab 		car_step = (state->search_range / 1000) / 10;
17639a0bf528SMauro Carvalho Chehab 	}
17649a0bf528SMauro Carvalho Chehab 	cur_step = 0;
17659a0bf528SMauro Carvalho Chehab 	dir = 1;
17669a0bf528SMauro Carvalho Chehab 	freq = state->frequency;
17679a0bf528SMauro Carvalho Chehab 
17689a0bf528SMauro Carvalho Chehab 	while ((!tmg_lock) && (cur_step < steps)) {
17699a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5f) < 0) /* Demod RESET */
17709a0bf528SMauro Carvalho Chehab 			goto err;
17719a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
17729a0bf528SMauro Carvalho Chehab 			goto err;
17739a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
17749a0bf528SMauro Carvalho Chehab 			goto err;
17759a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, SFRINIT1, 0x00) < 0)
17769a0bf528SMauro Carvalho Chehab 			goto err;
17779a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, SFRINIT0, 0x00) < 0)
17789a0bf528SMauro Carvalho Chehab 			goto err;
17799a0bf528SMauro Carvalho Chehab 		/* trigger acquisition */
17809a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x40) < 0)
17819a0bf528SMauro Carvalho Chehab 			goto err;
17829a0bf528SMauro Carvalho Chehab 		msleep(50);
17839a0bf528SMauro Carvalho Chehab 		for (i = 0; i < 10; i++) {
17849a0bf528SMauro Carvalho Chehab 			reg = STV090x_READ_DEMOD(state, DSTATUS);
17859a0bf528SMauro Carvalho Chehab 			if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
17869a0bf528SMauro Carvalho Chehab 				tmg_cpt++;
17879a0bf528SMauro Carvalho Chehab 			agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
17889a0bf528SMauro Carvalho Chehab 				STV090x_READ_DEMOD(state, AGC2I0);
17899a0bf528SMauro Carvalho Chehab 		}
17909a0bf528SMauro Carvalho Chehab 		agc2 /= 10;
17919a0bf528SMauro Carvalho Chehab 		srate_coarse = stv090x_get_srate(state, state->internal->mclk);
17929a0bf528SMauro Carvalho Chehab 		cur_step++;
17939a0bf528SMauro Carvalho Chehab 		dir *= -1;
17949a0bf528SMauro Carvalho Chehab 		if ((tmg_cpt >= 5) && (agc2 < agc2th) &&
17959a0bf528SMauro Carvalho Chehab 		    (srate_coarse < 50000000) && (srate_coarse > 850000))
17969a0bf528SMauro Carvalho Chehab 			tmg_lock = 1;
17979a0bf528SMauro Carvalho Chehab 		else if (cur_step < steps) {
17989a0bf528SMauro Carvalho Chehab 			if (dir > 0)
17999a0bf528SMauro Carvalho Chehab 				freq += cur_step * car_step;
18009a0bf528SMauro Carvalho Chehab 			else
18019a0bf528SMauro Carvalho Chehab 				freq -= cur_step * car_step;
18029a0bf528SMauro Carvalho Chehab 
18039a0bf528SMauro Carvalho Chehab 			/* Setup tuner */
18049a0bf528SMauro Carvalho Chehab 			if (stv090x_i2c_gate_ctrl(state, 1) < 0)
18059a0bf528SMauro Carvalho Chehab 				goto err;
18069a0bf528SMauro Carvalho Chehab 
18079a0bf528SMauro Carvalho Chehab 			if (state->config->tuner_set_frequency) {
18089a0bf528SMauro Carvalho Chehab 				if (state->config->tuner_set_frequency(fe, freq) < 0)
18099a0bf528SMauro Carvalho Chehab 					goto err_gateoff;
18109a0bf528SMauro Carvalho Chehab 			}
18119a0bf528SMauro Carvalho Chehab 
18129a0bf528SMauro Carvalho Chehab 			if (state->config->tuner_set_bandwidth) {
18139a0bf528SMauro Carvalho Chehab 				if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
18149a0bf528SMauro Carvalho Chehab 					goto err_gateoff;
18159a0bf528SMauro Carvalho Chehab 			}
18169a0bf528SMauro Carvalho Chehab 
18179a0bf528SMauro Carvalho Chehab 			if (stv090x_i2c_gate_ctrl(state, 0) < 0)
18189a0bf528SMauro Carvalho Chehab 				goto err;
18199a0bf528SMauro Carvalho Chehab 
18209a0bf528SMauro Carvalho Chehab 			msleep(50);
18219a0bf528SMauro Carvalho Chehab 
18229a0bf528SMauro Carvalho Chehab 			if (stv090x_i2c_gate_ctrl(state, 1) < 0)
18239a0bf528SMauro Carvalho Chehab 				goto err;
18249a0bf528SMauro Carvalho Chehab 
18259a0bf528SMauro Carvalho Chehab 			if (state->config->tuner_get_status) {
18269a0bf528SMauro Carvalho Chehab 				if (state->config->tuner_get_status(fe, &reg) < 0)
18279a0bf528SMauro Carvalho Chehab 					goto err_gateoff;
18289a0bf528SMauro Carvalho Chehab 			}
18299a0bf528SMauro Carvalho Chehab 
18309a0bf528SMauro Carvalho Chehab 			if (reg)
18319a0bf528SMauro Carvalho Chehab 				dprintk(FE_DEBUG, 1, "Tuner phase locked");
18329a0bf528SMauro Carvalho Chehab 			else
18339a0bf528SMauro Carvalho Chehab 				dprintk(FE_DEBUG, 1, "Tuner unlocked");
18349a0bf528SMauro Carvalho Chehab 
18359a0bf528SMauro Carvalho Chehab 			if (stv090x_i2c_gate_ctrl(state, 0) < 0)
18369a0bf528SMauro Carvalho Chehab 				goto err;
18379a0bf528SMauro Carvalho Chehab 
18389a0bf528SMauro Carvalho Chehab 		}
18399a0bf528SMauro Carvalho Chehab 	}
18409a0bf528SMauro Carvalho Chehab 	if (!tmg_lock)
18419a0bf528SMauro Carvalho Chehab 		srate_coarse = 0;
18429a0bf528SMauro Carvalho Chehab 	else
18439a0bf528SMauro Carvalho Chehab 		srate_coarse = stv090x_get_srate(state, state->internal->mclk);
18449a0bf528SMauro Carvalho Chehab 
18459a0bf528SMauro Carvalho Chehab 	return srate_coarse;
18469a0bf528SMauro Carvalho Chehab 
18479a0bf528SMauro Carvalho Chehab err_gateoff:
18489a0bf528SMauro Carvalho Chehab 	stv090x_i2c_gate_ctrl(state, 0);
18499a0bf528SMauro Carvalho Chehab err:
18509a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
18519a0bf528SMauro Carvalho Chehab 	return -1;
18529a0bf528SMauro Carvalho Chehab }
18539a0bf528SMauro Carvalho Chehab 
18549a0bf528SMauro Carvalho Chehab static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
18559a0bf528SMauro Carvalho Chehab {
18569a0bf528SMauro Carvalho Chehab 	u32 srate_coarse, freq_coarse, sym, reg;
18579a0bf528SMauro Carvalho Chehab 
18589a0bf528SMauro Carvalho Chehab 	srate_coarse = stv090x_get_srate(state, state->internal->mclk);
18599a0bf528SMauro Carvalho Chehab 	freq_coarse  = STV090x_READ_DEMOD(state, CFR2) << 8;
18609a0bf528SMauro Carvalho Chehab 	freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
18619a0bf528SMauro Carvalho Chehab 	sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
18629a0bf528SMauro Carvalho Chehab 
18639a0bf528SMauro Carvalho Chehab 	if (sym < state->srate)
18649a0bf528SMauro Carvalho Chehab 		srate_coarse = 0;
18659a0bf528SMauro Carvalho Chehab 	else {
18669a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) /* Demod RESET */
18679a0bf528SMauro Carvalho Chehab 			goto err;
18689a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
18699a0bf528SMauro Carvalho Chehab 			goto err;
18709a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
18719a0bf528SMauro Carvalho Chehab 			goto err;
18729a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
18739a0bf528SMauro Carvalho Chehab 			goto err;
18749a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
18759a0bf528SMauro Carvalho Chehab 			goto err;
18769a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DMDCFGMD);
18779a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
18789a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
18799a0bf528SMauro Carvalho Chehab 			goto err;
18809a0bf528SMauro Carvalho Chehab 
18819a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
18829a0bf528SMauro Carvalho Chehab 			goto err;
18839a0bf528SMauro Carvalho Chehab 
18849a0bf528SMauro Carvalho Chehab 		if (state->internal->dev_ver >= 0x30) {
18859a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0)
18869a0bf528SMauro Carvalho Chehab 				goto err;
18879a0bf528SMauro Carvalho Chehab 		} else if (state->internal->dev_ver >= 0x20) {
18889a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
18899a0bf528SMauro Carvalho Chehab 				goto err;
18909a0bf528SMauro Carvalho Chehab 		}
18919a0bf528SMauro Carvalho Chehab 
18929a0bf528SMauro Carvalho Chehab 		if (srate_coarse > 3000000) {
18939a0bf528SMauro Carvalho Chehab 			sym  = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
18949a0bf528SMauro Carvalho Chehab 			sym  = (sym / 1000) * 65536;
18959a0bf528SMauro Carvalho Chehab 			sym /= (state->internal->mclk / 1000);
18969a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
18979a0bf528SMauro Carvalho Chehab 				goto err;
18989a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
18999a0bf528SMauro Carvalho Chehab 				goto err;
19009a0bf528SMauro Carvalho Chehab 			sym  = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
19019a0bf528SMauro Carvalho Chehab 			sym  = (sym / 1000) * 65536;
19029a0bf528SMauro Carvalho Chehab 			sym /= (state->internal->mclk / 1000);
19039a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
19049a0bf528SMauro Carvalho Chehab 				goto err;
19059a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
19069a0bf528SMauro Carvalho Chehab 				goto err;
19079a0bf528SMauro Carvalho Chehab 			sym  = (srate_coarse / 1000) * 65536;
19089a0bf528SMauro Carvalho Chehab 			sym /= (state->internal->mclk / 1000);
19099a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
19109a0bf528SMauro Carvalho Chehab 				goto err;
19119a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
19129a0bf528SMauro Carvalho Chehab 				goto err;
19139a0bf528SMauro Carvalho Chehab 		} else {
19149a0bf528SMauro Carvalho Chehab 			sym  = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
19159a0bf528SMauro Carvalho Chehab 			sym  = (sym / 100) * 65536;
19169a0bf528SMauro Carvalho Chehab 			sym /= (state->internal->mclk / 100);
19179a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
19189a0bf528SMauro Carvalho Chehab 				goto err;
19199a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
19209a0bf528SMauro Carvalho Chehab 				goto err;
19219a0bf528SMauro Carvalho Chehab 			sym  = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
19229a0bf528SMauro Carvalho Chehab 			sym  = (sym / 100) * 65536;
19239a0bf528SMauro Carvalho Chehab 			sym /= (state->internal->mclk / 100);
19249a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
19259a0bf528SMauro Carvalho Chehab 				goto err;
19269a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
19279a0bf528SMauro Carvalho Chehab 				goto err;
19289a0bf528SMauro Carvalho Chehab 			sym  = (srate_coarse / 100) * 65536;
19299a0bf528SMauro Carvalho Chehab 			sym /= (state->internal->mclk / 100);
19309a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
19319a0bf528SMauro Carvalho Chehab 				goto err;
19329a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
19339a0bf528SMauro Carvalho Chehab 				goto err;
19349a0bf528SMauro Carvalho Chehab 		}
19359a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
19369a0bf528SMauro Carvalho Chehab 			goto err;
19379a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_coarse >> 8) & 0xff) < 0)
19389a0bf528SMauro Carvalho Chehab 			goto err;
19399a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_coarse & 0xff) < 0)
19409a0bf528SMauro Carvalho Chehab 			goto err;
19419a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) /* trigger acquisition */
19429a0bf528SMauro Carvalho Chehab 			goto err;
19439a0bf528SMauro Carvalho Chehab 	}
19449a0bf528SMauro Carvalho Chehab 
19459a0bf528SMauro Carvalho Chehab 	return srate_coarse;
19469a0bf528SMauro Carvalho Chehab 
19479a0bf528SMauro Carvalho Chehab err:
19489a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
19499a0bf528SMauro Carvalho Chehab 	return -1;
19509a0bf528SMauro Carvalho Chehab }
19519a0bf528SMauro Carvalho Chehab 
19529a0bf528SMauro Carvalho Chehab static int stv090x_get_dmdlock(struct stv090x_state *state, s32 timeout)
19539a0bf528SMauro Carvalho Chehab {
19549a0bf528SMauro Carvalho Chehab 	s32 timer = 0, lock = 0;
19559a0bf528SMauro Carvalho Chehab 	u32 reg;
19569a0bf528SMauro Carvalho Chehab 	u8 stat;
19579a0bf528SMauro Carvalho Chehab 
19589a0bf528SMauro Carvalho Chehab 	while ((timer < timeout) && (!lock)) {
19599a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DMDSTATE);
19609a0bf528SMauro Carvalho Chehab 		stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
19619a0bf528SMauro Carvalho Chehab 
19629a0bf528SMauro Carvalho Chehab 		switch (stat) {
19639a0bf528SMauro Carvalho Chehab 		case 0: /* searching */
19649a0bf528SMauro Carvalho Chehab 		case 1: /* first PLH detected */
19659a0bf528SMauro Carvalho Chehab 		default:
19669a0bf528SMauro Carvalho Chehab 			dprintk(FE_DEBUG, 1, "Demodulator searching ..");
19679a0bf528SMauro Carvalho Chehab 			lock = 0;
19689a0bf528SMauro Carvalho Chehab 			break;
19699a0bf528SMauro Carvalho Chehab 		case 2: /* DVB-S2 mode */
19709a0bf528SMauro Carvalho Chehab 		case 3: /* DVB-S1/legacy mode */
19719a0bf528SMauro Carvalho Chehab 			reg = STV090x_READ_DEMOD(state, DSTATUS);
19729a0bf528SMauro Carvalho Chehab 			lock = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
19739a0bf528SMauro Carvalho Chehab 			break;
19749a0bf528SMauro Carvalho Chehab 		}
19759a0bf528SMauro Carvalho Chehab 
19769a0bf528SMauro Carvalho Chehab 		if (!lock)
19779a0bf528SMauro Carvalho Chehab 			msleep(10);
19789a0bf528SMauro Carvalho Chehab 		else
19799a0bf528SMauro Carvalho Chehab 			dprintk(FE_DEBUG, 1, "Demodulator acquired LOCK");
19809a0bf528SMauro Carvalho Chehab 
19819a0bf528SMauro Carvalho Chehab 		timer += 10;
19829a0bf528SMauro Carvalho Chehab 	}
19839a0bf528SMauro Carvalho Chehab 	return lock;
19849a0bf528SMauro Carvalho Chehab }
19859a0bf528SMauro Carvalho Chehab 
19869a0bf528SMauro Carvalho Chehab static int stv090x_blind_search(struct stv090x_state *state)
19879a0bf528SMauro Carvalho Chehab {
19889a0bf528SMauro Carvalho Chehab 	u32 agc2, reg, srate_coarse;
19899a0bf528SMauro Carvalho Chehab 	s32 cpt_fail, agc2_ovflw, i;
19909a0bf528SMauro Carvalho Chehab 	u8 k_ref, k_max, k_min;
19919a0bf528SMauro Carvalho Chehab 	int coarse_fail = 0;
19929a0bf528SMauro Carvalho Chehab 	int lock;
19939a0bf528SMauro Carvalho Chehab 
19949a0bf528SMauro Carvalho Chehab 	k_max = 110;
19959a0bf528SMauro Carvalho Chehab 	k_min = 10;
19969a0bf528SMauro Carvalho Chehab 
19979a0bf528SMauro Carvalho Chehab 	agc2 = stv090x_get_agc2_min_level(state);
19989a0bf528SMauro Carvalho Chehab 
19999a0bf528SMauro Carvalho Chehab 	if (agc2 > STV090x_SEARCH_AGC2_TH(state->internal->dev_ver)) {
20009a0bf528SMauro Carvalho Chehab 		lock = 0;
20019a0bf528SMauro Carvalho Chehab 	} else {
20029a0bf528SMauro Carvalho Chehab 
20039a0bf528SMauro Carvalho Chehab 		if (state->internal->dev_ver <= 0x20) {
20049a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
20059a0bf528SMauro Carvalho Chehab 				goto err;
20069a0bf528SMauro Carvalho Chehab 		} else {
20079a0bf528SMauro Carvalho Chehab 			/* > Cut 3 */
20089a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARCFG, 0x06) < 0)
20099a0bf528SMauro Carvalho Chehab 				goto err;
20109a0bf528SMauro Carvalho Chehab 		}
20119a0bf528SMauro Carvalho Chehab 
20129a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
20139a0bf528SMauro Carvalho Chehab 			goto err;
20149a0bf528SMauro Carvalho Chehab 
20159a0bf528SMauro Carvalho Chehab 		if (state->internal->dev_ver >= 0x20) {
20169a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
20179a0bf528SMauro Carvalho Chehab 				goto err;
20189a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
20199a0bf528SMauro Carvalho Chehab 				goto err;
20209a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
20219a0bf528SMauro Carvalho Chehab 				goto err;
20229a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0) /* set viterbi hysteresis */
20239a0bf528SMauro Carvalho Chehab 				goto err;
20249a0bf528SMauro Carvalho Chehab 		}
20259a0bf528SMauro Carvalho Chehab 
20269a0bf528SMauro Carvalho Chehab 		k_ref = k_max;
20279a0bf528SMauro Carvalho Chehab 		do {
20289a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, KREFTMG, k_ref) < 0)
20299a0bf528SMauro Carvalho Chehab 				goto err;
20309a0bf528SMauro Carvalho Chehab 			if (stv090x_srate_srch_coarse(state) != 0) {
20319a0bf528SMauro Carvalho Chehab 				srate_coarse = stv090x_srate_srch_fine(state);
20329a0bf528SMauro Carvalho Chehab 				if (srate_coarse != 0) {
20339a0bf528SMauro Carvalho Chehab 					stv090x_get_lock_tmg(state);
20349a0bf528SMauro Carvalho Chehab 					lock = stv090x_get_dmdlock(state,
20359a0bf528SMauro Carvalho Chehab 							state->DemodTimeout);
20369a0bf528SMauro Carvalho Chehab 				} else {
20379a0bf528SMauro Carvalho Chehab 					lock = 0;
20389a0bf528SMauro Carvalho Chehab 				}
20399a0bf528SMauro Carvalho Chehab 			} else {
20409a0bf528SMauro Carvalho Chehab 				cpt_fail = 0;
20419a0bf528SMauro Carvalho Chehab 				agc2_ovflw = 0;
20429a0bf528SMauro Carvalho Chehab 				for (i = 0; i < 10; i++) {
20439a0bf528SMauro Carvalho Chehab 					agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
20449a0bf528SMauro Carvalho Chehab 						STV090x_READ_DEMOD(state, AGC2I0);
20459a0bf528SMauro Carvalho Chehab 					if (agc2 >= 0xff00)
20469a0bf528SMauro Carvalho Chehab 						agc2_ovflw++;
20479a0bf528SMauro Carvalho Chehab 					reg = STV090x_READ_DEMOD(state, DSTATUS2);
20489a0bf528SMauro Carvalho Chehab 					if ((STV090x_GETFIELD_Px(reg, CFR_OVERFLOW_FIELD) == 0x01) &&
20499a0bf528SMauro Carvalho Chehab 					    (STV090x_GETFIELD_Px(reg, DEMOD_DELOCK_FIELD) == 0x01))
20509a0bf528SMauro Carvalho Chehab 
20519a0bf528SMauro Carvalho Chehab 						cpt_fail++;
20529a0bf528SMauro Carvalho Chehab 				}
20539a0bf528SMauro Carvalho Chehab 				if ((cpt_fail > 7) || (agc2_ovflw > 7))
20549a0bf528SMauro Carvalho Chehab 					coarse_fail = 1;
20559a0bf528SMauro Carvalho Chehab 
20569a0bf528SMauro Carvalho Chehab 				lock = 0;
20579a0bf528SMauro Carvalho Chehab 			}
20589a0bf528SMauro Carvalho Chehab 			k_ref -= 20;
20599a0bf528SMauro Carvalho Chehab 		} while ((k_ref >= k_min) && (!lock) && (!coarse_fail));
20609a0bf528SMauro Carvalho Chehab 	}
20619a0bf528SMauro Carvalho Chehab 
20629a0bf528SMauro Carvalho Chehab 	return lock;
20639a0bf528SMauro Carvalho Chehab 
20649a0bf528SMauro Carvalho Chehab err:
20659a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
20669a0bf528SMauro Carvalho Chehab 	return -1;
20679a0bf528SMauro Carvalho Chehab }
20689a0bf528SMauro Carvalho Chehab 
20699a0bf528SMauro Carvalho Chehab static int stv090x_chk_tmg(struct stv090x_state *state)
20709a0bf528SMauro Carvalho Chehab {
20719a0bf528SMauro Carvalho Chehab 	u32 reg;
20729a0bf528SMauro Carvalho Chehab 	s32 tmg_cpt = 0, i;
20739a0bf528SMauro Carvalho Chehab 	u8 freq, tmg_thh, tmg_thl;
20749a0bf528SMauro Carvalho Chehab 	int tmg_lock = 0;
20759a0bf528SMauro Carvalho Chehab 
20769a0bf528SMauro Carvalho Chehab 	freq = STV090x_READ_DEMOD(state, CARFREQ);
20779a0bf528SMauro Carvalho Chehab 	tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
20789a0bf528SMauro Carvalho Chehab 	tmg_thl = STV090x_READ_DEMOD(state, TMGTHFALL);
20799a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
20809a0bf528SMauro Carvalho Chehab 		goto err;
20819a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
20829a0bf528SMauro Carvalho Chehab 		goto err;
20839a0bf528SMauro Carvalho Chehab 
20849a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DMDCFGMD);
20859a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); /* stop carrier offset search */
20869a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
20879a0bf528SMauro Carvalho Chehab 		goto err;
20889a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)
20899a0bf528SMauro Carvalho Chehab 		goto err;
20909a0bf528SMauro Carvalho Chehab 
20919a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, RTCS2, 0x40) < 0)
20929a0bf528SMauro Carvalho Chehab 		goto err;
20939a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x00) < 0)
20949a0bf528SMauro Carvalho Chehab 		goto err;
20959a0bf528SMauro Carvalho Chehab 
20969a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0) /* set car ofset to 0 */
20979a0bf528SMauro Carvalho Chehab 		goto err;
20989a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
20999a0bf528SMauro Carvalho Chehab 		goto err;
21009a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x65) < 0)
21019a0bf528SMauro Carvalho Chehab 		goto err;
21029a0bf528SMauro Carvalho Chehab 
21039a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* trigger acquisition */
21049a0bf528SMauro Carvalho Chehab 		goto err;
21059a0bf528SMauro Carvalho Chehab 	msleep(10);
21069a0bf528SMauro Carvalho Chehab 
21079a0bf528SMauro Carvalho Chehab 	for (i = 0; i < 10; i++) {
21089a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DSTATUS);
21099a0bf528SMauro Carvalho Chehab 		if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
21109a0bf528SMauro Carvalho Chehab 			tmg_cpt++;
21119a0bf528SMauro Carvalho Chehab 		msleep(1);
21129a0bf528SMauro Carvalho Chehab 	}
21139a0bf528SMauro Carvalho Chehab 	if (tmg_cpt >= 3)
21149a0bf528SMauro Carvalho Chehab 		tmg_lock = 1;
21159a0bf528SMauro Carvalho Chehab 
21169a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
21179a0bf528SMauro Carvalho Chehab 		goto err;
21189a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */
21199a0bf528SMauro Carvalho Chehab 		goto err;
21209a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) /* DVB-S2 timing */
21219a0bf528SMauro Carvalho Chehab 		goto err;
21229a0bf528SMauro Carvalho Chehab 
21239a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, CARFREQ, freq) < 0)
21249a0bf528SMauro Carvalho Chehab 		goto err;
21259a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, TMGTHRISE, tmg_thh) < 0)
21269a0bf528SMauro Carvalho Chehab 		goto err;
21279a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, TMGTHFALL, tmg_thl) < 0)
21289a0bf528SMauro Carvalho Chehab 		goto err;
21299a0bf528SMauro Carvalho Chehab 
21309a0bf528SMauro Carvalho Chehab 	return	tmg_lock;
21319a0bf528SMauro Carvalho Chehab 
21329a0bf528SMauro Carvalho Chehab err:
21339a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
21349a0bf528SMauro Carvalho Chehab 	return -1;
21359a0bf528SMauro Carvalho Chehab }
21369a0bf528SMauro Carvalho Chehab 
21379a0bf528SMauro Carvalho Chehab static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
21389a0bf528SMauro Carvalho Chehab {
21399a0bf528SMauro Carvalho Chehab 	struct dvb_frontend *fe = &state->frontend;
21409a0bf528SMauro Carvalho Chehab 
21419a0bf528SMauro Carvalho Chehab 	u32 reg;
21429a0bf528SMauro Carvalho Chehab 	s32 car_step, steps, cur_step, dir, freq, timeout_lock;
214366ae9fc2SDan Carpenter 	int lock;
21449a0bf528SMauro Carvalho Chehab 
21459a0bf528SMauro Carvalho Chehab 	if (state->srate >= 10000000)
21469a0bf528SMauro Carvalho Chehab 		timeout_lock = timeout_dmd / 3;
21479a0bf528SMauro Carvalho Chehab 	else
21489a0bf528SMauro Carvalho Chehab 		timeout_lock = timeout_dmd / 2;
21499a0bf528SMauro Carvalho Chehab 
21509a0bf528SMauro Carvalho Chehab 	lock = stv090x_get_dmdlock(state, timeout_lock); /* cold start wait */
215166ae9fc2SDan Carpenter 	if (lock)
215266ae9fc2SDan Carpenter 		return lock;
215366ae9fc2SDan Carpenter 
21549a0bf528SMauro Carvalho Chehab 	if (state->srate >= 10000000) {
21559a0bf528SMauro Carvalho Chehab 		if (stv090x_chk_tmg(state)) {
21569a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
21579a0bf528SMauro Carvalho Chehab 				goto err;
21589a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
21599a0bf528SMauro Carvalho Chehab 				goto err;
216066ae9fc2SDan Carpenter 			return stv090x_get_dmdlock(state, timeout_dmd);
21619a0bf528SMauro Carvalho Chehab 		}
216266ae9fc2SDan Carpenter 		return 0;
216366ae9fc2SDan Carpenter 	}
216466ae9fc2SDan Carpenter 
21659a0bf528SMauro Carvalho Chehab 	if (state->srate <= 4000000)
21669a0bf528SMauro Carvalho Chehab 		car_step = 1000;
21679a0bf528SMauro Carvalho Chehab 	else if (state->srate <= 7000000)
21689a0bf528SMauro Carvalho Chehab 		car_step = 2000;
21699a0bf528SMauro Carvalho Chehab 	else if (state->srate <= 10000000)
21709a0bf528SMauro Carvalho Chehab 		car_step = 3000;
21719a0bf528SMauro Carvalho Chehab 	else
21729a0bf528SMauro Carvalho Chehab 		car_step = 5000;
21739a0bf528SMauro Carvalho Chehab 
21749a0bf528SMauro Carvalho Chehab 	steps  = (state->search_range / 1000) / car_step;
21759a0bf528SMauro Carvalho Chehab 	steps /= 2;
21769a0bf528SMauro Carvalho Chehab 	steps  = 2 * (steps + 1);
21779a0bf528SMauro Carvalho Chehab 	if (steps < 0)
21789a0bf528SMauro Carvalho Chehab 		steps = 2;
21799a0bf528SMauro Carvalho Chehab 	else if (steps > 12)
21809a0bf528SMauro Carvalho Chehab 		steps = 12;
21819a0bf528SMauro Carvalho Chehab 
21829a0bf528SMauro Carvalho Chehab 	cur_step = 1;
21839a0bf528SMauro Carvalho Chehab 	dir = 1;
21849a0bf528SMauro Carvalho Chehab 
21859a0bf528SMauro Carvalho Chehab 	freq = state->frequency;
21869a0bf528SMauro Carvalho Chehab 	state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + state->srate;
21879a0bf528SMauro Carvalho Chehab 	while ((cur_step <= steps) && (!lock)) {
21889a0bf528SMauro Carvalho Chehab 		if (dir > 0)
21899a0bf528SMauro Carvalho Chehab 			freq += cur_step * car_step;
21909a0bf528SMauro Carvalho Chehab 		else
21919a0bf528SMauro Carvalho Chehab 			freq -= cur_step * car_step;
21929a0bf528SMauro Carvalho Chehab 
21939a0bf528SMauro Carvalho Chehab 		/* Setup tuner */
21949a0bf528SMauro Carvalho Chehab 		if (stv090x_i2c_gate_ctrl(state, 1) < 0)
21959a0bf528SMauro Carvalho Chehab 			goto err;
21969a0bf528SMauro Carvalho Chehab 
21979a0bf528SMauro Carvalho Chehab 		if (state->config->tuner_set_frequency) {
21989a0bf528SMauro Carvalho Chehab 			if (state->config->tuner_set_frequency(fe, freq) < 0)
21999a0bf528SMauro Carvalho Chehab 				goto err_gateoff;
22009a0bf528SMauro Carvalho Chehab 		}
22019a0bf528SMauro Carvalho Chehab 
22029a0bf528SMauro Carvalho Chehab 		if (state->config->tuner_set_bandwidth) {
22039a0bf528SMauro Carvalho Chehab 			if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
22049a0bf528SMauro Carvalho Chehab 				goto err_gateoff;
22059a0bf528SMauro Carvalho Chehab 		}
22069a0bf528SMauro Carvalho Chehab 
22079a0bf528SMauro Carvalho Chehab 		if (stv090x_i2c_gate_ctrl(state, 0) < 0)
22089a0bf528SMauro Carvalho Chehab 			goto err;
22099a0bf528SMauro Carvalho Chehab 
22109a0bf528SMauro Carvalho Chehab 		msleep(50);
22119a0bf528SMauro Carvalho Chehab 
22129a0bf528SMauro Carvalho Chehab 		if (stv090x_i2c_gate_ctrl(state, 1) < 0)
22139a0bf528SMauro Carvalho Chehab 			goto err;
22149a0bf528SMauro Carvalho Chehab 
22159a0bf528SMauro Carvalho Chehab 		if (state->config->tuner_get_status) {
22169a0bf528SMauro Carvalho Chehab 			if (state->config->tuner_get_status(fe, &reg) < 0)
22179a0bf528SMauro Carvalho Chehab 				goto err_gateoff;
22189a0bf528SMauro Carvalho Chehab 			if (reg)
22199a0bf528SMauro Carvalho Chehab 				dprintk(FE_DEBUG, 1, "Tuner phase locked");
22209a0bf528SMauro Carvalho Chehab 			else
22219a0bf528SMauro Carvalho Chehab 				dprintk(FE_DEBUG, 1, "Tuner unlocked");
2222ab0625f0SMauro Carvalho Chehab 		}
22239a0bf528SMauro Carvalho Chehab 
22249a0bf528SMauro Carvalho Chehab 		if (stv090x_i2c_gate_ctrl(state, 0) < 0)
22259a0bf528SMauro Carvalho Chehab 			goto err;
22269a0bf528SMauro Carvalho Chehab 
22279a0bf528SMauro Carvalho Chehab 		STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c);
22289a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
22299a0bf528SMauro Carvalho Chehab 			goto err;
22309a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
22319a0bf528SMauro Carvalho Chehab 			goto err;
22329a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
22339a0bf528SMauro Carvalho Chehab 			goto err;
22349a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
22359a0bf528SMauro Carvalho Chehab 			goto err;
22369a0bf528SMauro Carvalho Chehab 		lock = stv090x_get_dmdlock(state, (timeout_dmd / 3));
22379a0bf528SMauro Carvalho Chehab 
22389a0bf528SMauro Carvalho Chehab 		dir *= -1;
22399a0bf528SMauro Carvalho Chehab 		cur_step++;
22409a0bf528SMauro Carvalho Chehab 	}
22419a0bf528SMauro Carvalho Chehab 
22429a0bf528SMauro Carvalho Chehab 	return lock;
22439a0bf528SMauro Carvalho Chehab 
22449a0bf528SMauro Carvalho Chehab err_gateoff:
22459a0bf528SMauro Carvalho Chehab 	stv090x_i2c_gate_ctrl(state, 0);
22469a0bf528SMauro Carvalho Chehab err:
22479a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
22489a0bf528SMauro Carvalho Chehab 	return -1;
22499a0bf528SMauro Carvalho Chehab }
22509a0bf528SMauro Carvalho Chehab 
22519a0bf528SMauro Carvalho Chehab static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s32 *timeout_sw, s32 *steps)
22529a0bf528SMauro Carvalho Chehab {
22539a0bf528SMauro Carvalho Chehab 	s32 timeout, inc, steps_max, srate, car_max;
22549a0bf528SMauro Carvalho Chehab 
22559a0bf528SMauro Carvalho Chehab 	srate = state->srate;
22569a0bf528SMauro Carvalho Chehab 	car_max = state->search_range / 1000;
22579a0bf528SMauro Carvalho Chehab 	car_max += car_max / 10;
22589a0bf528SMauro Carvalho Chehab 	car_max  = 65536 * (car_max / 2);
22599a0bf528SMauro Carvalho Chehab 	car_max /= (state->internal->mclk / 1000);
22609a0bf528SMauro Carvalho Chehab 
22619a0bf528SMauro Carvalho Chehab 	if (car_max > 0x4000)
22629a0bf528SMauro Carvalho Chehab 		car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
22639a0bf528SMauro Carvalho Chehab 
22649a0bf528SMauro Carvalho Chehab 	inc  = srate;
22659a0bf528SMauro Carvalho Chehab 	inc /= state->internal->mclk / 1000;
22669a0bf528SMauro Carvalho Chehab 	inc *= 256;
22679a0bf528SMauro Carvalho Chehab 	inc *= 256;
22689a0bf528SMauro Carvalho Chehab 	inc /= 1000;
22699a0bf528SMauro Carvalho Chehab 
22709a0bf528SMauro Carvalho Chehab 	switch (state->search_mode) {
22719a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_DVBS1:
22729a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_DSS:
22739a0bf528SMauro Carvalho Chehab 		inc *= 3; /* freq step = 3% of srate */
22749a0bf528SMauro Carvalho Chehab 		timeout = 20;
22759a0bf528SMauro Carvalho Chehab 		break;
22769a0bf528SMauro Carvalho Chehab 
22779a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_DVBS2:
22789a0bf528SMauro Carvalho Chehab 		inc *= 4;
22799a0bf528SMauro Carvalho Chehab 		timeout = 25;
22809a0bf528SMauro Carvalho Chehab 		break;
22819a0bf528SMauro Carvalho Chehab 
22829a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_AUTO:
22839a0bf528SMauro Carvalho Chehab 	default:
22849a0bf528SMauro Carvalho Chehab 		inc *= 3;
22859a0bf528SMauro Carvalho Chehab 		timeout = 25;
22869a0bf528SMauro Carvalho Chehab 		break;
22879a0bf528SMauro Carvalho Chehab 	}
22889a0bf528SMauro Carvalho Chehab 	inc /= 100;
22899a0bf528SMauro Carvalho Chehab 	if ((inc > car_max) || (inc < 0))
22909a0bf528SMauro Carvalho Chehab 		inc = car_max / 2; /* increment <= 1/8 Mclk */
22919a0bf528SMauro Carvalho Chehab 
22929a0bf528SMauro Carvalho Chehab 	timeout *= 27500; /* 27.5 Msps reference */
22939a0bf528SMauro Carvalho Chehab 	if (srate > 0)
22949a0bf528SMauro Carvalho Chehab 		timeout /= (srate / 1000);
22959a0bf528SMauro Carvalho Chehab 
22969a0bf528SMauro Carvalho Chehab 	if ((timeout > 100) || (timeout < 0))
22979a0bf528SMauro Carvalho Chehab 		timeout = 100;
22989a0bf528SMauro Carvalho Chehab 
22999a0bf528SMauro Carvalho Chehab 	steps_max = (car_max / inc) + 1; /* min steps = 3 */
23009a0bf528SMauro Carvalho Chehab 	if ((steps_max > 100) || (steps_max < 0)) {
23019a0bf528SMauro Carvalho Chehab 		steps_max = 100; /* max steps <= 100 */
23029a0bf528SMauro Carvalho Chehab 		inc = car_max / steps_max;
23039a0bf528SMauro Carvalho Chehab 	}
23049a0bf528SMauro Carvalho Chehab 	*freq_inc = inc;
23059a0bf528SMauro Carvalho Chehab 	*timeout_sw = timeout;
23069a0bf528SMauro Carvalho Chehab 	*steps = steps_max;
23079a0bf528SMauro Carvalho Chehab 
23089a0bf528SMauro Carvalho Chehab 	return 0;
23099a0bf528SMauro Carvalho Chehab }
23109a0bf528SMauro Carvalho Chehab 
23119a0bf528SMauro Carvalho Chehab static int stv090x_chk_signal(struct stv090x_state *state)
23129a0bf528SMauro Carvalho Chehab {
23139a0bf528SMauro Carvalho Chehab 	s32 offst_car, agc2, car_max;
23149a0bf528SMauro Carvalho Chehab 	int no_signal;
23159a0bf528SMauro Carvalho Chehab 
23169a0bf528SMauro Carvalho Chehab 	offst_car  = STV090x_READ_DEMOD(state, CFR2) << 8;
23179a0bf528SMauro Carvalho Chehab 	offst_car |= STV090x_READ_DEMOD(state, CFR1);
23189a0bf528SMauro Carvalho Chehab 	offst_car = comp2(offst_car, 16);
23199a0bf528SMauro Carvalho Chehab 
23209a0bf528SMauro Carvalho Chehab 	agc2  = STV090x_READ_DEMOD(state, AGC2I1) << 8;
23219a0bf528SMauro Carvalho Chehab 	agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
23229a0bf528SMauro Carvalho Chehab 	car_max = state->search_range / 1000;
23239a0bf528SMauro Carvalho Chehab 
23249a0bf528SMauro Carvalho Chehab 	car_max += (car_max / 10); /* 10% margin */
23259a0bf528SMauro Carvalho Chehab 	car_max  = (65536 * car_max / 2);
23269a0bf528SMauro Carvalho Chehab 	car_max /= state->internal->mclk / 1000;
23279a0bf528SMauro Carvalho Chehab 
23289a0bf528SMauro Carvalho Chehab 	if (car_max > 0x4000)
23299a0bf528SMauro Carvalho Chehab 		car_max = 0x4000;
23309a0bf528SMauro Carvalho Chehab 
23319a0bf528SMauro Carvalho Chehab 	if ((agc2 > 0x2000) || (offst_car > 2 * car_max) || (offst_car < -2 * car_max)) {
23329a0bf528SMauro Carvalho Chehab 		no_signal = 1;
23339a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "No Signal");
23349a0bf528SMauro Carvalho Chehab 	} else {
23359a0bf528SMauro Carvalho Chehab 		no_signal = 0;
23369a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Found Signal");
23379a0bf528SMauro Carvalho Chehab 	}
23389a0bf528SMauro Carvalho Chehab 
23399a0bf528SMauro Carvalho Chehab 	return no_signal;
23409a0bf528SMauro Carvalho Chehab }
23419a0bf528SMauro Carvalho Chehab 
23429a0bf528SMauro Carvalho Chehab static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max)
23439a0bf528SMauro Carvalho Chehab {
23449a0bf528SMauro Carvalho Chehab 	int no_signal, lock = 0;
23459a0bf528SMauro Carvalho Chehab 	s32 cpt_step = 0, offst_freq, car_max;
23469a0bf528SMauro Carvalho Chehab 	u32 reg;
23479a0bf528SMauro Carvalho Chehab 
23489a0bf528SMauro Carvalho Chehab 	car_max  = state->search_range / 1000;
23499a0bf528SMauro Carvalho Chehab 	car_max += (car_max / 10);
23509a0bf528SMauro Carvalho Chehab 	car_max  = (65536 * car_max / 2);
23519a0bf528SMauro Carvalho Chehab 	car_max /= (state->internal->mclk / 1000);
23529a0bf528SMauro Carvalho Chehab 	if (car_max > 0x4000)
23539a0bf528SMauro Carvalho Chehab 		car_max = 0x4000;
23549a0bf528SMauro Carvalho Chehab 
23559a0bf528SMauro Carvalho Chehab 	if (zigzag)
23569a0bf528SMauro Carvalho Chehab 		offst_freq = 0;
23579a0bf528SMauro Carvalho Chehab 	else
23589a0bf528SMauro Carvalho Chehab 		offst_freq = -car_max + inc;
23599a0bf528SMauro Carvalho Chehab 
23609a0bf528SMauro Carvalho Chehab 	do {
23619a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
23629a0bf528SMauro Carvalho Chehab 			goto err;
23639a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRINIT1, ((offst_freq / 256) & 0xff)) < 0)
23649a0bf528SMauro Carvalho Chehab 			goto err;
23659a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRINIT0, offst_freq & 0xff) < 0)
23669a0bf528SMauro Carvalho Chehab 			goto err;
23679a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
23689a0bf528SMauro Carvalho Chehab 			goto err;
23699a0bf528SMauro Carvalho Chehab 
23709a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, PDELCTRL1);
23719a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x1); /* stop DVB-S2 packet delin */
23729a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
23739a0bf528SMauro Carvalho Chehab 			goto err;
23749a0bf528SMauro Carvalho Chehab 
23759a0bf528SMauro Carvalho Chehab 		if (zigzag) {
23769a0bf528SMauro Carvalho Chehab 			if (offst_freq >= 0)
23779a0bf528SMauro Carvalho Chehab 				offst_freq = -offst_freq - 2 * inc;
23789a0bf528SMauro Carvalho Chehab 			else
23799a0bf528SMauro Carvalho Chehab 				offst_freq = -offst_freq;
23809a0bf528SMauro Carvalho Chehab 		} else {
23819a0bf528SMauro Carvalho Chehab 			offst_freq += 2 * inc;
23829a0bf528SMauro Carvalho Chehab 		}
23839a0bf528SMauro Carvalho Chehab 
23849a0bf528SMauro Carvalho Chehab 		cpt_step++;
23859a0bf528SMauro Carvalho Chehab 
23869a0bf528SMauro Carvalho Chehab 		lock = stv090x_get_dmdlock(state, timeout);
23879a0bf528SMauro Carvalho Chehab 		no_signal = stv090x_chk_signal(state);
23889a0bf528SMauro Carvalho Chehab 
23899a0bf528SMauro Carvalho Chehab 	} while ((!lock) &&
23909a0bf528SMauro Carvalho Chehab 		 (!no_signal) &&
23919a0bf528SMauro Carvalho Chehab 		  ((offst_freq - inc) < car_max) &&
23929a0bf528SMauro Carvalho Chehab 		  ((offst_freq + inc) > -car_max) &&
23939a0bf528SMauro Carvalho Chehab 		  (cpt_step < steps_max));
23949a0bf528SMauro Carvalho Chehab 
23959a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, PDELCTRL1);
23969a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0);
23979a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
23989a0bf528SMauro Carvalho Chehab 			goto err;
23999a0bf528SMauro Carvalho Chehab 
24009a0bf528SMauro Carvalho Chehab 	return lock;
24019a0bf528SMauro Carvalho Chehab err:
24029a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
24039a0bf528SMauro Carvalho Chehab 	return -1;
24049a0bf528SMauro Carvalho Chehab }
24059a0bf528SMauro Carvalho Chehab 
24069a0bf528SMauro Carvalho Chehab static int stv090x_sw_algo(struct stv090x_state *state)
24079a0bf528SMauro Carvalho Chehab {
24089a0bf528SMauro Carvalho Chehab 	int no_signal, zigzag, lock = 0;
24099a0bf528SMauro Carvalho Chehab 	u32 reg;
24109a0bf528SMauro Carvalho Chehab 
24119a0bf528SMauro Carvalho Chehab 	s32 dvbs2_fly_wheel;
24129a0bf528SMauro Carvalho Chehab 	s32 inc, timeout_step, trials, steps_max;
24139a0bf528SMauro Carvalho Chehab 
24149a0bf528SMauro Carvalho Chehab 	/* get params */
24159a0bf528SMauro Carvalho Chehab 	stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max);
24169a0bf528SMauro Carvalho Chehab 
24179a0bf528SMauro Carvalho Chehab 	switch (state->search_mode) {
24189a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_DVBS1:
24199a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_DSS:
24209a0bf528SMauro Carvalho Chehab 		/* accelerate the frequency detector */
24219a0bf528SMauro Carvalho Chehab 		if (state->internal->dev_ver >= 0x20) {
24229a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
24239a0bf528SMauro Carvalho Chehab 				goto err;
24249a0bf528SMauro Carvalho Chehab 		}
24259a0bf528SMauro Carvalho Chehab 
24269a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0)
24279a0bf528SMauro Carvalho Chehab 			goto err;
24289a0bf528SMauro Carvalho Chehab 		zigzag = 0;
24299a0bf528SMauro Carvalho Chehab 		break;
24309a0bf528SMauro Carvalho Chehab 
24319a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_DVBS2:
24329a0bf528SMauro Carvalho Chehab 		if (state->internal->dev_ver >= 0x20) {
24339a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
24349a0bf528SMauro Carvalho Chehab 				goto err;
24359a0bf528SMauro Carvalho Chehab 		}
24369a0bf528SMauro Carvalho Chehab 
24379a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
24389a0bf528SMauro Carvalho Chehab 			goto err;
24399a0bf528SMauro Carvalho Chehab 		zigzag = 1;
24409a0bf528SMauro Carvalho Chehab 		break;
24419a0bf528SMauro Carvalho Chehab 
24429a0bf528SMauro Carvalho Chehab 	case STV090x_SEARCH_AUTO:
24439a0bf528SMauro Carvalho Chehab 	default:
24449a0bf528SMauro Carvalho Chehab 		/* accelerate the frequency detector */
24459a0bf528SMauro Carvalho Chehab 		if (state->internal->dev_ver >= 0x20) {
24469a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
24479a0bf528SMauro Carvalho Chehab 				goto err;
24489a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
24499a0bf528SMauro Carvalho Chehab 				goto err;
24509a0bf528SMauro Carvalho Chehab 		}
24519a0bf528SMauro Carvalho Chehab 
24529a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0xc9) < 0)
24539a0bf528SMauro Carvalho Chehab 			goto err;
24549a0bf528SMauro Carvalho Chehab 		zigzag = 0;
24559a0bf528SMauro Carvalho Chehab 		break;
24569a0bf528SMauro Carvalho Chehab 	}
24579a0bf528SMauro Carvalho Chehab 
24589a0bf528SMauro Carvalho Chehab 	trials = 0;
24599a0bf528SMauro Carvalho Chehab 	do {
24609a0bf528SMauro Carvalho Chehab 		lock = stv090x_search_car_loop(state, inc, timeout_step, zigzag, steps_max);
24619a0bf528SMauro Carvalho Chehab 		no_signal = stv090x_chk_signal(state);
24629a0bf528SMauro Carvalho Chehab 		trials++;
24639a0bf528SMauro Carvalho Chehab 
24649a0bf528SMauro Carvalho Chehab 		/*run the SW search 2 times maximum*/
24659a0bf528SMauro Carvalho Chehab 		if (lock || no_signal || (trials == 2)) {
24669a0bf528SMauro Carvalho Chehab 			/*Check if the demod is not losing lock in DVBS2*/
24679a0bf528SMauro Carvalho Chehab 			if (state->internal->dev_ver >= 0x20) {
24689a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
24699a0bf528SMauro Carvalho Chehab 					goto err;
24709a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
24719a0bf528SMauro Carvalho Chehab 					goto err;
24729a0bf528SMauro Carvalho Chehab 			}
24739a0bf528SMauro Carvalho Chehab 
24749a0bf528SMauro Carvalho Chehab 			reg = STV090x_READ_DEMOD(state, DMDSTATE);
24759a0bf528SMauro Carvalho Chehab 			if ((lock) && (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == STV090x_DVBS2)) {
24769a0bf528SMauro Carvalho Chehab 				/*Check if the demod is not losing lock in DVBS2*/
24779a0bf528SMauro Carvalho Chehab 				msleep(timeout_step);
24789a0bf528SMauro Carvalho Chehab 				reg = STV090x_READ_DEMOD(state, DMDFLYW);
24799a0bf528SMauro Carvalho Chehab 				dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
24809a0bf528SMauro Carvalho Chehab 				if (dvbs2_fly_wheel < 0xd) {	 /*if correct frames is decrementing */
24819a0bf528SMauro Carvalho Chehab 					msleep(timeout_step);
24829a0bf528SMauro Carvalho Chehab 					reg = STV090x_READ_DEMOD(state, DMDFLYW);
24839a0bf528SMauro Carvalho Chehab 					dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
24849a0bf528SMauro Carvalho Chehab 				}
24859a0bf528SMauro Carvalho Chehab 				if (dvbs2_fly_wheel < 0xd) {
24869a0bf528SMauro Carvalho Chehab 					/*FALSE lock, The demod is losing lock */
24879a0bf528SMauro Carvalho Chehab 					lock = 0;
24889a0bf528SMauro Carvalho Chehab 					if (trials < 2) {
24899a0bf528SMauro Carvalho Chehab 						if (state->internal->dev_ver >= 0x20) {
24909a0bf528SMauro Carvalho Chehab 							if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
24919a0bf528SMauro Carvalho Chehab 								goto err;
24929a0bf528SMauro Carvalho Chehab 						}
24939a0bf528SMauro Carvalho Chehab 
24949a0bf528SMauro Carvalho Chehab 						if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
24959a0bf528SMauro Carvalho Chehab 							goto err;
24969a0bf528SMauro Carvalho Chehab 					}
24979a0bf528SMauro Carvalho Chehab 				}
24989a0bf528SMauro Carvalho Chehab 			}
24999a0bf528SMauro Carvalho Chehab 		}
25009a0bf528SMauro Carvalho Chehab 	} while ((!lock) && (trials < 2) && (!no_signal));
25019a0bf528SMauro Carvalho Chehab 
25029a0bf528SMauro Carvalho Chehab 	return lock;
25039a0bf528SMauro Carvalho Chehab err:
25049a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
25059a0bf528SMauro Carvalho Chehab 	return -1;
25069a0bf528SMauro Carvalho Chehab }
25079a0bf528SMauro Carvalho Chehab 
25089a0bf528SMauro Carvalho Chehab static enum stv090x_delsys stv090x_get_std(struct stv090x_state *state)
25099a0bf528SMauro Carvalho Chehab {
25109a0bf528SMauro Carvalho Chehab 	u32 reg;
25119a0bf528SMauro Carvalho Chehab 	enum stv090x_delsys delsys;
25129a0bf528SMauro Carvalho Chehab 
25139a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DMDSTATE);
25149a0bf528SMauro Carvalho Chehab 	if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 2)
25159a0bf528SMauro Carvalho Chehab 		delsys = STV090x_DVBS2;
25169a0bf528SMauro Carvalho Chehab 	else if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) {
25179a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, FECM);
25189a0bf528SMauro Carvalho Chehab 		if (STV090x_GETFIELD_Px(reg, DSS_DVB_FIELD) == 1)
25199a0bf528SMauro Carvalho Chehab 			delsys = STV090x_DSS;
25209a0bf528SMauro Carvalho Chehab 		else
25219a0bf528SMauro Carvalho Chehab 			delsys = STV090x_DVBS1;
25229a0bf528SMauro Carvalho Chehab 	} else {
25239a0bf528SMauro Carvalho Chehab 		delsys = STV090x_ERROR;
25249a0bf528SMauro Carvalho Chehab 	}
25259a0bf528SMauro Carvalho Chehab 
25269a0bf528SMauro Carvalho Chehab 	return delsys;
25279a0bf528SMauro Carvalho Chehab }
25289a0bf528SMauro Carvalho Chehab 
25299a0bf528SMauro Carvalho Chehab /* in Hz */
25309a0bf528SMauro Carvalho Chehab static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
25319a0bf528SMauro Carvalho Chehab {
25329a0bf528SMauro Carvalho Chehab 	s32 derot, int_1, int_2, tmp_1, tmp_2;
25339a0bf528SMauro Carvalho Chehab 
25349a0bf528SMauro Carvalho Chehab 	derot  = STV090x_READ_DEMOD(state, CFR2) << 16;
25359a0bf528SMauro Carvalho Chehab 	derot |= STV090x_READ_DEMOD(state, CFR1) <<  8;
25369a0bf528SMauro Carvalho Chehab 	derot |= STV090x_READ_DEMOD(state, CFR0);
25379a0bf528SMauro Carvalho Chehab 
25389a0bf528SMauro Carvalho Chehab 	derot = comp2(derot, 24);
25399a0bf528SMauro Carvalho Chehab 	int_1 = mclk >> 12;
25409a0bf528SMauro Carvalho Chehab 	int_2 = derot >> 12;
25419a0bf528SMauro Carvalho Chehab 
25429a0bf528SMauro Carvalho Chehab 	/* carrier_frequency = MasterClock * Reg / 2^24 */
25439a0bf528SMauro Carvalho Chehab 	tmp_1 = mclk % 0x1000;
25449a0bf528SMauro Carvalho Chehab 	tmp_2 = derot % 0x1000;
25459a0bf528SMauro Carvalho Chehab 
25469a0bf528SMauro Carvalho Chehab 	derot = (int_1 * int_2) +
25479a0bf528SMauro Carvalho Chehab 		((int_1 * tmp_2) >> 12) +
25489a0bf528SMauro Carvalho Chehab 		((int_2 * tmp_1) >> 12);
25499a0bf528SMauro Carvalho Chehab 
25509a0bf528SMauro Carvalho Chehab 	return derot;
25519a0bf528SMauro Carvalho Chehab }
25529a0bf528SMauro Carvalho Chehab 
25539a0bf528SMauro Carvalho Chehab static int stv090x_get_viterbi(struct stv090x_state *state)
25549a0bf528SMauro Carvalho Chehab {
25559a0bf528SMauro Carvalho Chehab 	u32 reg, rate;
25569a0bf528SMauro Carvalho Chehab 
25579a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, VITCURPUN);
25589a0bf528SMauro Carvalho Chehab 	rate = STV090x_GETFIELD_Px(reg, VIT_CURPUN_FIELD);
25599a0bf528SMauro Carvalho Chehab 
25609a0bf528SMauro Carvalho Chehab 	switch (rate) {
25619a0bf528SMauro Carvalho Chehab 	case 13:
25629a0bf528SMauro Carvalho Chehab 		state->fec = STV090x_PR12;
25639a0bf528SMauro Carvalho Chehab 		break;
25649a0bf528SMauro Carvalho Chehab 
25659a0bf528SMauro Carvalho Chehab 	case 18:
25669a0bf528SMauro Carvalho Chehab 		state->fec = STV090x_PR23;
25679a0bf528SMauro Carvalho Chehab 		break;
25689a0bf528SMauro Carvalho Chehab 
25699a0bf528SMauro Carvalho Chehab 	case 21:
25709a0bf528SMauro Carvalho Chehab 		state->fec = STV090x_PR34;
25719a0bf528SMauro Carvalho Chehab 		break;
25729a0bf528SMauro Carvalho Chehab 
25739a0bf528SMauro Carvalho Chehab 	case 24:
25749a0bf528SMauro Carvalho Chehab 		state->fec = STV090x_PR56;
25759a0bf528SMauro Carvalho Chehab 		break;
25769a0bf528SMauro Carvalho Chehab 
25779a0bf528SMauro Carvalho Chehab 	case 25:
25789a0bf528SMauro Carvalho Chehab 		state->fec = STV090x_PR67;
25799a0bf528SMauro Carvalho Chehab 		break;
25809a0bf528SMauro Carvalho Chehab 
25819a0bf528SMauro Carvalho Chehab 	case 26:
25829a0bf528SMauro Carvalho Chehab 		state->fec = STV090x_PR78;
25839a0bf528SMauro Carvalho Chehab 		break;
25849a0bf528SMauro Carvalho Chehab 
25859a0bf528SMauro Carvalho Chehab 	default:
25869a0bf528SMauro Carvalho Chehab 		state->fec = STV090x_PRERR;
25879a0bf528SMauro Carvalho Chehab 		break;
25889a0bf528SMauro Carvalho Chehab 	}
25899a0bf528SMauro Carvalho Chehab 
25909a0bf528SMauro Carvalho Chehab 	return 0;
25919a0bf528SMauro Carvalho Chehab }
25929a0bf528SMauro Carvalho Chehab 
25939a0bf528SMauro Carvalho Chehab static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *state)
25949a0bf528SMauro Carvalho Chehab {
25959a0bf528SMauro Carvalho Chehab 	struct dvb_frontend *fe = &state->frontend;
25969a0bf528SMauro Carvalho Chehab 
25979a0bf528SMauro Carvalho Chehab 	u8 tmg;
25989a0bf528SMauro Carvalho Chehab 	u32 reg;
25999a0bf528SMauro Carvalho Chehab 	s32 i = 0, offst_freq;
26009a0bf528SMauro Carvalho Chehab 
26019a0bf528SMauro Carvalho Chehab 	msleep(5);
26029a0bf528SMauro Carvalho Chehab 
26039a0bf528SMauro Carvalho Chehab 	if (state->algo == STV090x_BLIND_SEARCH) {
26049a0bf528SMauro Carvalho Chehab 		tmg = STV090x_READ_DEMOD(state, TMGREG2);
26059a0bf528SMauro Carvalho Chehab 		STV090x_WRITE_DEMOD(state, SFRSTEP, 0x5c);
26069a0bf528SMauro Carvalho Chehab 		while ((i <= 50) && (tmg != 0) && (tmg != 0xff)) {
26079a0bf528SMauro Carvalho Chehab 			tmg = STV090x_READ_DEMOD(state, TMGREG2);
26089a0bf528SMauro Carvalho Chehab 			msleep(5);
26099a0bf528SMauro Carvalho Chehab 			i += 5;
26109a0bf528SMauro Carvalho Chehab 		}
26119a0bf528SMauro Carvalho Chehab 	}
26129a0bf528SMauro Carvalho Chehab 	state->delsys = stv090x_get_std(state);
26139a0bf528SMauro Carvalho Chehab 
26149a0bf528SMauro Carvalho Chehab 	if (stv090x_i2c_gate_ctrl(state, 1) < 0)
26159a0bf528SMauro Carvalho Chehab 		goto err;
26169a0bf528SMauro Carvalho Chehab 
26179a0bf528SMauro Carvalho Chehab 	if (state->config->tuner_get_frequency) {
26189a0bf528SMauro Carvalho Chehab 		if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
26199a0bf528SMauro Carvalho Chehab 			goto err_gateoff;
26209a0bf528SMauro Carvalho Chehab 	}
26219a0bf528SMauro Carvalho Chehab 
26229a0bf528SMauro Carvalho Chehab 	if (stv090x_i2c_gate_ctrl(state, 0) < 0)
26239a0bf528SMauro Carvalho Chehab 		goto err;
26249a0bf528SMauro Carvalho Chehab 
26259a0bf528SMauro Carvalho Chehab 	offst_freq = stv090x_get_car_freq(state, state->internal->mclk) / 1000;
26269a0bf528SMauro Carvalho Chehab 	state->frequency += offst_freq;
26279a0bf528SMauro Carvalho Chehab 
26289a0bf528SMauro Carvalho Chehab 	if (stv090x_get_viterbi(state) < 0)
26299a0bf528SMauro Carvalho Chehab 		goto err;
26309a0bf528SMauro Carvalho Chehab 
26319a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DMDMODCOD);
26329a0bf528SMauro Carvalho Chehab 	state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
26339a0bf528SMauro Carvalho Chehab 	state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
26349a0bf528SMauro Carvalho Chehab 	state->frame_len = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) >> 1;
26359a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, TMGOBS);
26369a0bf528SMauro Carvalho Chehab 	state->rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
26379a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, FECM);
26389a0bf528SMauro Carvalho Chehab 	state->inversion = STV090x_GETFIELD_Px(reg, IQINV_FIELD);
26399a0bf528SMauro Carvalho Chehab 
26409a0bf528SMauro Carvalho Chehab 	if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) {
26419a0bf528SMauro Carvalho Chehab 
26429a0bf528SMauro Carvalho Chehab 		if (stv090x_i2c_gate_ctrl(state, 1) < 0)
26439a0bf528SMauro Carvalho Chehab 			goto err;
26449a0bf528SMauro Carvalho Chehab 
26459a0bf528SMauro Carvalho Chehab 		if (state->config->tuner_get_frequency) {
26469a0bf528SMauro Carvalho Chehab 			if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
26479a0bf528SMauro Carvalho Chehab 				goto err_gateoff;
26489a0bf528SMauro Carvalho Chehab 		}
26499a0bf528SMauro Carvalho Chehab 
26509a0bf528SMauro Carvalho Chehab 		if (stv090x_i2c_gate_ctrl(state, 0) < 0)
26519a0bf528SMauro Carvalho Chehab 			goto err;
26529a0bf528SMauro Carvalho Chehab 
26539a0bf528SMauro Carvalho Chehab 		if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
26549a0bf528SMauro Carvalho Chehab 			return STV090x_RANGEOK;
26559a0bf528SMauro Carvalho Chehab 		else if (abs(offst_freq) <= (stv090x_car_width(state->srate, state->rolloff) / 2000))
26569a0bf528SMauro Carvalho Chehab 			return STV090x_RANGEOK;
26579a0bf528SMauro Carvalho Chehab 	} else {
26589a0bf528SMauro Carvalho Chehab 		if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
26599a0bf528SMauro Carvalho Chehab 			return STV090x_RANGEOK;
26609a0bf528SMauro Carvalho Chehab 	}
26619a0bf528SMauro Carvalho Chehab 
26629a0bf528SMauro Carvalho Chehab 	return STV090x_OUTOFRANGE;
26639a0bf528SMauro Carvalho Chehab 
26649a0bf528SMauro Carvalho Chehab err_gateoff:
26659a0bf528SMauro Carvalho Chehab 	stv090x_i2c_gate_ctrl(state, 0);
26669a0bf528SMauro Carvalho Chehab err:
26679a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
26689a0bf528SMauro Carvalho Chehab 	return -1;
26699a0bf528SMauro Carvalho Chehab }
26709a0bf528SMauro Carvalho Chehab 
26719a0bf528SMauro Carvalho Chehab static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate)
26729a0bf528SMauro Carvalho Chehab {
26739a0bf528SMauro Carvalho Chehab 	s32 offst_tmg;
26749a0bf528SMauro Carvalho Chehab 
26759a0bf528SMauro Carvalho Chehab 	offst_tmg  = STV090x_READ_DEMOD(state, TMGREG2) << 16;
26769a0bf528SMauro Carvalho Chehab 	offst_tmg |= STV090x_READ_DEMOD(state, TMGREG1) <<  8;
26779a0bf528SMauro Carvalho Chehab 	offst_tmg |= STV090x_READ_DEMOD(state, TMGREG0);
26789a0bf528SMauro Carvalho Chehab 
26799a0bf528SMauro Carvalho Chehab 	offst_tmg = comp2(offst_tmg, 24); /* 2's complement */
26809a0bf528SMauro Carvalho Chehab 	if (!offst_tmg)
26819a0bf528SMauro Carvalho Chehab 		offst_tmg = 1;
26829a0bf528SMauro Carvalho Chehab 
26839a0bf528SMauro Carvalho Chehab 	offst_tmg  = ((s32) srate * 10) / ((s32) 0x1000000 / offst_tmg);
26849a0bf528SMauro Carvalho Chehab 	offst_tmg /= 320;
26859a0bf528SMauro Carvalho Chehab 
26869a0bf528SMauro Carvalho Chehab 	return offst_tmg;
26879a0bf528SMauro Carvalho Chehab }
26889a0bf528SMauro Carvalho Chehab 
26899a0bf528SMauro Carvalho Chehab static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_modcod modcod, s32 pilots)
26909a0bf528SMauro Carvalho Chehab {
26919a0bf528SMauro Carvalho Chehab 	u8 aclc = 0x29;
26929a0bf528SMauro Carvalho Chehab 	s32 i;
26939a0bf528SMauro Carvalho Chehab 	struct stv090x_long_frame_crloop *car_loop, *car_loop_qpsk_low, *car_loop_apsk_low;
26949a0bf528SMauro Carvalho Chehab 
26959a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver == 0x20) {
26969a0bf528SMauro Carvalho Chehab 		car_loop		= stv090x_s2_crl_cut20;
26979a0bf528SMauro Carvalho Chehab 		car_loop_qpsk_low	= stv090x_s2_lowqpsk_crl_cut20;
26989a0bf528SMauro Carvalho Chehab 		car_loop_apsk_low	= stv090x_s2_apsk_crl_cut20;
26999a0bf528SMauro Carvalho Chehab 	} else {
27009a0bf528SMauro Carvalho Chehab 		/* >= Cut 3 */
27019a0bf528SMauro Carvalho Chehab 		car_loop		= stv090x_s2_crl_cut30;
27029a0bf528SMauro Carvalho Chehab 		car_loop_qpsk_low	= stv090x_s2_lowqpsk_crl_cut30;
27039a0bf528SMauro Carvalho Chehab 		car_loop_apsk_low	= stv090x_s2_apsk_crl_cut30;
27049a0bf528SMauro Carvalho Chehab 	}
27059a0bf528SMauro Carvalho Chehab 
27069a0bf528SMauro Carvalho Chehab 	if (modcod < STV090x_QPSK_12) {
27079a0bf528SMauro Carvalho Chehab 		i = 0;
27089a0bf528SMauro Carvalho Chehab 		while ((i < 3) && (modcod != car_loop_qpsk_low[i].modcod))
27099a0bf528SMauro Carvalho Chehab 			i++;
27109a0bf528SMauro Carvalho Chehab 
27119a0bf528SMauro Carvalho Chehab 		if (i >= 3)
27129a0bf528SMauro Carvalho Chehab 			i = 2;
27139a0bf528SMauro Carvalho Chehab 
27149a0bf528SMauro Carvalho Chehab 	} else {
27159a0bf528SMauro Carvalho Chehab 		i = 0;
27169a0bf528SMauro Carvalho Chehab 		while ((i < 14) && (modcod != car_loop[i].modcod))
27179a0bf528SMauro Carvalho Chehab 			i++;
27189a0bf528SMauro Carvalho Chehab 
27199a0bf528SMauro Carvalho Chehab 		if (i >= 14) {
27209a0bf528SMauro Carvalho Chehab 			i = 0;
27219a0bf528SMauro Carvalho Chehab 			while ((i < 11) && (modcod != car_loop_apsk_low[i].modcod))
27229a0bf528SMauro Carvalho Chehab 				i++;
27239a0bf528SMauro Carvalho Chehab 
27249a0bf528SMauro Carvalho Chehab 			if (i >= 11)
27259a0bf528SMauro Carvalho Chehab 				i = 10;
27269a0bf528SMauro Carvalho Chehab 		}
27279a0bf528SMauro Carvalho Chehab 	}
27289a0bf528SMauro Carvalho Chehab 
27299a0bf528SMauro Carvalho Chehab 	if (modcod <= STV090x_QPSK_25) {
27309a0bf528SMauro Carvalho Chehab 		if (pilots) {
27319a0bf528SMauro Carvalho Chehab 			if (state->srate <= 3000000)
27329a0bf528SMauro Carvalho Chehab 				aclc = car_loop_qpsk_low[i].crl_pilots_on_2;
27339a0bf528SMauro Carvalho Chehab 			else if (state->srate <= 7000000)
27349a0bf528SMauro Carvalho Chehab 				aclc = car_loop_qpsk_low[i].crl_pilots_on_5;
27359a0bf528SMauro Carvalho Chehab 			else if (state->srate <= 15000000)
27369a0bf528SMauro Carvalho Chehab 				aclc = car_loop_qpsk_low[i].crl_pilots_on_10;
27379a0bf528SMauro Carvalho Chehab 			else if (state->srate <= 25000000)
27389a0bf528SMauro Carvalho Chehab 				aclc = car_loop_qpsk_low[i].crl_pilots_on_20;
27399a0bf528SMauro Carvalho Chehab 			else
27409a0bf528SMauro Carvalho Chehab 				aclc = car_loop_qpsk_low[i].crl_pilots_on_30;
27419a0bf528SMauro Carvalho Chehab 		} else {
27429a0bf528SMauro Carvalho Chehab 			if (state->srate <= 3000000)
27439a0bf528SMauro Carvalho Chehab 				aclc = car_loop_qpsk_low[i].crl_pilots_off_2;
27449a0bf528SMauro Carvalho Chehab 			else if (state->srate <= 7000000)
27459a0bf528SMauro Carvalho Chehab 				aclc = car_loop_qpsk_low[i].crl_pilots_off_5;
27469a0bf528SMauro Carvalho Chehab 			else if (state->srate <= 15000000)
27479a0bf528SMauro Carvalho Chehab 				aclc = car_loop_qpsk_low[i].crl_pilots_off_10;
27489a0bf528SMauro Carvalho Chehab 			else if (state->srate <= 25000000)
27499a0bf528SMauro Carvalho Chehab 				aclc = car_loop_qpsk_low[i].crl_pilots_off_20;
27509a0bf528SMauro Carvalho Chehab 			else
27519a0bf528SMauro Carvalho Chehab 				aclc = car_loop_qpsk_low[i].crl_pilots_off_30;
27529a0bf528SMauro Carvalho Chehab 		}
27539a0bf528SMauro Carvalho Chehab 
27549a0bf528SMauro Carvalho Chehab 	} else if (modcod <= STV090x_8PSK_910) {
27559a0bf528SMauro Carvalho Chehab 		if (pilots) {
27569a0bf528SMauro Carvalho Chehab 			if (state->srate <= 3000000)
27579a0bf528SMauro Carvalho Chehab 				aclc = car_loop[i].crl_pilots_on_2;
27589a0bf528SMauro Carvalho Chehab 			else if (state->srate <= 7000000)
27599a0bf528SMauro Carvalho Chehab 				aclc = car_loop[i].crl_pilots_on_5;
27609a0bf528SMauro Carvalho Chehab 			else if (state->srate <= 15000000)
27619a0bf528SMauro Carvalho Chehab 				aclc = car_loop[i].crl_pilots_on_10;
27629a0bf528SMauro Carvalho Chehab 			else if (state->srate <= 25000000)
27639a0bf528SMauro Carvalho Chehab 				aclc = car_loop[i].crl_pilots_on_20;
27649a0bf528SMauro Carvalho Chehab 			else
27659a0bf528SMauro Carvalho Chehab 				aclc = car_loop[i].crl_pilots_on_30;
27669a0bf528SMauro Carvalho Chehab 		} else {
27679a0bf528SMauro Carvalho Chehab 			if (state->srate <= 3000000)
27689a0bf528SMauro Carvalho Chehab 				aclc = car_loop[i].crl_pilots_off_2;
27699a0bf528SMauro Carvalho Chehab 			else if (state->srate <= 7000000)
27709a0bf528SMauro Carvalho Chehab 				aclc = car_loop[i].crl_pilots_off_5;
27719a0bf528SMauro Carvalho Chehab 			else if (state->srate <= 15000000)
27729a0bf528SMauro Carvalho Chehab 				aclc = car_loop[i].crl_pilots_off_10;
27739a0bf528SMauro Carvalho Chehab 			else if (state->srate <= 25000000)
27749a0bf528SMauro Carvalho Chehab 				aclc = car_loop[i].crl_pilots_off_20;
27759a0bf528SMauro Carvalho Chehab 			else
27769a0bf528SMauro Carvalho Chehab 				aclc = car_loop[i].crl_pilots_off_30;
27779a0bf528SMauro Carvalho Chehab 		}
27789a0bf528SMauro Carvalho Chehab 	} else { /* 16APSK and 32APSK */
2779ffe30010SMauro Carvalho Chehab 		/*
2780ffe30010SMauro Carvalho Chehab 		 * This should never happen in practice, except if
2781ffe30010SMauro Carvalho Chehab 		 * something is really wrong at the car_loop table.
2782ffe30010SMauro Carvalho Chehab 		 */
2783ffe30010SMauro Carvalho Chehab 		if (i >= 11)
2784ffe30010SMauro Carvalho Chehab 			i = 10;
27859a0bf528SMauro Carvalho Chehab 		if (state->srate <= 3000000)
27869a0bf528SMauro Carvalho Chehab 			aclc = car_loop_apsk_low[i].crl_pilots_on_2;
27879a0bf528SMauro Carvalho Chehab 		else if (state->srate <= 7000000)
27889a0bf528SMauro Carvalho Chehab 			aclc = car_loop_apsk_low[i].crl_pilots_on_5;
27899a0bf528SMauro Carvalho Chehab 		else if (state->srate <= 15000000)
27909a0bf528SMauro Carvalho Chehab 			aclc = car_loop_apsk_low[i].crl_pilots_on_10;
27919a0bf528SMauro Carvalho Chehab 		else if (state->srate <= 25000000)
27929a0bf528SMauro Carvalho Chehab 			aclc = car_loop_apsk_low[i].crl_pilots_on_20;
27939a0bf528SMauro Carvalho Chehab 		else
27949a0bf528SMauro Carvalho Chehab 			aclc = car_loop_apsk_low[i].crl_pilots_on_30;
27959a0bf528SMauro Carvalho Chehab 	}
27969a0bf528SMauro Carvalho Chehab 
27979a0bf528SMauro Carvalho Chehab 	return aclc;
27989a0bf528SMauro Carvalho Chehab }
27999a0bf528SMauro Carvalho Chehab 
28009a0bf528SMauro Carvalho Chehab static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
28019a0bf528SMauro Carvalho Chehab {
28029a0bf528SMauro Carvalho Chehab 	struct stv090x_short_frame_crloop *short_crl = NULL;
28039a0bf528SMauro Carvalho Chehab 	s32 index = 0;
28049a0bf528SMauro Carvalho Chehab 	u8 aclc = 0x0b;
28059a0bf528SMauro Carvalho Chehab 
28069a0bf528SMauro Carvalho Chehab 	switch (state->modulation) {
28079a0bf528SMauro Carvalho Chehab 	case STV090x_QPSK:
28089a0bf528SMauro Carvalho Chehab 	default:
28099a0bf528SMauro Carvalho Chehab 		index = 0;
28109a0bf528SMauro Carvalho Chehab 		break;
28119a0bf528SMauro Carvalho Chehab 	case STV090x_8PSK:
28129a0bf528SMauro Carvalho Chehab 		index = 1;
28139a0bf528SMauro Carvalho Chehab 		break;
28149a0bf528SMauro Carvalho Chehab 	case STV090x_16APSK:
28159a0bf528SMauro Carvalho Chehab 		index = 2;
28169a0bf528SMauro Carvalho Chehab 		break;
28179a0bf528SMauro Carvalho Chehab 	case STV090x_32APSK:
28189a0bf528SMauro Carvalho Chehab 		index = 3;
28199a0bf528SMauro Carvalho Chehab 		break;
28209a0bf528SMauro Carvalho Chehab 	}
28219a0bf528SMauro Carvalho Chehab 
28229a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver >= 0x30) {
28239a0bf528SMauro Carvalho Chehab 		/* Cut 3.0 and up */
28249a0bf528SMauro Carvalho Chehab 		short_crl = stv090x_s2_short_crl_cut30;
28259a0bf528SMauro Carvalho Chehab 	} else {
28269a0bf528SMauro Carvalho Chehab 		/* Cut 2.0 and up: we don't support cuts older than 2.0 */
28279a0bf528SMauro Carvalho Chehab 		short_crl = stv090x_s2_short_crl_cut20;
28289a0bf528SMauro Carvalho Chehab 	}
28299a0bf528SMauro Carvalho Chehab 
28309a0bf528SMauro Carvalho Chehab 	if (state->srate <= 3000000)
28319a0bf528SMauro Carvalho Chehab 		aclc = short_crl[index].crl_2;
28329a0bf528SMauro Carvalho Chehab 	else if (state->srate <= 7000000)
28339a0bf528SMauro Carvalho Chehab 		aclc = short_crl[index].crl_5;
28349a0bf528SMauro Carvalho Chehab 	else if (state->srate <= 15000000)
28359a0bf528SMauro Carvalho Chehab 		aclc = short_crl[index].crl_10;
28369a0bf528SMauro Carvalho Chehab 	else if (state->srate <= 25000000)
28379a0bf528SMauro Carvalho Chehab 		aclc = short_crl[index].crl_20;
28389a0bf528SMauro Carvalho Chehab 	else
28399a0bf528SMauro Carvalho Chehab 		aclc = short_crl[index].crl_30;
28409a0bf528SMauro Carvalho Chehab 
28419a0bf528SMauro Carvalho Chehab 	return aclc;
28429a0bf528SMauro Carvalho Chehab }
28439a0bf528SMauro Carvalho Chehab 
28449a0bf528SMauro Carvalho Chehab static int stv090x_optimize_track(struct stv090x_state *state)
28459a0bf528SMauro Carvalho Chehab {
28469a0bf528SMauro Carvalho Chehab 	struct dvb_frontend *fe = &state->frontend;
28479a0bf528SMauro Carvalho Chehab 
28489a0bf528SMauro Carvalho Chehab 	enum stv090x_modcod modcod;
28499a0bf528SMauro Carvalho Chehab 
28509a0bf528SMauro Carvalho Chehab 	s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
28519a0bf528SMauro Carvalho Chehab 	u32 reg;
28529a0bf528SMauro Carvalho Chehab 
28539a0bf528SMauro Carvalho Chehab 	srate  = stv090x_get_srate(state, state->internal->mclk);
28549a0bf528SMauro Carvalho Chehab 	srate += stv090x_get_tmgoffst(state, srate);
28559a0bf528SMauro Carvalho Chehab 
28569a0bf528SMauro Carvalho Chehab 	switch (state->delsys) {
28579a0bf528SMauro Carvalho Chehab 	case STV090x_DVBS1:
28589a0bf528SMauro Carvalho Chehab 	case STV090x_DSS:
28599a0bf528SMauro Carvalho Chehab 		if (state->search_mode == STV090x_SEARCH_AUTO) {
28609a0bf528SMauro Carvalho Chehab 			reg = STV090x_READ_DEMOD(state, DMDCFGMD);
28619a0bf528SMauro Carvalho Chehab 			STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
28629a0bf528SMauro Carvalho Chehab 			STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
28639a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
28649a0bf528SMauro Carvalho Chehab 				goto err;
28659a0bf528SMauro Carvalho Chehab 		}
28669a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DEMOD);
28679a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
28689a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x01);
28699a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
28709a0bf528SMauro Carvalho Chehab 			goto err;
28719a0bf528SMauro Carvalho Chehab 
28729a0bf528SMauro Carvalho Chehab 		if (state->internal->dev_ver >= 0x30) {
28739a0bf528SMauro Carvalho Chehab 			if (stv090x_get_viterbi(state) < 0)
28749a0bf528SMauro Carvalho Chehab 				goto err;
28759a0bf528SMauro Carvalho Chehab 
28769a0bf528SMauro Carvalho Chehab 			if (state->fec == STV090x_PR12) {
28779a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x98) < 0)
28789a0bf528SMauro Carvalho Chehab 					goto err;
28799a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
28809a0bf528SMauro Carvalho Chehab 					goto err;
28819a0bf528SMauro Carvalho Chehab 			} else {
28829a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x18) < 0)
28839a0bf528SMauro Carvalho Chehab 					goto err;
28849a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
28859a0bf528SMauro Carvalho Chehab 					goto err;
28869a0bf528SMauro Carvalho Chehab 			}
28879a0bf528SMauro Carvalho Chehab 		}
28889a0bf528SMauro Carvalho Chehab 
28899a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
28909a0bf528SMauro Carvalho Chehab 			goto err;
28919a0bf528SMauro Carvalho Chehab 		break;
28929a0bf528SMauro Carvalho Chehab 
28939a0bf528SMauro Carvalho Chehab 	case STV090x_DVBS2:
28949a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DMDCFGMD);
28959a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
28969a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
28979a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
28989a0bf528SMauro Carvalho Chehab 			goto err;
28999a0bf528SMauro Carvalho Chehab 		if (state->internal->dev_ver >= 0x30) {
29009a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
29019a0bf528SMauro Carvalho Chehab 				goto err;
29029a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
29039a0bf528SMauro Carvalho Chehab 				goto err;
29049a0bf528SMauro Carvalho Chehab 		}
29059a0bf528SMauro Carvalho Chehab 		if (state->frame_len == STV090x_LONG_FRAME) {
29069a0bf528SMauro Carvalho Chehab 			reg = STV090x_READ_DEMOD(state, DMDMODCOD);
29079a0bf528SMauro Carvalho Chehab 			modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
29089a0bf528SMauro Carvalho Chehab 			pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
29099a0bf528SMauro Carvalho Chehab 			aclc = stv090x_optimize_carloop(state, modcod, pilots);
29109a0bf528SMauro Carvalho Chehab 			if (modcod <= STV090x_QPSK_910) {
29119a0bf528SMauro Carvalho Chehab 				STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc);
29129a0bf528SMauro Carvalho Chehab 			} else if (modcod <= STV090x_8PSK_910) {
29139a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
29149a0bf528SMauro Carvalho Chehab 					goto err;
29159a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
29169a0bf528SMauro Carvalho Chehab 					goto err;
29179a0bf528SMauro Carvalho Chehab 			}
29189a0bf528SMauro Carvalho Chehab 			if ((state->demod_mode == STV090x_SINGLE) && (modcod > STV090x_8PSK_910)) {
29199a0bf528SMauro Carvalho Chehab 				if (modcod <= STV090x_16APSK_910) {
29209a0bf528SMauro Carvalho Chehab 					if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
29219a0bf528SMauro Carvalho Chehab 						goto err;
29229a0bf528SMauro Carvalho Chehab 					if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
29239a0bf528SMauro Carvalho Chehab 						goto err;
29249a0bf528SMauro Carvalho Chehab 				} else {
29259a0bf528SMauro Carvalho Chehab 					if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
29269a0bf528SMauro Carvalho Chehab 						goto err;
29279a0bf528SMauro Carvalho Chehab 					if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
29289a0bf528SMauro Carvalho Chehab 						goto err;
29299a0bf528SMauro Carvalho Chehab 				}
29309a0bf528SMauro Carvalho Chehab 			}
29319a0bf528SMauro Carvalho Chehab 		} else {
29329a0bf528SMauro Carvalho Chehab 			/*Carrier loop setting for short frame*/
29339a0bf528SMauro Carvalho Chehab 			aclc = stv090x_optimize_carloop_short(state);
29349a0bf528SMauro Carvalho Chehab 			if (state->modulation == STV090x_QPSK) {
29359a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc) < 0)
29369a0bf528SMauro Carvalho Chehab 					goto err;
29379a0bf528SMauro Carvalho Chehab 			} else if (state->modulation == STV090x_8PSK) {
29389a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
29399a0bf528SMauro Carvalho Chehab 					goto err;
29409a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
29419a0bf528SMauro Carvalho Chehab 					goto err;
29429a0bf528SMauro Carvalho Chehab 			} else if (state->modulation == STV090x_16APSK) {
29439a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
29449a0bf528SMauro Carvalho Chehab 					goto err;
29459a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
29469a0bf528SMauro Carvalho Chehab 					goto err;
29479a0bf528SMauro Carvalho Chehab 			} else if (state->modulation == STV090x_32APSK)  {
29489a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
29499a0bf528SMauro Carvalho Chehab 					goto err;
29509a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
29519a0bf528SMauro Carvalho Chehab 					goto err;
29529a0bf528SMauro Carvalho Chehab 			}
29539a0bf528SMauro Carvalho Chehab 		}
29549a0bf528SMauro Carvalho Chehab 
29559a0bf528SMauro Carvalho Chehab 		STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
29569a0bf528SMauro Carvalho Chehab 		break;
29579a0bf528SMauro Carvalho Chehab 
29589a0bf528SMauro Carvalho Chehab 	case STV090x_ERROR:
29599a0bf528SMauro Carvalho Chehab 	default:
29609a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DMDCFGMD);
29619a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
29629a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
29639a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
29649a0bf528SMauro Carvalho Chehab 			goto err;
29659a0bf528SMauro Carvalho Chehab 		break;
29669a0bf528SMauro Carvalho Chehab 	}
29679a0bf528SMauro Carvalho Chehab 
29689a0bf528SMauro Carvalho Chehab 	f_1 = STV090x_READ_DEMOD(state, CFR2);
29699a0bf528SMauro Carvalho Chehab 	f_0 = STV090x_READ_DEMOD(state, CFR1);
29709a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, TMGOBS);
29719a0bf528SMauro Carvalho Chehab 
29729a0bf528SMauro Carvalho Chehab 	if (state->algo == STV090x_BLIND_SEARCH) {
29739a0bf528SMauro Carvalho Chehab 		STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);
29749a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DMDCFGMD);
29759a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0x00);
29769a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
29779a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
29789a0bf528SMauro Carvalho Chehab 			goto err;
29799a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
29809a0bf528SMauro Carvalho Chehab 			goto err;
29819a0bf528SMauro Carvalho Chehab 
29829a0bf528SMauro Carvalho Chehab 		if (stv090x_set_srate(state, srate) < 0)
29839a0bf528SMauro Carvalho Chehab 			goto err;
29849a0bf528SMauro Carvalho Chehab 		blind_tune = 1;
29859a0bf528SMauro Carvalho Chehab 
29869a0bf528SMauro Carvalho Chehab 		if (stv090x_dvbs_track_crl(state) < 0)
29879a0bf528SMauro Carvalho Chehab 			goto err;
29889a0bf528SMauro Carvalho Chehab 	}
29899a0bf528SMauro Carvalho Chehab 
29909a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver >= 0x20) {
29919a0bf528SMauro Carvalho Chehab 		if ((state->search_mode == STV090x_SEARCH_DVBS1)	||
29929a0bf528SMauro Carvalho Chehab 		    (state->search_mode == STV090x_SEARCH_DSS)		||
29939a0bf528SMauro Carvalho Chehab 		    (state->search_mode == STV090x_SEARCH_AUTO)) {
29949a0bf528SMauro Carvalho Chehab 
29959a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x0a) < 0)
29969a0bf528SMauro Carvalho Chehab 				goto err;
29979a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x00) < 0)
29989a0bf528SMauro Carvalho Chehab 				goto err;
29999a0bf528SMauro Carvalho Chehab 		}
30009a0bf528SMauro Carvalho Chehab 	}
30019a0bf528SMauro Carvalho Chehab 
30029a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
30039a0bf528SMauro Carvalho Chehab 		goto err;
30049a0bf528SMauro Carvalho Chehab 
30059a0bf528SMauro Carvalho Chehab 	/* AUTO tracking MODE */
30069a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x80) < 0)
30079a0bf528SMauro Carvalho Chehab 		goto err;
30089a0bf528SMauro Carvalho Chehab 	/* AUTO tracking MODE */
30099a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x80) < 0)
30109a0bf528SMauro Carvalho Chehab 		goto err;
30119a0bf528SMauro Carvalho Chehab 
30129a0bf528SMauro Carvalho Chehab 	if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1) ||
30139a0bf528SMauro Carvalho Chehab 	    (state->srate < 10000000)) {
30149a0bf528SMauro Carvalho Chehab 		/* update initial carrier freq with the found freq offset */
30159a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
30169a0bf528SMauro Carvalho Chehab 			goto err;
30179a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
30189a0bf528SMauro Carvalho Chehab 			goto err;
30199a0bf528SMauro Carvalho Chehab 		state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
30209a0bf528SMauro Carvalho Chehab 
30219a0bf528SMauro Carvalho Chehab 		if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1)) {
30229a0bf528SMauro Carvalho Chehab 
30239a0bf528SMauro Carvalho Chehab 			if (state->algo != STV090x_WARM_SEARCH) {
30249a0bf528SMauro Carvalho Chehab 
30259a0bf528SMauro Carvalho Chehab 				if (stv090x_i2c_gate_ctrl(state, 1) < 0)
30269a0bf528SMauro Carvalho Chehab 					goto err;
30279a0bf528SMauro Carvalho Chehab 
30289a0bf528SMauro Carvalho Chehab 				if (state->config->tuner_set_bandwidth) {
30299a0bf528SMauro Carvalho Chehab 					if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
30309a0bf528SMauro Carvalho Chehab 						goto err_gateoff;
30319a0bf528SMauro Carvalho Chehab 				}
30329a0bf528SMauro Carvalho Chehab 
30339a0bf528SMauro Carvalho Chehab 				if (stv090x_i2c_gate_ctrl(state, 0) < 0)
30349a0bf528SMauro Carvalho Chehab 					goto err;
30359a0bf528SMauro Carvalho Chehab 
30369a0bf528SMauro Carvalho Chehab 			}
30379a0bf528SMauro Carvalho Chehab 		}
30389a0bf528SMauro Carvalho Chehab 		if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000))
30399a0bf528SMauro Carvalho Chehab 			msleep(50); /* blind search: wait 50ms for SR stabilization */
30409a0bf528SMauro Carvalho Chehab 		else
30419a0bf528SMauro Carvalho Chehab 			msleep(5);
30429a0bf528SMauro Carvalho Chehab 
30439a0bf528SMauro Carvalho Chehab 		stv090x_get_lock_tmg(state);
30449a0bf528SMauro Carvalho Chehab 
30459a0bf528SMauro Carvalho Chehab 		if (!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) {
30469a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
30479a0bf528SMauro Carvalho Chehab 				goto err;
30489a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
30499a0bf528SMauro Carvalho Chehab 				goto err;
30509a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
30519a0bf528SMauro Carvalho Chehab 				goto err;
30529a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
30539a0bf528SMauro Carvalho Chehab 				goto err;
30549a0bf528SMauro Carvalho Chehab 
30559a0bf528SMauro Carvalho Chehab 			i = 0;
30569a0bf528SMauro Carvalho Chehab 
30579a0bf528SMauro Carvalho Chehab 			while ((!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) && (i <= 2)) {
30589a0bf528SMauro Carvalho Chehab 
30599a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
30609a0bf528SMauro Carvalho Chehab 					goto err;
30619a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
30629a0bf528SMauro Carvalho Chehab 					goto err;
30639a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
30649a0bf528SMauro Carvalho Chehab 					goto err;
30659a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
30669a0bf528SMauro Carvalho Chehab 					goto err;
30679a0bf528SMauro Carvalho Chehab 				i++;
30689a0bf528SMauro Carvalho Chehab 			}
30699a0bf528SMauro Carvalho Chehab 		}
30709a0bf528SMauro Carvalho Chehab 
30719a0bf528SMauro Carvalho Chehab 	}
30729a0bf528SMauro Carvalho Chehab 
30739a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver >= 0x20) {
30749a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
30759a0bf528SMauro Carvalho Chehab 			goto err;
30769a0bf528SMauro Carvalho Chehab 	}
30779a0bf528SMauro Carvalho Chehab 
30789a0bf528SMauro Carvalho Chehab 	if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS))
30799a0bf528SMauro Carvalho Chehab 		stv090x_set_vit_thtracq(state);
30809a0bf528SMauro Carvalho Chehab 
30819a0bf528SMauro Carvalho Chehab 	return 0;
30829a0bf528SMauro Carvalho Chehab 
30839a0bf528SMauro Carvalho Chehab err_gateoff:
30849a0bf528SMauro Carvalho Chehab 	stv090x_i2c_gate_ctrl(state, 0);
30859a0bf528SMauro Carvalho Chehab err:
30869a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
30879a0bf528SMauro Carvalho Chehab 	return -1;
30889a0bf528SMauro Carvalho Chehab }
30899a0bf528SMauro Carvalho Chehab 
30909a0bf528SMauro Carvalho Chehab static int stv090x_get_feclock(struct stv090x_state *state, s32 timeout)
30919a0bf528SMauro Carvalho Chehab {
30929a0bf528SMauro Carvalho Chehab 	s32 timer = 0, lock = 0, stat;
30939a0bf528SMauro Carvalho Chehab 	u32 reg;
30949a0bf528SMauro Carvalho Chehab 
30959a0bf528SMauro Carvalho Chehab 	while ((timer < timeout) && (!lock)) {
30969a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DMDSTATE);
30979a0bf528SMauro Carvalho Chehab 		stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
30989a0bf528SMauro Carvalho Chehab 
30999a0bf528SMauro Carvalho Chehab 		switch (stat) {
31009a0bf528SMauro Carvalho Chehab 		case 0: /* searching */
31019a0bf528SMauro Carvalho Chehab 		case 1: /* first PLH detected */
31029a0bf528SMauro Carvalho Chehab 		default:
31039a0bf528SMauro Carvalho Chehab 			lock = 0;
31049a0bf528SMauro Carvalho Chehab 			break;
31059a0bf528SMauro Carvalho Chehab 
31069a0bf528SMauro Carvalho Chehab 		case 2: /* DVB-S2 mode */
31079a0bf528SMauro Carvalho Chehab 			reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
31089a0bf528SMauro Carvalho Chehab 			lock = STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD);
31099a0bf528SMauro Carvalho Chehab 			break;
31109a0bf528SMauro Carvalho Chehab 
31119a0bf528SMauro Carvalho Chehab 		case 3: /* DVB-S1/legacy mode */
31129a0bf528SMauro Carvalho Chehab 			reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
31139a0bf528SMauro Carvalho Chehab 			lock = STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD);
31149a0bf528SMauro Carvalho Chehab 			break;
31159a0bf528SMauro Carvalho Chehab 		}
31169a0bf528SMauro Carvalho Chehab 		if (!lock) {
31179a0bf528SMauro Carvalho Chehab 			msleep(10);
31189a0bf528SMauro Carvalho Chehab 			timer += 10;
31199a0bf528SMauro Carvalho Chehab 		}
31209a0bf528SMauro Carvalho Chehab 	}
31219a0bf528SMauro Carvalho Chehab 	return lock;
31229a0bf528SMauro Carvalho Chehab }
31239a0bf528SMauro Carvalho Chehab 
31249a0bf528SMauro Carvalho Chehab static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 timeout_fec)
31259a0bf528SMauro Carvalho Chehab {
31269a0bf528SMauro Carvalho Chehab 	u32 reg;
31279a0bf528SMauro Carvalho Chehab 	s32 timer = 0;
31289a0bf528SMauro Carvalho Chehab 	int lock;
31299a0bf528SMauro Carvalho Chehab 
31309a0bf528SMauro Carvalho Chehab 	lock = stv090x_get_dmdlock(state, timeout_dmd);
31319a0bf528SMauro Carvalho Chehab 	if (lock)
31329a0bf528SMauro Carvalho Chehab 		lock = stv090x_get_feclock(state, timeout_fec);
31339a0bf528SMauro Carvalho Chehab 
31349a0bf528SMauro Carvalho Chehab 	if (lock) {
31359a0bf528SMauro Carvalho Chehab 		lock = 0;
31369a0bf528SMauro Carvalho Chehab 
31379a0bf528SMauro Carvalho Chehab 		while ((timer < timeout_fec) && (!lock)) {
31389a0bf528SMauro Carvalho Chehab 			reg = STV090x_READ_DEMOD(state, TSSTATUS);
31399a0bf528SMauro Carvalho Chehab 			lock = STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD);
31409a0bf528SMauro Carvalho Chehab 			msleep(1);
31419a0bf528SMauro Carvalho Chehab 			timer++;
31429a0bf528SMauro Carvalho Chehab 		}
31439a0bf528SMauro Carvalho Chehab 	}
31449a0bf528SMauro Carvalho Chehab 
31459a0bf528SMauro Carvalho Chehab 	return lock;
31469a0bf528SMauro Carvalho Chehab }
31479a0bf528SMauro Carvalho Chehab 
31489a0bf528SMauro Carvalho Chehab static int stv090x_set_s2rolloff(struct stv090x_state *state)
31499a0bf528SMauro Carvalho Chehab {
31509a0bf528SMauro Carvalho Chehab 	u32 reg;
31519a0bf528SMauro Carvalho Chehab 
31529a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver <= 0x20) {
31539a0bf528SMauro Carvalho Chehab 		/* rolloff to auto mode if DVBS2 */
31549a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DEMOD);
31559a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x00);
31569a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
31579a0bf528SMauro Carvalho Chehab 			goto err;
31589a0bf528SMauro Carvalho Chehab 	} else {
31599a0bf528SMauro Carvalho Chehab 		/* DVB-S2 rolloff to auto mode if DVBS2 */
31609a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DEMOD);
31619a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 0x00);
31629a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
31639a0bf528SMauro Carvalho Chehab 			goto err;
31649a0bf528SMauro Carvalho Chehab 	}
31659a0bf528SMauro Carvalho Chehab 	return 0;
31669a0bf528SMauro Carvalho Chehab err:
31679a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
31689a0bf528SMauro Carvalho Chehab 	return -1;
31699a0bf528SMauro Carvalho Chehab }
31709a0bf528SMauro Carvalho Chehab 
31719a0bf528SMauro Carvalho Chehab 
31729a0bf528SMauro Carvalho Chehab static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
31739a0bf528SMauro Carvalho Chehab {
31749a0bf528SMauro Carvalho Chehab 	struct dvb_frontend *fe = &state->frontend;
31759a0bf528SMauro Carvalho Chehab 	enum stv090x_signal_state signal_state = STV090x_NOCARRIER;
31769a0bf528SMauro Carvalho Chehab 	u32 reg;
31779a0bf528SMauro Carvalho Chehab 	s32 agc1_power, power_iq = 0, i;
31789a0bf528SMauro Carvalho Chehab 	int lock = 0, low_sr = 0;
31799a0bf528SMauro Carvalho Chehab 
31809a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, TSCFGH);
31819a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* Stop path 1 stream merger */
31829a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
31839a0bf528SMauro Carvalho Chehab 		goto err;
31849a0bf528SMauro Carvalho Chehab 
31859a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
31869a0bf528SMauro Carvalho Chehab 		goto err;
31879a0bf528SMauro Carvalho Chehab 
31889a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver >= 0x20) {
31899a0bf528SMauro Carvalho Chehab 		if (state->srate > 5000000) {
31909a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
31919a0bf528SMauro Carvalho Chehab 				goto err;
31929a0bf528SMauro Carvalho Chehab 		} else {
31939a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x82) < 0)
31949a0bf528SMauro Carvalho Chehab 				goto err;
31959a0bf528SMauro Carvalho Chehab 		}
31969a0bf528SMauro Carvalho Chehab 	}
31979a0bf528SMauro Carvalho Chehab 
31989a0bf528SMauro Carvalho Chehab 	stv090x_get_lock_tmg(state);
31999a0bf528SMauro Carvalho Chehab 
32009a0bf528SMauro Carvalho Chehab 	if (state->algo == STV090x_BLIND_SEARCH) {
32019a0bf528SMauro Carvalho Chehab 		state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */
32029a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0) /* wider srate scan */
32039a0bf528SMauro Carvalho Chehab 			goto err;
32049a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
32059a0bf528SMauro Carvalho Chehab 			goto err;
32069a0bf528SMauro Carvalho Chehab 		if (stv090x_set_srate(state, 1000000) < 0) /* initial srate = 1Msps */
32079a0bf528SMauro Carvalho Chehab 			goto err;
32089a0bf528SMauro Carvalho Chehab 	} else {
32099a0bf528SMauro Carvalho Chehab 		/* known srate */
32109a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
32119a0bf528SMauro Carvalho Chehab 			goto err;
32129a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
32139a0bf528SMauro Carvalho Chehab 			goto err;
32149a0bf528SMauro Carvalho Chehab 
32159a0bf528SMauro Carvalho Chehab 		if (state->srate < 2000000) {
32169a0bf528SMauro Carvalho Chehab 			/* SR < 2MSPS */
32179a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x63) < 0)
32189a0bf528SMauro Carvalho Chehab 				goto err;
32199a0bf528SMauro Carvalho Chehab 		} else {
32209a0bf528SMauro Carvalho Chehab 			/* SR >= 2Msps */
32219a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
32229a0bf528SMauro Carvalho Chehab 				goto err;
32239a0bf528SMauro Carvalho Chehab 		}
32249a0bf528SMauro Carvalho Chehab 
32259a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
32269a0bf528SMauro Carvalho Chehab 			goto err;
32279a0bf528SMauro Carvalho Chehab 
32289a0bf528SMauro Carvalho Chehab 		if (state->internal->dev_ver >= 0x20) {
32299a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
32309a0bf528SMauro Carvalho Chehab 				goto err;
32319a0bf528SMauro Carvalho Chehab 			if (state->algo == STV090x_COLD_SEARCH)
32329a0bf528SMauro Carvalho Chehab 				state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
32339a0bf528SMauro Carvalho Chehab 			else if (state->algo == STV090x_WARM_SEARCH)
32349a0bf528SMauro Carvalho Chehab 				state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000;
32359a0bf528SMauro Carvalho Chehab 		}
32369a0bf528SMauro Carvalho Chehab 
32379a0bf528SMauro Carvalho Chehab 		/* if cold start or warm  (Symbolrate is known)
32389a0bf528SMauro Carvalho Chehab 		 * use a Narrow symbol rate scan range
32399a0bf528SMauro Carvalho Chehab 		 */
32409a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0) /* narrow srate scan */
32419a0bf528SMauro Carvalho Chehab 			goto err;
32429a0bf528SMauro Carvalho Chehab 
32439a0bf528SMauro Carvalho Chehab 		if (stv090x_set_srate(state, state->srate) < 0)
32449a0bf528SMauro Carvalho Chehab 			goto err;
32459a0bf528SMauro Carvalho Chehab 
32469a0bf528SMauro Carvalho Chehab 		if (stv090x_set_max_srate(state, state->internal->mclk,
32479a0bf528SMauro Carvalho Chehab 					  state->srate) < 0)
32489a0bf528SMauro Carvalho Chehab 			goto err;
32499a0bf528SMauro Carvalho Chehab 		if (stv090x_set_min_srate(state, state->internal->mclk,
32509a0bf528SMauro Carvalho Chehab 					  state->srate) < 0)
32519a0bf528SMauro Carvalho Chehab 			goto err;
32529a0bf528SMauro Carvalho Chehab 
32539a0bf528SMauro Carvalho Chehab 		if (state->srate >= 10000000)
32549a0bf528SMauro Carvalho Chehab 			low_sr = 0;
32559a0bf528SMauro Carvalho Chehab 		else
32569a0bf528SMauro Carvalho Chehab 			low_sr = 1;
32579a0bf528SMauro Carvalho Chehab 	}
32589a0bf528SMauro Carvalho Chehab 
32599a0bf528SMauro Carvalho Chehab 	/* Setup tuner */
32609a0bf528SMauro Carvalho Chehab 	if (stv090x_i2c_gate_ctrl(state, 1) < 0)
32619a0bf528SMauro Carvalho Chehab 		goto err;
32629a0bf528SMauro Carvalho Chehab 
32639a0bf528SMauro Carvalho Chehab 	if (state->config->tuner_set_bbgain) {
32649a0bf528SMauro Carvalho Chehab 		reg = state->config->tuner_bbgain;
32659a0bf528SMauro Carvalho Chehab 		if (reg == 0)
32669a0bf528SMauro Carvalho Chehab 			reg = 10; /* default: 10dB */
32679a0bf528SMauro Carvalho Chehab 		if (state->config->tuner_set_bbgain(fe, reg) < 0)
32689a0bf528SMauro Carvalho Chehab 			goto err_gateoff;
32699a0bf528SMauro Carvalho Chehab 	}
32709a0bf528SMauro Carvalho Chehab 
32719a0bf528SMauro Carvalho Chehab 	if (state->config->tuner_set_frequency) {
32729a0bf528SMauro Carvalho Chehab 		if (state->config->tuner_set_frequency(fe, state->frequency) < 0)
32739a0bf528SMauro Carvalho Chehab 			goto err_gateoff;
32749a0bf528SMauro Carvalho Chehab 	}
32759a0bf528SMauro Carvalho Chehab 
32769a0bf528SMauro Carvalho Chehab 	if (state->config->tuner_set_bandwidth) {
32779a0bf528SMauro Carvalho Chehab 		if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
32789a0bf528SMauro Carvalho Chehab 			goto err_gateoff;
32799a0bf528SMauro Carvalho Chehab 	}
32809a0bf528SMauro Carvalho Chehab 
32819a0bf528SMauro Carvalho Chehab 	if (stv090x_i2c_gate_ctrl(state, 0) < 0)
32829a0bf528SMauro Carvalho Chehab 		goto err;
32839a0bf528SMauro Carvalho Chehab 
32849a0bf528SMauro Carvalho Chehab 	msleep(50);
32859a0bf528SMauro Carvalho Chehab 
32869a0bf528SMauro Carvalho Chehab 	if (state->config->tuner_get_status) {
32879a0bf528SMauro Carvalho Chehab 		if (stv090x_i2c_gate_ctrl(state, 1) < 0)
32889a0bf528SMauro Carvalho Chehab 			goto err;
32899a0bf528SMauro Carvalho Chehab 		if (state->config->tuner_get_status(fe, &reg) < 0)
32909a0bf528SMauro Carvalho Chehab 			goto err_gateoff;
32919a0bf528SMauro Carvalho Chehab 		if (stv090x_i2c_gate_ctrl(state, 0) < 0)
32929a0bf528SMauro Carvalho Chehab 			goto err;
32939a0bf528SMauro Carvalho Chehab 
32949a0bf528SMauro Carvalho Chehab 		if (reg)
32959a0bf528SMauro Carvalho Chehab 			dprintk(FE_DEBUG, 1, "Tuner phase locked");
32969a0bf528SMauro Carvalho Chehab 		else {
32979a0bf528SMauro Carvalho Chehab 			dprintk(FE_DEBUG, 1, "Tuner unlocked");
32989a0bf528SMauro Carvalho Chehab 			return STV090x_NOCARRIER;
32999a0bf528SMauro Carvalho Chehab 		}
33009a0bf528SMauro Carvalho Chehab 	}
33019a0bf528SMauro Carvalho Chehab 
33029a0bf528SMauro Carvalho Chehab 	msleep(10);
33039a0bf528SMauro Carvalho Chehab 	agc1_power = MAKEWORD16(STV090x_READ_DEMOD(state, AGCIQIN1),
33049a0bf528SMauro Carvalho Chehab 				STV090x_READ_DEMOD(state, AGCIQIN0));
33059a0bf528SMauro Carvalho Chehab 
33069a0bf528SMauro Carvalho Chehab 	if (agc1_power == 0) {
33079a0bf528SMauro Carvalho Chehab 		/* If AGC1 integrator value is 0
33089a0bf528SMauro Carvalho Chehab 		 * then read POWERI, POWERQ
33099a0bf528SMauro Carvalho Chehab 		 */
33109a0bf528SMauro Carvalho Chehab 		for (i = 0; i < 5; i++) {
33119a0bf528SMauro Carvalho Chehab 			power_iq += (STV090x_READ_DEMOD(state, POWERI) +
33129a0bf528SMauro Carvalho Chehab 				     STV090x_READ_DEMOD(state, POWERQ)) >> 1;
33139a0bf528SMauro Carvalho Chehab 		}
33149a0bf528SMauro Carvalho Chehab 		power_iq /= 5;
33159a0bf528SMauro Carvalho Chehab 	}
33169a0bf528SMauro Carvalho Chehab 
33179a0bf528SMauro Carvalho Chehab 	if ((agc1_power == 0) && (power_iq < STV090x_IQPOWER_THRESHOLD)) {
33189a0bf528SMauro Carvalho Chehab 		dprintk(FE_ERROR, 1, "No Signal: POWER_IQ=0x%02x", power_iq);
33199a0bf528SMauro Carvalho Chehab 		lock = 0;
33209a0bf528SMauro Carvalho Chehab 		signal_state = STV090x_NOAGC1;
33219a0bf528SMauro Carvalho Chehab 	} else {
33229a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DEMOD);
33239a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
33249a0bf528SMauro Carvalho Chehab 
33259a0bf528SMauro Carvalho Chehab 		if (state->internal->dev_ver <= 0x20) {
33269a0bf528SMauro Carvalho Chehab 			/* rolloff to auto mode if DVBS2 */
33279a0bf528SMauro Carvalho Chehab 			STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 1);
33289a0bf528SMauro Carvalho Chehab 		} else {
33299a0bf528SMauro Carvalho Chehab 			/* DVB-S2 rolloff to auto mode if DVBS2 */
33309a0bf528SMauro Carvalho Chehab 			STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 1);
33319a0bf528SMauro Carvalho Chehab 		}
33329a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
33339a0bf528SMauro Carvalho Chehab 			goto err;
33349a0bf528SMauro Carvalho Chehab 
33359a0bf528SMauro Carvalho Chehab 		if (stv090x_delivery_search(state) < 0)
33369a0bf528SMauro Carvalho Chehab 			goto err;
33379a0bf528SMauro Carvalho Chehab 
33389a0bf528SMauro Carvalho Chehab 		if (state->algo != STV090x_BLIND_SEARCH) {
33399a0bf528SMauro Carvalho Chehab 			if (stv090x_start_search(state) < 0)
33409a0bf528SMauro Carvalho Chehab 				goto err;
33419a0bf528SMauro Carvalho Chehab 		}
33429a0bf528SMauro Carvalho Chehab 	}
33439a0bf528SMauro Carvalho Chehab 
33449a0bf528SMauro Carvalho Chehab 	if (signal_state == STV090x_NOAGC1)
33459a0bf528SMauro Carvalho Chehab 		return signal_state;
33469a0bf528SMauro Carvalho Chehab 
33479a0bf528SMauro Carvalho Chehab 	if (state->algo == STV090x_BLIND_SEARCH)
33489a0bf528SMauro Carvalho Chehab 		lock = stv090x_blind_search(state);
33499a0bf528SMauro Carvalho Chehab 
33509a0bf528SMauro Carvalho Chehab 	else if (state->algo == STV090x_COLD_SEARCH)
33519a0bf528SMauro Carvalho Chehab 		lock = stv090x_get_coldlock(state, state->DemodTimeout);
33529a0bf528SMauro Carvalho Chehab 
33539a0bf528SMauro Carvalho Chehab 	else if (state->algo == STV090x_WARM_SEARCH)
33549a0bf528SMauro Carvalho Chehab 		lock = stv090x_get_dmdlock(state, state->DemodTimeout);
33559a0bf528SMauro Carvalho Chehab 
33569a0bf528SMauro Carvalho Chehab 	if ((!lock) && (state->algo == STV090x_COLD_SEARCH)) {
33579a0bf528SMauro Carvalho Chehab 		if (!low_sr) {
33589a0bf528SMauro Carvalho Chehab 			if (stv090x_chk_tmg(state))
33599a0bf528SMauro Carvalho Chehab 				lock = stv090x_sw_algo(state);
33609a0bf528SMauro Carvalho Chehab 		}
33619a0bf528SMauro Carvalho Chehab 	}
33629a0bf528SMauro Carvalho Chehab 
33639a0bf528SMauro Carvalho Chehab 	if (lock)
33649a0bf528SMauro Carvalho Chehab 		signal_state = stv090x_get_sig_params(state);
33659a0bf528SMauro Carvalho Chehab 
33669a0bf528SMauro Carvalho Chehab 	if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
33679a0bf528SMauro Carvalho Chehab 		stv090x_optimize_track(state);
33689a0bf528SMauro Carvalho Chehab 
33699a0bf528SMauro Carvalho Chehab 		if (state->internal->dev_ver >= 0x20) {
33709a0bf528SMauro Carvalho Chehab 			/* >= Cut 2.0 :release TS reset after
33719a0bf528SMauro Carvalho Chehab 			 * demod lock and optimized Tracking
33729a0bf528SMauro Carvalho Chehab 			 */
33739a0bf528SMauro Carvalho Chehab 			reg = STV090x_READ_DEMOD(state, TSCFGH);
33749a0bf528SMauro Carvalho Chehab 			STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
33759a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
33769a0bf528SMauro Carvalho Chehab 				goto err;
33779a0bf528SMauro Carvalho Chehab 
33789a0bf528SMauro Carvalho Chehab 			msleep(3);
33799a0bf528SMauro Carvalho Chehab 
33809a0bf528SMauro Carvalho Chehab 			STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
33819a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
33829a0bf528SMauro Carvalho Chehab 				goto err;
33839a0bf528SMauro Carvalho Chehab 
33849a0bf528SMauro Carvalho Chehab 			STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
33859a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
33869a0bf528SMauro Carvalho Chehab 				goto err;
33879a0bf528SMauro Carvalho Chehab 		}
33889a0bf528SMauro Carvalho Chehab 
33899a0bf528SMauro Carvalho Chehab 		lock = stv090x_get_lock(state, state->FecTimeout,
33909a0bf528SMauro Carvalho Chehab 				state->FecTimeout);
33919a0bf528SMauro Carvalho Chehab 		if (lock) {
33929a0bf528SMauro Carvalho Chehab 			if (state->delsys == STV090x_DVBS2) {
33939a0bf528SMauro Carvalho Chehab 				stv090x_set_s2rolloff(state);
33949a0bf528SMauro Carvalho Chehab 
33959a0bf528SMauro Carvalho Chehab 				reg = STV090x_READ_DEMOD(state, PDELCTRL2);
33969a0bf528SMauro Carvalho Chehab 				STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 1);
33979a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
33989a0bf528SMauro Carvalho Chehab 					goto err;
33999a0bf528SMauro Carvalho Chehab 				/* Reset DVBS2 packet delinator error counter */
34009a0bf528SMauro Carvalho Chehab 				reg = STV090x_READ_DEMOD(state, PDELCTRL2);
34019a0bf528SMauro Carvalho Chehab 				STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 0);
34029a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
34039a0bf528SMauro Carvalho Chehab 					goto err;
34049a0bf528SMauro Carvalho Chehab 
34059a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */
34069a0bf528SMauro Carvalho Chehab 					goto err;
34079a0bf528SMauro Carvalho Chehab 			} else {
34089a0bf528SMauro Carvalho Chehab 				if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
34099a0bf528SMauro Carvalho Chehab 					goto err;
34109a0bf528SMauro Carvalho Chehab 			}
34119a0bf528SMauro Carvalho Chehab 			/* Reset the Total packet counter */
34129a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0)
34139a0bf528SMauro Carvalho Chehab 				goto err;
34149a0bf528SMauro Carvalho Chehab 			/* Reset the packet Error counter2 */
34159a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
34169a0bf528SMauro Carvalho Chehab 				goto err;
34179a0bf528SMauro Carvalho Chehab 		} else {
34189a0bf528SMauro Carvalho Chehab 			signal_state = STV090x_NODATA;
34199a0bf528SMauro Carvalho Chehab 			stv090x_chk_signal(state);
34209a0bf528SMauro Carvalho Chehab 		}
34219a0bf528SMauro Carvalho Chehab 	}
34229a0bf528SMauro Carvalho Chehab 	return signal_state;
34239a0bf528SMauro Carvalho Chehab 
34249a0bf528SMauro Carvalho Chehab err_gateoff:
34259a0bf528SMauro Carvalho Chehab 	stv090x_i2c_gate_ctrl(state, 0);
34269a0bf528SMauro Carvalho Chehab err:
34279a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
34289a0bf528SMauro Carvalho Chehab 	return -1;
34299a0bf528SMauro Carvalho Chehab }
34309a0bf528SMauro Carvalho Chehab 
3431f9040ef3SEvgeny Plehov static int stv090x_set_mis(struct stv090x_state *state, int mis)
3432f9040ef3SEvgeny Plehov {
3433f9040ef3SEvgeny Plehov 	u32 reg;
3434f9040ef3SEvgeny Plehov 
3435f9040ef3SEvgeny Plehov 	if (mis < 0 || mis > 255) {
3436f9040ef3SEvgeny Plehov 		dprintk(FE_DEBUG, 1, "Disable MIS filtering");
3437f9040ef3SEvgeny Plehov 		reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3438f9040ef3SEvgeny Plehov 		STV090x_SETFIELD_Px(reg, FILTER_EN_FIELD, 0x00);
3439f9040ef3SEvgeny Plehov 		if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3440f9040ef3SEvgeny Plehov 			goto err;
3441f9040ef3SEvgeny Plehov 	} else {
3442f9040ef3SEvgeny Plehov 		dprintk(FE_DEBUG, 1, "Enable MIS filtering - %d", mis);
3443f9040ef3SEvgeny Plehov 		reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3444f9040ef3SEvgeny Plehov 		STV090x_SETFIELD_Px(reg, FILTER_EN_FIELD, 0x01);
3445f9040ef3SEvgeny Plehov 		if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3446f9040ef3SEvgeny Plehov 			goto err;
3447f9040ef3SEvgeny Plehov 		if (STV090x_WRITE_DEMOD(state, ISIENTRY, mis) < 0)
3448f9040ef3SEvgeny Plehov 			goto err;
3449f9040ef3SEvgeny Plehov 		if (STV090x_WRITE_DEMOD(state, ISIBITENA, 0xff) < 0)
3450f9040ef3SEvgeny Plehov 			goto err;
3451f9040ef3SEvgeny Plehov 	}
3452f9040ef3SEvgeny Plehov 	return 0;
3453f9040ef3SEvgeny Plehov err:
3454f9040ef3SEvgeny Plehov 	dprintk(FE_ERROR, 1, "I/O error");
3455f9040ef3SEvgeny Plehov 	return -1;
3456f9040ef3SEvgeny Plehov }
3457f9040ef3SEvgeny Plehov 
34589a0bf528SMauro Carvalho Chehab static enum dvbfe_search stv090x_search(struct dvb_frontend *fe)
34599a0bf528SMauro Carvalho Chehab {
34609a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
34619a0bf528SMauro Carvalho Chehab 	struct dtv_frontend_properties *props = &fe->dtv_property_cache;
34629a0bf528SMauro Carvalho Chehab 
34639a0bf528SMauro Carvalho Chehab 	if (props->frequency == 0)
34649a0bf528SMauro Carvalho Chehab 		return DVBFE_ALGO_SEARCH_INVALID;
34659a0bf528SMauro Carvalho Chehab 
34661011d24aSMauro Carvalho Chehab 	switch (props->delivery_system) {
34671011d24aSMauro Carvalho Chehab 	case SYS_DSS:
34681011d24aSMauro Carvalho Chehab 		state->delsys = STV090x_DSS;
34691011d24aSMauro Carvalho Chehab 		break;
34701011d24aSMauro Carvalho Chehab 	case SYS_DVBS:
34711011d24aSMauro Carvalho Chehab 		state->delsys = STV090x_DVBS1;
34721011d24aSMauro Carvalho Chehab 		break;
34731011d24aSMauro Carvalho Chehab 	case SYS_DVBS2:
34741011d24aSMauro Carvalho Chehab 		state->delsys = STV090x_DVBS2;
34751011d24aSMauro Carvalho Chehab 		break;
34761011d24aSMauro Carvalho Chehab 	default:
34771011d24aSMauro Carvalho Chehab 		return DVBFE_ALGO_SEARCH_INVALID;
34781011d24aSMauro Carvalho Chehab 	}
34791011d24aSMauro Carvalho Chehab 
34809a0bf528SMauro Carvalho Chehab 	state->frequency = props->frequency;
34819a0bf528SMauro Carvalho Chehab 	state->srate = props->symbol_rate;
34829a0bf528SMauro Carvalho Chehab 	state->search_mode = STV090x_SEARCH_AUTO;
34839a0bf528SMauro Carvalho Chehab 	state->algo = STV090x_COLD_SEARCH;
34849a0bf528SMauro Carvalho Chehab 	state->fec = STV090x_PRERR;
34859a0bf528SMauro Carvalho Chehab 	if (state->srate > 10000000) {
34869a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Search range: 10 MHz");
34879a0bf528SMauro Carvalho Chehab 		state->search_range = 10000000;
34889a0bf528SMauro Carvalho Chehab 	} else {
34899a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Search range: 5 MHz");
34909a0bf528SMauro Carvalho Chehab 		state->search_range = 5000000;
34919a0bf528SMauro Carvalho Chehab 	}
34929a0bf528SMauro Carvalho Chehab 
3493f9040ef3SEvgeny Plehov 	stv090x_set_mis(state, props->stream_id);
3494f9040ef3SEvgeny Plehov 
34959a0bf528SMauro Carvalho Chehab 	if (stv090x_algo(state) == STV090x_RANGEOK) {
34969a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Search success!");
34979a0bf528SMauro Carvalho Chehab 		return DVBFE_ALGO_SEARCH_SUCCESS;
34989a0bf528SMauro Carvalho Chehab 	} else {
34999a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Search failed!");
35009a0bf528SMauro Carvalho Chehab 		return DVBFE_ALGO_SEARCH_FAILED;
35019a0bf528SMauro Carvalho Chehab 	}
35029a0bf528SMauro Carvalho Chehab 
35039a0bf528SMauro Carvalho Chehab 	return DVBFE_ALGO_SEARCH_ERROR;
35049a0bf528SMauro Carvalho Chehab }
35059a0bf528SMauro Carvalho Chehab 
35069a0bf528SMauro Carvalho Chehab static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
35079a0bf528SMauro Carvalho Chehab {
35089a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
35099a0bf528SMauro Carvalho Chehab 	u32 reg, dstatus;
35109a0bf528SMauro Carvalho Chehab 	u8 search_state;
35119a0bf528SMauro Carvalho Chehab 
35129a0bf528SMauro Carvalho Chehab 	*status = 0;
35139a0bf528SMauro Carvalho Chehab 
35149a0bf528SMauro Carvalho Chehab 	dstatus = STV090x_READ_DEMOD(state, DSTATUS);
35159a0bf528SMauro Carvalho Chehab 	if (STV090x_GETFIELD_Px(dstatus, CAR_LOCK_FIELD))
35169a0bf528SMauro Carvalho Chehab 		*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
35179a0bf528SMauro Carvalho Chehab 
35189a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DMDSTATE);
35199a0bf528SMauro Carvalho Chehab 	search_state = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
35209a0bf528SMauro Carvalho Chehab 
35219a0bf528SMauro Carvalho Chehab 	switch (search_state) {
35229a0bf528SMauro Carvalho Chehab 	case 0: /* searching */
35239a0bf528SMauro Carvalho Chehab 	case 1: /* first PLH detected */
35249a0bf528SMauro Carvalho Chehab 	default:
35259a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Status: Unlocked (Searching ..)");
35269a0bf528SMauro Carvalho Chehab 		break;
35279a0bf528SMauro Carvalho Chehab 
35289a0bf528SMauro Carvalho Chehab 	case 2: /* DVB-S2 mode */
35299a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Delivery system: DVB-S2");
35309a0bf528SMauro Carvalho Chehab 		if (STV090x_GETFIELD_Px(dstatus, LOCK_DEFINITIF_FIELD)) {
35319a0bf528SMauro Carvalho Chehab 			reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
35329a0bf528SMauro Carvalho Chehab 			if (STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD)) {
35339a0bf528SMauro Carvalho Chehab 				*status |= FE_HAS_VITERBI;
35349a0bf528SMauro Carvalho Chehab 				reg = STV090x_READ_DEMOD(state, TSSTATUS);
35359a0bf528SMauro Carvalho Chehab 				if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD))
35369a0bf528SMauro Carvalho Chehab 					*status |= FE_HAS_SYNC | FE_HAS_LOCK;
35379a0bf528SMauro Carvalho Chehab 			}
35389a0bf528SMauro Carvalho Chehab 		}
35399a0bf528SMauro Carvalho Chehab 		break;
35409a0bf528SMauro Carvalho Chehab 
35419a0bf528SMauro Carvalho Chehab 	case 3: /* DVB-S1/legacy mode */
35429a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Delivery system: DVB-S");
35439a0bf528SMauro Carvalho Chehab 		if (STV090x_GETFIELD_Px(dstatus, LOCK_DEFINITIF_FIELD)) {
35449a0bf528SMauro Carvalho Chehab 			reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
35459a0bf528SMauro Carvalho Chehab 			if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
35469a0bf528SMauro Carvalho Chehab 				*status |= FE_HAS_VITERBI;
35479a0bf528SMauro Carvalho Chehab 				reg = STV090x_READ_DEMOD(state, TSSTATUS);
35489a0bf528SMauro Carvalho Chehab 				if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD))
35499a0bf528SMauro Carvalho Chehab 					*status |= FE_HAS_SYNC | FE_HAS_LOCK;
35509a0bf528SMauro Carvalho Chehab 			}
35519a0bf528SMauro Carvalho Chehab 		}
35529a0bf528SMauro Carvalho Chehab 		break;
35539a0bf528SMauro Carvalho Chehab 	}
35549a0bf528SMauro Carvalho Chehab 
35559a0bf528SMauro Carvalho Chehab 	return 0;
35569a0bf528SMauro Carvalho Chehab }
35579a0bf528SMauro Carvalho Chehab 
35589a0bf528SMauro Carvalho Chehab static int stv090x_read_per(struct dvb_frontend *fe, u32 *per)
35599a0bf528SMauro Carvalho Chehab {
35609a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
35619a0bf528SMauro Carvalho Chehab 
35629a0bf528SMauro Carvalho Chehab 	s32 count_4, count_3, count_2, count_1, count_0, count;
35639a0bf528SMauro Carvalho Chehab 	u32 reg, h, m, l;
35649a0bf528SMauro Carvalho Chehab 	enum fe_status status;
35659a0bf528SMauro Carvalho Chehab 
35669a0bf528SMauro Carvalho Chehab 	stv090x_read_status(fe, &status);
35679a0bf528SMauro Carvalho Chehab 	if (!(status & FE_HAS_LOCK)) {
35689a0bf528SMauro Carvalho Chehab 		*per = 1 << 23; /* Max PER */
35699a0bf528SMauro Carvalho Chehab 	} else {
35709a0bf528SMauro Carvalho Chehab 		/* Counter 2 */
35719a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, ERRCNT22);
35729a0bf528SMauro Carvalho Chehab 		h = STV090x_GETFIELD_Px(reg, ERR_CNT2_FIELD);
35739a0bf528SMauro Carvalho Chehab 
35749a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, ERRCNT21);
35759a0bf528SMauro Carvalho Chehab 		m = STV090x_GETFIELD_Px(reg, ERR_CNT21_FIELD);
35769a0bf528SMauro Carvalho Chehab 
35779a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, ERRCNT20);
35789a0bf528SMauro Carvalho Chehab 		l = STV090x_GETFIELD_Px(reg, ERR_CNT20_FIELD);
35799a0bf528SMauro Carvalho Chehab 
35809a0bf528SMauro Carvalho Chehab 		*per = ((h << 16) | (m << 8) | l);
35819a0bf528SMauro Carvalho Chehab 
35829a0bf528SMauro Carvalho Chehab 		count_4 = STV090x_READ_DEMOD(state, FBERCPT4);
35839a0bf528SMauro Carvalho Chehab 		count_3 = STV090x_READ_DEMOD(state, FBERCPT3);
35849a0bf528SMauro Carvalho Chehab 		count_2 = STV090x_READ_DEMOD(state, FBERCPT2);
35859a0bf528SMauro Carvalho Chehab 		count_1 = STV090x_READ_DEMOD(state, FBERCPT1);
35869a0bf528SMauro Carvalho Chehab 		count_0 = STV090x_READ_DEMOD(state, FBERCPT0);
35879a0bf528SMauro Carvalho Chehab 
35889a0bf528SMauro Carvalho Chehab 		if ((!count_4) && (!count_3)) {
35899a0bf528SMauro Carvalho Chehab 			count  = (count_2 & 0xff) << 16;
35909a0bf528SMauro Carvalho Chehab 			count |= (count_1 & 0xff) <<  8;
35919a0bf528SMauro Carvalho Chehab 			count |=  count_0 & 0xff;
35929a0bf528SMauro Carvalho Chehab 		} else {
35939a0bf528SMauro Carvalho Chehab 			count = 1 << 24;
35949a0bf528SMauro Carvalho Chehab 		}
35959a0bf528SMauro Carvalho Chehab 		if (count == 0)
35969a0bf528SMauro Carvalho Chehab 			*per = 1;
35979a0bf528SMauro Carvalho Chehab 	}
35989a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0) < 0)
35999a0bf528SMauro Carvalho Chehab 		goto err;
36009a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
36019a0bf528SMauro Carvalho Chehab 		goto err;
36029a0bf528SMauro Carvalho Chehab 
36039a0bf528SMauro Carvalho Chehab 	return 0;
36049a0bf528SMauro Carvalho Chehab err:
36059a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
36069a0bf528SMauro Carvalho Chehab 	return -1;
36079a0bf528SMauro Carvalho Chehab }
36089a0bf528SMauro Carvalho Chehab 
36099a0bf528SMauro Carvalho Chehab static int stv090x_table_lookup(const struct stv090x_tab *tab, int max, int val)
36109a0bf528SMauro Carvalho Chehab {
36119a0bf528SMauro Carvalho Chehab 	int res = 0;
36129a0bf528SMauro Carvalho Chehab 	int min = 0, med;
36139a0bf528SMauro Carvalho Chehab 
36149a0bf528SMauro Carvalho Chehab 	if ((val >= tab[min].read && val < tab[max].read) ||
36159a0bf528SMauro Carvalho Chehab 	    (val >= tab[max].read && val < tab[min].read)) {
36169a0bf528SMauro Carvalho Chehab 		while ((max - min) > 1) {
36179a0bf528SMauro Carvalho Chehab 			med = (max + min) / 2;
36189a0bf528SMauro Carvalho Chehab 			if ((val >= tab[min].read && val < tab[med].read) ||
36199a0bf528SMauro Carvalho Chehab 			    (val >= tab[med].read && val < tab[min].read))
36209a0bf528SMauro Carvalho Chehab 				max = med;
36219a0bf528SMauro Carvalho Chehab 			else
36229a0bf528SMauro Carvalho Chehab 				min = med;
36239a0bf528SMauro Carvalho Chehab 		}
36249a0bf528SMauro Carvalho Chehab 		res = ((val - tab[min].read) *
36259a0bf528SMauro Carvalho Chehab 		       (tab[max].real - tab[min].real) /
36269a0bf528SMauro Carvalho Chehab 		       (tab[max].read - tab[min].read)) +
36279a0bf528SMauro Carvalho Chehab 			tab[min].real;
36289a0bf528SMauro Carvalho Chehab 	} else {
36299a0bf528SMauro Carvalho Chehab 		if (tab[min].read < tab[max].read) {
36309a0bf528SMauro Carvalho Chehab 			if (val < tab[min].read)
36319a0bf528SMauro Carvalho Chehab 				res = tab[min].real;
36329a0bf528SMauro Carvalho Chehab 			else if (val >= tab[max].read)
36339a0bf528SMauro Carvalho Chehab 				res = tab[max].real;
36349a0bf528SMauro Carvalho Chehab 		} else {
36359a0bf528SMauro Carvalho Chehab 			if (val >= tab[min].read)
36369a0bf528SMauro Carvalho Chehab 				res = tab[min].real;
36379a0bf528SMauro Carvalho Chehab 			else if (val < tab[max].read)
36389a0bf528SMauro Carvalho Chehab 				res = tab[max].real;
36399a0bf528SMauro Carvalho Chehab 		}
36409a0bf528SMauro Carvalho Chehab 	}
36419a0bf528SMauro Carvalho Chehab 
36429a0bf528SMauro Carvalho Chehab 	return res;
36439a0bf528SMauro Carvalho Chehab }
36449a0bf528SMauro Carvalho Chehab 
36459a0bf528SMauro Carvalho Chehab static int stv090x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
36469a0bf528SMauro Carvalho Chehab {
36479a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
36489a0bf528SMauro Carvalho Chehab 	u32 reg;
36499a0bf528SMauro Carvalho Chehab 	s32 agc_0, agc_1, agc;
36509a0bf528SMauro Carvalho Chehab 	s32 str;
36519a0bf528SMauro Carvalho Chehab 
36529a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, AGCIQIN1);
36539a0bf528SMauro Carvalho Chehab 	agc_1 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
36549a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, AGCIQIN0);
36559a0bf528SMauro Carvalho Chehab 	agc_0 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
36569a0bf528SMauro Carvalho Chehab 	agc = MAKEWORD16(agc_1, agc_0);
36579a0bf528SMauro Carvalho Chehab 
36589a0bf528SMauro Carvalho Chehab 	str = stv090x_table_lookup(stv090x_rf_tab,
36599a0bf528SMauro Carvalho Chehab 		ARRAY_SIZE(stv090x_rf_tab) - 1, agc);
36609a0bf528SMauro Carvalho Chehab 	if (agc > stv090x_rf_tab[0].read)
36619a0bf528SMauro Carvalho Chehab 		str = 0;
36629a0bf528SMauro Carvalho Chehab 	else if (agc < stv090x_rf_tab[ARRAY_SIZE(stv090x_rf_tab) - 1].read)
36639a0bf528SMauro Carvalho Chehab 		str = -100;
36649a0bf528SMauro Carvalho Chehab 	*strength = (str + 100) * 0xFFFF / 100;
36659a0bf528SMauro Carvalho Chehab 
36669a0bf528SMauro Carvalho Chehab 	return 0;
36679a0bf528SMauro Carvalho Chehab }
36689a0bf528SMauro Carvalho Chehab 
36699a0bf528SMauro Carvalho Chehab static int stv090x_read_cnr(struct dvb_frontend *fe, u16 *cnr)
36709a0bf528SMauro Carvalho Chehab {
36719a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
36729a0bf528SMauro Carvalho Chehab 	u32 reg_0, reg_1, reg, i;
36739a0bf528SMauro Carvalho Chehab 	s32 val_0, val_1, val = 0;
36749a0bf528SMauro Carvalho Chehab 	u8 lock_f;
36759a0bf528SMauro Carvalho Chehab 	s32 div;
36769a0bf528SMauro Carvalho Chehab 	u32 last;
36779a0bf528SMauro Carvalho Chehab 
36789a0bf528SMauro Carvalho Chehab 	switch (state->delsys) {
36799a0bf528SMauro Carvalho Chehab 	case STV090x_DVBS2:
36809a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DSTATUS);
36819a0bf528SMauro Carvalho Chehab 		lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
36829a0bf528SMauro Carvalho Chehab 		if (lock_f) {
36839a0bf528SMauro Carvalho Chehab 			msleep(5);
36849a0bf528SMauro Carvalho Chehab 			for (i = 0; i < 16; i++) {
36859a0bf528SMauro Carvalho Chehab 				reg_1 = STV090x_READ_DEMOD(state, NNOSPLHT1);
36869a0bf528SMauro Carvalho Chehab 				val_1 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
36879a0bf528SMauro Carvalho Chehab 				reg_0 = STV090x_READ_DEMOD(state, NNOSPLHT0);
36889a0bf528SMauro Carvalho Chehab 				val_0 = STV090x_GETFIELD_Px(reg_0, NOSPLHT_NORMED_FIELD);
36899a0bf528SMauro Carvalho Chehab 				val  += MAKEWORD16(val_1, val_0);
36909a0bf528SMauro Carvalho Chehab 				msleep(1);
36919a0bf528SMauro Carvalho Chehab 			}
36929a0bf528SMauro Carvalho Chehab 			val /= 16;
36939a0bf528SMauro Carvalho Chehab 			last = ARRAY_SIZE(stv090x_s2cn_tab) - 1;
369438670189SJoerg Riechardt 			div = stv090x_s2cn_tab[last].real -
369538670189SJoerg Riechardt 			      stv090x_s2cn_tab[3].real;
369638670189SJoerg Riechardt 			val = stv090x_table_lookup(stv090x_s2cn_tab, last, val);
369738670189SJoerg Riechardt 			if (val < 0)
369838670189SJoerg Riechardt 				val = 0;
369938670189SJoerg Riechardt 			*cnr = val * 0xFFFF / div;
37009a0bf528SMauro Carvalho Chehab 		}
37019a0bf528SMauro Carvalho Chehab 		break;
37029a0bf528SMauro Carvalho Chehab 
37039a0bf528SMauro Carvalho Chehab 	case STV090x_DVBS1:
37049a0bf528SMauro Carvalho Chehab 	case STV090x_DSS:
37059a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DSTATUS);
37069a0bf528SMauro Carvalho Chehab 		lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
37079a0bf528SMauro Carvalho Chehab 		if (lock_f) {
37089a0bf528SMauro Carvalho Chehab 			msleep(5);
37099a0bf528SMauro Carvalho Chehab 			for (i = 0; i < 16; i++) {
37109a0bf528SMauro Carvalho Chehab 				reg_1 = STV090x_READ_DEMOD(state, NOSDATAT1);
37119a0bf528SMauro Carvalho Chehab 				val_1 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
37129a0bf528SMauro Carvalho Chehab 				reg_0 = STV090x_READ_DEMOD(state, NOSDATAT0);
37139a0bf528SMauro Carvalho Chehab 				val_0 = STV090x_GETFIELD_Px(reg_0, NOSDATAT_UNNORMED_FIELD);
37149a0bf528SMauro Carvalho Chehab 				val  += MAKEWORD16(val_1, val_0);
37159a0bf528SMauro Carvalho Chehab 				msleep(1);
37169a0bf528SMauro Carvalho Chehab 			}
37179a0bf528SMauro Carvalho Chehab 			val /= 16;
37189a0bf528SMauro Carvalho Chehab 			last = ARRAY_SIZE(stv090x_s1cn_tab) - 1;
371938670189SJoerg Riechardt 			div = stv090x_s1cn_tab[last].real -
372038670189SJoerg Riechardt 			      stv090x_s1cn_tab[0].real;
372138670189SJoerg Riechardt 			val = stv090x_table_lookup(stv090x_s1cn_tab, last, val);
372238670189SJoerg Riechardt 			*cnr = val * 0xFFFF / div;
37239a0bf528SMauro Carvalho Chehab 		}
37249a0bf528SMauro Carvalho Chehab 		break;
37259a0bf528SMauro Carvalho Chehab 	default:
37269a0bf528SMauro Carvalho Chehab 		break;
37279a0bf528SMauro Carvalho Chehab 	}
37289a0bf528SMauro Carvalho Chehab 
37299a0bf528SMauro Carvalho Chehab 	return 0;
37309a0bf528SMauro Carvalho Chehab }
37319a0bf528SMauro Carvalho Chehab 
37320df289a2SMauro Carvalho Chehab static int stv090x_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
37339a0bf528SMauro Carvalho Chehab {
37349a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
37359a0bf528SMauro Carvalho Chehab 	u32 reg;
37369a0bf528SMauro Carvalho Chehab 
37379a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DISTXCTL);
37389a0bf528SMauro Carvalho Chehab 	switch (tone) {
37399a0bf528SMauro Carvalho Chehab 	case SEC_TONE_ON:
37409a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
37419a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
37429a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
37439a0bf528SMauro Carvalho Chehab 			goto err;
37449a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
37459a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
37469a0bf528SMauro Carvalho Chehab 			goto err;
37479a0bf528SMauro Carvalho Chehab 		break;
37489a0bf528SMauro Carvalho Chehab 
37499a0bf528SMauro Carvalho Chehab 	case SEC_TONE_OFF:
37509a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
37519a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
37529a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
37539a0bf528SMauro Carvalho Chehab 			goto err;
37549a0bf528SMauro Carvalho Chehab 		break;
37559a0bf528SMauro Carvalho Chehab 	default:
37569a0bf528SMauro Carvalho Chehab 		return -EINVAL;
37579a0bf528SMauro Carvalho Chehab 	}
37589a0bf528SMauro Carvalho Chehab 
37599a0bf528SMauro Carvalho Chehab 	return 0;
37609a0bf528SMauro Carvalho Chehab err:
37619a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
37629a0bf528SMauro Carvalho Chehab 	return -1;
37639a0bf528SMauro Carvalho Chehab }
37649a0bf528SMauro Carvalho Chehab 
37659a0bf528SMauro Carvalho Chehab 
37669a0bf528SMauro Carvalho Chehab static enum dvbfe_algo stv090x_frontend_algo(struct dvb_frontend *fe)
37679a0bf528SMauro Carvalho Chehab {
37689a0bf528SMauro Carvalho Chehab 	return DVBFE_ALGO_CUSTOM;
37699a0bf528SMauro Carvalho Chehab }
37709a0bf528SMauro Carvalho Chehab 
37719a0bf528SMauro Carvalho Chehab static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
37729a0bf528SMauro Carvalho Chehab {
37739a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
37749a0bf528SMauro Carvalho Chehab 	u32 reg, idle = 0, fifo_full = 1;
37759a0bf528SMauro Carvalho Chehab 	int i;
37769a0bf528SMauro Carvalho Chehab 
37779a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DISTXCTL);
37789a0bf528SMauro Carvalho Chehab 
37799a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD,
37809a0bf528SMauro Carvalho Chehab 		(state->config->diseqc_envelope_mode) ? 4 : 2);
37819a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
37829a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
37839a0bf528SMauro Carvalho Chehab 		goto err;
37849a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
37859a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
37869a0bf528SMauro Carvalho Chehab 		goto err;
37879a0bf528SMauro Carvalho Chehab 
37889a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
37899a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
37909a0bf528SMauro Carvalho Chehab 		goto err;
37919a0bf528SMauro Carvalho Chehab 
37929a0bf528SMauro Carvalho Chehab 	for (i = 0; i < cmd->msg_len; i++) {
37939a0bf528SMauro Carvalho Chehab 
37949a0bf528SMauro Carvalho Chehab 		while (fifo_full) {
37959a0bf528SMauro Carvalho Chehab 			reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
37969a0bf528SMauro Carvalho Chehab 			fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
37979a0bf528SMauro Carvalho Chehab 		}
37989a0bf528SMauro Carvalho Chehab 
37999a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, DISTXDATA, cmd->msg[i]) < 0)
38009a0bf528SMauro Carvalho Chehab 			goto err;
38019a0bf528SMauro Carvalho Chehab 	}
38029a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DISTXCTL);
38039a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
38049a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
38059a0bf528SMauro Carvalho Chehab 		goto err;
38069a0bf528SMauro Carvalho Chehab 
38079a0bf528SMauro Carvalho Chehab 	i = 0;
38089a0bf528SMauro Carvalho Chehab 
38099a0bf528SMauro Carvalho Chehab 	while ((!idle) && (i < 10)) {
38109a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
38119a0bf528SMauro Carvalho Chehab 		idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
38129a0bf528SMauro Carvalho Chehab 		msleep(10);
38139a0bf528SMauro Carvalho Chehab 		i++;
38149a0bf528SMauro Carvalho Chehab 	}
38159a0bf528SMauro Carvalho Chehab 
38169a0bf528SMauro Carvalho Chehab 	return 0;
38179a0bf528SMauro Carvalho Chehab err:
38189a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
38199a0bf528SMauro Carvalho Chehab 	return -1;
38209a0bf528SMauro Carvalho Chehab }
38219a0bf528SMauro Carvalho Chehab 
38220df289a2SMauro Carvalho Chehab static int stv090x_send_diseqc_burst(struct dvb_frontend *fe,
38230df289a2SMauro Carvalho Chehab 				     enum fe_sec_mini_cmd burst)
38249a0bf528SMauro Carvalho Chehab {
38259a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
38269a0bf528SMauro Carvalho Chehab 	u32 reg, idle = 0, fifo_full = 1;
38279a0bf528SMauro Carvalho Chehab 	u8 mode, value;
38289a0bf528SMauro Carvalho Chehab 	int i;
38299a0bf528SMauro Carvalho Chehab 
38309a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DISTXCTL);
38319a0bf528SMauro Carvalho Chehab 
38329a0bf528SMauro Carvalho Chehab 	if (burst == SEC_MINI_A) {
38339a0bf528SMauro Carvalho Chehab 		mode = (state->config->diseqc_envelope_mode) ? 5 : 3;
38349a0bf528SMauro Carvalho Chehab 		value = 0x00;
38359a0bf528SMauro Carvalho Chehab 	} else {
38369a0bf528SMauro Carvalho Chehab 		mode = (state->config->diseqc_envelope_mode) ? 4 : 2;
38379a0bf528SMauro Carvalho Chehab 		value = 0xFF;
38389a0bf528SMauro Carvalho Chehab 	}
38399a0bf528SMauro Carvalho Chehab 
38409a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, mode);
38419a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
38429a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
38439a0bf528SMauro Carvalho Chehab 		goto err;
38449a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
38459a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
38469a0bf528SMauro Carvalho Chehab 		goto err;
38479a0bf528SMauro Carvalho Chehab 
38489a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
38499a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
38509a0bf528SMauro Carvalho Chehab 		goto err;
38519a0bf528SMauro Carvalho Chehab 
38529a0bf528SMauro Carvalho Chehab 	while (fifo_full) {
38539a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
38549a0bf528SMauro Carvalho Chehab 		fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
38559a0bf528SMauro Carvalho Chehab 	}
38569a0bf528SMauro Carvalho Chehab 
38579a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DISTXDATA, value) < 0)
38589a0bf528SMauro Carvalho Chehab 		goto err;
38599a0bf528SMauro Carvalho Chehab 
38609a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DISTXCTL);
38619a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
38629a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
38639a0bf528SMauro Carvalho Chehab 		goto err;
38649a0bf528SMauro Carvalho Chehab 
38659a0bf528SMauro Carvalho Chehab 	i = 0;
38669a0bf528SMauro Carvalho Chehab 
38679a0bf528SMauro Carvalho Chehab 	while ((!idle) && (i < 10)) {
38689a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
38699a0bf528SMauro Carvalho Chehab 		idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
38709a0bf528SMauro Carvalho Chehab 		msleep(10);
38719a0bf528SMauro Carvalho Chehab 		i++;
38729a0bf528SMauro Carvalho Chehab 	}
38739a0bf528SMauro Carvalho Chehab 
38749a0bf528SMauro Carvalho Chehab 	return 0;
38759a0bf528SMauro Carvalho Chehab err:
38769a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
38779a0bf528SMauro Carvalho Chehab 	return -1;
38789a0bf528SMauro Carvalho Chehab }
38799a0bf528SMauro Carvalho Chehab 
38809a0bf528SMauro Carvalho Chehab static int stv090x_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
38819a0bf528SMauro Carvalho Chehab {
38829a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
38839a0bf528SMauro Carvalho Chehab 	u32 reg = 0, i = 0, rx_end = 0;
38849a0bf528SMauro Carvalho Chehab 
38859a0bf528SMauro Carvalho Chehab 	while ((rx_end != 1) && (i < 10)) {
38869a0bf528SMauro Carvalho Chehab 		msleep(10);
38879a0bf528SMauro Carvalho Chehab 		i++;
38889a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, DISRX_ST0);
38899a0bf528SMauro Carvalho Chehab 		rx_end = STV090x_GETFIELD_Px(reg, RX_END_FIELD);
38909a0bf528SMauro Carvalho Chehab 	}
38919a0bf528SMauro Carvalho Chehab 
38929a0bf528SMauro Carvalho Chehab 	if (rx_end) {
38939a0bf528SMauro Carvalho Chehab 		reply->msg_len = STV090x_GETFIELD_Px(reg, FIFO_BYTENBR_FIELD);
38949a0bf528SMauro Carvalho Chehab 		for (i = 0; i < reply->msg_len; i++)
38959a0bf528SMauro Carvalho Chehab 			reply->msg[i] = STV090x_READ_DEMOD(state, DISRXDATA);
38969a0bf528SMauro Carvalho Chehab 	}
38979a0bf528SMauro Carvalho Chehab 
38989a0bf528SMauro Carvalho Chehab 	return 0;
38999a0bf528SMauro Carvalho Chehab }
39009a0bf528SMauro Carvalho Chehab 
39019a0bf528SMauro Carvalho Chehab static int stv090x_sleep(struct dvb_frontend *fe)
39029a0bf528SMauro Carvalho Chehab {
39039a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
39049a0bf528SMauro Carvalho Chehab 	u32 reg;
39059a0bf528SMauro Carvalho Chehab 	u8 full_standby = 0;
39069a0bf528SMauro Carvalho Chehab 
39079a0bf528SMauro Carvalho Chehab 	if (stv090x_i2c_gate_ctrl(state, 1) < 0)
39089a0bf528SMauro Carvalho Chehab 		goto err;
39099a0bf528SMauro Carvalho Chehab 
39109a0bf528SMauro Carvalho Chehab 	if (state->config->tuner_sleep) {
39119a0bf528SMauro Carvalho Chehab 		if (state->config->tuner_sleep(fe) < 0)
39129a0bf528SMauro Carvalho Chehab 			goto err_gateoff;
39139a0bf528SMauro Carvalho Chehab 	}
39149a0bf528SMauro Carvalho Chehab 
39159a0bf528SMauro Carvalho Chehab 	if (stv090x_i2c_gate_ctrl(state, 0) < 0)
39169a0bf528SMauro Carvalho Chehab 		goto err;
39179a0bf528SMauro Carvalho Chehab 
39189a0bf528SMauro Carvalho Chehab 	dprintk(FE_DEBUG, 1, "Set %s(%d) to sleep",
39199a0bf528SMauro Carvalho Chehab 		state->device == STV0900 ? "STV0900" : "STV0903",
39209a0bf528SMauro Carvalho Chehab 		state->demod);
39219a0bf528SMauro Carvalho Chehab 
39229a0bf528SMauro Carvalho Chehab 	mutex_lock(&state->internal->demod_lock);
39239a0bf528SMauro Carvalho Chehab 
39249a0bf528SMauro Carvalho Chehab 	switch (state->demod) {
39259a0bf528SMauro Carvalho Chehab 	case STV090x_DEMODULATOR_0:
39269a0bf528SMauro Carvalho Chehab 		/* power off ADC 1 */
39279a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_TSTTNR1);
39289a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
39299a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3930c67d2f07SAlexey Khoroshilov 			goto err_unlock;
39319a0bf528SMauro Carvalho Chehab 		/* power off DiSEqC 1 */
39329a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_TSTTNR2);
39339a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 0);
39349a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
3935c67d2f07SAlexey Khoroshilov 			goto err_unlock;
39369a0bf528SMauro Carvalho Chehab 
39379a0bf528SMauro Carvalho Chehab 		/* check whether path 2 is already sleeping, that is when
39389a0bf528SMauro Carvalho Chehab 		   ADC2 is off */
39399a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_TSTTNR3);
39409a0bf528SMauro Carvalho Chehab 		if (STV090x_GETFIELD(reg, ADC2_PON_FIELD) == 0)
39419a0bf528SMauro Carvalho Chehab 			full_standby = 1;
39429a0bf528SMauro Carvalho Chehab 
39439a0bf528SMauro Carvalho Chehab 		/* stop clocks */
39449a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_STOPCLK1);
39459a0bf528SMauro Carvalho Chehab 		/* packet delineator 1 clock */
39469a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 1);
39479a0bf528SMauro Carvalho Chehab 		/* ADC 1 clock */
39489a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 1);
39499a0bf528SMauro Carvalho Chehab 		/* FEC clock is shared between the two paths, only stop it
39509a0bf528SMauro Carvalho Chehab 		   when full standby is possible */
39519a0bf528SMauro Carvalho Chehab 		if (full_standby)
39529a0bf528SMauro Carvalho Chehab 			STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
39539a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
3954c67d2f07SAlexey Khoroshilov 			goto err_unlock;
39559a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_STOPCLK2);
39569a0bf528SMauro Carvalho Chehab 		/* sampling 1 clock */
39579a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 1);
39589a0bf528SMauro Carvalho Chehab 		/* viterbi 1 clock */
39599a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 1);
39609a0bf528SMauro Carvalho Chehab 		/* TS clock is shared between the two paths, only stop it
39619a0bf528SMauro Carvalho Chehab 		   when full standby is possible */
39629a0bf528SMauro Carvalho Chehab 		if (full_standby)
39639a0bf528SMauro Carvalho Chehab 			STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
39649a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
3965c67d2f07SAlexey Khoroshilov 			goto err_unlock;
39669a0bf528SMauro Carvalho Chehab 		break;
39679a0bf528SMauro Carvalho Chehab 
39689a0bf528SMauro Carvalho Chehab 	case STV090x_DEMODULATOR_1:
39699a0bf528SMauro Carvalho Chehab 		/* power off ADC 2 */
39709a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_TSTTNR3);
39719a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, ADC2_PON_FIELD, 0);
39729a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
3973c67d2f07SAlexey Khoroshilov 			goto err_unlock;
39749a0bf528SMauro Carvalho Chehab 		/* power off DiSEqC 2 */
39759a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_TSTTNR4);
39769a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 0);
39779a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
3978c67d2f07SAlexey Khoroshilov 			goto err_unlock;
39799a0bf528SMauro Carvalho Chehab 
39809a0bf528SMauro Carvalho Chehab 		/* check whether path 1 is already sleeping, that is when
39819a0bf528SMauro Carvalho Chehab 		   ADC1 is off */
39829a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_TSTTNR1);
39839a0bf528SMauro Carvalho Chehab 		if (STV090x_GETFIELD(reg, ADC1_PON_FIELD) == 0)
39849a0bf528SMauro Carvalho Chehab 			full_standby = 1;
39859a0bf528SMauro Carvalho Chehab 
39869a0bf528SMauro Carvalho Chehab 		/* stop clocks */
39879a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_STOPCLK1);
39889a0bf528SMauro Carvalho Chehab 		/* packet delineator 2 clock */
39899a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 1);
39909a0bf528SMauro Carvalho Chehab 		/* ADC 2 clock */
39919a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 1);
39929a0bf528SMauro Carvalho Chehab 		/* FEC clock is shared between the two paths, only stop it
39939a0bf528SMauro Carvalho Chehab 		   when full standby is possible */
39949a0bf528SMauro Carvalho Chehab 		if (full_standby)
39959a0bf528SMauro Carvalho Chehab 			STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
39969a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
3997c67d2f07SAlexey Khoroshilov 			goto err_unlock;
39989a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_STOPCLK2);
39999a0bf528SMauro Carvalho Chehab 		/* sampling 2 clock */
40009a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 1);
40019a0bf528SMauro Carvalho Chehab 		/* viterbi 2 clock */
40029a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 1);
40039a0bf528SMauro Carvalho Chehab 		/* TS clock is shared between the two paths, only stop it
40049a0bf528SMauro Carvalho Chehab 		   when full standby is possible */
40059a0bf528SMauro Carvalho Chehab 		if (full_standby)
40069a0bf528SMauro Carvalho Chehab 			STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
40079a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
4008c67d2f07SAlexey Khoroshilov 			goto err_unlock;
40099a0bf528SMauro Carvalho Chehab 		break;
40109a0bf528SMauro Carvalho Chehab 
40119a0bf528SMauro Carvalho Chehab 	default:
40129a0bf528SMauro Carvalho Chehab 		dprintk(FE_ERROR, 1, "Wrong demodulator!");
40139a0bf528SMauro Carvalho Chehab 		break;
40149a0bf528SMauro Carvalho Chehab 	}
40159a0bf528SMauro Carvalho Chehab 
40169a0bf528SMauro Carvalho Chehab 	if (full_standby) {
40179a0bf528SMauro Carvalho Chehab 		/* general power off */
40189a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
40199a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
40209a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
4021c67d2f07SAlexey Khoroshilov 			goto err_unlock;
40229a0bf528SMauro Carvalho Chehab 	}
40239a0bf528SMauro Carvalho Chehab 
40249a0bf528SMauro Carvalho Chehab 	mutex_unlock(&state->internal->demod_lock);
40259a0bf528SMauro Carvalho Chehab 	return 0;
40269a0bf528SMauro Carvalho Chehab 
40279a0bf528SMauro Carvalho Chehab err_gateoff:
40289a0bf528SMauro Carvalho Chehab 	stv090x_i2c_gate_ctrl(state, 0);
4029c67d2f07SAlexey Khoroshilov 	goto err;
4030c67d2f07SAlexey Khoroshilov err_unlock:
40319a0bf528SMauro Carvalho Chehab 	mutex_unlock(&state->internal->demod_lock);
4032c67d2f07SAlexey Khoroshilov err:
40339a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
40349a0bf528SMauro Carvalho Chehab 	return -1;
40359a0bf528SMauro Carvalho Chehab }
40369a0bf528SMauro Carvalho Chehab 
40379a0bf528SMauro Carvalho Chehab static int stv090x_wakeup(struct dvb_frontend *fe)
40389a0bf528SMauro Carvalho Chehab {
40399a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
40409a0bf528SMauro Carvalho Chehab 	u32 reg;
40419a0bf528SMauro Carvalho Chehab 
40429a0bf528SMauro Carvalho Chehab 	dprintk(FE_DEBUG, 1, "Wake %s(%d) from standby",
40439a0bf528SMauro Carvalho Chehab 		state->device == STV0900 ? "STV0900" : "STV0903",
40449a0bf528SMauro Carvalho Chehab 		state->demod);
40459a0bf528SMauro Carvalho Chehab 
40469a0bf528SMauro Carvalho Chehab 	mutex_lock(&state->internal->demod_lock);
40479a0bf528SMauro Carvalho Chehab 
40489a0bf528SMauro Carvalho Chehab 	/* general power on */
40499a0bf528SMauro Carvalho Chehab 	reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
40509a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
40519a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
40529a0bf528SMauro Carvalho Chehab 		goto err;
40539a0bf528SMauro Carvalho Chehab 
40549a0bf528SMauro Carvalho Chehab 	switch (state->demod) {
40559a0bf528SMauro Carvalho Chehab 	case STV090x_DEMODULATOR_0:
40569a0bf528SMauro Carvalho Chehab 		/* power on ADC 1 */
40579a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_TSTTNR1);
40589a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
40599a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
40609a0bf528SMauro Carvalho Chehab 			goto err;
40619a0bf528SMauro Carvalho Chehab 		/* power on DiSEqC 1 */
40629a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_TSTTNR2);
40639a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 1);
40649a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
40659a0bf528SMauro Carvalho Chehab 			goto err;
40669a0bf528SMauro Carvalho Chehab 
40679a0bf528SMauro Carvalho Chehab 		/* activate clocks */
40689a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_STOPCLK1);
40699a0bf528SMauro Carvalho Chehab 		/* packet delineator 1 clock */
40709a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 0);
40719a0bf528SMauro Carvalho Chehab 		/* ADC 1 clock */
40729a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 0);
40739a0bf528SMauro Carvalho Chehab 		/* FEC clock */
40749a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
40759a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
40769a0bf528SMauro Carvalho Chehab 			goto err;
40779a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_STOPCLK2);
40789a0bf528SMauro Carvalho Chehab 		/* sampling 1 clock */
40799a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 0);
40809a0bf528SMauro Carvalho Chehab 		/* viterbi 1 clock */
40819a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 0);
40829a0bf528SMauro Carvalho Chehab 		/* TS clock */
40839a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
40849a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
40859a0bf528SMauro Carvalho Chehab 			goto err;
40869a0bf528SMauro Carvalho Chehab 		break;
40879a0bf528SMauro Carvalho Chehab 
40889a0bf528SMauro Carvalho Chehab 	case STV090x_DEMODULATOR_1:
40899a0bf528SMauro Carvalho Chehab 		/* power on ADC 2 */
40909a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_TSTTNR3);
40919a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, ADC2_PON_FIELD, 1);
40929a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
40939a0bf528SMauro Carvalho Chehab 			goto err;
40949a0bf528SMauro Carvalho Chehab 		/* power on DiSEqC 2 */
40959a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_TSTTNR4);
40969a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 1);
40979a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
40989a0bf528SMauro Carvalho Chehab 			goto err;
40999a0bf528SMauro Carvalho Chehab 
41009a0bf528SMauro Carvalho Chehab 		/* activate clocks */
41019a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_STOPCLK1);
41029a0bf528SMauro Carvalho Chehab 		/* packet delineator 2 clock */
41039a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 0);
41049a0bf528SMauro Carvalho Chehab 		/* ADC 2 clock */
41059a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 0);
41069a0bf528SMauro Carvalho Chehab 		/* FEC clock */
41079a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
41089a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
41099a0bf528SMauro Carvalho Chehab 			goto err;
41109a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_STOPCLK2);
41119a0bf528SMauro Carvalho Chehab 		/* sampling 2 clock */
41129a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 0);
41139a0bf528SMauro Carvalho Chehab 		/* viterbi 2 clock */
41149a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 0);
41159a0bf528SMauro Carvalho Chehab 		/* TS clock */
41169a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
41179a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
41189a0bf528SMauro Carvalho Chehab 			goto err;
41199a0bf528SMauro Carvalho Chehab 		break;
41209a0bf528SMauro Carvalho Chehab 
41219a0bf528SMauro Carvalho Chehab 	default:
41229a0bf528SMauro Carvalho Chehab 		dprintk(FE_ERROR, 1, "Wrong demodulator!");
41239a0bf528SMauro Carvalho Chehab 		break;
41249a0bf528SMauro Carvalho Chehab 	}
41259a0bf528SMauro Carvalho Chehab 
41269a0bf528SMauro Carvalho Chehab 	mutex_unlock(&state->internal->demod_lock);
41279a0bf528SMauro Carvalho Chehab 	return 0;
41289a0bf528SMauro Carvalho Chehab err:
41299a0bf528SMauro Carvalho Chehab 	mutex_unlock(&state->internal->demod_lock);
41309a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
41319a0bf528SMauro Carvalho Chehab 	return -1;
41329a0bf528SMauro Carvalho Chehab }
41339a0bf528SMauro Carvalho Chehab 
41349a0bf528SMauro Carvalho Chehab static void stv090x_release(struct dvb_frontend *fe)
41359a0bf528SMauro Carvalho Chehab {
41369a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
41379a0bf528SMauro Carvalho Chehab 
41389a0bf528SMauro Carvalho Chehab 	state->internal->num_used--;
41399a0bf528SMauro Carvalho Chehab 	if (state->internal->num_used <= 0) {
41409a0bf528SMauro Carvalho Chehab 
41419a0bf528SMauro Carvalho Chehab 		dprintk(FE_ERROR, 1, "Actually removing");
41429a0bf528SMauro Carvalho Chehab 
41439a0bf528SMauro Carvalho Chehab 		remove_dev(state->internal);
41449a0bf528SMauro Carvalho Chehab 		kfree(state->internal);
41459a0bf528SMauro Carvalho Chehab 	}
41469a0bf528SMauro Carvalho Chehab 
41479a0bf528SMauro Carvalho Chehab 	kfree(state);
41489a0bf528SMauro Carvalho Chehab }
41499a0bf528SMauro Carvalho Chehab 
41509a0bf528SMauro Carvalho Chehab static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode)
41519a0bf528SMauro Carvalho Chehab {
41529a0bf528SMauro Carvalho Chehab 	u32 reg = 0;
41539a0bf528SMauro Carvalho Chehab 
41549a0bf528SMauro Carvalho Chehab 	reg = stv090x_read_reg(state, STV090x_GENCFG);
41559a0bf528SMauro Carvalho Chehab 
41569a0bf528SMauro Carvalho Chehab 	switch (ldpc_mode) {
41579a0bf528SMauro Carvalho Chehab 	case STV090x_DUAL:
41589a0bf528SMauro Carvalho Chehab 	default:
41599a0bf528SMauro Carvalho Chehab 		if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) {
41609a0bf528SMauro Carvalho Chehab 			/* set LDPC to dual mode */
41619a0bf528SMauro Carvalho Chehab 			if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0)
41629a0bf528SMauro Carvalho Chehab 				goto err;
41639a0bf528SMauro Carvalho Chehab 
41649a0bf528SMauro Carvalho Chehab 			state->demod_mode = STV090x_DUAL;
41659a0bf528SMauro Carvalho Chehab 
41669a0bf528SMauro Carvalho Chehab 			reg = stv090x_read_reg(state, STV090x_TSTRES0);
41679a0bf528SMauro Carvalho Chehab 			STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
41689a0bf528SMauro Carvalho Chehab 			if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
41699a0bf528SMauro Carvalho Chehab 				goto err;
41709a0bf528SMauro Carvalho Chehab 			STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
41719a0bf528SMauro Carvalho Chehab 			if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
41729a0bf528SMauro Carvalho Chehab 				goto err;
41739a0bf528SMauro Carvalho Chehab 
41749a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
41759a0bf528SMauro Carvalho Chehab 				goto err;
41769a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
41779a0bf528SMauro Carvalho Chehab 				goto err;
41789a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
41799a0bf528SMauro Carvalho Chehab 				goto err;
41809a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
41819a0bf528SMauro Carvalho Chehab 				goto err;
41829a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
41839a0bf528SMauro Carvalho Chehab 				goto err;
41849a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
41859a0bf528SMauro Carvalho Chehab 				goto err;
41869a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
41879a0bf528SMauro Carvalho Chehab 				goto err;
41889a0bf528SMauro Carvalho Chehab 
41899a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
41909a0bf528SMauro Carvalho Chehab 				goto err;
41919a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
41929a0bf528SMauro Carvalho Chehab 				goto err;
41939a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
41949a0bf528SMauro Carvalho Chehab 				goto err;
41959a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
41969a0bf528SMauro Carvalho Chehab 				goto err;
41979a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
41989a0bf528SMauro Carvalho Chehab 				goto err;
41999a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
42009a0bf528SMauro Carvalho Chehab 				goto err;
42019a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
42029a0bf528SMauro Carvalho Chehab 				goto err;
42039a0bf528SMauro Carvalho Chehab 
42049a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
42059a0bf528SMauro Carvalho Chehab 				goto err;
42069a0bf528SMauro Carvalho Chehab 			if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
42079a0bf528SMauro Carvalho Chehab 				goto err;
42089a0bf528SMauro Carvalho Chehab 		}
42099a0bf528SMauro Carvalho Chehab 		break;
42109a0bf528SMauro Carvalho Chehab 
42119a0bf528SMauro Carvalho Chehab 	case STV090x_SINGLE:
42129a0bf528SMauro Carvalho Chehab 		if (stv090x_stop_modcod(state) < 0)
42139a0bf528SMauro Carvalho Chehab 			goto err;
42149a0bf528SMauro Carvalho Chehab 		if (stv090x_activate_modcod_single(state) < 0)
42159a0bf528SMauro Carvalho Chehab 			goto err;
42169a0bf528SMauro Carvalho Chehab 
42179a0bf528SMauro Carvalho Chehab 		if (state->demod == STV090x_DEMODULATOR_1) {
42189a0bf528SMauro Carvalho Chehab 			if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */
42199a0bf528SMauro Carvalho Chehab 				goto err;
42209a0bf528SMauro Carvalho Chehab 		} else {
42219a0bf528SMauro Carvalho Chehab 			if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */
42229a0bf528SMauro Carvalho Chehab 				goto err;
42239a0bf528SMauro Carvalho Chehab 		}
42249a0bf528SMauro Carvalho Chehab 
42259a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_TSTRES0);
42269a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
42279a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
42289a0bf528SMauro Carvalho Chehab 			goto err;
42299a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
42309a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
42319a0bf528SMauro Carvalho Chehab 			goto err;
42329a0bf528SMauro Carvalho Chehab 
42339a0bf528SMauro Carvalho Chehab 		reg = STV090x_READ_DEMOD(state, PDELCTRL1);
42349a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x01);
42359a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
42369a0bf528SMauro Carvalho Chehab 			goto err;
42379a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x00);
42389a0bf528SMauro Carvalho Chehab 		if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
42399a0bf528SMauro Carvalho Chehab 			goto err;
42409a0bf528SMauro Carvalho Chehab 		break;
42419a0bf528SMauro Carvalho Chehab 	}
42429a0bf528SMauro Carvalho Chehab 
42439a0bf528SMauro Carvalho Chehab 	return 0;
42449a0bf528SMauro Carvalho Chehab err:
42459a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
42469a0bf528SMauro Carvalho Chehab 	return -1;
42479a0bf528SMauro Carvalho Chehab }
42489a0bf528SMauro Carvalho Chehab 
42499a0bf528SMauro Carvalho Chehab /* return (Hz), clk in Hz*/
42509a0bf528SMauro Carvalho Chehab static u32 stv090x_get_mclk(struct stv090x_state *state)
42519a0bf528SMauro Carvalho Chehab {
42529a0bf528SMauro Carvalho Chehab 	const struct stv090x_config *config = state->config;
42539a0bf528SMauro Carvalho Chehab 	u32 div, reg;
42549a0bf528SMauro Carvalho Chehab 	u8 ratio;
42559a0bf528SMauro Carvalho Chehab 
42569a0bf528SMauro Carvalho Chehab 	div = stv090x_read_reg(state, STV090x_NCOARSE);
42579a0bf528SMauro Carvalho Chehab 	reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
42589a0bf528SMauro Carvalho Chehab 	ratio = STV090x_GETFIELD(reg, SELX1RATIO_FIELD) ? 4 : 6;
42599a0bf528SMauro Carvalho Chehab 
42609a0bf528SMauro Carvalho Chehab 	return (div + 1) * config->xtal / ratio; /* kHz */
42619a0bf528SMauro Carvalho Chehab }
42629a0bf528SMauro Carvalho Chehab 
42639a0bf528SMauro Carvalho Chehab static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
42649a0bf528SMauro Carvalho Chehab {
42659a0bf528SMauro Carvalho Chehab 	const struct stv090x_config *config = state->config;
42669a0bf528SMauro Carvalho Chehab 	u32 reg, div, clk_sel;
42679a0bf528SMauro Carvalho Chehab 
42689a0bf528SMauro Carvalho Chehab 	reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
42699a0bf528SMauro Carvalho Chehab 	clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
42709a0bf528SMauro Carvalho Chehab 
42719a0bf528SMauro Carvalho Chehab 	div = ((clk_sel * mclk) / config->xtal) - 1;
42729a0bf528SMauro Carvalho Chehab 
42739a0bf528SMauro Carvalho Chehab 	reg = stv090x_read_reg(state, STV090x_NCOARSE);
42749a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD(reg, M_DIV_FIELD, div);
42759a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
42769a0bf528SMauro Carvalho Chehab 		goto err;
42779a0bf528SMauro Carvalho Chehab 
42789a0bf528SMauro Carvalho Chehab 	state->internal->mclk = stv090x_get_mclk(state);
42799a0bf528SMauro Carvalho Chehab 
42809a0bf528SMauro Carvalho Chehab 	/*Set the DiseqC frequency to 22KHz */
42819a0bf528SMauro Carvalho Chehab 	div = state->internal->mclk / 704000;
42829a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0)
42839a0bf528SMauro Carvalho Chehab 		goto err;
42849a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0)
42859a0bf528SMauro Carvalho Chehab 		goto err;
42869a0bf528SMauro Carvalho Chehab 
42879a0bf528SMauro Carvalho Chehab 	return 0;
42889a0bf528SMauro Carvalho Chehab err:
42899a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
42909a0bf528SMauro Carvalho Chehab 	return -1;
42919a0bf528SMauro Carvalho Chehab }
42929a0bf528SMauro Carvalho Chehab 
42936b9e50c4SAndreas Regel static int stv0900_set_tspath(struct stv090x_state *state)
42949a0bf528SMauro Carvalho Chehab {
42959a0bf528SMauro Carvalho Chehab 	u32 reg;
42969a0bf528SMauro Carvalho Chehab 
42979a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver >= 0x20) {
42989a0bf528SMauro Carvalho Chehab 		switch (state->config->ts1_mode) {
42999a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_PARALLEL_PUNCTURED:
43009a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_DVBCI:
43019a0bf528SMauro Carvalho Chehab 			switch (state->config->ts2_mode) {
43029a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_SERIAL_PUNCTURED:
43039a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_SERIAL_CONTINUOUS:
43049a0bf528SMauro Carvalho Chehab 			default:
43059a0bf528SMauro Carvalho Chehab 				stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
43069a0bf528SMauro Carvalho Chehab 				break;
43079a0bf528SMauro Carvalho Chehab 
43089a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_PARALLEL_PUNCTURED:
43099a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_DVBCI:
43109a0bf528SMauro Carvalho Chehab 				if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */
43119a0bf528SMauro Carvalho Chehab 					goto err;
43129a0bf528SMauro Carvalho Chehab 				reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
43139a0bf528SMauro Carvalho Chehab 				STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
43149a0bf528SMauro Carvalho Chehab 				if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
43159a0bf528SMauro Carvalho Chehab 					goto err;
43169a0bf528SMauro Carvalho Chehab 				reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
43179a0bf528SMauro Carvalho Chehab 				STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
43189a0bf528SMauro Carvalho Chehab 				if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
43199a0bf528SMauro Carvalho Chehab 					goto err;
43209a0bf528SMauro Carvalho Chehab 				if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
43219a0bf528SMauro Carvalho Chehab 					goto err;
43229a0bf528SMauro Carvalho Chehab 				if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
43239a0bf528SMauro Carvalho Chehab 					goto err;
43249a0bf528SMauro Carvalho Chehab 				break;
43259a0bf528SMauro Carvalho Chehab 			}
43269a0bf528SMauro Carvalho Chehab 			break;
43279a0bf528SMauro Carvalho Chehab 
43289a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_SERIAL_PUNCTURED:
43299a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_SERIAL_CONTINUOUS:
43309a0bf528SMauro Carvalho Chehab 		default:
43319a0bf528SMauro Carvalho Chehab 			switch (state->config->ts2_mode) {
43329a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_SERIAL_PUNCTURED:
43339a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_SERIAL_CONTINUOUS:
43349a0bf528SMauro Carvalho Chehab 			default:
43359a0bf528SMauro Carvalho Chehab 				if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
43369a0bf528SMauro Carvalho Chehab 					goto err;
43379a0bf528SMauro Carvalho Chehab 				break;
43389a0bf528SMauro Carvalho Chehab 
43399a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_PARALLEL_PUNCTURED:
43409a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_DVBCI:
43419a0bf528SMauro Carvalho Chehab 				if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0)
43429a0bf528SMauro Carvalho Chehab 					goto err;
43439a0bf528SMauro Carvalho Chehab 				break;
43449a0bf528SMauro Carvalho Chehab 			}
43459a0bf528SMauro Carvalho Chehab 			break;
43469a0bf528SMauro Carvalho Chehab 		}
43479a0bf528SMauro Carvalho Chehab 	} else {
43489a0bf528SMauro Carvalho Chehab 		switch (state->config->ts1_mode) {
43499a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_PARALLEL_PUNCTURED:
43509a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_DVBCI:
43519a0bf528SMauro Carvalho Chehab 			switch (state->config->ts2_mode) {
43529a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_SERIAL_PUNCTURED:
43539a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_SERIAL_CONTINUOUS:
43549a0bf528SMauro Carvalho Chehab 			default:
43559a0bf528SMauro Carvalho Chehab 				stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
43569a0bf528SMauro Carvalho Chehab 				break;
43579a0bf528SMauro Carvalho Chehab 
43589a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_PARALLEL_PUNCTURED:
43599a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_DVBCI:
43609a0bf528SMauro Carvalho Chehab 				stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);
43619a0bf528SMauro Carvalho Chehab 				reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
43629a0bf528SMauro Carvalho Chehab 				STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
43639a0bf528SMauro Carvalho Chehab 				if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
43649a0bf528SMauro Carvalho Chehab 					goto err;
43659a0bf528SMauro Carvalho Chehab 				reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
43669a0bf528SMauro Carvalho Chehab 				STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 0);
43679a0bf528SMauro Carvalho Chehab 				if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
43689a0bf528SMauro Carvalho Chehab 					goto err;
43699a0bf528SMauro Carvalho Chehab 				if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
43709a0bf528SMauro Carvalho Chehab 					goto err;
43719a0bf528SMauro Carvalho Chehab 				if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
43729a0bf528SMauro Carvalho Chehab 					goto err;
43739a0bf528SMauro Carvalho Chehab 				break;
43749a0bf528SMauro Carvalho Chehab 			}
43759a0bf528SMauro Carvalho Chehab 			break;
43769a0bf528SMauro Carvalho Chehab 
43779a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_SERIAL_PUNCTURED:
43789a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_SERIAL_CONTINUOUS:
43799a0bf528SMauro Carvalho Chehab 		default:
43809a0bf528SMauro Carvalho Chehab 			switch (state->config->ts2_mode) {
43819a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_SERIAL_PUNCTURED:
43829a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_SERIAL_CONTINUOUS:
43839a0bf528SMauro Carvalho Chehab 			default:
43849a0bf528SMauro Carvalho Chehab 				stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
43859a0bf528SMauro Carvalho Chehab 				break;
43869a0bf528SMauro Carvalho Chehab 
43879a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_PARALLEL_PUNCTURED:
43889a0bf528SMauro Carvalho Chehab 			case STV090x_TSMODE_DVBCI:
43899a0bf528SMauro Carvalho Chehab 				stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);
43909a0bf528SMauro Carvalho Chehab 				break;
43919a0bf528SMauro Carvalho Chehab 			}
43929a0bf528SMauro Carvalho Chehab 			break;
43939a0bf528SMauro Carvalho Chehab 		}
43949a0bf528SMauro Carvalho Chehab 	}
43959a0bf528SMauro Carvalho Chehab 
43969a0bf528SMauro Carvalho Chehab 	switch (state->config->ts1_mode) {
43979a0bf528SMauro Carvalho Chehab 	case STV090x_TSMODE_PARALLEL_PUNCTURED:
43989a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
43999a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
44009a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
44019a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
44029a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
44039a0bf528SMauro Carvalho Chehab 			goto err;
44049a0bf528SMauro Carvalho Chehab 		break;
44059a0bf528SMauro Carvalho Chehab 
44069a0bf528SMauro Carvalho Chehab 	case STV090x_TSMODE_DVBCI:
44079a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
44089a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
44099a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
44109a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
44119a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
44129a0bf528SMauro Carvalho Chehab 			goto err;
44139a0bf528SMauro Carvalho Chehab 		break;
44149a0bf528SMauro Carvalho Chehab 
44159a0bf528SMauro Carvalho Chehab 	case STV090x_TSMODE_SERIAL_PUNCTURED:
44169a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
44179a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
44189a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
44199a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
44209a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
44219a0bf528SMauro Carvalho Chehab 			goto err;
44229a0bf528SMauro Carvalho Chehab 		break;
44239a0bf528SMauro Carvalho Chehab 
44249a0bf528SMauro Carvalho Chehab 	case STV090x_TSMODE_SERIAL_CONTINUOUS:
44259a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
44269a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
44279a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
44289a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
44299a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
44309a0bf528SMauro Carvalho Chehab 			goto err;
44319a0bf528SMauro Carvalho Chehab 		break;
44329a0bf528SMauro Carvalho Chehab 
44339a0bf528SMauro Carvalho Chehab 	default:
44349a0bf528SMauro Carvalho Chehab 		break;
44359a0bf528SMauro Carvalho Chehab 	}
44369a0bf528SMauro Carvalho Chehab 
44379a0bf528SMauro Carvalho Chehab 	switch (state->config->ts2_mode) {
44389a0bf528SMauro Carvalho Chehab 	case STV090x_TSMODE_PARALLEL_PUNCTURED:
44399a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
44409a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
44419a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
44429a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
44439a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
44449a0bf528SMauro Carvalho Chehab 			goto err;
44459a0bf528SMauro Carvalho Chehab 		break;
44469a0bf528SMauro Carvalho Chehab 
44479a0bf528SMauro Carvalho Chehab 	case STV090x_TSMODE_DVBCI:
44489a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
44499a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
44509a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
44519a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
44529a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
44539a0bf528SMauro Carvalho Chehab 			goto err;
44549a0bf528SMauro Carvalho Chehab 		break;
44559a0bf528SMauro Carvalho Chehab 
44569a0bf528SMauro Carvalho Chehab 	case STV090x_TSMODE_SERIAL_PUNCTURED:
44579a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
44589a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
44599a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
44609a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
44619a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
44629a0bf528SMauro Carvalho Chehab 			goto err;
44639a0bf528SMauro Carvalho Chehab 		break;
44649a0bf528SMauro Carvalho Chehab 
44659a0bf528SMauro Carvalho Chehab 	case STV090x_TSMODE_SERIAL_CONTINUOUS:
44669a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
44679a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
44689a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
44699a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
44709a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
44719a0bf528SMauro Carvalho Chehab 			goto err;
44729a0bf528SMauro Carvalho Chehab 		break;
44739a0bf528SMauro Carvalho Chehab 
44749a0bf528SMauro Carvalho Chehab 	default:
44759a0bf528SMauro Carvalho Chehab 		break;
44769a0bf528SMauro Carvalho Chehab 	}
44779a0bf528SMauro Carvalho Chehab 
44789a0bf528SMauro Carvalho Chehab 	if (state->config->ts1_clk > 0) {
44799a0bf528SMauro Carvalho Chehab 		u32 speed;
44809a0bf528SMauro Carvalho Chehab 
44819a0bf528SMauro Carvalho Chehab 		switch (state->config->ts1_mode) {
44829a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_PARALLEL_PUNCTURED:
44839a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_DVBCI:
44849a0bf528SMauro Carvalho Chehab 		default:
44859a0bf528SMauro Carvalho Chehab 			speed = state->internal->mclk /
44869a0bf528SMauro Carvalho Chehab 				(state->config->ts1_clk / 4);
44879a0bf528SMauro Carvalho Chehab 			if (speed < 0x08)
44889a0bf528SMauro Carvalho Chehab 				speed = 0x08;
44899a0bf528SMauro Carvalho Chehab 			if (speed > 0xFF)
44909a0bf528SMauro Carvalho Chehab 				speed = 0xFF;
44919a0bf528SMauro Carvalho Chehab 			break;
44929a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_SERIAL_PUNCTURED:
44939a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_SERIAL_CONTINUOUS:
44949a0bf528SMauro Carvalho Chehab 			speed = state->internal->mclk /
44959a0bf528SMauro Carvalho Chehab 				(state->config->ts1_clk / 32);
44969a0bf528SMauro Carvalho Chehab 			if (speed < 0x20)
44979a0bf528SMauro Carvalho Chehab 				speed = 0x20;
44989a0bf528SMauro Carvalho Chehab 			if (speed > 0xFF)
44999a0bf528SMauro Carvalho Chehab 				speed = 0xFF;
45009a0bf528SMauro Carvalho Chehab 			break;
45019a0bf528SMauro Carvalho Chehab 		}
45029a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
45039a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
45049a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
45059a0bf528SMauro Carvalho Chehab 			goto err;
45069a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
45079a0bf528SMauro Carvalho Chehab 			goto err;
45089a0bf528SMauro Carvalho Chehab 	}
45099a0bf528SMauro Carvalho Chehab 
45109a0bf528SMauro Carvalho Chehab 	if (state->config->ts2_clk > 0) {
45119a0bf528SMauro Carvalho Chehab 		u32 speed;
45129a0bf528SMauro Carvalho Chehab 
45139a0bf528SMauro Carvalho Chehab 		switch (state->config->ts2_mode) {
45149a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_PARALLEL_PUNCTURED:
45159a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_DVBCI:
45169a0bf528SMauro Carvalho Chehab 		default:
45179a0bf528SMauro Carvalho Chehab 			speed = state->internal->mclk /
45189a0bf528SMauro Carvalho Chehab 				(state->config->ts2_clk / 4);
45199a0bf528SMauro Carvalho Chehab 			if (speed < 0x08)
45209a0bf528SMauro Carvalho Chehab 				speed = 0x08;
45219a0bf528SMauro Carvalho Chehab 			if (speed > 0xFF)
45229a0bf528SMauro Carvalho Chehab 				speed = 0xFF;
45239a0bf528SMauro Carvalho Chehab 			break;
45249a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_SERIAL_PUNCTURED:
45259a0bf528SMauro Carvalho Chehab 		case STV090x_TSMODE_SERIAL_CONTINUOUS:
45269a0bf528SMauro Carvalho Chehab 			speed = state->internal->mclk /
45279a0bf528SMauro Carvalho Chehab 				(state->config->ts2_clk / 32);
45289a0bf528SMauro Carvalho Chehab 			if (speed < 0x20)
45299a0bf528SMauro Carvalho Chehab 				speed = 0x20;
45309a0bf528SMauro Carvalho Chehab 			if (speed > 0xFF)
45319a0bf528SMauro Carvalho Chehab 				speed = 0xFF;
45329a0bf528SMauro Carvalho Chehab 			break;
45339a0bf528SMauro Carvalho Chehab 		}
45349a0bf528SMauro Carvalho Chehab 		reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
45359a0bf528SMauro Carvalho Chehab 		STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
45369a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
45379a0bf528SMauro Carvalho Chehab 			goto err;
45389a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P2_TSSPEED, speed) < 0)
45399a0bf528SMauro Carvalho Chehab 			goto err;
45409a0bf528SMauro Carvalho Chehab 	}
45419a0bf528SMauro Carvalho Chehab 
45429a0bf528SMauro Carvalho Chehab 	reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
45439a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
45449a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
45459a0bf528SMauro Carvalho Chehab 		goto err;
45469a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
45479a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
45489a0bf528SMauro Carvalho Chehab 		goto err;
45499a0bf528SMauro Carvalho Chehab 
45509a0bf528SMauro Carvalho Chehab 	reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
45519a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
45529a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
45539a0bf528SMauro Carvalho Chehab 		goto err;
45549a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
45559a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
45569a0bf528SMauro Carvalho Chehab 		goto err;
45579a0bf528SMauro Carvalho Chehab 
45589a0bf528SMauro Carvalho Chehab 	return 0;
45599a0bf528SMauro Carvalho Chehab err:
45609a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
45619a0bf528SMauro Carvalho Chehab 	return -1;
45629a0bf528SMauro Carvalho Chehab }
45639a0bf528SMauro Carvalho Chehab 
45646b9e50c4SAndreas Regel static int stv0903_set_tspath(struct stv090x_state *state)
45656b9e50c4SAndreas Regel {
45666b9e50c4SAndreas Regel 	u32 reg;
45676b9e50c4SAndreas Regel 
45686b9e50c4SAndreas Regel 	if (state->internal->dev_ver >= 0x20) {
45696b9e50c4SAndreas Regel 		switch (state->config->ts1_mode) {
45706b9e50c4SAndreas Regel 		case STV090x_TSMODE_PARALLEL_PUNCTURED:
45716b9e50c4SAndreas Regel 		case STV090x_TSMODE_DVBCI:
45726b9e50c4SAndreas Regel 			stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
45736b9e50c4SAndreas Regel 			break;
45746b9e50c4SAndreas Regel 
45756b9e50c4SAndreas Regel 		case STV090x_TSMODE_SERIAL_PUNCTURED:
45766b9e50c4SAndreas Regel 		case STV090x_TSMODE_SERIAL_CONTINUOUS:
45776b9e50c4SAndreas Regel 		default:
45786b9e50c4SAndreas Regel 			stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c);
45796b9e50c4SAndreas Regel 			break;
45806b9e50c4SAndreas Regel 		}
45816b9e50c4SAndreas Regel 	} else {
45826b9e50c4SAndreas Regel 		switch (state->config->ts1_mode) {
45836b9e50c4SAndreas Regel 		case STV090x_TSMODE_PARALLEL_PUNCTURED:
45846b9e50c4SAndreas Regel 		case STV090x_TSMODE_DVBCI:
45856b9e50c4SAndreas Regel 			stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
45866b9e50c4SAndreas Regel 			break;
45876b9e50c4SAndreas Regel 
45886b9e50c4SAndreas Regel 		case STV090x_TSMODE_SERIAL_PUNCTURED:
45896b9e50c4SAndreas Regel 		case STV090x_TSMODE_SERIAL_CONTINUOUS:
45906b9e50c4SAndreas Regel 		default:
45916b9e50c4SAndreas Regel 			stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
45926b9e50c4SAndreas Regel 			break;
45936b9e50c4SAndreas Regel 		}
45946b9e50c4SAndreas Regel 	}
45956b9e50c4SAndreas Regel 
45966b9e50c4SAndreas Regel 	switch (state->config->ts1_mode) {
45976b9e50c4SAndreas Regel 	case STV090x_TSMODE_PARALLEL_PUNCTURED:
45986b9e50c4SAndreas Regel 		reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
45996b9e50c4SAndreas Regel 		STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
46006b9e50c4SAndreas Regel 		STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
46016b9e50c4SAndreas Regel 		if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
46026b9e50c4SAndreas Regel 			goto err;
46036b9e50c4SAndreas Regel 		break;
46046b9e50c4SAndreas Regel 
46056b9e50c4SAndreas Regel 	case STV090x_TSMODE_DVBCI:
46066b9e50c4SAndreas Regel 		reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
46076b9e50c4SAndreas Regel 		STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
46086b9e50c4SAndreas Regel 		STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
46096b9e50c4SAndreas Regel 		if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
46106b9e50c4SAndreas Regel 			goto err;
46116b9e50c4SAndreas Regel 		break;
46126b9e50c4SAndreas Regel 
46136b9e50c4SAndreas Regel 	case STV090x_TSMODE_SERIAL_PUNCTURED:
46146b9e50c4SAndreas Regel 		reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
46156b9e50c4SAndreas Regel 		STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
46166b9e50c4SAndreas Regel 		STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
46176b9e50c4SAndreas Regel 		if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
46186b9e50c4SAndreas Regel 			goto err;
46196b9e50c4SAndreas Regel 		break;
46206b9e50c4SAndreas Regel 
46216b9e50c4SAndreas Regel 	case STV090x_TSMODE_SERIAL_CONTINUOUS:
46226b9e50c4SAndreas Regel 		reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
46236b9e50c4SAndreas Regel 		STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
46246b9e50c4SAndreas Regel 		STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
46256b9e50c4SAndreas Regel 		if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
46266b9e50c4SAndreas Regel 			goto err;
46276b9e50c4SAndreas Regel 		break;
46286b9e50c4SAndreas Regel 
46296b9e50c4SAndreas Regel 	default:
46306b9e50c4SAndreas Regel 		break;
46316b9e50c4SAndreas Regel 	}
46326b9e50c4SAndreas Regel 
46336b9e50c4SAndreas Regel 	if (state->config->ts1_clk > 0) {
46346b9e50c4SAndreas Regel 		u32 speed;
46356b9e50c4SAndreas Regel 
46366b9e50c4SAndreas Regel 		switch (state->config->ts1_mode) {
46376b9e50c4SAndreas Regel 		case STV090x_TSMODE_PARALLEL_PUNCTURED:
46386b9e50c4SAndreas Regel 		case STV090x_TSMODE_DVBCI:
46396b9e50c4SAndreas Regel 		default:
46406b9e50c4SAndreas Regel 			speed = state->internal->mclk /
46416b9e50c4SAndreas Regel 				(state->config->ts1_clk / 4);
46426b9e50c4SAndreas Regel 			if (speed < 0x08)
46436b9e50c4SAndreas Regel 				speed = 0x08;
46446b9e50c4SAndreas Regel 			if (speed > 0xFF)
46456b9e50c4SAndreas Regel 				speed = 0xFF;
46466b9e50c4SAndreas Regel 			break;
46476b9e50c4SAndreas Regel 		case STV090x_TSMODE_SERIAL_PUNCTURED:
46486b9e50c4SAndreas Regel 		case STV090x_TSMODE_SERIAL_CONTINUOUS:
46496b9e50c4SAndreas Regel 			speed = state->internal->mclk /
46506b9e50c4SAndreas Regel 				(state->config->ts1_clk / 32);
46516b9e50c4SAndreas Regel 			if (speed < 0x20)
46526b9e50c4SAndreas Regel 				speed = 0x20;
46536b9e50c4SAndreas Regel 			if (speed > 0xFF)
46546b9e50c4SAndreas Regel 				speed = 0xFF;
46556b9e50c4SAndreas Regel 			break;
46566b9e50c4SAndreas Regel 		}
46576b9e50c4SAndreas Regel 		reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
46586b9e50c4SAndreas Regel 		STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
46596b9e50c4SAndreas Regel 		if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
46606b9e50c4SAndreas Regel 			goto err;
46616b9e50c4SAndreas Regel 		if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
46626b9e50c4SAndreas Regel 			goto err;
46636b9e50c4SAndreas Regel 	}
46646b9e50c4SAndreas Regel 
46656b9e50c4SAndreas Regel 	reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
46666b9e50c4SAndreas Regel 	STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
46676b9e50c4SAndreas Regel 	if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
46686b9e50c4SAndreas Regel 		goto err;
46696b9e50c4SAndreas Regel 	STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
46706b9e50c4SAndreas Regel 	if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
46716b9e50c4SAndreas Regel 		goto err;
46726b9e50c4SAndreas Regel 
46736b9e50c4SAndreas Regel 	return 0;
46746b9e50c4SAndreas Regel err:
46756b9e50c4SAndreas Regel 	dprintk(FE_ERROR, 1, "I/O error");
46766b9e50c4SAndreas Regel 	return -1;
46776b9e50c4SAndreas Regel }
46786b9e50c4SAndreas Regel 
46799a0bf528SMauro Carvalho Chehab static int stv090x_init(struct dvb_frontend *fe)
46809a0bf528SMauro Carvalho Chehab {
46819a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
46829a0bf528SMauro Carvalho Chehab 	const struct stv090x_config *config = state->config;
46839a0bf528SMauro Carvalho Chehab 	u32 reg;
46849a0bf528SMauro Carvalho Chehab 
46859a0bf528SMauro Carvalho Chehab 	if (state->internal->mclk == 0) {
46869a0bf528SMauro Carvalho Chehab 		/* call tuner init to configure the tuner's clock output
46879a0bf528SMauro Carvalho Chehab 		   divider directly before setting up the master clock of
46889a0bf528SMauro Carvalho Chehab 		   the stv090x. */
46899a0bf528SMauro Carvalho Chehab 		if (stv090x_i2c_gate_ctrl(state, 1) < 0)
46909a0bf528SMauro Carvalho Chehab 			goto err;
46919a0bf528SMauro Carvalho Chehab 
46929a0bf528SMauro Carvalho Chehab 		if (config->tuner_init) {
46939a0bf528SMauro Carvalho Chehab 			if (config->tuner_init(fe) < 0)
46949a0bf528SMauro Carvalho Chehab 				goto err_gateoff;
46959a0bf528SMauro Carvalho Chehab 		}
46969a0bf528SMauro Carvalho Chehab 
46979a0bf528SMauro Carvalho Chehab 		if (stv090x_i2c_gate_ctrl(state, 0) < 0)
46989a0bf528SMauro Carvalho Chehab 			goto err;
46999a0bf528SMauro Carvalho Chehab 
47009a0bf528SMauro Carvalho Chehab 		stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
47019a0bf528SMauro Carvalho Chehab 		msleep(5);
47029a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_SYNTCTRL,
47039a0bf528SMauro Carvalho Chehab 				      0x20 | config->clk_mode) < 0)
47049a0bf528SMauro Carvalho Chehab 			goto err;
47059a0bf528SMauro Carvalho Chehab 		stv090x_get_mclk(state);
47069a0bf528SMauro Carvalho Chehab 	}
47079a0bf528SMauro Carvalho Chehab 
47089a0bf528SMauro Carvalho Chehab 	if (stv090x_wakeup(fe) < 0) {
47099a0bf528SMauro Carvalho Chehab 		dprintk(FE_ERROR, 1, "Error waking device");
47109a0bf528SMauro Carvalho Chehab 		goto err;
47119a0bf528SMauro Carvalho Chehab 	}
47129a0bf528SMauro Carvalho Chehab 
47139a0bf528SMauro Carvalho Chehab 	if (stv090x_ldpc_mode(state, state->demod_mode) < 0)
47149a0bf528SMauro Carvalho Chehab 		goto err;
47159a0bf528SMauro Carvalho Chehab 
47169a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, TNRCFG2);
47179a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion);
47189a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, TNRCFG2, reg) < 0)
47199a0bf528SMauro Carvalho Chehab 		goto err;
47209a0bf528SMauro Carvalho Chehab 	reg = STV090x_READ_DEMOD(state, DEMOD);
47219a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
47229a0bf528SMauro Carvalho Chehab 	if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
47239a0bf528SMauro Carvalho Chehab 		goto err;
47249a0bf528SMauro Carvalho Chehab 
47259a0bf528SMauro Carvalho Chehab 	if (stv090x_i2c_gate_ctrl(state, 1) < 0)
47269a0bf528SMauro Carvalho Chehab 		goto err;
47279a0bf528SMauro Carvalho Chehab 
47289a0bf528SMauro Carvalho Chehab 	if (config->tuner_set_mode) {
47299a0bf528SMauro Carvalho Chehab 		if (config->tuner_set_mode(fe, TUNER_WAKE) < 0)
47309a0bf528SMauro Carvalho Chehab 			goto err_gateoff;
47319a0bf528SMauro Carvalho Chehab 	}
47329a0bf528SMauro Carvalho Chehab 
47339a0bf528SMauro Carvalho Chehab 	if (config->tuner_init) {
47349a0bf528SMauro Carvalho Chehab 		if (config->tuner_init(fe) < 0)
47359a0bf528SMauro Carvalho Chehab 			goto err_gateoff;
47369a0bf528SMauro Carvalho Chehab 	}
47379a0bf528SMauro Carvalho Chehab 
47389a0bf528SMauro Carvalho Chehab 	if (stv090x_i2c_gate_ctrl(state, 0) < 0)
47399a0bf528SMauro Carvalho Chehab 		goto err;
47409a0bf528SMauro Carvalho Chehab 
47416b9e50c4SAndreas Regel 	if (state->device == STV0900) {
47426b9e50c4SAndreas Regel 		if (stv0900_set_tspath(state) < 0)
47439a0bf528SMauro Carvalho Chehab 			goto err;
47446b9e50c4SAndreas Regel 	} else {
47456b9e50c4SAndreas Regel 		if (stv0903_set_tspath(state) < 0)
47466b9e50c4SAndreas Regel 			goto err;
47476b9e50c4SAndreas Regel 	}
47489a0bf528SMauro Carvalho Chehab 
47499a0bf528SMauro Carvalho Chehab 	return 0;
47509a0bf528SMauro Carvalho Chehab 
47519a0bf528SMauro Carvalho Chehab err_gateoff:
47529a0bf528SMauro Carvalho Chehab 	stv090x_i2c_gate_ctrl(state, 0);
47539a0bf528SMauro Carvalho Chehab err:
47549a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
47559a0bf528SMauro Carvalho Chehab 	return -1;
47569a0bf528SMauro Carvalho Chehab }
47579a0bf528SMauro Carvalho Chehab 
47589a0bf528SMauro Carvalho Chehab static int stv090x_setup(struct dvb_frontend *fe)
47599a0bf528SMauro Carvalho Chehab {
47609a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
47619a0bf528SMauro Carvalho Chehab 	const struct stv090x_config *config = state->config;
47629a0bf528SMauro Carvalho Chehab 	const struct stv090x_reg *stv090x_initval = NULL;
47639a0bf528SMauro Carvalho Chehab 	const struct stv090x_reg *stv090x_cut20_val = NULL;
47649a0bf528SMauro Carvalho Chehab 	unsigned long t1_size = 0, t2_size = 0;
47659a0bf528SMauro Carvalho Chehab 	u32 reg = 0;
47669a0bf528SMauro Carvalho Chehab 
47679a0bf528SMauro Carvalho Chehab 	int i;
47689a0bf528SMauro Carvalho Chehab 
47699a0bf528SMauro Carvalho Chehab 	if (state->device == STV0900) {
47709a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Initializing STV0900");
47719a0bf528SMauro Carvalho Chehab 		stv090x_initval = stv0900_initval;
47729a0bf528SMauro Carvalho Chehab 		t1_size = ARRAY_SIZE(stv0900_initval);
47739a0bf528SMauro Carvalho Chehab 		stv090x_cut20_val = stv0900_cut20_val;
47749a0bf528SMauro Carvalho Chehab 		t2_size = ARRAY_SIZE(stv0900_cut20_val);
47759a0bf528SMauro Carvalho Chehab 	} else if (state->device == STV0903) {
47769a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Initializing STV0903");
47779a0bf528SMauro Carvalho Chehab 		stv090x_initval = stv0903_initval;
47789a0bf528SMauro Carvalho Chehab 		t1_size = ARRAY_SIZE(stv0903_initval);
47799a0bf528SMauro Carvalho Chehab 		stv090x_cut20_val = stv0903_cut20_val;
47809a0bf528SMauro Carvalho Chehab 		t2_size = ARRAY_SIZE(stv0903_cut20_val);
47819a0bf528SMauro Carvalho Chehab 	}
47829a0bf528SMauro Carvalho Chehab 
47839a0bf528SMauro Carvalho Chehab 	/* STV090x init */
47849a0bf528SMauro Carvalho Chehab 
47859a0bf528SMauro Carvalho Chehab 	/* Stop Demod */
47869a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_P1_DMDISTATE, 0x5c) < 0)
47879a0bf528SMauro Carvalho Chehab 		goto err;
47886b9e50c4SAndreas Regel 	if (state->device == STV0900)
47899a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P2_DMDISTATE, 0x5c) < 0)
47909a0bf528SMauro Carvalho Chehab 			goto err;
47919a0bf528SMauro Carvalho Chehab 
47929a0bf528SMauro Carvalho Chehab 	msleep(5);
47939a0bf528SMauro Carvalho Chehab 
47949a0bf528SMauro Carvalho Chehab 	/* Set No Tuner Mode */
47959a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_P1_TNRCFG, 0x6c) < 0)
47969a0bf528SMauro Carvalho Chehab 		goto err;
47976b9e50c4SAndreas Regel 	if (state->device == STV0900)
47989a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P2_TNRCFG, 0x6c) < 0)
47999a0bf528SMauro Carvalho Chehab 			goto err;
48009a0bf528SMauro Carvalho Chehab 
48019a0bf528SMauro Carvalho Chehab 	/* I2C repeater OFF */
48029a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
48039a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_P1_I2CRPT, reg) < 0)
48049a0bf528SMauro Carvalho Chehab 		goto err;
48056b9e50c4SAndreas Regel 	if (state->device == STV0900)
48069a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_P2_I2CRPT, reg) < 0)
48079a0bf528SMauro Carvalho Chehab 			goto err;
48089a0bf528SMauro Carvalho Chehab 
48099a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
48109a0bf528SMauro Carvalho Chehab 		goto err;
48119a0bf528SMauro Carvalho Chehab 	msleep(5);
48129a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */
48139a0bf528SMauro Carvalho Chehab 		goto err;
48149a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */
48159a0bf528SMauro Carvalho Chehab 		goto err;
48169a0bf528SMauro Carvalho Chehab 	msleep(5);
48179a0bf528SMauro Carvalho Chehab 
48189a0bf528SMauro Carvalho Chehab 	/* write initval */
48199a0bf528SMauro Carvalho Chehab 	dprintk(FE_DEBUG, 1, "Setting up initial values");
48209a0bf528SMauro Carvalho Chehab 	for (i = 0; i < t1_size; i++) {
48219a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0)
48229a0bf528SMauro Carvalho Chehab 			goto err;
48239a0bf528SMauro Carvalho Chehab 	}
48249a0bf528SMauro Carvalho Chehab 
48259a0bf528SMauro Carvalho Chehab 	state->internal->dev_ver = stv090x_read_reg(state, STV090x_MID);
48269a0bf528SMauro Carvalho Chehab 	if (state->internal->dev_ver >= 0x20) {
48279a0bf528SMauro Carvalho Chehab 		if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
48289a0bf528SMauro Carvalho Chehab 			goto err;
48299a0bf528SMauro Carvalho Chehab 
48309a0bf528SMauro Carvalho Chehab 		/* write cut20_val*/
48319a0bf528SMauro Carvalho Chehab 		dprintk(FE_DEBUG, 1, "Setting up Cut 2.0 initial values");
48329a0bf528SMauro Carvalho Chehab 		for (i = 0; i < t2_size; i++) {
48339a0bf528SMauro Carvalho Chehab 			if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0)
48349a0bf528SMauro Carvalho Chehab 				goto err;
48359a0bf528SMauro Carvalho Chehab 		}
48369a0bf528SMauro Carvalho Chehab 
48379a0bf528SMauro Carvalho Chehab 	} else if (state->internal->dev_ver < 0x20) {
48389a0bf528SMauro Carvalho Chehab 		dprintk(FE_ERROR, 1, "ERROR: Unsupported Cut: 0x%02x!",
48399a0bf528SMauro Carvalho Chehab 			state->internal->dev_ver);
48409a0bf528SMauro Carvalho Chehab 
48419a0bf528SMauro Carvalho Chehab 		goto err;
48429a0bf528SMauro Carvalho Chehab 	} else if (state->internal->dev_ver > 0x30) {
48439a0bf528SMauro Carvalho Chehab 		/* we shouldn't bail out from here */
48449a0bf528SMauro Carvalho Chehab 		dprintk(FE_ERROR, 1, "INFO: Cut: 0x%02x probably incomplete support!",
48459a0bf528SMauro Carvalho Chehab 			state->internal->dev_ver);
48469a0bf528SMauro Carvalho Chehab 	}
48479a0bf528SMauro Carvalho Chehab 
48489a0bf528SMauro Carvalho Chehab 	/* ADC1 range */
48499a0bf528SMauro Carvalho Chehab 	reg = stv090x_read_reg(state, STV090x_TSTTNR1);
48509a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD(reg, ADC1_INMODE_FIELD,
48519a0bf528SMauro Carvalho Chehab 		(config->adc1_range == STV090x_ADC_1Vpp) ? 0 : 1);
48529a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
48539a0bf528SMauro Carvalho Chehab 		goto err;
48549a0bf528SMauro Carvalho Chehab 
48559a0bf528SMauro Carvalho Chehab 	/* ADC2 range */
48569a0bf528SMauro Carvalho Chehab 	reg = stv090x_read_reg(state, STV090x_TSTTNR3);
48579a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD(reg, ADC2_INMODE_FIELD,
48589a0bf528SMauro Carvalho Chehab 		(config->adc2_range == STV090x_ADC_1Vpp) ? 0 : 1);
48599a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
48609a0bf528SMauro Carvalho Chehab 		goto err;
48619a0bf528SMauro Carvalho Chehab 
48629a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
48639a0bf528SMauro Carvalho Chehab 		goto err;
48649a0bf528SMauro Carvalho Chehab 	if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
48659a0bf528SMauro Carvalho Chehab 		goto err;
48669a0bf528SMauro Carvalho Chehab 
48679a0bf528SMauro Carvalho Chehab 	return 0;
48689a0bf528SMauro Carvalho Chehab err:
48699a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "I/O error");
48709a0bf528SMauro Carvalho Chehab 	return -1;
48719a0bf528SMauro Carvalho Chehab }
48729a0bf528SMauro Carvalho Chehab 
4873a2ea5561SMauro Carvalho Chehab static int stv090x_set_gpio(struct dvb_frontend *fe, u8 gpio, u8 dir,
4874a2ea5561SMauro Carvalho Chehab 			    u8 value, u8 xor_value)
48759a0bf528SMauro Carvalho Chehab {
48769a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = fe->demodulator_priv;
48779a0bf528SMauro Carvalho Chehab 	u8 reg = 0;
48789a0bf528SMauro Carvalho Chehab 
48799a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD(reg, GPIOx_OPD_FIELD, dir);
48809a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD(reg, GPIOx_CONFIG_FIELD, value);
48819a0bf528SMauro Carvalho Chehab 	STV090x_SETFIELD(reg, GPIOx_XOR_FIELD, xor_value);
48829a0bf528SMauro Carvalho Chehab 
48839a0bf528SMauro Carvalho Chehab 	return stv090x_write_reg(state, STV090x_GPIOxCFG(gpio), reg);
48849a0bf528SMauro Carvalho Chehab }
48859a0bf528SMauro Carvalho Chehab 
4886bd336e63SMax Kellermann static const struct dvb_frontend_ops stv090x_ops = {
48879a0bf528SMauro Carvalho Chehab 	.delsys = { SYS_DVBS, SYS_DVBS2, SYS_DSS },
48889a0bf528SMauro Carvalho Chehab 	.info = {
48899a0bf528SMauro Carvalho Chehab 		.name			= "STV090x Multistandard",
48909a0bf528SMauro Carvalho Chehab 		.frequency_min		= 950000,
48919a0bf528SMauro Carvalho Chehab 		.frequency_max 		= 2150000,
48929a0bf528SMauro Carvalho Chehab 		.frequency_stepsize	= 0,
48939a0bf528SMauro Carvalho Chehab 		.frequency_tolerance	= 0,
48949a0bf528SMauro Carvalho Chehab 		.symbol_rate_min 	= 1000000,
48959a0bf528SMauro Carvalho Chehab 		.symbol_rate_max 	= 45000000,
48969a0bf528SMauro Carvalho Chehab 		.caps			= FE_CAN_INVERSION_AUTO |
48979a0bf528SMauro Carvalho Chehab 					  FE_CAN_FEC_AUTO       |
48989a0bf528SMauro Carvalho Chehab 					  FE_CAN_QPSK           |
48999a0bf528SMauro Carvalho Chehab 					  FE_CAN_2G_MODULATION
49009a0bf528SMauro Carvalho Chehab 	},
49019a0bf528SMauro Carvalho Chehab 
49029a0bf528SMauro Carvalho Chehab 	.release			= stv090x_release,
49039a0bf528SMauro Carvalho Chehab 	.init				= stv090x_init,
49049a0bf528SMauro Carvalho Chehab 
49059a0bf528SMauro Carvalho Chehab 	.sleep				= stv090x_sleep,
49069a0bf528SMauro Carvalho Chehab 	.get_frontend_algo		= stv090x_frontend_algo,
49079a0bf528SMauro Carvalho Chehab 
49089a0bf528SMauro Carvalho Chehab 	.diseqc_send_master_cmd		= stv090x_send_diseqc_msg,
49099a0bf528SMauro Carvalho Chehab 	.diseqc_send_burst		= stv090x_send_diseqc_burst,
49109a0bf528SMauro Carvalho Chehab 	.diseqc_recv_slave_reply	= stv090x_recv_slave_reply,
49119a0bf528SMauro Carvalho Chehab 	.set_tone			= stv090x_set_tone,
49129a0bf528SMauro Carvalho Chehab 
49139a0bf528SMauro Carvalho Chehab 	.search				= stv090x_search,
49149a0bf528SMauro Carvalho Chehab 	.read_status			= stv090x_read_status,
49159a0bf528SMauro Carvalho Chehab 	.read_ber			= stv090x_read_per,
49169a0bf528SMauro Carvalho Chehab 	.read_signal_strength		= stv090x_read_signal_strength,
49179a0bf528SMauro Carvalho Chehab 	.read_snr			= stv090x_read_cnr,
49189a0bf528SMauro Carvalho Chehab };
49199a0bf528SMauro Carvalho Chehab 
49209a0bf528SMauro Carvalho Chehab 
4921a2ea5561SMauro Carvalho Chehab struct dvb_frontend *stv090x_attach(struct stv090x_config *config,
49229a0bf528SMauro Carvalho Chehab 				    struct i2c_adapter *i2c,
49239a0bf528SMauro Carvalho Chehab 				    enum stv090x_demodulator demod)
49249a0bf528SMauro Carvalho Chehab {
49259a0bf528SMauro Carvalho Chehab 	struct stv090x_state *state = NULL;
49269a0bf528SMauro Carvalho Chehab 	struct stv090x_dev *temp_int;
49279a0bf528SMauro Carvalho Chehab 
49289a0bf528SMauro Carvalho Chehab 	state = kzalloc(sizeof (struct stv090x_state), GFP_KERNEL);
49299a0bf528SMauro Carvalho Chehab 	if (state == NULL)
49309a0bf528SMauro Carvalho Chehab 		goto error;
49319a0bf528SMauro Carvalho Chehab 
49329a0bf528SMauro Carvalho Chehab 	state->verbose				= &verbose;
49339a0bf528SMauro Carvalho Chehab 	state->config				= config;
49349a0bf528SMauro Carvalho Chehab 	state->i2c				= i2c;
49359a0bf528SMauro Carvalho Chehab 	state->frontend.ops			= stv090x_ops;
49369a0bf528SMauro Carvalho Chehab 	state->frontend.demodulator_priv	= state;
49379a0bf528SMauro Carvalho Chehab 	state->demod				= demod;
49389a0bf528SMauro Carvalho Chehab 	state->demod_mode 			= config->demod_mode; /* Single or Dual mode */
49399a0bf528SMauro Carvalho Chehab 	state->device				= config->device;
49409a0bf528SMauro Carvalho Chehab 	state->rolloff				= STV090x_RO_35; /* default */
49419a0bf528SMauro Carvalho Chehab 
49429a0bf528SMauro Carvalho Chehab 	temp_int = find_dev(state->i2c,
49439a0bf528SMauro Carvalho Chehab 				state->config->address);
49449a0bf528SMauro Carvalho Chehab 
49459a0bf528SMauro Carvalho Chehab 	if ((temp_int != NULL) && (state->demod_mode == STV090x_DUAL)) {
49469a0bf528SMauro Carvalho Chehab 		state->internal = temp_int->internal;
49479a0bf528SMauro Carvalho Chehab 		state->internal->num_used++;
49489a0bf528SMauro Carvalho Chehab 		dprintk(FE_INFO, 1, "Found Internal Structure!");
49499a0bf528SMauro Carvalho Chehab 	} else {
49509a0bf528SMauro Carvalho Chehab 		state->internal = kmalloc(sizeof(struct stv090x_internal),
49519a0bf528SMauro Carvalho Chehab 					  GFP_KERNEL);
49529a0bf528SMauro Carvalho Chehab 		if (!state->internal)
49539a0bf528SMauro Carvalho Chehab 			goto error;
49549a0bf528SMauro Carvalho Chehab 		temp_int = append_internal(state->internal);
49559a0bf528SMauro Carvalho Chehab 		if (!temp_int) {
49569a0bf528SMauro Carvalho Chehab 			kfree(state->internal);
49579a0bf528SMauro Carvalho Chehab 			goto error;
49589a0bf528SMauro Carvalho Chehab 		}
49599a0bf528SMauro Carvalho Chehab 		state->internal->num_used = 1;
49609a0bf528SMauro Carvalho Chehab 		state->internal->mclk = 0;
49619a0bf528SMauro Carvalho Chehab 		state->internal->dev_ver = 0;
49629a0bf528SMauro Carvalho Chehab 		state->internal->i2c_adap = state->i2c;
49639a0bf528SMauro Carvalho Chehab 		state->internal->i2c_addr = state->config->address;
49649a0bf528SMauro Carvalho Chehab 		dprintk(FE_INFO, 1, "Create New Internal Structure!");
49659a0bf528SMauro Carvalho Chehab 
49669a0bf528SMauro Carvalho Chehab 		mutex_init(&state->internal->demod_lock);
49679a0bf528SMauro Carvalho Chehab 		mutex_init(&state->internal->tuner_lock);
49689a0bf528SMauro Carvalho Chehab 
49699a0bf528SMauro Carvalho Chehab 		if (stv090x_setup(&state->frontend) < 0) {
49709a0bf528SMauro Carvalho Chehab 			dprintk(FE_ERROR, 1, "Error setting up device");
49719a0bf528SMauro Carvalho Chehab 			goto err_remove;
49729a0bf528SMauro Carvalho Chehab 		}
49739a0bf528SMauro Carvalho Chehab 	}
49749a0bf528SMauro Carvalho Chehab 
4975f9040ef3SEvgeny Plehov 	if (state->internal->dev_ver >= 0x30)
4976f9040ef3SEvgeny Plehov 		state->frontend.ops.info.caps |= FE_CAN_MULTISTREAM;
4977f9040ef3SEvgeny Plehov 
49789a0bf528SMauro Carvalho Chehab 	/* workaround for stuck DiSEqC output */
49799a0bf528SMauro Carvalho Chehab 	if (config->diseqc_envelope_mode)
49809a0bf528SMauro Carvalho Chehab 		stv090x_send_diseqc_burst(&state->frontend, SEC_MINI_A);
49819a0bf528SMauro Carvalho Chehab 
4982a2ea5561SMauro Carvalho Chehab 	config->set_gpio = stv090x_set_gpio;
4983a2ea5561SMauro Carvalho Chehab 
49849a0bf528SMauro Carvalho Chehab 	dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x",
49859a0bf528SMauro Carvalho Chehab 	       state->device == STV0900 ? "STV0900" : "STV0903",
49869a0bf528SMauro Carvalho Chehab 	       demod,
49879a0bf528SMauro Carvalho Chehab 	       state->internal->dev_ver);
49889a0bf528SMauro Carvalho Chehab 
49899a0bf528SMauro Carvalho Chehab 	return &state->frontend;
49909a0bf528SMauro Carvalho Chehab 
49919a0bf528SMauro Carvalho Chehab err_remove:
49929a0bf528SMauro Carvalho Chehab 	remove_dev(state->internal);
49939a0bf528SMauro Carvalho Chehab 	kfree(state->internal);
49949a0bf528SMauro Carvalho Chehab error:
49959a0bf528SMauro Carvalho Chehab 	kfree(state);
49969a0bf528SMauro Carvalho Chehab 	return NULL;
49979a0bf528SMauro Carvalho Chehab }
49989a0bf528SMauro Carvalho Chehab EXPORT_SYMBOL(stv090x_attach);
49999a0bf528SMauro Carvalho Chehab MODULE_PARM_DESC(verbose, "Set Verbosity level");
50009a0bf528SMauro Carvalho Chehab MODULE_AUTHOR("Manu Abraham");
50019a0bf528SMauro Carvalho Chehab MODULE_DESCRIPTION("STV090x Multi-Std Broadcast frontend");
50029a0bf528SMauro Carvalho Chehab MODULE_LICENSE("GPL");
5003