174ba9207SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
29a0bf528SMauro Carvalho Chehab /*
39a0bf528SMauro Carvalho Chehab STB0899 Multistandard Frontend driver
49a0bf528SMauro Carvalho Chehab Copyright (C) Manu Abraham (abraham.manu@gmail.com)
59a0bf528SMauro Carvalho Chehab
69a0bf528SMauro Carvalho Chehab Copyright (C) ST Microelectronics
79a0bf528SMauro Carvalho Chehab
89a0bf528SMauro Carvalho Chehab */
99a0bf528SMauro Carvalho Chehab
109a0bf528SMauro Carvalho Chehab #include <linux/init.h>
113edd59abSAsaf Vertz #include <linux/jiffies.h>
129a0bf528SMauro Carvalho Chehab #include <linux/kernel.h>
139a0bf528SMauro Carvalho Chehab #include <linux/module.h>
149a0bf528SMauro Carvalho Chehab #include <linux/slab.h>
159a0bf528SMauro Carvalho Chehab #include <linux/string.h>
169a0bf528SMauro Carvalho Chehab
179a0bf528SMauro Carvalho Chehab #include <linux/dvb/frontend.h>
18fada1935SMauro Carvalho Chehab #include <media/dvb_frontend.h>
199a0bf528SMauro Carvalho Chehab
209a0bf528SMauro Carvalho Chehab #include "stb0899_drv.h"
219a0bf528SMauro Carvalho Chehab #include "stb0899_priv.h"
229a0bf528SMauro Carvalho Chehab #include "stb0899_reg.h"
239a0bf528SMauro Carvalho Chehab
24ba474642SMauro Carvalho Chehab /* Max transfer size done by I2C transfer functions */
25ba474642SMauro Carvalho Chehab #define MAX_XFER_SIZE 64
26ba474642SMauro Carvalho Chehab
279a0bf528SMauro Carvalho Chehab static unsigned int verbose = 0;//1;
289a0bf528SMauro Carvalho Chehab module_param(verbose, int, 0644);
299a0bf528SMauro Carvalho Chehab
309a0bf528SMauro Carvalho Chehab /* C/N in dB/10, NIRM/NIRL */
319a0bf528SMauro Carvalho Chehab static const struct stb0899_tab stb0899_cn_tab[] = {
329a0bf528SMauro Carvalho Chehab { 200, 2600 },
339a0bf528SMauro Carvalho Chehab { 190, 2700 },
349a0bf528SMauro Carvalho Chehab { 180, 2860 },
359a0bf528SMauro Carvalho Chehab { 170, 3020 },
369a0bf528SMauro Carvalho Chehab { 160, 3210 },
379a0bf528SMauro Carvalho Chehab { 150, 3440 },
389a0bf528SMauro Carvalho Chehab { 140, 3710 },
399a0bf528SMauro Carvalho Chehab { 130, 4010 },
409a0bf528SMauro Carvalho Chehab { 120, 4360 },
419a0bf528SMauro Carvalho Chehab { 110, 4740 },
429a0bf528SMauro Carvalho Chehab { 100, 5190 },
439a0bf528SMauro Carvalho Chehab { 90, 5670 },
449a0bf528SMauro Carvalho Chehab { 80, 6200 },
459a0bf528SMauro Carvalho Chehab { 70, 6770 },
469a0bf528SMauro Carvalho Chehab { 60, 7360 },
479a0bf528SMauro Carvalho Chehab { 50, 7970 },
489a0bf528SMauro Carvalho Chehab { 40, 8250 },
499a0bf528SMauro Carvalho Chehab { 30, 9000 },
509a0bf528SMauro Carvalho Chehab { 20, 9450 },
519a0bf528SMauro Carvalho Chehab { 15, 9600 },
529a0bf528SMauro Carvalho Chehab };
539a0bf528SMauro Carvalho Chehab
549a0bf528SMauro Carvalho Chehab /* DVB-S AGCIQ_VALUE vs. signal level in dBm/10.
559a0bf528SMauro Carvalho Chehab * As measured, connected to a modulator.
569a0bf528SMauro Carvalho Chehab * -8.0 to -50.0 dBm directly connected,
579a0bf528SMauro Carvalho Chehab * -52.0 to -74.8 with extra attenuation.
589a0bf528SMauro Carvalho Chehab * Cut-off to AGCIQ_VALUE = 0x80 below -74.8dBm.
599a0bf528SMauro Carvalho Chehab * Crude linear extrapolation below -84.8dBm and above -8.0dBm.
609a0bf528SMauro Carvalho Chehab */
619a0bf528SMauro Carvalho Chehab static const struct stb0899_tab stb0899_dvbsrf_tab[] = {
629a0bf528SMauro Carvalho Chehab { -750, -128 },
639a0bf528SMauro Carvalho Chehab { -748, -94 },
649a0bf528SMauro Carvalho Chehab { -745, -92 },
659a0bf528SMauro Carvalho Chehab { -735, -90 },
669a0bf528SMauro Carvalho Chehab { -720, -87 },
679a0bf528SMauro Carvalho Chehab { -670, -77 },
689a0bf528SMauro Carvalho Chehab { -640, -70 },
699a0bf528SMauro Carvalho Chehab { -610, -62 },
709a0bf528SMauro Carvalho Chehab { -600, -60 },
719a0bf528SMauro Carvalho Chehab { -590, -56 },
729a0bf528SMauro Carvalho Chehab { -560, -41 },
739a0bf528SMauro Carvalho Chehab { -540, -25 },
749a0bf528SMauro Carvalho Chehab { -530, -17 },
759a0bf528SMauro Carvalho Chehab { -520, -11 },
769a0bf528SMauro Carvalho Chehab { -500, 1 },
779a0bf528SMauro Carvalho Chehab { -490, 6 },
789a0bf528SMauro Carvalho Chehab { -480, 10 },
799a0bf528SMauro Carvalho Chehab { -440, 22 },
809a0bf528SMauro Carvalho Chehab { -420, 27 },
819a0bf528SMauro Carvalho Chehab { -400, 31 },
829a0bf528SMauro Carvalho Chehab { -380, 34 },
839a0bf528SMauro Carvalho Chehab { -340, 40 },
849a0bf528SMauro Carvalho Chehab { -320, 43 },
859a0bf528SMauro Carvalho Chehab { -280, 48 },
869a0bf528SMauro Carvalho Chehab { -250, 52 },
879a0bf528SMauro Carvalho Chehab { -230, 55 },
889a0bf528SMauro Carvalho Chehab { -180, 61 },
899a0bf528SMauro Carvalho Chehab { -140, 66 },
909a0bf528SMauro Carvalho Chehab { -90, 73 },
919a0bf528SMauro Carvalho Chehab { -80, 74 },
929a0bf528SMauro Carvalho Chehab { 500, 127 }
939a0bf528SMauro Carvalho Chehab };
949a0bf528SMauro Carvalho Chehab
959a0bf528SMauro Carvalho Chehab /* DVB-S2 IF_AGC_GAIN vs. signal level in dBm/10.
969a0bf528SMauro Carvalho Chehab * As measured, connected to a modulator.
979a0bf528SMauro Carvalho Chehab * -8.0 to -50.1 dBm directly connected,
989a0bf528SMauro Carvalho Chehab * -53.0 to -76.6 with extra attenuation.
999a0bf528SMauro Carvalho Chehab * Cut-off to IF_AGC_GAIN = 0x3fff below -76.6dBm.
1009a0bf528SMauro Carvalho Chehab * Crude linear extrapolation below -76.6dBm and above -8.0dBm.
1019a0bf528SMauro Carvalho Chehab */
1029a0bf528SMauro Carvalho Chehab static const struct stb0899_tab stb0899_dvbs2rf_tab[] = {
1039a0bf528SMauro Carvalho Chehab { 700, 0 },
1049a0bf528SMauro Carvalho Chehab { -80, 3217 },
1059a0bf528SMauro Carvalho Chehab { -150, 3893 },
1069a0bf528SMauro Carvalho Chehab { -190, 4217 },
1079a0bf528SMauro Carvalho Chehab { -240, 4621 },
1089a0bf528SMauro Carvalho Chehab { -280, 4945 },
1099a0bf528SMauro Carvalho Chehab { -320, 5273 },
1109a0bf528SMauro Carvalho Chehab { -350, 5545 },
1119a0bf528SMauro Carvalho Chehab { -370, 5741 },
1129a0bf528SMauro Carvalho Chehab { -410, 6147 },
1139a0bf528SMauro Carvalho Chehab { -450, 6671 },
1149a0bf528SMauro Carvalho Chehab { -490, 7413 },
1159a0bf528SMauro Carvalho Chehab { -501, 7665 },
1169a0bf528SMauro Carvalho Chehab { -530, 8767 },
1179a0bf528SMauro Carvalho Chehab { -560, 10219 },
1189a0bf528SMauro Carvalho Chehab { -580, 10939 },
1199a0bf528SMauro Carvalho Chehab { -590, 11518 },
1209a0bf528SMauro Carvalho Chehab { -600, 11723 },
1219a0bf528SMauro Carvalho Chehab { -650, 12659 },
1229a0bf528SMauro Carvalho Chehab { -690, 13219 },
1239a0bf528SMauro Carvalho Chehab { -730, 13645 },
1249a0bf528SMauro Carvalho Chehab { -750, 13909 },
1259a0bf528SMauro Carvalho Chehab { -766, 14153 },
1269a0bf528SMauro Carvalho Chehab { -950, 16383 }
1279a0bf528SMauro Carvalho Chehab };
1289a0bf528SMauro Carvalho Chehab
1299a0bf528SMauro Carvalho Chehab /* DVB-S2 Es/N0 quant in dB/100 vs read value * 100*/
1309a0bf528SMauro Carvalho Chehab static struct stb0899_tab stb0899_quant_tab[] = {
1319a0bf528SMauro Carvalho Chehab { 0, 0 },
1329a0bf528SMauro Carvalho Chehab { 0, 100 },
1339a0bf528SMauro Carvalho Chehab { 600, 200 },
1349a0bf528SMauro Carvalho Chehab { 950, 299 },
1359a0bf528SMauro Carvalho Chehab { 1200, 398 },
1369a0bf528SMauro Carvalho Chehab { 1400, 501 },
1379a0bf528SMauro Carvalho Chehab { 1560, 603 },
1389a0bf528SMauro Carvalho Chehab { 1690, 700 },
1399a0bf528SMauro Carvalho Chehab { 1810, 804 },
1409a0bf528SMauro Carvalho Chehab { 1910, 902 },
1419a0bf528SMauro Carvalho Chehab { 2000, 1000 },
1429a0bf528SMauro Carvalho Chehab { 2080, 1096 },
1439a0bf528SMauro Carvalho Chehab { 2160, 1202 },
1449a0bf528SMauro Carvalho Chehab { 2230, 1303 },
1459a0bf528SMauro Carvalho Chehab { 2350, 1496 },
1469a0bf528SMauro Carvalho Chehab { 2410, 1603 },
1479a0bf528SMauro Carvalho Chehab { 2460, 1698 },
1489a0bf528SMauro Carvalho Chehab { 2510, 1799 },
1499a0bf528SMauro Carvalho Chehab { 2600, 1995 },
1509a0bf528SMauro Carvalho Chehab { 2650, 2113 },
1519a0bf528SMauro Carvalho Chehab { 2690, 2213 },
1529a0bf528SMauro Carvalho Chehab { 2720, 2291 },
1539a0bf528SMauro Carvalho Chehab { 2760, 2399 },
1549a0bf528SMauro Carvalho Chehab { 2800, 2512 },
1559a0bf528SMauro Carvalho Chehab { 2860, 2692 },
1569a0bf528SMauro Carvalho Chehab { 2930, 2917 },
1579a0bf528SMauro Carvalho Chehab { 2960, 3020 },
1589a0bf528SMauro Carvalho Chehab { 3010, 3199 },
1599a0bf528SMauro Carvalho Chehab { 3040, 3311 },
1609a0bf528SMauro Carvalho Chehab { 3060, 3388 },
1619a0bf528SMauro Carvalho Chehab { 3120, 3631 },
1629a0bf528SMauro Carvalho Chehab { 3190, 3936 },
1639a0bf528SMauro Carvalho Chehab { 3400, 5012 },
1649a0bf528SMauro Carvalho Chehab { 3610, 6383 },
1659a0bf528SMauro Carvalho Chehab { 3800, 7943 },
1669a0bf528SMauro Carvalho Chehab { 4210, 12735 },
1679a0bf528SMauro Carvalho Chehab { 4500, 17783 },
1689a0bf528SMauro Carvalho Chehab { 4690, 22131 },
1699a0bf528SMauro Carvalho Chehab { 4810, 25410 }
1709a0bf528SMauro Carvalho Chehab };
1719a0bf528SMauro Carvalho Chehab
1729a0bf528SMauro Carvalho Chehab /* DVB-S2 Es/N0 estimate in dB/100 vs read value */
1739a0bf528SMauro Carvalho Chehab static struct stb0899_tab stb0899_est_tab[] = {
1749a0bf528SMauro Carvalho Chehab { 0, 0 },
1759a0bf528SMauro Carvalho Chehab { 0, 1 },
1769a0bf528SMauro Carvalho Chehab { 301, 2 },
1779a0bf528SMauro Carvalho Chehab { 1204, 16 },
1789a0bf528SMauro Carvalho Chehab { 1806, 64 },
1799a0bf528SMauro Carvalho Chehab { 2408, 256 },
1809a0bf528SMauro Carvalho Chehab { 2709, 512 },
1819a0bf528SMauro Carvalho Chehab { 3010, 1023 },
1829a0bf528SMauro Carvalho Chehab { 3311, 2046 },
1839a0bf528SMauro Carvalho Chehab { 3612, 4093 },
1849a0bf528SMauro Carvalho Chehab { 3823, 6653 },
1859a0bf528SMauro Carvalho Chehab { 3913, 8185 },
1869a0bf528SMauro Carvalho Chehab { 4010, 10233 },
1879a0bf528SMauro Carvalho Chehab { 4107, 12794 },
1889a0bf528SMauro Carvalho Chehab { 4214, 16368 },
1899a0bf528SMauro Carvalho Chehab { 4266, 18450 },
1909a0bf528SMauro Carvalho Chehab { 4311, 20464 },
1919a0bf528SMauro Carvalho Chehab { 4353, 22542 },
1929a0bf528SMauro Carvalho Chehab { 4391, 24604 },
1939a0bf528SMauro Carvalho Chehab { 4425, 26607 },
1949a0bf528SMauro Carvalho Chehab { 4457, 28642 },
1959a0bf528SMauro Carvalho Chehab { 4487, 30690 },
1969a0bf528SMauro Carvalho Chehab { 4515, 32734 },
1979a0bf528SMauro Carvalho Chehab { 4612, 40926 },
1989a0bf528SMauro Carvalho Chehab { 4692, 49204 },
1999a0bf528SMauro Carvalho Chehab { 4816, 65464 },
2009a0bf528SMauro Carvalho Chehab { 4913, 81846 },
2019a0bf528SMauro Carvalho Chehab { 4993, 98401 },
2029a0bf528SMauro Carvalho Chehab { 5060, 114815 },
2039a0bf528SMauro Carvalho Chehab { 5118, 131220 },
2049a0bf528SMauro Carvalho Chehab { 5200, 158489 },
2059a0bf528SMauro Carvalho Chehab { 5300, 199526 },
2069a0bf528SMauro Carvalho Chehab { 5400, 251189 },
2079a0bf528SMauro Carvalho Chehab { 5500, 316228 },
2089a0bf528SMauro Carvalho Chehab { 5600, 398107 },
2099a0bf528SMauro Carvalho Chehab { 5720, 524807 },
2109a0bf528SMauro Carvalho Chehab { 5721, 526017 },
2119a0bf528SMauro Carvalho Chehab };
2129a0bf528SMauro Carvalho Chehab
_stb0899_read_reg(struct stb0899_state * state,unsigned int reg)2139a0bf528SMauro Carvalho Chehab static int _stb0899_read_reg(struct stb0899_state *state, unsigned int reg)
2149a0bf528SMauro Carvalho Chehab {
2159a0bf528SMauro Carvalho Chehab int ret;
2169a0bf528SMauro Carvalho Chehab
2179a0bf528SMauro Carvalho Chehab u8 b0[] = { reg >> 8, reg & 0xff };
2189a0bf528SMauro Carvalho Chehab u8 buf;
2199a0bf528SMauro Carvalho Chehab
2209a0bf528SMauro Carvalho Chehab struct i2c_msg msg[] = {
2219a0bf528SMauro Carvalho Chehab {
2229a0bf528SMauro Carvalho Chehab .addr = state->config->demod_address,
2239a0bf528SMauro Carvalho Chehab .flags = 0,
2249a0bf528SMauro Carvalho Chehab .buf = b0,
2259a0bf528SMauro Carvalho Chehab .len = 2
2269a0bf528SMauro Carvalho Chehab },{
2279a0bf528SMauro Carvalho Chehab .addr = state->config->demod_address,
2289a0bf528SMauro Carvalho Chehab .flags = I2C_M_RD,
2299a0bf528SMauro Carvalho Chehab .buf = &buf,
2309a0bf528SMauro Carvalho Chehab .len = 1
2319a0bf528SMauro Carvalho Chehab }
2329a0bf528SMauro Carvalho Chehab };
2339a0bf528SMauro Carvalho Chehab
2349a0bf528SMauro Carvalho Chehab ret = i2c_transfer(state->i2c, msg, 2);
2359a0bf528SMauro Carvalho Chehab if (ret != 2) {
2369a0bf528SMauro Carvalho Chehab if (ret != -ERESTARTSYS)
2379a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_ERROR, 1,
2389a0bf528SMauro Carvalho Chehab "Read error, Reg=[0x%02x], Status=%d",
2399a0bf528SMauro Carvalho Chehab reg, ret);
2409a0bf528SMauro Carvalho Chehab
2419a0bf528SMauro Carvalho Chehab return ret < 0 ? ret : -EREMOTEIO;
2429a0bf528SMauro Carvalho Chehab }
2439a0bf528SMauro Carvalho Chehab if (unlikely(*state->verbose >= FE_DEBUGREG))
2449a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
2459a0bf528SMauro Carvalho Chehab reg, buf);
2469a0bf528SMauro Carvalho Chehab
2479a0bf528SMauro Carvalho Chehab return (unsigned int)buf;
2489a0bf528SMauro Carvalho Chehab }
2499a0bf528SMauro Carvalho Chehab
stb0899_read_reg(struct stb0899_state * state,unsigned int reg)2509a0bf528SMauro Carvalho Chehab int stb0899_read_reg(struct stb0899_state *state, unsigned int reg)
2519a0bf528SMauro Carvalho Chehab {
2529a0bf528SMauro Carvalho Chehab int result;
2539a0bf528SMauro Carvalho Chehab
2549a0bf528SMauro Carvalho Chehab result = _stb0899_read_reg(state, reg);
2559a0bf528SMauro Carvalho Chehab /*
2569a0bf528SMauro Carvalho Chehab * Bug ID 9:
2579a0bf528SMauro Carvalho Chehab * access to 0xf2xx/0xf6xx
2589a0bf528SMauro Carvalho Chehab * must be followed by read from 0xf2ff/0xf6ff.
2599a0bf528SMauro Carvalho Chehab */
2609a0bf528SMauro Carvalho Chehab if ((reg != 0xf2ff) && (reg != 0xf6ff) &&
2619a0bf528SMauro Carvalho Chehab (((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600)))
2629a0bf528SMauro Carvalho Chehab _stb0899_read_reg(state, (reg | 0x00ff));
2639a0bf528SMauro Carvalho Chehab
2649a0bf528SMauro Carvalho Chehab return result;
2659a0bf528SMauro Carvalho Chehab }
2669a0bf528SMauro Carvalho Chehab
_stb0899_read_s2reg(struct stb0899_state * state,u32 stb0899_i2cdev,u32 stb0899_base_addr,u16 stb0899_reg_offset)2679a0bf528SMauro Carvalho Chehab u32 _stb0899_read_s2reg(struct stb0899_state *state,
2689a0bf528SMauro Carvalho Chehab u32 stb0899_i2cdev,
2699a0bf528SMauro Carvalho Chehab u32 stb0899_base_addr,
2709a0bf528SMauro Carvalho Chehab u16 stb0899_reg_offset)
2719a0bf528SMauro Carvalho Chehab {
2729a0bf528SMauro Carvalho Chehab int status;
2739a0bf528SMauro Carvalho Chehab u32 data;
2749a0bf528SMauro Carvalho Chehab u8 buf[7] = { 0 };
2759a0bf528SMauro Carvalho Chehab u16 tmpaddr;
2769a0bf528SMauro Carvalho Chehab
2779a0bf528SMauro Carvalho Chehab u8 buf_0[] = {
2789a0bf528SMauro Carvalho Chehab GETBYTE(stb0899_i2cdev, BYTE1), /* 0xf3 S2 Base Address (MSB) */
2799a0bf528SMauro Carvalho Chehab GETBYTE(stb0899_i2cdev, BYTE0), /* 0xfc S2 Base Address (LSB) */
2809a0bf528SMauro Carvalho Chehab GETBYTE(stb0899_base_addr, BYTE0), /* 0x00 Base Address (LSB) */
2819a0bf528SMauro Carvalho Chehab GETBYTE(stb0899_base_addr, BYTE1), /* 0x04 Base Address (LSB) */
2829a0bf528SMauro Carvalho Chehab GETBYTE(stb0899_base_addr, BYTE2), /* 0x00 Base Address (MSB) */
2839a0bf528SMauro Carvalho Chehab GETBYTE(stb0899_base_addr, BYTE3), /* 0x00 Base Address (MSB) */
2849a0bf528SMauro Carvalho Chehab };
2859a0bf528SMauro Carvalho Chehab u8 buf_1[] = {
2869a0bf528SMauro Carvalho Chehab 0x00, /* 0xf3 Reg Offset */
2879a0bf528SMauro Carvalho Chehab 0x00, /* 0x44 Reg Offset */
2889a0bf528SMauro Carvalho Chehab };
2899a0bf528SMauro Carvalho Chehab
2909a0bf528SMauro Carvalho Chehab struct i2c_msg msg_0 = {
2919a0bf528SMauro Carvalho Chehab .addr = state->config->demod_address,
2929a0bf528SMauro Carvalho Chehab .flags = 0,
2939a0bf528SMauro Carvalho Chehab .buf = buf_0,
2949a0bf528SMauro Carvalho Chehab .len = 6
2959a0bf528SMauro Carvalho Chehab };
2969a0bf528SMauro Carvalho Chehab
2979a0bf528SMauro Carvalho Chehab struct i2c_msg msg_1 = {
2989a0bf528SMauro Carvalho Chehab .addr = state->config->demod_address,
2999a0bf528SMauro Carvalho Chehab .flags = 0,
3009a0bf528SMauro Carvalho Chehab .buf = buf_1,
3019a0bf528SMauro Carvalho Chehab .len = 2
3029a0bf528SMauro Carvalho Chehab };
3039a0bf528SMauro Carvalho Chehab
3049a0bf528SMauro Carvalho Chehab struct i2c_msg msg_r = {
3059a0bf528SMauro Carvalho Chehab .addr = state->config->demod_address,
3069a0bf528SMauro Carvalho Chehab .flags = I2C_M_RD,
3079a0bf528SMauro Carvalho Chehab .buf = buf,
3089a0bf528SMauro Carvalho Chehab .len = 4
3099a0bf528SMauro Carvalho Chehab };
3109a0bf528SMauro Carvalho Chehab
3119a0bf528SMauro Carvalho Chehab tmpaddr = stb0899_reg_offset & 0xff00;
3129a0bf528SMauro Carvalho Chehab if (!(stb0899_reg_offset & 0x8))
3139a0bf528SMauro Carvalho Chehab tmpaddr = stb0899_reg_offset | 0x20;
3149a0bf528SMauro Carvalho Chehab
3159a0bf528SMauro Carvalho Chehab buf_1[0] = GETBYTE(tmpaddr, BYTE1);
3169a0bf528SMauro Carvalho Chehab buf_1[1] = GETBYTE(tmpaddr, BYTE0);
3179a0bf528SMauro Carvalho Chehab
3189a0bf528SMauro Carvalho Chehab status = i2c_transfer(state->i2c, &msg_0, 1);
3199a0bf528SMauro Carvalho Chehab if (status < 1) {
3209a0bf528SMauro Carvalho Chehab if (status != -ERESTARTSYS)
3219a0bf528SMauro Carvalho Chehab printk(KERN_ERR "%s ERR(1), Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Status=%d\n",
3229a0bf528SMauro Carvalho Chehab __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, status);
3239a0bf528SMauro Carvalho Chehab
3249a0bf528SMauro Carvalho Chehab goto err;
3259a0bf528SMauro Carvalho Chehab }
3269a0bf528SMauro Carvalho Chehab
3279a0bf528SMauro Carvalho Chehab /* Dummy */
3289a0bf528SMauro Carvalho Chehab status = i2c_transfer(state->i2c, &msg_1, 1);
3299a0bf528SMauro Carvalho Chehab if (status < 1)
3309a0bf528SMauro Carvalho Chehab goto err;
3319a0bf528SMauro Carvalho Chehab
3329a0bf528SMauro Carvalho Chehab status = i2c_transfer(state->i2c, &msg_r, 1);
3339a0bf528SMauro Carvalho Chehab if (status < 1)
3349a0bf528SMauro Carvalho Chehab goto err;
3359a0bf528SMauro Carvalho Chehab
3369a0bf528SMauro Carvalho Chehab buf_1[0] = GETBYTE(stb0899_reg_offset, BYTE1);
3379a0bf528SMauro Carvalho Chehab buf_1[1] = GETBYTE(stb0899_reg_offset, BYTE0);
3389a0bf528SMauro Carvalho Chehab
3399a0bf528SMauro Carvalho Chehab /* Actual */
3409a0bf528SMauro Carvalho Chehab status = i2c_transfer(state->i2c, &msg_1, 1);
3419a0bf528SMauro Carvalho Chehab if (status < 1) {
3429a0bf528SMauro Carvalho Chehab if (status != -ERESTARTSYS)
3439a0bf528SMauro Carvalho Chehab printk(KERN_ERR "%s ERR(2), Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Status=%d\n",
3449a0bf528SMauro Carvalho Chehab __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, status);
3459a0bf528SMauro Carvalho Chehab goto err;
3469a0bf528SMauro Carvalho Chehab }
3479a0bf528SMauro Carvalho Chehab
3489a0bf528SMauro Carvalho Chehab status = i2c_transfer(state->i2c, &msg_r, 1);
3499a0bf528SMauro Carvalho Chehab if (status < 1) {
3509a0bf528SMauro Carvalho Chehab if (status != -ERESTARTSYS)
3519a0bf528SMauro Carvalho Chehab printk(KERN_ERR "%s ERR(3), Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Status=%d\n",
3529a0bf528SMauro Carvalho Chehab __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, status);
3539a0bf528SMauro Carvalho Chehab return status < 0 ? status : -EREMOTEIO;
3549a0bf528SMauro Carvalho Chehab }
3559a0bf528SMauro Carvalho Chehab
3569a0bf528SMauro Carvalho Chehab data = MAKEWORD32(buf[3], buf[2], buf[1], buf[0]);
3579a0bf528SMauro Carvalho Chehab if (unlikely(*state->verbose >= FE_DEBUGREG))
3589a0bf528SMauro Carvalho Chehab printk(KERN_DEBUG "%s Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Data=[0x%08x]\n",
3599a0bf528SMauro Carvalho Chehab __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, data);
3609a0bf528SMauro Carvalho Chehab
3619a0bf528SMauro Carvalho Chehab return data;
3629a0bf528SMauro Carvalho Chehab
3639a0bf528SMauro Carvalho Chehab err:
3649a0bf528SMauro Carvalho Chehab return status < 0 ? status : -EREMOTEIO;
3659a0bf528SMauro Carvalho Chehab }
3669a0bf528SMauro Carvalho Chehab
stb0899_write_s2reg(struct stb0899_state * state,u32 stb0899_i2cdev,u32 stb0899_base_addr,u16 stb0899_reg_offset,u32 stb0899_data)3679a0bf528SMauro Carvalho Chehab int stb0899_write_s2reg(struct stb0899_state *state,
3689a0bf528SMauro Carvalho Chehab u32 stb0899_i2cdev,
3699a0bf528SMauro Carvalho Chehab u32 stb0899_base_addr,
3709a0bf528SMauro Carvalho Chehab u16 stb0899_reg_offset,
3719a0bf528SMauro Carvalho Chehab u32 stb0899_data)
3729a0bf528SMauro Carvalho Chehab {
3739a0bf528SMauro Carvalho Chehab int status;
3749a0bf528SMauro Carvalho Chehab
3759a0bf528SMauro Carvalho Chehab /* Base Address Setup */
3769a0bf528SMauro Carvalho Chehab u8 buf_0[] = {
3779a0bf528SMauro Carvalho Chehab GETBYTE(stb0899_i2cdev, BYTE1), /* 0xf3 S2 Base Address (MSB) */
3789a0bf528SMauro Carvalho Chehab GETBYTE(stb0899_i2cdev, BYTE0), /* 0xfc S2 Base Address (LSB) */
3799a0bf528SMauro Carvalho Chehab GETBYTE(stb0899_base_addr, BYTE0), /* 0x00 Base Address (LSB) */
3809a0bf528SMauro Carvalho Chehab GETBYTE(stb0899_base_addr, BYTE1), /* 0x04 Base Address (LSB) */
3819a0bf528SMauro Carvalho Chehab GETBYTE(stb0899_base_addr, BYTE2), /* 0x00 Base Address (MSB) */
3829a0bf528SMauro Carvalho Chehab GETBYTE(stb0899_base_addr, BYTE3), /* 0x00 Base Address (MSB) */
3839a0bf528SMauro Carvalho Chehab };
3849a0bf528SMauro Carvalho Chehab u8 buf_1[] = {
3859a0bf528SMauro Carvalho Chehab 0x00, /* 0xf3 Reg Offset */
3869a0bf528SMauro Carvalho Chehab 0x00, /* 0x44 Reg Offset */
3879a0bf528SMauro Carvalho Chehab 0x00, /* data */
3889a0bf528SMauro Carvalho Chehab 0x00, /* data */
3899a0bf528SMauro Carvalho Chehab 0x00, /* data */
3909a0bf528SMauro Carvalho Chehab 0x00, /* data */
3919a0bf528SMauro Carvalho Chehab };
3929a0bf528SMauro Carvalho Chehab
3939a0bf528SMauro Carvalho Chehab struct i2c_msg msg_0 = {
3949a0bf528SMauro Carvalho Chehab .addr = state->config->demod_address,
3959a0bf528SMauro Carvalho Chehab .flags = 0,
3969a0bf528SMauro Carvalho Chehab .buf = buf_0,
3979a0bf528SMauro Carvalho Chehab .len = 6
3989a0bf528SMauro Carvalho Chehab };
3999a0bf528SMauro Carvalho Chehab
4009a0bf528SMauro Carvalho Chehab struct i2c_msg msg_1 = {
4019a0bf528SMauro Carvalho Chehab .addr = state->config->demod_address,
4029a0bf528SMauro Carvalho Chehab .flags = 0,
4039a0bf528SMauro Carvalho Chehab .buf = buf_1,
4049a0bf528SMauro Carvalho Chehab .len = 6
4059a0bf528SMauro Carvalho Chehab };
4069a0bf528SMauro Carvalho Chehab
4079a0bf528SMauro Carvalho Chehab buf_1[0] = GETBYTE(stb0899_reg_offset, BYTE1);
4089a0bf528SMauro Carvalho Chehab buf_1[1] = GETBYTE(stb0899_reg_offset, BYTE0);
4099a0bf528SMauro Carvalho Chehab buf_1[2] = GETBYTE(stb0899_data, BYTE0);
4109a0bf528SMauro Carvalho Chehab buf_1[3] = GETBYTE(stb0899_data, BYTE1);
4119a0bf528SMauro Carvalho Chehab buf_1[4] = GETBYTE(stb0899_data, BYTE2);
4129a0bf528SMauro Carvalho Chehab buf_1[5] = GETBYTE(stb0899_data, BYTE3);
4139a0bf528SMauro Carvalho Chehab
4149a0bf528SMauro Carvalho Chehab if (unlikely(*state->verbose >= FE_DEBUGREG))
4159a0bf528SMauro Carvalho Chehab printk(KERN_DEBUG "%s Device=[0x%04x], Base Address=[0x%08x], Offset=[0x%04x], Data=[0x%08x]\n",
4169a0bf528SMauro Carvalho Chehab __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, stb0899_data);
4179a0bf528SMauro Carvalho Chehab
4189a0bf528SMauro Carvalho Chehab status = i2c_transfer(state->i2c, &msg_0, 1);
4199a0bf528SMauro Carvalho Chehab if (unlikely(status < 1)) {
4209a0bf528SMauro Carvalho Chehab if (status != -ERESTARTSYS)
4219a0bf528SMauro Carvalho Chehab printk(KERN_ERR "%s ERR (1), Device=[0x%04x], Base Address=[0x%08x], Offset=[0x%04x], Data=[0x%08x], status=%d\n",
4229a0bf528SMauro Carvalho Chehab __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, stb0899_data, status);
4239a0bf528SMauro Carvalho Chehab goto err;
4249a0bf528SMauro Carvalho Chehab }
4259a0bf528SMauro Carvalho Chehab status = i2c_transfer(state->i2c, &msg_1, 1);
4269a0bf528SMauro Carvalho Chehab if (unlikely(status < 1)) {
4279a0bf528SMauro Carvalho Chehab if (status != -ERESTARTSYS)
4289a0bf528SMauro Carvalho Chehab printk(KERN_ERR "%s ERR (2), Device=[0x%04x], Base Address=[0x%08x], Offset=[0x%04x], Data=[0x%08x], status=%d\n",
4299a0bf528SMauro Carvalho Chehab __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, stb0899_data, status);
4309a0bf528SMauro Carvalho Chehab
4319a0bf528SMauro Carvalho Chehab return status < 0 ? status : -EREMOTEIO;
4329a0bf528SMauro Carvalho Chehab }
4339a0bf528SMauro Carvalho Chehab
4349a0bf528SMauro Carvalho Chehab return 0;
4359a0bf528SMauro Carvalho Chehab
4369a0bf528SMauro Carvalho Chehab err:
4379a0bf528SMauro Carvalho Chehab return status < 0 ? status : -EREMOTEIO;
4389a0bf528SMauro Carvalho Chehab }
4399a0bf528SMauro Carvalho Chehab
stb0899_read_regs(struct stb0899_state * state,unsigned int reg,u8 * buf,u32 count)4409a0bf528SMauro Carvalho Chehab int stb0899_read_regs(struct stb0899_state *state, unsigned int reg, u8 *buf, u32 count)
4419a0bf528SMauro Carvalho Chehab {
4429a0bf528SMauro Carvalho Chehab int status;
4439a0bf528SMauro Carvalho Chehab
4449a0bf528SMauro Carvalho Chehab u8 b0[] = { reg >> 8, reg & 0xff };
4459a0bf528SMauro Carvalho Chehab
4469a0bf528SMauro Carvalho Chehab struct i2c_msg msg[] = {
4479a0bf528SMauro Carvalho Chehab {
4489a0bf528SMauro Carvalho Chehab .addr = state->config->demod_address,
4499a0bf528SMauro Carvalho Chehab .flags = 0,
4509a0bf528SMauro Carvalho Chehab .buf = b0,
4519a0bf528SMauro Carvalho Chehab .len = 2
4529a0bf528SMauro Carvalho Chehab },{
4539a0bf528SMauro Carvalho Chehab .addr = state->config->demod_address,
4549a0bf528SMauro Carvalho Chehab .flags = I2C_M_RD,
4559a0bf528SMauro Carvalho Chehab .buf = buf,
4569a0bf528SMauro Carvalho Chehab .len = count
4579a0bf528SMauro Carvalho Chehab }
4589a0bf528SMauro Carvalho Chehab };
4599a0bf528SMauro Carvalho Chehab
4609a0bf528SMauro Carvalho Chehab status = i2c_transfer(state->i2c, msg, 2);
4619a0bf528SMauro Carvalho Chehab if (status != 2) {
4629a0bf528SMauro Carvalho Chehab if (status != -ERESTARTSYS)
4639a0bf528SMauro Carvalho Chehab printk(KERN_ERR "%s Read error, Reg=[0x%04x], Count=%u, Status=%d\n",
4649a0bf528SMauro Carvalho Chehab __func__, reg, count, status);
4659a0bf528SMauro Carvalho Chehab goto err;
4669a0bf528SMauro Carvalho Chehab }
4679a0bf528SMauro Carvalho Chehab /*
4689a0bf528SMauro Carvalho Chehab * Bug ID 9:
4699a0bf528SMauro Carvalho Chehab * access to 0xf2xx/0xf6xx
4709a0bf528SMauro Carvalho Chehab * must be followed by read from 0xf2ff/0xf6ff.
4719a0bf528SMauro Carvalho Chehab */
4729a0bf528SMauro Carvalho Chehab if ((reg != 0xf2ff) && (reg != 0xf6ff) &&
4739a0bf528SMauro Carvalho Chehab (((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600)))
4749a0bf528SMauro Carvalho Chehab _stb0899_read_reg(state, (reg | 0x00ff));
4759a0bf528SMauro Carvalho Chehab
476a8cd47d3SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUGREG, 1,
477a8cd47d3SMauro Carvalho Chehab "%s [0x%04x]: %*ph", __func__, reg, count, buf);
4789a0bf528SMauro Carvalho Chehab
4799a0bf528SMauro Carvalho Chehab return 0;
4809a0bf528SMauro Carvalho Chehab err:
4819a0bf528SMauro Carvalho Chehab return status < 0 ? status : -EREMOTEIO;
4829a0bf528SMauro Carvalho Chehab }
4839a0bf528SMauro Carvalho Chehab
stb0899_write_regs(struct stb0899_state * state,unsigned int reg,u8 * data,u32 count)4849a0bf528SMauro Carvalho Chehab int stb0899_write_regs(struct stb0899_state *state, unsigned int reg, u8 *data, u32 count)
4859a0bf528SMauro Carvalho Chehab {
4869a0bf528SMauro Carvalho Chehab int ret;
487ba474642SMauro Carvalho Chehab u8 buf[MAX_XFER_SIZE];
4889a0bf528SMauro Carvalho Chehab struct i2c_msg i2c_msg = {
4899a0bf528SMauro Carvalho Chehab .addr = state->config->demod_address,
4909a0bf528SMauro Carvalho Chehab .flags = 0,
4919a0bf528SMauro Carvalho Chehab .buf = buf,
4929a0bf528SMauro Carvalho Chehab .len = 2 + count
4939a0bf528SMauro Carvalho Chehab };
4949a0bf528SMauro Carvalho Chehab
495ba474642SMauro Carvalho Chehab if (2 + count > sizeof(buf)) {
496ba474642SMauro Carvalho Chehab printk(KERN_WARNING
497ba474642SMauro Carvalho Chehab "%s: i2c wr reg=%04x: len=%d is too big!\n",
498ba474642SMauro Carvalho Chehab KBUILD_MODNAME, reg, count);
499ba474642SMauro Carvalho Chehab return -EINVAL;
500ba474642SMauro Carvalho Chehab }
501ba474642SMauro Carvalho Chehab
5029a0bf528SMauro Carvalho Chehab buf[0] = reg >> 8;
5039a0bf528SMauro Carvalho Chehab buf[1] = reg & 0xff;
5049a0bf528SMauro Carvalho Chehab memcpy(&buf[2], data, count);
5059a0bf528SMauro Carvalho Chehab
506a8cd47d3SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUGREG, 1,
507a8cd47d3SMauro Carvalho Chehab "%s [0x%04x]: %*ph", __func__, reg, count, data);
5089a0bf528SMauro Carvalho Chehab ret = i2c_transfer(state->i2c, &i2c_msg, 1);
5099a0bf528SMauro Carvalho Chehab
5109a0bf528SMauro Carvalho Chehab /*
5119a0bf528SMauro Carvalho Chehab * Bug ID 9:
5129a0bf528SMauro Carvalho Chehab * access to 0xf2xx/0xf6xx
5139a0bf528SMauro Carvalho Chehab * must be followed by read from 0xf2ff/0xf6ff.
5149a0bf528SMauro Carvalho Chehab */
5159a0bf528SMauro Carvalho Chehab if ((((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600)))
5169a0bf528SMauro Carvalho Chehab stb0899_read_reg(state, (reg | 0x00ff));
5179a0bf528SMauro Carvalho Chehab
5189a0bf528SMauro Carvalho Chehab if (ret != 1) {
5199a0bf528SMauro Carvalho Chehab if (ret != -ERESTARTSYS)
5209a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
5219a0bf528SMauro Carvalho Chehab reg, data[0], count, ret);
5229a0bf528SMauro Carvalho Chehab return ret < 0 ? ret : -EREMOTEIO;
5239a0bf528SMauro Carvalho Chehab }
5249a0bf528SMauro Carvalho Chehab
5259a0bf528SMauro Carvalho Chehab return 0;
5269a0bf528SMauro Carvalho Chehab }
5279a0bf528SMauro Carvalho Chehab
stb0899_write_reg(struct stb0899_state * state,unsigned int reg,u8 data)5289a0bf528SMauro Carvalho Chehab int stb0899_write_reg(struct stb0899_state *state, unsigned int reg, u8 data)
5299a0bf528SMauro Carvalho Chehab {
5303cd890dbSArnd Bergmann u8 tmp = data;
5313cd890dbSArnd Bergmann return stb0899_write_regs(state, reg, &tmp, 1);
5329a0bf528SMauro Carvalho Chehab }
5339a0bf528SMauro Carvalho Chehab
5349a0bf528SMauro Carvalho Chehab /*
5359a0bf528SMauro Carvalho Chehab * stb0899_get_mclk
5369a0bf528SMauro Carvalho Chehab * Get STB0899 master clock frequency
5379a0bf528SMauro Carvalho Chehab * ExtClk: external clock frequency (Hz)
5389a0bf528SMauro Carvalho Chehab */
stb0899_get_mclk(struct stb0899_state * state)5399a0bf528SMauro Carvalho Chehab static u32 stb0899_get_mclk(struct stb0899_state *state)
5409a0bf528SMauro Carvalho Chehab {
5419a0bf528SMauro Carvalho Chehab u32 mclk = 0, div = 0;
5429a0bf528SMauro Carvalho Chehab
5439a0bf528SMauro Carvalho Chehab div = stb0899_read_reg(state, STB0899_NCOARSE);
5449a0bf528SMauro Carvalho Chehab mclk = (div + 1) * state->config->xtal_freq / 6;
5459a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "div=%d, mclk=%d", div, mclk);
5469a0bf528SMauro Carvalho Chehab
5479a0bf528SMauro Carvalho Chehab return mclk;
5489a0bf528SMauro Carvalho Chehab }
5499a0bf528SMauro Carvalho Chehab
5509a0bf528SMauro Carvalho Chehab /*
5519a0bf528SMauro Carvalho Chehab * stb0899_set_mclk
5529a0bf528SMauro Carvalho Chehab * Set STB0899 master Clock frequency
5539a0bf528SMauro Carvalho Chehab * Mclk: demodulator master clock
5549a0bf528SMauro Carvalho Chehab * ExtClk: external clock frequency (Hz)
5559a0bf528SMauro Carvalho Chehab */
stb0899_set_mclk(struct stb0899_state * state,u32 Mclk)5569a0bf528SMauro Carvalho Chehab static void stb0899_set_mclk(struct stb0899_state *state, u32 Mclk)
5579a0bf528SMauro Carvalho Chehab {
5589a0bf528SMauro Carvalho Chehab struct stb0899_internal *internal = &state->internal;
5599a0bf528SMauro Carvalho Chehab u8 mdiv = 0;
5609a0bf528SMauro Carvalho Chehab
5619a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "state->config=%p", state->config);
5629a0bf528SMauro Carvalho Chehab mdiv = ((6 * Mclk) / state->config->xtal_freq) - 1;
5639a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "mdiv=%d", mdiv);
5649a0bf528SMauro Carvalho Chehab
5659a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_NCOARSE, mdiv);
5669a0bf528SMauro Carvalho Chehab internal->master_clk = stb0899_get_mclk(state);
5679a0bf528SMauro Carvalho Chehab
5689a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "MasterCLOCK=%d", internal->master_clk);
5699a0bf528SMauro Carvalho Chehab }
5709a0bf528SMauro Carvalho Chehab
stb0899_postproc(struct stb0899_state * state,u8 ctl,int enable)5719a0bf528SMauro Carvalho Chehab static int stb0899_postproc(struct stb0899_state *state, u8 ctl, int enable)
5729a0bf528SMauro Carvalho Chehab {
5739a0bf528SMauro Carvalho Chehab struct stb0899_config *config = state->config;
5749a0bf528SMauro Carvalho Chehab const struct stb0899_postproc *postproc = config->postproc;
5759a0bf528SMauro Carvalho Chehab
5769a0bf528SMauro Carvalho Chehab /* post process event */
5779a0bf528SMauro Carvalho Chehab if (postproc) {
5789a0bf528SMauro Carvalho Chehab if (enable) {
5799a0bf528SMauro Carvalho Chehab if (postproc[ctl].level == STB0899_GPIOPULLUP)
5809a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, postproc[ctl].gpio, 0x02);
5819a0bf528SMauro Carvalho Chehab else
5829a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, postproc[ctl].gpio, 0x82);
5839a0bf528SMauro Carvalho Chehab } else {
5849a0bf528SMauro Carvalho Chehab if (postproc[ctl].level == STB0899_GPIOPULLUP)
5859a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, postproc[ctl].gpio, 0x82);
5869a0bf528SMauro Carvalho Chehab else
5879a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, postproc[ctl].gpio, 0x02);
5889a0bf528SMauro Carvalho Chehab }
5899a0bf528SMauro Carvalho Chehab }
5909a0bf528SMauro Carvalho Chehab return 0;
5919a0bf528SMauro Carvalho Chehab }
5929a0bf528SMauro Carvalho Chehab
stb0899_detach(struct dvb_frontend * fe)593f686c143SMax Kellermann static void stb0899_detach(struct dvb_frontend *fe)
594f686c143SMax Kellermann {
595f686c143SMax Kellermann struct stb0899_state *state = fe->demodulator_priv;
596f686c143SMax Kellermann
597f686c143SMax Kellermann /* post process event */
598f686c143SMax Kellermann stb0899_postproc(state, STB0899_POSTPROC_GPIO_POWER, 0);
599f686c143SMax Kellermann }
600f686c143SMax Kellermann
stb0899_release(struct dvb_frontend * fe)6019a0bf528SMauro Carvalho Chehab static void stb0899_release(struct dvb_frontend *fe)
6029a0bf528SMauro Carvalho Chehab {
6039a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
6049a0bf528SMauro Carvalho Chehab
6059a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Release Frontend");
6069a0bf528SMauro Carvalho Chehab kfree(state);
6079a0bf528SMauro Carvalho Chehab }
6089a0bf528SMauro Carvalho Chehab
6099a0bf528SMauro Carvalho Chehab /*
6109a0bf528SMauro Carvalho Chehab * stb0899_get_alpha
6119a0bf528SMauro Carvalho Chehab * return: rolloff
6129a0bf528SMauro Carvalho Chehab */
stb0899_get_alpha(struct stb0899_state * state)6139a0bf528SMauro Carvalho Chehab static int stb0899_get_alpha(struct stb0899_state *state)
6149a0bf528SMauro Carvalho Chehab {
6159a0bf528SMauro Carvalho Chehab u8 mode_coeff;
6169a0bf528SMauro Carvalho Chehab
6179a0bf528SMauro Carvalho Chehab mode_coeff = stb0899_read_reg(state, STB0899_DEMOD);
6189a0bf528SMauro Carvalho Chehab
6199a0bf528SMauro Carvalho Chehab if (STB0899_GETFIELD(MODECOEFF, mode_coeff) == 1)
6209a0bf528SMauro Carvalho Chehab return 20;
6219a0bf528SMauro Carvalho Chehab else
6229a0bf528SMauro Carvalho Chehab return 35;
6239a0bf528SMauro Carvalho Chehab }
6249a0bf528SMauro Carvalho Chehab
6259a0bf528SMauro Carvalho Chehab /*
6269a0bf528SMauro Carvalho Chehab * stb0899_init_calc
6279a0bf528SMauro Carvalho Chehab */
stb0899_init_calc(struct stb0899_state * state)6289a0bf528SMauro Carvalho Chehab static void stb0899_init_calc(struct stb0899_state *state)
6299a0bf528SMauro Carvalho Chehab {
6309a0bf528SMauro Carvalho Chehab struct stb0899_internal *internal = &state->internal;
6319a0bf528SMauro Carvalho Chehab int master_clk;
6329a0bf528SMauro Carvalho Chehab u8 agc[2];
6339a0bf528SMauro Carvalho Chehab u32 reg;
6349a0bf528SMauro Carvalho Chehab
6359a0bf528SMauro Carvalho Chehab /* Read registers (in burst mode) */
6369a0bf528SMauro Carvalho Chehab stb0899_read_regs(state, STB0899_AGC1REF, agc, 2); /* AGC1R and AGC2O */
6379a0bf528SMauro Carvalho Chehab
6389a0bf528SMauro Carvalho Chehab /* Initial calculations */
6399a0bf528SMauro Carvalho Chehab master_clk = stb0899_get_mclk(state);
6409a0bf528SMauro Carvalho Chehab internal->t_agc1 = 0;
6419a0bf528SMauro Carvalho Chehab internal->t_agc2 = 0;
6429a0bf528SMauro Carvalho Chehab internal->master_clk = master_clk;
6439a0bf528SMauro Carvalho Chehab internal->mclk = master_clk / 65536L;
6449a0bf528SMauro Carvalho Chehab internal->rolloff = stb0899_get_alpha(state);
6459a0bf528SMauro Carvalho Chehab
6469a0bf528SMauro Carvalho Chehab /* DVBS2 Initial calculations */
6479a0bf528SMauro Carvalho Chehab /* Set AGC value to the middle */
6489a0bf528SMauro Carvalho Chehab internal->agc_gain = 8154;
6499a0bf528SMauro Carvalho Chehab reg = STB0899_READ_S2REG(STB0899_S2DEMOD, IF_AGC_CNTRL);
6509a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(IF_GAIN_INIT, reg, internal->agc_gain);
6519a0bf528SMauro Carvalho Chehab stb0899_write_s2reg(state, STB0899_S2DEMOD, STB0899_BASE_IF_AGC_CNTRL, STB0899_OFF0_IF_AGC_CNTRL, reg);
6529a0bf528SMauro Carvalho Chehab
6539a0bf528SMauro Carvalho Chehab reg = STB0899_READ_S2REG(STB0899_S2DEMOD, RRC_ALPHA);
6549a0bf528SMauro Carvalho Chehab internal->rrc_alpha = STB0899_GETFIELD(RRC_ALPHA, reg);
6559a0bf528SMauro Carvalho Chehab
6569a0bf528SMauro Carvalho Chehab internal->center_freq = 0;
6579a0bf528SMauro Carvalho Chehab internal->av_frame_coarse = 10;
6589a0bf528SMauro Carvalho Chehab internal->av_frame_fine = 20;
6599a0bf528SMauro Carvalho Chehab internal->step_size = 2;
6609a0bf528SMauro Carvalho Chehab /*
6619a0bf528SMauro Carvalho Chehab if ((pParams->SpectralInv == FE_IQ_NORMAL) || (pParams->SpectralInv == FE_IQ_AUTO))
6629a0bf528SMauro Carvalho Chehab pParams->IQLocked = 0;
6639a0bf528SMauro Carvalho Chehab else
6649a0bf528SMauro Carvalho Chehab pParams->IQLocked = 1;
6659a0bf528SMauro Carvalho Chehab */
6669a0bf528SMauro Carvalho Chehab }
6679a0bf528SMauro Carvalho Chehab
stb0899_wait_diseqc_fifo_empty(struct stb0899_state * state,int timeout)6689a0bf528SMauro Carvalho Chehab static int stb0899_wait_diseqc_fifo_empty(struct stb0899_state *state, int timeout)
6699a0bf528SMauro Carvalho Chehab {
6709a0bf528SMauro Carvalho Chehab u8 reg = 0;
6719a0bf528SMauro Carvalho Chehab unsigned long start = jiffies;
6729a0bf528SMauro Carvalho Chehab
6739a0bf528SMauro Carvalho Chehab while (1) {
6749a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_DISSTATUS);
6759a0bf528SMauro Carvalho Chehab if (!STB0899_GETFIELD(FIFOFULL, reg))
6769a0bf528SMauro Carvalho Chehab break;
6773edd59abSAsaf Vertz if (time_after(jiffies, start + timeout)) {
6789a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_ERROR, 1, "timed out !!");
6799a0bf528SMauro Carvalho Chehab return -ETIMEDOUT;
6809a0bf528SMauro Carvalho Chehab }
6819a0bf528SMauro Carvalho Chehab }
6829a0bf528SMauro Carvalho Chehab
6839a0bf528SMauro Carvalho Chehab return 0;
6849a0bf528SMauro Carvalho Chehab }
6859a0bf528SMauro Carvalho Chehab
stb0899_send_diseqc_msg(struct dvb_frontend * fe,struct dvb_diseqc_master_cmd * cmd)6869a0bf528SMauro Carvalho Chehab static int stb0899_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
6879a0bf528SMauro Carvalho Chehab {
6889a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
6899a0bf528SMauro Carvalho Chehab u8 reg, i;
6909a0bf528SMauro Carvalho Chehab
691b9f62ffeSMauro Carvalho Chehab if (cmd->msg_len > sizeof(cmd->msg))
6929a0bf528SMauro Carvalho Chehab return -EINVAL;
6939a0bf528SMauro Carvalho Chehab
6949a0bf528SMauro Carvalho Chehab /* enable FIFO precharge */
6959a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
6969a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 1);
6979a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
6989a0bf528SMauro Carvalho Chehab for (i = 0; i < cmd->msg_len; i++) {
6999a0bf528SMauro Carvalho Chehab /* wait for FIFO empty */
7009a0bf528SMauro Carvalho Chehab if (stb0899_wait_diseqc_fifo_empty(state, 100) < 0)
7019a0bf528SMauro Carvalho Chehab return -ETIMEDOUT;
7029a0bf528SMauro Carvalho Chehab
7039a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISFIFO, cmd->msg[i]);
7049a0bf528SMauro Carvalho Chehab }
7059a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
7069a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0);
7079a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
7089a0bf528SMauro Carvalho Chehab msleep(100);
7099a0bf528SMauro Carvalho Chehab return 0;
7109a0bf528SMauro Carvalho Chehab }
7119a0bf528SMauro Carvalho Chehab
stb0899_wait_diseqc_rxidle(struct stb0899_state * state,int timeout)7129a0bf528SMauro Carvalho Chehab static int stb0899_wait_diseqc_rxidle(struct stb0899_state *state, int timeout)
7139a0bf528SMauro Carvalho Chehab {
7149a0bf528SMauro Carvalho Chehab u8 reg = 0;
7159a0bf528SMauro Carvalho Chehab unsigned long start = jiffies;
7169a0bf528SMauro Carvalho Chehab
7179a0bf528SMauro Carvalho Chehab while (!STB0899_GETFIELD(RXEND, reg)) {
7189a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_DISRX_ST0);
7193edd59abSAsaf Vertz if (time_after(jiffies, start + timeout)) {
7209a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_ERROR, 1, "timed out!!");
7219a0bf528SMauro Carvalho Chehab return -ETIMEDOUT;
7229a0bf528SMauro Carvalho Chehab }
7239a0bf528SMauro Carvalho Chehab msleep(10);
7249a0bf528SMauro Carvalho Chehab }
7259a0bf528SMauro Carvalho Chehab
7269a0bf528SMauro Carvalho Chehab return 0;
7279a0bf528SMauro Carvalho Chehab }
7289a0bf528SMauro Carvalho Chehab
stb0899_recv_slave_reply(struct dvb_frontend * fe,struct dvb_diseqc_slave_reply * reply)7299a0bf528SMauro Carvalho Chehab static int stb0899_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
7309a0bf528SMauro Carvalho Chehab {
7319a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
7329a0bf528SMauro Carvalho Chehab u8 reg, length = 0, i;
7339a0bf528SMauro Carvalho Chehab int result;
7349a0bf528SMauro Carvalho Chehab
7359a0bf528SMauro Carvalho Chehab if (stb0899_wait_diseqc_rxidle(state, 100) < 0)
7369a0bf528SMauro Carvalho Chehab return -ETIMEDOUT;
7379a0bf528SMauro Carvalho Chehab
7389a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_DISRX_ST0);
7399a0bf528SMauro Carvalho Chehab if (STB0899_GETFIELD(RXEND, reg)) {
7409a0bf528SMauro Carvalho Chehab
7419a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_DISRX_ST1);
7429a0bf528SMauro Carvalho Chehab length = STB0899_GETFIELD(FIFOBYTENBR, reg);
7439a0bf528SMauro Carvalho Chehab
7449a0bf528SMauro Carvalho Chehab if (length > sizeof (reply->msg)) {
7459a0bf528SMauro Carvalho Chehab result = -EOVERFLOW;
7469a0bf528SMauro Carvalho Chehab goto exit;
7479a0bf528SMauro Carvalho Chehab }
7489a0bf528SMauro Carvalho Chehab reply->msg_len = length;
7499a0bf528SMauro Carvalho Chehab
7509a0bf528SMauro Carvalho Chehab /* extract data */
7519a0bf528SMauro Carvalho Chehab for (i = 0; i < length; i++)
7529a0bf528SMauro Carvalho Chehab reply->msg[i] = stb0899_read_reg(state, STB0899_DISFIFO);
7539a0bf528SMauro Carvalho Chehab }
7549a0bf528SMauro Carvalho Chehab
7559a0bf528SMauro Carvalho Chehab return 0;
7569a0bf528SMauro Carvalho Chehab exit:
7579a0bf528SMauro Carvalho Chehab
7589a0bf528SMauro Carvalho Chehab return result;
7599a0bf528SMauro Carvalho Chehab }
7609a0bf528SMauro Carvalho Chehab
stb0899_wait_diseqc_txidle(struct stb0899_state * state,int timeout)7619a0bf528SMauro Carvalho Chehab static int stb0899_wait_diseqc_txidle(struct stb0899_state *state, int timeout)
7629a0bf528SMauro Carvalho Chehab {
7639a0bf528SMauro Carvalho Chehab u8 reg = 0;
7649a0bf528SMauro Carvalho Chehab unsigned long start = jiffies;
7659a0bf528SMauro Carvalho Chehab
7669a0bf528SMauro Carvalho Chehab while (!STB0899_GETFIELD(TXIDLE, reg)) {
7679a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_DISSTATUS);
7683edd59abSAsaf Vertz if (time_after(jiffies, start + timeout)) {
7699a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_ERROR, 1, "timed out!!");
7709a0bf528SMauro Carvalho Chehab return -ETIMEDOUT;
7719a0bf528SMauro Carvalho Chehab }
7729a0bf528SMauro Carvalho Chehab msleep(10);
7739a0bf528SMauro Carvalho Chehab }
7749a0bf528SMauro Carvalho Chehab return 0;
7759a0bf528SMauro Carvalho Chehab }
7769a0bf528SMauro Carvalho Chehab
stb0899_send_diseqc_burst(struct dvb_frontend * fe,enum fe_sec_mini_cmd burst)7770df289a2SMauro Carvalho Chehab static int stb0899_send_diseqc_burst(struct dvb_frontend *fe,
7780df289a2SMauro Carvalho Chehab enum fe_sec_mini_cmd burst)
7799a0bf528SMauro Carvalho Chehab {
7809a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
7819a0bf528SMauro Carvalho Chehab u8 reg, old_state;
7829a0bf528SMauro Carvalho Chehab
7839a0bf528SMauro Carvalho Chehab /* wait for diseqc idle */
7849a0bf528SMauro Carvalho Chehab if (stb0899_wait_diseqc_txidle(state, 100) < 0)
7859a0bf528SMauro Carvalho Chehab return -ETIMEDOUT;
7869a0bf528SMauro Carvalho Chehab
7879a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
7889a0bf528SMauro Carvalho Chehab old_state = reg;
7899a0bf528SMauro Carvalho Chehab /* set to burst mode */
7909a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(DISEQCMODE, reg, 0x03);
7919a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x01);
7929a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
7939a0bf528SMauro Carvalho Chehab switch (burst) {
7949a0bf528SMauro Carvalho Chehab case SEC_MINI_A:
7959a0bf528SMauro Carvalho Chehab /* unmodulated */
7969a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISFIFO, 0x00);
7979a0bf528SMauro Carvalho Chehab break;
7989a0bf528SMauro Carvalho Chehab case SEC_MINI_B:
7999a0bf528SMauro Carvalho Chehab /* modulated */
8009a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISFIFO, 0xff);
8019a0bf528SMauro Carvalho Chehab break;
8029a0bf528SMauro Carvalho Chehab }
8039a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
8049a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x00);
8059a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
8069a0bf528SMauro Carvalho Chehab /* wait for diseqc idle */
8079a0bf528SMauro Carvalho Chehab if (stb0899_wait_diseqc_txidle(state, 100) < 0)
8089a0bf528SMauro Carvalho Chehab return -ETIMEDOUT;
8099a0bf528SMauro Carvalho Chehab
8109a0bf528SMauro Carvalho Chehab /* restore state */
8119a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISCNTRL1, old_state);
8129a0bf528SMauro Carvalho Chehab
8139a0bf528SMauro Carvalho Chehab return 0;
8149a0bf528SMauro Carvalho Chehab }
8159a0bf528SMauro Carvalho Chehab
stb0899_diseqc_init(struct stb0899_state * state)8169a0bf528SMauro Carvalho Chehab static int stb0899_diseqc_init(struct stb0899_state *state)
8179a0bf528SMauro Carvalho Chehab {
8189a0bf528SMauro Carvalho Chehab /*
8199a0bf528SMauro Carvalho Chehab struct dvb_diseqc_slave_reply rx_data;
8209a0bf528SMauro Carvalho Chehab */
8219a0bf528SMauro Carvalho Chehab u8 f22_tx, reg;
8229a0bf528SMauro Carvalho Chehab
8239a0bf528SMauro Carvalho Chehab u32 mclk, tx_freq = 22000;/* count = 0, i; */
8249a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_DISCNTRL2);
8259a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(ONECHIP_TRX, reg, 0);
8269a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISCNTRL2, reg);
8279a0bf528SMauro Carvalho Chehab
8289a0bf528SMauro Carvalho Chehab /* disable Tx spy */
8299a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
8309a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(DISEQCRESET, reg, 1);
8319a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
8329a0bf528SMauro Carvalho Chehab
8339a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
8349a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(DISEQCRESET, reg, 0);
8359a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
8369a0bf528SMauro Carvalho Chehab
8379a0bf528SMauro Carvalho Chehab mclk = stb0899_get_mclk(state);
8389a0bf528SMauro Carvalho Chehab f22_tx = mclk / (tx_freq * 32);
8399a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISF22, f22_tx); /* DiSEqC Tx freq */
8409a0bf528SMauro Carvalho Chehab state->rx_freq = 20000;
8419a0bf528SMauro Carvalho Chehab
8429a0bf528SMauro Carvalho Chehab return 0;
8439a0bf528SMauro Carvalho Chehab }
8449a0bf528SMauro Carvalho Chehab
stb0899_sleep(struct dvb_frontend * fe)8459a0bf528SMauro Carvalho Chehab static int stb0899_sleep(struct dvb_frontend *fe)
8469a0bf528SMauro Carvalho Chehab {
8479a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
8489a0bf528SMauro Carvalho Chehab /*
8499a0bf528SMauro Carvalho Chehab u8 reg;
8509a0bf528SMauro Carvalho Chehab */
8519a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Going to Sleep .. (Really tired .. :-))");
8529a0bf528SMauro Carvalho Chehab /* post process event */
8539a0bf528SMauro Carvalho Chehab stb0899_postproc(state, STB0899_POSTPROC_GPIO_POWER, 0);
8549a0bf528SMauro Carvalho Chehab
8559a0bf528SMauro Carvalho Chehab return 0;
8569a0bf528SMauro Carvalho Chehab }
8579a0bf528SMauro Carvalho Chehab
stb0899_wakeup(struct dvb_frontend * fe)8589a0bf528SMauro Carvalho Chehab static int stb0899_wakeup(struct dvb_frontend *fe)
8599a0bf528SMauro Carvalho Chehab {
8609a0bf528SMauro Carvalho Chehab int rc;
8619a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
8629a0bf528SMauro Carvalho Chehab
8639a0bf528SMauro Carvalho Chehab if ((rc = stb0899_write_reg(state, STB0899_SYNTCTRL, STB0899_SELOSCI)))
8649a0bf528SMauro Carvalho Chehab return rc;
8659a0bf528SMauro Carvalho Chehab /* Activate all clocks; DVB-S2 registers are inaccessible otherwise. */
8669a0bf528SMauro Carvalho Chehab if ((rc = stb0899_write_reg(state, STB0899_STOPCLK1, 0x00)))
8679a0bf528SMauro Carvalho Chehab return rc;
8689a0bf528SMauro Carvalho Chehab if ((rc = stb0899_write_reg(state, STB0899_STOPCLK2, 0x00)))
8699a0bf528SMauro Carvalho Chehab return rc;
8709a0bf528SMauro Carvalho Chehab
8719a0bf528SMauro Carvalho Chehab /* post process event */
8729a0bf528SMauro Carvalho Chehab stb0899_postproc(state, STB0899_POSTPROC_GPIO_POWER, 1);
8739a0bf528SMauro Carvalho Chehab
8749a0bf528SMauro Carvalho Chehab return 0;
8759a0bf528SMauro Carvalho Chehab }
8769a0bf528SMauro Carvalho Chehab
stb0899_init(struct dvb_frontend * fe)8779a0bf528SMauro Carvalho Chehab static int stb0899_init(struct dvb_frontend *fe)
8789a0bf528SMauro Carvalho Chehab {
8799a0bf528SMauro Carvalho Chehab int i;
8809a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
8819a0bf528SMauro Carvalho Chehab struct stb0899_config *config = state->config;
8829a0bf528SMauro Carvalho Chehab
8839a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Initializing STB0899 ... ");
8849a0bf528SMauro Carvalho Chehab
8859a0bf528SMauro Carvalho Chehab /* init device */
8869a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "init device");
8879a0bf528SMauro Carvalho Chehab for (i = 0; config->init_dev[i].address != 0xffff; i++)
8889a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, config->init_dev[i].address, config->init_dev[i].data);
8899a0bf528SMauro Carvalho Chehab
8909a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "init S2 demod");
8919a0bf528SMauro Carvalho Chehab /* init S2 demod */
8929a0bf528SMauro Carvalho Chehab for (i = 0; config->init_s2_demod[i].offset != 0xffff; i++)
8939a0bf528SMauro Carvalho Chehab stb0899_write_s2reg(state, STB0899_S2DEMOD,
8949a0bf528SMauro Carvalho Chehab config->init_s2_demod[i].base_address,
8959a0bf528SMauro Carvalho Chehab config->init_s2_demod[i].offset,
8969a0bf528SMauro Carvalho Chehab config->init_s2_demod[i].data);
8979a0bf528SMauro Carvalho Chehab
8989a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "init S1 demod");
8999a0bf528SMauro Carvalho Chehab /* init S1 demod */
9009a0bf528SMauro Carvalho Chehab for (i = 0; config->init_s1_demod[i].address != 0xffff; i++)
9019a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, config->init_s1_demod[i].address, config->init_s1_demod[i].data);
9029a0bf528SMauro Carvalho Chehab
9039a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "init S2 FEC");
9049a0bf528SMauro Carvalho Chehab /* init S2 fec */
9059a0bf528SMauro Carvalho Chehab for (i = 0; config->init_s2_fec[i].offset != 0xffff; i++)
9069a0bf528SMauro Carvalho Chehab stb0899_write_s2reg(state, STB0899_S2FEC,
9079a0bf528SMauro Carvalho Chehab config->init_s2_fec[i].base_address,
9089a0bf528SMauro Carvalho Chehab config->init_s2_fec[i].offset,
9099a0bf528SMauro Carvalho Chehab config->init_s2_fec[i].data);
9109a0bf528SMauro Carvalho Chehab
9119a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "init TST");
9129a0bf528SMauro Carvalho Chehab /* init test */
9139a0bf528SMauro Carvalho Chehab for (i = 0; config->init_tst[i].address != 0xffff; i++)
9149a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, config->init_tst[i].address, config->init_tst[i].data);
9159a0bf528SMauro Carvalho Chehab
9169a0bf528SMauro Carvalho Chehab stb0899_init_calc(state);
9179a0bf528SMauro Carvalho Chehab stb0899_diseqc_init(state);
9189a0bf528SMauro Carvalho Chehab
9199a0bf528SMauro Carvalho Chehab return 0;
9209a0bf528SMauro Carvalho Chehab }
9219a0bf528SMauro Carvalho Chehab
stb0899_table_lookup(const struct stb0899_tab * tab,int max,int val)9229a0bf528SMauro Carvalho Chehab static int stb0899_table_lookup(const struct stb0899_tab *tab, int max, int val)
9239a0bf528SMauro Carvalho Chehab {
9249a0bf528SMauro Carvalho Chehab int res = 0;
9259a0bf528SMauro Carvalho Chehab int min = 0, med;
9269a0bf528SMauro Carvalho Chehab
9279a0bf528SMauro Carvalho Chehab if (val < tab[min].read)
9289a0bf528SMauro Carvalho Chehab res = tab[min].real;
9299a0bf528SMauro Carvalho Chehab else if (val >= tab[max].read)
9309a0bf528SMauro Carvalho Chehab res = tab[max].real;
9319a0bf528SMauro Carvalho Chehab else {
9329a0bf528SMauro Carvalho Chehab while ((max - min) > 1) {
9339a0bf528SMauro Carvalho Chehab med = (max + min) / 2;
9349a0bf528SMauro Carvalho Chehab if (val >= tab[min].read && val < tab[med].read)
9359a0bf528SMauro Carvalho Chehab max = med;
9369a0bf528SMauro Carvalho Chehab else
9379a0bf528SMauro Carvalho Chehab min = med;
9389a0bf528SMauro Carvalho Chehab }
9399a0bf528SMauro Carvalho Chehab res = ((val - tab[min].read) *
9409a0bf528SMauro Carvalho Chehab (tab[max].real - tab[min].real) /
9419a0bf528SMauro Carvalho Chehab (tab[max].read - tab[min].read)) +
9429a0bf528SMauro Carvalho Chehab tab[min].real;
9439a0bf528SMauro Carvalho Chehab }
9449a0bf528SMauro Carvalho Chehab
9459a0bf528SMauro Carvalho Chehab return res;
9469a0bf528SMauro Carvalho Chehab }
9479a0bf528SMauro Carvalho Chehab
stb0899_read_signal_strength(struct dvb_frontend * fe,u16 * strength)9489a0bf528SMauro Carvalho Chehab static int stb0899_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
9499a0bf528SMauro Carvalho Chehab {
9509a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
9519a0bf528SMauro Carvalho Chehab struct stb0899_internal *internal = &state->internal;
9529a0bf528SMauro Carvalho Chehab
9539a0bf528SMauro Carvalho Chehab int val;
9549a0bf528SMauro Carvalho Chehab u32 reg;
9559a0bf528SMauro Carvalho Chehab *strength = 0;
9569a0bf528SMauro Carvalho Chehab switch (state->delsys) {
9579a0bf528SMauro Carvalho Chehab case SYS_DVBS:
9589a0bf528SMauro Carvalho Chehab case SYS_DSS:
9599a0bf528SMauro Carvalho Chehab if (internal->lock) {
9609a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_VSTATUS);
9619a0bf528SMauro Carvalho Chehab if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) {
9629a0bf528SMauro Carvalho Chehab
9639a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_AGCIQIN);
9649a0bf528SMauro Carvalho Chehab val = (s32)(s8)STB0899_GETFIELD(AGCIQVALUE, reg);
9659a0bf528SMauro Carvalho Chehab
9669a0bf528SMauro Carvalho Chehab *strength = stb0899_table_lookup(stb0899_dvbsrf_tab, ARRAY_SIZE(stb0899_dvbsrf_tab) - 1, val);
9679a0bf528SMauro Carvalho Chehab *strength += 750;
9689a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "AGCIQVALUE = 0x%02x, C = %d * 0.1 dBm",
9699a0bf528SMauro Carvalho Chehab val & 0xff, *strength);
9709a0bf528SMauro Carvalho Chehab }
9719a0bf528SMauro Carvalho Chehab }
9729a0bf528SMauro Carvalho Chehab break;
9739a0bf528SMauro Carvalho Chehab case SYS_DVBS2:
9749a0bf528SMauro Carvalho Chehab if (internal->lock) {
9759a0bf528SMauro Carvalho Chehab reg = STB0899_READ_S2REG(STB0899_S2DEMOD, IF_AGC_GAIN);
9769a0bf528SMauro Carvalho Chehab val = STB0899_GETFIELD(IF_AGC_GAIN, reg);
9779a0bf528SMauro Carvalho Chehab
9789a0bf528SMauro Carvalho Chehab *strength = stb0899_table_lookup(stb0899_dvbs2rf_tab, ARRAY_SIZE(stb0899_dvbs2rf_tab) - 1, val);
9799a0bf528SMauro Carvalho Chehab *strength += 950;
9809a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "IF_AGC_GAIN = 0x%04x, C = %d * 0.1 dBm",
9819a0bf528SMauro Carvalho Chehab val & 0x3fff, *strength);
9829a0bf528SMauro Carvalho Chehab }
9839a0bf528SMauro Carvalho Chehab break;
9849a0bf528SMauro Carvalho Chehab default:
9859a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system");
9869a0bf528SMauro Carvalho Chehab return -EINVAL;
9879a0bf528SMauro Carvalho Chehab }
9889a0bf528SMauro Carvalho Chehab
9899a0bf528SMauro Carvalho Chehab return 0;
9909a0bf528SMauro Carvalho Chehab }
9919a0bf528SMauro Carvalho Chehab
stb0899_read_snr(struct dvb_frontend * fe,u16 * snr)9929a0bf528SMauro Carvalho Chehab static int stb0899_read_snr(struct dvb_frontend *fe, u16 *snr)
9939a0bf528SMauro Carvalho Chehab {
9949a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
9959a0bf528SMauro Carvalho Chehab struct stb0899_internal *internal = &state->internal;
9969a0bf528SMauro Carvalho Chehab
9979a0bf528SMauro Carvalho Chehab unsigned int val, quant, quantn = -1, est, estn = -1;
9989a0bf528SMauro Carvalho Chehab u8 buf[2];
9999a0bf528SMauro Carvalho Chehab u32 reg;
10009a0bf528SMauro Carvalho Chehab
10019a0bf528SMauro Carvalho Chehab *snr = 0;
10029a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_VSTATUS);
10039a0bf528SMauro Carvalho Chehab switch (state->delsys) {
10049a0bf528SMauro Carvalho Chehab case SYS_DVBS:
10059a0bf528SMauro Carvalho Chehab case SYS_DSS:
10069a0bf528SMauro Carvalho Chehab if (internal->lock) {
10079a0bf528SMauro Carvalho Chehab if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) {
10089a0bf528SMauro Carvalho Chehab
10099a0bf528SMauro Carvalho Chehab stb0899_read_regs(state, STB0899_NIRM, buf, 2);
10109a0bf528SMauro Carvalho Chehab val = MAKEWORD16(buf[0], buf[1]);
10119a0bf528SMauro Carvalho Chehab
10129a0bf528SMauro Carvalho Chehab *snr = stb0899_table_lookup(stb0899_cn_tab, ARRAY_SIZE(stb0899_cn_tab) - 1, val);
10139a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "NIR = 0x%02x%02x = %u, C/N = %d * 0.1 dBm\n",
10149a0bf528SMauro Carvalho Chehab buf[0], buf[1], val, *snr);
10159a0bf528SMauro Carvalho Chehab }
10169a0bf528SMauro Carvalho Chehab }
10179a0bf528SMauro Carvalho Chehab break;
10189a0bf528SMauro Carvalho Chehab case SYS_DVBS2:
10199a0bf528SMauro Carvalho Chehab if (internal->lock) {
10209a0bf528SMauro Carvalho Chehab reg = STB0899_READ_S2REG(STB0899_S2DEMOD, UWP_CNTRL1);
10219a0bf528SMauro Carvalho Chehab quant = STB0899_GETFIELD(UWP_ESN0_QUANT, reg);
10229a0bf528SMauro Carvalho Chehab reg = STB0899_READ_S2REG(STB0899_S2DEMOD, UWP_STAT2);
10239a0bf528SMauro Carvalho Chehab est = STB0899_GETFIELD(ESN0_EST, reg);
10249a0bf528SMauro Carvalho Chehab if (est == 1)
10259a0bf528SMauro Carvalho Chehab val = 301; /* C/N = 30.1 dB */
10269a0bf528SMauro Carvalho Chehab else if (est == 2)
10279a0bf528SMauro Carvalho Chehab val = 270; /* C/N = 27.0 dB */
10289a0bf528SMauro Carvalho Chehab else {
10299a0bf528SMauro Carvalho Chehab /* quantn = 100 * log(quant^2) */
10309a0bf528SMauro Carvalho Chehab quantn = stb0899_table_lookup(stb0899_quant_tab, ARRAY_SIZE(stb0899_quant_tab) - 1, quant * 100);
10319a0bf528SMauro Carvalho Chehab /* estn = 100 * log(est) */
10329a0bf528SMauro Carvalho Chehab estn = stb0899_table_lookup(stb0899_est_tab, ARRAY_SIZE(stb0899_est_tab) - 1, est);
10339a0bf528SMauro Carvalho Chehab /* snr(dBm/10) = -10*(log(est)-log(quant^2)) => snr(dBm/10) = (100*log(quant^2)-100*log(est))/10 */
10349a0bf528SMauro Carvalho Chehab val = (quantn - estn) / 10;
10359a0bf528SMauro Carvalho Chehab }
10369a0bf528SMauro Carvalho Chehab *snr = val;
10379a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Es/N0 quant = %d (%d) estimate = %u (%d), C/N = %d * 0.1 dBm",
10389a0bf528SMauro Carvalho Chehab quant, quantn, est, estn, val);
10399a0bf528SMauro Carvalho Chehab }
10409a0bf528SMauro Carvalho Chehab break;
10419a0bf528SMauro Carvalho Chehab default:
10429a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system");
10439a0bf528SMauro Carvalho Chehab return -EINVAL;
10449a0bf528SMauro Carvalho Chehab }
10459a0bf528SMauro Carvalho Chehab
10469a0bf528SMauro Carvalho Chehab return 0;
10479a0bf528SMauro Carvalho Chehab }
10489a0bf528SMauro Carvalho Chehab
stb0899_read_status(struct dvb_frontend * fe,enum fe_status * status)10499a0bf528SMauro Carvalho Chehab static int stb0899_read_status(struct dvb_frontend *fe, enum fe_status *status)
10509a0bf528SMauro Carvalho Chehab {
10519a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
10529a0bf528SMauro Carvalho Chehab struct stb0899_internal *internal = &state->internal;
10539a0bf528SMauro Carvalho Chehab u8 reg;
10549a0bf528SMauro Carvalho Chehab *status = 0;
10559a0bf528SMauro Carvalho Chehab
10569a0bf528SMauro Carvalho Chehab switch (state->delsys) {
10579a0bf528SMauro Carvalho Chehab case SYS_DVBS:
10589a0bf528SMauro Carvalho Chehab case SYS_DSS:
10599a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Delivery system DVB-S/DSS");
10609a0bf528SMauro Carvalho Chehab if (internal->lock) {
10619a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_VSTATUS);
10629a0bf528SMauro Carvalho Chehab if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) {
10639a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "--------> FE_HAS_CARRIER | FE_HAS_LOCK");
10649a0bf528SMauro Carvalho Chehab *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_LOCK;
10659a0bf528SMauro Carvalho Chehab
10669a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_PLPARM);
10679a0bf528SMauro Carvalho Chehab if (STB0899_GETFIELD(VITCURPUN, reg)) {
10689a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "--------> FE_HAS_VITERBI | FE_HAS_SYNC");
10699a0bf528SMauro Carvalho Chehab *status |= FE_HAS_VITERBI | FE_HAS_SYNC;
10709a0bf528SMauro Carvalho Chehab /* post process event */
10719a0bf528SMauro Carvalho Chehab stb0899_postproc(state, STB0899_POSTPROC_GPIO_LOCK, 1);
10729a0bf528SMauro Carvalho Chehab }
10739a0bf528SMauro Carvalho Chehab }
10749a0bf528SMauro Carvalho Chehab }
10759a0bf528SMauro Carvalho Chehab break;
10769a0bf528SMauro Carvalho Chehab case SYS_DVBS2:
10779a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Delivery system DVB-S2");
10789a0bf528SMauro Carvalho Chehab if (internal->lock) {
10799a0bf528SMauro Carvalho Chehab reg = STB0899_READ_S2REG(STB0899_S2DEMOD, DMD_STAT2);
10809a0bf528SMauro Carvalho Chehab if (STB0899_GETFIELD(UWP_LOCK, reg) && STB0899_GETFIELD(CSM_LOCK, reg)) {
10819a0bf528SMauro Carvalho Chehab *status |= FE_HAS_CARRIER;
10829a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1,
10839a0bf528SMauro Carvalho Chehab "UWP & CSM Lock ! ---> DVB-S2 FE_HAS_CARRIER");
10849a0bf528SMauro Carvalho Chehab
10859a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_CFGPDELSTATUS1);
10869a0bf528SMauro Carvalho Chehab if (STB0899_GETFIELD(CFGPDELSTATUS_LOCK, reg)) {
10879a0bf528SMauro Carvalho Chehab *status |= FE_HAS_LOCK;
10889a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1,
10899a0bf528SMauro Carvalho Chehab "Packet Delineator Locked ! -----> DVB-S2 FE_HAS_LOCK");
10909a0bf528SMauro Carvalho Chehab
10919a0bf528SMauro Carvalho Chehab }
10929a0bf528SMauro Carvalho Chehab if (STB0899_GETFIELD(CONTINUOUS_STREAM, reg)) {
10939a0bf528SMauro Carvalho Chehab *status |= FE_HAS_VITERBI;
10949a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1,
10959a0bf528SMauro Carvalho Chehab "Packet Delineator found VITERBI ! -----> DVB-S2 FE_HAS_VITERBI");
10969a0bf528SMauro Carvalho Chehab }
10979a0bf528SMauro Carvalho Chehab if (STB0899_GETFIELD(ACCEPTED_STREAM, reg)) {
10989a0bf528SMauro Carvalho Chehab *status |= FE_HAS_SYNC;
10999a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1,
11009a0bf528SMauro Carvalho Chehab "Packet Delineator found SYNC ! -----> DVB-S2 FE_HAS_SYNC");
11019a0bf528SMauro Carvalho Chehab /* post process event */
11029a0bf528SMauro Carvalho Chehab stb0899_postproc(state, STB0899_POSTPROC_GPIO_LOCK, 1);
11039a0bf528SMauro Carvalho Chehab }
11049a0bf528SMauro Carvalho Chehab }
11059a0bf528SMauro Carvalho Chehab }
11069a0bf528SMauro Carvalho Chehab break;
11079a0bf528SMauro Carvalho Chehab default:
11089a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system");
11099a0bf528SMauro Carvalho Chehab return -EINVAL;
11109a0bf528SMauro Carvalho Chehab }
11119a0bf528SMauro Carvalho Chehab return 0;
11129a0bf528SMauro Carvalho Chehab }
11139a0bf528SMauro Carvalho Chehab
11149a0bf528SMauro Carvalho Chehab /*
11159a0bf528SMauro Carvalho Chehab * stb0899_get_error
11169a0bf528SMauro Carvalho Chehab * viterbi error for DVB-S/DSS
11179a0bf528SMauro Carvalho Chehab * packet error for DVB-S2
11189a0bf528SMauro Carvalho Chehab * Bit Error Rate or Packet Error Rate * 10 ^ 7
11199a0bf528SMauro Carvalho Chehab */
stb0899_read_ber(struct dvb_frontend * fe,u32 * ber)11209a0bf528SMauro Carvalho Chehab static int stb0899_read_ber(struct dvb_frontend *fe, u32 *ber)
11219a0bf528SMauro Carvalho Chehab {
11229a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
11239a0bf528SMauro Carvalho Chehab struct stb0899_internal *internal = &state->internal;
11249a0bf528SMauro Carvalho Chehab
11259a0bf528SMauro Carvalho Chehab u8 lsb, msb;
11269a0bf528SMauro Carvalho Chehab
11279a0bf528SMauro Carvalho Chehab *ber = 0;
11289a0bf528SMauro Carvalho Chehab
11299a0bf528SMauro Carvalho Chehab switch (state->delsys) {
11309a0bf528SMauro Carvalho Chehab case SYS_DVBS:
11319a0bf528SMauro Carvalho Chehab case SYS_DSS:
11329a0bf528SMauro Carvalho Chehab if (internal->lock) {
11339a0bf528SMauro Carvalho Chehab lsb = stb0899_read_reg(state, STB0899_ECNT1L);
11349a0bf528SMauro Carvalho Chehab msb = stb0899_read_reg(state, STB0899_ECNT1M);
11359a0bf528SMauro Carvalho Chehab *ber = MAKEWORD16(msb, lsb);
11369a0bf528SMauro Carvalho Chehab /* Viterbi Check */
11379a0bf528SMauro Carvalho Chehab if (STB0899_GETFIELD(VSTATUS_PRFVIT, internal->v_status)) {
11389a0bf528SMauro Carvalho Chehab /* Error Rate */
11399a0bf528SMauro Carvalho Chehab *ber *= 9766;
11409a0bf528SMauro Carvalho Chehab /* ber = ber * 10 ^ 7 */
11419a0bf528SMauro Carvalho Chehab *ber /= (-1 + (1 << (2 * STB0899_GETFIELD(NOE, internal->err_ctrl))));
11429a0bf528SMauro Carvalho Chehab *ber /= 8;
11439a0bf528SMauro Carvalho Chehab }
11449a0bf528SMauro Carvalho Chehab }
11459a0bf528SMauro Carvalho Chehab break;
11469a0bf528SMauro Carvalho Chehab case SYS_DVBS2:
11479a0bf528SMauro Carvalho Chehab if (internal->lock) {
11489a0bf528SMauro Carvalho Chehab lsb = stb0899_read_reg(state, STB0899_ECNT1L);
11499a0bf528SMauro Carvalho Chehab msb = stb0899_read_reg(state, STB0899_ECNT1M);
11509a0bf528SMauro Carvalho Chehab *ber = MAKEWORD16(msb, lsb);
11519a0bf528SMauro Carvalho Chehab /* ber = ber * 10 ^ 7 */
11529a0bf528SMauro Carvalho Chehab *ber *= 10000000;
11539a0bf528SMauro Carvalho Chehab *ber /= (-1 + (1 << (4 + 2 * STB0899_GETFIELD(NOE, internal->err_ctrl))));
11549a0bf528SMauro Carvalho Chehab }
11559a0bf528SMauro Carvalho Chehab break;
11569a0bf528SMauro Carvalho Chehab default:
11579a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system");
11589a0bf528SMauro Carvalho Chehab return -EINVAL;
11599a0bf528SMauro Carvalho Chehab }
11609a0bf528SMauro Carvalho Chehab
11619a0bf528SMauro Carvalho Chehab return 0;
11629a0bf528SMauro Carvalho Chehab }
11639a0bf528SMauro Carvalho Chehab
stb0899_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage voltage)11640df289a2SMauro Carvalho Chehab static int stb0899_set_voltage(struct dvb_frontend *fe,
11650df289a2SMauro Carvalho Chehab enum fe_sec_voltage voltage)
11669a0bf528SMauro Carvalho Chehab {
11679a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
11689a0bf528SMauro Carvalho Chehab
11699a0bf528SMauro Carvalho Chehab switch (voltage) {
11709a0bf528SMauro Carvalho Chehab case SEC_VOLTAGE_13:
11719a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_GPIO00CFG, 0x82);
11729a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_GPIO01CFG, 0x02);
11739a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_GPIO02CFG, 0x00);
11749a0bf528SMauro Carvalho Chehab break;
11759a0bf528SMauro Carvalho Chehab case SEC_VOLTAGE_18:
11769a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_GPIO00CFG, 0x02);
11779a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_GPIO01CFG, 0x02);
11789a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_GPIO02CFG, 0x82);
11799a0bf528SMauro Carvalho Chehab break;
11809a0bf528SMauro Carvalho Chehab case SEC_VOLTAGE_OFF:
11819a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_GPIO00CFG, 0x82);
11829a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_GPIO01CFG, 0x82);
11839a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_GPIO02CFG, 0x82);
11849a0bf528SMauro Carvalho Chehab break;
11859a0bf528SMauro Carvalho Chehab default:
11869a0bf528SMauro Carvalho Chehab return -EINVAL;
11879a0bf528SMauro Carvalho Chehab }
11889a0bf528SMauro Carvalho Chehab
11899a0bf528SMauro Carvalho Chehab return 0;
11909a0bf528SMauro Carvalho Chehab }
11919a0bf528SMauro Carvalho Chehab
stb0899_set_tone(struct dvb_frontend * fe,enum fe_sec_tone_mode tone)11920df289a2SMauro Carvalho Chehab static int stb0899_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
11939a0bf528SMauro Carvalho Chehab {
11949a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
11959a0bf528SMauro Carvalho Chehab struct stb0899_internal *internal = &state->internal;
11969a0bf528SMauro Carvalho Chehab
11979a0bf528SMauro Carvalho Chehab u8 div, reg;
11989a0bf528SMauro Carvalho Chehab
11999a0bf528SMauro Carvalho Chehab /* wait for diseqc idle */
12009a0bf528SMauro Carvalho Chehab if (stb0899_wait_diseqc_txidle(state, 100) < 0)
12019a0bf528SMauro Carvalho Chehab return -ETIMEDOUT;
12029a0bf528SMauro Carvalho Chehab
12039a0bf528SMauro Carvalho Chehab switch (tone) {
12049a0bf528SMauro Carvalho Chehab case SEC_TONE_ON:
12059a0bf528SMauro Carvalho Chehab div = (internal->master_clk / 100) / 5632;
12069a0bf528SMauro Carvalho Chehab div = (div + 5) / 10;
12079a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISEQCOCFG, 0x66);
12089a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_ACRPRESC);
12099a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(ACRPRESC, reg, 0x03);
12109a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_ACRPRESC, reg);
12119a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_ACRDIV1, div);
12129a0bf528SMauro Carvalho Chehab break;
12139a0bf528SMauro Carvalho Chehab case SEC_TONE_OFF:
12149a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_DISEQCOCFG, 0x20);
12159a0bf528SMauro Carvalho Chehab break;
12169a0bf528SMauro Carvalho Chehab default:
12179a0bf528SMauro Carvalho Chehab return -EINVAL;
12189a0bf528SMauro Carvalho Chehab }
12199a0bf528SMauro Carvalho Chehab return 0;
12209a0bf528SMauro Carvalho Chehab }
12219a0bf528SMauro Carvalho Chehab
stb0899_i2c_gate_ctrl(struct dvb_frontend * fe,int enable)12229a0bf528SMauro Carvalho Chehab int stb0899_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
12239a0bf528SMauro Carvalho Chehab {
12249a0bf528SMauro Carvalho Chehab int i2c_stat;
12259a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
12269a0bf528SMauro Carvalho Chehab
12279a0bf528SMauro Carvalho Chehab i2c_stat = stb0899_read_reg(state, STB0899_I2CRPT);
12289a0bf528SMauro Carvalho Chehab if (i2c_stat < 0)
12299a0bf528SMauro Carvalho Chehab goto err;
12309a0bf528SMauro Carvalho Chehab
12319a0bf528SMauro Carvalho Chehab if (enable) {
12329a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Enabling I2C Repeater ...");
12339a0bf528SMauro Carvalho Chehab i2c_stat |= STB0899_I2CTON;
12349a0bf528SMauro Carvalho Chehab if (stb0899_write_reg(state, STB0899_I2CRPT, i2c_stat) < 0)
12359a0bf528SMauro Carvalho Chehab goto err;
12369a0bf528SMauro Carvalho Chehab } else {
12379a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Disabling I2C Repeater ...");
12389a0bf528SMauro Carvalho Chehab i2c_stat &= ~STB0899_I2CTON;
12399a0bf528SMauro Carvalho Chehab if (stb0899_write_reg(state, STB0899_I2CRPT, i2c_stat) < 0)
12409a0bf528SMauro Carvalho Chehab goto err;
12419a0bf528SMauro Carvalho Chehab }
12429a0bf528SMauro Carvalho Chehab return 0;
12439a0bf528SMauro Carvalho Chehab err:
12449a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_ERROR, 1, "I2C Repeater control failed");
12459a0bf528SMauro Carvalho Chehab return -EREMOTEIO;
12469a0bf528SMauro Carvalho Chehab }
12479a0bf528SMauro Carvalho Chehab
12489a0bf528SMauro Carvalho Chehab
CONVERT32(u32 x,char * str)12499a0bf528SMauro Carvalho Chehab static inline void CONVERT32(u32 x, char *str)
12509a0bf528SMauro Carvalho Chehab {
12519a0bf528SMauro Carvalho Chehab *str++ = (x >> 24) & 0xff;
12529a0bf528SMauro Carvalho Chehab *str++ = (x >> 16) & 0xff;
12539a0bf528SMauro Carvalho Chehab *str++ = (x >> 8) & 0xff;
12549a0bf528SMauro Carvalho Chehab *str++ = (x >> 0) & 0xff;
12559a0bf528SMauro Carvalho Chehab *str = '\0';
12569a0bf528SMauro Carvalho Chehab }
12579a0bf528SMauro Carvalho Chehab
stb0899_get_dev_id(struct stb0899_state * state)12585506bcbaSMauro Carvalho Chehab static int stb0899_get_dev_id(struct stb0899_state *state)
12599a0bf528SMauro Carvalho Chehab {
12609a0bf528SMauro Carvalho Chehab u8 chip_id, release;
12619a0bf528SMauro Carvalho Chehab u16 id;
12629a0bf528SMauro Carvalho Chehab u32 demod_ver = 0, fec_ver = 0;
12639a0bf528SMauro Carvalho Chehab char demod_str[5] = { 0 };
12649a0bf528SMauro Carvalho Chehab char fec_str[5] = { 0 };
12659a0bf528SMauro Carvalho Chehab
12669a0bf528SMauro Carvalho Chehab id = stb0899_read_reg(state, STB0899_DEV_ID);
12679a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "ID reg=[0x%02x]", id);
12689a0bf528SMauro Carvalho Chehab chip_id = STB0899_GETFIELD(CHIP_ID, id);
12699a0bf528SMauro Carvalho Chehab release = STB0899_GETFIELD(CHIP_REL, id);
12709a0bf528SMauro Carvalho Chehab
12719a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_ERROR, 1, "Device ID=[%d], Release=[%d]",
12729a0bf528SMauro Carvalho Chehab chip_id, release);
12739a0bf528SMauro Carvalho Chehab
12749a0bf528SMauro Carvalho Chehab CONVERT32(STB0899_READ_S2REG(STB0899_S2DEMOD, DMD_CORE_ID), (char *)&demod_str);
12759a0bf528SMauro Carvalho Chehab
12769a0bf528SMauro Carvalho Chehab demod_ver = STB0899_READ_S2REG(STB0899_S2DEMOD, DMD_VERSION_ID);
12779a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_ERROR, 1, "Demodulator Core ID=[%s], Version=[%d]", (char *) &demod_str, demod_ver);
12789a0bf528SMauro Carvalho Chehab CONVERT32(STB0899_READ_S2REG(STB0899_S2FEC, FEC_CORE_ID_REG), (char *)&fec_str);
12799a0bf528SMauro Carvalho Chehab fec_ver = STB0899_READ_S2REG(STB0899_S2FEC, FEC_VER_ID_REG);
12809a0bf528SMauro Carvalho Chehab if (! (chip_id > 0)) {
12819a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_ERROR, 1, "couldn't find a STB 0899");
12829a0bf528SMauro Carvalho Chehab
12839a0bf528SMauro Carvalho Chehab return -ENODEV;
12849a0bf528SMauro Carvalho Chehab }
12859a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_ERROR, 1, "FEC Core ID=[%s], Version=[%d]", (char*) &fec_str, fec_ver);
12869a0bf528SMauro Carvalho Chehab
12879a0bf528SMauro Carvalho Chehab return 0;
12889a0bf528SMauro Carvalho Chehab }
12899a0bf528SMauro Carvalho Chehab
stb0899_set_delivery(struct stb0899_state * state)12909a0bf528SMauro Carvalho Chehab static void stb0899_set_delivery(struct stb0899_state *state)
12919a0bf528SMauro Carvalho Chehab {
12929a0bf528SMauro Carvalho Chehab u8 reg;
12939a0bf528SMauro Carvalho Chehab u8 stop_clk[2];
12949a0bf528SMauro Carvalho Chehab
12959a0bf528SMauro Carvalho Chehab stop_clk[0] = stb0899_read_reg(state, STB0899_STOPCLK1);
12969a0bf528SMauro Carvalho Chehab stop_clk[1] = stb0899_read_reg(state, STB0899_STOPCLK2);
12979a0bf528SMauro Carvalho Chehab
12989a0bf528SMauro Carvalho Chehab switch (state->delsys) {
12999a0bf528SMauro Carvalho Chehab case SYS_DVBS:
13009a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Delivery System -- DVB-S");
13019a0bf528SMauro Carvalho Chehab /* FECM/Viterbi ON */
13029a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_FECM);
13039a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 0);
13049a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 1);
13059a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_FECM, reg);
13069a0bf528SMauro Carvalho Chehab
13079a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_RSULC, 0xb1);
13089a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_TSULC, 0x40);
13099a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_RSLLC, 0x42);
13109a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_TSLPL, 0x12);
13119a0bf528SMauro Carvalho Chehab
13129a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_TSTRES);
13139a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(FRESLDPC, reg, 1);
13149a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_TSTRES, reg);
13159a0bf528SMauro Carvalho Chehab
13169a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CHK8PSK, stop_clk[0], 1);
13179a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKFEC108, stop_clk[0], 1);
13189a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKFEC216, stop_clk[0], 1);
13199a0bf528SMauro Carvalho Chehab
13209a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKPKDLIN108, stop_clk[1], 1);
13219a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKPKDLIN216, stop_clk[1], 1);
13229a0bf528SMauro Carvalho Chehab
13239a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKINTBUF216, stop_clk[0], 1);
13249a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKCORE216, stop_clk[0], 0);
13259a0bf528SMauro Carvalho Chehab
13269a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKS2DMD108, stop_clk[1], 1);
13279a0bf528SMauro Carvalho Chehab break;
13289a0bf528SMauro Carvalho Chehab case SYS_DVBS2:
13299a0bf528SMauro Carvalho Chehab /* FECM/Viterbi OFF */
13309a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_FECM);
13319a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 0);
13329a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 0);
13339a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_FECM, reg);
13349a0bf528SMauro Carvalho Chehab
13359a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_RSULC, 0xb1);
13369a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_TSULC, 0x42);
13379a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_RSLLC, 0x40);
13389a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_TSLPL, 0x02);
13399a0bf528SMauro Carvalho Chehab
13409a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_TSTRES);
13419a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(FRESLDPC, reg, 0);
13429a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_TSTRES, reg);
13439a0bf528SMauro Carvalho Chehab
13449a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CHK8PSK, stop_clk[0], 1);
13459a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKFEC108, stop_clk[0], 0);
13469a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKFEC216, stop_clk[0], 0);
13479a0bf528SMauro Carvalho Chehab
13489a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKPKDLIN108, stop_clk[1], 0);
13499a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKPKDLIN216, stop_clk[1], 0);
13509a0bf528SMauro Carvalho Chehab
13519a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKINTBUF216, stop_clk[0], 0);
13529a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKCORE216, stop_clk[0], 0);
13539a0bf528SMauro Carvalho Chehab
13549a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKS2DMD108, stop_clk[1], 0);
13559a0bf528SMauro Carvalho Chehab break;
13569a0bf528SMauro Carvalho Chehab case SYS_DSS:
13579a0bf528SMauro Carvalho Chehab /* FECM/Viterbi ON */
13589a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_FECM);
13599a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 1);
13609a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 1);
13619a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_FECM, reg);
13629a0bf528SMauro Carvalho Chehab
13639a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_RSULC, 0xa1);
13649a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_TSULC, 0x61);
13659a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_RSLLC, 0x42);
13669a0bf528SMauro Carvalho Chehab
13679a0bf528SMauro Carvalho Chehab reg = stb0899_read_reg(state, STB0899_TSTRES);
13689a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(FRESLDPC, reg, 1);
13699a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_TSTRES, reg);
13709a0bf528SMauro Carvalho Chehab
13719a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CHK8PSK, stop_clk[0], 1);
13729a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKFEC108, stop_clk[0], 1);
13739a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKFEC216, stop_clk[0], 1);
13749a0bf528SMauro Carvalho Chehab
13759a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKPKDLIN108, stop_clk[1], 1);
13769a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKPKDLIN216, stop_clk[1], 1);
13779a0bf528SMauro Carvalho Chehab
13789a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKCORE216, stop_clk[0], 0);
13799a0bf528SMauro Carvalho Chehab
13809a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKS2DMD108, stop_clk[1], 1);
13819a0bf528SMauro Carvalho Chehab break;
13829a0bf528SMauro Carvalho Chehab default:
13839a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_ERROR, 1, "Unsupported delivery system");
13849a0bf528SMauro Carvalho Chehab break;
13859a0bf528SMauro Carvalho Chehab }
13869a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(STOP_CKADCI108, stop_clk[0], 0);
13879a0bf528SMauro Carvalho Chehab stb0899_write_regs(state, STB0899_STOPCLK1, stop_clk, 2);
13889a0bf528SMauro Carvalho Chehab }
13899a0bf528SMauro Carvalho Chehab
13909a0bf528SMauro Carvalho Chehab /*
13919a0bf528SMauro Carvalho Chehab * stb0899_set_iterations
13929a0bf528SMauro Carvalho Chehab * set the LDPC iteration scale function
13939a0bf528SMauro Carvalho Chehab */
stb0899_set_iterations(struct stb0899_state * state)13949a0bf528SMauro Carvalho Chehab static void stb0899_set_iterations(struct stb0899_state *state)
13959a0bf528SMauro Carvalho Chehab {
13969a0bf528SMauro Carvalho Chehab struct stb0899_internal *internal = &state->internal;
13979a0bf528SMauro Carvalho Chehab struct stb0899_config *config = state->config;
13989a0bf528SMauro Carvalho Chehab
13999a0bf528SMauro Carvalho Chehab s32 iter_scale;
14009a0bf528SMauro Carvalho Chehab u32 reg;
14019a0bf528SMauro Carvalho Chehab
14029a0bf528SMauro Carvalho Chehab iter_scale = 17 * (internal->master_clk / 1000);
14039a0bf528SMauro Carvalho Chehab iter_scale += 410000;
14049a0bf528SMauro Carvalho Chehab iter_scale /= (internal->srate / 1000000);
14059a0bf528SMauro Carvalho Chehab iter_scale /= 1000;
14069a0bf528SMauro Carvalho Chehab
14079a0bf528SMauro Carvalho Chehab if (iter_scale > config->ldpc_max_iter)
14089a0bf528SMauro Carvalho Chehab iter_scale = config->ldpc_max_iter;
14099a0bf528SMauro Carvalho Chehab
14109a0bf528SMauro Carvalho Chehab reg = STB0899_READ_S2REG(STB0899_S2FEC, MAX_ITER);
14119a0bf528SMauro Carvalho Chehab STB0899_SETFIELD_VAL(MAX_ITERATIONS, reg, iter_scale);
14129a0bf528SMauro Carvalho Chehab stb0899_write_s2reg(state, STB0899_S2FEC, STB0899_BASE_MAX_ITER, STB0899_OFF0_MAX_ITER, reg);
14139a0bf528SMauro Carvalho Chehab }
14149a0bf528SMauro Carvalho Chehab
stb0899_search(struct dvb_frontend * fe)14159a0bf528SMauro Carvalho Chehab static enum dvbfe_search stb0899_search(struct dvb_frontend *fe)
14169a0bf528SMauro Carvalho Chehab {
14179a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
14189a0bf528SMauro Carvalho Chehab struct stb0899_params *i_params = &state->params;
14199a0bf528SMauro Carvalho Chehab struct stb0899_internal *internal = &state->internal;
14209a0bf528SMauro Carvalho Chehab struct stb0899_config *config = state->config;
14219a0bf528SMauro Carvalho Chehab struct dtv_frontend_properties *props = &fe->dtv_property_cache;
14229a0bf528SMauro Carvalho Chehab
14239a0bf528SMauro Carvalho Chehab u32 SearchRange, gain;
14249a0bf528SMauro Carvalho Chehab
14259a0bf528SMauro Carvalho Chehab i_params->freq = props->frequency;
14269a0bf528SMauro Carvalho Chehab i_params->srate = props->symbol_rate;
14279a0bf528SMauro Carvalho Chehab state->delsys = props->delivery_system;
14289a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "delivery system=%d", state->delsys);
14299a0bf528SMauro Carvalho Chehab
14309a0bf528SMauro Carvalho Chehab SearchRange = 10000000;
14319a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Frequency=%d, Srate=%d", i_params->freq, i_params->srate);
14329a0bf528SMauro Carvalho Chehab /* checking Search Range is meaningless for a fixed 3 Mhz */
14339a0bf528SMauro Carvalho Chehab if (INRANGE(i_params->srate, 1000000, 45000000)) {
14349a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Parameters IN RANGE");
14359a0bf528SMauro Carvalho Chehab stb0899_set_delivery(state);
14369a0bf528SMauro Carvalho Chehab
14379a0bf528SMauro Carvalho Chehab if (state->config->tuner_set_rfsiggain) {
14389a0bf528SMauro Carvalho Chehab if (internal->srate > 15000000)
14399a0bf528SMauro Carvalho Chehab gain = 8; /* 15Mb < srate < 45Mb, gain = 8dB */
14409a0bf528SMauro Carvalho Chehab else if (internal->srate > 5000000)
14419a0bf528SMauro Carvalho Chehab gain = 12; /* 5Mb < srate < 15Mb, gain = 12dB */
14429a0bf528SMauro Carvalho Chehab else
14439a0bf528SMauro Carvalho Chehab gain = 14; /* 1Mb < srate < 5Mb, gain = 14db */
14449a0bf528SMauro Carvalho Chehab state->config->tuner_set_rfsiggain(fe, gain);
14459a0bf528SMauro Carvalho Chehab }
14469a0bf528SMauro Carvalho Chehab
14479a0bf528SMauro Carvalho Chehab if (i_params->srate <= 5000000)
14489a0bf528SMauro Carvalho Chehab stb0899_set_mclk(state, config->lo_clk);
14499a0bf528SMauro Carvalho Chehab else
14509a0bf528SMauro Carvalho Chehab stb0899_set_mclk(state, config->hi_clk);
14519a0bf528SMauro Carvalho Chehab
14529a0bf528SMauro Carvalho Chehab switch (state->delsys) {
14539a0bf528SMauro Carvalho Chehab case SYS_DVBS:
14549a0bf528SMauro Carvalho Chehab case SYS_DSS:
14559a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "DVB-S delivery system");
14569a0bf528SMauro Carvalho Chehab internal->freq = i_params->freq;
14579a0bf528SMauro Carvalho Chehab internal->srate = i_params->srate;
14589a0bf528SMauro Carvalho Chehab /*
14599a0bf528SMauro Carvalho Chehab * search = user search range +
14609a0bf528SMauro Carvalho Chehab * 500Khz +
14619a0bf528SMauro Carvalho Chehab * 2 * Tuner_step_size +
14629a0bf528SMauro Carvalho Chehab * 10% of the symbol rate
14639a0bf528SMauro Carvalho Chehab */
14649a0bf528SMauro Carvalho Chehab internal->srch_range = SearchRange + 1500000 + (i_params->srate / 5);
14659a0bf528SMauro Carvalho Chehab internal->derot_percent = 30;
14669a0bf528SMauro Carvalho Chehab
14679a0bf528SMauro Carvalho Chehab /* What to do for tuners having no bandwidth setup ? */
14689a0bf528SMauro Carvalho Chehab /* enable tuner I/O */
14699a0bf528SMauro Carvalho Chehab stb0899_i2c_gate_ctrl(&state->frontend, 1);
14709a0bf528SMauro Carvalho Chehab
14719a0bf528SMauro Carvalho Chehab if (state->config->tuner_set_bandwidth)
14729a0bf528SMauro Carvalho Chehab state->config->tuner_set_bandwidth(fe, (13 * (stb0899_carr_width(state) + SearchRange)) / 10);
14739a0bf528SMauro Carvalho Chehab if (state->config->tuner_get_bandwidth)
14749a0bf528SMauro Carvalho Chehab state->config->tuner_get_bandwidth(fe, &internal->tuner_bw);
14759a0bf528SMauro Carvalho Chehab
14769a0bf528SMauro Carvalho Chehab /* disable tuner I/O */
14779a0bf528SMauro Carvalho Chehab stb0899_i2c_gate_ctrl(&state->frontend, 0);
14789a0bf528SMauro Carvalho Chehab
14799a0bf528SMauro Carvalho Chehab /* Set DVB-S1 AGC */
14809a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_AGCRFCFG, 0x11);
14819a0bf528SMauro Carvalho Chehab
14829a0bf528SMauro Carvalho Chehab /* Run the search algorithm */
14839a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "running DVB-S search algo ..");
14849a0bf528SMauro Carvalho Chehab if (stb0899_dvbs_algo(state) == RANGEOK) {
14859a0bf528SMauro Carvalho Chehab internal->lock = 1;
14869a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1,
14879a0bf528SMauro Carvalho Chehab "-------------------------------------> DVB-S LOCK !");
14889a0bf528SMauro Carvalho Chehab
14899a0bf528SMauro Carvalho Chehab // stb0899_write_reg(state, STB0899_ERRCTRL1, 0x3d); /* Viterbi Errors */
14909a0bf528SMauro Carvalho Chehab // internal->v_status = stb0899_read_reg(state, STB0899_VSTATUS);
14919a0bf528SMauro Carvalho Chehab // internal->err_ctrl = stb0899_read_reg(state, STB0899_ERRCTRL1);
14929a0bf528SMauro Carvalho Chehab // dprintk(state->verbose, FE_DEBUG, 1, "VSTATUS=0x%02x", internal->v_status);
14939a0bf528SMauro Carvalho Chehab // dprintk(state->verbose, FE_DEBUG, 1, "ERR_CTRL=0x%02x", internal->err_ctrl);
14949a0bf528SMauro Carvalho Chehab
14959a0bf528SMauro Carvalho Chehab return DVBFE_ALGO_SEARCH_SUCCESS;
14969a0bf528SMauro Carvalho Chehab } else {
14979a0bf528SMauro Carvalho Chehab internal->lock = 0;
14989a0bf528SMauro Carvalho Chehab
14999a0bf528SMauro Carvalho Chehab return DVBFE_ALGO_SEARCH_FAILED;
15009a0bf528SMauro Carvalho Chehab }
15019a0bf528SMauro Carvalho Chehab break;
15029a0bf528SMauro Carvalho Chehab case SYS_DVBS2:
15039a0bf528SMauro Carvalho Chehab internal->freq = i_params->freq;
15049a0bf528SMauro Carvalho Chehab internal->srate = i_params->srate;
15059a0bf528SMauro Carvalho Chehab internal->srch_range = SearchRange;
15069a0bf528SMauro Carvalho Chehab
15079a0bf528SMauro Carvalho Chehab /* enable tuner I/O */
15089a0bf528SMauro Carvalho Chehab stb0899_i2c_gate_ctrl(&state->frontend, 1);
15099a0bf528SMauro Carvalho Chehab
15109a0bf528SMauro Carvalho Chehab if (state->config->tuner_set_bandwidth)
15119a0bf528SMauro Carvalho Chehab state->config->tuner_set_bandwidth(fe, (stb0899_carr_width(state) + SearchRange));
15129a0bf528SMauro Carvalho Chehab if (state->config->tuner_get_bandwidth)
15139a0bf528SMauro Carvalho Chehab state->config->tuner_get_bandwidth(fe, &internal->tuner_bw);
15149a0bf528SMauro Carvalho Chehab
15159a0bf528SMauro Carvalho Chehab /* disable tuner I/O */
15169a0bf528SMauro Carvalho Chehab stb0899_i2c_gate_ctrl(&state->frontend, 0);
15179a0bf528SMauro Carvalho Chehab
15189a0bf528SMauro Carvalho Chehab // pParams->SpectralInv = pSearch->IQ_Inversion;
15199a0bf528SMauro Carvalho Chehab
15209a0bf528SMauro Carvalho Chehab /* Set DVB-S2 AGC */
15219a0bf528SMauro Carvalho Chehab stb0899_write_reg(state, STB0899_AGCRFCFG, 0x1c);
15229a0bf528SMauro Carvalho Chehab
15239a0bf528SMauro Carvalho Chehab /* Set IterScale =f(MCLK,SYMB) */
15249a0bf528SMauro Carvalho Chehab stb0899_set_iterations(state);
15259a0bf528SMauro Carvalho Chehab
15269a0bf528SMauro Carvalho Chehab /* Run the search algorithm */
15279a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "running DVB-S2 search algo ..");
15289a0bf528SMauro Carvalho Chehab if (stb0899_dvbs2_algo(state) == DVBS2_FEC_LOCK) {
15299a0bf528SMauro Carvalho Chehab internal->lock = 1;
15309a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1,
15319a0bf528SMauro Carvalho Chehab "-------------------------------------> DVB-S2 LOCK !");
15329a0bf528SMauro Carvalho Chehab
15339a0bf528SMauro Carvalho Chehab // stb0899_write_reg(state, STB0899_ERRCTRL1, 0xb6); /* Packet Errors */
15349a0bf528SMauro Carvalho Chehab // internal->v_status = stb0899_read_reg(state, STB0899_VSTATUS);
15359a0bf528SMauro Carvalho Chehab // internal->err_ctrl = stb0899_read_reg(state, STB0899_ERRCTRL1);
15369a0bf528SMauro Carvalho Chehab
15379a0bf528SMauro Carvalho Chehab return DVBFE_ALGO_SEARCH_SUCCESS;
15389a0bf528SMauro Carvalho Chehab } else {
15399a0bf528SMauro Carvalho Chehab internal->lock = 0;
15409a0bf528SMauro Carvalho Chehab
15419a0bf528SMauro Carvalho Chehab return DVBFE_ALGO_SEARCH_FAILED;
15429a0bf528SMauro Carvalho Chehab }
15439a0bf528SMauro Carvalho Chehab break;
15449a0bf528SMauro Carvalho Chehab default:
15459a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_ERROR, 1, "Unsupported delivery system");
15469a0bf528SMauro Carvalho Chehab return DVBFE_ALGO_SEARCH_INVALID;
15479a0bf528SMauro Carvalho Chehab }
15489a0bf528SMauro Carvalho Chehab }
15499a0bf528SMauro Carvalho Chehab
15509a0bf528SMauro Carvalho Chehab return DVBFE_ALGO_SEARCH_ERROR;
15519a0bf528SMauro Carvalho Chehab }
15529a0bf528SMauro Carvalho Chehab
stb0899_get_frontend(struct dvb_frontend * fe,struct dtv_frontend_properties * p)15537e3e68bcSMauro Carvalho Chehab static int stb0899_get_frontend(struct dvb_frontend *fe,
15547e3e68bcSMauro Carvalho Chehab struct dtv_frontend_properties *p)
15559a0bf528SMauro Carvalho Chehab {
15569a0bf528SMauro Carvalho Chehab struct stb0899_state *state = fe->demodulator_priv;
15579a0bf528SMauro Carvalho Chehab struct stb0899_internal *internal = &state->internal;
15589a0bf528SMauro Carvalho Chehab
15599a0bf528SMauro Carvalho Chehab dprintk(state->verbose, FE_DEBUG, 1, "Get params");
15609a0bf528SMauro Carvalho Chehab p->symbol_rate = internal->srate;
1561226143f9SReinhard Nissl p->frequency = internal->freq;
15629a0bf528SMauro Carvalho Chehab
15639a0bf528SMauro Carvalho Chehab return 0;
15649a0bf528SMauro Carvalho Chehab }
15659a0bf528SMauro Carvalho Chehab
stb0899_frontend_algo(struct dvb_frontend * fe)15669a0bf528SMauro Carvalho Chehab static enum dvbfe_algo stb0899_frontend_algo(struct dvb_frontend *fe)
15679a0bf528SMauro Carvalho Chehab {
15689a0bf528SMauro Carvalho Chehab return DVBFE_ALGO_CUSTOM;
15699a0bf528SMauro Carvalho Chehab }
15709a0bf528SMauro Carvalho Chehab
1571bd336e63SMax Kellermann static const struct dvb_frontend_ops stb0899_ops = {
15729a0bf528SMauro Carvalho Chehab .delsys = { SYS_DVBS, SYS_DVBS2, SYS_DSS },
15739a0bf528SMauro Carvalho Chehab .info = {
15749a0bf528SMauro Carvalho Chehab .name = "STB0899 Multistandard",
1575f1b1eabfSMauro Carvalho Chehab .frequency_min_hz = 950 * MHz,
1576f1b1eabfSMauro Carvalho Chehab .frequency_max_hz = 2150 * MHz,
157707ecbf24SMauro Carvalho Chehab .symbol_rate_min = 5000000,
15789a0bf528SMauro Carvalho Chehab .symbol_rate_max = 45000000,
15799a0bf528SMauro Carvalho Chehab
15809a0bf528SMauro Carvalho Chehab .caps = FE_CAN_INVERSION_AUTO |
15819a0bf528SMauro Carvalho Chehab FE_CAN_FEC_AUTO |
15829a0bf528SMauro Carvalho Chehab FE_CAN_2G_MODULATION |
15839a0bf528SMauro Carvalho Chehab FE_CAN_QPSK
15849a0bf528SMauro Carvalho Chehab },
15859a0bf528SMauro Carvalho Chehab
1586f686c143SMax Kellermann .detach = stb0899_detach,
15879a0bf528SMauro Carvalho Chehab .release = stb0899_release,
15889a0bf528SMauro Carvalho Chehab .init = stb0899_init,
15899a0bf528SMauro Carvalho Chehab .sleep = stb0899_sleep,
15909a0bf528SMauro Carvalho Chehab // .wakeup = stb0899_wakeup,
15919a0bf528SMauro Carvalho Chehab
15929a0bf528SMauro Carvalho Chehab .i2c_gate_ctrl = stb0899_i2c_gate_ctrl,
15939a0bf528SMauro Carvalho Chehab
15949a0bf528SMauro Carvalho Chehab .get_frontend_algo = stb0899_frontend_algo,
15959a0bf528SMauro Carvalho Chehab .search = stb0899_search,
15969a0bf528SMauro Carvalho Chehab .get_frontend = stb0899_get_frontend,
15979a0bf528SMauro Carvalho Chehab
15989a0bf528SMauro Carvalho Chehab
15999a0bf528SMauro Carvalho Chehab .read_status = stb0899_read_status,
16009a0bf528SMauro Carvalho Chehab .read_snr = stb0899_read_snr,
16019a0bf528SMauro Carvalho Chehab .read_signal_strength = stb0899_read_signal_strength,
16029a0bf528SMauro Carvalho Chehab .read_ber = stb0899_read_ber,
16039a0bf528SMauro Carvalho Chehab
16049a0bf528SMauro Carvalho Chehab .set_voltage = stb0899_set_voltage,
16059a0bf528SMauro Carvalho Chehab .set_tone = stb0899_set_tone,
16069a0bf528SMauro Carvalho Chehab
16079a0bf528SMauro Carvalho Chehab .diseqc_send_master_cmd = stb0899_send_diseqc_msg,
16089a0bf528SMauro Carvalho Chehab .diseqc_recv_slave_reply = stb0899_recv_slave_reply,
16099a0bf528SMauro Carvalho Chehab .diseqc_send_burst = stb0899_send_diseqc_burst,
16109a0bf528SMauro Carvalho Chehab };
16119a0bf528SMauro Carvalho Chehab
stb0899_attach(struct stb0899_config * config,struct i2c_adapter * i2c)16129a0bf528SMauro Carvalho Chehab struct dvb_frontend *stb0899_attach(struct stb0899_config *config, struct i2c_adapter *i2c)
16139a0bf528SMauro Carvalho Chehab {
16149a0bf528SMauro Carvalho Chehab struct stb0899_state *state = NULL;
16159a0bf528SMauro Carvalho Chehab
16169a0bf528SMauro Carvalho Chehab state = kzalloc(sizeof (struct stb0899_state), GFP_KERNEL);
16179a0bf528SMauro Carvalho Chehab if (state == NULL)
16189a0bf528SMauro Carvalho Chehab goto error;
16199a0bf528SMauro Carvalho Chehab
16209a0bf528SMauro Carvalho Chehab state->verbose = &verbose;
16219a0bf528SMauro Carvalho Chehab state->config = config;
16229a0bf528SMauro Carvalho Chehab state->i2c = i2c;
16239a0bf528SMauro Carvalho Chehab state->frontend.ops = stb0899_ops;
16249a0bf528SMauro Carvalho Chehab state->frontend.demodulator_priv = state;
16250c1d2b14SReinhard Nißl /* use configured inversion as default -- we'll later autodetect inversion */
16260c1d2b14SReinhard Nißl state->internal.inversion = config->inversion;
16279a0bf528SMauro Carvalho Chehab
16289a0bf528SMauro Carvalho Chehab stb0899_wakeup(&state->frontend);
16299a0bf528SMauro Carvalho Chehab if (stb0899_get_dev_id(state) == -ENODEV) {
16309a0bf528SMauro Carvalho Chehab printk("%s: Exiting .. !\n", __func__);
16319a0bf528SMauro Carvalho Chehab goto error;
16329a0bf528SMauro Carvalho Chehab }
16339a0bf528SMauro Carvalho Chehab
16349a0bf528SMauro Carvalho Chehab printk("%s: Attaching STB0899 \n", __func__);
16359a0bf528SMauro Carvalho Chehab return &state->frontend;
16369a0bf528SMauro Carvalho Chehab
16379a0bf528SMauro Carvalho Chehab error:
16389a0bf528SMauro Carvalho Chehab kfree(state);
16399a0bf528SMauro Carvalho Chehab return NULL;
16409a0bf528SMauro Carvalho Chehab }
1641*86495af1SGreg Kroah-Hartman EXPORT_SYMBOL_GPL(stb0899_attach);
16429a0bf528SMauro Carvalho Chehab MODULE_PARM_DESC(verbose, "Set Verbosity level");
16439a0bf528SMauro Carvalho Chehab MODULE_AUTHOR("Manu Abraham");
16449a0bf528SMauro Carvalho Chehab MODULE_DESCRIPTION("STB0899 Multi-Std frontend");
16459a0bf528SMauro Carvalho Chehab MODULE_LICENSE("GPL");
1646