1 /*
2  * Driver for Silicon Labs SI2165 DVB-C/-T Demodulator
3  *
4  * Copyright (C) 2013-2017 Matthias Schwarzott <zzam@gentoo.org>
5  *
6  *   This program is free software; you can redistribute it and/or modify
7  *   it under the terms of the GNU General Public License as published by
8  *   the Free Software Foundation; either version 2 of the License, or
9  *   (at your option) any later version.
10  *
11  *   This program is distributed in the hope that it will be useful,
12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *   GNU General Public License for more details.
15  *
16  */
17 
18 #ifndef _DVB_SI2165_PRIV
19 #define _DVB_SI2165_PRIV
20 
21 #define SI2165_FIRMWARE_REV_D "dvb-demod-si2165.fw"
22 
23 struct si2165_config {
24 	/* i2c addr
25 	 * possible values: 0x64,0x65,0x66,0x67
26 	 */
27 	u8 i2c_addr;
28 
29 	/* external clock or XTAL */
30 	u8 chip_mode;
31 
32 	/* frequency of external clock or xtal in Hz
33 	 * possible values: 4000000, 16000000, 20000000, 240000000, 27000000
34 	 */
35 	u32 ref_freq_hz;
36 
37 	/* invert the spectrum */
38 	bool inversion;
39 };
40 
41 #define STATISTICS_PERIOD_PKT_COUNT	30000u
42 #define STATISTICS_PERIOD_BIT_COUNT	(STATISTICS_PERIOD_PKT_COUNT * 204 * 8)
43 
44 #define REG_CHIP_MODE			0x0000
45 #define REG_CHIP_REVCODE		0x0023
46 #define REV_CHIP_TYPE			0x0118
47 #define REG_CHIP_INIT			0x0050
48 #define REG_INIT_DONE			0x0054
49 #define REG_START_INIT			0x0096
50 #define REG_PLL_DIVL			0x00a0
51 #define REG_RST_ALL			0x00c0
52 #define REG_LOCK_TIMEOUT		0x00c4
53 #define REG_AUTO_RESET			0x00cb
54 #define REG_OVERSAMP			0x00e4
55 #define REG_IF_FREQ_SHIFT		0x00e8
56 #define REG_DVB_STANDARD		0x00ec
57 #define REG_DSP_CLOCK			0x0104
58 #define REG_ADC_RI8			0x0123
59 #define REG_ADC_RI1			0x012a
60 #define REG_ADC_RI2			0x012b
61 #define REG_ADC_RI3			0x012c
62 #define REG_ADC_RI4			0x012d
63 #define REG_ADC_RI5			0x012e
64 #define REG_ADC_RI6			0x012f
65 #define REG_AGC_CRESTF_DBX8		0x0150
66 #define REG_AGC_UNFREEZE_THR		0x015b
67 #define REG_AGC2_MIN			0x016e
68 #define REG_AGC2_KACQ			0x016c
69 #define REG_AGC2_KLOC			0x016d
70 #define REG_AGC2_OUTPUT			0x0170
71 #define REG_AGC2_CLKDIV			0x0171
72 #define REG_AGC_IF_TRI			0x018b
73 #define REG_AGC_IF_SLR			0x0190
74 #define REG_AAF_CRESTF_DBX8		0x01a0
75 #define REG_ACI_CRESTF_DBX8		0x01c8
76 #define REG_SWEEP_STEP			0x0232
77 #define REG_KP_LOCK			0x023a
78 #define REG_UNKNOWN_24C			0x024c
79 #define REG_CENTRAL_TAP			0x0261
80 #define REG_C_N				0x026c
81 #define REG_EQ_AUTO_CONTROL		0x0278
82 #define REG_UNKNOWN_27C			0x027c
83 #define REG_START_SYNCHRO		0x02e0
84 #define REG_REQ_CONSTELLATION		0x02f4
85 #define REG_T_BANDWIDTH			0x0308
86 #define REG_FREQ_SYNC_RANGE		0x030c
87 #define REG_IMPULSIVE_NOISE_REM		0x031c
88 #define REG_WDOG_AND_BOOT		0x0341
89 #define REG_PATCH_VERSION		0x0344
90 #define REG_ADDR_JUMP			0x0348
91 #define REG_UNKNOWN_350			0x0350
92 #define REG_EN_RST_ERROR		0x035c
93 #define REG_DCOM_CONTROL_BYTE		0x0364
94 #define REG_DCOM_ADDR			0x0368
95 #define REG_DCOM_DATA			0x036c
96 #define REG_RST_CRC			0x0379
97 #define REG_GP_REG0_LSB			0x0384
98 #define REG_GP_REG0_MSB			0x0387
99 #define REG_CRC				0x037a
100 #define REG_CHECK_SIGNAL		0x03a8
101 #define REG_CBER_RST			0x0424
102 #define REG_CBER_BIT			0x0428
103 #define REG_CBER_ERR			0x0430
104 #define REG_CBER_AVAIL			0x0434
105 #define REG_PS_LOCK			0x0440
106 #define REG_UNCOR_CNT			0x0468
107 #define REG_BER_RST			0x046c
108 #define REG_BER_PKT			0x0470
109 #define REG_BER_BIT			0x0478
110 #define REG_BER_AVAIL			0x047c
111 #define REG_FEC_LOCK			0x04e0
112 #define REG_TS_DATA_MODE		0x04e4
113 #define REG_TS_CLK_MODE			0x04e5
114 #define REG_TS_TRI			0x04ef
115 #define REG_TS_SLR			0x04f4
116 #define REG_RSSI_ENABLE			0x0641
117 #define REG_RSSI_PAD_CTRL		0x0646
118 #define REG_TS_PARALLEL_MODE		0x08f8
119 
120 #endif /* _DVB_SI2165_PRIV */
121