1 /* 2 * Driver for Silicon Labs Si2161 DVB-T and Si2165 DVB-C/-T Demodulator 3 * 4 * Copyright (C) 2013-2014 Matthias Schwarzott <zzam@gentoo.org> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * References: 17 * http://www.silabs.com/Support%20Documents/TechnicalDocs/Si2165-short.pdf 18 */ 19 20 #include <linux/delay.h> 21 #include <linux/errno.h> 22 #include <linux/init.h> 23 #include <linux/kernel.h> 24 #include <linux/module.h> 25 #include <linux/string.h> 26 #include <linux/slab.h> 27 #include <linux/firmware.h> 28 29 #include "dvb_frontend.h" 30 #include "dvb_math.h" 31 #include "si2165_priv.h" 32 #include "si2165.h" 33 34 /* 35 * Hauppauge WinTV-HVR-930C-HD B130 / PCTV QuatroStick 521e 1113xx 36 * uses 16 MHz xtal 37 * 38 * Hauppauge WinTV-HVR-930C-HD B131 / PCTV QuatroStick 522e 1114xx 39 * uses 24 MHz clock provided by tuner 40 */ 41 42 struct si2165_state { 43 struct i2c_adapter *i2c; 44 45 struct dvb_frontend fe; 46 47 struct si2165_config config; 48 49 u8 chip_revcode; 50 u8 chip_type; 51 52 /* calculated by xtal and div settings */ 53 u32 fvco_hz; 54 u32 sys_clk; 55 u32 adc_clk; 56 57 bool has_dvbc; 58 bool has_dvbt; 59 bool firmware_loaded; 60 }; 61 62 #define DEBUG_OTHER 0x01 63 #define DEBUG_I2C_WRITE 0x02 64 #define DEBUG_I2C_READ 0x04 65 #define DEBUG_REG_READ 0x08 66 #define DEBUG_REG_WRITE 0x10 67 #define DEBUG_FW_LOAD 0x20 68 69 static int debug = 0x00; 70 71 #define dprintk(args...) \ 72 do { \ 73 if (debug & DEBUG_OTHER) \ 74 printk(KERN_DEBUG "si2165: " args); \ 75 } while (0) 76 77 #define deb_i2c_write(args...) \ 78 do { \ 79 if (debug & DEBUG_I2C_WRITE) \ 80 printk(KERN_DEBUG "si2165: i2c write: " args); \ 81 } while (0) 82 83 #define deb_i2c_read(args...) \ 84 do { \ 85 if (debug & DEBUG_I2C_READ) \ 86 printk(KERN_DEBUG "si2165: i2c read: " args); \ 87 } while (0) 88 89 #define deb_readreg(args...) \ 90 do { \ 91 if (debug & DEBUG_REG_READ) \ 92 printk(KERN_DEBUG "si2165: reg read: " args); \ 93 } while (0) 94 95 #define deb_writereg(args...) \ 96 do { \ 97 if (debug & DEBUG_REG_WRITE) \ 98 printk(KERN_DEBUG "si2165: reg write: " args); \ 99 } while (0) 100 101 #define deb_fw_load(args...) \ 102 do { \ 103 if (debug & DEBUG_FW_LOAD) \ 104 printk(KERN_DEBUG "si2165: fw load: " args); \ 105 } while (0) 106 107 static int si2165_write(struct si2165_state *state, const u16 reg, 108 const u8 *src, const int count) 109 { 110 int ret; 111 struct i2c_msg msg; 112 u8 buf[2 + 4]; /* write a maximum of 4 bytes of data */ 113 114 if (count + 2 > sizeof(buf)) { 115 dev_warn(&state->i2c->dev, 116 "%s: i2c wr reg=%04x: count=%d is too big!\n", 117 KBUILD_MODNAME, reg, count); 118 return -EINVAL; 119 } 120 buf[0] = reg >> 8; 121 buf[1] = reg & 0xff; 122 memcpy(buf + 2, src, count); 123 124 msg.addr = state->config.i2c_addr; 125 msg.flags = 0; 126 msg.buf = buf; 127 msg.len = count + 2; 128 129 if (debug & DEBUG_I2C_WRITE) 130 deb_i2c_write("reg: 0x%04x, data: %*ph\n", reg, count, src); 131 132 ret = i2c_transfer(state->i2c, &msg, 1); 133 134 if (ret != 1) { 135 dev_err(&state->i2c->dev, "%s: ret == %d\n", __func__, ret); 136 if (ret < 0) 137 return ret; 138 else 139 return -EREMOTEIO; 140 } 141 142 return 0; 143 } 144 145 static int si2165_read(struct si2165_state *state, 146 const u16 reg, u8 *val, const int count) 147 { 148 int ret; 149 u8 reg_buf[] = { reg >> 8, reg & 0xff }; 150 struct i2c_msg msg[] = { 151 { .addr = state->config.i2c_addr, 152 .flags = 0, .buf = reg_buf, .len = 2 }, 153 { .addr = state->config.i2c_addr, 154 .flags = I2C_M_RD, .buf = val, .len = count }, 155 }; 156 157 ret = i2c_transfer(state->i2c, msg, 2); 158 159 if (ret != 2) { 160 dev_err(&state->i2c->dev, "%s: error (addr %02x reg %04x error (ret == %i)\n", 161 __func__, state->config.i2c_addr, reg, ret); 162 if (ret < 0) 163 return ret; 164 else 165 return -EREMOTEIO; 166 } 167 168 if (debug & DEBUG_I2C_READ) 169 deb_i2c_read("reg: 0x%04x, data: %*ph\n", reg, count, val); 170 171 return 0; 172 } 173 174 static int si2165_readreg8(struct si2165_state *state, 175 const u16 reg, u8 *val) 176 { 177 int ret; 178 179 ret = si2165_read(state, reg, val, 1); 180 deb_readreg("R(0x%04x)=0x%02x\n", reg, *val); 181 return ret; 182 } 183 184 static int si2165_readreg16(struct si2165_state *state, 185 const u16 reg, u16 *val) 186 { 187 u8 buf[2]; 188 189 int ret = si2165_read(state, reg, buf, 2); 190 *val = buf[0] | buf[1] << 8; 191 deb_readreg("R(0x%04x)=0x%04x\n", reg, *val); 192 return ret; 193 } 194 195 static int si2165_writereg8(struct si2165_state *state, const u16 reg, u8 val) 196 { 197 return si2165_write(state, reg, &val, 1); 198 } 199 200 static int si2165_writereg16(struct si2165_state *state, const u16 reg, u16 val) 201 { 202 u8 buf[2] = { val & 0xff, (val >> 8) & 0xff }; 203 204 return si2165_write(state, reg, buf, 2); 205 } 206 207 static int si2165_writereg24(struct si2165_state *state, const u16 reg, u32 val) 208 { 209 u8 buf[3] = { val & 0xff, (val >> 8) & 0xff, (val >> 16) & 0xff }; 210 211 return si2165_write(state, reg, buf, 3); 212 } 213 214 static int si2165_writereg32(struct si2165_state *state, const u16 reg, u32 val) 215 { 216 u8 buf[4] = { 217 val & 0xff, 218 (val >> 8) & 0xff, 219 (val >> 16) & 0xff, 220 (val >> 24) & 0xff 221 }; 222 return si2165_write(state, reg, buf, 4); 223 } 224 225 static int si2165_writereg_mask8(struct si2165_state *state, const u16 reg, 226 u8 val, u8 mask) 227 { 228 int ret; 229 u8 tmp; 230 231 if (mask != 0xff) { 232 ret = si2165_readreg8(state, reg, &tmp); 233 if (ret < 0) 234 goto err; 235 236 val &= mask; 237 tmp &= ~mask; 238 val |= tmp; 239 } 240 241 ret = si2165_writereg8(state, reg, val); 242 err: 243 return ret; 244 } 245 246 #define REG16(reg, val) { (reg), (val) & 0xff }, { (reg)+1, (val)>>8 & 0xff } 247 struct si2165_reg_value_pair { 248 u16 reg; 249 u8 val; 250 }; 251 252 static int si2165_write_reg_list(struct si2165_state *state, 253 const struct si2165_reg_value_pair *regs, 254 int count) 255 { 256 int i; 257 int ret; 258 259 for (i = 0; i < count; i++) { 260 ret = si2165_writereg8(state, regs[i].reg, regs[i].val); 261 if (ret < 0) 262 return ret; 263 } 264 return 0; 265 } 266 267 static int si2165_get_tune_settings(struct dvb_frontend *fe, 268 struct dvb_frontend_tune_settings *s) 269 { 270 s->min_delay_ms = 1000; 271 return 0; 272 } 273 274 static int si2165_init_pll(struct si2165_state *state) 275 { 276 u32 ref_freq_Hz = state->config.ref_freq_Hz; 277 u8 divr = 1; /* 1..7 */ 278 u8 divp = 1; /* only 1 or 4 */ 279 u8 divn = 56; /* 1..63 */ 280 u8 divm = 8; 281 u8 divl = 12; 282 u8 buf[4]; 283 284 /* 285 * hardcoded values can be deleted if calculation is verified 286 * or it yields the same values as the windows driver 287 */ 288 switch (ref_freq_Hz) { 289 case 16000000u: 290 divn = 56; 291 break; 292 case 24000000u: 293 divr = 2; 294 divp = 4; 295 divn = 19; 296 break; 297 default: 298 /* ref_freq / divr must be between 4 and 16 MHz */ 299 if (ref_freq_Hz > 16000000u) 300 divr = 2; 301 302 /* 303 * now select divn and divp such that 304 * fvco is in 1624..1824 MHz 305 */ 306 if (1624000000u * divr > ref_freq_Hz * 2u * 63u) 307 divp = 4; 308 309 /* is this already correct regarding rounding? */ 310 divn = 1624000000u * divr / (ref_freq_Hz * 2u * divp); 311 break; 312 } 313 314 /* adc_clk and sys_clk depend on xtal and pll settings */ 315 state->fvco_hz = ref_freq_Hz / divr 316 * 2u * divn * divp; 317 state->adc_clk = state->fvco_hz / (divm * 4u); 318 state->sys_clk = state->fvco_hz / (divl * 2u); 319 320 /* write pll registers 0x00a0..0x00a3 at once */ 321 buf[0] = divl; 322 buf[1] = divm; 323 buf[2] = (divn & 0x3f) | ((divp == 1) ? 0x40 : 0x00) | 0x80; 324 buf[3] = divr; 325 return si2165_write(state, 0x00a0, buf, 4); 326 } 327 328 static int si2165_adjust_pll_divl(struct si2165_state *state, u8 divl) 329 { 330 state->sys_clk = state->fvco_hz / (divl * 2u); 331 return si2165_writereg8(state, 0x00a0, divl); /* pll_divl */ 332 } 333 334 static u32 si2165_get_fe_clk(struct si2165_state *state) 335 { 336 /* assume Oversampling mode Ovr4 is used */ 337 return state->adc_clk; 338 } 339 340 static int si2165_wait_init_done(struct si2165_state *state) 341 { 342 int ret = -EINVAL; 343 u8 val = 0; 344 int i; 345 346 for (i = 0; i < 3; ++i) { 347 si2165_readreg8(state, 0x0054, &val); 348 if (val == 0x01) 349 return 0; 350 usleep_range(1000, 50000); 351 } 352 dev_err(&state->i2c->dev, "%s: init_done was not set\n", 353 KBUILD_MODNAME); 354 return ret; 355 } 356 357 static int si2165_upload_firmware_block(struct si2165_state *state, 358 const u8 *data, u32 len, u32 *poffset, u32 block_count) 359 { 360 int ret; 361 u8 buf_ctrl[4] = { 0x00, 0x00, 0x00, 0xc0 }; 362 u8 wordcount; 363 u32 cur_block = 0; 364 u32 offset = poffset ? *poffset : 0; 365 366 if (len < 4) 367 return -EINVAL; 368 if (len % 4 != 0) 369 return -EINVAL; 370 371 deb_fw_load( 372 "si2165_upload_firmware_block called with len=0x%x offset=0x%x blockcount=0x%x\n", 373 len, offset, block_count); 374 while (offset+12 <= len && cur_block < block_count) { 375 deb_fw_load( 376 "si2165_upload_firmware_block in while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n", 377 len, offset, cur_block, block_count); 378 wordcount = data[offset]; 379 if (wordcount < 1 || data[offset+1] || 380 data[offset+2] || data[offset+3]) { 381 dev_warn(&state->i2c->dev, 382 "%s: bad fw data[0..3] = %*ph\n", 383 KBUILD_MODNAME, 4, data); 384 return -EINVAL; 385 } 386 387 if (offset + 8 + wordcount * 4 > len) { 388 dev_warn(&state->i2c->dev, 389 "%s: len is too small for block len=%d, wordcount=%d\n", 390 KBUILD_MODNAME, len, wordcount); 391 return -EINVAL; 392 } 393 394 buf_ctrl[0] = wordcount - 1; 395 396 ret = si2165_write(state, 0x0364, buf_ctrl, 4); 397 if (ret < 0) 398 goto error; 399 ret = si2165_write(state, 0x0368, data+offset+4, 4); 400 if (ret < 0) 401 goto error; 402 403 offset += 8; 404 405 while (wordcount > 0) { 406 ret = si2165_write(state, 0x36c, data+offset, 4); 407 if (ret < 0) 408 goto error; 409 wordcount--; 410 offset += 4; 411 } 412 cur_block++; 413 } 414 415 deb_fw_load( 416 "si2165_upload_firmware_block after while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n", 417 len, offset, cur_block, block_count); 418 419 if (poffset) 420 *poffset = offset; 421 422 deb_fw_load("si2165_upload_firmware_block returned offset=0x%x\n", 423 offset); 424 425 return 0; 426 error: 427 return ret; 428 } 429 430 static int si2165_upload_firmware(struct si2165_state *state) 431 { 432 /* int ret; */ 433 u8 val[3]; 434 u16 val16; 435 int ret; 436 437 const struct firmware *fw = NULL; 438 u8 *fw_file; 439 const u8 *data; 440 u32 len; 441 u32 offset; 442 u8 patch_version; 443 u8 block_count; 444 u16 crc_expected; 445 446 switch (state->chip_revcode) { 447 case 0x03: /* revision D */ 448 fw_file = SI2165_FIRMWARE_REV_D; 449 break; 450 default: 451 dev_info(&state->i2c->dev, "%s: no firmware file for revision=%d\n", 452 KBUILD_MODNAME, state->chip_revcode); 453 return 0; 454 } 455 456 /* request the firmware, this will block and timeout */ 457 ret = request_firmware(&fw, fw_file, state->i2c->dev.parent); 458 if (ret) { 459 dev_warn(&state->i2c->dev, "%s: firmware file '%s' not found\n", 460 KBUILD_MODNAME, fw_file); 461 goto error; 462 } 463 464 data = fw->data; 465 len = fw->size; 466 467 dev_info(&state->i2c->dev, "%s: downloading firmware from file '%s' size=%d\n", 468 KBUILD_MODNAME, fw_file, len); 469 470 if (len % 4 != 0) { 471 dev_warn(&state->i2c->dev, "%s: firmware size is not multiple of 4\n", 472 KBUILD_MODNAME); 473 ret = -EINVAL; 474 goto error; 475 } 476 477 /* check header (8 bytes) */ 478 if (len < 8) { 479 dev_warn(&state->i2c->dev, "%s: firmware header is missing\n", 480 KBUILD_MODNAME); 481 ret = -EINVAL; 482 goto error; 483 } 484 485 if (data[0] != 1 || data[1] != 0) { 486 dev_warn(&state->i2c->dev, "%s: firmware file version is wrong\n", 487 KBUILD_MODNAME); 488 ret = -EINVAL; 489 goto error; 490 } 491 492 patch_version = data[2]; 493 block_count = data[4]; 494 crc_expected = data[7] << 8 | data[6]; 495 496 /* start uploading fw */ 497 /* boot/wdog status */ 498 ret = si2165_writereg8(state, 0x0341, 0x00); 499 if (ret < 0) 500 goto error; 501 /* reset */ 502 ret = si2165_writereg8(state, 0x00c0, 0x00); 503 if (ret < 0) 504 goto error; 505 /* boot/wdog status */ 506 ret = si2165_readreg8(state, 0x0341, val); 507 if (ret < 0) 508 goto error; 509 510 /* enable reset on error */ 511 ret = si2165_readreg8(state, 0x035c, val); 512 if (ret < 0) 513 goto error; 514 ret = si2165_readreg8(state, 0x035c, val); 515 if (ret < 0) 516 goto error; 517 ret = si2165_writereg8(state, 0x035c, 0x02); 518 if (ret < 0) 519 goto error; 520 521 /* start right after the header */ 522 offset = 8; 523 524 dev_info(&state->i2c->dev, "%s: si2165_upload_firmware extracted patch_version=0x%02x, block_count=0x%02x, crc_expected=0x%04x\n", 525 KBUILD_MODNAME, patch_version, block_count, crc_expected); 526 527 ret = si2165_upload_firmware_block(state, data, len, &offset, 1); 528 if (ret < 0) 529 goto error; 530 531 ret = si2165_writereg8(state, 0x0344, patch_version); 532 if (ret < 0) 533 goto error; 534 535 /* reset crc */ 536 ret = si2165_writereg8(state, 0x0379, 0x01); 537 if (ret) 538 goto error; 539 540 ret = si2165_upload_firmware_block(state, data, len, 541 &offset, block_count); 542 if (ret < 0) { 543 dev_err(&state->i2c->dev, 544 "%s: firmware could not be uploaded\n", 545 KBUILD_MODNAME); 546 goto error; 547 } 548 549 /* read crc */ 550 ret = si2165_readreg16(state, 0x037a, &val16); 551 if (ret) 552 goto error; 553 554 if (val16 != crc_expected) { 555 dev_err(&state->i2c->dev, 556 "%s: firmware crc mismatch %04x != %04x\n", 557 KBUILD_MODNAME, val16, crc_expected); 558 ret = -EINVAL; 559 goto error; 560 } 561 562 ret = si2165_upload_firmware_block(state, data, len, &offset, 5); 563 if (ret) 564 goto error; 565 566 if (len != offset) { 567 dev_err(&state->i2c->dev, 568 "%s: firmware len mismatch %04x != %04x\n", 569 KBUILD_MODNAME, len, offset); 570 ret = -EINVAL; 571 goto error; 572 } 573 574 /* reset watchdog error register */ 575 ret = si2165_writereg_mask8(state, 0x0341, 0x02, 0x02); 576 if (ret < 0) 577 goto error; 578 579 /* enable reset on error */ 580 ret = si2165_writereg_mask8(state, 0x035c, 0x01, 0x01); 581 if (ret < 0) 582 goto error; 583 584 dev_info(&state->i2c->dev, "%s: fw load finished\n", KBUILD_MODNAME); 585 586 ret = 0; 587 state->firmware_loaded = true; 588 error: 589 if (fw) { 590 release_firmware(fw); 591 fw = NULL; 592 } 593 594 return ret; 595 } 596 597 static int si2165_init(struct dvb_frontend *fe) 598 { 599 int ret = 0; 600 struct si2165_state *state = fe->demodulator_priv; 601 u8 val; 602 u8 patch_version = 0x00; 603 604 dprintk("%s: called\n", __func__); 605 606 /* powerup */ 607 ret = si2165_writereg8(state, 0x0000, state->config.chip_mode); 608 if (ret < 0) 609 goto error; 610 /* dsp_clock_enable */ 611 ret = si2165_writereg8(state, 0x0104, 0x01); 612 if (ret < 0) 613 goto error; 614 ret = si2165_readreg8(state, 0x0000, &val); /* verify chip_mode */ 615 if (ret < 0) 616 goto error; 617 if (val != state->config.chip_mode) { 618 dev_err(&state->i2c->dev, "%s: could not set chip_mode\n", 619 KBUILD_MODNAME); 620 return -EINVAL; 621 } 622 623 /* agc */ 624 ret = si2165_writereg8(state, 0x018b, 0x00); 625 if (ret < 0) 626 goto error; 627 ret = si2165_writereg8(state, 0x0190, 0x01); 628 if (ret < 0) 629 goto error; 630 ret = si2165_writereg8(state, 0x0170, 0x00); 631 if (ret < 0) 632 goto error; 633 ret = si2165_writereg8(state, 0x0171, 0x07); 634 if (ret < 0) 635 goto error; 636 /* rssi pad */ 637 ret = si2165_writereg8(state, 0x0646, 0x00); 638 if (ret < 0) 639 goto error; 640 ret = si2165_writereg8(state, 0x0641, 0x00); 641 if (ret < 0) 642 goto error; 643 644 ret = si2165_init_pll(state); 645 if (ret < 0) 646 goto error; 647 648 /* enable chip_init */ 649 ret = si2165_writereg8(state, 0x0050, 0x01); 650 if (ret < 0) 651 goto error; 652 /* set start_init */ 653 ret = si2165_writereg8(state, 0x0096, 0x01); 654 if (ret < 0) 655 goto error; 656 ret = si2165_wait_init_done(state); 657 if (ret < 0) 658 goto error; 659 660 /* disable chip_init */ 661 ret = si2165_writereg8(state, 0x0050, 0x00); 662 if (ret < 0) 663 goto error; 664 665 /* ber_pkt */ 666 ret = si2165_writereg16(state, 0x0470, 0x7530); 667 if (ret < 0) 668 goto error; 669 670 ret = si2165_readreg8(state, 0x0344, &patch_version); 671 if (ret < 0) 672 goto error; 673 674 ret = si2165_writereg8(state, 0x00cb, 0x00); 675 if (ret < 0) 676 goto error; 677 678 /* dsp_addr_jump */ 679 ret = si2165_writereg32(state, 0x0348, 0xf4000000); 680 if (ret < 0) 681 goto error; 682 /* boot/wdog status */ 683 ret = si2165_readreg8(state, 0x0341, &val); 684 if (ret < 0) 685 goto error; 686 687 if (patch_version == 0x00) { 688 ret = si2165_upload_firmware(state); 689 if (ret < 0) 690 goto error; 691 } 692 693 /* ts output config */ 694 ret = si2165_writereg8(state, 0x04e4, 0x20); 695 if (ret < 0) 696 return ret; 697 ret = si2165_writereg16(state, 0x04ef, 0x00fe); 698 if (ret < 0) 699 return ret; 700 ret = si2165_writereg24(state, 0x04f4, 0x555555); 701 if (ret < 0) 702 return ret; 703 ret = si2165_writereg8(state, 0x04e5, 0x01); 704 if (ret < 0) 705 return ret; 706 707 return 0; 708 error: 709 return ret; 710 } 711 712 static int si2165_sleep(struct dvb_frontend *fe) 713 { 714 int ret; 715 struct si2165_state *state = fe->demodulator_priv; 716 717 /* dsp clock disable */ 718 ret = si2165_writereg8(state, 0x0104, 0x00); 719 if (ret < 0) 720 return ret; 721 /* chip mode */ 722 ret = si2165_writereg8(state, 0x0000, SI2165_MODE_OFF); 723 if (ret < 0) 724 return ret; 725 return 0; 726 } 727 728 static int si2165_read_status(struct dvb_frontend *fe, enum fe_status *status) 729 { 730 int ret; 731 u8 fec_lock = 0; 732 struct si2165_state *state = fe->demodulator_priv; 733 734 if (!state->has_dvbt) 735 return -EINVAL; 736 737 /* check fec_lock */ 738 ret = si2165_readreg8(state, 0x4e0, &fec_lock); 739 if (ret < 0) 740 return ret; 741 *status = 0; 742 if (fec_lock & 0x01) { 743 *status |= FE_HAS_SIGNAL; 744 *status |= FE_HAS_CARRIER; 745 *status |= FE_HAS_VITERBI; 746 *status |= FE_HAS_SYNC; 747 *status |= FE_HAS_LOCK; 748 } 749 750 return 0; 751 } 752 753 static int si2165_set_oversamp(struct si2165_state *state, u32 dvb_rate) 754 { 755 u64 oversamp; 756 u32 reg_value; 757 758 oversamp = si2165_get_fe_clk(state); 759 oversamp <<= 23; 760 do_div(oversamp, dvb_rate); 761 reg_value = oversamp & 0x3fffffff; 762 763 dprintk("%s: Write oversamp=%#x\n", __func__, reg_value); 764 return si2165_writereg32(state, 0x00e4, reg_value); 765 } 766 767 static int si2165_set_if_freq_shift(struct si2165_state *state) 768 { 769 struct dvb_frontend *fe = &state->fe; 770 u64 if_freq_shift; 771 s32 reg_value = 0; 772 u32 fe_clk = si2165_get_fe_clk(state); 773 u32 IF = 0; 774 775 if (!fe->ops.tuner_ops.get_if_frequency) { 776 dev_err(&state->i2c->dev, 777 "%s: Error: get_if_frequency() not defined at tuner. Can't work without it!\n", 778 KBUILD_MODNAME); 779 return -EINVAL; 780 } 781 782 fe->ops.tuner_ops.get_if_frequency(fe, &IF); 783 if_freq_shift = IF; 784 if_freq_shift <<= 29; 785 786 do_div(if_freq_shift, fe_clk); 787 reg_value = (s32)if_freq_shift; 788 789 if (state->config.inversion) 790 reg_value = -reg_value; 791 792 reg_value = reg_value & 0x1fffffff; 793 794 /* if_freq_shift, usbdump contained 0x023ee08f; */ 795 return si2165_writereg32(state, 0x00e8, reg_value); 796 } 797 798 static const struct si2165_reg_value_pair dvbt_regs[] = { 799 /* standard = DVB-T */ 800 { 0x00ec, 0x01 }, 801 { 0x08f8, 0x00 }, 802 /* impulsive_noise_remover */ 803 { 0x031c, 0x01 }, 804 { 0x00cb, 0x00 }, 805 /* agc2 */ 806 { 0x016e, 0x41 }, 807 { 0x016c, 0x0e }, 808 { 0x016d, 0x10 }, 809 /* agc */ 810 { 0x015b, 0x03 }, 811 { 0x0150, 0x78 }, 812 /* agc */ 813 { 0x01a0, 0x78 }, 814 { 0x01c8, 0x68 }, 815 /* freq_sync_range */ 816 REG16(0x030c, 0x0064), 817 /* gp_reg0 */ 818 { 0x0387, 0x00 } 819 }; 820 821 static int si2165_set_frontend_dvbt(struct dvb_frontend *fe) 822 { 823 int ret; 824 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 825 struct si2165_state *state = fe->demodulator_priv; 826 u32 dvb_rate = 0; 827 u16 bw10k; 828 829 dprintk("%s: called\n", __func__); 830 831 if (!state->has_dvbt) 832 return -EINVAL; 833 834 if (p->bandwidth_hz > 0) { 835 dvb_rate = p->bandwidth_hz * 8 / 7; 836 bw10k = p->bandwidth_hz / 10000; 837 } else { 838 dvb_rate = 8 * 8 / 7; 839 bw10k = 800; 840 } 841 842 ret = si2165_adjust_pll_divl(state, 12); 843 if (ret < 0) 844 return ret; 845 846 /* bandwidth in 10KHz steps */ 847 ret = si2165_writereg16(state, 0x0308, bw10k); 848 if (ret < 0) 849 return ret; 850 ret = si2165_set_oversamp(state, dvb_rate); 851 if (ret < 0) 852 return ret; 853 854 ret = si2165_write_reg_list(state, dvbt_regs, ARRAY_SIZE(dvbt_regs)); 855 if (ret < 0) 856 return ret; 857 858 return 0; 859 } 860 861 static const struct si2165_reg_value_pair dvbc_regs[] = { 862 /* standard = DVB-C */ 863 { 0x00ec, 0x05 }, 864 { 0x08f8, 0x00 }, 865 866 /* agc2 */ 867 { 0x016e, 0x50 }, 868 { 0x016c, 0x0e }, 869 { 0x016d, 0x10 }, 870 /* agc */ 871 { 0x015b, 0x03 }, 872 { 0x0150, 0x68 }, 873 /* agc */ 874 { 0x01a0, 0x68 }, 875 { 0x01c8, 0x50 }, 876 877 { 0x0278, 0x0d }, 878 879 { 0x023a, 0x05 }, 880 { 0x0261, 0x09 }, 881 REG16(0x0350, 0x3e80), 882 { 0x02f4, 0x00 }, 883 884 { 0x00cb, 0x01 }, 885 REG16(0x024c, 0x0000), 886 REG16(0x027c, 0x0000), 887 { 0x0232, 0x03 }, 888 { 0x02f4, 0x0b }, 889 { 0x018b, 0x00 }, 890 }; 891 892 static int si2165_set_frontend_dvbc(struct dvb_frontend *fe) 893 { 894 struct si2165_state *state = fe->demodulator_priv; 895 int ret; 896 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 897 const u32 dvb_rate = p->symbol_rate; 898 const u32 bw_hz = p->bandwidth_hz; 899 900 if (!state->has_dvbc) 901 return -EINVAL; 902 903 if (dvb_rate == 0) 904 return -EINVAL; 905 906 ret = si2165_adjust_pll_divl(state, 14); 907 if (ret < 0) 908 return ret; 909 910 /* Oversampling */ 911 ret = si2165_set_oversamp(state, dvb_rate); 912 if (ret < 0) 913 return ret; 914 915 ret = si2165_writereg32(state, 0x00c4, bw_hz); 916 if (ret < 0) 917 return ret; 918 919 ret = si2165_write_reg_list(state, dvbc_regs, ARRAY_SIZE(dvbc_regs)); 920 if (ret < 0) 921 return ret; 922 923 return 0; 924 } 925 926 static const struct si2165_reg_value_pair agc_rewrite[] = { 927 { 0x012a, 0x46 }, 928 { 0x012c, 0x00 }, 929 { 0x012e, 0x0a }, 930 { 0x012f, 0xff }, 931 { 0x0123, 0x70 } 932 }; 933 934 static int si2165_set_frontend(struct dvb_frontend *fe) 935 { 936 struct si2165_state *state = fe->demodulator_priv; 937 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 938 u32 delsys = p->delivery_system; 939 int ret; 940 u8 val[3]; 941 942 /* initial setting of if freq shift */ 943 ret = si2165_set_if_freq_shift(state); 944 if (ret < 0) 945 return ret; 946 947 switch (delsys) { 948 case SYS_DVBT: 949 ret = si2165_set_frontend_dvbt(fe); 950 if (ret < 0) 951 return ret; 952 break; 953 case SYS_DVBC_ANNEX_A: 954 ret = si2165_set_frontend_dvbc(fe); 955 if (ret < 0) 956 return ret; 957 break; 958 default: 959 return -EINVAL; 960 } 961 962 /* dsp_addr_jump */ 963 ret = si2165_writereg32(state, 0x0348, 0xf4000000); 964 if (ret < 0) 965 return ret; 966 967 if (fe->ops.tuner_ops.set_params) 968 fe->ops.tuner_ops.set_params(fe); 969 970 /* recalc if_freq_shift if IF might has changed */ 971 ret = si2165_set_if_freq_shift(state); 972 if (ret < 0) 973 return ret; 974 975 /* boot/wdog status */ 976 ret = si2165_readreg8(state, 0x0341, val); 977 if (ret < 0) 978 return ret; 979 ret = si2165_writereg8(state, 0x0341, 0x00); 980 if (ret < 0) 981 return ret; 982 983 /* reset all */ 984 ret = si2165_writereg8(state, 0x00c0, 0x00); 985 if (ret < 0) 986 return ret; 987 /* gp_reg0 */ 988 ret = si2165_writereg32(state, 0x0384, 0x00000000); 989 if (ret < 0) 990 return ret; 991 992 /* write adc values after each reset*/ 993 ret = si2165_write_reg_list(state, agc_rewrite, 994 ARRAY_SIZE(agc_rewrite)); 995 if (ret < 0) 996 return ret; 997 998 /* start_synchro */ 999 ret = si2165_writereg8(state, 0x02e0, 0x01); 1000 if (ret < 0) 1001 return ret; 1002 /* boot/wdog status */ 1003 ret = si2165_readreg8(state, 0x0341, val); 1004 if (ret < 0) 1005 return ret; 1006 1007 return 0; 1008 } 1009 1010 static void si2165_release(struct dvb_frontend *fe) 1011 { 1012 struct si2165_state *state = fe->demodulator_priv; 1013 1014 dprintk("%s: called\n", __func__); 1015 kfree(state); 1016 } 1017 1018 static struct dvb_frontend_ops si2165_ops = { 1019 .info = { 1020 .name = "Silicon Labs ", 1021 /* For DVB-C */ 1022 .symbol_rate_min = 1000000, 1023 .symbol_rate_max = 7200000, 1024 /* For DVB-T */ 1025 .frequency_stepsize = 166667, 1026 .caps = FE_CAN_FEC_1_2 | 1027 FE_CAN_FEC_2_3 | 1028 FE_CAN_FEC_3_4 | 1029 FE_CAN_FEC_5_6 | 1030 FE_CAN_FEC_7_8 | 1031 FE_CAN_FEC_AUTO | 1032 FE_CAN_QPSK | 1033 FE_CAN_QAM_16 | 1034 FE_CAN_QAM_32 | 1035 FE_CAN_QAM_64 | 1036 FE_CAN_QAM_128 | 1037 FE_CAN_QAM_256 | 1038 FE_CAN_QAM_AUTO | 1039 FE_CAN_GUARD_INTERVAL_AUTO | 1040 FE_CAN_HIERARCHY_AUTO | 1041 FE_CAN_MUTE_TS | 1042 FE_CAN_TRANSMISSION_MODE_AUTO | 1043 FE_CAN_RECOVER 1044 }, 1045 1046 .get_tune_settings = si2165_get_tune_settings, 1047 1048 .init = si2165_init, 1049 .sleep = si2165_sleep, 1050 1051 .set_frontend = si2165_set_frontend, 1052 .read_status = si2165_read_status, 1053 1054 .release = si2165_release, 1055 }; 1056 1057 struct dvb_frontend *si2165_attach(const struct si2165_config *config, 1058 struct i2c_adapter *i2c) 1059 { 1060 struct si2165_state *state = NULL; 1061 int n; 1062 int io_ret; 1063 u8 val; 1064 char rev_char; 1065 const char *chip_name; 1066 1067 if (config == NULL || i2c == NULL) 1068 goto error; 1069 1070 /* allocate memory for the internal state */ 1071 state = kzalloc(sizeof(struct si2165_state), GFP_KERNEL); 1072 if (state == NULL) 1073 goto error; 1074 1075 /* setup the state */ 1076 state->i2c = i2c; 1077 state->config = *config; 1078 1079 if (state->config.ref_freq_Hz < 4000000 1080 || state->config.ref_freq_Hz > 27000000) { 1081 dev_err(&state->i2c->dev, "%s: ref_freq of %d Hz not supported by this driver\n", 1082 KBUILD_MODNAME, state->config.ref_freq_Hz); 1083 goto error; 1084 } 1085 1086 /* create dvb_frontend */ 1087 memcpy(&state->fe.ops, &si2165_ops, 1088 sizeof(struct dvb_frontend_ops)); 1089 state->fe.demodulator_priv = state; 1090 1091 /* powerup */ 1092 io_ret = si2165_writereg8(state, 0x0000, state->config.chip_mode); 1093 if (io_ret < 0) 1094 goto error; 1095 1096 io_ret = si2165_readreg8(state, 0x0000, &val); 1097 if (io_ret < 0) 1098 goto error; 1099 if (val != state->config.chip_mode) 1100 goto error; 1101 1102 io_ret = si2165_readreg8(state, 0x0023, &state->chip_revcode); 1103 if (io_ret < 0) 1104 goto error; 1105 1106 io_ret = si2165_readreg8(state, 0x0118, &state->chip_type); 1107 if (io_ret < 0) 1108 goto error; 1109 1110 /* powerdown */ 1111 io_ret = si2165_writereg8(state, 0x0000, SI2165_MODE_OFF); 1112 if (io_ret < 0) 1113 goto error; 1114 1115 if (state->chip_revcode < 26) 1116 rev_char = 'A' + state->chip_revcode; 1117 else 1118 rev_char = '?'; 1119 1120 switch (state->chip_type) { 1121 case 0x06: 1122 chip_name = "Si2161"; 1123 state->has_dvbt = true; 1124 break; 1125 case 0x07: 1126 chip_name = "Si2165"; 1127 state->has_dvbt = true; 1128 state->has_dvbc = true; 1129 break; 1130 default: 1131 dev_err(&state->i2c->dev, "%s: Unsupported Silicon Labs chip (type %d, rev %d)\n", 1132 KBUILD_MODNAME, state->chip_type, state->chip_revcode); 1133 goto error; 1134 } 1135 1136 dev_info(&state->i2c->dev, 1137 "%s: Detected Silicon Labs %s-%c (type %d, rev %d)\n", 1138 KBUILD_MODNAME, chip_name, rev_char, state->chip_type, 1139 state->chip_revcode); 1140 1141 strlcat(state->fe.ops.info.name, chip_name, 1142 sizeof(state->fe.ops.info.name)); 1143 1144 n = 0; 1145 if (state->has_dvbt) { 1146 state->fe.ops.delsys[n++] = SYS_DVBT; 1147 strlcat(state->fe.ops.info.name, " DVB-T", 1148 sizeof(state->fe.ops.info.name)); 1149 } 1150 if (state->has_dvbc) { 1151 state->fe.ops.delsys[n++] = SYS_DVBC_ANNEX_A; 1152 strlcat(state->fe.ops.info.name, " DVB-C", 1153 sizeof(state->fe.ops.info.name)); 1154 } 1155 1156 return &state->fe; 1157 1158 error: 1159 kfree(state); 1160 return NULL; 1161 } 1162 EXPORT_SYMBOL(si2165_attach); 1163 1164 module_param(debug, int, 0644); 1165 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); 1166 1167 MODULE_DESCRIPTION("Silicon Labs Si2165 DVB-C/-T Demodulator driver"); 1168 MODULE_AUTHOR("Matthias Schwarzott <zzam@gentoo.org>"); 1169 MODULE_LICENSE("GPL"); 1170 MODULE_FIRMWARE(SI2165_FIRMWARE_REV_D); 1171