13e54a169SMatthias Schwarzott /* 218349f40SMatthias Schwarzott * Driver for Silicon Labs Si2161 DVB-T and Si2165 DVB-C/-T Demodulator 318349f40SMatthias Schwarzott * 477f887cdSMatthias Schwarzott * Copyright (C) 2013-2017 Matthias Schwarzott <zzam@gentoo.org> 518349f40SMatthias Schwarzott * 618349f40SMatthias Schwarzott * This program is free software; you can redistribute it and/or modify 718349f40SMatthias Schwarzott * it under the terms of the GNU General Public License as published by 818349f40SMatthias Schwarzott * the Free Software Foundation; either version 2 of the License, or 918349f40SMatthias Schwarzott * (at your option) any later version. 1018349f40SMatthias Schwarzott * 1118349f40SMatthias Schwarzott * This program is distributed in the hope that it will be useful, 1218349f40SMatthias Schwarzott * but WITHOUT ANY WARRANTY; without even the implied warranty of 1318349f40SMatthias Schwarzott * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1418349f40SMatthias Schwarzott * GNU General Public License for more details. 1518349f40SMatthias Schwarzott * 1618349f40SMatthias Schwarzott * References: 1718349f40SMatthias Schwarzott * http://www.silabs.com/Support%20Documents/TechnicalDocs/Si2165-short.pdf 183e54a169SMatthias Schwarzott */ 193e54a169SMatthias Schwarzott 203e54a169SMatthias Schwarzott #include <linux/delay.h> 213e54a169SMatthias Schwarzott #include <linux/errno.h> 223e54a169SMatthias Schwarzott #include <linux/init.h> 233e54a169SMatthias Schwarzott #include <linux/kernel.h> 243e54a169SMatthias Schwarzott #include <linux/module.h> 253e54a169SMatthias Schwarzott #include <linux/string.h> 263e54a169SMatthias Schwarzott #include <linux/slab.h> 273e54a169SMatthias Schwarzott #include <linux/firmware.h> 28e3ea5e94SMatthias Schwarzott #include <linux/regmap.h> 293e54a169SMatthias Schwarzott 30fada1935SMauro Carvalho Chehab #include <media/dvb_frontend.h> 31fada1935SMauro Carvalho Chehab #include <media/dvb_math.h> 323e54a169SMatthias Schwarzott #include "si2165_priv.h" 333e54a169SMatthias Schwarzott #include "si2165.h" 343e54a169SMatthias Schwarzott 3518349f40SMatthias Schwarzott /* 3618349f40SMatthias Schwarzott * Hauppauge WinTV-HVR-930C-HD B130 / PCTV QuatroStick 521e 1113xx 3718349f40SMatthias Schwarzott * uses 16 MHz xtal 3818349f40SMatthias Schwarzott * 3918349f40SMatthias Schwarzott * Hauppauge WinTV-HVR-930C-HD B131 / PCTV QuatroStick 522e 1114xx 4018349f40SMatthias Schwarzott * uses 24 MHz clock provided by tuner 4118349f40SMatthias Schwarzott */ 423e54a169SMatthias Schwarzott 433e54a169SMatthias Schwarzott struct si2165_state { 447cd785adSMatthias Schwarzott struct i2c_client *client; 457cd785adSMatthias Schwarzott 46e3ea5e94SMatthias Schwarzott struct regmap *regmap; 473e54a169SMatthias Schwarzott 48d9a201dfSMatthias Schwarzott struct dvb_frontend fe; 493e54a169SMatthias Schwarzott 503e54a169SMatthias Schwarzott struct si2165_config config; 513e54a169SMatthias Schwarzott 5255bea400SMatthias Schwarzott u8 chip_revcode; 533e54a169SMatthias Schwarzott u8 chip_type; 543e54a169SMatthias Schwarzott 553e54a169SMatthias Schwarzott /* calculated by xtal and div settings */ 563e54a169SMatthias Schwarzott u32 fvco_hz; 573e54a169SMatthias Schwarzott u32 sys_clk; 583e54a169SMatthias Schwarzott u32 adc_clk; 593e54a169SMatthias Schwarzott 60e9c7d19aSMatthias Schwarzott /* DVBv3 stats */ 61e9c7d19aSMatthias Schwarzott u64 ber_prev; 62e9c7d19aSMatthias Schwarzott 633e54a169SMatthias Schwarzott bool has_dvbc; 643e54a169SMatthias Schwarzott bool has_dvbt; 653e54a169SMatthias Schwarzott bool firmware_loaded; 663e54a169SMatthias Schwarzott }; 673e54a169SMatthias Schwarzott 683e54a169SMatthias Schwarzott static int si2165_write(struct si2165_state *state, const u16 reg, 693e54a169SMatthias Schwarzott const u8 *src, const int count) 703e54a169SMatthias Schwarzott { 713e54a169SMatthias Schwarzott int ret; 723e54a169SMatthias Schwarzott 737dbbb4bfSMatthias Schwarzott dev_dbg(&state->client->dev, "i2c write: reg: 0x%04x, data: %*ph\n", 747dbbb4bfSMatthias Schwarzott reg, count, src); 753e54a169SMatthias Schwarzott 76e3ea5e94SMatthias Schwarzott ret = regmap_bulk_write(state->regmap, reg, src, count); 773e54a169SMatthias Schwarzott 78e3ea5e94SMatthias Schwarzott if (ret) 79aa155449SMatthias Schwarzott dev_err(&state->client->dev, "%s: ret == %d\n", __func__, ret); 803e54a169SMatthias Schwarzott 81e3ea5e94SMatthias Schwarzott return ret; 823e54a169SMatthias Schwarzott } 833e54a169SMatthias Schwarzott 843e54a169SMatthias Schwarzott static int si2165_read(struct si2165_state *state, 853e54a169SMatthias Schwarzott const u16 reg, u8 *val, const int count) 863e54a169SMatthias Schwarzott { 87e3ea5e94SMatthias Schwarzott int ret = regmap_bulk_read(state->regmap, reg, val, count); 883e54a169SMatthias Schwarzott 89e3ea5e94SMatthias Schwarzott if (ret) { 90aa155449SMatthias Schwarzott dev_err(&state->client->dev, "%s: error (addr %02x reg %04x error (ret == %i)\n", 913e54a169SMatthias Schwarzott __func__, state->config.i2c_addr, reg, ret); 923e54a169SMatthias Schwarzott return ret; 933e54a169SMatthias Schwarzott } 943e54a169SMatthias Schwarzott 957dbbb4bfSMatthias Schwarzott dev_dbg(&state->client->dev, "i2c read: reg: 0x%04x, data: %*ph\n", 967dbbb4bfSMatthias Schwarzott reg, count, val); 973e54a169SMatthias Schwarzott 983e54a169SMatthias Schwarzott return 0; 993e54a169SMatthias Schwarzott } 1003e54a169SMatthias Schwarzott 1013e54a169SMatthias Schwarzott static int si2165_readreg8(struct si2165_state *state, 1023e54a169SMatthias Schwarzott const u16 reg, u8 *val) 1033e54a169SMatthias Schwarzott { 104e3ea5e94SMatthias Schwarzott unsigned int val_tmp; 105e3ea5e94SMatthias Schwarzott int ret = regmap_read(state->regmap, reg, &val_tmp); 106e3ea5e94SMatthias Schwarzott *val = (u8)val_tmp; 1071b54da77SMatthias Schwarzott dev_dbg(&state->client->dev, "reg read: R(0x%04x)=0x%02x\n", reg, *val); 1083e54a169SMatthias Schwarzott return ret; 1093e54a169SMatthias Schwarzott } 1103e54a169SMatthias Schwarzott 1113e54a169SMatthias Schwarzott static int si2165_readreg16(struct si2165_state *state, 1123e54a169SMatthias Schwarzott const u16 reg, u16 *val) 1133e54a169SMatthias Schwarzott { 1143e54a169SMatthias Schwarzott u8 buf[2]; 1153e54a169SMatthias Schwarzott 1163e54a169SMatthias Schwarzott int ret = si2165_read(state, reg, buf, 2); 1173e54a169SMatthias Schwarzott *val = buf[0] | buf[1] << 8; 1181b54da77SMatthias Schwarzott dev_dbg(&state->client->dev, "reg read: R(0x%04x)=0x%04x\n", reg, *val); 1193e54a169SMatthias Schwarzott return ret; 1203e54a169SMatthias Schwarzott } 1213e54a169SMatthias Schwarzott 122c0675d0bSMatthias Schwarzott static int si2165_readreg24(struct si2165_state *state, 123c0675d0bSMatthias Schwarzott const u16 reg, u32 *val) 124c0675d0bSMatthias Schwarzott { 125c0675d0bSMatthias Schwarzott u8 buf[3]; 126c0675d0bSMatthias Schwarzott 127c0675d0bSMatthias Schwarzott int ret = si2165_read(state, reg, buf, 3); 128c0675d0bSMatthias Schwarzott *val = buf[0] | buf[1] << 8 | buf[2] << 16; 129c0675d0bSMatthias Schwarzott dev_dbg(&state->client->dev, "reg read: R(0x%04x)=0x%06x\n", reg, *val); 130c0675d0bSMatthias Schwarzott return ret; 131c0675d0bSMatthias Schwarzott } 132c0675d0bSMatthias Schwarzott 1333e54a169SMatthias Schwarzott static int si2165_writereg8(struct si2165_state *state, const u16 reg, u8 val) 1343e54a169SMatthias Schwarzott { 135e3ea5e94SMatthias Schwarzott return regmap_write(state->regmap, reg, val); 1363e54a169SMatthias Schwarzott } 1373e54a169SMatthias Schwarzott 1383e54a169SMatthias Schwarzott static int si2165_writereg16(struct si2165_state *state, const u16 reg, u16 val) 1393e54a169SMatthias Schwarzott { 1403e54a169SMatthias Schwarzott u8 buf[2] = { val & 0xff, (val >> 8) & 0xff }; 1413e54a169SMatthias Schwarzott 1423e54a169SMatthias Schwarzott return si2165_write(state, reg, buf, 2); 1433e54a169SMatthias Schwarzott } 1443e54a169SMatthias Schwarzott 1453e54a169SMatthias Schwarzott static int si2165_writereg24(struct si2165_state *state, const u16 reg, u32 val) 1463e54a169SMatthias Schwarzott { 1473e54a169SMatthias Schwarzott u8 buf[3] = { val & 0xff, (val >> 8) & 0xff, (val >> 16) & 0xff }; 1483e54a169SMatthias Schwarzott 1493e54a169SMatthias Schwarzott return si2165_write(state, reg, buf, 3); 1503e54a169SMatthias Schwarzott } 1513e54a169SMatthias Schwarzott 1523e54a169SMatthias Schwarzott static int si2165_writereg32(struct si2165_state *state, const u16 reg, u32 val) 1533e54a169SMatthias Schwarzott { 1543e54a169SMatthias Schwarzott u8 buf[4] = { 1553e54a169SMatthias Schwarzott val & 0xff, 1563e54a169SMatthias Schwarzott (val >> 8) & 0xff, 1573e54a169SMatthias Schwarzott (val >> 16) & 0xff, 1583e54a169SMatthias Schwarzott (val >> 24) & 0xff 1593e54a169SMatthias Schwarzott }; 1603e54a169SMatthias Schwarzott return si2165_write(state, reg, buf, 4); 1613e54a169SMatthias Schwarzott } 1623e54a169SMatthias Schwarzott 1633e54a169SMatthias Schwarzott static int si2165_writereg_mask8(struct si2165_state *state, const u16 reg, 1643e54a169SMatthias Schwarzott u8 val, u8 mask) 1653e54a169SMatthias Schwarzott { 1663e54a169SMatthias Schwarzott if (mask != 0xff) { 167c2e5c951SMarkus Elfring u8 tmp; 168c2e5c951SMarkus Elfring int ret = si2165_readreg8(state, reg, &tmp); 169c2e5c951SMarkus Elfring 1703e54a169SMatthias Schwarzott if (ret < 0) 171c2e5c951SMarkus Elfring return ret; 1723e54a169SMatthias Schwarzott 1733e54a169SMatthias Schwarzott val &= mask; 1743e54a169SMatthias Schwarzott tmp &= ~mask; 1753e54a169SMatthias Schwarzott val |= tmp; 1763e54a169SMatthias Schwarzott } 177c2e5c951SMarkus Elfring return si2165_writereg8(state, reg, val); 1783e54a169SMatthias Schwarzott } 1793e54a169SMatthias Schwarzott 1807dbbb4bfSMatthias Schwarzott #define REG16(reg, val) \ 1817dbbb4bfSMatthias Schwarzott { (reg), (val) & 0xff }, \ 1827dbbb4bfSMatthias Schwarzott { (reg) + 1, (val) >> 8 & 0xff } 183a5293dbdSMatthias Schwarzott struct si2165_reg_value_pair { 184a5293dbdSMatthias Schwarzott u16 reg; 185a5293dbdSMatthias Schwarzott u8 val; 186a5293dbdSMatthias Schwarzott }; 187a5293dbdSMatthias Schwarzott 188a5293dbdSMatthias Schwarzott static int si2165_write_reg_list(struct si2165_state *state, 189a5293dbdSMatthias Schwarzott const struct si2165_reg_value_pair *regs, 190a5293dbdSMatthias Schwarzott int count) 191a5293dbdSMatthias Schwarzott { 192a5293dbdSMatthias Schwarzott int i; 193a5293dbdSMatthias Schwarzott int ret; 194a5293dbdSMatthias Schwarzott 195a5293dbdSMatthias Schwarzott for (i = 0; i < count; i++) { 196a5293dbdSMatthias Schwarzott ret = si2165_writereg8(state, regs[i].reg, regs[i].val); 197a5293dbdSMatthias Schwarzott if (ret < 0) 198a5293dbdSMatthias Schwarzott return ret; 199a5293dbdSMatthias Schwarzott } 200a5293dbdSMatthias Schwarzott return 0; 201a5293dbdSMatthias Schwarzott } 202a5293dbdSMatthias Schwarzott 2033e54a169SMatthias Schwarzott static int si2165_get_tune_settings(struct dvb_frontend *fe, 2043e54a169SMatthias Schwarzott struct dvb_frontend_tune_settings *s) 2053e54a169SMatthias Schwarzott { 2063e54a169SMatthias Schwarzott s->min_delay_ms = 1000; 2073e54a169SMatthias Schwarzott return 0; 2083e54a169SMatthias Schwarzott } 2093e54a169SMatthias Schwarzott 2103e54a169SMatthias Schwarzott static int si2165_init_pll(struct si2165_state *state) 2113e54a169SMatthias Schwarzott { 2127dbbb4bfSMatthias Schwarzott u32 ref_freq_hz = state->config.ref_freq_hz; 2133e54a169SMatthias Schwarzott u8 divr = 1; /* 1..7 */ 2143e54a169SMatthias Schwarzott u8 divp = 1; /* only 1 or 4 */ 2153e54a169SMatthias Schwarzott u8 divn = 56; /* 1..63 */ 2163e54a169SMatthias Schwarzott u8 divm = 8; 2173e54a169SMatthias Schwarzott u8 divl = 12; 2183e54a169SMatthias Schwarzott u8 buf[4]; 2193e54a169SMatthias Schwarzott 22018349f40SMatthias Schwarzott /* 22118349f40SMatthias Schwarzott * hardcoded values can be deleted if calculation is verified 22218349f40SMatthias Schwarzott * or it yields the same values as the windows driver 22318349f40SMatthias Schwarzott */ 2247dbbb4bfSMatthias Schwarzott switch (ref_freq_hz) { 2253e54a169SMatthias Schwarzott case 16000000u: 2263e54a169SMatthias Schwarzott divn = 56; 2273e54a169SMatthias Schwarzott break; 2283e54a169SMatthias Schwarzott case 24000000u: 2293e54a169SMatthias Schwarzott divr = 2; 2303e54a169SMatthias Schwarzott divp = 4; 2313e54a169SMatthias Schwarzott divn = 19; 2323e54a169SMatthias Schwarzott break; 2333e54a169SMatthias Schwarzott default: 2343e54a169SMatthias Schwarzott /* ref_freq / divr must be between 4 and 16 MHz */ 2357dbbb4bfSMatthias Schwarzott if (ref_freq_hz > 16000000u) 2363e54a169SMatthias Schwarzott divr = 2; 2373e54a169SMatthias Schwarzott 23818349f40SMatthias Schwarzott /* 23918349f40SMatthias Schwarzott * now select divn and divp such that 24018349f40SMatthias Schwarzott * fvco is in 1624..1824 MHz 24118349f40SMatthias Schwarzott */ 2427dbbb4bfSMatthias Schwarzott if (1624000000u * divr > ref_freq_hz * 2u * 63u) 2433e54a169SMatthias Schwarzott divp = 4; 2443e54a169SMatthias Schwarzott 2453e54a169SMatthias Schwarzott /* is this already correct regarding rounding? */ 2467dbbb4bfSMatthias Schwarzott divn = 1624000000u * divr / (ref_freq_hz * 2u * divp); 2473e54a169SMatthias Schwarzott break; 2483e54a169SMatthias Schwarzott } 2493e54a169SMatthias Schwarzott 2503e54a169SMatthias Schwarzott /* adc_clk and sys_clk depend on xtal and pll settings */ 2517dbbb4bfSMatthias Schwarzott state->fvco_hz = ref_freq_hz / divr 2523e54a169SMatthias Schwarzott * 2u * divn * divp; 2533e54a169SMatthias Schwarzott state->adc_clk = state->fvco_hz / (divm * 4u); 2543e54a169SMatthias Schwarzott state->sys_clk = state->fvco_hz / (divl * 2u); 2553e54a169SMatthias Schwarzott 256814f86c9SMatthias Schwarzott /* write all 4 pll registers 0x00a0..0x00a3 at once */ 2573e54a169SMatthias Schwarzott buf[0] = divl; 2583e54a169SMatthias Schwarzott buf[1] = divm; 2593e54a169SMatthias Schwarzott buf[2] = (divn & 0x3f) | ((divp == 1) ? 0x40 : 0x00) | 0x80; 2603e54a169SMatthias Schwarzott buf[3] = divr; 261814f86c9SMatthias Schwarzott return si2165_write(state, REG_PLL_DIVL, buf, 4); 2623e54a169SMatthias Schwarzott } 2633e54a169SMatthias Schwarzott 2643e54a169SMatthias Schwarzott static int si2165_adjust_pll_divl(struct si2165_state *state, u8 divl) 2653e54a169SMatthias Schwarzott { 2663e54a169SMatthias Schwarzott state->sys_clk = state->fvco_hz / (divl * 2u); 267814f86c9SMatthias Schwarzott return si2165_writereg8(state, REG_PLL_DIVL, divl); 2683e54a169SMatthias Schwarzott } 2693e54a169SMatthias Schwarzott 2703e54a169SMatthias Schwarzott static u32 si2165_get_fe_clk(struct si2165_state *state) 2713e54a169SMatthias Schwarzott { 2723e54a169SMatthias Schwarzott /* assume Oversampling mode Ovr4 is used */ 2733e54a169SMatthias Schwarzott return state->adc_clk; 2743e54a169SMatthias Schwarzott } 2753e54a169SMatthias Schwarzott 276e73c7bfeSHans Verkuil static int si2165_wait_init_done(struct si2165_state *state) 2773e54a169SMatthias Schwarzott { 2783e54a169SMatthias Schwarzott int ret = -EINVAL; 2793e54a169SMatthias Schwarzott u8 val = 0; 2803e54a169SMatthias Schwarzott int i; 2813e54a169SMatthias Schwarzott 2823e54a169SMatthias Schwarzott for (i = 0; i < 3; ++i) { 283814f86c9SMatthias Schwarzott si2165_readreg8(state, REG_INIT_DONE, &val); 2843e54a169SMatthias Schwarzott if (val == 0x01) 2853e54a169SMatthias Schwarzott return 0; 2863e54a169SMatthias Schwarzott usleep_range(1000, 50000); 2873e54a169SMatthias Schwarzott } 28877f887cdSMatthias Schwarzott dev_err(&state->client->dev, "init_done was not set\n"); 2893e54a169SMatthias Schwarzott return ret; 2903e54a169SMatthias Schwarzott } 2913e54a169SMatthias Schwarzott 2923e54a169SMatthias Schwarzott static int si2165_upload_firmware_block(struct si2165_state *state, 2937dbbb4bfSMatthias Schwarzott const u8 *data, u32 len, u32 *poffset, 2947dbbb4bfSMatthias Schwarzott u32 block_count) 2953e54a169SMatthias Schwarzott { 2963e54a169SMatthias Schwarzott int ret; 2973e54a169SMatthias Schwarzott u8 buf_ctrl[4] = { 0x00, 0x00, 0x00, 0xc0 }; 2983e54a169SMatthias Schwarzott u8 wordcount; 2993e54a169SMatthias Schwarzott u32 cur_block = 0; 3003e54a169SMatthias Schwarzott u32 offset = poffset ? *poffset : 0; 3013e54a169SMatthias Schwarzott 3023e54a169SMatthias Schwarzott if (len < 4) 3033e54a169SMatthias Schwarzott return -EINVAL; 3043e54a169SMatthias Schwarzott if (len % 4 != 0) 3053e54a169SMatthias Schwarzott return -EINVAL; 3063e54a169SMatthias Schwarzott 3071b54da77SMatthias Schwarzott dev_dbg(&state->client->dev, 3087dbbb4bfSMatthias Schwarzott "fw load: %s: called with len=0x%x offset=0x%x blockcount=0x%x\n", 3097dbbb4bfSMatthias Schwarzott __func__, len, offset, block_count); 3103e54a169SMatthias Schwarzott while (offset + 12 <= len && cur_block < block_count) { 3111b54da77SMatthias Schwarzott dev_dbg(&state->client->dev, 3127dbbb4bfSMatthias Schwarzott "fw load: %s: in while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n", 3137dbbb4bfSMatthias Schwarzott __func__, len, offset, cur_block, block_count); 3143e54a169SMatthias Schwarzott wordcount = data[offset]; 3153e54a169SMatthias Schwarzott if (wordcount < 1 || data[offset + 1] || 3163e54a169SMatthias Schwarzott data[offset + 2] || data[offset + 3]) { 317aa155449SMatthias Schwarzott dev_warn(&state->client->dev, 31877f887cdSMatthias Schwarzott "bad fw data[0..3] = %*ph\n", 31977f887cdSMatthias Schwarzott 4, data); 3203e54a169SMatthias Schwarzott return -EINVAL; 3213e54a169SMatthias Schwarzott } 3223e54a169SMatthias Schwarzott 3233e54a169SMatthias Schwarzott if (offset + 8 + wordcount * 4 > len) { 324aa155449SMatthias Schwarzott dev_warn(&state->client->dev, 32577f887cdSMatthias Schwarzott "len is too small for block len=%d, wordcount=%d\n", 32677f887cdSMatthias Schwarzott len, wordcount); 3273e54a169SMatthias Schwarzott return -EINVAL; 3283e54a169SMatthias Schwarzott } 3293e54a169SMatthias Schwarzott 3303e54a169SMatthias Schwarzott buf_ctrl[0] = wordcount - 1; 3313e54a169SMatthias Schwarzott 332814f86c9SMatthias Schwarzott ret = si2165_write(state, REG_DCOM_CONTROL_BYTE, buf_ctrl, 4); 3333e54a169SMatthias Schwarzott if (ret < 0) 3343e54a169SMatthias Schwarzott goto error; 335814f86c9SMatthias Schwarzott ret = si2165_write(state, REG_DCOM_ADDR, data + offset + 4, 4); 3363e54a169SMatthias Schwarzott if (ret < 0) 3373e54a169SMatthias Schwarzott goto error; 3383e54a169SMatthias Schwarzott 3393e54a169SMatthias Schwarzott offset += 8; 3403e54a169SMatthias Schwarzott 3413e54a169SMatthias Schwarzott while (wordcount > 0) { 342814f86c9SMatthias Schwarzott ret = si2165_write(state, REG_DCOM_DATA, 343814f86c9SMatthias Schwarzott data + offset, 4); 3443e54a169SMatthias Schwarzott if (ret < 0) 3453e54a169SMatthias Schwarzott goto error; 3463e54a169SMatthias Schwarzott wordcount--; 3473e54a169SMatthias Schwarzott offset += 4; 3483e54a169SMatthias Schwarzott } 3493e54a169SMatthias Schwarzott cur_block++; 3503e54a169SMatthias Schwarzott } 3513e54a169SMatthias Schwarzott 3521b54da77SMatthias Schwarzott dev_dbg(&state->client->dev, 3537dbbb4bfSMatthias Schwarzott "fw load: %s: after while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n", 3547dbbb4bfSMatthias Schwarzott __func__, len, offset, cur_block, block_count); 3553e54a169SMatthias Schwarzott 3563e54a169SMatthias Schwarzott if (poffset) 3573e54a169SMatthias Schwarzott *poffset = offset; 3583e54a169SMatthias Schwarzott 3591b54da77SMatthias Schwarzott dev_dbg(&state->client->dev, 3607dbbb4bfSMatthias Schwarzott "fw load: %s: returned offset=0x%x\n", 3617dbbb4bfSMatthias Schwarzott __func__, offset); 3623e54a169SMatthias Schwarzott 3633e54a169SMatthias Schwarzott return 0; 3643e54a169SMatthias Schwarzott error: 3653e54a169SMatthias Schwarzott return ret; 3663e54a169SMatthias Schwarzott } 3673e54a169SMatthias Schwarzott 3683e54a169SMatthias Schwarzott static int si2165_upload_firmware(struct si2165_state *state) 3693e54a169SMatthias Schwarzott { 3703e54a169SMatthias Schwarzott /* int ret; */ 3713e54a169SMatthias Schwarzott u8 val[3]; 3723e54a169SMatthias Schwarzott u16 val16; 3733e54a169SMatthias Schwarzott int ret; 3743e54a169SMatthias Schwarzott 3753e54a169SMatthias Schwarzott const struct firmware *fw = NULL; 37655bea400SMatthias Schwarzott u8 *fw_file; 3773e54a169SMatthias Schwarzott const u8 *data; 3783e54a169SMatthias Schwarzott u32 len; 3793e54a169SMatthias Schwarzott u32 offset; 3803e54a169SMatthias Schwarzott u8 patch_version; 3813e54a169SMatthias Schwarzott u8 block_count; 3823e54a169SMatthias Schwarzott u16 crc_expected; 3833e54a169SMatthias Schwarzott 38455bea400SMatthias Schwarzott switch (state->chip_revcode) { 38555bea400SMatthias Schwarzott case 0x03: /* revision D */ 38655bea400SMatthias Schwarzott fw_file = SI2165_FIRMWARE_REV_D; 38755bea400SMatthias Schwarzott break; 38855bea400SMatthias Schwarzott default: 38977f887cdSMatthias Schwarzott dev_info(&state->client->dev, "no firmware file for revision=%d\n", 39077f887cdSMatthias Schwarzott state->chip_revcode); 39155bea400SMatthias Schwarzott return 0; 39255bea400SMatthias Schwarzott } 39355bea400SMatthias Schwarzott 3943e54a169SMatthias Schwarzott /* request the firmware, this will block and timeout */ 395aa155449SMatthias Schwarzott ret = request_firmware(&fw, fw_file, &state->client->dev); 3963e54a169SMatthias Schwarzott if (ret) { 39777f887cdSMatthias Schwarzott dev_warn(&state->client->dev, "firmware file '%s' not found\n", 39877f887cdSMatthias Schwarzott fw_file); 3993e54a169SMatthias Schwarzott goto error; 4003e54a169SMatthias Schwarzott } 4013e54a169SMatthias Schwarzott 4023e54a169SMatthias Schwarzott data = fw->data; 4033e54a169SMatthias Schwarzott len = fw->size; 4043e54a169SMatthias Schwarzott 40577f887cdSMatthias Schwarzott dev_info(&state->client->dev, "downloading firmware from file '%s' size=%d\n", 40677f887cdSMatthias Schwarzott fw_file, len); 4073e54a169SMatthias Schwarzott 4083e54a169SMatthias Schwarzott if (len % 4 != 0) { 40977f887cdSMatthias Schwarzott dev_warn(&state->client->dev, "firmware size is not multiple of 4\n"); 4103e54a169SMatthias Schwarzott ret = -EINVAL; 4113e54a169SMatthias Schwarzott goto error; 4123e54a169SMatthias Schwarzott } 4133e54a169SMatthias Schwarzott 4143e54a169SMatthias Schwarzott /* check header (8 bytes) */ 4153e54a169SMatthias Schwarzott if (len < 8) { 41677f887cdSMatthias Schwarzott dev_warn(&state->client->dev, "firmware header is missing\n"); 4173e54a169SMatthias Schwarzott ret = -EINVAL; 4183e54a169SMatthias Schwarzott goto error; 4193e54a169SMatthias Schwarzott } 4203e54a169SMatthias Schwarzott 4213e54a169SMatthias Schwarzott if (data[0] != 1 || data[1] != 0) { 42277f887cdSMatthias Schwarzott dev_warn(&state->client->dev, "firmware file version is wrong\n"); 4233e54a169SMatthias Schwarzott ret = -EINVAL; 4243e54a169SMatthias Schwarzott goto error; 4253e54a169SMatthias Schwarzott } 4263e54a169SMatthias Schwarzott 4273e54a169SMatthias Schwarzott patch_version = data[2]; 4283e54a169SMatthias Schwarzott block_count = data[4]; 4293e54a169SMatthias Schwarzott crc_expected = data[7] << 8 | data[6]; 4303e54a169SMatthias Schwarzott 4313e54a169SMatthias Schwarzott /* start uploading fw */ 4323e54a169SMatthias Schwarzott /* boot/wdog status */ 433814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_WDOG_AND_BOOT, 0x00); 4343e54a169SMatthias Schwarzott if (ret < 0) 4353e54a169SMatthias Schwarzott goto error; 4363e54a169SMatthias Schwarzott /* reset */ 437814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_RST_ALL, 0x00); 4383e54a169SMatthias Schwarzott if (ret < 0) 4393e54a169SMatthias Schwarzott goto error; 4403e54a169SMatthias Schwarzott /* boot/wdog status */ 441814f86c9SMatthias Schwarzott ret = si2165_readreg8(state, REG_WDOG_AND_BOOT, val); 4423e54a169SMatthias Schwarzott if (ret < 0) 4433e54a169SMatthias Schwarzott goto error; 4443e54a169SMatthias Schwarzott 4453e54a169SMatthias Schwarzott /* enable reset on error */ 446814f86c9SMatthias Schwarzott ret = si2165_readreg8(state, REG_EN_RST_ERROR, val); 4473e54a169SMatthias Schwarzott if (ret < 0) 4483e54a169SMatthias Schwarzott goto error; 449814f86c9SMatthias Schwarzott ret = si2165_readreg8(state, REG_EN_RST_ERROR, val); 4503e54a169SMatthias Schwarzott if (ret < 0) 4513e54a169SMatthias Schwarzott goto error; 452814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_EN_RST_ERROR, 0x02); 4533e54a169SMatthias Schwarzott if (ret < 0) 4543e54a169SMatthias Schwarzott goto error; 4553e54a169SMatthias Schwarzott 4563e54a169SMatthias Schwarzott /* start right after the header */ 4573e54a169SMatthias Schwarzott offset = 8; 4583e54a169SMatthias Schwarzott 4597dbbb4bfSMatthias Schwarzott dev_info(&state->client->dev, "%s: extracted patch_version=0x%02x, block_count=0x%02x, crc_expected=0x%04x\n", 4607dbbb4bfSMatthias Schwarzott __func__, patch_version, block_count, crc_expected); 4613e54a169SMatthias Schwarzott 4623e54a169SMatthias Schwarzott ret = si2165_upload_firmware_block(state, data, len, &offset, 1); 4633e54a169SMatthias Schwarzott if (ret < 0) 4643e54a169SMatthias Schwarzott goto error; 4653e54a169SMatthias Schwarzott 466814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_PATCH_VERSION, patch_version); 4673e54a169SMatthias Schwarzott if (ret < 0) 4683e54a169SMatthias Schwarzott goto error; 4693e54a169SMatthias Schwarzott 4703e54a169SMatthias Schwarzott /* reset crc */ 471814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_RST_CRC, 0x01); 4723e54a169SMatthias Schwarzott if (ret) 473ec73b9fdSChristian Engelmayer goto error; 4743e54a169SMatthias Schwarzott 4753e54a169SMatthias Schwarzott ret = si2165_upload_firmware_block(state, data, len, 4763e54a169SMatthias Schwarzott &offset, block_count); 4773e54a169SMatthias Schwarzott if (ret < 0) { 478aa155449SMatthias Schwarzott dev_err(&state->client->dev, 47977f887cdSMatthias Schwarzott "firmware could not be uploaded\n"); 4803e54a169SMatthias Schwarzott goto error; 4813e54a169SMatthias Schwarzott } 4823e54a169SMatthias Schwarzott 4833e54a169SMatthias Schwarzott /* read crc */ 484814f86c9SMatthias Schwarzott ret = si2165_readreg16(state, REG_CRC, &val16); 4853e54a169SMatthias Schwarzott if (ret) 4863e54a169SMatthias Schwarzott goto error; 4873e54a169SMatthias Schwarzott 4883e54a169SMatthias Schwarzott if (val16 != crc_expected) { 489aa155449SMatthias Schwarzott dev_err(&state->client->dev, 49077f887cdSMatthias Schwarzott "firmware crc mismatch %04x != %04x\n", 49177f887cdSMatthias Schwarzott val16, crc_expected); 4923e54a169SMatthias Schwarzott ret = -EINVAL; 4933e54a169SMatthias Schwarzott goto error; 4943e54a169SMatthias Schwarzott } 4953e54a169SMatthias Schwarzott 4963e54a169SMatthias Schwarzott ret = si2165_upload_firmware_block(state, data, len, &offset, 5); 4973e54a169SMatthias Schwarzott if (ret) 4983e54a169SMatthias Schwarzott goto error; 4993e54a169SMatthias Schwarzott 5003e54a169SMatthias Schwarzott if (len != offset) { 501aa155449SMatthias Schwarzott dev_err(&state->client->dev, 50277f887cdSMatthias Schwarzott "firmware len mismatch %04x != %04x\n", 50377f887cdSMatthias Schwarzott len, offset); 5043e54a169SMatthias Schwarzott ret = -EINVAL; 5053e54a169SMatthias Schwarzott goto error; 5063e54a169SMatthias Schwarzott } 5073e54a169SMatthias Schwarzott 5083e54a169SMatthias Schwarzott /* reset watchdog error register */ 509814f86c9SMatthias Schwarzott ret = si2165_writereg_mask8(state, REG_WDOG_AND_BOOT, 0x02, 0x02); 5103e54a169SMatthias Schwarzott if (ret < 0) 5113e54a169SMatthias Schwarzott goto error; 5123e54a169SMatthias Schwarzott 5133e54a169SMatthias Schwarzott /* enable reset on error */ 514814f86c9SMatthias Schwarzott ret = si2165_writereg_mask8(state, REG_EN_RST_ERROR, 0x01, 0x01); 5153e54a169SMatthias Schwarzott if (ret < 0) 5163e54a169SMatthias Schwarzott goto error; 5173e54a169SMatthias Schwarzott 51877f887cdSMatthias Schwarzott dev_info(&state->client->dev, "fw load finished\n"); 5193e54a169SMatthias Schwarzott 5203e54a169SMatthias Schwarzott ret = 0; 5213e54a169SMatthias Schwarzott state->firmware_loaded = true; 5223e54a169SMatthias Schwarzott error: 5233e54a169SMatthias Schwarzott if (fw) { 5243e54a169SMatthias Schwarzott release_firmware(fw); 5253e54a169SMatthias Schwarzott fw = NULL; 5263e54a169SMatthias Schwarzott } 5273e54a169SMatthias Schwarzott 5283e54a169SMatthias Schwarzott return ret; 5293e54a169SMatthias Schwarzott } 5303e54a169SMatthias Schwarzott 5313e54a169SMatthias Schwarzott static int si2165_init(struct dvb_frontend *fe) 5323e54a169SMatthias Schwarzott { 5333e54a169SMatthias Schwarzott int ret = 0; 5343e54a169SMatthias Schwarzott struct si2165_state *state = fe->demodulator_priv; 535c0675d0bSMatthias Schwarzott struct dtv_frontend_properties *c = &fe->dtv_property_cache; 5363e54a169SMatthias Schwarzott u8 val; 5373e54a169SMatthias Schwarzott u8 patch_version = 0x00; 5383e54a169SMatthias Schwarzott 5391b54da77SMatthias Schwarzott dev_dbg(&state->client->dev, "%s: called\n", __func__); 5403e54a169SMatthias Schwarzott 5413e54a169SMatthias Schwarzott /* powerup */ 542814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_CHIP_MODE, state->config.chip_mode); 5433e54a169SMatthias Schwarzott if (ret < 0) 5443e54a169SMatthias Schwarzott goto error; 5453e54a169SMatthias Schwarzott /* dsp_clock_enable */ 546814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_DSP_CLOCK, 0x01); 5473e54a169SMatthias Schwarzott if (ret < 0) 5483e54a169SMatthias Schwarzott goto error; 549814f86c9SMatthias Schwarzott /* verify chip_mode */ 550814f86c9SMatthias Schwarzott ret = si2165_readreg8(state, REG_CHIP_MODE, &val); 5513e54a169SMatthias Schwarzott if (ret < 0) 5523e54a169SMatthias Schwarzott goto error; 5533e54a169SMatthias Schwarzott if (val != state->config.chip_mode) { 55477f887cdSMatthias Schwarzott dev_err(&state->client->dev, "could not set chip_mode\n"); 5553e54a169SMatthias Schwarzott return -EINVAL; 5563e54a169SMatthias Schwarzott } 5573e54a169SMatthias Schwarzott 5583e54a169SMatthias Schwarzott /* agc */ 559814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_AGC_IF_TRI, 0x00); 5603e54a169SMatthias Schwarzott if (ret < 0) 5613e54a169SMatthias Schwarzott goto error; 562814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_AGC_IF_SLR, 0x01); 5633e54a169SMatthias Schwarzott if (ret < 0) 5643e54a169SMatthias Schwarzott goto error; 565814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_AGC2_OUTPUT, 0x00); 5663e54a169SMatthias Schwarzott if (ret < 0) 5673e54a169SMatthias Schwarzott goto error; 568814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_AGC2_CLKDIV, 0x07); 5693e54a169SMatthias Schwarzott if (ret < 0) 5703e54a169SMatthias Schwarzott goto error; 5713e54a169SMatthias Schwarzott /* rssi pad */ 572814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_RSSI_PAD_CTRL, 0x00); 5733e54a169SMatthias Schwarzott if (ret < 0) 5743e54a169SMatthias Schwarzott goto error; 575814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_RSSI_ENABLE, 0x00); 5763e54a169SMatthias Schwarzott if (ret < 0) 5773e54a169SMatthias Schwarzott goto error; 5783e54a169SMatthias Schwarzott 5793e54a169SMatthias Schwarzott ret = si2165_init_pll(state); 5803e54a169SMatthias Schwarzott if (ret < 0) 5813e54a169SMatthias Schwarzott goto error; 5823e54a169SMatthias Schwarzott 5833e54a169SMatthias Schwarzott /* enable chip_init */ 584814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_CHIP_INIT, 0x01); 5853e54a169SMatthias Schwarzott if (ret < 0) 5863e54a169SMatthias Schwarzott goto error; 5873e54a169SMatthias Schwarzott /* set start_init */ 588814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_START_INIT, 0x01); 5893e54a169SMatthias Schwarzott if (ret < 0) 5903e54a169SMatthias Schwarzott goto error; 5913e54a169SMatthias Schwarzott ret = si2165_wait_init_done(state); 5923e54a169SMatthias Schwarzott if (ret < 0) 5933e54a169SMatthias Schwarzott goto error; 5943e54a169SMatthias Schwarzott 5953e54a169SMatthias Schwarzott /* disable chip_init */ 596814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_CHIP_INIT, 0x00); 5973e54a169SMatthias Schwarzott if (ret < 0) 5983e54a169SMatthias Schwarzott goto error; 5993e54a169SMatthias Schwarzott 600964b3727SMatthias Schwarzott /* ber_pkt - default 65535 */ 601964b3727SMatthias Schwarzott ret = si2165_writereg16(state, REG_BER_PKT, 602964b3727SMatthias Schwarzott STATISTICS_PERIOD_PKT_COUNT); 6033e54a169SMatthias Schwarzott if (ret < 0) 6043e54a169SMatthias Schwarzott goto error; 6053e54a169SMatthias Schwarzott 606814f86c9SMatthias Schwarzott ret = si2165_readreg8(state, REG_PATCH_VERSION, &patch_version); 6073e54a169SMatthias Schwarzott if (ret < 0) 6083e54a169SMatthias Schwarzott goto error; 6093e54a169SMatthias Schwarzott 610814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_AUTO_RESET, 0x00); 6113e54a169SMatthias Schwarzott if (ret < 0) 6123e54a169SMatthias Schwarzott goto error; 6133e54a169SMatthias Schwarzott 6143e54a169SMatthias Schwarzott /* dsp_addr_jump */ 615814f86c9SMatthias Schwarzott ret = si2165_writereg32(state, REG_ADDR_JUMP, 0xf4000000); 6163e54a169SMatthias Schwarzott if (ret < 0) 6173e54a169SMatthias Schwarzott goto error; 6183e54a169SMatthias Schwarzott /* boot/wdog status */ 619814f86c9SMatthias Schwarzott ret = si2165_readreg8(state, REG_WDOG_AND_BOOT, &val); 6203e54a169SMatthias Schwarzott if (ret < 0) 6213e54a169SMatthias Schwarzott goto error; 6223e54a169SMatthias Schwarzott 6233e54a169SMatthias Schwarzott if (patch_version == 0x00) { 6243e54a169SMatthias Schwarzott ret = si2165_upload_firmware(state); 6253e54a169SMatthias Schwarzott if (ret < 0) 6263e54a169SMatthias Schwarzott goto error; 6273e54a169SMatthias Schwarzott } 6283e54a169SMatthias Schwarzott 62975d62fc0SMatthias Schwarzott /* ts output config */ 630814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_TS_DATA_MODE, 0x20); 63175d62fc0SMatthias Schwarzott if (ret < 0) 63275d62fc0SMatthias Schwarzott return ret; 633814f86c9SMatthias Schwarzott ret = si2165_writereg16(state, REG_TS_TRI, 0x00fe); 63475d62fc0SMatthias Schwarzott if (ret < 0) 63575d62fc0SMatthias Schwarzott return ret; 636814f86c9SMatthias Schwarzott ret = si2165_writereg24(state, REG_TS_SLR, 0x555555); 63775d62fc0SMatthias Schwarzott if (ret < 0) 63875d62fc0SMatthias Schwarzott return ret; 639814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_TS_CLK_MODE, 0x01); 64075d62fc0SMatthias Schwarzott if (ret < 0) 64175d62fc0SMatthias Schwarzott return ret; 642ec278f87SMatthias Schwarzott ret = si2165_writereg8(state, REG_TS_PARALLEL_MODE, 0x00); 643ec278f87SMatthias Schwarzott if (ret < 0) 644ec278f87SMatthias Schwarzott return ret; 64575d62fc0SMatthias Schwarzott 646c0675d0bSMatthias Schwarzott c = &state->fe.dtv_property_cache; 647c0675d0bSMatthias Schwarzott c->cnr.len = 1; 648c0675d0bSMatthias Schwarzott c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 649964b3727SMatthias Schwarzott c->post_bit_error.len = 1; 650964b3727SMatthias Schwarzott c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 651964b3727SMatthias Schwarzott c->post_bit_count.len = 1; 652964b3727SMatthias Schwarzott c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 653c0675d0bSMatthias Schwarzott 6543e54a169SMatthias Schwarzott return 0; 6553e54a169SMatthias Schwarzott error: 6563e54a169SMatthias Schwarzott return ret; 6573e54a169SMatthias Schwarzott } 6583e54a169SMatthias Schwarzott 6593e54a169SMatthias Schwarzott static int si2165_sleep(struct dvb_frontend *fe) 6603e54a169SMatthias Schwarzott { 6613e54a169SMatthias Schwarzott int ret; 6623e54a169SMatthias Schwarzott struct si2165_state *state = fe->demodulator_priv; 6633e54a169SMatthias Schwarzott 6643e54a169SMatthias Schwarzott /* dsp clock disable */ 665814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_DSP_CLOCK, 0x00); 6663e54a169SMatthias Schwarzott if (ret < 0) 6673e54a169SMatthias Schwarzott return ret; 6683e54a169SMatthias Schwarzott /* chip mode */ 669814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_CHIP_MODE, SI2165_MODE_OFF); 6703e54a169SMatthias Schwarzott if (ret < 0) 6713e54a169SMatthias Schwarzott return ret; 6723e54a169SMatthias Schwarzott return 0; 6733e54a169SMatthias Schwarzott } 6743e54a169SMatthias Schwarzott 6750df289a2SMauro Carvalho Chehab static int si2165_read_status(struct dvb_frontend *fe, enum fe_status *status) 6763e54a169SMatthias Schwarzott { 6773e54a169SMatthias Schwarzott int ret; 6781e5fde1bSMatthias Schwarzott u8 u8tmp; 679c0675d0bSMatthias Schwarzott u32 u32tmp; 6803e54a169SMatthias Schwarzott struct si2165_state *state = fe->demodulator_priv; 681c0675d0bSMatthias Schwarzott struct dtv_frontend_properties *c = &fe->dtv_property_cache; 682c0675d0bSMatthias Schwarzott u32 delsys = c->delivery_system; 6833e54a169SMatthias Schwarzott 6841e5fde1bSMatthias Schwarzott *status = 0; 6853e54a169SMatthias Schwarzott 6861e5fde1bSMatthias Schwarzott switch (delsys) { 6871e5fde1bSMatthias Schwarzott case SYS_DVBT: 6881e5fde1bSMatthias Schwarzott /* check fast signal type */ 6891e5fde1bSMatthias Schwarzott ret = si2165_readreg8(state, REG_CHECK_SIGNAL, &u8tmp); 6903e54a169SMatthias Schwarzott if (ret < 0) 6913e54a169SMatthias Schwarzott return ret; 6921e5fde1bSMatthias Schwarzott switch (u8tmp & 0x3) { 6931e5fde1bSMatthias Schwarzott case 0: /* searching */ 6941e5fde1bSMatthias Schwarzott case 1: /* nothing */ 6951e5fde1bSMatthias Schwarzott break; 6961e5fde1bSMatthias Schwarzott case 2: /* digital signal */ 6971e5fde1bSMatthias Schwarzott *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER; 6981e5fde1bSMatthias Schwarzott break; 6991e5fde1bSMatthias Schwarzott } 7001e5fde1bSMatthias Schwarzott break; 7011e5fde1bSMatthias Schwarzott case SYS_DVBC_ANNEX_A: 7021e5fde1bSMatthias Schwarzott /* check packet sync lock */ 7031e5fde1bSMatthias Schwarzott ret = si2165_readreg8(state, REG_PS_LOCK, &u8tmp); 7041e5fde1bSMatthias Schwarzott if (ret < 0) 7051e5fde1bSMatthias Schwarzott return ret; 7061e5fde1bSMatthias Schwarzott if (u8tmp & 0x01) { 7071e5fde1bSMatthias Schwarzott *status |= FE_HAS_SIGNAL; 7081e5fde1bSMatthias Schwarzott *status |= FE_HAS_CARRIER; 7091e5fde1bSMatthias Schwarzott *status |= FE_HAS_VITERBI; 7101e5fde1bSMatthias Schwarzott *status |= FE_HAS_SYNC; 7111e5fde1bSMatthias Schwarzott } 7121e5fde1bSMatthias Schwarzott break; 7131e5fde1bSMatthias Schwarzott } 7141e5fde1bSMatthias Schwarzott 7151e5fde1bSMatthias Schwarzott /* check fec_lock */ 7161e5fde1bSMatthias Schwarzott ret = si2165_readreg8(state, REG_FEC_LOCK, &u8tmp); 7171e5fde1bSMatthias Schwarzott if (ret < 0) 7181e5fde1bSMatthias Schwarzott return ret; 7191e5fde1bSMatthias Schwarzott if (u8tmp & 0x01) { 7203e54a169SMatthias Schwarzott *status |= FE_HAS_SIGNAL; 7213e54a169SMatthias Schwarzott *status |= FE_HAS_CARRIER; 7223e54a169SMatthias Schwarzott *status |= FE_HAS_VITERBI; 7233e54a169SMatthias Schwarzott *status |= FE_HAS_SYNC; 7243e54a169SMatthias Schwarzott *status |= FE_HAS_LOCK; 7253e54a169SMatthias Schwarzott } 7263e54a169SMatthias Schwarzott 727c0675d0bSMatthias Schwarzott /* CNR */ 728c0675d0bSMatthias Schwarzott if (delsys == SYS_DVBC_ANNEX_A && *status & FE_HAS_VITERBI) { 729c0675d0bSMatthias Schwarzott ret = si2165_readreg24(state, REG_C_N, &u32tmp); 730c0675d0bSMatthias Schwarzott if (ret < 0) 731c0675d0bSMatthias Schwarzott return ret; 732c0675d0bSMatthias Schwarzott /* 733c0675d0bSMatthias Schwarzott * svalue = 734c0675d0bSMatthias Schwarzott * 1000 * c_n/dB = 735c0675d0bSMatthias Schwarzott * 1000 * 10 * log10(2^24 / regval) = 736c0675d0bSMatthias Schwarzott * 1000 * 10 * (log10(2^24) - log10(regval)) = 737c0675d0bSMatthias Schwarzott * 1000 * 10 * (intlog10(2^24) - intlog10(regval)) / 2^24 738c0675d0bSMatthias Schwarzott * 739c0675d0bSMatthias Schwarzott * intlog10(x) = log10(x) * 2^24 740c0675d0bSMatthias Schwarzott * intlog10(2^24) = log10(2^24) * 2^24 = 121210686 741c0675d0bSMatthias Schwarzott */ 742c0675d0bSMatthias Schwarzott u32tmp = (1000 * 10 * (121210686 - (u64)intlog10(u32tmp))) 743c0675d0bSMatthias Schwarzott >> 24; 744c0675d0bSMatthias Schwarzott c->cnr.stat[0].scale = FE_SCALE_DECIBEL; 745c0675d0bSMatthias Schwarzott c->cnr.stat[0].svalue = u32tmp; 746c0675d0bSMatthias Schwarzott } else 747c0675d0bSMatthias Schwarzott c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 748c0675d0bSMatthias Schwarzott 749964b3727SMatthias Schwarzott /* BER */ 750964b3727SMatthias Schwarzott if (*status & FE_HAS_VITERBI) { 751964b3727SMatthias Schwarzott if (c->post_bit_error.stat[0].scale == FE_SCALE_NOT_AVAILABLE) { 752964b3727SMatthias Schwarzott /* start new sampling period to get rid of old data*/ 753964b3727SMatthias Schwarzott ret = si2165_writereg8(state, REG_BER_RST, 0x01); 754964b3727SMatthias Schwarzott if (ret < 0) 755964b3727SMatthias Schwarzott return ret; 756964b3727SMatthias Schwarzott 757964b3727SMatthias Schwarzott /* set scale to enter read code on next call */ 758964b3727SMatthias Schwarzott c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER; 759964b3727SMatthias Schwarzott c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER; 760964b3727SMatthias Schwarzott c->post_bit_error.stat[0].uvalue = 0; 761964b3727SMatthias Schwarzott c->post_bit_count.stat[0].uvalue = 0; 762964b3727SMatthias Schwarzott 763e9c7d19aSMatthias Schwarzott /* 764e9c7d19aSMatthias Schwarzott * reset DVBv3 value to deliver a good result 765e9c7d19aSMatthias Schwarzott * for the first call 766e9c7d19aSMatthias Schwarzott */ 767e9c7d19aSMatthias Schwarzott state->ber_prev = 0; 768e9c7d19aSMatthias Schwarzott 769964b3727SMatthias Schwarzott } else { 770964b3727SMatthias Schwarzott ret = si2165_readreg8(state, REG_BER_AVAIL, &u8tmp); 771964b3727SMatthias Schwarzott if (ret < 0) 772964b3727SMatthias Schwarzott return ret; 773964b3727SMatthias Schwarzott 774964b3727SMatthias Schwarzott if (u8tmp & 1) { 775964b3727SMatthias Schwarzott u32 biterrcnt; 776964b3727SMatthias Schwarzott 777964b3727SMatthias Schwarzott ret = si2165_readreg24(state, REG_BER_BIT, 778964b3727SMatthias Schwarzott &biterrcnt); 779964b3727SMatthias Schwarzott if (ret < 0) 780964b3727SMatthias Schwarzott return ret; 781964b3727SMatthias Schwarzott 782964b3727SMatthias Schwarzott c->post_bit_error.stat[0].uvalue += 783964b3727SMatthias Schwarzott biterrcnt; 784964b3727SMatthias Schwarzott c->post_bit_count.stat[0].uvalue += 785964b3727SMatthias Schwarzott STATISTICS_PERIOD_BIT_COUNT; 786964b3727SMatthias Schwarzott 787964b3727SMatthias Schwarzott /* start new sampling period */ 788964b3727SMatthias Schwarzott ret = si2165_writereg8(state, 789964b3727SMatthias Schwarzott REG_BER_RST, 0x01); 790964b3727SMatthias Schwarzott if (ret < 0) 791964b3727SMatthias Schwarzott return ret; 792964b3727SMatthias Schwarzott 793964b3727SMatthias Schwarzott dev_dbg(&state->client->dev, 794964b3727SMatthias Schwarzott "post_bit_error=%u post_bit_count=%u\n", 795964b3727SMatthias Schwarzott biterrcnt, STATISTICS_PERIOD_BIT_COUNT); 796964b3727SMatthias Schwarzott } 797964b3727SMatthias Schwarzott } 798964b3727SMatthias Schwarzott } else { 799964b3727SMatthias Schwarzott c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 800964b3727SMatthias Schwarzott c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 801964b3727SMatthias Schwarzott } 802964b3727SMatthias Schwarzott 8033e54a169SMatthias Schwarzott return 0; 8043e54a169SMatthias Schwarzott } 8053e54a169SMatthias Schwarzott 8062e687a6dSMatthias Schwarzott static int si2165_read_snr(struct dvb_frontend *fe, u16 *snr) 8072e687a6dSMatthias Schwarzott { 8082e687a6dSMatthias Schwarzott struct dtv_frontend_properties *c = &fe->dtv_property_cache; 8092e687a6dSMatthias Schwarzott 8102e687a6dSMatthias Schwarzott if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL) 8112e687a6dSMatthias Schwarzott *snr = div_s64(c->cnr.stat[0].svalue, 100); 8122e687a6dSMatthias Schwarzott else 8132e687a6dSMatthias Schwarzott *snr = 0; 8142e687a6dSMatthias Schwarzott return 0; 8152e687a6dSMatthias Schwarzott } 8162e687a6dSMatthias Schwarzott 817e9c7d19aSMatthias Schwarzott static int si2165_read_ber(struct dvb_frontend *fe, u32 *ber) 818e9c7d19aSMatthias Schwarzott { 819e9c7d19aSMatthias Schwarzott struct si2165_state *state = fe->demodulator_priv; 820e9c7d19aSMatthias Schwarzott struct dtv_frontend_properties *c = &fe->dtv_property_cache; 821e9c7d19aSMatthias Schwarzott 822e9c7d19aSMatthias Schwarzott if (c->post_bit_error.stat[0].scale != FE_SCALE_COUNTER) { 823e9c7d19aSMatthias Schwarzott *ber = 0; 824e9c7d19aSMatthias Schwarzott return 0; 825e9c7d19aSMatthias Schwarzott } 826e9c7d19aSMatthias Schwarzott 827e9c7d19aSMatthias Schwarzott *ber = c->post_bit_error.stat[0].uvalue - state->ber_prev; 828e9c7d19aSMatthias Schwarzott state->ber_prev = c->post_bit_error.stat[0].uvalue; 829e9c7d19aSMatthias Schwarzott 830e9c7d19aSMatthias Schwarzott return 0; 831e9c7d19aSMatthias Schwarzott } 832e9c7d19aSMatthias Schwarzott 8333e54a169SMatthias Schwarzott static int si2165_set_oversamp(struct si2165_state *state, u32 dvb_rate) 8343e54a169SMatthias Schwarzott { 8353e54a169SMatthias Schwarzott u64 oversamp; 8363e54a169SMatthias Schwarzott u32 reg_value; 8373e54a169SMatthias Schwarzott 8382df9dda0SMatthias Schwarzott if (!dvb_rate) 8392df9dda0SMatthias Schwarzott return -EINVAL; 8402df9dda0SMatthias Schwarzott 8413e54a169SMatthias Schwarzott oversamp = si2165_get_fe_clk(state); 8423e54a169SMatthias Schwarzott oversamp <<= 23; 8433e54a169SMatthias Schwarzott do_div(oversamp, dvb_rate); 8443e54a169SMatthias Schwarzott reg_value = oversamp & 0x3fffffff; 8453e54a169SMatthias Schwarzott 8461b54da77SMatthias Schwarzott dev_dbg(&state->client->dev, "Write oversamp=%#x\n", reg_value); 847814f86c9SMatthias Schwarzott return si2165_writereg32(state, REG_OVERSAMP, reg_value); 8483e54a169SMatthias Schwarzott } 8493e54a169SMatthias Schwarzott 850542fb3c5SMatthias Schwarzott static int si2165_set_if_freq_shift(struct si2165_state *state) 8513e54a169SMatthias Schwarzott { 852542fb3c5SMatthias Schwarzott struct dvb_frontend *fe = &state->fe; 8533e54a169SMatthias Schwarzott u64 if_freq_shift; 8543e54a169SMatthias Schwarzott s32 reg_value = 0; 8553e54a169SMatthias Schwarzott u32 fe_clk = si2165_get_fe_clk(state); 856542fb3c5SMatthias Schwarzott u32 IF = 0; 8573e54a169SMatthias Schwarzott 858542fb3c5SMatthias Schwarzott if (!fe->ops.tuner_ops.get_if_frequency) { 859aa155449SMatthias Schwarzott dev_err(&state->client->dev, 86077f887cdSMatthias Schwarzott "Error: get_if_frequency() not defined at tuner. Can't work without it!\n"); 861542fb3c5SMatthias Schwarzott return -EINVAL; 862542fb3c5SMatthias Schwarzott } 863542fb3c5SMatthias Schwarzott 8642df9dda0SMatthias Schwarzott if (!fe_clk) 8652df9dda0SMatthias Schwarzott return -EINVAL; 8662df9dda0SMatthias Schwarzott 867542fb3c5SMatthias Schwarzott fe->ops.tuner_ops.get_if_frequency(fe, &IF); 8683e54a169SMatthias Schwarzott if_freq_shift = IF; 8693e54a169SMatthias Schwarzott if_freq_shift <<= 29; 8703e54a169SMatthias Schwarzott 8713e54a169SMatthias Schwarzott do_div(if_freq_shift, fe_clk); 8723e54a169SMatthias Schwarzott reg_value = (s32)if_freq_shift; 8733e54a169SMatthias Schwarzott 8743e54a169SMatthias Schwarzott if (state->config.inversion) 8753e54a169SMatthias Schwarzott reg_value = -reg_value; 8763e54a169SMatthias Schwarzott 8773e54a169SMatthias Schwarzott reg_value = reg_value & 0x1fffffff; 8783e54a169SMatthias Schwarzott 8793e54a169SMatthias Schwarzott /* if_freq_shift, usbdump contained 0x023ee08f; */ 880814f86c9SMatthias Schwarzott return si2165_writereg32(state, REG_IF_FREQ_SHIFT, reg_value); 8813e54a169SMatthias Schwarzott } 8823e54a169SMatthias Schwarzott 88325e73753SMatthias Schwarzott static const struct si2165_reg_value_pair dvbt_regs[] = { 88425e73753SMatthias Schwarzott /* standard = DVB-T */ 885814f86c9SMatthias Schwarzott { REG_DVB_STANDARD, 0x01 }, 88625e73753SMatthias Schwarzott /* impulsive_noise_remover */ 887814f86c9SMatthias Schwarzott { REG_IMPULSIVE_NOISE_REM, 0x01 }, 888814f86c9SMatthias Schwarzott { REG_AUTO_RESET, 0x00 }, 88925e73753SMatthias Schwarzott /* agc2 */ 890814f86c9SMatthias Schwarzott { REG_AGC2_MIN, 0x41 }, 891814f86c9SMatthias Schwarzott { REG_AGC2_KACQ, 0x0e }, 892814f86c9SMatthias Schwarzott { REG_AGC2_KLOC, 0x10 }, 89325e73753SMatthias Schwarzott /* agc */ 894814f86c9SMatthias Schwarzott { REG_AGC_UNFREEZE_THR, 0x03 }, 895814f86c9SMatthias Schwarzott { REG_AGC_CRESTF_DBX8, 0x78 }, 89625e73753SMatthias Schwarzott /* agc */ 897814f86c9SMatthias Schwarzott { REG_AAF_CRESTF_DBX8, 0x78 }, 898814f86c9SMatthias Schwarzott { REG_ACI_CRESTF_DBX8, 0x68 }, 89925e73753SMatthias Schwarzott /* freq_sync_range */ 900814f86c9SMatthias Schwarzott REG16(REG_FREQ_SYNC_RANGE, 0x0064), 90125e73753SMatthias Schwarzott /* gp_reg0 */ 902814f86c9SMatthias Schwarzott { REG_GP_REG0_MSB, 0x00 } 90325e73753SMatthias Schwarzott }; 90425e73753SMatthias Schwarzott 9053b0c9807SMatthias Schwarzott static int si2165_set_frontend_dvbt(struct dvb_frontend *fe) 9063e54a169SMatthias Schwarzott { 9073e54a169SMatthias Schwarzott int ret; 9083e54a169SMatthias Schwarzott struct dtv_frontend_properties *p = &fe->dtv_property_cache; 9093e54a169SMatthias Schwarzott struct si2165_state *state = fe->demodulator_priv; 9103e54a169SMatthias Schwarzott u32 dvb_rate = 0; 9113e54a169SMatthias Schwarzott u16 bw10k; 9127655a3aeSMatthias Schwarzott u32 bw_hz = p->bandwidth_hz; 9133e54a169SMatthias Schwarzott 9141b54da77SMatthias Schwarzott dev_dbg(&state->client->dev, "%s: called\n", __func__); 9153e54a169SMatthias Schwarzott 9163e54a169SMatthias Schwarzott if (!state->has_dvbt) 9173e54a169SMatthias Schwarzott return -EINVAL; 9183e54a169SMatthias Schwarzott 9197655a3aeSMatthias Schwarzott /* no bandwidth auto-detection */ 9207655a3aeSMatthias Schwarzott if (bw_hz == 0) 9217655a3aeSMatthias Schwarzott return -EINVAL; 9227655a3aeSMatthias Schwarzott 9237655a3aeSMatthias Schwarzott dvb_rate = bw_hz * 8 / 7; 9247655a3aeSMatthias Schwarzott bw10k = bw_hz / 10000; 9253e54a169SMatthias Schwarzott 9263e54a169SMatthias Schwarzott ret = si2165_adjust_pll_divl(state, 12); 9273e54a169SMatthias Schwarzott if (ret < 0) 9283e54a169SMatthias Schwarzott return ret; 9293e54a169SMatthias Schwarzott 9303e54a169SMatthias Schwarzott /* bandwidth in 10KHz steps */ 931814f86c9SMatthias Schwarzott ret = si2165_writereg16(state, REG_T_BANDWIDTH, bw10k); 9323e54a169SMatthias Schwarzott if (ret < 0) 9333e54a169SMatthias Schwarzott return ret; 9343e54a169SMatthias Schwarzott ret = si2165_set_oversamp(state, dvb_rate); 9353e54a169SMatthias Schwarzott if (ret < 0) 9363e54a169SMatthias Schwarzott return ret; 93725e73753SMatthias Schwarzott 93825e73753SMatthias Schwarzott ret = si2165_write_reg_list(state, dvbt_regs, ARRAY_SIZE(dvbt_regs)); 9393e54a169SMatthias Schwarzott if (ret < 0) 9403e54a169SMatthias Schwarzott return ret; 94125e73753SMatthias Schwarzott 9423b0c9807SMatthias Schwarzott return 0; 9433b0c9807SMatthias Schwarzott } 9443b0c9807SMatthias Schwarzott 94594c17334SMatthias Schwarzott static const struct si2165_reg_value_pair dvbc_regs[] = { 94694c17334SMatthias Schwarzott /* standard = DVB-C */ 947814f86c9SMatthias Schwarzott { REG_DVB_STANDARD, 0x05 }, 94894c17334SMatthias Schwarzott 94994c17334SMatthias Schwarzott /* agc2 */ 950814f86c9SMatthias Schwarzott { REG_AGC2_MIN, 0x50 }, 951814f86c9SMatthias Schwarzott { REG_AGC2_KACQ, 0x0e }, 952814f86c9SMatthias Schwarzott { REG_AGC2_KLOC, 0x10 }, 95394c17334SMatthias Schwarzott /* agc */ 954814f86c9SMatthias Schwarzott { REG_AGC_UNFREEZE_THR, 0x03 }, 955814f86c9SMatthias Schwarzott { REG_AGC_CRESTF_DBX8, 0x68 }, 95694c17334SMatthias Schwarzott /* agc */ 957814f86c9SMatthias Schwarzott { REG_AAF_CRESTF_DBX8, 0x68 }, 958814f86c9SMatthias Schwarzott { REG_ACI_CRESTF_DBX8, 0x50 }, 95994c17334SMatthias Schwarzott 960814f86c9SMatthias Schwarzott { REG_EQ_AUTO_CONTROL, 0x0d }, 96194c17334SMatthias Schwarzott 962814f86c9SMatthias Schwarzott { REG_KP_LOCK, 0x05 }, 963814f86c9SMatthias Schwarzott { REG_CENTRAL_TAP, 0x09 }, 964814f86c9SMatthias Schwarzott REG16(REG_UNKNOWN_350, 0x3e80), 96594c17334SMatthias Schwarzott 966814f86c9SMatthias Schwarzott { REG_AUTO_RESET, 0x01 }, 967814f86c9SMatthias Schwarzott REG16(REG_UNKNOWN_24C, 0x0000), 968814f86c9SMatthias Schwarzott REG16(REG_UNKNOWN_27C, 0x0000), 969814f86c9SMatthias Schwarzott { REG_SWEEP_STEP, 0x03 }, 970814f86c9SMatthias Schwarzott { REG_AGC_IF_TRI, 0x00 }, 97194c17334SMatthias Schwarzott }; 97294c17334SMatthias Schwarzott 97394c17334SMatthias Schwarzott static int si2165_set_frontend_dvbc(struct dvb_frontend *fe) 97494c17334SMatthias Schwarzott { 97594c17334SMatthias Schwarzott struct si2165_state *state = fe->demodulator_priv; 97694c17334SMatthias Schwarzott int ret; 97794c17334SMatthias Schwarzott struct dtv_frontend_properties *p = &fe->dtv_property_cache; 97894c17334SMatthias Schwarzott const u32 dvb_rate = p->symbol_rate; 979548b1f94SMatthias Schwarzott u8 u8tmp; 98094c17334SMatthias Schwarzott 98194c17334SMatthias Schwarzott if (!state->has_dvbc) 98294c17334SMatthias Schwarzott return -EINVAL; 98394c17334SMatthias Schwarzott 98494c17334SMatthias Schwarzott if (dvb_rate == 0) 98594c17334SMatthias Schwarzott return -EINVAL; 98694c17334SMatthias Schwarzott 98794c17334SMatthias Schwarzott ret = si2165_adjust_pll_divl(state, 14); 98894c17334SMatthias Schwarzott if (ret < 0) 98994c17334SMatthias Schwarzott return ret; 99094c17334SMatthias Schwarzott 99194c17334SMatthias Schwarzott /* Oversampling */ 99294c17334SMatthias Schwarzott ret = si2165_set_oversamp(state, dvb_rate); 99394c17334SMatthias Schwarzott if (ret < 0) 99494c17334SMatthias Schwarzott return ret; 99594c17334SMatthias Schwarzott 996548b1f94SMatthias Schwarzott switch (p->modulation) { 997548b1f94SMatthias Schwarzott case QPSK: 998548b1f94SMatthias Schwarzott u8tmp = 0x3; 999548b1f94SMatthias Schwarzott break; 1000548b1f94SMatthias Schwarzott case QAM_16: 1001548b1f94SMatthias Schwarzott u8tmp = 0x7; 1002548b1f94SMatthias Schwarzott break; 1003548b1f94SMatthias Schwarzott case QAM_32: 1004548b1f94SMatthias Schwarzott u8tmp = 0x8; 1005548b1f94SMatthias Schwarzott break; 1006548b1f94SMatthias Schwarzott case QAM_64: 1007548b1f94SMatthias Schwarzott u8tmp = 0x9; 1008548b1f94SMatthias Schwarzott break; 1009548b1f94SMatthias Schwarzott case QAM_128: 1010548b1f94SMatthias Schwarzott u8tmp = 0xa; 1011548b1f94SMatthias Schwarzott break; 1012548b1f94SMatthias Schwarzott case QAM_256: 1013548b1f94SMatthias Schwarzott default: 1014548b1f94SMatthias Schwarzott u8tmp = 0xb; 1015548b1f94SMatthias Schwarzott break; 1016548b1f94SMatthias Schwarzott } 1017548b1f94SMatthias Schwarzott ret = si2165_writereg8(state, REG_REQ_CONSTELLATION, u8tmp); 1018548b1f94SMatthias Schwarzott if (ret < 0) 1019548b1f94SMatthias Schwarzott return ret; 1020548b1f94SMatthias Schwarzott 1021f4d90518SMatthias Schwarzott ret = si2165_writereg32(state, REG_LOCK_TIMEOUT, 0x007a1200); 102294c17334SMatthias Schwarzott if (ret < 0) 102394c17334SMatthias Schwarzott return ret; 102494c17334SMatthias Schwarzott 102594c17334SMatthias Schwarzott ret = si2165_write_reg_list(state, dvbc_regs, ARRAY_SIZE(dvbc_regs)); 102694c17334SMatthias Schwarzott if (ret < 0) 102794c17334SMatthias Schwarzott return ret; 102894c17334SMatthias Schwarzott 102994c17334SMatthias Schwarzott return 0; 103094c17334SMatthias Schwarzott } 103194c17334SMatthias Schwarzott 1032814f86c9SMatthias Schwarzott static const struct si2165_reg_value_pair adc_rewrite[] = { 1033814f86c9SMatthias Schwarzott { REG_ADC_RI1, 0x46 }, 1034814f86c9SMatthias Schwarzott { REG_ADC_RI3, 0x00 }, 1035814f86c9SMatthias Schwarzott { REG_ADC_RI5, 0x0a }, 1036814f86c9SMatthias Schwarzott { REG_ADC_RI6, 0xff }, 1037814f86c9SMatthias Schwarzott { REG_ADC_RI8, 0x70 } 10383b0c9807SMatthias Schwarzott }; 10393b0c9807SMatthias Schwarzott 10403b0c9807SMatthias Schwarzott static int si2165_set_frontend(struct dvb_frontend *fe) 10413b0c9807SMatthias Schwarzott { 10423b0c9807SMatthias Schwarzott struct si2165_state *state = fe->demodulator_priv; 10433b0c9807SMatthias Schwarzott struct dtv_frontend_properties *p = &fe->dtv_property_cache; 10443b0c9807SMatthias Schwarzott u32 delsys = p->delivery_system; 10453b0c9807SMatthias Schwarzott int ret; 10463b0c9807SMatthias Schwarzott u8 val[3]; 10473b0c9807SMatthias Schwarzott 10483b0c9807SMatthias Schwarzott /* initial setting of if freq shift */ 10493b0c9807SMatthias Schwarzott ret = si2165_set_if_freq_shift(state); 10503b0c9807SMatthias Schwarzott if (ret < 0) 10513b0c9807SMatthias Schwarzott return ret; 10523b0c9807SMatthias Schwarzott 10533b0c9807SMatthias Schwarzott switch (delsys) { 10543b0c9807SMatthias Schwarzott case SYS_DVBT: 10553b0c9807SMatthias Schwarzott ret = si2165_set_frontend_dvbt(fe); 10563b0c9807SMatthias Schwarzott if (ret < 0) 10573b0c9807SMatthias Schwarzott return ret; 10583b0c9807SMatthias Schwarzott break; 105994c17334SMatthias Schwarzott case SYS_DVBC_ANNEX_A: 106094c17334SMatthias Schwarzott ret = si2165_set_frontend_dvbc(fe); 106194c17334SMatthias Schwarzott if (ret < 0) 106294c17334SMatthias Schwarzott return ret; 106394c17334SMatthias Schwarzott break; 10643b0c9807SMatthias Schwarzott default: 10653b0c9807SMatthias Schwarzott return -EINVAL; 10663b0c9807SMatthias Schwarzott } 10673b0c9807SMatthias Schwarzott 10683e54a169SMatthias Schwarzott /* dsp_addr_jump */ 1069814f86c9SMatthias Schwarzott ret = si2165_writereg32(state, REG_ADDR_JUMP, 0xf4000000); 10703e54a169SMatthias Schwarzott if (ret < 0) 10713e54a169SMatthias Schwarzott return ret; 10723e54a169SMatthias Schwarzott 10733e54a169SMatthias Schwarzott if (fe->ops.tuner_ops.set_params) 10743e54a169SMatthias Schwarzott fe->ops.tuner_ops.set_params(fe); 10753e54a169SMatthias Schwarzott 10763e54a169SMatthias Schwarzott /* recalc if_freq_shift if IF might has changed */ 1077542fb3c5SMatthias Schwarzott ret = si2165_set_if_freq_shift(state); 10783e54a169SMatthias Schwarzott if (ret < 0) 10793e54a169SMatthias Schwarzott return ret; 10803e54a169SMatthias Schwarzott 10813e54a169SMatthias Schwarzott /* boot/wdog status */ 1082814f86c9SMatthias Schwarzott ret = si2165_readreg8(state, REG_WDOG_AND_BOOT, val); 10833e54a169SMatthias Schwarzott if (ret < 0) 10843e54a169SMatthias Schwarzott return ret; 1085814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_WDOG_AND_BOOT, 0x00); 10863e54a169SMatthias Schwarzott if (ret < 0) 10873e54a169SMatthias Schwarzott return ret; 10883b0c9807SMatthias Schwarzott 10893e54a169SMatthias Schwarzott /* reset all */ 1090814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_RST_ALL, 0x00); 10913e54a169SMatthias Schwarzott if (ret < 0) 10923e54a169SMatthias Schwarzott return ret; 10933e54a169SMatthias Schwarzott /* gp_reg0 */ 1094814f86c9SMatthias Schwarzott ret = si2165_writereg32(state, REG_GP_REG0_LSB, 0x00000000); 10953e54a169SMatthias Schwarzott if (ret < 0) 10963e54a169SMatthias Schwarzott return ret; 1097eae56684SMatthias Schwarzott 1098eae56684SMatthias Schwarzott /* write adc values after each reset*/ 1099814f86c9SMatthias Schwarzott ret = si2165_write_reg_list(state, adc_rewrite, 1100814f86c9SMatthias Schwarzott ARRAY_SIZE(adc_rewrite)); 1101eae56684SMatthias Schwarzott if (ret < 0) 1102eae56684SMatthias Schwarzott return ret; 1103eae56684SMatthias Schwarzott 11043e54a169SMatthias Schwarzott /* start_synchro */ 1105814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_START_SYNCHRO, 0x01); 11063e54a169SMatthias Schwarzott if (ret < 0) 11073e54a169SMatthias Schwarzott return ret; 11083e54a169SMatthias Schwarzott /* boot/wdog status */ 1109814f86c9SMatthias Schwarzott ret = si2165_readreg8(state, REG_WDOG_AND_BOOT, val); 11103e54a169SMatthias Schwarzott if (ret < 0) 11113e54a169SMatthias Schwarzott return ret; 11123e54a169SMatthias Schwarzott 11133e54a169SMatthias Schwarzott return 0; 11143e54a169SMatthias Schwarzott } 11153e54a169SMatthias Schwarzott 1116bd336e63SMax Kellermann static const struct dvb_frontend_ops si2165_ops = { 11173e54a169SMatthias Schwarzott .info = { 1118119bd82eSMatthias Schwarzott .name = "Silicon Labs ", 111994c17334SMatthias Schwarzott /* For DVB-C */ 112094c17334SMatthias Schwarzott .symbol_rate_min = 1000000, 112194c17334SMatthias Schwarzott .symbol_rate_max = 7200000, 112294c17334SMatthias Schwarzott /* For DVB-T */ 1123f1b1eabfSMauro Carvalho Chehab .frequency_stepsize_hz = 166667, 11243e54a169SMatthias Schwarzott .caps = FE_CAN_FEC_1_2 | 11253e54a169SMatthias Schwarzott FE_CAN_FEC_2_3 | 11263e54a169SMatthias Schwarzott FE_CAN_FEC_3_4 | 11273e54a169SMatthias Schwarzott FE_CAN_FEC_5_6 | 11283e54a169SMatthias Schwarzott FE_CAN_FEC_7_8 | 11293e54a169SMatthias Schwarzott FE_CAN_FEC_AUTO | 11303e54a169SMatthias Schwarzott FE_CAN_QPSK | 11313e54a169SMatthias Schwarzott FE_CAN_QAM_16 | 11323e54a169SMatthias Schwarzott FE_CAN_QAM_32 | 11333e54a169SMatthias Schwarzott FE_CAN_QAM_64 | 11343e54a169SMatthias Schwarzott FE_CAN_QAM_128 | 11353e54a169SMatthias Schwarzott FE_CAN_QAM_256 | 11363e54a169SMatthias Schwarzott FE_CAN_GUARD_INTERVAL_AUTO | 11373e54a169SMatthias Schwarzott FE_CAN_HIERARCHY_AUTO | 11383e54a169SMatthias Schwarzott FE_CAN_MUTE_TS | 11393e54a169SMatthias Schwarzott FE_CAN_TRANSMISSION_MODE_AUTO | 11403e54a169SMatthias Schwarzott FE_CAN_RECOVER 11413e54a169SMatthias Schwarzott }, 11423e54a169SMatthias Schwarzott 11433e54a169SMatthias Schwarzott .get_tune_settings = si2165_get_tune_settings, 11443e54a169SMatthias Schwarzott 11453e54a169SMatthias Schwarzott .init = si2165_init, 11463e54a169SMatthias Schwarzott .sleep = si2165_sleep, 11473e54a169SMatthias Schwarzott 1148c1c49674SMatthias Schwarzott .set_frontend = si2165_set_frontend, 11493e54a169SMatthias Schwarzott .read_status = si2165_read_status, 11502e687a6dSMatthias Schwarzott .read_snr = si2165_read_snr, 1151e9c7d19aSMatthias Schwarzott .read_ber = si2165_read_ber, 11523e54a169SMatthias Schwarzott }; 11533e54a169SMatthias Schwarzott 11547cd785adSMatthias Schwarzott static int si2165_probe(struct i2c_client *client, 11557cd785adSMatthias Schwarzott const struct i2c_device_id *id) 11567cd785adSMatthias Schwarzott { 11577cd785adSMatthias Schwarzott struct si2165_state *state = NULL; 11587cd785adSMatthias Schwarzott struct si2165_platform_data *pdata = client->dev.platform_data; 11597cd785adSMatthias Schwarzott int n; 11607cd785adSMatthias Schwarzott int ret = 0; 11617cd785adSMatthias Schwarzott u8 val; 11627cd785adSMatthias Schwarzott char rev_char; 11637cd785adSMatthias Schwarzott const char *chip_name; 1164e3ea5e94SMatthias Schwarzott static const struct regmap_config regmap_config = { 1165e3ea5e94SMatthias Schwarzott .reg_bits = 16, 1166e3ea5e94SMatthias Schwarzott .val_bits = 8, 1167e3ea5e94SMatthias Schwarzott .max_register = 0x08ff, 1168e3ea5e94SMatthias Schwarzott }; 11697cd785adSMatthias Schwarzott 11707cd785adSMatthias Schwarzott /* allocate memory for the internal state */ 11717dbbb4bfSMatthias Schwarzott state = kzalloc(sizeof(*state), GFP_KERNEL); 11727dbbb4bfSMatthias Schwarzott if (!state) { 11737cd785adSMatthias Schwarzott ret = -ENOMEM; 11747cd785adSMatthias Schwarzott goto error; 11757cd785adSMatthias Schwarzott } 11767cd785adSMatthias Schwarzott 1177e3ea5e94SMatthias Schwarzott /* create regmap */ 1178e3ea5e94SMatthias Schwarzott state->regmap = devm_regmap_init_i2c(client, ®map_config); 1179e3ea5e94SMatthias Schwarzott if (IS_ERR(state->regmap)) { 1180e3ea5e94SMatthias Schwarzott ret = PTR_ERR(state->regmap); 1181e3ea5e94SMatthias Schwarzott goto error; 1182e3ea5e94SMatthias Schwarzott } 1183e3ea5e94SMatthias Schwarzott 11847cd785adSMatthias Schwarzott /* setup the state */ 11857cd785adSMatthias Schwarzott state->client = client; 11867cd785adSMatthias Schwarzott state->config.i2c_addr = client->addr; 11877cd785adSMatthias Schwarzott state->config.chip_mode = pdata->chip_mode; 11887dbbb4bfSMatthias Schwarzott state->config.ref_freq_hz = pdata->ref_freq_hz; 11897cd785adSMatthias Schwarzott state->config.inversion = pdata->inversion; 11907cd785adSMatthias Schwarzott 11917dbbb4bfSMatthias Schwarzott if (state->config.ref_freq_hz < 4000000 || 11927dbbb4bfSMatthias Schwarzott state->config.ref_freq_hz > 27000000) { 119377f887cdSMatthias Schwarzott dev_err(&state->client->dev, "ref_freq of %d Hz not supported by this driver\n", 11947dbbb4bfSMatthias Schwarzott state->config.ref_freq_hz); 11957cd785adSMatthias Schwarzott ret = -EINVAL; 11967cd785adSMatthias Schwarzott goto error; 11977cd785adSMatthias Schwarzott } 11987cd785adSMatthias Schwarzott 11997cd785adSMatthias Schwarzott /* create dvb_frontend */ 12007cd785adSMatthias Schwarzott memcpy(&state->fe.ops, &si2165_ops, 12017cd785adSMatthias Schwarzott sizeof(struct dvb_frontend_ops)); 12027cd785adSMatthias Schwarzott state->fe.ops.release = NULL; 12037cd785adSMatthias Schwarzott state->fe.demodulator_priv = state; 12047cd785adSMatthias Schwarzott i2c_set_clientdata(client, state); 12057cd785adSMatthias Schwarzott 12067cd785adSMatthias Schwarzott /* powerup */ 1207814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_CHIP_MODE, state->config.chip_mode); 12087cd785adSMatthias Schwarzott if (ret < 0) 12097cd785adSMatthias Schwarzott goto nodev_error; 12107cd785adSMatthias Schwarzott 1211814f86c9SMatthias Schwarzott ret = si2165_readreg8(state, REG_CHIP_MODE, &val); 12127cd785adSMatthias Schwarzott if (ret < 0) 12137cd785adSMatthias Schwarzott goto nodev_error; 12147cd785adSMatthias Schwarzott if (val != state->config.chip_mode) 12157cd785adSMatthias Schwarzott goto nodev_error; 12167cd785adSMatthias Schwarzott 1217814f86c9SMatthias Schwarzott ret = si2165_readreg8(state, REG_CHIP_REVCODE, &state->chip_revcode); 12187cd785adSMatthias Schwarzott if (ret < 0) 12197cd785adSMatthias Schwarzott goto nodev_error; 12207cd785adSMatthias Schwarzott 1221814f86c9SMatthias Schwarzott ret = si2165_readreg8(state, REV_CHIP_TYPE, &state->chip_type); 12227cd785adSMatthias Schwarzott if (ret < 0) 12237cd785adSMatthias Schwarzott goto nodev_error; 12247cd785adSMatthias Schwarzott 12257cd785adSMatthias Schwarzott /* powerdown */ 1226814f86c9SMatthias Schwarzott ret = si2165_writereg8(state, REG_CHIP_MODE, SI2165_MODE_OFF); 12277cd785adSMatthias Schwarzott if (ret < 0) 12287cd785adSMatthias Schwarzott goto nodev_error; 12297cd785adSMatthias Schwarzott 12307cd785adSMatthias Schwarzott if (state->chip_revcode < 26) 12317cd785adSMatthias Schwarzott rev_char = 'A' + state->chip_revcode; 12327cd785adSMatthias Schwarzott else 12337cd785adSMatthias Schwarzott rev_char = '?'; 12347cd785adSMatthias Schwarzott 12357cd785adSMatthias Schwarzott switch (state->chip_type) { 12367cd785adSMatthias Schwarzott case 0x06: 12377cd785adSMatthias Schwarzott chip_name = "Si2161"; 12387cd785adSMatthias Schwarzott state->has_dvbt = true; 12397cd785adSMatthias Schwarzott break; 12407cd785adSMatthias Schwarzott case 0x07: 12417cd785adSMatthias Schwarzott chip_name = "Si2165"; 12427cd785adSMatthias Schwarzott state->has_dvbt = true; 12437cd785adSMatthias Schwarzott state->has_dvbc = true; 12447cd785adSMatthias Schwarzott break; 12457cd785adSMatthias Schwarzott default: 124677f887cdSMatthias Schwarzott dev_err(&state->client->dev, "Unsupported Silicon Labs chip (type %d, rev %d)\n", 124777f887cdSMatthias Schwarzott state->chip_type, state->chip_revcode); 12487cd785adSMatthias Schwarzott goto nodev_error; 12497cd785adSMatthias Schwarzott } 12507cd785adSMatthias Schwarzott 1251aa155449SMatthias Schwarzott dev_info(&state->client->dev, 125277f887cdSMatthias Schwarzott "Detected Silicon Labs %s-%c (type %d, rev %d)\n", 125377f887cdSMatthias Schwarzott chip_name, rev_char, state->chip_type, 12547cd785adSMatthias Schwarzott state->chip_revcode); 12557cd785adSMatthias Schwarzott 12567cd785adSMatthias Schwarzott strlcat(state->fe.ops.info.name, chip_name, 12577cd785adSMatthias Schwarzott sizeof(state->fe.ops.info.name)); 12587cd785adSMatthias Schwarzott 12597cd785adSMatthias Schwarzott n = 0; 12607cd785adSMatthias Schwarzott if (state->has_dvbt) { 12617cd785adSMatthias Schwarzott state->fe.ops.delsys[n++] = SYS_DVBT; 12627cd785adSMatthias Schwarzott strlcat(state->fe.ops.info.name, " DVB-T", 12637cd785adSMatthias Schwarzott sizeof(state->fe.ops.info.name)); 12647cd785adSMatthias Schwarzott } 12657cd785adSMatthias Schwarzott if (state->has_dvbc) { 12667cd785adSMatthias Schwarzott state->fe.ops.delsys[n++] = SYS_DVBC_ANNEX_A; 12677cd785adSMatthias Schwarzott strlcat(state->fe.ops.info.name, " DVB-C", 12687cd785adSMatthias Schwarzott sizeof(state->fe.ops.info.name)); 12697cd785adSMatthias Schwarzott } 12707cd785adSMatthias Schwarzott 12717cd785adSMatthias Schwarzott /* return fe pointer */ 12727cd785adSMatthias Schwarzott *pdata->fe = &state->fe; 12737cd785adSMatthias Schwarzott 12747cd785adSMatthias Schwarzott return 0; 12757cd785adSMatthias Schwarzott 12767cd785adSMatthias Schwarzott nodev_error: 12777cd785adSMatthias Schwarzott ret = -ENODEV; 12787cd785adSMatthias Schwarzott error: 12797cd785adSMatthias Schwarzott kfree(state); 12807cd785adSMatthias Schwarzott dev_dbg(&client->dev, "failed=%d\n", ret); 12817cd785adSMatthias Schwarzott return ret; 12827cd785adSMatthias Schwarzott } 12837cd785adSMatthias Schwarzott 12847cd785adSMatthias Schwarzott static int si2165_remove(struct i2c_client *client) 12857cd785adSMatthias Schwarzott { 12867cd785adSMatthias Schwarzott struct si2165_state *state = i2c_get_clientdata(client); 12877cd785adSMatthias Schwarzott 12887cd785adSMatthias Schwarzott dev_dbg(&client->dev, "\n"); 12897cd785adSMatthias Schwarzott 12907cd785adSMatthias Schwarzott kfree(state); 12917cd785adSMatthias Schwarzott return 0; 12927cd785adSMatthias Schwarzott } 12937cd785adSMatthias Schwarzott 12947cd785adSMatthias Schwarzott static const struct i2c_device_id si2165_id_table[] = { 12957cd785adSMatthias Schwarzott {"si2165", 0}, 12967cd785adSMatthias Schwarzott {} 12977cd785adSMatthias Schwarzott }; 12987cd785adSMatthias Schwarzott MODULE_DEVICE_TABLE(i2c, si2165_id_table); 12997cd785adSMatthias Schwarzott 13007cd785adSMatthias Schwarzott static struct i2c_driver si2165_driver = { 13017cd785adSMatthias Schwarzott .driver = { 13027cd785adSMatthias Schwarzott .owner = THIS_MODULE, 13037cd785adSMatthias Schwarzott .name = "si2165", 13047cd785adSMatthias Schwarzott }, 13057cd785adSMatthias Schwarzott .probe = si2165_probe, 13067cd785adSMatthias Schwarzott .remove = si2165_remove, 13077cd785adSMatthias Schwarzott .id_table = si2165_id_table, 13087cd785adSMatthias Schwarzott }; 13097cd785adSMatthias Schwarzott 13107cd785adSMatthias Schwarzott module_i2c_driver(si2165_driver); 13117cd785adSMatthias Schwarzott 13123e54a169SMatthias Schwarzott MODULE_DESCRIPTION("Silicon Labs Si2165 DVB-C/-T Demodulator driver"); 13133e54a169SMatthias Schwarzott MODULE_AUTHOR("Matthias Schwarzott <zzam@gentoo.org>"); 13143e54a169SMatthias Schwarzott MODULE_LICENSE("GPL"); 131555bea400SMatthias Schwarzott MODULE_FIRMWARE(SI2165_FIRMWARE_REV_D); 1316