19a0bf528SMauro Carvalho Chehab /*
29a0bf528SMauro Carvalho Chehab  *   Sharp VA3A5JZ921 One Seg Broadcast Module driver
39a0bf528SMauro Carvalho Chehab  *   This device is labeled as just S. 921 at the top of the frontend can
49a0bf528SMauro Carvalho Chehab  *
537e59f87SMauro Carvalho Chehab  *   Copyright (C) 2009-2010 Mauro Carvalho Chehab
69a0bf528SMauro Carvalho Chehab  *   Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
79a0bf528SMauro Carvalho Chehab  *
89a0bf528SMauro Carvalho Chehab  *   Developed for Leadership SBTVD 1seg device sold in Brazil
99a0bf528SMauro Carvalho Chehab  *
109a0bf528SMauro Carvalho Chehab  *   Frontend module based on cx24123 driver, getting some info from
119a0bf528SMauro Carvalho Chehab  *	the old s921 driver.
129a0bf528SMauro Carvalho Chehab  *
139a0bf528SMauro Carvalho Chehab  *   FIXME: Need to port to DVB v5.2 API
149a0bf528SMauro Carvalho Chehab  *
159a0bf528SMauro Carvalho Chehab  *   This program is free software; you can redistribute it and/or
169a0bf528SMauro Carvalho Chehab  *   modify it under the terms of the GNU General Public License as
179a0bf528SMauro Carvalho Chehab  *   published by the Free Software Foundation version 2.
189a0bf528SMauro Carvalho Chehab  *
199a0bf528SMauro Carvalho Chehab  *   This program is distributed in the hope that it will be useful,
209a0bf528SMauro Carvalho Chehab  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
219a0bf528SMauro Carvalho Chehab  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
229a0bf528SMauro Carvalho Chehab  *   General Public License for more details.
239a0bf528SMauro Carvalho Chehab  */
249a0bf528SMauro Carvalho Chehab 
259a0bf528SMauro Carvalho Chehab #include <linux/kernel.h>
269a0bf528SMauro Carvalho Chehab #include <asm/div64.h>
279a0bf528SMauro Carvalho Chehab 
28fada1935SMauro Carvalho Chehab #include <media/dvb_frontend.h>
299a0bf528SMauro Carvalho Chehab #include "s921.h"
309a0bf528SMauro Carvalho Chehab 
319a0bf528SMauro Carvalho Chehab static int debug = 1;
329a0bf528SMauro Carvalho Chehab module_param(debug, int, 0644);
339a0bf528SMauro Carvalho Chehab MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
349a0bf528SMauro Carvalho Chehab 
359a0bf528SMauro Carvalho Chehab #define rc(args...)  do {						\
369a0bf528SMauro Carvalho Chehab 	printk(KERN_ERR  "s921: " args);				\
379a0bf528SMauro Carvalho Chehab } while (0)
389a0bf528SMauro Carvalho Chehab 
399a0bf528SMauro Carvalho Chehab #define dprintk(args...)						\
409a0bf528SMauro Carvalho Chehab 	do {								\
419a0bf528SMauro Carvalho Chehab 		if (debug) {						\
429a0bf528SMauro Carvalho Chehab 			printk(KERN_DEBUG "s921: %s: ", __func__);	\
439a0bf528SMauro Carvalho Chehab 			printk(args);					\
449a0bf528SMauro Carvalho Chehab 		}							\
459a0bf528SMauro Carvalho Chehab 	} while (0)
469a0bf528SMauro Carvalho Chehab 
479a0bf528SMauro Carvalho Chehab struct s921_state {
489a0bf528SMauro Carvalho Chehab 	struct i2c_adapter *i2c;
499a0bf528SMauro Carvalho Chehab 	const struct s921_config *config;
509a0bf528SMauro Carvalho Chehab 
519a0bf528SMauro Carvalho Chehab 	struct dvb_frontend frontend;
529a0bf528SMauro Carvalho Chehab 
539a0bf528SMauro Carvalho Chehab 	/* The Demod can't easily provide these, we cache them */
549a0bf528SMauro Carvalho Chehab 	u32 currentfreq;
559a0bf528SMauro Carvalho Chehab };
569a0bf528SMauro Carvalho Chehab 
579a0bf528SMauro Carvalho Chehab /*
589a0bf528SMauro Carvalho Chehab  * Various tuner defaults need to be established for a given frequency kHz.
599a0bf528SMauro Carvalho Chehab  * fixme: The bounds on the bands do not match the doc in real life.
609a0bf528SMauro Carvalho Chehab  * fixme: Some of them have been moved, other might need adjustment.
619a0bf528SMauro Carvalho Chehab  */
629a0bf528SMauro Carvalho Chehab static struct s921_bandselect_val {
639a0bf528SMauro Carvalho Chehab 	u32 freq_low;
649a0bf528SMauro Carvalho Chehab 	u8  band_reg;
659a0bf528SMauro Carvalho Chehab } s921_bandselect[] = {
669a0bf528SMauro Carvalho Chehab 	{         0, 0x7b },
679a0bf528SMauro Carvalho Chehab 	{ 485140000, 0x5b },
689a0bf528SMauro Carvalho Chehab 	{ 515140000, 0x3b },
699a0bf528SMauro Carvalho Chehab 	{ 545140000, 0x1b },
709a0bf528SMauro Carvalho Chehab 	{ 599140000, 0xfb },
719a0bf528SMauro Carvalho Chehab 	{ 623140000, 0xdb },
729a0bf528SMauro Carvalho Chehab 	{ 659140000, 0xbb },
739a0bf528SMauro Carvalho Chehab 	{ 713140000, 0x9b },
749a0bf528SMauro Carvalho Chehab };
759a0bf528SMauro Carvalho Chehab 
769a0bf528SMauro Carvalho Chehab struct regdata {
779a0bf528SMauro Carvalho Chehab 	u8 reg;
789a0bf528SMauro Carvalho Chehab 	u8 data;
799a0bf528SMauro Carvalho Chehab };
809a0bf528SMauro Carvalho Chehab 
819a0bf528SMauro Carvalho Chehab static struct regdata s921_init[] = {
829a0bf528SMauro Carvalho Chehab 	{ 0x01, 0x80 },		/* Probably, a reset sequence */
839a0bf528SMauro Carvalho Chehab 	{ 0x01, 0x40 },
849a0bf528SMauro Carvalho Chehab 	{ 0x01, 0x80 },
859a0bf528SMauro Carvalho Chehab 	{ 0x01, 0x40 },
869a0bf528SMauro Carvalho Chehab 
879a0bf528SMauro Carvalho Chehab 	{ 0x02, 0x00 },
889a0bf528SMauro Carvalho Chehab 	{ 0x03, 0x40 },
899a0bf528SMauro Carvalho Chehab 	{ 0x04, 0x01 },
909a0bf528SMauro Carvalho Chehab 	{ 0x05, 0x00 },
919a0bf528SMauro Carvalho Chehab 	{ 0x06, 0x00 },
929a0bf528SMauro Carvalho Chehab 	{ 0x07, 0x00 },
939a0bf528SMauro Carvalho Chehab 	{ 0x08, 0x00 },
949a0bf528SMauro Carvalho Chehab 	{ 0x09, 0x00 },
959a0bf528SMauro Carvalho Chehab 	{ 0x0a, 0x00 },
969a0bf528SMauro Carvalho Chehab 	{ 0x0b, 0x5a },
979a0bf528SMauro Carvalho Chehab 	{ 0x0c, 0x00 },
989a0bf528SMauro Carvalho Chehab 	{ 0x0d, 0x00 },
999a0bf528SMauro Carvalho Chehab 	{ 0x0f, 0x00 },
1009a0bf528SMauro Carvalho Chehab 	{ 0x13, 0x1b },
1019a0bf528SMauro Carvalho Chehab 	{ 0x14, 0x80 },
1029a0bf528SMauro Carvalho Chehab 	{ 0x15, 0x40 },
1039a0bf528SMauro Carvalho Chehab 	{ 0x17, 0x70 },
1049a0bf528SMauro Carvalho Chehab 	{ 0x18, 0x01 },
1059a0bf528SMauro Carvalho Chehab 	{ 0x19, 0x12 },
1069a0bf528SMauro Carvalho Chehab 	{ 0x1a, 0x01 },
1079a0bf528SMauro Carvalho Chehab 	{ 0x1b, 0x12 },
1089a0bf528SMauro Carvalho Chehab 	{ 0x1c, 0xa0 },
1099a0bf528SMauro Carvalho Chehab 	{ 0x1d, 0x00 },
1109a0bf528SMauro Carvalho Chehab 	{ 0x1e, 0x0a },
1119a0bf528SMauro Carvalho Chehab 	{ 0x1f, 0x08 },
1129a0bf528SMauro Carvalho Chehab 	{ 0x20, 0x40 },
1139a0bf528SMauro Carvalho Chehab 	{ 0x21, 0xff },
1149a0bf528SMauro Carvalho Chehab 	{ 0x22, 0x4c },
1159a0bf528SMauro Carvalho Chehab 	{ 0x23, 0x4e },
1169a0bf528SMauro Carvalho Chehab 	{ 0x24, 0x4c },
1179a0bf528SMauro Carvalho Chehab 	{ 0x25, 0x00 },
1189a0bf528SMauro Carvalho Chehab 	{ 0x26, 0x00 },
1199a0bf528SMauro Carvalho Chehab 	{ 0x27, 0xf4 },
1209a0bf528SMauro Carvalho Chehab 	{ 0x28, 0x60 },
1219a0bf528SMauro Carvalho Chehab 	{ 0x29, 0x88 },
1229a0bf528SMauro Carvalho Chehab 	{ 0x2a, 0x40 },
1239a0bf528SMauro Carvalho Chehab 	{ 0x2b, 0x40 },
1249a0bf528SMauro Carvalho Chehab 	{ 0x2c, 0xff },
1259a0bf528SMauro Carvalho Chehab 	{ 0x2d, 0x00 },
1269a0bf528SMauro Carvalho Chehab 	{ 0x2e, 0xff },
1279a0bf528SMauro Carvalho Chehab 	{ 0x2f, 0x00 },
1289a0bf528SMauro Carvalho Chehab 	{ 0x30, 0x20 },
1299a0bf528SMauro Carvalho Chehab 	{ 0x31, 0x06 },
1309a0bf528SMauro Carvalho Chehab 	{ 0x32, 0x0c },
1319a0bf528SMauro Carvalho Chehab 	{ 0x34, 0x0f },
1329a0bf528SMauro Carvalho Chehab 	{ 0x37, 0xfe },
1339a0bf528SMauro Carvalho Chehab 	{ 0x38, 0x00 },
1349a0bf528SMauro Carvalho Chehab 	{ 0x39, 0x63 },
1359a0bf528SMauro Carvalho Chehab 	{ 0x3a, 0x10 },
1369a0bf528SMauro Carvalho Chehab 	{ 0x3b, 0x10 },
1379a0bf528SMauro Carvalho Chehab 	{ 0x47, 0x00 },
1389a0bf528SMauro Carvalho Chehab 	{ 0x49, 0xe5 },
1399a0bf528SMauro Carvalho Chehab 	{ 0x4b, 0x00 },
1409a0bf528SMauro Carvalho Chehab 	{ 0x50, 0xc0 },
1419a0bf528SMauro Carvalho Chehab 	{ 0x52, 0x20 },
1429a0bf528SMauro Carvalho Chehab 	{ 0x54, 0x5a },
1439a0bf528SMauro Carvalho Chehab 	{ 0x55, 0x5b },
1449a0bf528SMauro Carvalho Chehab 	{ 0x56, 0x40 },
1459a0bf528SMauro Carvalho Chehab 	{ 0x57, 0x70 },
1469a0bf528SMauro Carvalho Chehab 	{ 0x5c, 0x50 },
1479a0bf528SMauro Carvalho Chehab 	{ 0x5d, 0x00 },
1489a0bf528SMauro Carvalho Chehab 	{ 0x62, 0x17 },
1499a0bf528SMauro Carvalho Chehab 	{ 0x63, 0x2f },
1509a0bf528SMauro Carvalho Chehab 	{ 0x64, 0x6f },
1519a0bf528SMauro Carvalho Chehab 	{ 0x68, 0x00 },
1529a0bf528SMauro Carvalho Chehab 	{ 0x69, 0x89 },
1539a0bf528SMauro Carvalho Chehab 	{ 0x6a, 0x00 },
1549a0bf528SMauro Carvalho Chehab 	{ 0x6b, 0x00 },
1559a0bf528SMauro Carvalho Chehab 	{ 0x6c, 0x00 },
1569a0bf528SMauro Carvalho Chehab 	{ 0x6d, 0x00 },
1579a0bf528SMauro Carvalho Chehab 	{ 0x6e, 0x00 },
1589a0bf528SMauro Carvalho Chehab 	{ 0x70, 0x10 },
1599a0bf528SMauro Carvalho Chehab 	{ 0x71, 0x00 },
1609a0bf528SMauro Carvalho Chehab 	{ 0x75, 0x00 },
1619a0bf528SMauro Carvalho Chehab 	{ 0x76, 0x30 },
1629a0bf528SMauro Carvalho Chehab 	{ 0x77, 0x01 },
1639a0bf528SMauro Carvalho Chehab 	{ 0xaf, 0x00 },
1649a0bf528SMauro Carvalho Chehab 	{ 0xb0, 0xa0 },
1659a0bf528SMauro Carvalho Chehab 	{ 0xb2, 0x3d },
1669a0bf528SMauro Carvalho Chehab 	{ 0xb3, 0x25 },
1679a0bf528SMauro Carvalho Chehab 	{ 0xb4, 0x8b },
1689a0bf528SMauro Carvalho Chehab 	{ 0xb5, 0x4b },
1699a0bf528SMauro Carvalho Chehab 	{ 0xb6, 0x3f },
1709a0bf528SMauro Carvalho Chehab 	{ 0xb7, 0xff },
1719a0bf528SMauro Carvalho Chehab 	{ 0xb8, 0xff },
1729a0bf528SMauro Carvalho Chehab 	{ 0xb9, 0xfc },
1739a0bf528SMauro Carvalho Chehab 	{ 0xba, 0x00 },
1749a0bf528SMauro Carvalho Chehab 	{ 0xbb, 0x00 },
1759a0bf528SMauro Carvalho Chehab 	{ 0xbc, 0x00 },
1769a0bf528SMauro Carvalho Chehab 	{ 0xd0, 0x30 },
1779a0bf528SMauro Carvalho Chehab 	{ 0xe4, 0x84 },
1789a0bf528SMauro Carvalho Chehab 	{ 0xf0, 0x48 },
1799a0bf528SMauro Carvalho Chehab 	{ 0xf1, 0x19 },
1809a0bf528SMauro Carvalho Chehab 	{ 0xf2, 0x5a },
1819a0bf528SMauro Carvalho Chehab 	{ 0xf3, 0x8e },
1829a0bf528SMauro Carvalho Chehab 	{ 0xf4, 0x2d },
1839a0bf528SMauro Carvalho Chehab 	{ 0xf5, 0x07 },
1849a0bf528SMauro Carvalho Chehab 	{ 0xf6, 0x5a },
1859a0bf528SMauro Carvalho Chehab 	{ 0xf7, 0xba },
1869a0bf528SMauro Carvalho Chehab 	{ 0xf8, 0xd7 },
1879a0bf528SMauro Carvalho Chehab };
1889a0bf528SMauro Carvalho Chehab 
1899a0bf528SMauro Carvalho Chehab static struct regdata s921_prefreq[] = {
1909a0bf528SMauro Carvalho Chehab 	{ 0x47, 0x60 },
1919a0bf528SMauro Carvalho Chehab 	{ 0x68, 0x00 },
1929a0bf528SMauro Carvalho Chehab 	{ 0x69, 0x89 },
1939a0bf528SMauro Carvalho Chehab 	{ 0xf0, 0x48 },
1949a0bf528SMauro Carvalho Chehab 	{ 0xf1, 0x19 },
1959a0bf528SMauro Carvalho Chehab };
1969a0bf528SMauro Carvalho Chehab 
1979a0bf528SMauro Carvalho Chehab static struct regdata s921_postfreq[] = {
1989a0bf528SMauro Carvalho Chehab 	{ 0xf5, 0xae },
1999a0bf528SMauro Carvalho Chehab 	{ 0xf6, 0xb7 },
2009a0bf528SMauro Carvalho Chehab 	{ 0xf7, 0xba },
2019a0bf528SMauro Carvalho Chehab 	{ 0xf8, 0xd7 },
2029a0bf528SMauro Carvalho Chehab 	{ 0x68, 0x0a },
2039a0bf528SMauro Carvalho Chehab 	{ 0x69, 0x09 },
2049a0bf528SMauro Carvalho Chehab };
2059a0bf528SMauro Carvalho Chehab 
2069a0bf528SMauro Carvalho Chehab static int s921_i2c_writereg(struct s921_state *state,
2079a0bf528SMauro Carvalho Chehab 			     u8 i2c_addr, int reg, int data)
2089a0bf528SMauro Carvalho Chehab {
2099a0bf528SMauro Carvalho Chehab 	u8 buf[] = { reg, data };
2109a0bf528SMauro Carvalho Chehab 	struct i2c_msg msg = {
2119a0bf528SMauro Carvalho Chehab 		.addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
2129a0bf528SMauro Carvalho Chehab 	};
2139a0bf528SMauro Carvalho Chehab 	int rc;
2149a0bf528SMauro Carvalho Chehab 
2159a0bf528SMauro Carvalho Chehab 	rc = i2c_transfer(state->i2c, &msg, 1);
2169a0bf528SMauro Carvalho Chehab 	if (rc != 1) {
2174bd69e7bSMauro Carvalho Chehab 		printk("%s: writereg rcor(rc == %i, reg == 0x%02x, data == 0x%02x)\n",
2184bd69e7bSMauro Carvalho Chehab 		       __func__, rc, reg, data);
2199a0bf528SMauro Carvalho Chehab 		return rc;
2209a0bf528SMauro Carvalho Chehab 	}
2219a0bf528SMauro Carvalho Chehab 
2229a0bf528SMauro Carvalho Chehab 	return 0;
2239a0bf528SMauro Carvalho Chehab }
2249a0bf528SMauro Carvalho Chehab 
2259a0bf528SMauro Carvalho Chehab static int s921_i2c_writeregdata(struct s921_state *state, u8 i2c_addr,
2269a0bf528SMauro Carvalho Chehab 				 struct regdata *rd, int size)
2279a0bf528SMauro Carvalho Chehab {
2289a0bf528SMauro Carvalho Chehab 	int i, rc;
2299a0bf528SMauro Carvalho Chehab 
2309a0bf528SMauro Carvalho Chehab 	for (i = 0; i < size; i++) {
2319a0bf528SMauro Carvalho Chehab 		rc = s921_i2c_writereg(state, i2c_addr, rd[i].reg, rd[i].data);
2329a0bf528SMauro Carvalho Chehab 		if (rc < 0)
2339a0bf528SMauro Carvalho Chehab 			return rc;
2349a0bf528SMauro Carvalho Chehab 	}
2359a0bf528SMauro Carvalho Chehab 	return 0;
2369a0bf528SMauro Carvalho Chehab }
2379a0bf528SMauro Carvalho Chehab 
2389a0bf528SMauro Carvalho Chehab static int s921_i2c_readreg(struct s921_state *state, u8 i2c_addr, u8 reg)
2399a0bf528SMauro Carvalho Chehab {
2409a0bf528SMauro Carvalho Chehab 	u8 val;
2419a0bf528SMauro Carvalho Chehab 	int rc;
2429a0bf528SMauro Carvalho Chehab 	struct i2c_msg msg[] = {
2439a0bf528SMauro Carvalho Chehab 		{ .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
2449a0bf528SMauro Carvalho Chehab 		{ .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
2459a0bf528SMauro Carvalho Chehab 	};
2469a0bf528SMauro Carvalho Chehab 
2479a0bf528SMauro Carvalho Chehab 	rc = i2c_transfer(state->i2c, msg, 2);
2489a0bf528SMauro Carvalho Chehab 
2499a0bf528SMauro Carvalho Chehab 	if (rc != 2) {
2509a0bf528SMauro Carvalho Chehab 		rc("%s: reg=0x%x (rcor=%d)\n", __func__, reg, rc);
2519a0bf528SMauro Carvalho Chehab 		return rc;
2529a0bf528SMauro Carvalho Chehab 	}
2539a0bf528SMauro Carvalho Chehab 
2549a0bf528SMauro Carvalho Chehab 	return val;
2559a0bf528SMauro Carvalho Chehab }
2569a0bf528SMauro Carvalho Chehab 
2579a0bf528SMauro Carvalho Chehab #define s921_readreg(state, reg) \
2589a0bf528SMauro Carvalho Chehab 	s921_i2c_readreg(state, state->config->demod_address, reg)
2599a0bf528SMauro Carvalho Chehab #define s921_writereg(state, reg, val) \
2609a0bf528SMauro Carvalho Chehab 	s921_i2c_writereg(state, state->config->demod_address, reg, val)
2619a0bf528SMauro Carvalho Chehab #define s921_writeregdata(state, regdata) \
2629a0bf528SMauro Carvalho Chehab 	s921_i2c_writeregdata(state, state->config->demod_address, \
2639a0bf528SMauro Carvalho Chehab 	regdata, ARRAY_SIZE(regdata))
2649a0bf528SMauro Carvalho Chehab 
2659a0bf528SMauro Carvalho Chehab static int s921_pll_tune(struct dvb_frontend *fe)
2669a0bf528SMauro Carvalho Chehab {
2679a0bf528SMauro Carvalho Chehab 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
2689a0bf528SMauro Carvalho Chehab 	struct s921_state *state = fe->demodulator_priv;
2699a0bf528SMauro Carvalho Chehab 	int band, rc, i;
2709a0bf528SMauro Carvalho Chehab 	unsigned long f_offset;
2719a0bf528SMauro Carvalho Chehab 	u8 f_switch;
2729a0bf528SMauro Carvalho Chehab 	u64 offset;
2739a0bf528SMauro Carvalho Chehab 
2749a0bf528SMauro Carvalho Chehab 	dprintk("frequency=%i\n", p->frequency);
2759a0bf528SMauro Carvalho Chehab 
2769a0bf528SMauro Carvalho Chehab 	for (band = 0; band < ARRAY_SIZE(s921_bandselect); band++)
2779a0bf528SMauro Carvalho Chehab 		if (p->frequency < s921_bandselect[band].freq_low)
2789a0bf528SMauro Carvalho Chehab 			break;
2799a0bf528SMauro Carvalho Chehab 	band--;
2809a0bf528SMauro Carvalho Chehab 
2819a0bf528SMauro Carvalho Chehab 	if (band < 0) {
2829a0bf528SMauro Carvalho Chehab 		rc("%s: frequency out of range\n", __func__);
2839a0bf528SMauro Carvalho Chehab 		return -EINVAL;
2849a0bf528SMauro Carvalho Chehab 	}
2859a0bf528SMauro Carvalho Chehab 
2869a0bf528SMauro Carvalho Chehab 	f_switch = s921_bandselect[band].band_reg;
2879a0bf528SMauro Carvalho Chehab 
2889a0bf528SMauro Carvalho Chehab 	offset = ((u64)p->frequency) * 258;
2899a0bf528SMauro Carvalho Chehab 	do_div(offset, 6000000);
2909a0bf528SMauro Carvalho Chehab 	f_offset = ((unsigned long)offset) + 2321;
2919a0bf528SMauro Carvalho Chehab 
2929a0bf528SMauro Carvalho Chehab 	rc = s921_writeregdata(state, s921_prefreq);
2939a0bf528SMauro Carvalho Chehab 	if (rc < 0)
2949a0bf528SMauro Carvalho Chehab 		return rc;
2959a0bf528SMauro Carvalho Chehab 
2969a0bf528SMauro Carvalho Chehab 	rc = s921_writereg(state, 0xf2, (f_offset >> 8) & 0xff);
2979a0bf528SMauro Carvalho Chehab 	if (rc < 0)
2989a0bf528SMauro Carvalho Chehab 		return rc;
2999a0bf528SMauro Carvalho Chehab 
3009a0bf528SMauro Carvalho Chehab 	rc = s921_writereg(state, 0xf3, f_offset & 0xff);
3019a0bf528SMauro Carvalho Chehab 	if (rc < 0)
3029a0bf528SMauro Carvalho Chehab 		return rc;
3039a0bf528SMauro Carvalho Chehab 
3049a0bf528SMauro Carvalho Chehab 	rc = s921_writereg(state, 0xf4, f_switch);
3059a0bf528SMauro Carvalho Chehab 	if (rc < 0)
3069a0bf528SMauro Carvalho Chehab 		return rc;
3079a0bf528SMauro Carvalho Chehab 
3089a0bf528SMauro Carvalho Chehab 	rc = s921_writeregdata(state, s921_postfreq);
3099a0bf528SMauro Carvalho Chehab 	if (rc < 0)
3109a0bf528SMauro Carvalho Chehab 		return rc;
3119a0bf528SMauro Carvalho Chehab 
3129a0bf528SMauro Carvalho Chehab 	for (i = 0 ; i < 6; i++) {
3139a0bf528SMauro Carvalho Chehab 		rc = s921_readreg(state, 0x80);
3149a0bf528SMauro Carvalho Chehab 		dprintk("status 0x80: %02x\n", rc);
3159a0bf528SMauro Carvalho Chehab 	}
3169a0bf528SMauro Carvalho Chehab 	rc = s921_writereg(state, 0x01, 0x40);
3179a0bf528SMauro Carvalho Chehab 	if (rc < 0)
3189a0bf528SMauro Carvalho Chehab 		return rc;
3199a0bf528SMauro Carvalho Chehab 
3209a0bf528SMauro Carvalho Chehab 	rc = s921_readreg(state, 0x01);
3219a0bf528SMauro Carvalho Chehab 	dprintk("status 0x01: %02x\n", rc);
3229a0bf528SMauro Carvalho Chehab 
3239a0bf528SMauro Carvalho Chehab 	rc = s921_readreg(state, 0x80);
3249a0bf528SMauro Carvalho Chehab 	dprintk("status 0x80: %02x\n", rc);
3259a0bf528SMauro Carvalho Chehab 
3269a0bf528SMauro Carvalho Chehab 	rc = s921_readreg(state, 0x80);
3279a0bf528SMauro Carvalho Chehab 	dprintk("status 0x80: %02x\n", rc);
3289a0bf528SMauro Carvalho Chehab 
3299a0bf528SMauro Carvalho Chehab 	rc = s921_readreg(state, 0x32);
3309a0bf528SMauro Carvalho Chehab 	dprintk("status 0x32: %02x\n", rc);
3319a0bf528SMauro Carvalho Chehab 
3329a0bf528SMauro Carvalho Chehab 	dprintk("pll tune band=%d, pll=%d\n", f_switch, (int)f_offset);
3339a0bf528SMauro Carvalho Chehab 
3349a0bf528SMauro Carvalho Chehab 	return 0;
3359a0bf528SMauro Carvalho Chehab }
3369a0bf528SMauro Carvalho Chehab 
3379a0bf528SMauro Carvalho Chehab static int s921_initfe(struct dvb_frontend *fe)
3389a0bf528SMauro Carvalho Chehab {
3399a0bf528SMauro Carvalho Chehab 	struct s921_state *state = fe->demodulator_priv;
3409a0bf528SMauro Carvalho Chehab 	int rc;
3419a0bf528SMauro Carvalho Chehab 
3429a0bf528SMauro Carvalho Chehab 	dprintk("\n");
3439a0bf528SMauro Carvalho Chehab 
3449a0bf528SMauro Carvalho Chehab 	rc = s921_writeregdata(state, s921_init);
3459a0bf528SMauro Carvalho Chehab 	if (rc < 0)
3469a0bf528SMauro Carvalho Chehab 		return rc;
3479a0bf528SMauro Carvalho Chehab 
3489a0bf528SMauro Carvalho Chehab 	return 0;
3499a0bf528SMauro Carvalho Chehab }
3509a0bf528SMauro Carvalho Chehab 
3510df289a2SMauro Carvalho Chehab static int s921_read_status(struct dvb_frontend *fe, enum fe_status *status)
3529a0bf528SMauro Carvalho Chehab {
3539a0bf528SMauro Carvalho Chehab 	struct s921_state *state = fe->demodulator_priv;
3549a0bf528SMauro Carvalho Chehab 	int regstatus, rc;
3559a0bf528SMauro Carvalho Chehab 
3569a0bf528SMauro Carvalho Chehab 	*status = 0;
3579a0bf528SMauro Carvalho Chehab 
3589a0bf528SMauro Carvalho Chehab 	rc = s921_readreg(state, 0x81);
3599a0bf528SMauro Carvalho Chehab 	if (rc < 0)
3609a0bf528SMauro Carvalho Chehab 		return rc;
3619a0bf528SMauro Carvalho Chehab 
3629a0bf528SMauro Carvalho Chehab 	regstatus = rc << 8;
3639a0bf528SMauro Carvalho Chehab 
3649a0bf528SMauro Carvalho Chehab 	rc = s921_readreg(state, 0x82);
3659a0bf528SMauro Carvalho Chehab 	if (rc < 0)
3669a0bf528SMauro Carvalho Chehab 		return rc;
3679a0bf528SMauro Carvalho Chehab 
3689a0bf528SMauro Carvalho Chehab 	regstatus |= rc;
3699a0bf528SMauro Carvalho Chehab 
3709a0bf528SMauro Carvalho Chehab 	dprintk("status = %04x\n", regstatus);
3719a0bf528SMauro Carvalho Chehab 
3729a0bf528SMauro Carvalho Chehab 	/* Full Sync - We don't know what each bit means on regs 0x81/0x82 */
3739a0bf528SMauro Carvalho Chehab 	if ((regstatus & 0xff) == 0x40) {
3749a0bf528SMauro Carvalho Chehab 		*status = FE_HAS_SIGNAL  |
3759a0bf528SMauro Carvalho Chehab 			  FE_HAS_CARRIER |
3769a0bf528SMauro Carvalho Chehab 			  FE_HAS_VITERBI |
3779a0bf528SMauro Carvalho Chehab 			  FE_HAS_SYNC    |
3789a0bf528SMauro Carvalho Chehab 			  FE_HAS_LOCK;
3799a0bf528SMauro Carvalho Chehab 	} else if (regstatus & 0x40) {
3809a0bf528SMauro Carvalho Chehab 		/* This is close to Full Sync, but not enough to get useful info */
3819a0bf528SMauro Carvalho Chehab 		*status = FE_HAS_SIGNAL  |
3829a0bf528SMauro Carvalho Chehab 			  FE_HAS_CARRIER |
3839a0bf528SMauro Carvalho Chehab 			  FE_HAS_VITERBI |
3849a0bf528SMauro Carvalho Chehab 			  FE_HAS_SYNC;
3859a0bf528SMauro Carvalho Chehab 	}
3869a0bf528SMauro Carvalho Chehab 
3879a0bf528SMauro Carvalho Chehab 	return 0;
3889a0bf528SMauro Carvalho Chehab }
3899a0bf528SMauro Carvalho Chehab 
3909a0bf528SMauro Carvalho Chehab static int s921_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
3919a0bf528SMauro Carvalho Chehab {
3920df289a2SMauro Carvalho Chehab 	enum fe_status	status;
3939a0bf528SMauro Carvalho Chehab 	struct s921_state *state = fe->demodulator_priv;
3949a0bf528SMauro Carvalho Chehab 	int rc;
3959a0bf528SMauro Carvalho Chehab 
3969a0bf528SMauro Carvalho Chehab 	/* FIXME: Use the proper register for it... 0x80? */
3979a0bf528SMauro Carvalho Chehab 	rc = s921_read_status(fe, &status);
3989a0bf528SMauro Carvalho Chehab 	if (rc < 0)
3999a0bf528SMauro Carvalho Chehab 		return rc;
4009a0bf528SMauro Carvalho Chehab 
4019a0bf528SMauro Carvalho Chehab 	*strength = (status & FE_HAS_LOCK) ? 0xffff : 0;
4029a0bf528SMauro Carvalho Chehab 
4039a0bf528SMauro Carvalho Chehab 	dprintk("strength = 0x%04x\n", *strength);
4049a0bf528SMauro Carvalho Chehab 
4059a0bf528SMauro Carvalho Chehab 	rc = s921_readreg(state, 0x01);
4069a0bf528SMauro Carvalho Chehab 	dprintk("status 0x01: %02x\n", rc);
4079a0bf528SMauro Carvalho Chehab 
4089a0bf528SMauro Carvalho Chehab 	rc = s921_readreg(state, 0x80);
4099a0bf528SMauro Carvalho Chehab 	dprintk("status 0x80: %02x\n", rc);
4109a0bf528SMauro Carvalho Chehab 
4119a0bf528SMauro Carvalho Chehab 	rc = s921_readreg(state, 0x32);
4129a0bf528SMauro Carvalho Chehab 	dprintk("status 0x32: %02x\n", rc);
4139a0bf528SMauro Carvalho Chehab 
4149a0bf528SMauro Carvalho Chehab 	return 0;
4159a0bf528SMauro Carvalho Chehab }
4169a0bf528SMauro Carvalho Chehab 
4179a0bf528SMauro Carvalho Chehab static int s921_set_frontend(struct dvb_frontend *fe)
4189a0bf528SMauro Carvalho Chehab {
4199a0bf528SMauro Carvalho Chehab 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
4209a0bf528SMauro Carvalho Chehab 	struct s921_state *state = fe->demodulator_priv;
4219a0bf528SMauro Carvalho Chehab 	int rc;
4229a0bf528SMauro Carvalho Chehab 
4239a0bf528SMauro Carvalho Chehab 	dprintk("\n");
4249a0bf528SMauro Carvalho Chehab 
4259a0bf528SMauro Carvalho Chehab 	/* FIXME: We don't know how to use non-auto mode */
4269a0bf528SMauro Carvalho Chehab 
4279a0bf528SMauro Carvalho Chehab 	rc = s921_pll_tune(fe);
4289a0bf528SMauro Carvalho Chehab 	if (rc < 0)
4299a0bf528SMauro Carvalho Chehab 		return rc;
4309a0bf528SMauro Carvalho Chehab 
4319a0bf528SMauro Carvalho Chehab 	state->currentfreq = p->frequency;
4329a0bf528SMauro Carvalho Chehab 
4339a0bf528SMauro Carvalho Chehab 	return 0;
4349a0bf528SMauro Carvalho Chehab }
4359a0bf528SMauro Carvalho Chehab 
4367e3e68bcSMauro Carvalho Chehab static int s921_get_frontend(struct dvb_frontend *fe,
4377e3e68bcSMauro Carvalho Chehab 			     struct dtv_frontend_properties *p)
4389a0bf528SMauro Carvalho Chehab {
4399a0bf528SMauro Carvalho Chehab 	struct s921_state *state = fe->demodulator_priv;
4409a0bf528SMauro Carvalho Chehab 
4419a0bf528SMauro Carvalho Chehab 	/* FIXME: Probably it is possible to get it from regs f1 and f2 */
4429a0bf528SMauro Carvalho Chehab 	p->frequency = state->currentfreq;
4439a0bf528SMauro Carvalho Chehab 	p->delivery_system = SYS_ISDBT;
4449a0bf528SMauro Carvalho Chehab 
4459a0bf528SMauro Carvalho Chehab 	return 0;
4469a0bf528SMauro Carvalho Chehab }
4479a0bf528SMauro Carvalho Chehab 
4489a0bf528SMauro Carvalho Chehab static int s921_tune(struct dvb_frontend *fe,
4499a0bf528SMauro Carvalho Chehab 			bool re_tune,
4509a0bf528SMauro Carvalho Chehab 			unsigned int mode_flags,
4519a0bf528SMauro Carvalho Chehab 			unsigned int *delay,
4520df289a2SMauro Carvalho Chehab 			enum fe_status *status)
4539a0bf528SMauro Carvalho Chehab {
4549a0bf528SMauro Carvalho Chehab 	int rc = 0;
4559a0bf528SMauro Carvalho Chehab 
4569a0bf528SMauro Carvalho Chehab 	dprintk("\n");
4579a0bf528SMauro Carvalho Chehab 
4589a0bf528SMauro Carvalho Chehab 	if (re_tune)
4599a0bf528SMauro Carvalho Chehab 		rc = s921_set_frontend(fe);
4609a0bf528SMauro Carvalho Chehab 
4619a0bf528SMauro Carvalho Chehab 	if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
4629a0bf528SMauro Carvalho Chehab 		s921_read_status(fe, status);
4639a0bf528SMauro Carvalho Chehab 
4649a0bf528SMauro Carvalho Chehab 	return rc;
4659a0bf528SMauro Carvalho Chehab }
4669a0bf528SMauro Carvalho Chehab 
4679a0bf528SMauro Carvalho Chehab static int s921_get_algo(struct dvb_frontend *fe)
4689a0bf528SMauro Carvalho Chehab {
46927460adcSMauro Carvalho Chehab 	return DVBFE_ALGO_HW;
4709a0bf528SMauro Carvalho Chehab }
4719a0bf528SMauro Carvalho Chehab 
4729a0bf528SMauro Carvalho Chehab static void s921_release(struct dvb_frontend *fe)
4739a0bf528SMauro Carvalho Chehab {
4749a0bf528SMauro Carvalho Chehab 	struct s921_state *state = fe->demodulator_priv;
4759a0bf528SMauro Carvalho Chehab 
4769a0bf528SMauro Carvalho Chehab 	dprintk("\n");
4779a0bf528SMauro Carvalho Chehab 	kfree(state);
4789a0bf528SMauro Carvalho Chehab }
4799a0bf528SMauro Carvalho Chehab 
480bd336e63SMax Kellermann static const struct dvb_frontend_ops s921_ops;
4819a0bf528SMauro Carvalho Chehab 
4829a0bf528SMauro Carvalho Chehab struct dvb_frontend *s921_attach(const struct s921_config *config,
4839a0bf528SMauro Carvalho Chehab 				    struct i2c_adapter *i2c)
4849a0bf528SMauro Carvalho Chehab {
4859a0bf528SMauro Carvalho Chehab 	/* allocate memory for the internal state */
4869a0bf528SMauro Carvalho Chehab 	struct s921_state *state =
4879a0bf528SMauro Carvalho Chehab 		kzalloc(sizeof(struct s921_state), GFP_KERNEL);
4889a0bf528SMauro Carvalho Chehab 
4899a0bf528SMauro Carvalho Chehab 	dprintk("\n");
4904a0543eeSPeter Senna Tschudin 	if (!state) {
4919a0bf528SMauro Carvalho Chehab 		rc("Unable to kzalloc\n");
4924a0543eeSPeter Senna Tschudin 		return NULL;
4939a0bf528SMauro Carvalho Chehab 	}
4949a0bf528SMauro Carvalho Chehab 
4959a0bf528SMauro Carvalho Chehab 	/* setup the state */
4969a0bf528SMauro Carvalho Chehab 	state->config = config;
4979a0bf528SMauro Carvalho Chehab 	state->i2c = i2c;
4989a0bf528SMauro Carvalho Chehab 
4999a0bf528SMauro Carvalho Chehab 	/* create dvb_frontend */
5009a0bf528SMauro Carvalho Chehab 	memcpy(&state->frontend.ops, &s921_ops,
5019a0bf528SMauro Carvalho Chehab 		sizeof(struct dvb_frontend_ops));
5029a0bf528SMauro Carvalho Chehab 	state->frontend.demodulator_priv = state;
5039a0bf528SMauro Carvalho Chehab 
5049a0bf528SMauro Carvalho Chehab 	return &state->frontend;
5059a0bf528SMauro Carvalho Chehab }
5069a0bf528SMauro Carvalho Chehab EXPORT_SYMBOL(s921_attach);
5079a0bf528SMauro Carvalho Chehab 
508bd336e63SMax Kellermann static const struct dvb_frontend_ops s921_ops = {
5099a0bf528SMauro Carvalho Chehab 	.delsys = { SYS_ISDBT },
5109a0bf528SMauro Carvalho Chehab 	/* Use dib8000 values per default */
5119a0bf528SMauro Carvalho Chehab 	.info = {
5129a0bf528SMauro Carvalho Chehab 		.name = "Sharp S921",
5139a0bf528SMauro Carvalho Chehab 		.frequency_min = 470000000,
5149a0bf528SMauro Carvalho Chehab 		/*
5159a0bf528SMauro Carvalho Chehab 		 * Max should be 770MHz instead, according with Sharp docs,
5169a0bf528SMauro Carvalho Chehab 		 * but Leadership doc says it works up to 806 MHz. This is
5179a0bf528SMauro Carvalho Chehab 		 * required to get channel 69, used in Brazil
5189a0bf528SMauro Carvalho Chehab 		 */
5199a0bf528SMauro Carvalho Chehab 		.frequency_max = 806000000,
5209a0bf528SMauro Carvalho Chehab 		.frequency_tolerance = 0,
5219a0bf528SMauro Carvalho Chehab 		 .caps = FE_CAN_INVERSION_AUTO |
5229a0bf528SMauro Carvalho Chehab 			 FE_CAN_FEC_1_2  | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
5239a0bf528SMauro Carvalho Chehab 			 FE_CAN_FEC_5_6  | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
5249a0bf528SMauro Carvalho Chehab 			 FE_CAN_QPSK     | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
5259a0bf528SMauro Carvalho Chehab 			 FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO |
5269a0bf528SMauro Carvalho Chehab 			 FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_RECOVER |
5279a0bf528SMauro Carvalho Chehab 			 FE_CAN_HIERARCHY_AUTO,
5289a0bf528SMauro Carvalho Chehab 	},
5299a0bf528SMauro Carvalho Chehab 
5309a0bf528SMauro Carvalho Chehab 	.release = s921_release,
5319a0bf528SMauro Carvalho Chehab 
5329a0bf528SMauro Carvalho Chehab 	.init = s921_initfe,
5339a0bf528SMauro Carvalho Chehab 	.set_frontend = s921_set_frontend,
5349a0bf528SMauro Carvalho Chehab 	.get_frontend = s921_get_frontend,
5359a0bf528SMauro Carvalho Chehab 	.read_status = s921_read_status,
5369a0bf528SMauro Carvalho Chehab 	.read_signal_strength = s921_read_signal_strength,
5379a0bf528SMauro Carvalho Chehab 	.tune = s921_tune,
5389a0bf528SMauro Carvalho Chehab 	.get_frontend_algo = s921_get_algo,
5399a0bf528SMauro Carvalho Chehab };
5409a0bf528SMauro Carvalho Chehab 
5419a0bf528SMauro Carvalho Chehab MODULE_DESCRIPTION("DVB Frontend module for Sharp S921 hardware");
54237e59f87SMauro Carvalho Chehab MODULE_AUTHOR("Mauro Carvalho Chehab");
5439a0bf528SMauro Carvalho Chehab MODULE_AUTHOR("Douglas Landgraf <dougsland@redhat.com>");
5449a0bf528SMauro Carvalho Chehab MODULE_LICENSE("GPL");
545