150acfb2bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
29a0bf528SMauro Carvalho Chehab /*
39a0bf528SMauro Carvalho Chehab * Sharp VA3A5JZ921 One Seg Broadcast Module driver
49a0bf528SMauro Carvalho Chehab * This device is labeled as just S. 921 at the top of the frontend can
59a0bf528SMauro Carvalho Chehab *
637e59f87SMauro Carvalho Chehab * Copyright (C) 2009-2010 Mauro Carvalho Chehab
79a0bf528SMauro Carvalho Chehab * Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
89a0bf528SMauro Carvalho Chehab *
99a0bf528SMauro Carvalho Chehab * Developed for Leadership SBTVD 1seg device sold in Brazil
109a0bf528SMauro Carvalho Chehab *
119a0bf528SMauro Carvalho Chehab * Frontend module based on cx24123 driver, getting some info from
129a0bf528SMauro Carvalho Chehab * the old s921 driver.
139a0bf528SMauro Carvalho Chehab *
149a0bf528SMauro Carvalho Chehab * FIXME: Need to port to DVB v5.2 API
159a0bf528SMauro Carvalho Chehab */
169a0bf528SMauro Carvalho Chehab
179a0bf528SMauro Carvalho Chehab #include <linux/kernel.h>
189a0bf528SMauro Carvalho Chehab #include <asm/div64.h>
199a0bf528SMauro Carvalho Chehab
20fada1935SMauro Carvalho Chehab #include <media/dvb_frontend.h>
219a0bf528SMauro Carvalho Chehab #include "s921.h"
229a0bf528SMauro Carvalho Chehab
239a0bf528SMauro Carvalho Chehab static int debug = 1;
249a0bf528SMauro Carvalho Chehab module_param(debug, int, 0644);
259a0bf528SMauro Carvalho Chehab MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
269a0bf528SMauro Carvalho Chehab
279a0bf528SMauro Carvalho Chehab #define rc(args...) do { \
289a0bf528SMauro Carvalho Chehab printk(KERN_ERR "s921: " args); \
299a0bf528SMauro Carvalho Chehab } while (0)
309a0bf528SMauro Carvalho Chehab
319a0bf528SMauro Carvalho Chehab #define dprintk(args...) \
329a0bf528SMauro Carvalho Chehab do { \
339a0bf528SMauro Carvalho Chehab if (debug) { \
349a0bf528SMauro Carvalho Chehab printk(KERN_DEBUG "s921: %s: ", __func__); \
359a0bf528SMauro Carvalho Chehab printk(args); \
369a0bf528SMauro Carvalho Chehab } \
379a0bf528SMauro Carvalho Chehab } while (0)
389a0bf528SMauro Carvalho Chehab
399a0bf528SMauro Carvalho Chehab struct s921_state {
409a0bf528SMauro Carvalho Chehab struct i2c_adapter *i2c;
419a0bf528SMauro Carvalho Chehab const struct s921_config *config;
429a0bf528SMauro Carvalho Chehab
439a0bf528SMauro Carvalho Chehab struct dvb_frontend frontend;
449a0bf528SMauro Carvalho Chehab
459a0bf528SMauro Carvalho Chehab /* The Demod can't easily provide these, we cache them */
469a0bf528SMauro Carvalho Chehab u32 currentfreq;
479a0bf528SMauro Carvalho Chehab };
489a0bf528SMauro Carvalho Chehab
499a0bf528SMauro Carvalho Chehab /*
509a0bf528SMauro Carvalho Chehab * Various tuner defaults need to be established for a given frequency kHz.
519a0bf528SMauro Carvalho Chehab * fixme: The bounds on the bands do not match the doc in real life.
529a0bf528SMauro Carvalho Chehab * fixme: Some of them have been moved, other might need adjustment.
539a0bf528SMauro Carvalho Chehab */
549a0bf528SMauro Carvalho Chehab static struct s921_bandselect_val {
559a0bf528SMauro Carvalho Chehab u32 freq_low;
569a0bf528SMauro Carvalho Chehab u8 band_reg;
579a0bf528SMauro Carvalho Chehab } s921_bandselect[] = {
589a0bf528SMauro Carvalho Chehab { 0, 0x7b },
599a0bf528SMauro Carvalho Chehab { 485140000, 0x5b },
609a0bf528SMauro Carvalho Chehab { 515140000, 0x3b },
619a0bf528SMauro Carvalho Chehab { 545140000, 0x1b },
629a0bf528SMauro Carvalho Chehab { 599140000, 0xfb },
639a0bf528SMauro Carvalho Chehab { 623140000, 0xdb },
649a0bf528SMauro Carvalho Chehab { 659140000, 0xbb },
659a0bf528SMauro Carvalho Chehab { 713140000, 0x9b },
669a0bf528SMauro Carvalho Chehab };
679a0bf528SMauro Carvalho Chehab
689a0bf528SMauro Carvalho Chehab struct regdata {
699a0bf528SMauro Carvalho Chehab u8 reg;
709a0bf528SMauro Carvalho Chehab u8 data;
719a0bf528SMauro Carvalho Chehab };
729a0bf528SMauro Carvalho Chehab
739a0bf528SMauro Carvalho Chehab static struct regdata s921_init[] = {
749a0bf528SMauro Carvalho Chehab { 0x01, 0x80 }, /* Probably, a reset sequence */
759a0bf528SMauro Carvalho Chehab { 0x01, 0x40 },
769a0bf528SMauro Carvalho Chehab { 0x01, 0x80 },
779a0bf528SMauro Carvalho Chehab { 0x01, 0x40 },
789a0bf528SMauro Carvalho Chehab
799a0bf528SMauro Carvalho Chehab { 0x02, 0x00 },
809a0bf528SMauro Carvalho Chehab { 0x03, 0x40 },
819a0bf528SMauro Carvalho Chehab { 0x04, 0x01 },
829a0bf528SMauro Carvalho Chehab { 0x05, 0x00 },
839a0bf528SMauro Carvalho Chehab { 0x06, 0x00 },
849a0bf528SMauro Carvalho Chehab { 0x07, 0x00 },
859a0bf528SMauro Carvalho Chehab { 0x08, 0x00 },
869a0bf528SMauro Carvalho Chehab { 0x09, 0x00 },
879a0bf528SMauro Carvalho Chehab { 0x0a, 0x00 },
889a0bf528SMauro Carvalho Chehab { 0x0b, 0x5a },
899a0bf528SMauro Carvalho Chehab { 0x0c, 0x00 },
909a0bf528SMauro Carvalho Chehab { 0x0d, 0x00 },
919a0bf528SMauro Carvalho Chehab { 0x0f, 0x00 },
929a0bf528SMauro Carvalho Chehab { 0x13, 0x1b },
939a0bf528SMauro Carvalho Chehab { 0x14, 0x80 },
949a0bf528SMauro Carvalho Chehab { 0x15, 0x40 },
959a0bf528SMauro Carvalho Chehab { 0x17, 0x70 },
969a0bf528SMauro Carvalho Chehab { 0x18, 0x01 },
979a0bf528SMauro Carvalho Chehab { 0x19, 0x12 },
989a0bf528SMauro Carvalho Chehab { 0x1a, 0x01 },
999a0bf528SMauro Carvalho Chehab { 0x1b, 0x12 },
1009a0bf528SMauro Carvalho Chehab { 0x1c, 0xa0 },
1019a0bf528SMauro Carvalho Chehab { 0x1d, 0x00 },
1029a0bf528SMauro Carvalho Chehab { 0x1e, 0x0a },
1039a0bf528SMauro Carvalho Chehab { 0x1f, 0x08 },
1049a0bf528SMauro Carvalho Chehab { 0x20, 0x40 },
1059a0bf528SMauro Carvalho Chehab { 0x21, 0xff },
1069a0bf528SMauro Carvalho Chehab { 0x22, 0x4c },
1079a0bf528SMauro Carvalho Chehab { 0x23, 0x4e },
1089a0bf528SMauro Carvalho Chehab { 0x24, 0x4c },
1099a0bf528SMauro Carvalho Chehab { 0x25, 0x00 },
1109a0bf528SMauro Carvalho Chehab { 0x26, 0x00 },
1119a0bf528SMauro Carvalho Chehab { 0x27, 0xf4 },
1129a0bf528SMauro Carvalho Chehab { 0x28, 0x60 },
1139a0bf528SMauro Carvalho Chehab { 0x29, 0x88 },
1149a0bf528SMauro Carvalho Chehab { 0x2a, 0x40 },
1159a0bf528SMauro Carvalho Chehab { 0x2b, 0x40 },
1169a0bf528SMauro Carvalho Chehab { 0x2c, 0xff },
1179a0bf528SMauro Carvalho Chehab { 0x2d, 0x00 },
1189a0bf528SMauro Carvalho Chehab { 0x2e, 0xff },
1199a0bf528SMauro Carvalho Chehab { 0x2f, 0x00 },
1209a0bf528SMauro Carvalho Chehab { 0x30, 0x20 },
1219a0bf528SMauro Carvalho Chehab { 0x31, 0x06 },
1229a0bf528SMauro Carvalho Chehab { 0x32, 0x0c },
1239a0bf528SMauro Carvalho Chehab { 0x34, 0x0f },
1249a0bf528SMauro Carvalho Chehab { 0x37, 0xfe },
1259a0bf528SMauro Carvalho Chehab { 0x38, 0x00 },
1269a0bf528SMauro Carvalho Chehab { 0x39, 0x63 },
1279a0bf528SMauro Carvalho Chehab { 0x3a, 0x10 },
1289a0bf528SMauro Carvalho Chehab { 0x3b, 0x10 },
1299a0bf528SMauro Carvalho Chehab { 0x47, 0x00 },
1309a0bf528SMauro Carvalho Chehab { 0x49, 0xe5 },
1319a0bf528SMauro Carvalho Chehab { 0x4b, 0x00 },
1329a0bf528SMauro Carvalho Chehab { 0x50, 0xc0 },
1339a0bf528SMauro Carvalho Chehab { 0x52, 0x20 },
1349a0bf528SMauro Carvalho Chehab { 0x54, 0x5a },
1359a0bf528SMauro Carvalho Chehab { 0x55, 0x5b },
1369a0bf528SMauro Carvalho Chehab { 0x56, 0x40 },
1379a0bf528SMauro Carvalho Chehab { 0x57, 0x70 },
1389a0bf528SMauro Carvalho Chehab { 0x5c, 0x50 },
1399a0bf528SMauro Carvalho Chehab { 0x5d, 0x00 },
1409a0bf528SMauro Carvalho Chehab { 0x62, 0x17 },
1419a0bf528SMauro Carvalho Chehab { 0x63, 0x2f },
1429a0bf528SMauro Carvalho Chehab { 0x64, 0x6f },
1439a0bf528SMauro Carvalho Chehab { 0x68, 0x00 },
1449a0bf528SMauro Carvalho Chehab { 0x69, 0x89 },
1459a0bf528SMauro Carvalho Chehab { 0x6a, 0x00 },
1469a0bf528SMauro Carvalho Chehab { 0x6b, 0x00 },
1479a0bf528SMauro Carvalho Chehab { 0x6c, 0x00 },
1489a0bf528SMauro Carvalho Chehab { 0x6d, 0x00 },
1499a0bf528SMauro Carvalho Chehab { 0x6e, 0x00 },
1509a0bf528SMauro Carvalho Chehab { 0x70, 0x10 },
1519a0bf528SMauro Carvalho Chehab { 0x71, 0x00 },
1529a0bf528SMauro Carvalho Chehab { 0x75, 0x00 },
1539a0bf528SMauro Carvalho Chehab { 0x76, 0x30 },
1549a0bf528SMauro Carvalho Chehab { 0x77, 0x01 },
1559a0bf528SMauro Carvalho Chehab { 0xaf, 0x00 },
1569a0bf528SMauro Carvalho Chehab { 0xb0, 0xa0 },
1579a0bf528SMauro Carvalho Chehab { 0xb2, 0x3d },
1589a0bf528SMauro Carvalho Chehab { 0xb3, 0x25 },
1599a0bf528SMauro Carvalho Chehab { 0xb4, 0x8b },
1609a0bf528SMauro Carvalho Chehab { 0xb5, 0x4b },
1619a0bf528SMauro Carvalho Chehab { 0xb6, 0x3f },
1629a0bf528SMauro Carvalho Chehab { 0xb7, 0xff },
1639a0bf528SMauro Carvalho Chehab { 0xb8, 0xff },
1649a0bf528SMauro Carvalho Chehab { 0xb9, 0xfc },
1659a0bf528SMauro Carvalho Chehab { 0xba, 0x00 },
1669a0bf528SMauro Carvalho Chehab { 0xbb, 0x00 },
1679a0bf528SMauro Carvalho Chehab { 0xbc, 0x00 },
1689a0bf528SMauro Carvalho Chehab { 0xd0, 0x30 },
1699a0bf528SMauro Carvalho Chehab { 0xe4, 0x84 },
1709a0bf528SMauro Carvalho Chehab { 0xf0, 0x48 },
1719a0bf528SMauro Carvalho Chehab { 0xf1, 0x19 },
1729a0bf528SMauro Carvalho Chehab { 0xf2, 0x5a },
1739a0bf528SMauro Carvalho Chehab { 0xf3, 0x8e },
1749a0bf528SMauro Carvalho Chehab { 0xf4, 0x2d },
1759a0bf528SMauro Carvalho Chehab { 0xf5, 0x07 },
1769a0bf528SMauro Carvalho Chehab { 0xf6, 0x5a },
1779a0bf528SMauro Carvalho Chehab { 0xf7, 0xba },
1789a0bf528SMauro Carvalho Chehab { 0xf8, 0xd7 },
1799a0bf528SMauro Carvalho Chehab };
1809a0bf528SMauro Carvalho Chehab
1819a0bf528SMauro Carvalho Chehab static struct regdata s921_prefreq[] = {
1829a0bf528SMauro Carvalho Chehab { 0x47, 0x60 },
1839a0bf528SMauro Carvalho Chehab { 0x68, 0x00 },
1849a0bf528SMauro Carvalho Chehab { 0x69, 0x89 },
1859a0bf528SMauro Carvalho Chehab { 0xf0, 0x48 },
1869a0bf528SMauro Carvalho Chehab { 0xf1, 0x19 },
1879a0bf528SMauro Carvalho Chehab };
1889a0bf528SMauro Carvalho Chehab
1899a0bf528SMauro Carvalho Chehab static struct regdata s921_postfreq[] = {
1909a0bf528SMauro Carvalho Chehab { 0xf5, 0xae },
1919a0bf528SMauro Carvalho Chehab { 0xf6, 0xb7 },
1929a0bf528SMauro Carvalho Chehab { 0xf7, 0xba },
1939a0bf528SMauro Carvalho Chehab { 0xf8, 0xd7 },
1949a0bf528SMauro Carvalho Chehab { 0x68, 0x0a },
1959a0bf528SMauro Carvalho Chehab { 0x69, 0x09 },
1969a0bf528SMauro Carvalho Chehab };
1979a0bf528SMauro Carvalho Chehab
s921_i2c_writereg(struct s921_state * state,u8 i2c_addr,int reg,int data)1989a0bf528SMauro Carvalho Chehab static int s921_i2c_writereg(struct s921_state *state,
1999a0bf528SMauro Carvalho Chehab u8 i2c_addr, int reg, int data)
2009a0bf528SMauro Carvalho Chehab {
2019a0bf528SMauro Carvalho Chehab u8 buf[] = { reg, data };
2029a0bf528SMauro Carvalho Chehab struct i2c_msg msg = {
2039a0bf528SMauro Carvalho Chehab .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
2049a0bf528SMauro Carvalho Chehab };
2059a0bf528SMauro Carvalho Chehab int rc;
2069a0bf528SMauro Carvalho Chehab
2079a0bf528SMauro Carvalho Chehab rc = i2c_transfer(state->i2c, &msg, 1);
2089a0bf528SMauro Carvalho Chehab if (rc != 1) {
2094bd69e7bSMauro Carvalho Chehab printk("%s: writereg rcor(rc == %i, reg == 0x%02x, data == 0x%02x)\n",
2104bd69e7bSMauro Carvalho Chehab __func__, rc, reg, data);
2119a0bf528SMauro Carvalho Chehab return rc;
2129a0bf528SMauro Carvalho Chehab }
2139a0bf528SMauro Carvalho Chehab
2149a0bf528SMauro Carvalho Chehab return 0;
2159a0bf528SMauro Carvalho Chehab }
2169a0bf528SMauro Carvalho Chehab
s921_i2c_writeregdata(struct s921_state * state,u8 i2c_addr,struct regdata * rd,int size)2179a0bf528SMauro Carvalho Chehab static int s921_i2c_writeregdata(struct s921_state *state, u8 i2c_addr,
2189a0bf528SMauro Carvalho Chehab struct regdata *rd, int size)
2199a0bf528SMauro Carvalho Chehab {
2209a0bf528SMauro Carvalho Chehab int i, rc;
2219a0bf528SMauro Carvalho Chehab
2229a0bf528SMauro Carvalho Chehab for (i = 0; i < size; i++) {
2239a0bf528SMauro Carvalho Chehab rc = s921_i2c_writereg(state, i2c_addr, rd[i].reg, rd[i].data);
2249a0bf528SMauro Carvalho Chehab if (rc < 0)
2259a0bf528SMauro Carvalho Chehab return rc;
2269a0bf528SMauro Carvalho Chehab }
2279a0bf528SMauro Carvalho Chehab return 0;
2289a0bf528SMauro Carvalho Chehab }
2299a0bf528SMauro Carvalho Chehab
s921_i2c_readreg(struct s921_state * state,u8 i2c_addr,u8 reg)2309a0bf528SMauro Carvalho Chehab static int s921_i2c_readreg(struct s921_state *state, u8 i2c_addr, u8 reg)
2319a0bf528SMauro Carvalho Chehab {
2329a0bf528SMauro Carvalho Chehab u8 val;
2339a0bf528SMauro Carvalho Chehab int rc;
2349a0bf528SMauro Carvalho Chehab struct i2c_msg msg[] = {
2359a0bf528SMauro Carvalho Chehab { .addr = i2c_addr, .flags = 0, .buf = ®, .len = 1 },
2369a0bf528SMauro Carvalho Chehab { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
2379a0bf528SMauro Carvalho Chehab };
2389a0bf528SMauro Carvalho Chehab
2399a0bf528SMauro Carvalho Chehab rc = i2c_transfer(state->i2c, msg, 2);
2409a0bf528SMauro Carvalho Chehab
2419a0bf528SMauro Carvalho Chehab if (rc != 2) {
2429a0bf528SMauro Carvalho Chehab rc("%s: reg=0x%x (rcor=%d)\n", __func__, reg, rc);
2439a0bf528SMauro Carvalho Chehab return rc;
2449a0bf528SMauro Carvalho Chehab }
2459a0bf528SMauro Carvalho Chehab
2469a0bf528SMauro Carvalho Chehab return val;
2479a0bf528SMauro Carvalho Chehab }
2489a0bf528SMauro Carvalho Chehab
2499a0bf528SMauro Carvalho Chehab #define s921_readreg(state, reg) \
2509a0bf528SMauro Carvalho Chehab s921_i2c_readreg(state, state->config->demod_address, reg)
2519a0bf528SMauro Carvalho Chehab #define s921_writereg(state, reg, val) \
2529a0bf528SMauro Carvalho Chehab s921_i2c_writereg(state, state->config->demod_address, reg, val)
2539a0bf528SMauro Carvalho Chehab #define s921_writeregdata(state, regdata) \
2549a0bf528SMauro Carvalho Chehab s921_i2c_writeregdata(state, state->config->demod_address, \
2559a0bf528SMauro Carvalho Chehab regdata, ARRAY_SIZE(regdata))
2569a0bf528SMauro Carvalho Chehab
s921_pll_tune(struct dvb_frontend * fe)2579a0bf528SMauro Carvalho Chehab static int s921_pll_tune(struct dvb_frontend *fe)
2589a0bf528SMauro Carvalho Chehab {
2599a0bf528SMauro Carvalho Chehab struct dtv_frontend_properties *p = &fe->dtv_property_cache;
2609a0bf528SMauro Carvalho Chehab struct s921_state *state = fe->demodulator_priv;
2619a0bf528SMauro Carvalho Chehab int band, rc, i;
2629a0bf528SMauro Carvalho Chehab unsigned long f_offset;
2639a0bf528SMauro Carvalho Chehab u8 f_switch;
2649a0bf528SMauro Carvalho Chehab u64 offset;
2659a0bf528SMauro Carvalho Chehab
2669a0bf528SMauro Carvalho Chehab dprintk("frequency=%i\n", p->frequency);
2679a0bf528SMauro Carvalho Chehab
2689a0bf528SMauro Carvalho Chehab for (band = 0; band < ARRAY_SIZE(s921_bandselect); band++)
2699a0bf528SMauro Carvalho Chehab if (p->frequency < s921_bandselect[band].freq_low)
2709a0bf528SMauro Carvalho Chehab break;
2719a0bf528SMauro Carvalho Chehab band--;
2729a0bf528SMauro Carvalho Chehab
2739a0bf528SMauro Carvalho Chehab if (band < 0) {
2749a0bf528SMauro Carvalho Chehab rc("%s: frequency out of range\n", __func__);
2759a0bf528SMauro Carvalho Chehab return -EINVAL;
2769a0bf528SMauro Carvalho Chehab }
2779a0bf528SMauro Carvalho Chehab
2789a0bf528SMauro Carvalho Chehab f_switch = s921_bandselect[band].band_reg;
2799a0bf528SMauro Carvalho Chehab
2809a0bf528SMauro Carvalho Chehab offset = ((u64)p->frequency) * 258;
2819a0bf528SMauro Carvalho Chehab do_div(offset, 6000000);
2829a0bf528SMauro Carvalho Chehab f_offset = ((unsigned long)offset) + 2321;
2839a0bf528SMauro Carvalho Chehab
2849a0bf528SMauro Carvalho Chehab rc = s921_writeregdata(state, s921_prefreq);
2859a0bf528SMauro Carvalho Chehab if (rc < 0)
2869a0bf528SMauro Carvalho Chehab return rc;
2879a0bf528SMauro Carvalho Chehab
2889a0bf528SMauro Carvalho Chehab rc = s921_writereg(state, 0xf2, (f_offset >> 8) & 0xff);
2899a0bf528SMauro Carvalho Chehab if (rc < 0)
2909a0bf528SMauro Carvalho Chehab return rc;
2919a0bf528SMauro Carvalho Chehab
2929a0bf528SMauro Carvalho Chehab rc = s921_writereg(state, 0xf3, f_offset & 0xff);
2939a0bf528SMauro Carvalho Chehab if (rc < 0)
2949a0bf528SMauro Carvalho Chehab return rc;
2959a0bf528SMauro Carvalho Chehab
2969a0bf528SMauro Carvalho Chehab rc = s921_writereg(state, 0xf4, f_switch);
2979a0bf528SMauro Carvalho Chehab if (rc < 0)
2989a0bf528SMauro Carvalho Chehab return rc;
2999a0bf528SMauro Carvalho Chehab
3009a0bf528SMauro Carvalho Chehab rc = s921_writeregdata(state, s921_postfreq);
3019a0bf528SMauro Carvalho Chehab if (rc < 0)
3029a0bf528SMauro Carvalho Chehab return rc;
3039a0bf528SMauro Carvalho Chehab
3049a0bf528SMauro Carvalho Chehab for (i = 0 ; i < 6; i++) {
3059a0bf528SMauro Carvalho Chehab rc = s921_readreg(state, 0x80);
3069a0bf528SMauro Carvalho Chehab dprintk("status 0x80: %02x\n", rc);
3079a0bf528SMauro Carvalho Chehab }
3089a0bf528SMauro Carvalho Chehab rc = s921_writereg(state, 0x01, 0x40);
3099a0bf528SMauro Carvalho Chehab if (rc < 0)
3109a0bf528SMauro Carvalho Chehab return rc;
3119a0bf528SMauro Carvalho Chehab
3129a0bf528SMauro Carvalho Chehab rc = s921_readreg(state, 0x01);
3139a0bf528SMauro Carvalho Chehab dprintk("status 0x01: %02x\n", rc);
3149a0bf528SMauro Carvalho Chehab
3159a0bf528SMauro Carvalho Chehab rc = s921_readreg(state, 0x80);
3169a0bf528SMauro Carvalho Chehab dprintk("status 0x80: %02x\n", rc);
3179a0bf528SMauro Carvalho Chehab
3189a0bf528SMauro Carvalho Chehab rc = s921_readreg(state, 0x80);
3199a0bf528SMauro Carvalho Chehab dprintk("status 0x80: %02x\n", rc);
3209a0bf528SMauro Carvalho Chehab
3219a0bf528SMauro Carvalho Chehab rc = s921_readreg(state, 0x32);
3229a0bf528SMauro Carvalho Chehab dprintk("status 0x32: %02x\n", rc);
3239a0bf528SMauro Carvalho Chehab
3249a0bf528SMauro Carvalho Chehab dprintk("pll tune band=%d, pll=%d\n", f_switch, (int)f_offset);
3259a0bf528SMauro Carvalho Chehab
3269a0bf528SMauro Carvalho Chehab return 0;
3279a0bf528SMauro Carvalho Chehab }
3289a0bf528SMauro Carvalho Chehab
s921_initfe(struct dvb_frontend * fe)3299a0bf528SMauro Carvalho Chehab static int s921_initfe(struct dvb_frontend *fe)
3309a0bf528SMauro Carvalho Chehab {
3319a0bf528SMauro Carvalho Chehab struct s921_state *state = fe->demodulator_priv;
3329a0bf528SMauro Carvalho Chehab int rc;
3339a0bf528SMauro Carvalho Chehab
3349a0bf528SMauro Carvalho Chehab dprintk("\n");
3359a0bf528SMauro Carvalho Chehab
3369a0bf528SMauro Carvalho Chehab rc = s921_writeregdata(state, s921_init);
3379a0bf528SMauro Carvalho Chehab if (rc < 0)
3389a0bf528SMauro Carvalho Chehab return rc;
3399a0bf528SMauro Carvalho Chehab
3409a0bf528SMauro Carvalho Chehab return 0;
3419a0bf528SMauro Carvalho Chehab }
3429a0bf528SMauro Carvalho Chehab
s921_read_status(struct dvb_frontend * fe,enum fe_status * status)3430df289a2SMauro Carvalho Chehab static int s921_read_status(struct dvb_frontend *fe, enum fe_status *status)
3449a0bf528SMauro Carvalho Chehab {
3459a0bf528SMauro Carvalho Chehab struct s921_state *state = fe->demodulator_priv;
3469a0bf528SMauro Carvalho Chehab int regstatus, rc;
3479a0bf528SMauro Carvalho Chehab
3489a0bf528SMauro Carvalho Chehab *status = 0;
3499a0bf528SMauro Carvalho Chehab
3509a0bf528SMauro Carvalho Chehab rc = s921_readreg(state, 0x81);
3519a0bf528SMauro Carvalho Chehab if (rc < 0)
3529a0bf528SMauro Carvalho Chehab return rc;
3539a0bf528SMauro Carvalho Chehab
3549a0bf528SMauro Carvalho Chehab regstatus = rc << 8;
3559a0bf528SMauro Carvalho Chehab
3569a0bf528SMauro Carvalho Chehab rc = s921_readreg(state, 0x82);
3579a0bf528SMauro Carvalho Chehab if (rc < 0)
3589a0bf528SMauro Carvalho Chehab return rc;
3599a0bf528SMauro Carvalho Chehab
3609a0bf528SMauro Carvalho Chehab regstatus |= rc;
3619a0bf528SMauro Carvalho Chehab
3629a0bf528SMauro Carvalho Chehab dprintk("status = %04x\n", regstatus);
3639a0bf528SMauro Carvalho Chehab
3649a0bf528SMauro Carvalho Chehab /* Full Sync - We don't know what each bit means on regs 0x81/0x82 */
3659a0bf528SMauro Carvalho Chehab if ((regstatus & 0xff) == 0x40) {
3669a0bf528SMauro Carvalho Chehab *status = FE_HAS_SIGNAL |
3679a0bf528SMauro Carvalho Chehab FE_HAS_CARRIER |
3689a0bf528SMauro Carvalho Chehab FE_HAS_VITERBI |
3699a0bf528SMauro Carvalho Chehab FE_HAS_SYNC |
3709a0bf528SMauro Carvalho Chehab FE_HAS_LOCK;
3719a0bf528SMauro Carvalho Chehab } else if (regstatus & 0x40) {
3729a0bf528SMauro Carvalho Chehab /* This is close to Full Sync, but not enough to get useful info */
3739a0bf528SMauro Carvalho Chehab *status = FE_HAS_SIGNAL |
3749a0bf528SMauro Carvalho Chehab FE_HAS_CARRIER |
3759a0bf528SMauro Carvalho Chehab FE_HAS_VITERBI |
3769a0bf528SMauro Carvalho Chehab FE_HAS_SYNC;
3779a0bf528SMauro Carvalho Chehab }
3789a0bf528SMauro Carvalho Chehab
3799a0bf528SMauro Carvalho Chehab return 0;
3809a0bf528SMauro Carvalho Chehab }
3819a0bf528SMauro Carvalho Chehab
s921_read_signal_strength(struct dvb_frontend * fe,u16 * strength)3829a0bf528SMauro Carvalho Chehab static int s921_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
3839a0bf528SMauro Carvalho Chehab {
3840df289a2SMauro Carvalho Chehab enum fe_status status;
3859a0bf528SMauro Carvalho Chehab struct s921_state *state = fe->demodulator_priv;
3869a0bf528SMauro Carvalho Chehab int rc;
3879a0bf528SMauro Carvalho Chehab
3889a0bf528SMauro Carvalho Chehab /* FIXME: Use the proper register for it... 0x80? */
3899a0bf528SMauro Carvalho Chehab rc = s921_read_status(fe, &status);
3909a0bf528SMauro Carvalho Chehab if (rc < 0)
3919a0bf528SMauro Carvalho Chehab return rc;
3929a0bf528SMauro Carvalho Chehab
3939a0bf528SMauro Carvalho Chehab *strength = (status & FE_HAS_LOCK) ? 0xffff : 0;
3949a0bf528SMauro Carvalho Chehab
3959a0bf528SMauro Carvalho Chehab dprintk("strength = 0x%04x\n", *strength);
3969a0bf528SMauro Carvalho Chehab
3979a0bf528SMauro Carvalho Chehab rc = s921_readreg(state, 0x01);
3989a0bf528SMauro Carvalho Chehab dprintk("status 0x01: %02x\n", rc);
3999a0bf528SMauro Carvalho Chehab
4009a0bf528SMauro Carvalho Chehab rc = s921_readreg(state, 0x80);
4019a0bf528SMauro Carvalho Chehab dprintk("status 0x80: %02x\n", rc);
4029a0bf528SMauro Carvalho Chehab
4039a0bf528SMauro Carvalho Chehab rc = s921_readreg(state, 0x32);
4049a0bf528SMauro Carvalho Chehab dprintk("status 0x32: %02x\n", rc);
4059a0bf528SMauro Carvalho Chehab
4069a0bf528SMauro Carvalho Chehab return 0;
4079a0bf528SMauro Carvalho Chehab }
4089a0bf528SMauro Carvalho Chehab
s921_set_frontend(struct dvb_frontend * fe)4099a0bf528SMauro Carvalho Chehab static int s921_set_frontend(struct dvb_frontend *fe)
4109a0bf528SMauro Carvalho Chehab {
4119a0bf528SMauro Carvalho Chehab struct dtv_frontend_properties *p = &fe->dtv_property_cache;
4129a0bf528SMauro Carvalho Chehab struct s921_state *state = fe->demodulator_priv;
4139a0bf528SMauro Carvalho Chehab int rc;
4149a0bf528SMauro Carvalho Chehab
4159a0bf528SMauro Carvalho Chehab dprintk("\n");
4169a0bf528SMauro Carvalho Chehab
4179a0bf528SMauro Carvalho Chehab /* FIXME: We don't know how to use non-auto mode */
4189a0bf528SMauro Carvalho Chehab
4199a0bf528SMauro Carvalho Chehab rc = s921_pll_tune(fe);
4209a0bf528SMauro Carvalho Chehab if (rc < 0)
4219a0bf528SMauro Carvalho Chehab return rc;
4229a0bf528SMauro Carvalho Chehab
4239a0bf528SMauro Carvalho Chehab state->currentfreq = p->frequency;
4249a0bf528SMauro Carvalho Chehab
4259a0bf528SMauro Carvalho Chehab return 0;
4269a0bf528SMauro Carvalho Chehab }
4279a0bf528SMauro Carvalho Chehab
s921_get_frontend(struct dvb_frontend * fe,struct dtv_frontend_properties * p)4287e3e68bcSMauro Carvalho Chehab static int s921_get_frontend(struct dvb_frontend *fe,
4297e3e68bcSMauro Carvalho Chehab struct dtv_frontend_properties *p)
4309a0bf528SMauro Carvalho Chehab {
4319a0bf528SMauro Carvalho Chehab struct s921_state *state = fe->demodulator_priv;
4329a0bf528SMauro Carvalho Chehab
4339a0bf528SMauro Carvalho Chehab /* FIXME: Probably it is possible to get it from regs f1 and f2 */
4349a0bf528SMauro Carvalho Chehab p->frequency = state->currentfreq;
4359a0bf528SMauro Carvalho Chehab p->delivery_system = SYS_ISDBT;
4369a0bf528SMauro Carvalho Chehab
4379a0bf528SMauro Carvalho Chehab return 0;
4389a0bf528SMauro Carvalho Chehab }
4399a0bf528SMauro Carvalho Chehab
s921_tune(struct dvb_frontend * fe,bool re_tune,unsigned int mode_flags,unsigned int * delay,enum fe_status * status)4409a0bf528SMauro Carvalho Chehab static int s921_tune(struct dvb_frontend *fe,
4419a0bf528SMauro Carvalho Chehab bool re_tune,
4429a0bf528SMauro Carvalho Chehab unsigned int mode_flags,
4439a0bf528SMauro Carvalho Chehab unsigned int *delay,
4440df289a2SMauro Carvalho Chehab enum fe_status *status)
4459a0bf528SMauro Carvalho Chehab {
4469a0bf528SMauro Carvalho Chehab int rc = 0;
4479a0bf528SMauro Carvalho Chehab
4489a0bf528SMauro Carvalho Chehab dprintk("\n");
4499a0bf528SMauro Carvalho Chehab
4509a0bf528SMauro Carvalho Chehab if (re_tune)
4519a0bf528SMauro Carvalho Chehab rc = s921_set_frontend(fe);
4529a0bf528SMauro Carvalho Chehab
4539a0bf528SMauro Carvalho Chehab if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
4549a0bf528SMauro Carvalho Chehab s921_read_status(fe, status);
4559a0bf528SMauro Carvalho Chehab
4569a0bf528SMauro Carvalho Chehab return rc;
4579a0bf528SMauro Carvalho Chehab }
4589a0bf528SMauro Carvalho Chehab
s921_get_algo(struct dvb_frontend * fe)4598d718e53SLuc Van Oostenryck static enum dvbfe_algo s921_get_algo(struct dvb_frontend *fe)
4609a0bf528SMauro Carvalho Chehab {
46127460adcSMauro Carvalho Chehab return DVBFE_ALGO_HW;
4629a0bf528SMauro Carvalho Chehab }
4639a0bf528SMauro Carvalho Chehab
s921_release(struct dvb_frontend * fe)4649a0bf528SMauro Carvalho Chehab static void s921_release(struct dvb_frontend *fe)
4659a0bf528SMauro Carvalho Chehab {
4669a0bf528SMauro Carvalho Chehab struct s921_state *state = fe->demodulator_priv;
4679a0bf528SMauro Carvalho Chehab
4689a0bf528SMauro Carvalho Chehab dprintk("\n");
4699a0bf528SMauro Carvalho Chehab kfree(state);
4709a0bf528SMauro Carvalho Chehab }
4719a0bf528SMauro Carvalho Chehab
472bd336e63SMax Kellermann static const struct dvb_frontend_ops s921_ops;
4739a0bf528SMauro Carvalho Chehab
s921_attach(const struct s921_config * config,struct i2c_adapter * i2c)4749a0bf528SMauro Carvalho Chehab struct dvb_frontend *s921_attach(const struct s921_config *config,
4759a0bf528SMauro Carvalho Chehab struct i2c_adapter *i2c)
4769a0bf528SMauro Carvalho Chehab {
4779a0bf528SMauro Carvalho Chehab /* allocate memory for the internal state */
4789a0bf528SMauro Carvalho Chehab struct s921_state *state =
4799a0bf528SMauro Carvalho Chehab kzalloc(sizeof(struct s921_state), GFP_KERNEL);
4809a0bf528SMauro Carvalho Chehab
4819a0bf528SMauro Carvalho Chehab dprintk("\n");
4824a0543eeSPeter Senna Tschudin if (!state) {
4839a0bf528SMauro Carvalho Chehab rc("Unable to kzalloc\n");
4844a0543eeSPeter Senna Tschudin return NULL;
4859a0bf528SMauro Carvalho Chehab }
4869a0bf528SMauro Carvalho Chehab
4879a0bf528SMauro Carvalho Chehab /* setup the state */
4889a0bf528SMauro Carvalho Chehab state->config = config;
4899a0bf528SMauro Carvalho Chehab state->i2c = i2c;
4909a0bf528SMauro Carvalho Chehab
4919a0bf528SMauro Carvalho Chehab /* create dvb_frontend */
4929a0bf528SMauro Carvalho Chehab memcpy(&state->frontend.ops, &s921_ops,
4939a0bf528SMauro Carvalho Chehab sizeof(struct dvb_frontend_ops));
4949a0bf528SMauro Carvalho Chehab state->frontend.demodulator_priv = state;
4959a0bf528SMauro Carvalho Chehab
4969a0bf528SMauro Carvalho Chehab return &state->frontend;
4979a0bf528SMauro Carvalho Chehab }
498*86495af1SGreg Kroah-Hartman EXPORT_SYMBOL_GPL(s921_attach);
4999a0bf528SMauro Carvalho Chehab
500bd336e63SMax Kellermann static const struct dvb_frontend_ops s921_ops = {
5019a0bf528SMauro Carvalho Chehab .delsys = { SYS_ISDBT },
5029a0bf528SMauro Carvalho Chehab /* Use dib8000 values per default */
5039a0bf528SMauro Carvalho Chehab .info = {
5049a0bf528SMauro Carvalho Chehab .name = "Sharp S921",
505f1b1eabfSMauro Carvalho Chehab .frequency_min_hz = 470 * MHz,
5069a0bf528SMauro Carvalho Chehab /*
5079a0bf528SMauro Carvalho Chehab * Max should be 770MHz instead, according with Sharp docs,
5089a0bf528SMauro Carvalho Chehab * but Leadership doc says it works up to 806 MHz. This is
5099a0bf528SMauro Carvalho Chehab * required to get channel 69, used in Brazil
5109a0bf528SMauro Carvalho Chehab */
511f1b1eabfSMauro Carvalho Chehab .frequency_max_hz = 806 * MHz,
5129a0bf528SMauro Carvalho Chehab .caps = FE_CAN_INVERSION_AUTO |
5139a0bf528SMauro Carvalho Chehab FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
5149a0bf528SMauro Carvalho Chehab FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
5159a0bf528SMauro Carvalho Chehab FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
5169a0bf528SMauro Carvalho Chehab FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO |
5179a0bf528SMauro Carvalho Chehab FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_RECOVER |
5189a0bf528SMauro Carvalho Chehab FE_CAN_HIERARCHY_AUTO,
5199a0bf528SMauro Carvalho Chehab },
5209a0bf528SMauro Carvalho Chehab
5219a0bf528SMauro Carvalho Chehab .release = s921_release,
5229a0bf528SMauro Carvalho Chehab
5239a0bf528SMauro Carvalho Chehab .init = s921_initfe,
5249a0bf528SMauro Carvalho Chehab .set_frontend = s921_set_frontend,
5259a0bf528SMauro Carvalho Chehab .get_frontend = s921_get_frontend,
5269a0bf528SMauro Carvalho Chehab .read_status = s921_read_status,
5279a0bf528SMauro Carvalho Chehab .read_signal_strength = s921_read_signal_strength,
5289a0bf528SMauro Carvalho Chehab .tune = s921_tune,
5299a0bf528SMauro Carvalho Chehab .get_frontend_algo = s921_get_algo,
5309a0bf528SMauro Carvalho Chehab };
5319a0bf528SMauro Carvalho Chehab
5329a0bf528SMauro Carvalho Chehab MODULE_DESCRIPTION("DVB Frontend module for Sharp S921 hardware");
53337e59f87SMauro Carvalho Chehab MODULE_AUTHOR("Mauro Carvalho Chehab");
5349a0bf528SMauro Carvalho Chehab MODULE_AUTHOR("Douglas Landgraf <dougsland@redhat.com>");
5359a0bf528SMauro Carvalho Chehab MODULE_LICENSE("GPL");
536