1 /* 2 * Panasonic MN88472 DVB-T/T2/C demodulator driver 3 * 4 * Copyright (C) 2013 Antti Palosaari <crope@iki.fi> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17 #include "mn88472_priv.h" 18 19 static int mn88472_get_tune_settings(struct dvb_frontend *fe, 20 struct dvb_frontend_tune_settings *s) 21 { 22 s->min_delay_ms = 1000; 23 return 0; 24 } 25 26 static int mn88472_read_status(struct dvb_frontend *fe, enum fe_status *status) 27 { 28 struct i2c_client *client = fe->demodulator_priv; 29 struct mn88472_dev *dev = i2c_get_clientdata(client); 30 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 31 int ret, i, stmp; 32 unsigned int utmp, utmp1, utmp2; 33 u8 buf[5]; 34 35 if (!dev->active) { 36 ret = -EAGAIN; 37 goto err; 38 } 39 40 switch (c->delivery_system) { 41 case SYS_DVBT: 42 ret = regmap_read(dev->regmap[0], 0x7f, &utmp); 43 if (ret) 44 goto err; 45 if ((utmp & 0x0f) >= 0x09) 46 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER | 47 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; 48 else 49 *status = 0; 50 break; 51 case SYS_DVBT2: 52 ret = regmap_read(dev->regmap[2], 0x92, &utmp); 53 if (ret) 54 goto err; 55 if ((utmp & 0x0f) >= 0x0d) 56 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER | 57 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; 58 else if ((utmp & 0x0f) >= 0x0a) 59 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER | 60 FE_HAS_VITERBI; 61 else if ((utmp & 0x0f) >= 0x07) 62 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER; 63 else 64 *status = 0; 65 break; 66 case SYS_DVBC_ANNEX_A: 67 ret = regmap_read(dev->regmap[1], 0x84, &utmp); 68 if (ret) 69 goto err; 70 if ((utmp & 0x0f) >= 0x08) 71 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER | 72 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; 73 else 74 *status = 0; 75 break; 76 default: 77 ret = -EINVAL; 78 goto err; 79 } 80 81 /* Signal strength */ 82 if (*status & FE_HAS_SIGNAL) { 83 for (i = 0; i < 2; i++) { 84 ret = regmap_bulk_read(dev->regmap[2], 0x8e + i, 85 &buf[i], 1); 86 if (ret) 87 goto err; 88 } 89 90 utmp1 = buf[0] << 8 | buf[1] << 0 | buf[0] >> 2; 91 dev_dbg(&client->dev, "strength=%u\n", utmp1); 92 93 c->strength.stat[0].scale = FE_SCALE_RELATIVE; 94 c->strength.stat[0].uvalue = utmp1; 95 } else { 96 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 97 } 98 99 /* CNR */ 100 if (*status & FE_HAS_VITERBI && c->delivery_system == SYS_DVBT) { 101 /* DVB-T CNR */ 102 ret = regmap_bulk_read(dev->regmap[0], 0x9c, buf, 2); 103 if (ret) 104 goto err; 105 106 utmp = buf[0] << 8 | buf[1] << 0; 107 if (utmp) { 108 /* CNR[dB]: 10 * log10(65536 / value) + 2 */ 109 /* log10(65536) = 80807124, 0.2 = 3355443 */ 110 stmp = ((u64)80807124 - intlog10(utmp) + 3355443) 111 * 10000 >> 24; 112 113 dev_dbg(&client->dev, "cnr=%d value=%u\n", stmp, utmp); 114 } else { 115 stmp = 0; 116 } 117 118 c->cnr.stat[0].svalue = stmp; 119 c->cnr.stat[0].scale = FE_SCALE_DECIBEL; 120 } else if (*status & FE_HAS_VITERBI && 121 c->delivery_system == SYS_DVBT2) { 122 /* DVB-T2 CNR */ 123 for (i = 0; i < 3; i++) { 124 ret = regmap_bulk_read(dev->regmap[2], 0xbc + i, 125 &buf[i], 1); 126 if (ret) 127 goto err; 128 } 129 130 utmp = buf[1] << 8 | buf[2] << 0; 131 utmp1 = (buf[0] >> 2) & 0x01; /* 0=SISO, 1=MISO */ 132 if (utmp) { 133 if (utmp1) { 134 /* CNR[dB]: 10 * log10(16384 / value) - 6 */ 135 /* log10(16384) = 70706234, 0.6 = 10066330 */ 136 stmp = ((u64)70706234 - intlog10(utmp) 137 - 10066330) * 10000 >> 24; 138 dev_dbg(&client->dev, "cnr=%d value=%u MISO\n", 139 stmp, utmp); 140 } else { 141 /* CNR[dB]: 10 * log10(65536 / value) + 2 */ 142 /* log10(65536) = 80807124, 0.2 = 3355443 */ 143 stmp = ((u64)80807124 - intlog10(utmp) 144 + 3355443) * 10000 >> 24; 145 146 dev_dbg(&client->dev, "cnr=%d value=%u SISO\n", 147 stmp, utmp); 148 } 149 } else { 150 stmp = 0; 151 } 152 153 c->cnr.stat[0].svalue = stmp; 154 c->cnr.stat[0].scale = FE_SCALE_DECIBEL; 155 } else if (*status & FE_HAS_VITERBI && 156 c->delivery_system == SYS_DVBC_ANNEX_A) { 157 /* DVB-C CNR */ 158 ret = regmap_bulk_read(dev->regmap[1], 0xa1, buf, 4); 159 if (ret) 160 goto err; 161 162 utmp1 = buf[0] << 8 | buf[1] << 0; /* signal */ 163 utmp2 = buf[2] << 8 | buf[3] << 0; /* noise */ 164 if (utmp1 && utmp2) { 165 /* CNR[dB]: 10 * log10(8 * (signal / noise)) */ 166 /* log10(8) = 15151336 */ 167 stmp = ((u64)15151336 + intlog10(utmp1) 168 - intlog10(utmp2)) * 10000 >> 24; 169 170 dev_dbg(&client->dev, "cnr=%d signal=%u noise=%u\n", 171 stmp, utmp1, utmp2); 172 } else { 173 stmp = 0; 174 } 175 176 c->cnr.stat[0].svalue = stmp; 177 c->cnr.stat[0].scale = FE_SCALE_DECIBEL; 178 } else { 179 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 180 } 181 182 /* PER */ 183 if (*status & FE_HAS_SYNC) { 184 ret = regmap_bulk_read(dev->regmap[0], 0xe1, buf, 4); 185 if (ret) 186 goto err; 187 188 utmp1 = buf[0] << 8 | buf[1] << 0; 189 utmp2 = buf[2] << 8 | buf[3] << 0; 190 dev_dbg(&client->dev, "block_error=%u block_count=%u\n", 191 utmp1, utmp2); 192 193 c->block_error.stat[0].scale = FE_SCALE_COUNTER; 194 c->block_error.stat[0].uvalue += utmp1; 195 c->block_count.stat[0].scale = FE_SCALE_COUNTER; 196 c->block_count.stat[0].uvalue += utmp2; 197 } else { 198 c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 199 c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 200 } 201 202 return 0; 203 err: 204 dev_dbg(&client->dev, "failed=%d\n", ret); 205 return ret; 206 } 207 208 static int mn88472_set_frontend(struct dvb_frontend *fe) 209 { 210 struct i2c_client *client = fe->demodulator_priv; 211 struct mn88472_dev *dev = i2c_get_clientdata(client); 212 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 213 int ret, i; 214 unsigned int utmp; 215 u32 if_frequency; 216 u8 buf[3], delivery_system_val, bandwidth_val, *bandwidth_vals_ptr; 217 u8 reg_bank0_b4_val, reg_bank0_cd_val, reg_bank0_d4_val; 218 u8 reg_bank0_d6_val; 219 220 dev_dbg(&client->dev, 221 "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n", 222 c->delivery_system, c->modulation, c->frequency, 223 c->bandwidth_hz, c->symbol_rate, c->inversion, c->stream_id); 224 225 if (!dev->active) { 226 ret = -EAGAIN; 227 goto err; 228 } 229 230 switch (c->delivery_system) { 231 case SYS_DVBT: 232 delivery_system_val = 0x02; 233 reg_bank0_b4_val = 0x00; 234 reg_bank0_cd_val = 0x1f; 235 reg_bank0_d4_val = 0x0a; 236 reg_bank0_d6_val = 0x48; 237 break; 238 case SYS_DVBT2: 239 delivery_system_val = 0x03; 240 reg_bank0_b4_val = 0xf6; 241 reg_bank0_cd_val = 0x01; 242 reg_bank0_d4_val = 0x09; 243 reg_bank0_d6_val = 0x46; 244 break; 245 case SYS_DVBC_ANNEX_A: 246 delivery_system_val = 0x04; 247 reg_bank0_b4_val = 0x00; 248 reg_bank0_cd_val = 0x17; 249 reg_bank0_d4_val = 0x09; 250 reg_bank0_d6_val = 0x48; 251 break; 252 default: 253 ret = -EINVAL; 254 goto err; 255 } 256 257 switch (c->delivery_system) { 258 case SYS_DVBT: 259 case SYS_DVBT2: 260 switch (c->bandwidth_hz) { 261 case 5000000: 262 bandwidth_vals_ptr = "\xe5\x99\x9a\x1b\xa9\x1b\xa9"; 263 bandwidth_val = 0x03; 264 break; 265 case 6000000: 266 bandwidth_vals_ptr = "\xbf\x55\x55\x15\x6b\x15\x6b"; 267 bandwidth_val = 0x02; 268 break; 269 case 7000000: 270 bandwidth_vals_ptr = "\xa4\x00\x00\x0f\x2c\x0f\x2c"; 271 bandwidth_val = 0x01; 272 break; 273 case 8000000: 274 bandwidth_vals_ptr = "\x8f\x80\x00\x08\xee\x08\xee"; 275 bandwidth_val = 0x00; 276 break; 277 default: 278 ret = -EINVAL; 279 goto err; 280 } 281 break; 282 case SYS_DVBC_ANNEX_A: 283 bandwidth_vals_ptr = NULL; 284 bandwidth_val = 0x00; 285 break; 286 default: 287 break; 288 } 289 290 /* Program tuner */ 291 if (fe->ops.tuner_ops.set_params) { 292 ret = fe->ops.tuner_ops.set_params(fe); 293 if (ret) 294 goto err; 295 } 296 297 if (fe->ops.tuner_ops.get_if_frequency) { 298 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency); 299 if (ret) 300 goto err; 301 302 dev_dbg(&client->dev, "get_if_frequency=%d\n", if_frequency); 303 } else { 304 ret = -EINVAL; 305 goto err; 306 } 307 308 ret = regmap_write(dev->regmap[2], 0x00, 0x66); 309 if (ret) 310 goto err; 311 ret = regmap_write(dev->regmap[2], 0x01, 0x00); 312 if (ret) 313 goto err; 314 ret = regmap_write(dev->regmap[2], 0x02, 0x01); 315 if (ret) 316 goto err; 317 ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val); 318 if (ret) 319 goto err; 320 ret = regmap_write(dev->regmap[2], 0x04, bandwidth_val); 321 if (ret) 322 goto err; 323 324 /* IF */ 325 utmp = DIV_ROUND_CLOSEST_ULL((u64)if_frequency * 0x1000000, dev->clk); 326 buf[0] = (utmp >> 16) & 0xff; 327 buf[1] = (utmp >> 8) & 0xff; 328 buf[2] = (utmp >> 0) & 0xff; 329 for (i = 0; i < 3; i++) { 330 ret = regmap_write(dev->regmap[2], 0x10 + i, buf[i]); 331 if (ret) 332 goto err; 333 } 334 335 /* Bandwidth */ 336 if (bandwidth_vals_ptr) { 337 for (i = 0; i < 7; i++) { 338 ret = regmap_write(dev->regmap[2], 0x13 + i, 339 bandwidth_vals_ptr[i]); 340 if (ret) 341 goto err; 342 } 343 } 344 345 ret = regmap_write(dev->regmap[0], 0xb4, reg_bank0_b4_val); 346 if (ret) 347 goto err; 348 ret = regmap_write(dev->regmap[0], 0xcd, reg_bank0_cd_val); 349 if (ret) 350 goto err; 351 ret = regmap_write(dev->regmap[0], 0xd4, reg_bank0_d4_val); 352 if (ret) 353 goto err; 354 ret = regmap_write(dev->regmap[0], 0xd6, reg_bank0_d6_val); 355 if (ret) 356 goto err; 357 358 switch (c->delivery_system) { 359 case SYS_DVBT: 360 ret = regmap_write(dev->regmap[0], 0x07, 0x26); 361 if (ret) 362 goto err; 363 ret = regmap_write(dev->regmap[0], 0x00, 0xba); 364 if (ret) 365 goto err; 366 ret = regmap_write(dev->regmap[0], 0x01, 0x13); 367 if (ret) 368 goto err; 369 break; 370 case SYS_DVBT2: 371 ret = regmap_write(dev->regmap[2], 0x2b, 0x13); 372 if (ret) 373 goto err; 374 ret = regmap_write(dev->regmap[2], 0x4f, 0x05); 375 if (ret) 376 goto err; 377 ret = regmap_write(dev->regmap[1], 0xf6, 0x05); 378 if (ret) 379 goto err; 380 ret = regmap_write(dev->regmap[2], 0x32, c->stream_id); 381 if (ret) 382 goto err; 383 break; 384 case SYS_DVBC_ANNEX_A: 385 break; 386 default: 387 break; 388 } 389 390 /* Reset FSM */ 391 ret = regmap_write(dev->regmap[2], 0xf8, 0x9f); 392 if (ret) 393 goto err; 394 395 return 0; 396 err: 397 dev_dbg(&client->dev, "failed=%d\n", ret); 398 return ret; 399 } 400 401 static int mn88472_init(struct dvb_frontend *fe) 402 { 403 struct i2c_client *client = fe->demodulator_priv; 404 struct mn88472_dev *dev = i2c_get_clientdata(client); 405 int ret, len, rem; 406 unsigned int utmp; 407 const struct firmware *firmware; 408 const char *name = MN88472_FIRMWARE; 409 410 dev_dbg(&client->dev, "\n"); 411 412 /* Power up */ 413 ret = regmap_write(dev->regmap[2], 0x05, 0x00); 414 if (ret) 415 goto err; 416 ret = regmap_write(dev->regmap[2], 0x0b, 0x00); 417 if (ret) 418 goto err; 419 ret = regmap_write(dev->regmap[2], 0x0c, 0x00); 420 if (ret) 421 goto err; 422 423 /* Check if firmware is already running */ 424 ret = regmap_read(dev->regmap[0], 0xf5, &utmp); 425 if (ret) 426 goto err; 427 if (!(utmp & 0x01)) 428 goto warm; 429 430 ret = request_firmware(&firmware, name, &client->dev); 431 if (ret) { 432 dev_err(&client->dev, "firmware file '%s' not found\n", name); 433 goto err; 434 } 435 436 dev_info(&client->dev, "downloading firmware from file '%s'\n", name); 437 438 ret = regmap_write(dev->regmap[0], 0xf5, 0x03); 439 if (ret) 440 goto err_release_firmware; 441 442 for (rem = firmware->size; rem > 0; rem -= (dev->i2c_write_max - 1)) { 443 len = min(dev->i2c_write_max - 1, rem); 444 ret = regmap_bulk_write(dev->regmap[0], 0xf6, 445 &firmware->data[firmware->size - rem], 446 len); 447 if (ret) { 448 dev_err(&client->dev, "firmware download failed %d\n", 449 ret); 450 goto err_release_firmware; 451 } 452 } 453 454 /* Parity check of firmware */ 455 ret = regmap_read(dev->regmap[0], 0xf8, &utmp); 456 if (ret) 457 goto err_release_firmware; 458 if (utmp & 0x10) { 459 ret = -EINVAL; 460 dev_err(&client->dev, "firmware did not run\n"); 461 goto err_release_firmware; 462 } 463 464 ret = regmap_write(dev->regmap[0], 0xf5, 0x00); 465 if (ret) 466 goto err_release_firmware; 467 468 release_firmware(firmware); 469 warm: 470 /* TS config */ 471 switch (dev->ts_mode) { 472 case SERIAL_TS_MODE: 473 utmp = 0x1d; 474 break; 475 case PARALLEL_TS_MODE: 476 utmp = 0x00; 477 break; 478 default: 479 ret = -EINVAL; 480 goto err; 481 } 482 ret = regmap_write(dev->regmap[2], 0x08, utmp); 483 if (ret) 484 goto err; 485 486 switch (dev->ts_clk) { 487 case VARIABLE_TS_CLOCK: 488 utmp = 0xe3; 489 break; 490 case FIXED_TS_CLOCK: 491 utmp = 0xe1; 492 break; 493 default: 494 ret = -EINVAL; 495 goto err; 496 } 497 ret = regmap_write(dev->regmap[0], 0xd9, utmp); 498 if (ret) 499 goto err; 500 501 dev->active = true; 502 503 return 0; 504 err_release_firmware: 505 release_firmware(firmware); 506 err: 507 dev_dbg(&client->dev, "failed=%d\n", ret); 508 return ret; 509 } 510 511 static int mn88472_sleep(struct dvb_frontend *fe) 512 { 513 struct i2c_client *client = fe->demodulator_priv; 514 struct mn88472_dev *dev = i2c_get_clientdata(client); 515 int ret; 516 517 dev_dbg(&client->dev, "\n"); 518 519 /* Power down */ 520 ret = regmap_write(dev->regmap[2], 0x0c, 0x30); 521 if (ret) 522 goto err; 523 ret = regmap_write(dev->regmap[2], 0x0b, 0x30); 524 if (ret) 525 goto err; 526 ret = regmap_write(dev->regmap[2], 0x05, 0x3e); 527 if (ret) 528 goto err; 529 530 return 0; 531 err: 532 dev_dbg(&client->dev, "failed=%d\n", ret); 533 return ret; 534 } 535 536 static const struct dvb_frontend_ops mn88472_ops = { 537 .delsys = {SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A}, 538 .info = { 539 .name = "Panasonic MN88472", 540 .symbol_rate_min = 1000000, 541 .symbol_rate_max = 7200000, 542 .caps = FE_CAN_FEC_1_2 | 543 FE_CAN_FEC_2_3 | 544 FE_CAN_FEC_3_4 | 545 FE_CAN_FEC_5_6 | 546 FE_CAN_FEC_7_8 | 547 FE_CAN_FEC_AUTO | 548 FE_CAN_QPSK | 549 FE_CAN_QAM_16 | 550 FE_CAN_QAM_32 | 551 FE_CAN_QAM_64 | 552 FE_CAN_QAM_128 | 553 FE_CAN_QAM_256 | 554 FE_CAN_QAM_AUTO | 555 FE_CAN_TRANSMISSION_MODE_AUTO | 556 FE_CAN_GUARD_INTERVAL_AUTO | 557 FE_CAN_HIERARCHY_AUTO | 558 FE_CAN_MUTE_TS | 559 FE_CAN_2G_MODULATION | 560 FE_CAN_MULTISTREAM 561 }, 562 563 .get_tune_settings = mn88472_get_tune_settings, 564 565 .init = mn88472_init, 566 .sleep = mn88472_sleep, 567 568 .set_frontend = mn88472_set_frontend, 569 570 .read_status = mn88472_read_status, 571 }; 572 573 static struct dvb_frontend *mn88472_get_dvb_frontend(struct i2c_client *client) 574 { 575 struct mn88472_dev *dev = i2c_get_clientdata(client); 576 577 dev_dbg(&client->dev, "\n"); 578 579 return &dev->fe; 580 } 581 582 static int mn88472_probe(struct i2c_client *client, 583 const struct i2c_device_id *id) 584 { 585 struct mn88472_config *pdata = client->dev.platform_data; 586 struct mn88472_dev *dev; 587 struct dtv_frontend_properties *c; 588 int ret; 589 unsigned int utmp; 590 static const struct regmap_config regmap_config = { 591 .reg_bits = 8, 592 .val_bits = 8, 593 }; 594 595 dev_dbg(&client->dev, "\n"); 596 597 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 598 if (!dev) { 599 ret = -ENOMEM; 600 goto err; 601 } 602 603 dev->i2c_write_max = pdata->i2c_wr_max ? pdata->i2c_wr_max : ~0; 604 dev->clk = pdata->xtal; 605 dev->ts_mode = pdata->ts_mode; 606 dev->ts_clk = pdata->ts_clock; 607 dev->client[0] = client; 608 dev->regmap[0] = regmap_init_i2c(dev->client[0], ®map_config); 609 if (IS_ERR(dev->regmap[0])) { 610 ret = PTR_ERR(dev->regmap[0]); 611 goto err_kfree; 612 } 613 614 /* 615 * Chip has three I2C addresses for different register banks. Used 616 * addresses are 0x18, 0x1a and 0x1c. We register two dummy clients, 617 * 0x1a and 0x1c, in order to get own I2C client for each register bank. 618 * 619 * Also, register bank 2 do not support sequential I/O. Only single 620 * register write or read is allowed to that bank. 621 */ 622 dev->client[1] = i2c_new_dummy(client->adapter, 0x1a); 623 if (!dev->client[1]) { 624 ret = -ENODEV; 625 dev_err(&client->dev, "I2C registration failed\n"); 626 if (ret) 627 goto err_regmap_0_regmap_exit; 628 } 629 dev->regmap[1] = regmap_init_i2c(dev->client[1], ®map_config); 630 if (IS_ERR(dev->regmap[1])) { 631 ret = PTR_ERR(dev->regmap[1]); 632 goto err_client_1_i2c_unregister_device; 633 } 634 i2c_set_clientdata(dev->client[1], dev); 635 636 dev->client[2] = i2c_new_dummy(client->adapter, 0x1c); 637 if (!dev->client[2]) { 638 ret = -ENODEV; 639 dev_err(&client->dev, "2nd I2C registration failed\n"); 640 if (ret) 641 goto err_regmap_1_regmap_exit; 642 } 643 dev->regmap[2] = regmap_init_i2c(dev->client[2], ®map_config); 644 if (IS_ERR(dev->regmap[2])) { 645 ret = PTR_ERR(dev->regmap[2]); 646 goto err_client_2_i2c_unregister_device; 647 } 648 i2c_set_clientdata(dev->client[2], dev); 649 650 /* Check demod answers with correct chip id */ 651 ret = regmap_read(dev->regmap[2], 0xff, &utmp); 652 if (ret) 653 goto err_regmap_2_regmap_exit; 654 655 dev_dbg(&client->dev, "chip id=%02x\n", utmp); 656 657 if (utmp != 0x02) { 658 ret = -ENODEV; 659 goto err_regmap_2_regmap_exit; 660 } 661 662 /* Sleep because chip is active by default */ 663 ret = regmap_write(dev->regmap[2], 0x05, 0x3e); 664 if (ret) 665 goto err_regmap_2_regmap_exit; 666 667 /* Create dvb frontend */ 668 memcpy(&dev->fe.ops, &mn88472_ops, sizeof(struct dvb_frontend_ops)); 669 dev->fe.demodulator_priv = client; 670 *pdata->fe = &dev->fe; 671 i2c_set_clientdata(client, dev); 672 673 /* Init stats to indicate which stats are supported */ 674 c = &dev->fe.dtv_property_cache; 675 c->strength.len = 1; 676 c->cnr.len = 1; 677 c->block_error.len = 1; 678 c->block_count.len = 1; 679 680 /* Setup callbacks */ 681 pdata->get_dvb_frontend = mn88472_get_dvb_frontend; 682 683 dev_info(&client->dev, "Panasonic MN88472 successfully identified\n"); 684 685 return 0; 686 err_regmap_2_regmap_exit: 687 regmap_exit(dev->regmap[2]); 688 err_client_2_i2c_unregister_device: 689 i2c_unregister_device(dev->client[2]); 690 err_regmap_1_regmap_exit: 691 regmap_exit(dev->regmap[1]); 692 err_client_1_i2c_unregister_device: 693 i2c_unregister_device(dev->client[1]); 694 err_regmap_0_regmap_exit: 695 regmap_exit(dev->regmap[0]); 696 err_kfree: 697 kfree(dev); 698 err: 699 dev_dbg(&client->dev, "failed=%d\n", ret); 700 return ret; 701 } 702 703 static int mn88472_remove(struct i2c_client *client) 704 { 705 struct mn88472_dev *dev = i2c_get_clientdata(client); 706 707 dev_dbg(&client->dev, "\n"); 708 709 regmap_exit(dev->regmap[2]); 710 i2c_unregister_device(dev->client[2]); 711 712 regmap_exit(dev->regmap[1]); 713 i2c_unregister_device(dev->client[1]); 714 715 regmap_exit(dev->regmap[0]); 716 717 kfree(dev); 718 719 return 0; 720 } 721 722 static const struct i2c_device_id mn88472_id_table[] = { 723 {"mn88472", 0}, 724 {} 725 }; 726 MODULE_DEVICE_TABLE(i2c, mn88472_id_table); 727 728 static struct i2c_driver mn88472_driver = { 729 .driver = { 730 .name = "mn88472", 731 .suppress_bind_attrs = true, 732 }, 733 .probe = mn88472_probe, 734 .remove = mn88472_remove, 735 .id_table = mn88472_id_table, 736 }; 737 738 module_i2c_driver(mn88472_driver); 739 740 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); 741 MODULE_DESCRIPTION("Panasonic MN88472 DVB-T/T2/C demodulator driver"); 742 MODULE_LICENSE("GPL"); 743 MODULE_FIRMWARE(MN88472_FIRMWARE); 744