1 /* 2 * Support for Legend Silicon GB20600 (a.k.a DMB-TH) demodulator 3 * LGS8913, LGS8GL5, LGS8G75 4 * experimental support LGS8G42, LGS8G52 5 * 6 * Copyright (C) 2007-2009 David T.L. Wong <davidtlwong@gmail.com> 7 * Copyright (C) 2008 Sirius International (Hong Kong) Limited 8 * Timothy Lee <timothy.lee@siriushk.com> (for initial work on LGS8GL5) 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 */ 21 22 #ifndef LGS8913_PRIV_H 23 #define LGS8913_PRIV_H 24 25 struct lgs8gxx_state { 26 struct i2c_adapter *i2c; 27 /* configuration settings */ 28 const struct lgs8gxx_config *config; 29 struct dvb_frontend frontend; 30 u16 curr_gi; /* current guard interval */ 31 }; 32 33 #define SC_MASK 0x1C /* Sub-Carrier Modulation Mask */ 34 #define SC_QAM64 0x10 /* 64QAM modulation */ 35 #define SC_QAM32 0x0C /* 32QAM modulation */ 36 #define SC_QAM16 0x08 /* 16QAM modulation */ 37 #define SC_QAM4NR 0x04 /* 4QAM-NR modulation */ 38 #define SC_QAM4 0x00 /* 4QAM modulation */ 39 40 #define LGS_FEC_MASK 0x03 /* FEC Rate Mask */ 41 #define LGS_FEC_0_4 0x00 /* FEC Rate 0.4 */ 42 #define LGS_FEC_0_6 0x01 /* FEC Rate 0.6 */ 43 #define LGS_FEC_0_8 0x02 /* FEC Rate 0.8 */ 44 45 #define TIM_MASK 0x20 /* Time Interleave Length Mask */ 46 #define TIM_LONG 0x20 /* Time Interleave Length = 720 */ 47 #define TIM_MIDDLE 0x00 /* Time Interleave Length = 240 */ 48 49 #define CF_MASK 0x80 /* Control Frame Mask */ 50 #define CF_EN 0x80 /* Control Frame On */ 51 52 #define GI_MASK 0x03 /* Guard Interval Mask */ 53 #define GI_420 0x00 /* 1/9 Guard Interval */ 54 #define GI_595 0x01 /* */ 55 #define GI_945 0x02 /* 1/4 Guard Interval */ 56 57 58 #define TS_PARALLEL 0x00 /* Parallel TS Output a.k.a. SPI */ 59 #define TS_SERIAL 0x01 /* Serial TS Output a.k.a. SSI */ 60 #define TS_CLK_NORMAL 0x00 /* MPEG Clock Normal */ 61 #define TS_CLK_INVERTED 0x02 /* MPEG Clock Inverted */ 62 #define TS_CLK_GATED 0x00 /* MPEG clock gated */ 63 #define TS_CLK_FREERUN 0x04 /* MPEG clock free running*/ 64 65 66 #endif 67