1 /* 2 * Support for LGDT3302 and LGDT3303 - VSB/QAM 3 * 4 * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 */ 17 18 /* 19 * NOTES ABOUT THIS DRIVER 20 * 21 * This Linux driver supports: 22 * DViCO FusionHDTV 3 Gold-Q 23 * DViCO FusionHDTV 3 Gold-T 24 * DViCO FusionHDTV 5 Gold 25 * DViCO FusionHDTV 5 Lite 26 * DViCO FusionHDTV 5 USB Gold 27 * Air2PC/AirStar 2 ATSC 3rd generation (HD5000) 28 * pcHDTV HD5500 29 * 30 */ 31 32 #include <linux/kernel.h> 33 #include <linux/module.h> 34 #include <linux/init.h> 35 #include <linux/delay.h> 36 #include <linux/string.h> 37 #include <linux/slab.h> 38 #include <asm/byteorder.h> 39 40 #include <media/dvb_frontend.h> 41 #include <media/dvb_math.h> 42 #include "lgdt330x_priv.h" 43 #include "lgdt330x.h" 44 45 /* Use Equalizer Mean Squared Error instead of Phaser Tracker MSE */ 46 /* #define USE_EQMSE */ 47 48 static int debug; 49 module_param(debug, int, 0644); 50 MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off)."); 51 #define dprintk(args...) \ 52 do { \ 53 if (debug) printk(KERN_DEBUG "lgdt330x: " args); \ 54 } while (0) 55 56 struct lgdt330x_state 57 { 58 struct i2c_adapter* i2c; 59 60 /* Configuration settings */ 61 const struct lgdt330x_config* config; 62 63 struct dvb_frontend frontend; 64 65 /* Demodulator private data */ 66 enum fe_modulation current_modulation; 67 u32 snr; /* Result of last SNR calculation */ 68 69 /* Tuner private data */ 70 u32 current_frequency; 71 }; 72 73 static int i2c_write_demod_bytes (struct lgdt330x_state* state, 74 u8 *buf, /* data bytes to send */ 75 int len /* number of bytes to send */ ) 76 { 77 struct i2c_msg msg = 78 { .addr = state->config->demod_address, 79 .flags = 0, 80 .buf = buf, 81 .len = 2 }; 82 int i; 83 int err; 84 85 for (i=0; i<len-1; i+=2){ 86 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { 87 printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __func__, msg.buf[0], msg.buf[1], err); 88 if (err < 0) 89 return err; 90 else 91 return -EREMOTEIO; 92 } 93 msg.buf += 2; 94 } 95 return 0; 96 } 97 98 /* 99 * This routine writes the register (reg) to the demod bus 100 * then reads the data returned for (len) bytes. 101 */ 102 103 static int i2c_read_demod_bytes(struct lgdt330x_state *state, 104 enum I2C_REG reg, u8 *buf, int len) 105 { 106 u8 wr [] = { reg }; 107 struct i2c_msg msg [] = { 108 { .addr = state->config->demod_address, 109 .flags = 0, .buf = wr, .len = 1 }, 110 { .addr = state->config->demod_address, 111 .flags = I2C_M_RD, .buf = buf, .len = len }, 112 }; 113 int ret; 114 ret = i2c_transfer(state->i2c, msg, 2); 115 if (ret != 2) { 116 printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __func__, state->config->demod_address, reg, ret); 117 if (ret >= 0) 118 ret = -EIO; 119 } else { 120 ret = 0; 121 } 122 return ret; 123 } 124 125 /* Software reset */ 126 static int lgdt3302_SwReset(struct lgdt330x_state* state) 127 { 128 u8 ret; 129 u8 reset[] = { 130 IRQ_MASK, 131 0x00 /* bit 6 is active low software reset 132 * bits 5-0 are 1 to mask interrupts */ 133 }; 134 135 ret = i2c_write_demod_bytes(state, 136 reset, sizeof(reset)); 137 if (ret == 0) { 138 139 /* force reset high (inactive) and unmask interrupts */ 140 reset[1] = 0x7f; 141 ret = i2c_write_demod_bytes(state, 142 reset, sizeof(reset)); 143 } 144 return ret; 145 } 146 147 static int lgdt3303_SwReset(struct lgdt330x_state* state) 148 { 149 u8 ret; 150 u8 reset[] = { 151 0x02, 152 0x00 /* bit 0 is active low software reset */ 153 }; 154 155 ret = i2c_write_demod_bytes(state, 156 reset, sizeof(reset)); 157 if (ret == 0) { 158 159 /* force reset high (inactive) */ 160 reset[1] = 0x01; 161 ret = i2c_write_demod_bytes(state, 162 reset, sizeof(reset)); 163 } 164 return ret; 165 } 166 167 static int lgdt330x_SwReset(struct lgdt330x_state* state) 168 { 169 switch (state->config->demod_chip) { 170 case LGDT3302: 171 return lgdt3302_SwReset(state); 172 case LGDT3303: 173 return lgdt3303_SwReset(state); 174 default: 175 return -ENODEV; 176 } 177 } 178 179 static int lgdt330x_init(struct dvb_frontend* fe) 180 { 181 /* Hardware reset is done using gpio[0] of cx23880x chip. 182 * I'd like to do it here, but don't know how to find chip address. 183 * cx88-cards.c arranges for the reset bit to be inactive (high). 184 * Maybe there needs to be a callable function in cx88-core or 185 * the caller of this function needs to do it. */ 186 187 /* 188 * Array of byte pairs <address, value> 189 * to initialize each different chip 190 */ 191 static u8 lgdt3302_init_data[] = { 192 /* Use 50MHz parameter values from spec sheet since xtal is 50 */ 193 /* Change the value of NCOCTFV[25:0] of carrier 194 recovery center frequency register */ 195 VSB_CARRIER_FREQ0, 0x00, 196 VSB_CARRIER_FREQ1, 0x87, 197 VSB_CARRIER_FREQ2, 0x8e, 198 VSB_CARRIER_FREQ3, 0x01, 199 /* Change the TPCLK pin polarity 200 data is valid on falling clock */ 201 DEMUX_CONTROL, 0xfb, 202 /* Change the value of IFBW[11:0] of 203 AGC IF/RF loop filter bandwidth register */ 204 AGC_RF_BANDWIDTH0, 0x40, 205 AGC_RF_BANDWIDTH1, 0x93, 206 AGC_RF_BANDWIDTH2, 0x00, 207 /* Change the value of bit 6, 'nINAGCBY' and 208 'NSSEL[1:0] of ACG function control register 2 */ 209 AGC_FUNC_CTRL2, 0xc6, 210 /* Change the value of bit 6 'RFFIX' 211 of AGC function control register 3 */ 212 AGC_FUNC_CTRL3, 0x40, 213 /* Set the value of 'INLVTHD' register 0x2a/0x2c 214 to 0x7fe */ 215 AGC_DELAY0, 0x07, 216 AGC_DELAY2, 0xfe, 217 /* Change the value of IAGCBW[15:8] 218 of inner AGC loop filter bandwidth */ 219 AGC_LOOP_BANDWIDTH0, 0x08, 220 AGC_LOOP_BANDWIDTH1, 0x9a 221 }; 222 223 static u8 lgdt3303_init_data[] = { 224 0x4c, 0x14 225 }; 226 227 static u8 flip_1_lgdt3303_init_data[] = { 228 0x4c, 0x14, 229 0x87, 0xf3 230 }; 231 232 static u8 flip_2_lgdt3303_init_data[] = { 233 0x4c, 0x14, 234 0x87, 0xda 235 }; 236 237 struct lgdt330x_state* state = fe->demodulator_priv; 238 char *chip_name; 239 int err; 240 241 switch (state->config->demod_chip) { 242 case LGDT3302: 243 chip_name = "LGDT3302"; 244 err = i2c_write_demod_bytes(state, lgdt3302_init_data, 245 sizeof(lgdt3302_init_data)); 246 break; 247 case LGDT3303: 248 chip_name = "LGDT3303"; 249 switch (state->config->clock_polarity_flip) { 250 case 2: 251 err = i2c_write_demod_bytes(state, 252 flip_2_lgdt3303_init_data, 253 sizeof(flip_2_lgdt3303_init_data)); 254 break; 255 case 1: 256 err = i2c_write_demod_bytes(state, 257 flip_1_lgdt3303_init_data, 258 sizeof(flip_1_lgdt3303_init_data)); 259 break; 260 case 0: 261 default: 262 err = i2c_write_demod_bytes(state, lgdt3303_init_data, 263 sizeof(lgdt3303_init_data)); 264 } 265 break; 266 default: 267 chip_name = "undefined"; 268 printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n"); 269 err = -ENODEV; 270 } 271 dprintk("%s entered as %s\n", __func__, chip_name); 272 if (err < 0) 273 return err; 274 return lgdt330x_SwReset(state); 275 } 276 277 static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber) 278 { 279 *ber = 0; /* Not supplied by the demod chips */ 280 return 0; 281 } 282 283 static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) 284 { 285 struct lgdt330x_state* state = fe->demodulator_priv; 286 int err; 287 u8 buf[2]; 288 289 *ucblocks = 0; 290 291 switch (state->config->demod_chip) { 292 case LGDT3302: 293 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1, 294 buf, sizeof(buf)); 295 break; 296 case LGDT3303: 297 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1, 298 buf, sizeof(buf)); 299 break; 300 default: 301 printk(KERN_WARNING 302 "Only LGDT3302 and LGDT3303 are supported chips.\n"); 303 err = -ENODEV; 304 } 305 if (err < 0) 306 return err; 307 308 *ucblocks = (buf[0] << 8) | buf[1]; 309 return 0; 310 } 311 312 static int lgdt330x_set_parameters(struct dvb_frontend *fe) 313 { 314 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 315 /* 316 * Array of byte pairs <address, value> 317 * to initialize 8VSB for lgdt3303 chip 50 MHz IF 318 */ 319 static u8 lgdt3303_8vsb_44_data[] = { 320 0x04, 0x00, 321 0x0d, 0x40, 322 0x0e, 0x87, 323 0x0f, 0x8e, 324 0x10, 0x01, 325 0x47, 0x8b }; 326 327 /* 328 * Array of byte pairs <address, value> 329 * to initialize QAM for lgdt3303 chip 330 */ 331 static u8 lgdt3303_qam_data[] = { 332 0x04, 0x00, 333 0x0d, 0x00, 334 0x0e, 0x00, 335 0x0f, 0x00, 336 0x10, 0x00, 337 0x51, 0x63, 338 0x47, 0x66, 339 0x48, 0x66, 340 0x4d, 0x1a, 341 0x49, 0x08, 342 0x4a, 0x9b }; 343 344 struct lgdt330x_state* state = fe->demodulator_priv; 345 346 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 }; 347 348 int err = 0; 349 /* Change only if we are actually changing the modulation */ 350 if (state->current_modulation != p->modulation) { 351 switch (p->modulation) { 352 case VSB_8: 353 dprintk("%s: VSB_8 MODE\n", __func__); 354 355 /* Select VSB mode */ 356 top_ctrl_cfg[1] = 0x03; 357 358 /* Select ANT connector if supported by card */ 359 if (state->config->pll_rf_set) 360 state->config->pll_rf_set(fe, 1); 361 362 if (state->config->demod_chip == LGDT3303) { 363 err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data, 364 sizeof(lgdt3303_8vsb_44_data)); 365 } 366 break; 367 368 case QAM_64: 369 dprintk("%s: QAM_64 MODE\n", __func__); 370 371 /* Select QAM_64 mode */ 372 top_ctrl_cfg[1] = 0x00; 373 374 /* Select CABLE connector if supported by card */ 375 if (state->config->pll_rf_set) 376 state->config->pll_rf_set(fe, 0); 377 378 if (state->config->demod_chip == LGDT3303) { 379 err = i2c_write_demod_bytes(state, lgdt3303_qam_data, 380 sizeof(lgdt3303_qam_data)); 381 } 382 break; 383 384 case QAM_256: 385 dprintk("%s: QAM_256 MODE\n", __func__); 386 387 /* Select QAM_256 mode */ 388 top_ctrl_cfg[1] = 0x01; 389 390 /* Select CABLE connector if supported by card */ 391 if (state->config->pll_rf_set) 392 state->config->pll_rf_set(fe, 0); 393 394 if (state->config->demod_chip == LGDT3303) { 395 err = i2c_write_demod_bytes(state, lgdt3303_qam_data, 396 sizeof(lgdt3303_qam_data)); 397 } 398 break; 399 default: 400 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __func__, p->modulation); 401 return -1; 402 } 403 if (err < 0) 404 printk(KERN_WARNING "lgdt330x: %s: error blasting bytes to lgdt3303 for modulation type(%d)\n", 405 __func__, p->modulation); 406 407 /* 408 * select serial or parallel MPEG harware interface 409 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303 410 * Parallel: 0x00 411 */ 412 top_ctrl_cfg[1] |= state->config->serial_mpeg; 413 414 /* Select the requested mode */ 415 i2c_write_demod_bytes(state, top_ctrl_cfg, 416 sizeof(top_ctrl_cfg)); 417 if (state->config->set_ts_params) 418 state->config->set_ts_params(fe, 0); 419 state->current_modulation = p->modulation; 420 } 421 422 /* Tune to the specified frequency */ 423 if (fe->ops.tuner_ops.set_params) { 424 fe->ops.tuner_ops.set_params(fe); 425 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 426 } 427 428 /* Keep track of the new frequency */ 429 /* FIXME this is the wrong way to do this... */ 430 /* The tuner is shared with the video4linux analog API */ 431 state->current_frequency = p->frequency; 432 433 lgdt330x_SwReset(state); 434 return 0; 435 } 436 437 static int lgdt330x_get_frontend(struct dvb_frontend *fe, 438 struct dtv_frontend_properties *p) 439 { 440 struct lgdt330x_state *state = fe->demodulator_priv; 441 442 p->frequency = state->current_frequency; 443 return 0; 444 } 445 446 static int lgdt3302_read_status(struct dvb_frontend *fe, 447 enum fe_status *status) 448 { 449 struct lgdt330x_state* state = fe->demodulator_priv; 450 u8 buf[3]; 451 452 *status = 0; /* Reset status result */ 453 454 /* AGC status register */ 455 i2c_read_demod_bytes(state, AGC_STATUS, buf, 1); 456 dprintk("%s: AGC_STATUS = 0x%02x\n", __func__, buf[0]); 457 if ((buf[0] & 0x0c) == 0x8){ 458 /* Test signal does not exist flag */ 459 /* as well as the AGC lock flag. */ 460 *status |= FE_HAS_SIGNAL; 461 } 462 463 /* 464 * You must set the Mask bits to 1 in the IRQ_MASK in order 465 * to see that status bit in the IRQ_STATUS register. 466 * This is done in SwReset(); 467 */ 468 /* signal status */ 469 i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf)); 470 dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __func__, buf[0], buf[1], buf[2]); 471 472 473 /* sync status */ 474 if ((buf[2] & 0x03) == 0x01) { 475 *status |= FE_HAS_SYNC; 476 } 477 478 /* FEC error status */ 479 if ((buf[2] & 0x0c) == 0x08) { 480 *status |= FE_HAS_LOCK; 481 *status |= FE_HAS_VITERBI; 482 } 483 484 /* Carrier Recovery Lock Status Register */ 485 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1); 486 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __func__, buf[0]); 487 switch (state->current_modulation) { 488 case QAM_256: 489 case QAM_64: 490 /* Need to understand why there are 3 lock levels here */ 491 if ((buf[0] & 0x07) == 0x07) 492 *status |= FE_HAS_CARRIER; 493 break; 494 case VSB_8: 495 if ((buf[0] & 0x80) == 0x80) 496 *status |= FE_HAS_CARRIER; 497 break; 498 default: 499 printk(KERN_WARNING "lgdt330x: %s: Modulation set to unsupported value\n", __func__); 500 } 501 502 return 0; 503 } 504 505 static int lgdt3303_read_status(struct dvb_frontend *fe, 506 enum fe_status *status) 507 { 508 struct lgdt330x_state* state = fe->demodulator_priv; 509 int err; 510 u8 buf[3]; 511 512 *status = 0; /* Reset status result */ 513 514 /* lgdt3303 AGC status register */ 515 err = i2c_read_demod_bytes(state, 0x58, buf, 1); 516 if (err < 0) 517 return err; 518 519 dprintk("%s: AGC_STATUS = 0x%02x\n", __func__, buf[0]); 520 if ((buf[0] & 0x21) == 0x01){ 521 /* Test input signal does not exist flag */ 522 /* as well as the AGC lock flag. */ 523 *status |= FE_HAS_SIGNAL; 524 } 525 526 /* Carrier Recovery Lock Status Register */ 527 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1); 528 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __func__, buf[0]); 529 switch (state->current_modulation) { 530 case QAM_256: 531 case QAM_64: 532 /* Need to understand why there are 3 lock levels here */ 533 if ((buf[0] & 0x07) == 0x07) 534 *status |= FE_HAS_CARRIER; 535 else 536 break; 537 i2c_read_demod_bytes(state, 0x8a, buf, 1); 538 if ((buf[0] & 0x04) == 0x04) 539 *status |= FE_HAS_SYNC; 540 if ((buf[0] & 0x01) == 0x01) 541 *status |= FE_HAS_LOCK; 542 if ((buf[0] & 0x08) == 0x08) 543 *status |= FE_HAS_VITERBI; 544 break; 545 case VSB_8: 546 if ((buf[0] & 0x80) == 0x80) 547 *status |= FE_HAS_CARRIER; 548 else 549 break; 550 i2c_read_demod_bytes(state, 0x38, buf, 1); 551 if ((buf[0] & 0x02) == 0x00) 552 *status |= FE_HAS_SYNC; 553 if ((buf[0] & 0x01) == 0x01) { 554 *status |= FE_HAS_LOCK; 555 *status |= FE_HAS_VITERBI; 556 } 557 break; 558 default: 559 printk(KERN_WARNING "lgdt330x: %s: Modulation set to unsupported value\n", __func__); 560 } 561 return 0; 562 } 563 564 /* Calculate SNR estimation (scaled by 2^24) 565 566 8-VSB SNR equations from LGDT3302 and LGDT3303 datasheets, QAM 567 equations from LGDT3303 datasheet. VSB is the same between the '02 568 and '03, so maybe QAM is too? Perhaps someone with a newer datasheet 569 that has QAM information could verify? 570 571 For 8-VSB: (two ways, take your pick) 572 LGDT3302: 573 SNR_EQ = 10 * log10(25 * 24^2 / EQ_MSE) 574 LGDT3303: 575 SNR_EQ = 10 * log10(25 * 32^2 / EQ_MSE) 576 LGDT3302 & LGDT3303: 577 SNR_PT = 10 * log10(25 * 32^2 / PT_MSE) (we use this one) 578 For 64-QAM: 579 SNR = 10 * log10( 688128 / MSEQAM) 580 For 256-QAM: 581 SNR = 10 * log10( 696320 / MSEQAM) 582 583 We re-write the snr equation as: 584 SNR * 2^24 = 10*(c - intlog10(MSE)) 585 Where for 256-QAM, c = log10(696320) * 2^24, and so on. */ 586 587 static u32 calculate_snr(u32 mse, u32 c) 588 { 589 if (mse == 0) /* No signal */ 590 return 0; 591 592 mse = intlog10(mse); 593 if (mse > c) { 594 /* Negative SNR, which is possible, but realisticly the 595 demod will lose lock before the signal gets this bad. The 596 API only allows for unsigned values, so just return 0 */ 597 return 0; 598 } 599 return 10*(c - mse); 600 } 601 602 static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr) 603 { 604 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv; 605 u8 buf[5]; /* read data buffer */ 606 u32 noise; /* noise value */ 607 u32 c; /* per-modulation SNR calculation constant */ 608 609 switch(state->current_modulation) { 610 case VSB_8: 611 i2c_read_demod_bytes(state, LGDT3302_EQPH_ERR0, buf, 5); 612 #ifdef USE_EQMSE 613 /* Use Equalizer Mean-Square Error Register */ 614 /* SNR for ranges from -15.61 to +41.58 */ 615 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2]; 616 c = 69765745; /* log10(25*24^2)*2^24 */ 617 #else 618 /* Use Phase Tracker Mean-Square Error Register */ 619 /* SNR for ranges from -13.11 to +44.08 */ 620 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4]; 621 c = 73957994; /* log10(25*32^2)*2^24 */ 622 #endif 623 break; 624 case QAM_64: 625 case QAM_256: 626 i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2); 627 noise = ((buf[0] & 3) << 8) | buf[1]; 628 c = state->current_modulation == QAM_64 ? 97939837 : 98026066; 629 /* log10(688128)*2^24 and log10(696320)*2^24 */ 630 break; 631 default: 632 printk(KERN_ERR "lgdt330x: %s: Modulation set to unsupported value\n", 633 __func__); 634 return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */ 635 } 636 637 state->snr = calculate_snr(noise, c); 638 *snr = (state->snr) >> 16; /* Convert from 8.24 fixed-point to 8.8 */ 639 640 dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __func__, noise, 641 state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16); 642 643 return 0; 644 } 645 646 static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr) 647 { 648 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv; 649 u8 buf[5]; /* read data buffer */ 650 u32 noise; /* noise value */ 651 u32 c; /* per-modulation SNR calculation constant */ 652 653 switch(state->current_modulation) { 654 case VSB_8: 655 i2c_read_demod_bytes(state, LGDT3303_EQPH_ERR0, buf, 5); 656 #ifdef USE_EQMSE 657 /* Use Equalizer Mean-Square Error Register */ 658 /* SNR for ranges from -16.12 to +44.08 */ 659 noise = ((buf[0] & 0x78) << 13) | (buf[1] << 8) | buf[2]; 660 c = 73957994; /* log10(25*32^2)*2^24 */ 661 #else 662 /* Use Phase Tracker Mean-Square Error Register */ 663 /* SNR for ranges from -13.11 to +44.08 */ 664 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4]; 665 c = 73957994; /* log10(25*32^2)*2^24 */ 666 #endif 667 break; 668 case QAM_64: 669 case QAM_256: 670 i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2); 671 noise = (buf[0] << 8) | buf[1]; 672 c = state->current_modulation == QAM_64 ? 97939837 : 98026066; 673 /* log10(688128)*2^24 and log10(696320)*2^24 */ 674 break; 675 default: 676 printk(KERN_ERR "lgdt330x: %s: Modulation set to unsupported value\n", 677 __func__); 678 return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */ 679 } 680 681 state->snr = calculate_snr(noise, c); 682 *snr = (state->snr) >> 16; /* Convert from 8.24 fixed-point to 8.8 */ 683 684 dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __func__, noise, 685 state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16); 686 687 return 0; 688 } 689 690 static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength) 691 { 692 /* Calculate Strength from SNR up to 35dB */ 693 /* Even though the SNR can go higher than 35dB, there is some comfort */ 694 /* factor in having a range of strong signals that can show at 100% */ 695 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv; 696 u16 snr; 697 int ret; 698 699 ret = fe->ops.read_snr(fe, &snr); 700 if (ret != 0) 701 return ret; 702 /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */ 703 /* scale the range 0 - 35*2^24 into 0 - 65535 */ 704 if (state->snr >= 8960 * 0x10000) 705 *strength = 0xffff; 706 else 707 *strength = state->snr / 8960; 708 709 return 0; 710 } 711 712 static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings) 713 { 714 /* I have no idea about this - it may not be needed */ 715 fe_tune_settings->min_delay_ms = 500; 716 fe_tune_settings->step_size = 0; 717 fe_tune_settings->max_drift = 0; 718 return 0; 719 } 720 721 static void lgdt330x_release(struct dvb_frontend* fe) 722 { 723 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv; 724 kfree(state); 725 } 726 727 static const struct dvb_frontend_ops lgdt3302_ops; 728 static const struct dvb_frontend_ops lgdt3303_ops; 729 730 struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config, 731 struct i2c_adapter* i2c) 732 { 733 struct lgdt330x_state* state = NULL; 734 u8 buf[1]; 735 736 /* Allocate memory for the internal state */ 737 state = kzalloc(sizeof(struct lgdt330x_state), GFP_KERNEL); 738 if (state == NULL) 739 goto error; 740 741 /* Setup the state */ 742 state->config = config; 743 state->i2c = i2c; 744 745 /* Create dvb_frontend */ 746 switch (config->demod_chip) { 747 case LGDT3302: 748 memcpy(&state->frontend.ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops)); 749 break; 750 case LGDT3303: 751 memcpy(&state->frontend.ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops)); 752 break; 753 default: 754 goto error; 755 } 756 state->frontend.demodulator_priv = state; 757 758 /* Verify communication with demod chip */ 759 if (i2c_read_demod_bytes(state, 2, buf, 1)) 760 goto error; 761 762 state->current_frequency = -1; 763 state->current_modulation = -1; 764 765 return &state->frontend; 766 767 error: 768 kfree(state); 769 dprintk("%s: ERROR\n",__func__); 770 return NULL; 771 } 772 773 static const struct dvb_frontend_ops lgdt3302_ops = { 774 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B }, 775 .info = { 776 .name= "LG Electronics LGDT3302 VSB/QAM Frontend", 777 .frequency_min= 54000000, 778 .frequency_max= 858000000, 779 .frequency_stepsize= 62500, 780 .symbol_rate_min = 5056941, /* QAM 64 */ 781 .symbol_rate_max = 10762000, /* VSB 8 */ 782 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB 783 }, 784 .init = lgdt330x_init, 785 .set_frontend = lgdt330x_set_parameters, 786 .get_frontend = lgdt330x_get_frontend, 787 .get_tune_settings = lgdt330x_get_tune_settings, 788 .read_status = lgdt3302_read_status, 789 .read_ber = lgdt330x_read_ber, 790 .read_signal_strength = lgdt330x_read_signal_strength, 791 .read_snr = lgdt3302_read_snr, 792 .read_ucblocks = lgdt330x_read_ucblocks, 793 .release = lgdt330x_release, 794 }; 795 796 static const struct dvb_frontend_ops lgdt3303_ops = { 797 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B }, 798 .info = { 799 .name= "LG Electronics LGDT3303 VSB/QAM Frontend", 800 .frequency_min= 54000000, 801 .frequency_max= 858000000, 802 .frequency_stepsize= 62500, 803 .symbol_rate_min = 5056941, /* QAM 64 */ 804 .symbol_rate_max = 10762000, /* VSB 8 */ 805 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB 806 }, 807 .init = lgdt330x_init, 808 .set_frontend = lgdt330x_set_parameters, 809 .get_frontend = lgdt330x_get_frontend, 810 .get_tune_settings = lgdt330x_get_tune_settings, 811 .read_status = lgdt3303_read_status, 812 .read_ber = lgdt330x_read_ber, 813 .read_signal_strength = lgdt330x_read_signal_strength, 814 .read_snr = lgdt3303_read_snr, 815 .read_ucblocks = lgdt330x_read_ucblocks, 816 .release = lgdt330x_release, 817 }; 818 819 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver"); 820 MODULE_AUTHOR("Wilson Michaels"); 821 MODULE_LICENSE("GPL"); 822 823 EXPORT_SYMBOL(lgdt330x_attach); 824