1 /* 2 * Support for LGDT3302 and LGDT3303 - VSB/QAM 3 * 4 * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 */ 17 18 /* 19 * NOTES ABOUT THIS DRIVER 20 * 21 * This Linux driver supports: 22 * DViCO FusionHDTV 3 Gold-Q 23 * DViCO FusionHDTV 3 Gold-T 24 * DViCO FusionHDTV 5 Gold 25 * DViCO FusionHDTV 5 Lite 26 * DViCO FusionHDTV 5 USB Gold 27 * Air2PC/AirStar 2 ATSC 3rd generation (HD5000) 28 * pcHDTV HD5500 29 * 30 */ 31 32 #include <linux/kernel.h> 33 #include <linux/module.h> 34 #include <linux/init.h> 35 #include <linux/delay.h> 36 #include <linux/string.h> 37 #include <linux/slab.h> 38 #include <asm/byteorder.h> 39 40 #include <media/dvb_frontend.h> 41 #include <media/dvb_math.h> 42 #include "lgdt330x_priv.h" 43 #include "lgdt330x.h" 44 45 /* Use Equalizer Mean Squared Error instead of Phaser Tracker MSE */ 46 /* #define USE_EQMSE */ 47 48 static int debug; 49 module_param(debug, int, 0644); 50 MODULE_PARM_DESC(debug, "Turn on/off lgdt330x frontend debugging (default:off)."); 51 52 #define dprintk(state, fmt, arg...) do { \ 53 if (debug) \ 54 dev_printk(KERN_DEBUG, &state->client->dev, fmt, ##arg);\ 55 } while (0) 56 57 struct lgdt330x_state { 58 struct i2c_client *client; 59 60 /* Configuration settings */ 61 struct lgdt330x_config config; 62 63 struct dvb_frontend frontend; 64 65 /* Demodulator private data */ 66 enum fe_modulation current_modulation; 67 u32 snr; /* Result of last SNR calculation */ 68 u16 ucblocks; 69 unsigned long last_stats_time; 70 71 /* Tuner private data */ 72 u32 current_frequency; 73 }; 74 75 static int i2c_write_demod_bytes(struct lgdt330x_state *state, 76 const u8 *buf, /* data bytes to send */ 77 int len /* number of bytes to send */) 78 { 79 int i; 80 int err; 81 82 for (i = 0; i < len - 1; i += 2) { 83 err = i2c_master_send(state->client, buf, 2); 84 if (err != 2) { 85 dev_warn(&state->client->dev, 86 "%s: error (addr %02x <- %02x, err = %i)\n", 87 __func__, buf[0], buf[1], err); 88 if (err < 0) 89 return err; 90 else 91 return -EREMOTEIO; 92 } 93 buf += 2; 94 } 95 return 0; 96 } 97 98 /* 99 * This routine writes the register (reg) to the demod bus 100 * then reads the data returned for (len) bytes. 101 */ 102 static int i2c_read_demod_bytes(struct lgdt330x_state *state, 103 enum I2C_REG reg, u8 *buf, int len) 104 { 105 u8 wr[] = { reg }; 106 struct i2c_msg msg[] = { 107 { 108 .addr = state->client->addr, 109 .flags = 0, 110 .buf = wr, 111 .len = 1 112 }, { 113 .addr = state->client->addr, 114 .flags = I2C_M_RD, 115 .buf = buf, 116 .len = len 117 }, 118 }; 119 int ret; 120 121 ret = i2c_transfer(state->client->adapter, msg, 2); 122 if (ret != 2) { 123 dev_warn(&state->client->dev, 124 "%s: addr 0x%02x select 0x%02x error (ret == %i)\n", 125 __func__, state->client->addr, reg, ret); 126 if (ret >= 0) 127 ret = -EIO; 128 } else { 129 ret = 0; 130 } 131 return ret; 132 } 133 134 /* Software reset */ 135 static int lgdt3302_sw_reset(struct lgdt330x_state *state) 136 { 137 u8 ret; 138 u8 reset[] = { 139 IRQ_MASK, 140 /* 141 * bit 6 is active low software reset 142 * bits 5-0 are 1 to mask interrupts 143 */ 144 0x00 145 }; 146 147 ret = i2c_write_demod_bytes(state, 148 reset, sizeof(reset)); 149 if (ret == 0) { 150 /* force reset high (inactive) and unmask interrupts */ 151 reset[1] = 0x7f; 152 ret = i2c_write_demod_bytes(state, 153 reset, sizeof(reset)); 154 } 155 return ret; 156 } 157 158 static int lgdt3303_sw_reset(struct lgdt330x_state *state) 159 { 160 u8 ret; 161 u8 reset[] = { 162 0x02, 163 0x00 /* bit 0 is active low software reset */ 164 }; 165 166 ret = i2c_write_demod_bytes(state, 167 reset, sizeof(reset)); 168 if (ret == 0) { 169 /* force reset high (inactive) */ 170 reset[1] = 0x01; 171 ret = i2c_write_demod_bytes(state, 172 reset, sizeof(reset)); 173 } 174 return ret; 175 } 176 177 static int lgdt330x_sw_reset(struct lgdt330x_state *state) 178 { 179 switch (state->config.demod_chip) { 180 case LGDT3302: 181 return lgdt3302_sw_reset(state); 182 case LGDT3303: 183 return lgdt3303_sw_reset(state); 184 default: 185 return -ENODEV; 186 } 187 } 188 189 static int lgdt330x_init(struct dvb_frontend *fe) 190 { 191 struct lgdt330x_state *state = fe->demodulator_priv; 192 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 193 char *chip_name; 194 int err; 195 /* 196 * Array of byte pairs <address, value> 197 * to initialize each different chip 198 */ 199 static const u8 lgdt3302_init_data[] = { 200 /* Use 50MHz param values from spec sheet since xtal is 50 */ 201 /* 202 * Change the value of NCOCTFV[25:0] of carrier 203 * recovery center frequency register 204 */ 205 VSB_CARRIER_FREQ0, 0x00, 206 VSB_CARRIER_FREQ1, 0x87, 207 VSB_CARRIER_FREQ2, 0x8e, 208 VSB_CARRIER_FREQ3, 0x01, 209 /* 210 * Change the TPCLK pin polarity 211 * data is valid on falling clock 212 */ 213 DEMUX_CONTROL, 0xfb, 214 /* 215 * Change the value of IFBW[11:0] of 216 * AGC IF/RF loop filter bandwidth register 217 */ 218 AGC_RF_BANDWIDTH0, 0x40, 219 AGC_RF_BANDWIDTH1, 0x93, 220 AGC_RF_BANDWIDTH2, 0x00, 221 /* 222 * Change the value of bit 6, 'nINAGCBY' and 223 * 'NSSEL[1:0] of ACG function control register 2 224 */ 225 AGC_FUNC_CTRL2, 0xc6, 226 /* 227 * Change the value of bit 6 'RFFIX' 228 * of AGC function control register 3 229 */ 230 AGC_FUNC_CTRL3, 0x40, 231 /* 232 * Set the value of 'INLVTHD' register 0x2a/0x2c 233 * to 0x7fe 234 */ 235 AGC_DELAY0, 0x07, 236 AGC_DELAY2, 0xfe, 237 /* 238 * Change the value of IAGCBW[15:8] 239 * of inner AGC loop filter bandwidth 240 */ 241 AGC_LOOP_BANDWIDTH0, 0x08, 242 AGC_LOOP_BANDWIDTH1, 0x9a 243 }; 244 static const u8 lgdt3303_init_data[] = { 245 0x4c, 0x14 246 }; 247 static const u8 flip_1_lgdt3303_init_data[] = { 248 0x4c, 0x14, 249 0x87, 0xf3 250 }; 251 static const u8 flip_2_lgdt3303_init_data[] = { 252 0x4c, 0x14, 253 0x87, 0xda 254 }; 255 256 /* 257 * Hardware reset is done using gpio[0] of cx23880x chip. 258 * I'd like to do it here, but don't know how to find chip address. 259 * cx88-cards.c arranges for the reset bit to be inactive (high). 260 * Maybe there needs to be a callable function in cx88-core or 261 * the caller of this function needs to do it. 262 */ 263 264 switch (state->config.demod_chip) { 265 case LGDT3302: 266 chip_name = "LGDT3302"; 267 err = i2c_write_demod_bytes(state, lgdt3302_init_data, 268 sizeof(lgdt3302_init_data)); 269 break; 270 case LGDT3303: 271 chip_name = "LGDT3303"; 272 switch (state->config.clock_polarity_flip) { 273 case 2: 274 err = i2c_write_demod_bytes(state, 275 flip_2_lgdt3303_init_data, 276 sizeof(flip_2_lgdt3303_init_data)); 277 break; 278 case 1: 279 err = i2c_write_demod_bytes(state, 280 flip_1_lgdt3303_init_data, 281 sizeof(flip_1_lgdt3303_init_data)); 282 break; 283 case 0: 284 default: 285 err = i2c_write_demod_bytes(state, lgdt3303_init_data, 286 sizeof(lgdt3303_init_data)); 287 } 288 break; 289 default: 290 chip_name = "undefined"; 291 dev_warn(&state->client->dev, 292 "Only LGDT3302 and LGDT3303 are supported chips.\n"); 293 err = -ENODEV; 294 } 295 dprintk(state, "Initialized the %s chip\n", chip_name); 296 if (err < 0) 297 return err; 298 299 p->cnr.len = 1; 300 p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 301 p->block_error.len = 1; 302 p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 303 p->block_count.len = 1; 304 p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 305 state->last_stats_time = 0; 306 307 return lgdt330x_sw_reset(state); 308 } 309 310 static int lgdt330x_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 311 { 312 struct lgdt330x_state *state = fe->demodulator_priv; 313 314 *ucblocks = state->ucblocks; 315 316 return 0; 317 } 318 319 static int lgdt330x_set_parameters(struct dvb_frontend *fe) 320 { 321 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 322 struct lgdt330x_state *state = fe->demodulator_priv; 323 /* 324 * Array of byte pairs <address, value> 325 * to initialize 8VSB for lgdt3303 chip 50 MHz IF 326 */ 327 static const u8 lgdt3303_8vsb_44_data[] = { 328 0x04, 0x00, 329 0x0d, 0x40, 330 0x0e, 0x87, 331 0x0f, 0x8e, 332 0x10, 0x01, 333 0x47, 0x8b 334 }; 335 /* 336 * Array of byte pairs <address, value> 337 * to initialize QAM for lgdt3303 chip 338 */ 339 static const u8 lgdt3303_qam_data[] = { 340 0x04, 0x00, 341 0x0d, 0x00, 342 0x0e, 0x00, 343 0x0f, 0x00, 344 0x10, 0x00, 345 0x51, 0x63, 346 0x47, 0x66, 347 0x48, 0x66, 348 0x4d, 0x1a, 349 0x49, 0x08, 350 0x4a, 0x9b 351 }; 352 u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 }; 353 354 int err = 0; 355 /* Change only if we are actually changing the modulation */ 356 if (state->current_modulation != p->modulation) { 357 switch (p->modulation) { 358 case VSB_8: 359 dprintk(state, "VSB_8 MODE\n"); 360 361 /* Select VSB mode */ 362 top_ctrl_cfg[1] = 0x03; 363 364 /* Select ANT connector if supported by card */ 365 if (state->config.pll_rf_set) 366 state->config.pll_rf_set(fe, 1); 367 368 if (state->config.demod_chip == LGDT3303) { 369 err = i2c_write_demod_bytes(state, 370 lgdt3303_8vsb_44_data, 371 sizeof(lgdt3303_8vsb_44_data)); 372 } 373 break; 374 375 case QAM_64: 376 dprintk(state, "QAM_64 MODE\n"); 377 378 /* Select QAM_64 mode */ 379 top_ctrl_cfg[1] = 0x00; 380 381 /* Select CABLE connector if supported by card */ 382 if (state->config.pll_rf_set) 383 state->config.pll_rf_set(fe, 0); 384 385 if (state->config.demod_chip == LGDT3303) { 386 err = i2c_write_demod_bytes(state, 387 lgdt3303_qam_data, 388 sizeof(lgdt3303_qam_data)); 389 } 390 break; 391 392 case QAM_256: 393 dprintk(state, "QAM_256 MODE\n"); 394 395 /* Select QAM_256 mode */ 396 top_ctrl_cfg[1] = 0x01; 397 398 /* Select CABLE connector if supported by card */ 399 if (state->config.pll_rf_set) 400 state->config.pll_rf_set(fe, 0); 401 402 if (state->config.demod_chip == LGDT3303) { 403 err = i2c_write_demod_bytes(state, 404 lgdt3303_qam_data, 405 sizeof(lgdt3303_qam_data)); 406 } 407 break; 408 default: 409 dev_warn(&state->client->dev, 410 "%s: Modulation type(%d) UNSUPPORTED\n", 411 __func__, p->modulation); 412 return -1; 413 } 414 if (err < 0) 415 dev_warn(&state->client->dev, 416 "%s: error blasting bytes to lgdt3303 for modulation type(%d)\n", 417 __func__, p->modulation); 418 419 /* 420 * select serial or parallel MPEG hardware interface 421 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303 422 * Parallel: 0x00 423 */ 424 top_ctrl_cfg[1] |= state->config.serial_mpeg; 425 426 /* Select the requested mode */ 427 i2c_write_demod_bytes(state, top_ctrl_cfg, 428 sizeof(top_ctrl_cfg)); 429 if (state->config.set_ts_params) 430 state->config.set_ts_params(fe, 0); 431 state->current_modulation = p->modulation; 432 } 433 434 /* Tune to the specified frequency */ 435 if (fe->ops.tuner_ops.set_params) { 436 fe->ops.tuner_ops.set_params(fe); 437 if (fe->ops.i2c_gate_ctrl) 438 fe->ops.i2c_gate_ctrl(fe, 0); 439 } 440 441 /* Keep track of the new frequency */ 442 /* 443 * FIXME this is the wrong way to do this... 444 * The tuner is shared with the video4linux analog API 445 */ 446 state->current_frequency = p->frequency; 447 448 lgdt330x_sw_reset(state); 449 return 0; 450 } 451 452 static int lgdt330x_get_frontend(struct dvb_frontend *fe, 453 struct dtv_frontend_properties *p) 454 { 455 struct lgdt330x_state *state = fe->demodulator_priv; 456 457 p->frequency = state->current_frequency; 458 return 0; 459 } 460 461 /* 462 * Calculate SNR estimation (scaled by 2^24) 463 * 464 * 8-VSB SNR equations from LGDT3302 and LGDT3303 datasheets, QAM 465 * equations from LGDT3303 datasheet. VSB is the same between the '02 466 * and '03, so maybe QAM is too? Perhaps someone with a newer datasheet 467 * that has QAM information could verify? 468 * 469 * For 8-VSB: (two ways, take your pick) 470 * LGDT3302: 471 * SNR_EQ = 10 * log10(25 * 24^2 / EQ_MSE) 472 * LGDT3303: 473 * SNR_EQ = 10 * log10(25 * 32^2 / EQ_MSE) 474 * LGDT3302 & LGDT3303: 475 * SNR_PT = 10 * log10(25 * 32^2 / PT_MSE) (we use this one) 476 * For 64-QAM: 477 * SNR = 10 * log10( 688128 / MSEQAM) 478 * For 256-QAM: 479 * SNR = 10 * log10( 696320 / MSEQAM) 480 * 481 * We re-write the snr equation as: 482 * SNR * 2^24 = 10*(c - intlog10(MSE)) 483 * Where for 256-QAM, c = log10(696320) * 2^24, and so on. 484 */ 485 static u32 calculate_snr(u32 mse, u32 c) 486 { 487 if (mse == 0) /* No signal */ 488 return 0; 489 490 mse = intlog10(mse); 491 if (mse > c) { 492 /* 493 * Negative SNR, which is possible, but realisticly the 494 * demod will lose lock before the signal gets this bad. 495 * The API only allows for unsigned values, so just return 0 496 */ 497 return 0; 498 } 499 return 10 * (c - mse); 500 } 501 502 static int lgdt3302_read_snr(struct dvb_frontend *fe) 503 { 504 struct lgdt330x_state *state = fe->demodulator_priv; 505 u8 buf[5]; /* read data buffer */ 506 u32 noise; /* noise value */ 507 u32 c; /* per-modulation SNR calculation constant */ 508 509 switch (state->current_modulation) { 510 case VSB_8: 511 i2c_read_demod_bytes(state, LGDT3302_EQPH_ERR0, buf, 5); 512 #ifdef USE_EQMSE 513 /* Use Equalizer Mean-Square Error Register */ 514 /* SNR for ranges from -15.61 to +41.58 */ 515 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2]; 516 c = 69765745; /* log10(25*24^2)*2^24 */ 517 #else 518 /* Use Phase Tracker Mean-Square Error Register */ 519 /* SNR for ranges from -13.11 to +44.08 */ 520 noise = ((buf[0] & 7 << 3) << 13) | (buf[3] << 8) | buf[4]; 521 c = 73957994; /* log10(25*32^2)*2^24 */ 522 #endif 523 break; 524 case QAM_64: 525 case QAM_256: 526 i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2); 527 noise = ((buf[0] & 3) << 8) | buf[1]; 528 c = state->current_modulation == QAM_64 ? 97939837 : 98026066; 529 /* log10(688128)*2^24 and log10(696320)*2^24 */ 530 break; 531 default: 532 dev_err(&state->client->dev, 533 "%s: Modulation set to unsupported value\n", 534 __func__); 535 536 state->snr = 0; 537 538 return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */ 539 } 540 541 state->snr = calculate_snr(noise, c); 542 543 dprintk(state, "noise = 0x%08x, snr = %d.%02d dB\n", noise, 544 state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16); 545 546 return 0; 547 } 548 549 static int lgdt3303_read_snr(struct dvb_frontend *fe) 550 { 551 struct lgdt330x_state *state = fe->demodulator_priv; 552 u8 buf[5]; /* read data buffer */ 553 u32 noise; /* noise value */ 554 u32 c; /* per-modulation SNR calculation constant */ 555 556 switch (state->current_modulation) { 557 case VSB_8: 558 i2c_read_demod_bytes(state, LGDT3303_EQPH_ERR0, buf, 5); 559 #ifdef USE_EQMSE 560 /* Use Equalizer Mean-Square Error Register */ 561 /* SNR for ranges from -16.12 to +44.08 */ 562 noise = ((buf[0] & 0x78) << 13) | (buf[1] << 8) | buf[2]; 563 c = 73957994; /* log10(25*32^2)*2^24 */ 564 #else 565 /* Use Phase Tracker Mean-Square Error Register */ 566 /* SNR for ranges from -13.11 to +44.08 */ 567 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4]; 568 c = 73957994; /* log10(25*32^2)*2^24 */ 569 #endif 570 break; 571 case QAM_64: 572 case QAM_256: 573 i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2); 574 noise = (buf[0] << 8) | buf[1]; 575 c = state->current_modulation == QAM_64 ? 97939837 : 98026066; 576 /* log10(688128)*2^24 and log10(696320)*2^24 */ 577 break; 578 default: 579 dev_err(&state->client->dev, 580 "%s: Modulation set to unsupported value\n", 581 __func__); 582 state->snr = 0; 583 return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */ 584 } 585 586 state->snr = calculate_snr(noise, c); 587 588 dprintk(state, "noise = 0x%08x, snr = %d.%02d dB\n", noise, 589 state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16); 590 591 return 0; 592 } 593 594 static int lgdt330x_read_snr(struct dvb_frontend *fe, u16 *snr) 595 { 596 struct lgdt330x_state *state = fe->demodulator_priv; 597 598 *snr = (state->snr) >> 16; /* Convert from 8.24 fixed-point to 8.8 */ 599 600 return 0; 601 } 602 603 static int lgdt330x_read_signal_strength(struct dvb_frontend *fe, u16 *strength) 604 { 605 /* Calculate Strength from SNR up to 35dB */ 606 /* 607 * Even though the SNR can go higher than 35dB, there is some comfort 608 * factor in having a range of strong signals that can show at 100% 609 */ 610 struct lgdt330x_state *state = fe->demodulator_priv; 611 u16 snr; 612 int ret; 613 614 ret = fe->ops.read_snr(fe, &snr); 615 if (ret != 0) 616 return ret; 617 /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */ 618 /* scale the range 0 - 35*2^24 into 0 - 65535 */ 619 if (state->snr >= 8960 * 0x10000) 620 *strength = 0xffff; 621 else 622 *strength = state->snr / 8960; 623 624 return 0; 625 } 626 627 628 static int lgdt3302_read_status(struct dvb_frontend *fe, 629 enum fe_status *status) 630 { 631 struct lgdt330x_state *state = fe->demodulator_priv; 632 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 633 u8 buf[3]; 634 int err; 635 636 *status = 0; /* Reset status result */ 637 638 /* AGC status register */ 639 i2c_read_demod_bytes(state, AGC_STATUS, buf, 1); 640 dprintk(state, "AGC_STATUS = 0x%02x\n", buf[0]); 641 if ((buf[0] & 0x0c) == 0x8) { 642 /* 643 * Test signal does not exist flag 644 * as well as the AGC lock flag. 645 */ 646 *status |= FE_HAS_SIGNAL; 647 } 648 649 /* 650 * You must set the Mask bits to 1 in the IRQ_MASK in order 651 * to see that status bit in the IRQ_STATUS register. 652 * This is done in SwReset(); 653 */ 654 655 /* signal status */ 656 i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf)); 657 dprintk(state, 658 "TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", 659 buf[0], buf[1], buf[2]); 660 661 /* sync status */ 662 if ((buf[2] & 0x03) == 0x01) 663 *status |= FE_HAS_SYNC; 664 665 /* FEC error status */ 666 if ((buf[2] & 0x0c) == 0x08) 667 *status |= FE_HAS_LOCK | FE_HAS_VITERBI; 668 669 /* Carrier Recovery Lock Status Register */ 670 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1); 671 dprintk(state, "CARRIER_LOCK = 0x%02x\n", buf[0]); 672 switch (state->current_modulation) { 673 case QAM_256: 674 case QAM_64: 675 /* Need to understand why there are 3 lock levels here */ 676 if ((buf[0] & 0x07) == 0x07) 677 *status |= FE_HAS_CARRIER; 678 break; 679 case VSB_8: 680 if ((buf[0] & 0x80) == 0x80) 681 *status |= FE_HAS_CARRIER; 682 break; 683 default: 684 dev_warn(&state->client->dev, 685 "%s: Modulation set to unsupported value\n", 686 __func__); 687 } 688 689 if (!(*status & FE_HAS_LOCK)) { 690 p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 691 p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 692 p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 693 return 0; 694 } 695 696 if (state->last_stats_time && 697 time_is_after_jiffies(state->last_stats_time)) 698 return 0; 699 700 state->last_stats_time = jiffies + msecs_to_jiffies(1000); 701 702 err = lgdt3302_read_snr(fe); 703 if (!err) { 704 p->cnr.stat[0].scale = FE_SCALE_DECIBEL; 705 p->cnr.stat[0].svalue = (((u64)state->snr) * 1000) >> 24; 706 } else { 707 p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 708 } 709 710 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1, 711 buf, sizeof(buf)); 712 if (!err) { 713 state->ucblocks = (buf[0] << 8) | buf[1]; 714 715 dprintk(state, "UCB = 0x%02x\n", state->ucblocks); 716 717 p->block_error.stat[0].uvalue += state->ucblocks; 718 /* FIXME: what's the basis for block count */ 719 p->block_count.stat[0].uvalue += 10000; 720 721 p->block_error.stat[0].scale = FE_SCALE_COUNTER; 722 p->block_count.stat[0].scale = FE_SCALE_COUNTER; 723 } else { 724 p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 725 p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 726 } 727 728 return 0; 729 } 730 731 static int lgdt3303_read_status(struct dvb_frontend *fe, 732 enum fe_status *status) 733 { 734 struct lgdt330x_state *state = fe->demodulator_priv; 735 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 736 u8 buf[3]; 737 int err; 738 739 *status = 0; /* Reset status result */ 740 741 /* lgdt3303 AGC status register */ 742 err = i2c_read_demod_bytes(state, 0x58, buf, 1); 743 if (err < 0) 744 return err; 745 746 dprintk(state, "AGC_STATUS = 0x%02x\n", buf[0]); 747 if ((buf[0] & 0x21) == 0x01) { 748 /* 749 * Test input signal does not exist flag 750 * as well as the AGC lock flag. 751 */ 752 *status |= FE_HAS_SIGNAL; 753 } 754 755 /* Carrier Recovery Lock Status Register */ 756 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1); 757 dprintk(state, "CARRIER_LOCK = 0x%02x\n", buf[0]); 758 switch (state->current_modulation) { 759 case QAM_256: 760 case QAM_64: 761 /* Need to understand why there are 3 lock levels here */ 762 if ((buf[0] & 0x07) == 0x07) 763 *status |= FE_HAS_CARRIER; 764 else 765 break; 766 i2c_read_demod_bytes(state, 0x8a, buf, 1); 767 dprintk(state, "QAM LOCK = 0x%02x\n", buf[0]); 768 769 if ((buf[0] & 0x04) == 0x04) 770 *status |= FE_HAS_SYNC; 771 if ((buf[0] & 0x01) == 0x01) 772 *status |= FE_HAS_LOCK; 773 if ((buf[0] & 0x08) == 0x08) 774 *status |= FE_HAS_VITERBI; 775 break; 776 case VSB_8: 777 if ((buf[0] & 0x80) == 0x80) 778 *status |= FE_HAS_CARRIER; 779 else 780 break; 781 i2c_read_demod_bytes(state, 0x38, buf, 1); 782 dprintk(state, "8-VSB LOCK = 0x%02x\n", buf[0]); 783 784 if ((buf[0] & 0x02) == 0x00) 785 *status |= FE_HAS_SYNC; 786 if ((buf[0] & 0xfd) == 0x01) 787 *status |= FE_HAS_VITERBI | FE_HAS_LOCK; 788 break; 789 default: 790 dev_warn(&state->client->dev, 791 "%s: Modulation set to unsupported value\n", 792 __func__); 793 } 794 795 if (!(*status & FE_HAS_LOCK)) { 796 p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 797 p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 798 p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 799 return 0; 800 } 801 802 if (state->last_stats_time && 803 time_is_after_jiffies(state->last_stats_time)) 804 return 0; 805 806 state->last_stats_time = jiffies + msecs_to_jiffies(1000); 807 808 err = lgdt3303_read_snr(fe); 809 if (!err) { 810 p->cnr.stat[0].scale = FE_SCALE_DECIBEL; 811 p->cnr.stat[0].svalue = (((u64)state->snr) * 1000) >> 24; 812 } else { 813 p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 814 } 815 816 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1, 817 buf, sizeof(buf)); 818 if (!err) { 819 state->ucblocks = (buf[0] << 8) | buf[1]; 820 821 dprintk(state, "UCB = 0x%02x\n", state->ucblocks); 822 823 p->block_error.stat[0].uvalue += state->ucblocks; 824 /* FIXME: what's the basis for block count */ 825 p->block_count.stat[0].uvalue += 10000; 826 827 p->block_error.stat[0].scale = FE_SCALE_COUNTER; 828 p->block_count.stat[0].scale = FE_SCALE_COUNTER; 829 } else { 830 p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 831 p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 832 } 833 834 return 0; 835 } 836 837 static int 838 lgdt330x_get_tune_settings(struct dvb_frontend *fe, 839 struct dvb_frontend_tune_settings *fe_tune_settings) 840 { 841 /* I have no idea about this - it may not be needed */ 842 fe_tune_settings->min_delay_ms = 500; 843 fe_tune_settings->step_size = 0; 844 fe_tune_settings->max_drift = 0; 845 return 0; 846 } 847 848 static void lgdt330x_release(struct dvb_frontend *fe) 849 { 850 struct lgdt330x_state *state = fe->demodulator_priv; 851 struct i2c_client *client = state->client; 852 853 dev_dbg(&client->dev, "\n"); 854 855 i2c_unregister_device(client); 856 } 857 858 static struct dvb_frontend *lgdt330x_get_dvb_frontend(struct i2c_client *client) 859 { 860 struct lgdt330x_state *state = i2c_get_clientdata(client); 861 862 dev_dbg(&client->dev, "\n"); 863 864 return &state->frontend; 865 } 866 867 static const struct dvb_frontend_ops lgdt3302_ops; 868 static const struct dvb_frontend_ops lgdt3303_ops; 869 870 static int lgdt330x_probe(struct i2c_client *client, 871 const struct i2c_device_id *id) 872 { 873 struct lgdt330x_state *state = NULL; 874 u8 buf[1]; 875 876 /* Allocate memory for the internal state */ 877 state = kzalloc(sizeof(*state), GFP_KERNEL); 878 if (!state) 879 goto error; 880 881 /* Setup the state */ 882 memcpy(&state->config, client->dev.platform_data, 883 sizeof(state->config)); 884 i2c_set_clientdata(client, state); 885 state->client = client; 886 887 /* Create dvb_frontend */ 888 switch (state->config.demod_chip) { 889 case LGDT3302: 890 memcpy(&state->frontend.ops, &lgdt3302_ops, 891 sizeof(struct dvb_frontend_ops)); 892 break; 893 case LGDT3303: 894 memcpy(&state->frontend.ops, &lgdt3303_ops, 895 sizeof(struct dvb_frontend_ops)); 896 break; 897 default: 898 goto error; 899 } 900 state->frontend.demodulator_priv = state; 901 902 /* Setup get frontend callback */ 903 state->config.get_dvb_frontend = lgdt330x_get_dvb_frontend; 904 905 /* Verify communication with demod chip */ 906 if (i2c_read_demod_bytes(state, 2, buf, 1)) 907 goto error; 908 909 state->current_frequency = -1; 910 state->current_modulation = -1; 911 912 dev_info(&state->client->dev, 913 "Demod loaded for LGDT330%s chip\n", 914 state->config.demod_chip == LGDT3302 ? "2" : "3"); 915 916 return 0; 917 918 error: 919 kfree(state); 920 if (debug) 921 dev_printk(KERN_DEBUG, &client->dev, "Error loading lgdt330x driver\n"); 922 return -ENODEV; 923 } 924 struct dvb_frontend *lgdt330x_attach(const struct lgdt330x_config *_config, 925 u8 demod_address, 926 struct i2c_adapter *i2c) 927 { 928 struct i2c_client *client; 929 struct i2c_board_info board_info = {}; 930 struct lgdt330x_config config = *_config; 931 932 strscpy(board_info.type, "lgdt330x", sizeof(board_info.type)); 933 board_info.addr = demod_address; 934 board_info.platform_data = &config; 935 client = i2c_new_device(i2c, &board_info); 936 if (!client || !client->dev.driver) 937 return NULL; 938 939 return lgdt330x_get_dvb_frontend(client); 940 } 941 EXPORT_SYMBOL(lgdt330x_attach); 942 943 static const struct dvb_frontend_ops lgdt3302_ops = { 944 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B }, 945 .info = { 946 .name = "LG Electronics LGDT3302 VSB/QAM Frontend", 947 .frequency_min_hz = 54 * MHz, 948 .frequency_max_hz = 858 * MHz, 949 .frequency_stepsize_hz = 62500, 950 .symbol_rate_min = 5056941, /* QAM 64 */ 951 .symbol_rate_max = 10762000, /* VSB 8 */ 952 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB 953 }, 954 .init = lgdt330x_init, 955 .set_frontend = lgdt330x_set_parameters, 956 .get_frontend = lgdt330x_get_frontend, 957 .get_tune_settings = lgdt330x_get_tune_settings, 958 .read_status = lgdt3302_read_status, 959 .read_signal_strength = lgdt330x_read_signal_strength, 960 .read_snr = lgdt330x_read_snr, 961 .read_ucblocks = lgdt330x_read_ucblocks, 962 .release = lgdt330x_release, 963 }; 964 965 static const struct dvb_frontend_ops lgdt3303_ops = { 966 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B }, 967 .info = { 968 .name = "LG Electronics LGDT3303 VSB/QAM Frontend", 969 .frequency_min_hz = 54 * MHz, 970 .frequency_max_hz = 858 * MHz, 971 .frequency_stepsize_hz = 62500, 972 .symbol_rate_min = 5056941, /* QAM 64 */ 973 .symbol_rate_max = 10762000, /* VSB 8 */ 974 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB 975 }, 976 .init = lgdt330x_init, 977 .set_frontend = lgdt330x_set_parameters, 978 .get_frontend = lgdt330x_get_frontend, 979 .get_tune_settings = lgdt330x_get_tune_settings, 980 .read_status = lgdt3303_read_status, 981 .read_signal_strength = lgdt330x_read_signal_strength, 982 .read_snr = lgdt330x_read_snr, 983 .read_ucblocks = lgdt330x_read_ucblocks, 984 .release = lgdt330x_release, 985 }; 986 987 static int lgdt330x_remove(struct i2c_client *client) 988 { 989 struct lgdt330x_state *state = i2c_get_clientdata(client); 990 991 dev_dbg(&client->dev, "\n"); 992 993 kfree(state); 994 995 return 0; 996 } 997 998 static const struct i2c_device_id lgdt330x_id_table[] = { 999 {"lgdt330x", 0}, 1000 {} 1001 }; 1002 MODULE_DEVICE_TABLE(i2c, lgdt330x_id_table); 1003 1004 static struct i2c_driver lgdt330x_driver = { 1005 .driver = { 1006 .name = "lgdt330x", 1007 .suppress_bind_attrs = true, 1008 }, 1009 .probe = lgdt330x_probe, 1010 .remove = lgdt330x_remove, 1011 .id_table = lgdt330x_id_table, 1012 }; 1013 1014 module_i2c_driver(lgdt330x_driver); 1015 1016 1017 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver"); 1018 MODULE_AUTHOR("Wilson Michaels"); 1019 MODULE_LICENSE("GPL"); 1020