1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *    Support for LGDT3302 and LGDT3303 - VSB/QAM
4  *
5  *    Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
6  */
7 
8 /*
9  *                      NOTES ABOUT THIS DRIVER
10  *
11  * This Linux driver supports:
12  *   DViCO FusionHDTV 3 Gold-Q
13  *   DViCO FusionHDTV 3 Gold-T
14  *   DViCO FusionHDTV 5 Gold
15  *   DViCO FusionHDTV 5 Lite
16  *   DViCO FusionHDTV 5 USB Gold
17  *   Air2PC/AirStar 2 ATSC 3rd generation (HD5000)
18  *   pcHDTV HD5500
19  *
20  */
21 
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/string.h>
27 #include <linux/slab.h>
28 #include <asm/byteorder.h>
29 
30 #include <media/dvb_frontend.h>
31 #include <media/dvb_math.h>
32 #include "lgdt330x_priv.h"
33 #include "lgdt330x.h"
34 
35 /* Use Equalizer Mean Squared Error instead of Phaser Tracker MSE */
36 /* #define USE_EQMSE */
37 
38 static int debug;
39 module_param(debug, int, 0644);
40 MODULE_PARM_DESC(debug, "Turn on/off lgdt330x frontend debugging (default:off).");
41 
42 #define dprintk(state, fmt, arg...) do {				\
43 	if (debug)							\
44 		dev_printk(KERN_DEBUG, &state->client->dev, fmt, ##arg);\
45 } while (0)
46 
47 struct lgdt330x_state {
48 	struct i2c_client *client;
49 
50 	/* Configuration settings */
51 	struct lgdt330x_config config;
52 
53 	struct dvb_frontend frontend;
54 
55 	/* Demodulator private data */
56 	enum fe_modulation current_modulation;
57 	u32 snr;	/* Result of last SNR calculation */
58 	u16 ucblocks;
59 	unsigned long last_stats_time;
60 
61 	/* Tuner private data */
62 	u32 current_frequency;
63 };
64 
65 static int i2c_write_demod_bytes(struct lgdt330x_state *state,
66 				 const u8 *buf, /* data bytes to send */
67 				 int len  /* number of bytes to send */)
68 {
69 	int i;
70 	int err;
71 
72 	for (i = 0; i < len - 1; i += 2) {
73 		err = i2c_master_send(state->client, buf, 2);
74 		if (err != 2) {
75 			dev_warn(&state->client->dev,
76 				 "%s: error (addr %02x <- %02x, err = %i)\n",
77 				__func__, buf[0], buf[1], err);
78 			if (err < 0)
79 				return err;
80 			else
81 				return -EREMOTEIO;
82 		}
83 		buf += 2;
84 	}
85 	return 0;
86 }
87 
88 /*
89  * This routine writes the register (reg) to the demod bus
90  * then reads the data returned for (len) bytes.
91  */
92 static int i2c_read_demod_bytes(struct lgdt330x_state *state,
93 				enum I2C_REG reg, u8 *buf, int len)
94 {
95 	u8 wr[] = { reg };
96 	struct i2c_msg msg[] = {
97 		{
98 			.addr = state->client->addr,
99 			.flags = 0,
100 			.buf = wr,
101 			.len = 1
102 		}, {
103 			.addr = state->client->addr,
104 			.flags = I2C_M_RD,
105 			.buf = buf,
106 			.len = len
107 		},
108 	};
109 	int ret;
110 
111 	ret = i2c_transfer(state->client->adapter, msg, 2);
112 	if (ret != 2) {
113 		dev_warn(&state->client->dev,
114 			 "%s: addr 0x%02x select 0x%02x error (ret == %i)\n",
115 			 __func__, state->client->addr, reg, ret);
116 		if (ret >= 0)
117 			ret = -EIO;
118 	} else {
119 		ret = 0;
120 	}
121 	return ret;
122 }
123 
124 /* Software reset */
125 static int lgdt3302_sw_reset(struct lgdt330x_state *state)
126 {
127 	u8 ret;
128 	u8 reset[] = {
129 		IRQ_MASK,
130 		/*
131 		 * bit 6 is active low software reset
132 		 * bits 5-0 are 1 to mask interrupts
133 		 */
134 		0x00
135 	};
136 
137 	ret = i2c_write_demod_bytes(state,
138 				    reset, sizeof(reset));
139 	if (ret == 0) {
140 		/* force reset high (inactive) and unmask interrupts */
141 		reset[1] = 0x7f;
142 		ret = i2c_write_demod_bytes(state,
143 					    reset, sizeof(reset));
144 	}
145 	return ret;
146 }
147 
148 static int lgdt3303_sw_reset(struct lgdt330x_state *state)
149 {
150 	u8 ret;
151 	u8 reset[] = {
152 		0x02,
153 		0x00 /* bit 0 is active low software reset */
154 	};
155 
156 	ret = i2c_write_demod_bytes(state,
157 				    reset, sizeof(reset));
158 	if (ret == 0) {
159 		/* force reset high (inactive) */
160 		reset[1] = 0x01;
161 		ret = i2c_write_demod_bytes(state,
162 					    reset, sizeof(reset));
163 	}
164 	return ret;
165 }
166 
167 static int lgdt330x_sw_reset(struct lgdt330x_state *state)
168 {
169 	switch (state->config.demod_chip) {
170 	case LGDT3302:
171 		return lgdt3302_sw_reset(state);
172 	case LGDT3303:
173 		return lgdt3303_sw_reset(state);
174 	default:
175 		return -ENODEV;
176 	}
177 }
178 
179 static int lgdt330x_init(struct dvb_frontend *fe)
180 {
181 	struct lgdt330x_state *state = fe->demodulator_priv;
182 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
183 	char  *chip_name;
184 	int    err;
185 	/*
186 	 * Array of byte pairs <address, value>
187 	 * to initialize each different chip
188 	 */
189 	static const u8 lgdt3302_init_data[] = {
190 		/* Use 50MHz param values from spec sheet since xtal is 50 */
191 		/*
192 		 * Change the value of NCOCTFV[25:0] of carrier
193 		 * recovery center frequency register
194 		 */
195 		VSB_CARRIER_FREQ0, 0x00,
196 		VSB_CARRIER_FREQ1, 0x87,
197 		VSB_CARRIER_FREQ2, 0x8e,
198 		VSB_CARRIER_FREQ3, 0x01,
199 		/*
200 		 * Change the TPCLK pin polarity
201 		 * data is valid on falling clock
202 		 */
203 		DEMUX_CONTROL, 0xfb,
204 		/*
205 		 * Change the value of IFBW[11:0] of
206 		 * AGC IF/RF loop filter bandwidth register
207 		 */
208 		AGC_RF_BANDWIDTH0, 0x40,
209 		AGC_RF_BANDWIDTH1, 0x93,
210 		AGC_RF_BANDWIDTH2, 0x00,
211 		/*
212 		 * Change the value of bit 6, 'nINAGCBY' and
213 		 * 'NSSEL[1:0] of ACG function control register 2
214 		 */
215 		AGC_FUNC_CTRL2, 0xc6,
216 		/*
217 		 * Change the value of bit 6 'RFFIX'
218 		 * of AGC function control register 3
219 		 */
220 		AGC_FUNC_CTRL3, 0x40,
221 		/*
222 		 * Set the value of 'INLVTHD' register 0x2a/0x2c
223 		 * to 0x7fe
224 		 */
225 		AGC_DELAY0, 0x07,
226 		AGC_DELAY2, 0xfe,
227 		/*
228 		 * Change the value of IAGCBW[15:8]
229 		 * of inner AGC loop filter bandwidth
230 		 */
231 		AGC_LOOP_BANDWIDTH0, 0x08,
232 		AGC_LOOP_BANDWIDTH1, 0x9a
233 	};
234 	static const u8 lgdt3303_init_data[] = {
235 		0x4c, 0x14
236 	};
237 	static const u8 flip_1_lgdt3303_init_data[] = {
238 		0x4c, 0x14,
239 		0x87, 0xf3
240 	};
241 	static const u8 flip_2_lgdt3303_init_data[] = {
242 		0x4c, 0x14,
243 		0x87, 0xda
244 	};
245 
246 	/*
247 	 * Hardware reset is done using gpio[0] of cx23880x chip.
248 	 * I'd like to do it here, but don't know how to find chip address.
249 	 * cx88-cards.c arranges for the reset bit to be inactive (high).
250 	 * Maybe there needs to be a callable function in cx88-core or
251 	 * the caller of this function needs to do it.
252 	 */
253 
254 	switch (state->config.demod_chip) {
255 	case LGDT3302:
256 		chip_name = "LGDT3302";
257 		err = i2c_write_demod_bytes(state, lgdt3302_init_data,
258 					    sizeof(lgdt3302_init_data));
259 		break;
260 	case LGDT3303:
261 		chip_name = "LGDT3303";
262 		switch (state->config.clock_polarity_flip) {
263 		case 2:
264 			err = i2c_write_demod_bytes(state,
265 						    flip_2_lgdt3303_init_data,
266 						    sizeof(flip_2_lgdt3303_init_data));
267 			break;
268 		case 1:
269 			err = i2c_write_demod_bytes(state,
270 						    flip_1_lgdt3303_init_data,
271 						    sizeof(flip_1_lgdt3303_init_data));
272 			break;
273 		case 0:
274 		default:
275 			err = i2c_write_demod_bytes(state, lgdt3303_init_data,
276 						    sizeof(lgdt3303_init_data));
277 		}
278 		break;
279 	default:
280 		chip_name = "undefined";
281 		dev_warn(&state->client->dev,
282 			 "Only LGDT3302 and LGDT3303 are supported chips.\n");
283 		err = -ENODEV;
284 	}
285 	dprintk(state, "Initialized the %s chip\n", chip_name);
286 	if (err < 0)
287 		return err;
288 
289 	p->cnr.len = 1;
290 	p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
291 	p->block_error.len = 1;
292 	p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
293 	p->block_count.len = 1;
294 	p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
295 	state->last_stats_time = 0;
296 
297 	return lgdt330x_sw_reset(state);
298 }
299 
300 static int lgdt330x_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
301 {
302 	struct lgdt330x_state *state = fe->demodulator_priv;
303 
304 	*ucblocks = state->ucblocks;
305 
306 	return 0;
307 }
308 
309 static int lgdt330x_set_parameters(struct dvb_frontend *fe)
310 {
311 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
312 	struct lgdt330x_state *state = fe->demodulator_priv;
313 	/*
314 	 * Array of byte pairs <address, value>
315 	 * to initialize 8VSB for lgdt3303 chip 50 MHz IF
316 	 */
317 	static const u8 lgdt3303_8vsb_44_data[] = {
318 		0x04, 0x00,
319 		0x0d, 0x40,
320 		0x0e, 0x87,
321 		0x0f, 0x8e,
322 		0x10, 0x01,
323 		0x47, 0x8b
324 	};
325 	/*
326 	 * Array of byte pairs <address, value>
327 	 * to initialize QAM for lgdt3303 chip
328 	 */
329 	static const u8 lgdt3303_qam_data[] = {
330 		0x04, 0x00,
331 		0x0d, 0x00,
332 		0x0e, 0x00,
333 		0x0f, 0x00,
334 		0x10, 0x00,
335 		0x51, 0x63,
336 		0x47, 0x66,
337 		0x48, 0x66,
338 		0x4d, 0x1a,
339 		0x49, 0x08,
340 		0x4a, 0x9b
341 	};
342 	u8 top_ctrl_cfg[]   = { TOP_CONTROL, 0x03 };
343 
344 	int err = 0;
345 	/* Change only if we are actually changing the modulation */
346 	if (state->current_modulation != p->modulation) {
347 		switch (p->modulation) {
348 		case VSB_8:
349 			dprintk(state, "VSB_8 MODE\n");
350 
351 			/* Select VSB mode */
352 			top_ctrl_cfg[1] = 0x03;
353 
354 			/* Select ANT connector if supported by card */
355 			if (state->config.pll_rf_set)
356 				state->config.pll_rf_set(fe, 1);
357 
358 			if (state->config.demod_chip == LGDT3303) {
359 				err = i2c_write_demod_bytes(state,
360 							    lgdt3303_8vsb_44_data,
361 							    sizeof(lgdt3303_8vsb_44_data));
362 			}
363 			break;
364 
365 		case QAM_64:
366 			dprintk(state, "QAM_64 MODE\n");
367 
368 			/* Select QAM_64 mode */
369 			top_ctrl_cfg[1] = 0x00;
370 
371 			/* Select CABLE connector if supported by card */
372 			if (state->config.pll_rf_set)
373 				state->config.pll_rf_set(fe, 0);
374 
375 			if (state->config.demod_chip == LGDT3303) {
376 				err = i2c_write_demod_bytes(state,
377 							    lgdt3303_qam_data,
378 							    sizeof(lgdt3303_qam_data));
379 			}
380 			break;
381 
382 		case QAM_256:
383 			dprintk(state, "QAM_256 MODE\n");
384 
385 			/* Select QAM_256 mode */
386 			top_ctrl_cfg[1] = 0x01;
387 
388 			/* Select CABLE connector if supported by card */
389 			if (state->config.pll_rf_set)
390 				state->config.pll_rf_set(fe, 0);
391 
392 			if (state->config.demod_chip == LGDT3303) {
393 				err = i2c_write_demod_bytes(state,
394 							    lgdt3303_qam_data,
395 							    sizeof(lgdt3303_qam_data));
396 			}
397 			break;
398 		default:
399 			dev_warn(&state->client->dev,
400 				 "%s: Modulation type(%d) UNSUPPORTED\n",
401 				 __func__, p->modulation);
402 			return -1;
403 		}
404 		if (err < 0)
405 			dev_warn(&state->client->dev,
406 				 "%s: error blasting bytes to lgdt3303 for modulation type(%d)\n",
407 				 __func__, p->modulation);
408 
409 		/*
410 		 * select serial or parallel MPEG hardware interface
411 		 * Serial:   0x04 for LGDT3302 or 0x40 for LGDT3303
412 		 * Parallel: 0x00
413 		 */
414 		top_ctrl_cfg[1] |= state->config.serial_mpeg;
415 
416 		/* Select the requested mode */
417 		i2c_write_demod_bytes(state, top_ctrl_cfg,
418 				      sizeof(top_ctrl_cfg));
419 		if (state->config.set_ts_params)
420 			state->config.set_ts_params(fe, 0);
421 		state->current_modulation = p->modulation;
422 	}
423 
424 	/* Tune to the specified frequency */
425 	if (fe->ops.tuner_ops.set_params) {
426 		fe->ops.tuner_ops.set_params(fe);
427 		if (fe->ops.i2c_gate_ctrl)
428 			fe->ops.i2c_gate_ctrl(fe, 0);
429 	}
430 
431 	/* Keep track of the new frequency */
432 	/*
433 	 * FIXME this is the wrong way to do this...
434 	 * The tuner is shared with the video4linux analog API
435 	 */
436 	state->current_frequency = p->frequency;
437 
438 	lgdt330x_sw_reset(state);
439 	return 0;
440 }
441 
442 static int lgdt330x_get_frontend(struct dvb_frontend *fe,
443 				 struct dtv_frontend_properties *p)
444 {
445 	struct lgdt330x_state *state = fe->demodulator_priv;
446 
447 	p->frequency = state->current_frequency;
448 	return 0;
449 }
450 
451 /*
452  * Calculate SNR estimation (scaled by 2^24)
453  *
454  * 8-VSB SNR equations from LGDT3302 and LGDT3303 datasheets, QAM
455  * equations from LGDT3303 datasheet.  VSB is the same between the '02
456  * and '03, so maybe QAM is too?  Perhaps someone with a newer datasheet
457  * that has QAM information could verify?
458  *
459  * For 8-VSB: (two ways, take your pick)
460  * LGDT3302:
461  *   SNR_EQ = 10 * log10(25 * 24^2 / EQ_MSE)
462  * LGDT3303:
463  *   SNR_EQ = 10 * log10(25 * 32^2 / EQ_MSE)
464  * LGDT3302 & LGDT3303:
465  *   SNR_PT = 10 * log10(25 * 32^2 / PT_MSE)  (we use this one)
466  * For 64-QAM:
467  *   SNR    = 10 * log10( 688128   / MSEQAM)
468  * For 256-QAM:
469  *   SNR    = 10 * log10( 696320   / MSEQAM)
470  *
471  * We re-write the snr equation as:
472  *   SNR * 2^24 = 10*(c - intlog10(MSE))
473  * Where for 256-QAM, c = log10(696320) * 2^24, and so on.
474  */
475 static u32 calculate_snr(u32 mse, u32 c)
476 {
477 	if (mse == 0) /* No signal */
478 		return 0;
479 
480 	mse = intlog10(mse);
481 	if (mse > c) {
482 		/*
483 		 * Negative SNR, which is possible, but realisticly the
484 		 * demod will lose lock before the signal gets this bad.
485 		 * The API only allows for unsigned values, so just return 0
486 		 */
487 		return 0;
488 	}
489 	return 10 * (c - mse);
490 }
491 
492 static int lgdt3302_read_snr(struct dvb_frontend *fe)
493 {
494 	struct lgdt330x_state *state = fe->demodulator_priv;
495 	u8 buf[5];	/* read data buffer */
496 	u32 noise;	/* noise value */
497 	u32 c;		/* per-modulation SNR calculation constant */
498 
499 	switch (state->current_modulation) {
500 	case VSB_8:
501 		i2c_read_demod_bytes(state, LGDT3302_EQPH_ERR0, buf, 5);
502 #ifdef USE_EQMSE
503 		/* Use Equalizer Mean-Square Error Register */
504 		/* SNR for ranges from -15.61 to +41.58 */
505 		noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
506 		c = 69765745; /* log10(25*24^2)*2^24 */
507 #else
508 		/* Use Phase Tracker Mean-Square Error Register */
509 		/* SNR for ranges from -13.11 to +44.08 */
510 		noise = ((buf[0] & 7 << 3) << 13) | (buf[3] << 8) | buf[4];
511 		c = 73957994; /* log10(25*32^2)*2^24 */
512 #endif
513 		break;
514 	case QAM_64:
515 	case QAM_256:
516 		i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2);
517 		noise = ((buf[0] & 3) << 8) | buf[1];
518 		c = state->current_modulation == QAM_64 ? 97939837 : 98026066;
519 		/* log10(688128)*2^24 and log10(696320)*2^24 */
520 		break;
521 	default:
522 		dev_err(&state->client->dev,
523 			"%s: Modulation set to unsupported value\n",
524 			__func__);
525 
526 		state->snr = 0;
527 
528 		return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */
529 	}
530 
531 	state->snr = calculate_snr(noise, c);
532 
533 	dprintk(state, "noise = 0x%08x, snr = %d.%02d dB\n", noise,
534 		state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16);
535 
536 	return 0;
537 }
538 
539 static int lgdt3303_read_snr(struct dvb_frontend *fe)
540 {
541 	struct lgdt330x_state *state = fe->demodulator_priv;
542 	u8 buf[5];	/* read data buffer */
543 	u32 noise;	/* noise value */
544 	u32 c;		/* per-modulation SNR calculation constant */
545 
546 	switch (state->current_modulation) {
547 	case VSB_8:
548 		i2c_read_demod_bytes(state, LGDT3303_EQPH_ERR0, buf, 5);
549 #ifdef USE_EQMSE
550 		/* Use Equalizer Mean-Square Error Register */
551 		/* SNR for ranges from -16.12 to +44.08 */
552 		noise = ((buf[0] & 0x78) << 13) | (buf[1] << 8) | buf[2];
553 		c = 73957994; /* log10(25*32^2)*2^24 */
554 #else
555 		/* Use Phase Tracker Mean-Square Error Register */
556 		/* SNR for ranges from -13.11 to +44.08 */
557 		noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
558 		c = 73957994; /* log10(25*32^2)*2^24 */
559 #endif
560 		break;
561 	case QAM_64:
562 	case QAM_256:
563 		i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2);
564 		noise = (buf[0] << 8) | buf[1];
565 		c = state->current_modulation == QAM_64 ? 97939837 : 98026066;
566 		/* log10(688128)*2^24 and log10(696320)*2^24 */
567 		break;
568 	default:
569 		dev_err(&state->client->dev,
570 			"%s: Modulation set to unsupported value\n",
571 			__func__);
572 		state->snr = 0;
573 		return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */
574 	}
575 
576 	state->snr = calculate_snr(noise, c);
577 
578 	dprintk(state, "noise = 0x%08x, snr = %d.%02d dB\n", noise,
579 		state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16);
580 
581 	return 0;
582 }
583 
584 static int lgdt330x_read_snr(struct dvb_frontend *fe, u16 *snr)
585 {
586 	struct lgdt330x_state *state = fe->demodulator_priv;
587 
588 	*snr = (state->snr) >> 16; /* Convert from 8.24 fixed-point to 8.8 */
589 
590 	return 0;
591 }
592 
593 static int lgdt330x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
594 {
595 	/* Calculate Strength from SNR up to 35dB */
596 	/*
597 	 * Even though the SNR can go higher than 35dB, there is some comfort
598 	 * factor in having a range of strong signals that can show at 100%
599 	 */
600 	struct lgdt330x_state *state = fe->demodulator_priv;
601 	u16 snr;
602 	int ret;
603 
604 	ret = fe->ops.read_snr(fe, &snr);
605 	if (ret != 0)
606 		return ret;
607 	/* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
608 	/* scale the range 0 - 35*2^24 into 0 - 65535 */
609 	if (state->snr >= 8960 * 0x10000)
610 		*strength = 0xffff;
611 	else
612 		*strength = state->snr / 8960;
613 
614 	return 0;
615 }
616 
617 
618 static int lgdt3302_read_status(struct dvb_frontend *fe,
619 				enum fe_status *status)
620 {
621 	struct lgdt330x_state *state = fe->demodulator_priv;
622 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
623 	u8 buf[3];
624 	int err;
625 
626 	*status = 0; /* Reset status result */
627 
628 	/* AGC status register */
629 	i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
630 	dprintk(state, "AGC_STATUS = 0x%02x\n", buf[0]);
631 	if ((buf[0] & 0x0c) == 0x8) {
632 		/*
633 		 * Test signal does not exist flag
634 		 * as well as the AGC lock flag.
635 		 */
636 		*status |= FE_HAS_SIGNAL;
637 	}
638 
639 	/*
640 	 * You must set the Mask bits to 1 in the IRQ_MASK in order
641 	 * to see that status bit in the IRQ_STATUS register.
642 	 * This is done in SwReset();
643 	 */
644 
645 	/* signal status */
646 	i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
647 	dprintk(state,
648 		"TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n",
649 		buf[0], buf[1], buf[2]);
650 
651 	/* sync status */
652 	if ((buf[2] & 0x03) == 0x01)
653 		*status |= FE_HAS_SYNC;
654 
655 	/* FEC error status */
656 	if ((buf[2] & 0x0c) == 0x08)
657 		*status |= FE_HAS_LOCK | FE_HAS_VITERBI;
658 
659 	/* Carrier Recovery Lock Status Register */
660 	i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
661 	dprintk(state, "CARRIER_LOCK = 0x%02x\n", buf[0]);
662 	switch (state->current_modulation) {
663 	case QAM_256:
664 	case QAM_64:
665 		/* Need to understand why there are 3 lock levels here */
666 		if ((buf[0] & 0x07) == 0x07)
667 			*status |= FE_HAS_CARRIER;
668 		break;
669 	case VSB_8:
670 		if ((buf[0] & 0x80) == 0x80)
671 			*status |= FE_HAS_CARRIER;
672 		break;
673 	default:
674 		dev_warn(&state->client->dev,
675 			 "%s: Modulation set to unsupported value\n",
676 			 __func__);
677 	}
678 
679 	if (!(*status & FE_HAS_LOCK)) {
680 		p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
681 		p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
682 		p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
683 		return 0;
684 	}
685 
686 	if (state->last_stats_time &&
687 	    time_is_after_jiffies(state->last_stats_time))
688 		return 0;
689 
690 	state->last_stats_time = jiffies + msecs_to_jiffies(1000);
691 
692 	err = lgdt3302_read_snr(fe);
693 	if (!err) {
694 		p->cnr.stat[0].scale = FE_SCALE_DECIBEL;
695 		p->cnr.stat[0].svalue = (((u64)state->snr) * 1000) >> 24;
696 	} else {
697 		p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
698 	}
699 
700 	err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
701 					   buf, sizeof(buf));
702 	if (!err) {
703 		state->ucblocks = (buf[0] << 8) | buf[1];
704 
705 		dprintk(state, "UCB = 0x%02x\n", state->ucblocks);
706 
707 		p->block_error.stat[0].uvalue += state->ucblocks;
708 		/* FIXME: what's the basis for block count */
709 		p->block_count.stat[0].uvalue += 10000;
710 
711 		p->block_error.stat[0].scale = FE_SCALE_COUNTER;
712 		p->block_count.stat[0].scale = FE_SCALE_COUNTER;
713 	} else {
714 		p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
715 		p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
716 	}
717 
718 	return 0;
719 }
720 
721 static int lgdt3303_read_status(struct dvb_frontend *fe,
722 				enum fe_status *status)
723 {
724 	struct lgdt330x_state *state = fe->demodulator_priv;
725 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
726 	u8 buf[3];
727 	int err;
728 
729 	*status = 0; /* Reset status result */
730 
731 	/* lgdt3303 AGC status register */
732 	err = i2c_read_demod_bytes(state, 0x58, buf, 1);
733 	if (err < 0)
734 		return err;
735 
736 	dprintk(state, "AGC_STATUS = 0x%02x\n", buf[0]);
737 	if ((buf[0] & 0x21) == 0x01) {
738 		/*
739 		 * Test input signal does not exist flag
740 		 * as well as the AGC lock flag.
741 		 */
742 		*status |= FE_HAS_SIGNAL;
743 	}
744 
745 	/* Carrier Recovery Lock Status Register */
746 	i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
747 	dprintk(state, "CARRIER_LOCK = 0x%02x\n", buf[0]);
748 	switch (state->current_modulation) {
749 	case QAM_256:
750 	case QAM_64:
751 		/* Need to understand why there are 3 lock levels here */
752 		if ((buf[0] & 0x07) == 0x07)
753 			*status |= FE_HAS_CARRIER;
754 		else
755 			break;
756 		i2c_read_demod_bytes(state, 0x8a, buf, 1);
757 		dprintk(state, "QAM LOCK = 0x%02x\n", buf[0]);
758 
759 		if ((buf[0] & 0x04) == 0x04)
760 			*status |= FE_HAS_SYNC;
761 		if ((buf[0] & 0x01) == 0x01)
762 			*status |= FE_HAS_LOCK;
763 		if ((buf[0] & 0x08) == 0x08)
764 			*status |= FE_HAS_VITERBI;
765 		break;
766 	case VSB_8:
767 		if ((buf[0] & 0x80) == 0x80)
768 			*status |= FE_HAS_CARRIER;
769 		else
770 			break;
771 		i2c_read_demod_bytes(state, 0x38, buf, 1);
772 		dprintk(state, "8-VSB LOCK = 0x%02x\n", buf[0]);
773 
774 		if ((buf[0] & 0x02) == 0x00)
775 			*status |= FE_HAS_SYNC;
776 		if ((buf[0] & 0x01) == 0x01)
777 			*status |= FE_HAS_VITERBI | FE_HAS_LOCK;
778 		break;
779 	default:
780 		dev_warn(&state->client->dev,
781 			 "%s: Modulation set to unsupported value\n",
782 			 __func__);
783 	}
784 
785 	if (!(*status & FE_HAS_LOCK)) {
786 		p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
787 		p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
788 		p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
789 		return 0;
790 	}
791 
792 	if (state->last_stats_time &&
793 	    time_is_after_jiffies(state->last_stats_time))
794 		return 0;
795 
796 	state->last_stats_time = jiffies + msecs_to_jiffies(1000);
797 
798 	err = lgdt3303_read_snr(fe);
799 	if (!err) {
800 		p->cnr.stat[0].scale = FE_SCALE_DECIBEL;
801 		p->cnr.stat[0].svalue = (((u64)state->snr) * 1000) >> 24;
802 	} else {
803 		p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
804 	}
805 
806 	err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
807 					   buf, sizeof(buf));
808 	if (!err) {
809 		state->ucblocks = (buf[0] << 8) | buf[1];
810 
811 		dprintk(state, "UCB = 0x%02x\n", state->ucblocks);
812 
813 		p->block_error.stat[0].uvalue += state->ucblocks;
814 		/* FIXME: what's the basis for block count */
815 		p->block_count.stat[0].uvalue += 10000;
816 
817 		p->block_error.stat[0].scale = FE_SCALE_COUNTER;
818 		p->block_count.stat[0].scale = FE_SCALE_COUNTER;
819 	} else {
820 		p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
821 		p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
822 	}
823 
824 	return 0;
825 }
826 
827 static int
828 lgdt330x_get_tune_settings(struct dvb_frontend *fe,
829 			   struct dvb_frontend_tune_settings *fe_tune_settings)
830 {
831 	/* I have no idea about this - it may not be needed */
832 	fe_tune_settings->min_delay_ms = 500;
833 	fe_tune_settings->step_size = 0;
834 	fe_tune_settings->max_drift = 0;
835 	return 0;
836 }
837 
838 static void lgdt330x_release(struct dvb_frontend *fe)
839 {
840 	struct lgdt330x_state *state = fe->demodulator_priv;
841 	struct i2c_client *client = state->client;
842 
843 	dev_dbg(&client->dev, "\n");
844 
845 	i2c_unregister_device(client);
846 }
847 
848 static struct dvb_frontend *lgdt330x_get_dvb_frontend(struct i2c_client *client)
849 {
850 	struct lgdt330x_state *state = i2c_get_clientdata(client);
851 
852 	dev_dbg(&client->dev, "\n");
853 
854 	return &state->frontend;
855 }
856 
857 static const struct dvb_frontend_ops lgdt3302_ops;
858 static const struct dvb_frontend_ops lgdt3303_ops;
859 
860 static int lgdt330x_probe(struct i2c_client *client,
861 			  const struct i2c_device_id *id)
862 {
863 	struct lgdt330x_state *state = NULL;
864 	u8 buf[1];
865 
866 	/* Allocate memory for the internal state */
867 	state = kzalloc(sizeof(*state), GFP_KERNEL);
868 	if (!state)
869 		goto error;
870 
871 	/* Setup the state */
872 	memcpy(&state->config, client->dev.platform_data,
873 	       sizeof(state->config));
874 	i2c_set_clientdata(client, state);
875 	state->client = client;
876 
877 	/* Create dvb_frontend */
878 	switch (state->config.demod_chip) {
879 	case LGDT3302:
880 		memcpy(&state->frontend.ops, &lgdt3302_ops,
881 		       sizeof(struct dvb_frontend_ops));
882 		break;
883 	case LGDT3303:
884 		memcpy(&state->frontend.ops, &lgdt3303_ops,
885 		       sizeof(struct dvb_frontend_ops));
886 		break;
887 	default:
888 		goto error;
889 	}
890 	state->frontend.demodulator_priv = state;
891 
892 	/* Setup get frontend callback */
893 	state->config.get_dvb_frontend = lgdt330x_get_dvb_frontend;
894 
895 	/* Verify communication with demod chip */
896 	if (i2c_read_demod_bytes(state, 2, buf, 1))
897 		goto error;
898 
899 	state->current_frequency = -1;
900 	state->current_modulation = -1;
901 
902 	dev_info(&state->client->dev,
903 		"Demod loaded for LGDT330%s chip\n",
904 		state->config.demod_chip == LGDT3302 ? "2" : "3");
905 
906 	return 0;
907 
908 error:
909 	kfree(state);
910 	if (debug)
911 		dev_printk(KERN_DEBUG, &client->dev, "Error loading lgdt330x driver\n");
912 	return -ENODEV;
913 }
914 struct dvb_frontend *lgdt330x_attach(const struct lgdt330x_config *_config,
915 				     u8 demod_address,
916 				     struct i2c_adapter *i2c)
917 {
918 	struct i2c_client *client;
919 	struct i2c_board_info board_info = {};
920 	struct lgdt330x_config config = *_config;
921 
922 	strscpy(board_info.type, "lgdt330x", sizeof(board_info.type));
923 	board_info.addr = demod_address;
924 	board_info.platform_data = &config;
925 	client = i2c_new_device(i2c, &board_info);
926 	if (!client || !client->dev.driver)
927 		return NULL;
928 
929 	return lgdt330x_get_dvb_frontend(client);
930 }
931 EXPORT_SYMBOL(lgdt330x_attach);
932 
933 static const struct dvb_frontend_ops lgdt3302_ops = {
934 	.delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
935 	.info = {
936 		.name = "LG Electronics LGDT3302 VSB/QAM Frontend",
937 		.frequency_min_hz =  54 * MHz,
938 		.frequency_max_hz = 858 * MHz,
939 		.frequency_stepsize_hz = 62500,
940 		.symbol_rate_min    = 5056941,	/* QAM 64 */
941 		.symbol_rate_max    = 10762000,	/* VSB 8  */
942 		.caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
943 	},
944 	.init                 = lgdt330x_init,
945 	.set_frontend         = lgdt330x_set_parameters,
946 	.get_frontend         = lgdt330x_get_frontend,
947 	.get_tune_settings    = lgdt330x_get_tune_settings,
948 	.read_status          = lgdt3302_read_status,
949 	.read_signal_strength = lgdt330x_read_signal_strength,
950 	.read_snr             = lgdt330x_read_snr,
951 	.read_ucblocks        = lgdt330x_read_ucblocks,
952 	.release              = lgdt330x_release,
953 };
954 
955 static const struct dvb_frontend_ops lgdt3303_ops = {
956 	.delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
957 	.info = {
958 		.name = "LG Electronics LGDT3303 VSB/QAM Frontend",
959 		.frequency_min_hz =  54 * MHz,
960 		.frequency_max_hz = 858 * MHz,
961 		.frequency_stepsize_hz = 62500,
962 		.symbol_rate_min    = 5056941,	/* QAM 64 */
963 		.symbol_rate_max    = 10762000,	/* VSB 8  */
964 		.caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
965 	},
966 	.init                 = lgdt330x_init,
967 	.set_frontend         = lgdt330x_set_parameters,
968 	.get_frontend         = lgdt330x_get_frontend,
969 	.get_tune_settings    = lgdt330x_get_tune_settings,
970 	.read_status          = lgdt3303_read_status,
971 	.read_signal_strength = lgdt330x_read_signal_strength,
972 	.read_snr             = lgdt330x_read_snr,
973 	.read_ucblocks        = lgdt330x_read_ucblocks,
974 	.release              = lgdt330x_release,
975 };
976 
977 static int lgdt330x_remove(struct i2c_client *client)
978 {
979 	struct lgdt330x_state *state = i2c_get_clientdata(client);
980 
981 	dev_dbg(&client->dev, "\n");
982 
983 	kfree(state);
984 
985 	return 0;
986 }
987 
988 static const struct i2c_device_id lgdt330x_id_table[] = {
989 	{"lgdt330x", 0},
990 	{}
991 };
992 MODULE_DEVICE_TABLE(i2c, lgdt330x_id_table);
993 
994 static struct i2c_driver lgdt330x_driver = {
995 	.driver = {
996 		.name	= "lgdt330x",
997 		.suppress_bind_attrs = true,
998 	},
999 	.probe		= lgdt330x_probe,
1000 	.remove		= lgdt330x_remove,
1001 	.id_table	= lgdt330x_id_table,
1002 };
1003 
1004 module_i2c_driver(lgdt330x_driver);
1005 
1006 
1007 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1008 MODULE_AUTHOR("Wilson Michaels");
1009 MODULE_LICENSE("GPL");
1010