1 /* 2 * horus3a.h 3 * 4 * Sony Horus3A DVB-S/S2 tuner driver 5 * 6 * Copyright 2012 Sony Corporation 7 * Copyright (C) 2014 NetUP Inc. 8 * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru> 9 * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru> 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 */ 21 22 #include <linux/slab.h> 23 #include <linux/module.h> 24 #include <linux/dvb/frontend.h> 25 #include <linux/types.h> 26 #include "horus3a.h" 27 #include "dvb_frontend.h" 28 29 #define MAX_WRITE_REGSIZE 5 30 31 enum horus3a_state { 32 STATE_UNKNOWN, 33 STATE_SLEEP, 34 STATE_ACTIVE 35 }; 36 37 struct horus3a_priv { 38 u32 frequency; 39 u8 i2c_address; 40 struct i2c_adapter *i2c; 41 enum horus3a_state state; 42 void *set_tuner_data; 43 int (*set_tuner)(void *, int); 44 }; 45 46 static void horus3a_i2c_debug(struct horus3a_priv *priv, 47 u8 reg, u8 write, const u8 *data, u32 len) 48 { 49 dev_dbg(&priv->i2c->dev, "horus3a: I2C %s reg 0x%02x size %d\n", 50 (write == 0 ? "read" : "write"), reg, len); 51 print_hex_dump_bytes("horus3a: I2C data: ", 52 DUMP_PREFIX_OFFSET, data, len); 53 } 54 55 static int horus3a_write_regs(struct horus3a_priv *priv, 56 u8 reg, const u8 *data, u32 len) 57 { 58 int ret; 59 u8 buf[MAX_WRITE_REGSIZE + 1]; 60 struct i2c_msg msg[1] = { 61 { 62 .addr = priv->i2c_address, 63 .flags = 0, 64 .len = len + 1, 65 .buf = buf, 66 } 67 }; 68 69 if (len + 1 > sizeof(buf)) { 70 dev_warn(&priv->i2c->dev,"wr reg=%04x: len=%d is too big!\n", 71 reg, len + 1); 72 return -E2BIG; 73 } 74 75 horus3a_i2c_debug(priv, reg, 1, data, len); 76 buf[0] = reg; 77 memcpy(&buf[1], data, len); 78 ret = i2c_transfer(priv->i2c, msg, 1); 79 if (ret >= 0 && ret != 1) 80 ret = -EREMOTEIO; 81 if (ret < 0) { 82 dev_warn(&priv->i2c->dev, 83 "%s: i2c wr failed=%d reg=%02x len=%d\n", 84 KBUILD_MODNAME, ret, reg, len); 85 return ret; 86 } 87 return 0; 88 } 89 90 static int horus3a_write_reg(struct horus3a_priv *priv, u8 reg, u8 val) 91 { 92 return horus3a_write_regs(priv, reg, &val, 1); 93 } 94 95 static int horus3a_enter_power_save(struct horus3a_priv *priv) 96 { 97 u8 data[2]; 98 99 dev_dbg(&priv->i2c->dev, "%s()\n", __func__); 100 if (priv->state == STATE_SLEEP) 101 return 0; 102 /* IQ Generator disable */ 103 horus3a_write_reg(priv, 0x2a, 0x79); 104 /* MDIV_EN = 0 */ 105 horus3a_write_reg(priv, 0x29, 0x70); 106 /* VCO disable preparation */ 107 horus3a_write_reg(priv, 0x28, 0x3e); 108 /* VCO buffer disable */ 109 horus3a_write_reg(priv, 0x2a, 0x19); 110 /* VCO calibration disable */ 111 horus3a_write_reg(priv, 0x1c, 0x00); 112 /* Power save setting (xtal is not stopped) */ 113 data[0] = 0xC0; 114 /* LNA is Disabled */ 115 data[1] = 0xA7; 116 /* 0x11 - 0x12 */ 117 horus3a_write_regs(priv, 0x11, data, sizeof(data)); 118 priv->state = STATE_SLEEP; 119 return 0; 120 } 121 122 static int horus3a_leave_power_save(struct horus3a_priv *priv) 123 { 124 u8 data[2]; 125 126 dev_dbg(&priv->i2c->dev, "%s()\n", __func__); 127 if (priv->state == STATE_ACTIVE) 128 return 0; 129 /* Leave power save */ 130 data[0] = 0x00; 131 /* LNA is Disabled */ 132 data[1] = 0xa7; 133 /* 0x11 - 0x12 */ 134 horus3a_write_regs(priv, 0x11, data, sizeof(data)); 135 /* VCO buffer enable */ 136 horus3a_write_reg(priv, 0x2a, 0x79); 137 /* VCO calibration enable */ 138 horus3a_write_reg(priv, 0x1c, 0xc0); 139 /* MDIV_EN = 1 */ 140 horus3a_write_reg(priv, 0x29, 0x71); 141 usleep_range(5000, 7000); 142 priv->state = STATE_ACTIVE; 143 return 0; 144 } 145 146 static int horus3a_init(struct dvb_frontend *fe) 147 { 148 struct horus3a_priv *priv = fe->tuner_priv; 149 150 dev_dbg(&priv->i2c->dev, "%s()\n", __func__); 151 return 0; 152 } 153 154 static void horus3a_release(struct dvb_frontend *fe) 155 { 156 struct horus3a_priv *priv = fe->tuner_priv; 157 158 dev_dbg(&priv->i2c->dev, "%s()\n", __func__); 159 kfree(fe->tuner_priv); 160 fe->tuner_priv = NULL; 161 } 162 163 static int horus3a_sleep(struct dvb_frontend *fe) 164 { 165 struct horus3a_priv *priv = fe->tuner_priv; 166 167 dev_dbg(&priv->i2c->dev, "%s()\n", __func__); 168 horus3a_enter_power_save(priv); 169 return 0; 170 } 171 172 static int horus3a_set_params(struct dvb_frontend *fe) 173 { 174 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 175 struct horus3a_priv *priv = fe->tuner_priv; 176 u32 frequency = p->frequency; 177 u32 symbol_rate = p->symbol_rate/1000; 178 u8 mixdiv = 0; 179 u8 mdiv = 0; 180 u32 ms = 0; 181 u8 f_ctl = 0; 182 u8 g_ctl = 0; 183 u8 fc_lpf = 0; 184 u8 data[5]; 185 186 dev_dbg(&priv->i2c->dev, "%s(): frequency %dkHz symbol_rate %dksps\n", 187 __func__, frequency, symbol_rate); 188 if (priv->set_tuner) 189 priv->set_tuner(priv->set_tuner_data, 0); 190 if (priv->state == STATE_SLEEP) 191 horus3a_leave_power_save(priv); 192 193 /* frequency should be X MHz (X : integer) */ 194 frequency = DIV_ROUND_CLOSEST(frequency, 1000) * 1000; 195 if (frequency <= 1155000) { 196 mixdiv = 4; 197 mdiv = 1; 198 } else { 199 mixdiv = 2; 200 mdiv = 0; 201 } 202 /* Assumed that fREF == 1MHz (1000kHz) */ 203 ms = DIV_ROUND_CLOSEST((frequency * mixdiv) / 2, 1000); 204 if (ms > 0x7FFF) { /* 15 bit */ 205 dev_err(&priv->i2c->dev, "horus3a: invalid frequency %d\n", 206 frequency); 207 return -EINVAL; 208 } 209 if (frequency < 975000) { 210 /* F_CTL=11100 G_CTL=001 */ 211 f_ctl = 0x1C; 212 g_ctl = 0x01; 213 } else if (frequency < 1050000) { 214 /* F_CTL=11000 G_CTL=010 */ 215 f_ctl = 0x18; 216 g_ctl = 0x02; 217 } else if (frequency < 1150000) { 218 /* F_CTL=10100 G_CTL=010 */ 219 f_ctl = 0x14; 220 g_ctl = 0x02; 221 } else if (frequency < 1250000) { 222 /* F_CTL=10000 G_CTL=011 */ 223 f_ctl = 0x10; 224 g_ctl = 0x03; 225 } else if (frequency < 1350000) { 226 /* F_CTL=01100 G_CTL=100 */ 227 f_ctl = 0x0C; 228 g_ctl = 0x04; 229 } else if (frequency < 1450000) { 230 /* F_CTL=01010 G_CTL=100 */ 231 f_ctl = 0x0A; 232 g_ctl = 0x04; 233 } else if (frequency < 1600000) { 234 /* F_CTL=00111 G_CTL=101 */ 235 f_ctl = 0x07; 236 g_ctl = 0x05; 237 } else if (frequency < 1800000) { 238 /* F_CTL=00100 G_CTL=010 */ 239 f_ctl = 0x04; 240 g_ctl = 0x02; 241 } else if (frequency < 2000000) { 242 /* F_CTL=00010 G_CTL=001 */ 243 f_ctl = 0x02; 244 g_ctl = 0x01; 245 } else { 246 /* F_CTL=00000 G_CTL=000 */ 247 f_ctl = 0x00; 248 g_ctl = 0x00; 249 } 250 /* LPF cutoff frequency setting */ 251 if (p->delivery_system == SYS_DVBS) { 252 /* 253 * rolloff = 0.35 254 * SR <= 4.3 255 * fc_lpf = 5 256 * 4.3 < SR <= 10 257 * fc_lpf = SR * (1 + rolloff) / 2 + SR / 2 = 258 * SR * 1.175 = SR * (47/40) 259 * 10 < SR 260 * fc_lpf = SR * (1 + rolloff) / 2 + 5 = 261 * SR * 0.675 + 5 = SR * (27/40) + 5 262 * NOTE: The result should be round up. 263 */ 264 if (symbol_rate <= 4300) 265 fc_lpf = 5; 266 else if (symbol_rate <= 10000) 267 fc_lpf = (u8)DIV_ROUND_UP(symbol_rate * 47, 40000); 268 else 269 fc_lpf = (u8)DIV_ROUND_UP(symbol_rate * 27, 40000) + 5; 270 /* 5 <= fc_lpf <= 36 */ 271 if (fc_lpf > 36) 272 fc_lpf = 36; 273 } else if (p->delivery_system == SYS_DVBS2) { 274 /* 275 * SR <= 4.5: 276 * fc_lpf = 5 277 * 4.5 < SR <= 10: 278 * fc_lpf = SR * (1 + rolloff) / 2 + SR / 2 279 * 10 < SR: 280 * fc_lpf = SR * (1 + rolloff) / 2 + 5 281 * NOTE: The result should be round up. 282 */ 283 if (symbol_rate <= 4500) 284 fc_lpf = 5; 285 else if (symbol_rate <= 10000) 286 fc_lpf = (u8)((symbol_rate * 11 + (10000-1)) / 10000); 287 else 288 fc_lpf = (u8)((symbol_rate * 3 + (5000-1)) / 5000 + 5); 289 /* 5 <= fc_lpf <= 36 is valid */ 290 if (fc_lpf > 36) 291 fc_lpf = 36; 292 } else { 293 dev_err(&priv->i2c->dev, 294 "horus3a: invalid delivery system %d\n", 295 p->delivery_system); 296 return -EINVAL; 297 } 298 /* 0x00 - 0x04 */ 299 data[0] = (u8)((ms >> 7) & 0xFF); 300 data[1] = (u8)((ms << 1) & 0xFF); 301 data[2] = 0x00; 302 data[3] = 0x00; 303 data[4] = (u8)(mdiv << 7); 304 horus3a_write_regs(priv, 0x00, data, sizeof(data)); 305 /* Write G_CTL, F_CTL */ 306 horus3a_write_reg(priv, 0x09, (u8)((g_ctl << 5) | f_ctl)); 307 /* Write LPF cutoff frequency */ 308 horus3a_write_reg(priv, 0x37, (u8)(0x80 | (fc_lpf << 1))); 309 /* Start Calibration */ 310 horus3a_write_reg(priv, 0x05, 0x80); 311 /* IQ Generator enable */ 312 horus3a_write_reg(priv, 0x2a, 0x7b); 313 /* tuner stabilization time */ 314 msleep(60); 315 /* Store tuned frequency to the struct */ 316 priv->frequency = ms * 2 * 1000 / mixdiv; 317 return 0; 318 } 319 320 static int horus3a_get_frequency(struct dvb_frontend *fe, u32 *frequency) 321 { 322 struct horus3a_priv *priv = fe->tuner_priv; 323 324 *frequency = priv->frequency; 325 return 0; 326 } 327 328 static const struct dvb_tuner_ops horus3a_tuner_ops = { 329 .info = { 330 .name = "Sony Horus3a", 331 .frequency_min = 950000, 332 .frequency_max = 2150000, 333 .frequency_step = 1000, 334 }, 335 .init = horus3a_init, 336 .release = horus3a_release, 337 .sleep = horus3a_sleep, 338 .set_params = horus3a_set_params, 339 .get_frequency = horus3a_get_frequency, 340 }; 341 342 struct dvb_frontend *horus3a_attach(struct dvb_frontend *fe, 343 const struct horus3a_config *config, 344 struct i2c_adapter *i2c) 345 { 346 u8 buf[3], val; 347 struct horus3a_priv *priv = NULL; 348 349 priv = kzalloc(sizeof(struct horus3a_priv), GFP_KERNEL); 350 if (priv == NULL) 351 return NULL; 352 priv->i2c_address = (config->i2c_address >> 1); 353 priv->i2c = i2c; 354 priv->set_tuner_data = config->set_tuner_priv; 355 priv->set_tuner = config->set_tuner_callback; 356 357 if (fe->ops.i2c_gate_ctrl) 358 fe->ops.i2c_gate_ctrl(fe, 1); 359 360 /* wait 4ms after power on */ 361 usleep_range(4000, 6000); 362 /* IQ Generator disable */ 363 horus3a_write_reg(priv, 0x2a, 0x79); 364 /* REF_R = Xtal Frequency */ 365 buf[0] = config->xtal_freq_mhz; 366 buf[1] = config->xtal_freq_mhz; 367 buf[2] = 0; 368 /* 0x6 - 0x8 */ 369 horus3a_write_regs(priv, 0x6, buf, 3); 370 /* IQ Out = Single Ended */ 371 horus3a_write_reg(priv, 0x0a, 0x40); 372 switch (config->xtal_freq_mhz) { 373 case 27: 374 val = 0x1f; 375 break; 376 case 24: 377 val = 0x10; 378 break; 379 case 16: 380 val = 0xc; 381 break; 382 default: 383 val = 0; 384 dev_warn(&priv->i2c->dev, 385 "horus3a: invalid xtal frequency %dMHz\n", 386 config->xtal_freq_mhz); 387 break; 388 } 389 val <<= 2; 390 horus3a_write_reg(priv, 0x0e, val); 391 horus3a_enter_power_save(priv); 392 usleep_range(3000, 5000); 393 394 if (fe->ops.i2c_gate_ctrl) 395 fe->ops.i2c_gate_ctrl(fe, 0); 396 397 memcpy(&fe->ops.tuner_ops, &horus3a_tuner_ops, 398 sizeof(struct dvb_tuner_ops)); 399 fe->tuner_priv = priv; 400 dev_info(&priv->i2c->dev, 401 "Sony HORUS3A attached on addr=%x at I2C adapter %p\n", 402 priv->i2c_address, priv->i2c); 403 return fe; 404 } 405 EXPORT_SYMBOL(horus3a_attach); 406 407 MODULE_DESCRIPTION("Sony HORUS3A satellite tuner driver"); 408 MODULE_AUTHOR("Sergey Kozlov <serjk@netup.ru>"); 409 MODULE_LICENSE("GPL"); 410