1 /*
2  * Sony CXD2820R demodulator driver
3  *
4  * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
5  *
6  *    This program is free software; you can redistribute it and/or modify
7  *    it under the terms of the GNU General Public License as published by
8  *    the Free Software Foundation; either version 2 of the License, or
9  *    (at your option) any later version.
10  *
11  *    This program is distributed in the hope that it will be useful,
12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *    GNU General Public License for more details.
15  *
16  *    You should have received a copy of the GNU General Public License along
17  *    with this program; if not, write to the Free Software Foundation, Inc.,
18  *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19  */
20 
21 
22 #include "cxd2820r_priv.h"
23 
24 int cxd2820r_set_frontend_t2(struct dvb_frontend *fe)
25 {
26 	struct cxd2820r_priv *priv = fe->demodulator_priv;
27 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
28 	int ret, i, bw_i;
29 	u32 if_freq, if_ctl;
30 	u64 num;
31 	u8 buf[3], bw_param;
32 	u8 bw_params1[][5] = {
33 		{ 0x1c, 0xb3, 0x33, 0x33, 0x33 }, /* 5 MHz */
34 		{ 0x17, 0xea, 0xaa, 0xaa, 0xaa }, /* 6 MHz */
35 		{ 0x14, 0x80, 0x00, 0x00, 0x00 }, /* 7 MHz */
36 		{ 0x11, 0xf0, 0x00, 0x00, 0x00 }, /* 8 MHz */
37 	};
38 	struct reg_val_mask tab[] = {
39 		{ 0x00080, 0x02, 0xff },
40 		{ 0x00081, 0x20, 0xff },
41 		{ 0x00085, 0x07, 0xff },
42 		{ 0x00088, 0x01, 0xff },
43 		{ 0x02069, 0x01, 0xff },
44 
45 		{ 0x0207f, 0x2a, 0xff },
46 		{ 0x02082, 0x0a, 0xff },
47 		{ 0x02083, 0x0a, 0xff },
48 		{ 0x020cb, priv->cfg.if_agc_polarity << 6, 0x40 },
49 		{ 0x02070, priv->cfg.ts_mode, 0xff },
50 		{ 0x020b5, priv->cfg.spec_inv << 4, 0x10 },
51 		{ 0x02567, 0x07, 0x0f },
52 		{ 0x02569, 0x03, 0x03 },
53 		{ 0x02595, 0x1a, 0xff },
54 		{ 0x02596, 0x50, 0xff },
55 		{ 0x02a8c, 0x00, 0xff },
56 		{ 0x02a8d, 0x34, 0xff },
57 		{ 0x02a45, 0x06, 0x07 },
58 		{ 0x03f10, 0x0d, 0xff },
59 		{ 0x03f11, 0x02, 0xff },
60 		{ 0x03f12, 0x01, 0xff },
61 		{ 0x03f23, 0x2c, 0xff },
62 		{ 0x03f51, 0x13, 0xff },
63 		{ 0x03f52, 0x01, 0xff },
64 		{ 0x03f53, 0x00, 0xff },
65 		{ 0x027e6, 0x14, 0xff },
66 		{ 0x02786, 0x02, 0x07 },
67 		{ 0x02787, 0x40, 0xe0 },
68 		{ 0x027ef, 0x10, 0x18 },
69 	};
70 
71 	dev_dbg(&priv->i2c->dev, "%s: frequency=%d bandwidth_hz=%d\n", __func__,
72 			c->frequency, c->bandwidth_hz);
73 
74 	switch (c->bandwidth_hz) {
75 	case 5000000:
76 		bw_i = 0;
77 		bw_param = 3;
78 		break;
79 	case 6000000:
80 		bw_i = 1;
81 		bw_param = 2;
82 		break;
83 	case 7000000:
84 		bw_i = 2;
85 		bw_param = 1;
86 		break;
87 	case 8000000:
88 		bw_i = 3;
89 		bw_param = 0;
90 		break;
91 	default:
92 		return -EINVAL;
93 	}
94 
95 	/* update GPIOs */
96 	ret = cxd2820r_gpio(fe);
97 	if (ret)
98 		goto error;
99 
100 	/* program tuner */
101 	if (fe->ops.tuner_ops.set_params)
102 		fe->ops.tuner_ops.set_params(fe);
103 
104 	if (priv->delivery_system != SYS_DVBT2) {
105 		for (i = 0; i < ARRAY_SIZE(tab); i++) {
106 			ret = cxd2820r_wr_reg_mask(priv, tab[i].reg,
107 				tab[i].val, tab[i].mask);
108 			if (ret)
109 				goto error;
110 		}
111 	}
112 
113 	priv->delivery_system = SYS_DVBT2;
114 
115 	/* program IF frequency */
116 	if (fe->ops.tuner_ops.get_if_frequency) {
117 		ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
118 		if (ret)
119 			goto error;
120 	} else
121 		if_freq = 0;
122 
123 	dev_dbg(&priv->i2c->dev, "%s: if_freq=%d\n", __func__, if_freq);
124 
125 	num = if_freq / 1000; /* Hz => kHz */
126 	num *= 0x1000000;
127 	if_ctl = cxd2820r_div_u64_round_closest(num, 41000);
128 	buf[0] = ((if_ctl >> 16) & 0xff);
129 	buf[1] = ((if_ctl >>  8) & 0xff);
130 	buf[2] = ((if_ctl >>  0) & 0xff);
131 
132 	ret = cxd2820r_wr_regs(priv, 0x020b6, buf, 3);
133 	if (ret)
134 		goto error;
135 
136 	ret = cxd2820r_wr_regs(priv, 0x0209f, bw_params1[bw_i], 5);
137 	if (ret)
138 		goto error;
139 
140 	ret = cxd2820r_wr_reg_mask(priv, 0x020d7, bw_param << 6, 0xc0);
141 	if (ret)
142 		goto error;
143 
144 	ret = cxd2820r_wr_reg(priv, 0x000ff, 0x08);
145 	if (ret)
146 		goto error;
147 
148 	ret = cxd2820r_wr_reg(priv, 0x000fe, 0x01);
149 	if (ret)
150 		goto error;
151 
152 	return ret;
153 error:
154 	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
155 	return ret;
156 
157 }
158 
159 int cxd2820r_get_frontend_t2(struct dvb_frontend *fe)
160 {
161 	struct cxd2820r_priv *priv = fe->demodulator_priv;
162 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
163 	int ret;
164 	u8 buf[2];
165 
166 	ret = cxd2820r_rd_regs(priv, 0x0205c, buf, 2);
167 	if (ret)
168 		goto error;
169 
170 	switch ((buf[0] >> 0) & 0x07) {
171 	case 0:
172 		c->transmission_mode = TRANSMISSION_MODE_2K;
173 		break;
174 	case 1:
175 		c->transmission_mode = TRANSMISSION_MODE_8K;
176 		break;
177 	case 2:
178 		c->transmission_mode = TRANSMISSION_MODE_4K;
179 		break;
180 	case 3:
181 		c->transmission_mode = TRANSMISSION_MODE_1K;
182 		break;
183 	case 4:
184 		c->transmission_mode = TRANSMISSION_MODE_16K;
185 		break;
186 	case 5:
187 		c->transmission_mode = TRANSMISSION_MODE_32K;
188 		break;
189 	}
190 
191 	switch ((buf[1] >> 4) & 0x07) {
192 	case 0:
193 		c->guard_interval = GUARD_INTERVAL_1_32;
194 		break;
195 	case 1:
196 		c->guard_interval = GUARD_INTERVAL_1_16;
197 		break;
198 	case 2:
199 		c->guard_interval = GUARD_INTERVAL_1_8;
200 		break;
201 	case 3:
202 		c->guard_interval = GUARD_INTERVAL_1_4;
203 		break;
204 	case 4:
205 		c->guard_interval = GUARD_INTERVAL_1_128;
206 		break;
207 	case 5:
208 		c->guard_interval = GUARD_INTERVAL_19_128;
209 		break;
210 	case 6:
211 		c->guard_interval = GUARD_INTERVAL_19_256;
212 		break;
213 	}
214 
215 	ret = cxd2820r_rd_regs(priv, 0x0225b, buf, 2);
216 	if (ret)
217 		goto error;
218 
219 	switch ((buf[0] >> 0) & 0x07) {
220 	case 0:
221 		c->fec_inner = FEC_1_2;
222 		break;
223 	case 1:
224 		c->fec_inner = FEC_3_5;
225 		break;
226 	case 2:
227 		c->fec_inner = FEC_2_3;
228 		break;
229 	case 3:
230 		c->fec_inner = FEC_3_4;
231 		break;
232 	case 4:
233 		c->fec_inner = FEC_4_5;
234 		break;
235 	case 5:
236 		c->fec_inner = FEC_5_6;
237 		break;
238 	}
239 
240 	switch ((buf[1] >> 0) & 0x07) {
241 	case 0:
242 		c->modulation = QPSK;
243 		break;
244 	case 1:
245 		c->modulation = QAM_16;
246 		break;
247 	case 2:
248 		c->modulation = QAM_64;
249 		break;
250 	case 3:
251 		c->modulation = QAM_256;
252 		break;
253 	}
254 
255 	ret = cxd2820r_rd_reg(priv, 0x020b5, &buf[0]);
256 	if (ret)
257 		goto error;
258 
259 	switch ((buf[0] >> 4) & 0x01) {
260 	case 0:
261 		c->inversion = INVERSION_OFF;
262 		break;
263 	case 1:
264 		c->inversion = INVERSION_ON;
265 		break;
266 	}
267 
268 	return ret;
269 error:
270 	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
271 	return ret;
272 }
273 
274 int cxd2820r_read_status_t2(struct dvb_frontend *fe, fe_status_t *status)
275 {
276 	struct cxd2820r_priv *priv = fe->demodulator_priv;
277 	int ret;
278 	u8 buf[1];
279 	*status = 0;
280 
281 	ret = cxd2820r_rd_reg(priv, 0x02010 , &buf[0]);
282 	if (ret)
283 		goto error;
284 
285 	if ((buf[0] & 0x07) == 6) {
286 		if (((buf[0] >> 5) & 0x01) == 1) {
287 			*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
288 				FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
289 		} else {
290 			*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
291 				FE_HAS_VITERBI | FE_HAS_SYNC;
292 		}
293 	}
294 
295 	dev_dbg(&priv->i2c->dev, "%s: lock=%02x\n", __func__, buf[0]);
296 
297 	return ret;
298 error:
299 	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
300 	return ret;
301 }
302 
303 int cxd2820r_read_ber_t2(struct dvb_frontend *fe, u32 *ber)
304 {
305 	struct cxd2820r_priv *priv = fe->demodulator_priv;
306 	int ret;
307 	u8 buf[4];
308 	unsigned int errbits;
309 	*ber = 0;
310 	/* FIXME: correct calculation */
311 
312 	ret = cxd2820r_rd_regs(priv, 0x02039, buf, sizeof(buf));
313 	if (ret)
314 		goto error;
315 
316 	if ((buf[0] >> 4) & 0x01) {
317 		errbits = (buf[0] & 0x0f) << 24 | buf[1] << 16 |
318 			buf[2] << 8 | buf[3];
319 
320 		if (errbits)
321 			*ber = errbits * 64 / 16588800;
322 	}
323 
324 	return ret;
325 error:
326 	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
327 	return ret;
328 }
329 
330 int cxd2820r_read_signal_strength_t2(struct dvb_frontend *fe,
331 	u16 *strength)
332 {
333 	struct cxd2820r_priv *priv = fe->demodulator_priv;
334 	int ret;
335 	u8 buf[2];
336 	u16 tmp;
337 
338 	ret = cxd2820r_rd_regs(priv, 0x02026, buf, sizeof(buf));
339 	if (ret)
340 		goto error;
341 
342 	tmp = (buf[0] & 0x0f) << 8 | buf[1];
343 	tmp = ~tmp & 0x0fff;
344 
345 	/* scale value to 0x0000-0xffff from 0x0000-0x0fff */
346 	*strength = tmp * 0xffff / 0x0fff;
347 
348 	return ret;
349 error:
350 	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
351 	return ret;
352 }
353 
354 int cxd2820r_read_snr_t2(struct dvb_frontend *fe, u16 *snr)
355 {
356 	struct cxd2820r_priv *priv = fe->demodulator_priv;
357 	int ret;
358 	u8 buf[2];
359 	u16 tmp;
360 	/* report SNR in dB * 10 */
361 
362 	ret = cxd2820r_rd_regs(priv, 0x02028, buf, sizeof(buf));
363 	if (ret)
364 		goto error;
365 
366 	tmp = (buf[0] & 0x0f) << 8 | buf[1];
367 	#define CXD2820R_LOG10_8_24 15151336 /* log10(8) << 24 */
368 	if (tmp)
369 		*snr = (intlog10(tmp) - CXD2820R_LOG10_8_24) / ((1 << 24)
370 			/ 100);
371 	else
372 		*snr = 0;
373 
374 	dev_dbg(&priv->i2c->dev, "%s: dBx10=%d val=%04x\n", __func__, *snr,
375 			tmp);
376 
377 	return ret;
378 error:
379 	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
380 	return ret;
381 }
382 
383 int cxd2820r_read_ucblocks_t2(struct dvb_frontend *fe, u32 *ucblocks)
384 {
385 	*ucblocks = 0;
386 	/* no way to read ? */
387 	return 0;
388 }
389 
390 int cxd2820r_sleep_t2(struct dvb_frontend *fe)
391 {
392 	struct cxd2820r_priv *priv = fe->demodulator_priv;
393 	int ret, i;
394 	struct reg_val_mask tab[] = {
395 		{ 0x000ff, 0x1f, 0xff },
396 		{ 0x00085, 0x00, 0xff },
397 		{ 0x00088, 0x01, 0xff },
398 		{ 0x02069, 0x00, 0xff },
399 		{ 0x00081, 0x00, 0xff },
400 		{ 0x00080, 0x00, 0xff },
401 	};
402 
403 	dev_dbg(&priv->i2c->dev, "%s\n", __func__);
404 
405 	for (i = 0; i < ARRAY_SIZE(tab); i++) {
406 		ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, tab[i].val,
407 			tab[i].mask);
408 		if (ret)
409 			goto error;
410 	}
411 
412 	priv->delivery_system = SYS_UNDEFINED;
413 
414 	return ret;
415 error:
416 	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
417 	return ret;
418 }
419 
420 int cxd2820r_get_tune_settings_t2(struct dvb_frontend *fe,
421 	struct dvb_frontend_tune_settings *s)
422 {
423 	s->min_delay_ms = 1500;
424 	s->step_size = fe->ops.info.frequency_stepsize * 2;
425 	s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
426 
427 	return 0;
428 }
429