1c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 29a0bf528SMauro Carvalho Chehab /* 39a0bf528SMauro Carvalho Chehab * Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver 49a0bf528SMauro Carvalho Chehab * 59a0bf528SMauro Carvalho Chehab * Copyright (C) 2005 Steven Toth <stoth@linuxtv.org> 69a0bf528SMauro Carvalho Chehab * 79a0bf528SMauro Carvalho Chehab * Support for KWorld DVB-S 100 by Vadim Catana <skystar@moldova.cc> 89a0bf528SMauro Carvalho Chehab * 99a0bf528SMauro Carvalho Chehab * Support for CX24123/CX24113-NIM by Patrick Boettcher <pb@linuxtv.org> 109a0bf528SMauro Carvalho Chehab */ 119a0bf528SMauro Carvalho Chehab 129a0bf528SMauro Carvalho Chehab #include <linux/slab.h> 139a0bf528SMauro Carvalho Chehab #include <linux/kernel.h> 149a0bf528SMauro Carvalho Chehab #include <linux/module.h> 159a0bf528SMauro Carvalho Chehab #include <linux/init.h> 16752a62b2SMauro Carvalho Chehab #include <asm/div64.h> 179a0bf528SMauro Carvalho Chehab 18fada1935SMauro Carvalho Chehab #include <media/dvb_frontend.h> 199a0bf528SMauro Carvalho Chehab #include "cx24123.h" 209a0bf528SMauro Carvalho Chehab 219a0bf528SMauro Carvalho Chehab #define XTAL 10111000 229a0bf528SMauro Carvalho Chehab 239a0bf528SMauro Carvalho Chehab static int force_band; 249a0bf528SMauro Carvalho Chehab module_param(force_band, int, 0644); 259a0bf528SMauro Carvalho Chehab MODULE_PARM_DESC(force_band, "Force a specific band select "\ 269a0bf528SMauro Carvalho Chehab "(1-9, default:off)."); 279a0bf528SMauro Carvalho Chehab 289a0bf528SMauro Carvalho Chehab static int debug; 299a0bf528SMauro Carvalho Chehab module_param(debug, int, 0644); 309a0bf528SMauro Carvalho Chehab MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); 319a0bf528SMauro Carvalho Chehab 329a0bf528SMauro Carvalho Chehab #define info(args...) do { printk(KERN_INFO "CX24123: " args); } while (0) 339a0bf528SMauro Carvalho Chehab #define err(args...) do { printk(KERN_ERR "CX24123: " args); } while (0) 349a0bf528SMauro Carvalho Chehab 359a0bf528SMauro Carvalho Chehab #define dprintk(args...) \ 369a0bf528SMauro Carvalho Chehab do { \ 379a0bf528SMauro Carvalho Chehab if (debug) { \ 389a0bf528SMauro Carvalho Chehab printk(KERN_DEBUG "CX24123: %s: ", __func__); \ 399a0bf528SMauro Carvalho Chehab printk(args); \ 409a0bf528SMauro Carvalho Chehab } \ 419a0bf528SMauro Carvalho Chehab } while (0) 429a0bf528SMauro Carvalho Chehab 439a0bf528SMauro Carvalho Chehab struct cx24123_state { 449a0bf528SMauro Carvalho Chehab struct i2c_adapter *i2c; 459a0bf528SMauro Carvalho Chehab const struct cx24123_config *config; 469a0bf528SMauro Carvalho Chehab 479a0bf528SMauro Carvalho Chehab struct dvb_frontend frontend; 489a0bf528SMauro Carvalho Chehab 499a0bf528SMauro Carvalho Chehab /* Some PLL specifics for tuning */ 509a0bf528SMauro Carvalho Chehab u32 VCAarg; 519a0bf528SMauro Carvalho Chehab u32 VGAarg; 529a0bf528SMauro Carvalho Chehab u32 bandselectarg; 539a0bf528SMauro Carvalho Chehab u32 pllarg; 549a0bf528SMauro Carvalho Chehab u32 FILTune; 559a0bf528SMauro Carvalho Chehab 569a0bf528SMauro Carvalho Chehab struct i2c_adapter tuner_i2c_adapter; 579a0bf528SMauro Carvalho Chehab 589a0bf528SMauro Carvalho Chehab u8 demod_rev; 599a0bf528SMauro Carvalho Chehab 609a0bf528SMauro Carvalho Chehab /* The Demod/Tuner can't easily provide these, we cache them */ 619a0bf528SMauro Carvalho Chehab u32 currentfreq; 629a0bf528SMauro Carvalho Chehab u32 currentsymbolrate; 639a0bf528SMauro Carvalho Chehab }; 649a0bf528SMauro Carvalho Chehab 659a0bf528SMauro Carvalho Chehab /* Various tuner defaults need to be established for a given symbol rate Sps */ 669a0bf528SMauro Carvalho Chehab static struct cx24123_AGC_val { 679a0bf528SMauro Carvalho Chehab u32 symbolrate_low; 689a0bf528SMauro Carvalho Chehab u32 symbolrate_high; 699a0bf528SMauro Carvalho Chehab u32 VCAprogdata; 709a0bf528SMauro Carvalho Chehab u32 VGAprogdata; 719a0bf528SMauro Carvalho Chehab u32 FILTune; 729a0bf528SMauro Carvalho Chehab } cx24123_AGC_vals[] = 739a0bf528SMauro Carvalho Chehab { 749a0bf528SMauro Carvalho Chehab { 759a0bf528SMauro Carvalho Chehab .symbolrate_low = 1000000, 769a0bf528SMauro Carvalho Chehab .symbolrate_high = 4999999, 779a0bf528SMauro Carvalho Chehab /* the specs recommend other values for VGA offsets, 789a0bf528SMauro Carvalho Chehab but tests show they are wrong */ 799a0bf528SMauro Carvalho Chehab .VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0, 809a0bf528SMauro Carvalho Chehab .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x07, 819a0bf528SMauro Carvalho Chehab .FILTune = 0x27f /* 0.41 V */ 829a0bf528SMauro Carvalho Chehab }, 839a0bf528SMauro Carvalho Chehab { 849a0bf528SMauro Carvalho Chehab .symbolrate_low = 5000000, 859a0bf528SMauro Carvalho Chehab .symbolrate_high = 14999999, 869a0bf528SMauro Carvalho Chehab .VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0, 879a0bf528SMauro Carvalho Chehab .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x1f, 889a0bf528SMauro Carvalho Chehab .FILTune = 0x317 /* 0.90 V */ 899a0bf528SMauro Carvalho Chehab }, 909a0bf528SMauro Carvalho Chehab { 919a0bf528SMauro Carvalho Chehab .symbolrate_low = 15000000, 929a0bf528SMauro Carvalho Chehab .symbolrate_high = 45000000, 939a0bf528SMauro Carvalho Chehab .VGAprogdata = (1 << 19) | (0x100 << 9) | 0x180, 949a0bf528SMauro Carvalho Chehab .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x3f, 959a0bf528SMauro Carvalho Chehab .FILTune = 0x145 /* 2.70 V */ 969a0bf528SMauro Carvalho Chehab }, 979a0bf528SMauro Carvalho Chehab }; 989a0bf528SMauro Carvalho Chehab 999a0bf528SMauro Carvalho Chehab /* 1009a0bf528SMauro Carvalho Chehab * Various tuner defaults need to be established for a given frequency kHz. 1019a0bf528SMauro Carvalho Chehab * fixme: The bounds on the bands do not match the doc in real life. 1029a0bf528SMauro Carvalho Chehab * fixme: Some of them have been moved, other might need adjustment. 1039a0bf528SMauro Carvalho Chehab */ 1049a0bf528SMauro Carvalho Chehab static struct cx24123_bandselect_val { 1059a0bf528SMauro Carvalho Chehab u32 freq_low; 1069a0bf528SMauro Carvalho Chehab u32 freq_high; 1079a0bf528SMauro Carvalho Chehab u32 VCOdivider; 1089a0bf528SMauro Carvalho Chehab u32 progdata; 1099a0bf528SMauro Carvalho Chehab } cx24123_bandselect_vals[] = 1109a0bf528SMauro Carvalho Chehab { 1119a0bf528SMauro Carvalho Chehab /* band 1 */ 1129a0bf528SMauro Carvalho Chehab { 1139a0bf528SMauro Carvalho Chehab .freq_low = 950000, 1149a0bf528SMauro Carvalho Chehab .freq_high = 1074999, 1159a0bf528SMauro Carvalho Chehab .VCOdivider = 4, 1169a0bf528SMauro Carvalho Chehab .progdata = (0 << 19) | (0 << 9) | 0x40, 1179a0bf528SMauro Carvalho Chehab }, 1189a0bf528SMauro Carvalho Chehab 1199a0bf528SMauro Carvalho Chehab /* band 2 */ 1209a0bf528SMauro Carvalho Chehab { 1219a0bf528SMauro Carvalho Chehab .freq_low = 1075000, 1229a0bf528SMauro Carvalho Chehab .freq_high = 1177999, 1239a0bf528SMauro Carvalho Chehab .VCOdivider = 4, 1249a0bf528SMauro Carvalho Chehab .progdata = (0 << 19) | (0 << 9) | 0x80, 1259a0bf528SMauro Carvalho Chehab }, 1269a0bf528SMauro Carvalho Chehab 1279a0bf528SMauro Carvalho Chehab /* band 3 */ 1289a0bf528SMauro Carvalho Chehab { 1299a0bf528SMauro Carvalho Chehab .freq_low = 1178000, 1309a0bf528SMauro Carvalho Chehab .freq_high = 1295999, 1319a0bf528SMauro Carvalho Chehab .VCOdivider = 2, 1329a0bf528SMauro Carvalho Chehab .progdata = (0 << 19) | (1 << 9) | 0x01, 1339a0bf528SMauro Carvalho Chehab }, 1349a0bf528SMauro Carvalho Chehab 1359a0bf528SMauro Carvalho Chehab /* band 4 */ 1369a0bf528SMauro Carvalho Chehab { 1379a0bf528SMauro Carvalho Chehab .freq_low = 1296000, 1389a0bf528SMauro Carvalho Chehab .freq_high = 1431999, 1399a0bf528SMauro Carvalho Chehab .VCOdivider = 2, 1409a0bf528SMauro Carvalho Chehab .progdata = (0 << 19) | (1 << 9) | 0x02, 1419a0bf528SMauro Carvalho Chehab }, 1429a0bf528SMauro Carvalho Chehab 1439a0bf528SMauro Carvalho Chehab /* band 5 */ 1449a0bf528SMauro Carvalho Chehab { 1459a0bf528SMauro Carvalho Chehab .freq_low = 1432000, 1469a0bf528SMauro Carvalho Chehab .freq_high = 1575999, 1479a0bf528SMauro Carvalho Chehab .VCOdivider = 2, 1489a0bf528SMauro Carvalho Chehab .progdata = (0 << 19) | (1 << 9) | 0x04, 1499a0bf528SMauro Carvalho Chehab }, 1509a0bf528SMauro Carvalho Chehab 1519a0bf528SMauro Carvalho Chehab /* band 6 */ 1529a0bf528SMauro Carvalho Chehab { 1539a0bf528SMauro Carvalho Chehab .freq_low = 1576000, 1549a0bf528SMauro Carvalho Chehab .freq_high = 1717999, 1559a0bf528SMauro Carvalho Chehab .VCOdivider = 2, 1569a0bf528SMauro Carvalho Chehab .progdata = (0 << 19) | (1 << 9) | 0x08, 1579a0bf528SMauro Carvalho Chehab }, 1589a0bf528SMauro Carvalho Chehab 1599a0bf528SMauro Carvalho Chehab /* band 7 */ 1609a0bf528SMauro Carvalho Chehab { 1619a0bf528SMauro Carvalho Chehab .freq_low = 1718000, 1629a0bf528SMauro Carvalho Chehab .freq_high = 1855999, 1639a0bf528SMauro Carvalho Chehab .VCOdivider = 2, 1649a0bf528SMauro Carvalho Chehab .progdata = (0 << 19) | (1 << 9) | 0x10, 1659a0bf528SMauro Carvalho Chehab }, 1669a0bf528SMauro Carvalho Chehab 1679a0bf528SMauro Carvalho Chehab /* band 8 */ 1689a0bf528SMauro Carvalho Chehab { 1699a0bf528SMauro Carvalho Chehab .freq_low = 1856000, 1709a0bf528SMauro Carvalho Chehab .freq_high = 2035999, 1719a0bf528SMauro Carvalho Chehab .VCOdivider = 2, 1729a0bf528SMauro Carvalho Chehab .progdata = (0 << 19) | (1 << 9) | 0x20, 1739a0bf528SMauro Carvalho Chehab }, 1749a0bf528SMauro Carvalho Chehab 1759a0bf528SMauro Carvalho Chehab /* band 9 */ 1769a0bf528SMauro Carvalho Chehab { 1779a0bf528SMauro Carvalho Chehab .freq_low = 2036000, 1789a0bf528SMauro Carvalho Chehab .freq_high = 2150000, 1799a0bf528SMauro Carvalho Chehab .VCOdivider = 2, 1809a0bf528SMauro Carvalho Chehab .progdata = (0 << 19) | (1 << 9) | 0x40, 1819a0bf528SMauro Carvalho Chehab }, 1829a0bf528SMauro Carvalho Chehab }; 1839a0bf528SMauro Carvalho Chehab 1849a0bf528SMauro Carvalho Chehab static struct { 1859a0bf528SMauro Carvalho Chehab u8 reg; 1869a0bf528SMauro Carvalho Chehab u8 data; 1879a0bf528SMauro Carvalho Chehab } cx24123_regdata[] = 1889a0bf528SMauro Carvalho Chehab { 1899a0bf528SMauro Carvalho Chehab {0x00, 0x03}, /* Reset system */ 1909a0bf528SMauro Carvalho Chehab {0x00, 0x00}, /* Clear reset */ 1919a0bf528SMauro Carvalho Chehab {0x03, 0x07}, /* QPSK, DVB, Auto Acquisition (default) */ 1929a0bf528SMauro Carvalho Chehab {0x04, 0x10}, /* MPEG */ 1939a0bf528SMauro Carvalho Chehab {0x05, 0x04}, /* MPEG */ 1949a0bf528SMauro Carvalho Chehab {0x06, 0x31}, /* MPEG (default) */ 1959a0bf528SMauro Carvalho Chehab {0x0b, 0x00}, /* Freq search start point (default) */ 1969a0bf528SMauro Carvalho Chehab {0x0c, 0x00}, /* Demodulator sample gain (default) */ 1979a0bf528SMauro Carvalho Chehab {0x0d, 0x7f}, /* Force driver to shift until the maximum (+-10 MHz) */ 1989a0bf528SMauro Carvalho Chehab {0x0e, 0x03}, /* Default non-inverted, FEC 3/4 (default) */ 1999a0bf528SMauro Carvalho Chehab {0x0f, 0xfe}, /* FEC search mask (all supported codes) */ 2009a0bf528SMauro Carvalho Chehab {0x10, 0x01}, /* Default search inversion, no repeat (default) */ 2019a0bf528SMauro Carvalho Chehab {0x16, 0x00}, /* Enable reading of frequency */ 2029a0bf528SMauro Carvalho Chehab {0x17, 0x01}, /* Enable EsNO Ready Counter */ 2039a0bf528SMauro Carvalho Chehab {0x1c, 0x80}, /* Enable error counter */ 2049a0bf528SMauro Carvalho Chehab {0x20, 0x00}, /* Tuner burst clock rate = 500KHz */ 2059a0bf528SMauro Carvalho Chehab {0x21, 0x15}, /* Tuner burst mode, word length = 0x15 */ 2069a0bf528SMauro Carvalho Chehab {0x28, 0x00}, /* Enable FILTERV with positive pol., DiSEqC 2.x off */ 2079a0bf528SMauro Carvalho Chehab {0x29, 0x00}, /* DiSEqC LNB_DC off */ 2089a0bf528SMauro Carvalho Chehab {0x2a, 0xb0}, /* DiSEqC Parameters (default) */ 2099a0bf528SMauro Carvalho Chehab {0x2b, 0x73}, /* DiSEqC Tone Frequency (default) */ 2109a0bf528SMauro Carvalho Chehab {0x2c, 0x00}, /* DiSEqC Message (0x2c - 0x31) */ 2119a0bf528SMauro Carvalho Chehab {0x2d, 0x00}, 2129a0bf528SMauro Carvalho Chehab {0x2e, 0x00}, 2139a0bf528SMauro Carvalho Chehab {0x2f, 0x00}, 2149a0bf528SMauro Carvalho Chehab {0x30, 0x00}, 2159a0bf528SMauro Carvalho Chehab {0x31, 0x00}, 2169a0bf528SMauro Carvalho Chehab {0x32, 0x8c}, /* DiSEqC Parameters (default) */ 2179a0bf528SMauro Carvalho Chehab {0x33, 0x00}, /* Interrupts off (0x33 - 0x34) */ 2189a0bf528SMauro Carvalho Chehab {0x34, 0x00}, 2199a0bf528SMauro Carvalho Chehab {0x35, 0x03}, /* DiSEqC Tone Amplitude (default) */ 2209a0bf528SMauro Carvalho Chehab {0x36, 0x02}, /* DiSEqC Parameters (default) */ 2219a0bf528SMauro Carvalho Chehab {0x37, 0x3a}, /* DiSEqC Parameters (default) */ 2229a0bf528SMauro Carvalho Chehab {0x3a, 0x00}, /* Enable AGC accumulator (for signal strength) */ 2239a0bf528SMauro Carvalho Chehab {0x44, 0x00}, /* Constellation (default) */ 2249a0bf528SMauro Carvalho Chehab {0x45, 0x00}, /* Symbol count (default) */ 2259a0bf528SMauro Carvalho Chehab {0x46, 0x0d}, /* Symbol rate estimator on (default) */ 2269a0bf528SMauro Carvalho Chehab {0x56, 0xc1}, /* Error Counter = Viterbi BER */ 2279a0bf528SMauro Carvalho Chehab {0x57, 0xff}, /* Error Counter Window (default) */ 2289a0bf528SMauro Carvalho Chehab {0x5c, 0x20}, /* Acquisition AFC Expiration window (default is 0x10) */ 2299a0bf528SMauro Carvalho Chehab {0x67, 0x83}, /* Non-DCII symbol clock */ 2309a0bf528SMauro Carvalho Chehab }; 2319a0bf528SMauro Carvalho Chehab 2329a0bf528SMauro Carvalho Chehab static int cx24123_i2c_writereg(struct cx24123_state *state, 2339a0bf528SMauro Carvalho Chehab u8 i2c_addr, int reg, int data) 2349a0bf528SMauro Carvalho Chehab { 2359a0bf528SMauro Carvalho Chehab u8 buf[] = { reg, data }; 2369a0bf528SMauro Carvalho Chehab struct i2c_msg msg = { 2379a0bf528SMauro Carvalho Chehab .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2 2389a0bf528SMauro Carvalho Chehab }; 2399a0bf528SMauro Carvalho Chehab int err; 2409a0bf528SMauro Carvalho Chehab 2419a0bf528SMauro Carvalho Chehab /* printk(KERN_DEBUG "wr(%02x): %02x %02x\n", i2c_addr, reg, data); */ 2429a0bf528SMauro Carvalho Chehab 2439a0bf528SMauro Carvalho Chehab err = i2c_transfer(state->i2c, &msg, 1); 2449a0bf528SMauro Carvalho Chehab if (err != 1) { 2454bd69e7bSMauro Carvalho Chehab printk("%s: writereg error(err == %i, reg == 0x%02x, data == 0x%02x)\n", 2464bd69e7bSMauro Carvalho Chehab __func__, err, reg, data); 2479a0bf528SMauro Carvalho Chehab return err; 2489a0bf528SMauro Carvalho Chehab } 2499a0bf528SMauro Carvalho Chehab 2509a0bf528SMauro Carvalho Chehab return 0; 2519a0bf528SMauro Carvalho Chehab } 2529a0bf528SMauro Carvalho Chehab 2539a0bf528SMauro Carvalho Chehab static int cx24123_i2c_readreg(struct cx24123_state *state, u8 i2c_addr, u8 reg) 2549a0bf528SMauro Carvalho Chehab { 2559a0bf528SMauro Carvalho Chehab int ret; 2569a0bf528SMauro Carvalho Chehab u8 b = 0; 2579a0bf528SMauro Carvalho Chehab struct i2c_msg msg[] = { 2589a0bf528SMauro Carvalho Chehab { .addr = i2c_addr, .flags = 0, .buf = ®, .len = 1 }, 2599a0bf528SMauro Carvalho Chehab { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &b, .len = 1 } 2609a0bf528SMauro Carvalho Chehab }; 2619a0bf528SMauro Carvalho Chehab 2629a0bf528SMauro Carvalho Chehab ret = i2c_transfer(state->i2c, msg, 2); 2639a0bf528SMauro Carvalho Chehab 2649a0bf528SMauro Carvalho Chehab if (ret != 2) { 2659a0bf528SMauro Carvalho Chehab err("%s: reg=0x%x (error=%d)\n", __func__, reg, ret); 2669a0bf528SMauro Carvalho Chehab return ret; 2679a0bf528SMauro Carvalho Chehab } 2689a0bf528SMauro Carvalho Chehab 2699a0bf528SMauro Carvalho Chehab /* printk(KERN_DEBUG "rd(%02x): %02x %02x\n", i2c_addr, reg, b); */ 2709a0bf528SMauro Carvalho Chehab 2719a0bf528SMauro Carvalho Chehab return b; 2729a0bf528SMauro Carvalho Chehab } 2739a0bf528SMauro Carvalho Chehab 2749a0bf528SMauro Carvalho Chehab #define cx24123_readreg(state, reg) \ 2759a0bf528SMauro Carvalho Chehab cx24123_i2c_readreg(state, state->config->demod_address, reg) 2769a0bf528SMauro Carvalho Chehab #define cx24123_writereg(state, reg, val) \ 2779a0bf528SMauro Carvalho Chehab cx24123_i2c_writereg(state, state->config->demod_address, reg, val) 2789a0bf528SMauro Carvalho Chehab 2799a0bf528SMauro Carvalho Chehab static int cx24123_set_inversion(struct cx24123_state *state, 2800df289a2SMauro Carvalho Chehab enum fe_spectral_inversion inversion) 2819a0bf528SMauro Carvalho Chehab { 2829a0bf528SMauro Carvalho Chehab u8 nom_reg = cx24123_readreg(state, 0x0e); 2839a0bf528SMauro Carvalho Chehab u8 auto_reg = cx24123_readreg(state, 0x10); 2849a0bf528SMauro Carvalho Chehab 2859a0bf528SMauro Carvalho Chehab switch (inversion) { 2869a0bf528SMauro Carvalho Chehab case INVERSION_OFF: 2879a0bf528SMauro Carvalho Chehab dprintk("inversion off\n"); 2889a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0e, nom_reg & ~0x80); 2899a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x10, auto_reg | 0x80); 2909a0bf528SMauro Carvalho Chehab break; 2919a0bf528SMauro Carvalho Chehab case INVERSION_ON: 2929a0bf528SMauro Carvalho Chehab dprintk("inversion on\n"); 2939a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0e, nom_reg | 0x80); 2949a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x10, auto_reg | 0x80); 2959a0bf528SMauro Carvalho Chehab break; 2969a0bf528SMauro Carvalho Chehab case INVERSION_AUTO: 2979a0bf528SMauro Carvalho Chehab dprintk("inversion auto\n"); 2989a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x10, auto_reg & ~0x80); 2999a0bf528SMauro Carvalho Chehab break; 3009a0bf528SMauro Carvalho Chehab default: 3019a0bf528SMauro Carvalho Chehab return -EINVAL; 3029a0bf528SMauro Carvalho Chehab } 3039a0bf528SMauro Carvalho Chehab 3049a0bf528SMauro Carvalho Chehab return 0; 3059a0bf528SMauro Carvalho Chehab } 3069a0bf528SMauro Carvalho Chehab 3079a0bf528SMauro Carvalho Chehab static int cx24123_get_inversion(struct cx24123_state *state, 3080df289a2SMauro Carvalho Chehab enum fe_spectral_inversion *inversion) 3099a0bf528SMauro Carvalho Chehab { 3109a0bf528SMauro Carvalho Chehab u8 val; 3119a0bf528SMauro Carvalho Chehab 3129a0bf528SMauro Carvalho Chehab val = cx24123_readreg(state, 0x1b) >> 7; 3139a0bf528SMauro Carvalho Chehab 3149a0bf528SMauro Carvalho Chehab if (val == 0) { 3159a0bf528SMauro Carvalho Chehab dprintk("read inversion off\n"); 3169a0bf528SMauro Carvalho Chehab *inversion = INVERSION_OFF; 3179a0bf528SMauro Carvalho Chehab } else { 3189a0bf528SMauro Carvalho Chehab dprintk("read inversion on\n"); 3199a0bf528SMauro Carvalho Chehab *inversion = INVERSION_ON; 3209a0bf528SMauro Carvalho Chehab } 3219a0bf528SMauro Carvalho Chehab 3229a0bf528SMauro Carvalho Chehab return 0; 3239a0bf528SMauro Carvalho Chehab } 3249a0bf528SMauro Carvalho Chehab 3250df289a2SMauro Carvalho Chehab static int cx24123_set_fec(struct cx24123_state *state, enum fe_code_rate fec) 3269a0bf528SMauro Carvalho Chehab { 3279a0bf528SMauro Carvalho Chehab u8 nom_reg = cx24123_readreg(state, 0x0e) & ~0x07; 3289a0bf528SMauro Carvalho Chehab 329830e4b55SMauro Carvalho Chehab if (((int)fec < FEC_NONE) || (fec > FEC_AUTO)) 3309a0bf528SMauro Carvalho Chehab fec = FEC_AUTO; 3319a0bf528SMauro Carvalho Chehab 3329a0bf528SMauro Carvalho Chehab /* Set the soft decision threshold */ 3339a0bf528SMauro Carvalho Chehab if (fec == FEC_1_2) 3349a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x43, 3359a0bf528SMauro Carvalho Chehab cx24123_readreg(state, 0x43) | 0x01); 3369a0bf528SMauro Carvalho Chehab else 3379a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x43, 3389a0bf528SMauro Carvalho Chehab cx24123_readreg(state, 0x43) & ~0x01); 3399a0bf528SMauro Carvalho Chehab 3409a0bf528SMauro Carvalho Chehab switch (fec) { 3419a0bf528SMauro Carvalho Chehab case FEC_1_2: 3429a0bf528SMauro Carvalho Chehab dprintk("set FEC to 1/2\n"); 3439a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0e, nom_reg | 0x01); 3449a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0f, 0x02); 3459a0bf528SMauro Carvalho Chehab break; 3469a0bf528SMauro Carvalho Chehab case FEC_2_3: 3479a0bf528SMauro Carvalho Chehab dprintk("set FEC to 2/3\n"); 3489a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0e, nom_reg | 0x02); 3499a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0f, 0x04); 3509a0bf528SMauro Carvalho Chehab break; 3519a0bf528SMauro Carvalho Chehab case FEC_3_4: 3529a0bf528SMauro Carvalho Chehab dprintk("set FEC to 3/4\n"); 3539a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0e, nom_reg | 0x03); 3549a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0f, 0x08); 3559a0bf528SMauro Carvalho Chehab break; 3569a0bf528SMauro Carvalho Chehab case FEC_4_5: 3579a0bf528SMauro Carvalho Chehab dprintk("set FEC to 4/5\n"); 3589a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0e, nom_reg | 0x04); 3599a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0f, 0x10); 3609a0bf528SMauro Carvalho Chehab break; 3619a0bf528SMauro Carvalho Chehab case FEC_5_6: 3629a0bf528SMauro Carvalho Chehab dprintk("set FEC to 5/6\n"); 3639a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0e, nom_reg | 0x05); 3649a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0f, 0x20); 3659a0bf528SMauro Carvalho Chehab break; 3669a0bf528SMauro Carvalho Chehab case FEC_6_7: 3679a0bf528SMauro Carvalho Chehab dprintk("set FEC to 6/7\n"); 3689a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0e, nom_reg | 0x06); 3699a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0f, 0x40); 3709a0bf528SMauro Carvalho Chehab break; 3719a0bf528SMauro Carvalho Chehab case FEC_7_8: 3729a0bf528SMauro Carvalho Chehab dprintk("set FEC to 7/8\n"); 3739a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0e, nom_reg | 0x07); 3749a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0f, 0x80); 3759a0bf528SMauro Carvalho Chehab break; 3769a0bf528SMauro Carvalho Chehab case FEC_AUTO: 3779a0bf528SMauro Carvalho Chehab dprintk("set FEC to auto\n"); 3789a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0f, 0xfe); 3799a0bf528SMauro Carvalho Chehab break; 3809a0bf528SMauro Carvalho Chehab default: 3819a0bf528SMauro Carvalho Chehab return -EOPNOTSUPP; 3829a0bf528SMauro Carvalho Chehab } 3839a0bf528SMauro Carvalho Chehab 3849a0bf528SMauro Carvalho Chehab return 0; 3859a0bf528SMauro Carvalho Chehab } 3869a0bf528SMauro Carvalho Chehab 3870df289a2SMauro Carvalho Chehab static int cx24123_get_fec(struct cx24123_state *state, enum fe_code_rate *fec) 3889a0bf528SMauro Carvalho Chehab { 3899a0bf528SMauro Carvalho Chehab int ret; 3909a0bf528SMauro Carvalho Chehab 3919a0bf528SMauro Carvalho Chehab ret = cx24123_readreg(state, 0x1b); 3929a0bf528SMauro Carvalho Chehab if (ret < 0) 3939a0bf528SMauro Carvalho Chehab return ret; 3949a0bf528SMauro Carvalho Chehab ret = ret & 0x07; 3959a0bf528SMauro Carvalho Chehab 3969a0bf528SMauro Carvalho Chehab switch (ret) { 3979a0bf528SMauro Carvalho Chehab case 1: 3989a0bf528SMauro Carvalho Chehab *fec = FEC_1_2; 3999a0bf528SMauro Carvalho Chehab break; 4009a0bf528SMauro Carvalho Chehab case 2: 4019a0bf528SMauro Carvalho Chehab *fec = FEC_2_3; 4029a0bf528SMauro Carvalho Chehab break; 4039a0bf528SMauro Carvalho Chehab case 3: 4049a0bf528SMauro Carvalho Chehab *fec = FEC_3_4; 4059a0bf528SMauro Carvalho Chehab break; 4069a0bf528SMauro Carvalho Chehab case 4: 4079a0bf528SMauro Carvalho Chehab *fec = FEC_4_5; 4089a0bf528SMauro Carvalho Chehab break; 4099a0bf528SMauro Carvalho Chehab case 5: 4109a0bf528SMauro Carvalho Chehab *fec = FEC_5_6; 4119a0bf528SMauro Carvalho Chehab break; 4129a0bf528SMauro Carvalho Chehab case 6: 4139a0bf528SMauro Carvalho Chehab *fec = FEC_6_7; 4149a0bf528SMauro Carvalho Chehab break; 4159a0bf528SMauro Carvalho Chehab case 7: 4169a0bf528SMauro Carvalho Chehab *fec = FEC_7_8; 4179a0bf528SMauro Carvalho Chehab break; 4189a0bf528SMauro Carvalho Chehab default: 4199a0bf528SMauro Carvalho Chehab /* this can happen when there's no lock */ 4209a0bf528SMauro Carvalho Chehab *fec = FEC_NONE; 4219a0bf528SMauro Carvalho Chehab } 4229a0bf528SMauro Carvalho Chehab 4239a0bf528SMauro Carvalho Chehab return 0; 4249a0bf528SMauro Carvalho Chehab } 4259a0bf528SMauro Carvalho Chehab 4269a0bf528SMauro Carvalho Chehab /* Approximation of closest integer of log2(a/b). It actually gives the 4279a0bf528SMauro Carvalho Chehab lowest integer i such that 2^i >= round(a/b) */ 4289a0bf528SMauro Carvalho Chehab static u32 cx24123_int_log2(u32 a, u32 b) 4299a0bf528SMauro Carvalho Chehab { 4309a0bf528SMauro Carvalho Chehab u32 exp, nearest = 0; 4319a0bf528SMauro Carvalho Chehab u32 div = a / b; 4329a0bf528SMauro Carvalho Chehab if (a % b >= b / 2) 4339a0bf528SMauro Carvalho Chehab ++div; 43495c52069SMauro Carvalho Chehab if (div < (1UL << 31)) { 4359a0bf528SMauro Carvalho Chehab for (exp = 1; div > exp; nearest++) 4369a0bf528SMauro Carvalho Chehab exp += exp; 4379a0bf528SMauro Carvalho Chehab } 4389a0bf528SMauro Carvalho Chehab return nearest; 4399a0bf528SMauro Carvalho Chehab } 4409a0bf528SMauro Carvalho Chehab 4419a0bf528SMauro Carvalho Chehab static int cx24123_set_symbolrate(struct cx24123_state *state, u32 srate) 4429a0bf528SMauro Carvalho Chehab { 443752a62b2SMauro Carvalho Chehab u64 tmp; 444752a62b2SMauro Carvalho Chehab u32 sample_rate, ratio, sample_gain; 4459a0bf528SMauro Carvalho Chehab u8 pll_mult; 4469a0bf528SMauro Carvalho Chehab 4479a0bf528SMauro Carvalho Chehab /* check if symbol rate is within limits */ 4489a0bf528SMauro Carvalho Chehab if ((srate > state->frontend.ops.info.symbol_rate_max) || 4499a0bf528SMauro Carvalho Chehab (srate < state->frontend.ops.info.symbol_rate_min)) 4509a0bf528SMauro Carvalho Chehab return -EOPNOTSUPP; 4519a0bf528SMauro Carvalho Chehab 4529a0bf528SMauro Carvalho Chehab /* choose the sampling rate high enough for the required operation, 4539a0bf528SMauro Carvalho Chehab while optimizing the power consumed by the demodulator */ 4549a0bf528SMauro Carvalho Chehab if (srate < (XTAL*2)/2) 4559a0bf528SMauro Carvalho Chehab pll_mult = 2; 4569a0bf528SMauro Carvalho Chehab else if (srate < (XTAL*3)/2) 4579a0bf528SMauro Carvalho Chehab pll_mult = 3; 4589a0bf528SMauro Carvalho Chehab else if (srate < (XTAL*4)/2) 4599a0bf528SMauro Carvalho Chehab pll_mult = 4; 4609a0bf528SMauro Carvalho Chehab else if (srate < (XTAL*5)/2) 4619a0bf528SMauro Carvalho Chehab pll_mult = 5; 4629a0bf528SMauro Carvalho Chehab else if (srate < (XTAL*6)/2) 4639a0bf528SMauro Carvalho Chehab pll_mult = 6; 4649a0bf528SMauro Carvalho Chehab else if (srate < (XTAL*7)/2) 4659a0bf528SMauro Carvalho Chehab pll_mult = 7; 4669a0bf528SMauro Carvalho Chehab else if (srate < (XTAL*8)/2) 4679a0bf528SMauro Carvalho Chehab pll_mult = 8; 4689a0bf528SMauro Carvalho Chehab else 4699a0bf528SMauro Carvalho Chehab pll_mult = 9; 4709a0bf528SMauro Carvalho Chehab 4719a0bf528SMauro Carvalho Chehab 4729a0bf528SMauro Carvalho Chehab sample_rate = pll_mult * XTAL; 4739a0bf528SMauro Carvalho Chehab 474752a62b2SMauro Carvalho Chehab /* SYSSymbolRate[21:0] = (srate << 23) / sample_rate */ 4759a0bf528SMauro Carvalho Chehab 476752a62b2SMauro Carvalho Chehab tmp = ((u64)srate) << 23; 477752a62b2SMauro Carvalho Chehab do_div(tmp, sample_rate); 478752a62b2SMauro Carvalho Chehab ratio = (u32) tmp; 4799a0bf528SMauro Carvalho Chehab 4809a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x01, pll_mult * 6); 4819a0bf528SMauro Carvalho Chehab 4829a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x08, (ratio >> 16) & 0x3f); 4839a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x09, (ratio >> 8) & 0xff); 4849a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0a, ratio & 0xff); 4859a0bf528SMauro Carvalho Chehab 4869a0bf528SMauro Carvalho Chehab /* also set the demodulator sample gain */ 4879a0bf528SMauro Carvalho Chehab sample_gain = cx24123_int_log2(sample_rate, srate); 4889a0bf528SMauro Carvalho Chehab tmp = cx24123_readreg(state, 0x0c) & ~0xe0; 4899a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x0c, tmp | sample_gain << 5); 4909a0bf528SMauro Carvalho Chehab 4919a0bf528SMauro Carvalho Chehab dprintk("srate=%d, ratio=0x%08x, sample_rate=%i sample_gain=%d\n", 4929a0bf528SMauro Carvalho Chehab srate, ratio, sample_rate, sample_gain); 4939a0bf528SMauro Carvalho Chehab 4949a0bf528SMauro Carvalho Chehab return 0; 4959a0bf528SMauro Carvalho Chehab } 4969a0bf528SMauro Carvalho Chehab 4979a0bf528SMauro Carvalho Chehab /* 4989a0bf528SMauro Carvalho Chehab * Based on the required frequency and symbolrate, the tuner AGC has 4999a0bf528SMauro Carvalho Chehab * to be configured and the correct band selected. 5009a0bf528SMauro Carvalho Chehab * Calculate those values. 5019a0bf528SMauro Carvalho Chehab */ 5029a0bf528SMauro Carvalho Chehab static int cx24123_pll_calculate(struct dvb_frontend *fe) 5039a0bf528SMauro Carvalho Chehab { 5049a0bf528SMauro Carvalho Chehab struct dtv_frontend_properties *p = &fe->dtv_property_cache; 5059a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 5069a0bf528SMauro Carvalho Chehab u32 ndiv = 0, adiv = 0, vco_div = 0; 5079a0bf528SMauro Carvalho Chehab int i = 0; 5089a0bf528SMauro Carvalho Chehab int pump = 2; 5099a0bf528SMauro Carvalho Chehab int band = 0; 5109a0bf528SMauro Carvalho Chehab int num_bands = ARRAY_SIZE(cx24123_bandselect_vals); 5119a0bf528SMauro Carvalho Chehab struct cx24123_bandselect_val *bsv = NULL; 5129a0bf528SMauro Carvalho Chehab struct cx24123_AGC_val *agcv = NULL; 5139a0bf528SMauro Carvalho Chehab 5149a0bf528SMauro Carvalho Chehab /* Defaults for low freq, low rate */ 5159a0bf528SMauro Carvalho Chehab state->VCAarg = cx24123_AGC_vals[0].VCAprogdata; 5169a0bf528SMauro Carvalho Chehab state->VGAarg = cx24123_AGC_vals[0].VGAprogdata; 5179a0bf528SMauro Carvalho Chehab state->bandselectarg = cx24123_bandselect_vals[0].progdata; 5189a0bf528SMauro Carvalho Chehab vco_div = cx24123_bandselect_vals[0].VCOdivider; 5199a0bf528SMauro Carvalho Chehab 5209a0bf528SMauro Carvalho Chehab /* For the given symbol rate, determine the VCA, VGA and 5219a0bf528SMauro Carvalho Chehab * FILTUNE programming bits */ 5229a0bf528SMauro Carvalho Chehab for (i = 0; i < ARRAY_SIZE(cx24123_AGC_vals); i++) { 5239a0bf528SMauro Carvalho Chehab agcv = &cx24123_AGC_vals[i]; 5249a0bf528SMauro Carvalho Chehab if ((agcv->symbolrate_low <= p->symbol_rate) && 5259a0bf528SMauro Carvalho Chehab (agcv->symbolrate_high >= p->symbol_rate)) { 5269a0bf528SMauro Carvalho Chehab state->VCAarg = agcv->VCAprogdata; 5279a0bf528SMauro Carvalho Chehab state->VGAarg = agcv->VGAprogdata; 5289a0bf528SMauro Carvalho Chehab state->FILTune = agcv->FILTune; 5299a0bf528SMauro Carvalho Chehab } 5309a0bf528SMauro Carvalho Chehab } 5319a0bf528SMauro Carvalho Chehab 5329a0bf528SMauro Carvalho Chehab /* determine the band to use */ 5339a0bf528SMauro Carvalho Chehab if (force_band < 1 || force_band > num_bands) { 5349a0bf528SMauro Carvalho Chehab for (i = 0; i < num_bands; i++) { 5359a0bf528SMauro Carvalho Chehab bsv = &cx24123_bandselect_vals[i]; 5369a0bf528SMauro Carvalho Chehab if ((bsv->freq_low <= p->frequency) && 5379a0bf528SMauro Carvalho Chehab (bsv->freq_high >= p->frequency)) 5389a0bf528SMauro Carvalho Chehab band = i; 5399a0bf528SMauro Carvalho Chehab } 5409a0bf528SMauro Carvalho Chehab } else 5419a0bf528SMauro Carvalho Chehab band = force_band - 1; 5429a0bf528SMauro Carvalho Chehab 5439a0bf528SMauro Carvalho Chehab state->bandselectarg = cx24123_bandselect_vals[band].progdata; 5449a0bf528SMauro Carvalho Chehab vco_div = cx24123_bandselect_vals[band].VCOdivider; 5459a0bf528SMauro Carvalho Chehab 5469a0bf528SMauro Carvalho Chehab /* determine the charge pump current */ 5479a0bf528SMauro Carvalho Chehab if (p->frequency < (cx24123_bandselect_vals[band].freq_low + 5489a0bf528SMauro Carvalho Chehab cx24123_bandselect_vals[band].freq_high) / 2) 5499a0bf528SMauro Carvalho Chehab pump = 0x01; 5509a0bf528SMauro Carvalho Chehab else 5519a0bf528SMauro Carvalho Chehab pump = 0x02; 5529a0bf528SMauro Carvalho Chehab 5539a0bf528SMauro Carvalho Chehab /* Determine the N/A dividers for the requested lband freq (in kHz). */ 5549a0bf528SMauro Carvalho Chehab /* Note: the reference divider R=10, frequency is in KHz, 5559a0bf528SMauro Carvalho Chehab * XTAL is in Hz */ 5569a0bf528SMauro Carvalho Chehab ndiv = (((p->frequency * vco_div * 10) / 5579a0bf528SMauro Carvalho Chehab (2 * XTAL / 1000)) / 32) & 0x1ff; 5589a0bf528SMauro Carvalho Chehab adiv = (((p->frequency * vco_div * 10) / 5599a0bf528SMauro Carvalho Chehab (2 * XTAL / 1000)) % 32) & 0x1f; 5609a0bf528SMauro Carvalho Chehab 5619a0bf528SMauro Carvalho Chehab if (adiv == 0 && ndiv > 0) 5629a0bf528SMauro Carvalho Chehab ndiv--; 5639a0bf528SMauro Carvalho Chehab 5649a0bf528SMauro Carvalho Chehab /* control bits 11, refdiv 11, charge pump polarity 1, 5659a0bf528SMauro Carvalho Chehab * charge pump current, ndiv, adiv */ 5669a0bf528SMauro Carvalho Chehab state->pllarg = (3 << 19) | (3 << 17) | (1 << 16) | 5679a0bf528SMauro Carvalho Chehab (pump << 14) | (ndiv << 5) | adiv; 5689a0bf528SMauro Carvalho Chehab 5699a0bf528SMauro Carvalho Chehab return 0; 5709a0bf528SMauro Carvalho Chehab } 5719a0bf528SMauro Carvalho Chehab 5729a0bf528SMauro Carvalho Chehab /* 5739a0bf528SMauro Carvalho Chehab * Tuner data is 21 bits long, must be left-aligned in data. 5749a0bf528SMauro Carvalho Chehab * Tuner cx24109 is written through a dedicated 3wire interface 5759a0bf528SMauro Carvalho Chehab * on the demod chip. 5769a0bf528SMauro Carvalho Chehab */ 5779a0bf528SMauro Carvalho Chehab static int cx24123_pll_writereg(struct dvb_frontend *fe, u32 data) 5789a0bf528SMauro Carvalho Chehab { 5799a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 5809a0bf528SMauro Carvalho Chehab unsigned long timeout; 5819a0bf528SMauro Carvalho Chehab 5829a0bf528SMauro Carvalho Chehab dprintk("pll writereg called, data=0x%08x\n", data); 5839a0bf528SMauro Carvalho Chehab 5849a0bf528SMauro Carvalho Chehab /* align the 21 bytes into to bit23 boundary */ 5859a0bf528SMauro Carvalho Chehab data = data << 3; 5869a0bf528SMauro Carvalho Chehab 5879a0bf528SMauro Carvalho Chehab /* Reset the demod pll word length to 0x15 bits */ 5889a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x21, 0x15); 5899a0bf528SMauro Carvalho Chehab 5909a0bf528SMauro Carvalho Chehab /* write the msb 8 bits, wait for the send to be completed */ 5919a0bf528SMauro Carvalho Chehab timeout = jiffies + msecs_to_jiffies(40); 5929a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x22, (data >> 16) & 0xff); 5939a0bf528SMauro Carvalho Chehab while ((cx24123_readreg(state, 0x20) & 0x40) == 0) { 5949a0bf528SMauro Carvalho Chehab if (time_after(jiffies, timeout)) { 5959a0bf528SMauro Carvalho Chehab err("%s: demodulator is not responding, "\ 5969a0bf528SMauro Carvalho Chehab "possibly hung, aborting.\n", __func__); 5979a0bf528SMauro Carvalho Chehab return -EREMOTEIO; 5989a0bf528SMauro Carvalho Chehab } 5999a0bf528SMauro Carvalho Chehab msleep(10); 6009a0bf528SMauro Carvalho Chehab } 6019a0bf528SMauro Carvalho Chehab 6029a0bf528SMauro Carvalho Chehab /* send another 8 bytes, wait for the send to be completed */ 6039a0bf528SMauro Carvalho Chehab timeout = jiffies + msecs_to_jiffies(40); 6049a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x22, (data >> 8) & 0xff); 6059a0bf528SMauro Carvalho Chehab while ((cx24123_readreg(state, 0x20) & 0x40) == 0) { 6069a0bf528SMauro Carvalho Chehab if (time_after(jiffies, timeout)) { 6079a0bf528SMauro Carvalho Chehab err("%s: demodulator is not responding, "\ 6089a0bf528SMauro Carvalho Chehab "possibly hung, aborting.\n", __func__); 6099a0bf528SMauro Carvalho Chehab return -EREMOTEIO; 6109a0bf528SMauro Carvalho Chehab } 6119a0bf528SMauro Carvalho Chehab msleep(10); 6129a0bf528SMauro Carvalho Chehab } 6139a0bf528SMauro Carvalho Chehab 6149a0bf528SMauro Carvalho Chehab /* send the lower 5 bits of this byte, padded with 3 LBB, 6159a0bf528SMauro Carvalho Chehab * wait for the send to be completed */ 6169a0bf528SMauro Carvalho Chehab timeout = jiffies + msecs_to_jiffies(40); 6179a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x22, (data) & 0xff); 6189a0bf528SMauro Carvalho Chehab while ((cx24123_readreg(state, 0x20) & 0x80)) { 6199a0bf528SMauro Carvalho Chehab if (time_after(jiffies, timeout)) { 6209a0bf528SMauro Carvalho Chehab err("%s: demodulator is not responding," \ 6219a0bf528SMauro Carvalho Chehab "possibly hung, aborting.\n", __func__); 6229a0bf528SMauro Carvalho Chehab return -EREMOTEIO; 6239a0bf528SMauro Carvalho Chehab } 6249a0bf528SMauro Carvalho Chehab msleep(10); 6259a0bf528SMauro Carvalho Chehab } 6269a0bf528SMauro Carvalho Chehab 6279a0bf528SMauro Carvalho Chehab /* Trigger the demod to configure the tuner */ 6289a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) | 2); 6299a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) & 0xfd); 6309a0bf528SMauro Carvalho Chehab 6319a0bf528SMauro Carvalho Chehab return 0; 6329a0bf528SMauro Carvalho Chehab } 6339a0bf528SMauro Carvalho Chehab 6349a0bf528SMauro Carvalho Chehab static int cx24123_pll_tune(struct dvb_frontend *fe) 6359a0bf528SMauro Carvalho Chehab { 6369a0bf528SMauro Carvalho Chehab struct dtv_frontend_properties *p = &fe->dtv_property_cache; 6379a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 6389a0bf528SMauro Carvalho Chehab u8 val; 6399a0bf528SMauro Carvalho Chehab 6409a0bf528SMauro Carvalho Chehab dprintk("frequency=%i\n", p->frequency); 6419a0bf528SMauro Carvalho Chehab 6429a0bf528SMauro Carvalho Chehab if (cx24123_pll_calculate(fe) != 0) { 643f8d5219dSColin Ian King err("%s: cx24123_pll_calculate failed\n", __func__); 6449a0bf528SMauro Carvalho Chehab return -EINVAL; 6459a0bf528SMauro Carvalho Chehab } 6469a0bf528SMauro Carvalho Chehab 6479a0bf528SMauro Carvalho Chehab /* Write the new VCO/VGA */ 6489a0bf528SMauro Carvalho Chehab cx24123_pll_writereg(fe, state->VCAarg); 6499a0bf528SMauro Carvalho Chehab cx24123_pll_writereg(fe, state->VGAarg); 6509a0bf528SMauro Carvalho Chehab 6519a0bf528SMauro Carvalho Chehab /* Write the new bandselect and pll args */ 6529a0bf528SMauro Carvalho Chehab cx24123_pll_writereg(fe, state->bandselectarg); 6539a0bf528SMauro Carvalho Chehab cx24123_pll_writereg(fe, state->pllarg); 6549a0bf528SMauro Carvalho Chehab 6559a0bf528SMauro Carvalho Chehab /* set the FILTUNE voltage */ 6569a0bf528SMauro Carvalho Chehab val = cx24123_readreg(state, 0x28) & ~0x3; 6579a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x27, state->FILTune >> 2); 6589a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x28, val | (state->FILTune & 0x3)); 6599a0bf528SMauro Carvalho Chehab 6609a0bf528SMauro Carvalho Chehab dprintk("pll tune VCA=%d, band=%d, pll=%d\n", state->VCAarg, 6619a0bf528SMauro Carvalho Chehab state->bandselectarg, state->pllarg); 6629a0bf528SMauro Carvalho Chehab 6639a0bf528SMauro Carvalho Chehab return 0; 6649a0bf528SMauro Carvalho Chehab } 6659a0bf528SMauro Carvalho Chehab 6669a0bf528SMauro Carvalho Chehab 6679a0bf528SMauro Carvalho Chehab /* 6689a0bf528SMauro Carvalho Chehab * 0x23: 6699a0bf528SMauro Carvalho Chehab * [7:7] = BTI enabled 6709a0bf528SMauro Carvalho Chehab * [6:6] = I2C repeater enabled 6719a0bf528SMauro Carvalho Chehab * [5:5] = I2C repeater start 6729a0bf528SMauro Carvalho Chehab * [0:0] = BTI start 6739a0bf528SMauro Carvalho Chehab */ 6749a0bf528SMauro Carvalho Chehab 6759a0bf528SMauro Carvalho Chehab /* mode == 1 -> i2c-repeater, 0 -> bti */ 6769a0bf528SMauro Carvalho Chehab static int cx24123_repeater_mode(struct cx24123_state *state, u8 mode, u8 start) 6779a0bf528SMauro Carvalho Chehab { 6789a0bf528SMauro Carvalho Chehab u8 r = cx24123_readreg(state, 0x23) & 0x1e; 6799a0bf528SMauro Carvalho Chehab if (mode) 6809a0bf528SMauro Carvalho Chehab r |= (1 << 6) | (start << 5); 6819a0bf528SMauro Carvalho Chehab else 6829a0bf528SMauro Carvalho Chehab r |= (1 << 7) | (start); 6839a0bf528SMauro Carvalho Chehab return cx24123_writereg(state, 0x23, r); 6849a0bf528SMauro Carvalho Chehab } 6859a0bf528SMauro Carvalho Chehab 6869a0bf528SMauro Carvalho Chehab static int cx24123_initfe(struct dvb_frontend *fe) 6879a0bf528SMauro Carvalho Chehab { 6889a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 6899a0bf528SMauro Carvalho Chehab int i; 6909a0bf528SMauro Carvalho Chehab 6919a0bf528SMauro Carvalho Chehab dprintk("init frontend\n"); 6929a0bf528SMauro Carvalho Chehab 6939a0bf528SMauro Carvalho Chehab /* Configure the demod to a good set of defaults */ 6949a0bf528SMauro Carvalho Chehab for (i = 0; i < ARRAY_SIZE(cx24123_regdata); i++) 6959a0bf528SMauro Carvalho Chehab cx24123_writereg(state, cx24123_regdata[i].reg, 6969a0bf528SMauro Carvalho Chehab cx24123_regdata[i].data); 6979a0bf528SMauro Carvalho Chehab 6989a0bf528SMauro Carvalho Chehab /* Set the LNB polarity */ 6999a0bf528SMauro Carvalho Chehab if (state->config->lnb_polarity) 7009a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x32, 7019a0bf528SMauro Carvalho Chehab cx24123_readreg(state, 0x32) | 0x02); 7029a0bf528SMauro Carvalho Chehab 7039a0bf528SMauro Carvalho Chehab if (state->config->dont_use_pll) 7049a0bf528SMauro Carvalho Chehab cx24123_repeater_mode(state, 1, 0); 7059a0bf528SMauro Carvalho Chehab 7069a0bf528SMauro Carvalho Chehab return 0; 7079a0bf528SMauro Carvalho Chehab } 7089a0bf528SMauro Carvalho Chehab 7099a0bf528SMauro Carvalho Chehab static int cx24123_set_voltage(struct dvb_frontend *fe, 7100df289a2SMauro Carvalho Chehab enum fe_sec_voltage voltage) 7119a0bf528SMauro Carvalho Chehab { 7129a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 7139a0bf528SMauro Carvalho Chehab u8 val; 7149a0bf528SMauro Carvalho Chehab 7159a0bf528SMauro Carvalho Chehab val = cx24123_readreg(state, 0x29) & ~0x40; 7169a0bf528SMauro Carvalho Chehab 7179a0bf528SMauro Carvalho Chehab switch (voltage) { 7189a0bf528SMauro Carvalho Chehab case SEC_VOLTAGE_13: 7199a0bf528SMauro Carvalho Chehab dprintk("setting voltage 13V\n"); 7209a0bf528SMauro Carvalho Chehab return cx24123_writereg(state, 0x29, val & 0x7f); 7219a0bf528SMauro Carvalho Chehab case SEC_VOLTAGE_18: 7229a0bf528SMauro Carvalho Chehab dprintk("setting voltage 18V\n"); 7239a0bf528SMauro Carvalho Chehab return cx24123_writereg(state, 0x29, val | 0x80); 7249a0bf528SMauro Carvalho Chehab case SEC_VOLTAGE_OFF: 7259a0bf528SMauro Carvalho Chehab /* already handled in cx88-dvb */ 7269a0bf528SMauro Carvalho Chehab return 0; 7279a0bf528SMauro Carvalho Chehab default: 7289a0bf528SMauro Carvalho Chehab return -EINVAL; 7292028c71dSJoe Perches } 7309a0bf528SMauro Carvalho Chehab 7319a0bf528SMauro Carvalho Chehab return 0; 7329a0bf528SMauro Carvalho Chehab } 7339a0bf528SMauro Carvalho Chehab 7349a0bf528SMauro Carvalho Chehab /* wait for diseqc queue to become ready (or timeout) */ 7359a0bf528SMauro Carvalho Chehab static void cx24123_wait_for_diseqc(struct cx24123_state *state) 7369a0bf528SMauro Carvalho Chehab { 7379a0bf528SMauro Carvalho Chehab unsigned long timeout = jiffies + msecs_to_jiffies(200); 7389a0bf528SMauro Carvalho Chehab while (!(cx24123_readreg(state, 0x29) & 0x40)) { 7399a0bf528SMauro Carvalho Chehab if (time_after(jiffies, timeout)) { 7409a0bf528SMauro Carvalho Chehab err("%s: diseqc queue not ready, " \ 7419a0bf528SMauro Carvalho Chehab "command may be lost.\n", __func__); 7429a0bf528SMauro Carvalho Chehab break; 7439a0bf528SMauro Carvalho Chehab } 7449a0bf528SMauro Carvalho Chehab msleep(10); 7459a0bf528SMauro Carvalho Chehab } 7469a0bf528SMauro Carvalho Chehab } 7479a0bf528SMauro Carvalho Chehab 7489a0bf528SMauro Carvalho Chehab static int cx24123_send_diseqc_msg(struct dvb_frontend *fe, 7499a0bf528SMauro Carvalho Chehab struct dvb_diseqc_master_cmd *cmd) 7509a0bf528SMauro Carvalho Chehab { 7519a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 7529a0bf528SMauro Carvalho Chehab int i, val, tone; 7539a0bf528SMauro Carvalho Chehab 7549a0bf528SMauro Carvalho Chehab dprintk("\n"); 7559a0bf528SMauro Carvalho Chehab 7569a0bf528SMauro Carvalho Chehab /* stop continuous tone if enabled */ 7579a0bf528SMauro Carvalho Chehab tone = cx24123_readreg(state, 0x29); 7589a0bf528SMauro Carvalho Chehab if (tone & 0x10) 7599a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x29, tone & ~0x50); 7609a0bf528SMauro Carvalho Chehab 7619a0bf528SMauro Carvalho Chehab /* wait for diseqc queue ready */ 7629a0bf528SMauro Carvalho Chehab cx24123_wait_for_diseqc(state); 7639a0bf528SMauro Carvalho Chehab 7649a0bf528SMauro Carvalho Chehab /* select tone mode */ 7659a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) & 0xfb); 7669a0bf528SMauro Carvalho Chehab 7679a0bf528SMauro Carvalho Chehab for (i = 0; i < cmd->msg_len; i++) 7689a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x2C + i, cmd->msg[i]); 7699a0bf528SMauro Carvalho Chehab 7709a0bf528SMauro Carvalho Chehab val = cx24123_readreg(state, 0x29); 7719a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40) | 7729a0bf528SMauro Carvalho Chehab ((cmd->msg_len-3) & 3)); 7739a0bf528SMauro Carvalho Chehab 7749a0bf528SMauro Carvalho Chehab /* wait for diseqc message to finish sending */ 7759a0bf528SMauro Carvalho Chehab cx24123_wait_for_diseqc(state); 7769a0bf528SMauro Carvalho Chehab 7779a0bf528SMauro Carvalho Chehab /* restart continuous tone if enabled */ 7789a0bf528SMauro Carvalho Chehab if (tone & 0x10) 7799a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x29, tone & ~0x40); 7809a0bf528SMauro Carvalho Chehab 7819a0bf528SMauro Carvalho Chehab return 0; 7829a0bf528SMauro Carvalho Chehab } 7839a0bf528SMauro Carvalho Chehab 7849a0bf528SMauro Carvalho Chehab static int cx24123_diseqc_send_burst(struct dvb_frontend *fe, 7850df289a2SMauro Carvalho Chehab enum fe_sec_mini_cmd burst) 7869a0bf528SMauro Carvalho Chehab { 7879a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 7889a0bf528SMauro Carvalho Chehab int val, tone; 7899a0bf528SMauro Carvalho Chehab 7909a0bf528SMauro Carvalho Chehab dprintk("\n"); 7919a0bf528SMauro Carvalho Chehab 7929a0bf528SMauro Carvalho Chehab /* stop continuous tone if enabled */ 7939a0bf528SMauro Carvalho Chehab tone = cx24123_readreg(state, 0x29); 7949a0bf528SMauro Carvalho Chehab if (tone & 0x10) 7959a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x29, tone & ~0x50); 7969a0bf528SMauro Carvalho Chehab 7979a0bf528SMauro Carvalho Chehab /* wait for diseqc queue ready */ 7989a0bf528SMauro Carvalho Chehab cx24123_wait_for_diseqc(state); 7999a0bf528SMauro Carvalho Chehab 8009a0bf528SMauro Carvalho Chehab /* select tone mode */ 8019a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) | 0x4); 8029a0bf528SMauro Carvalho Chehab msleep(30); 8039a0bf528SMauro Carvalho Chehab val = cx24123_readreg(state, 0x29); 8049a0bf528SMauro Carvalho Chehab if (burst == SEC_MINI_A) 8059a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40 | 0x00)); 8069a0bf528SMauro Carvalho Chehab else if (burst == SEC_MINI_B) 8079a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40 | 0x08)); 8089a0bf528SMauro Carvalho Chehab else 8099a0bf528SMauro Carvalho Chehab return -EINVAL; 8109a0bf528SMauro Carvalho Chehab 8119a0bf528SMauro Carvalho Chehab cx24123_wait_for_diseqc(state); 8129a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) & 0xfb); 8139a0bf528SMauro Carvalho Chehab 8149a0bf528SMauro Carvalho Chehab /* restart continuous tone if enabled */ 8159a0bf528SMauro Carvalho Chehab if (tone & 0x10) 8169a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x29, tone & ~0x40); 8179a0bf528SMauro Carvalho Chehab 8189a0bf528SMauro Carvalho Chehab return 0; 8199a0bf528SMauro Carvalho Chehab } 8209a0bf528SMauro Carvalho Chehab 8210df289a2SMauro Carvalho Chehab static int cx24123_read_status(struct dvb_frontend *fe, enum fe_status *status) 8229a0bf528SMauro Carvalho Chehab { 8239a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 8249a0bf528SMauro Carvalho Chehab int sync = cx24123_readreg(state, 0x14); 8259a0bf528SMauro Carvalho Chehab 8269a0bf528SMauro Carvalho Chehab *status = 0; 8279a0bf528SMauro Carvalho Chehab if (state->config->dont_use_pll) { 8289a0bf528SMauro Carvalho Chehab u32 tun_status = 0; 8299a0bf528SMauro Carvalho Chehab if (fe->ops.tuner_ops.get_status) 8309a0bf528SMauro Carvalho Chehab fe->ops.tuner_ops.get_status(fe, &tun_status); 8319a0bf528SMauro Carvalho Chehab if (tun_status & TUNER_STATUS_LOCKED) 8329a0bf528SMauro Carvalho Chehab *status |= FE_HAS_SIGNAL; 8339a0bf528SMauro Carvalho Chehab } else { 8349a0bf528SMauro Carvalho Chehab int lock = cx24123_readreg(state, 0x20); 8359a0bf528SMauro Carvalho Chehab if (lock & 0x01) 8369a0bf528SMauro Carvalho Chehab *status |= FE_HAS_SIGNAL; 8379a0bf528SMauro Carvalho Chehab } 8389a0bf528SMauro Carvalho Chehab 8399a0bf528SMauro Carvalho Chehab if (sync & 0x02) 8409a0bf528SMauro Carvalho Chehab *status |= FE_HAS_CARRIER; /* Phase locked */ 8419a0bf528SMauro Carvalho Chehab if (sync & 0x04) 8429a0bf528SMauro Carvalho Chehab *status |= FE_HAS_VITERBI; 8439a0bf528SMauro Carvalho Chehab 8449a0bf528SMauro Carvalho Chehab /* Reed-Solomon Status */ 8459a0bf528SMauro Carvalho Chehab if (sync & 0x08) 8469a0bf528SMauro Carvalho Chehab *status |= FE_HAS_SYNC; 8479a0bf528SMauro Carvalho Chehab if (sync & 0x80) 8489a0bf528SMauro Carvalho Chehab *status |= FE_HAS_LOCK; /*Full Sync */ 8499a0bf528SMauro Carvalho Chehab 8509a0bf528SMauro Carvalho Chehab return 0; 8519a0bf528SMauro Carvalho Chehab } 8529a0bf528SMauro Carvalho Chehab 8539a0bf528SMauro Carvalho Chehab /* 8549a0bf528SMauro Carvalho Chehab * Configured to return the measurement of errors in blocks, 8559a0bf528SMauro Carvalho Chehab * because no UCBLOCKS value is available, so this value doubles up 8569a0bf528SMauro Carvalho Chehab * to satisfy both measurements. 8579a0bf528SMauro Carvalho Chehab */ 8589a0bf528SMauro Carvalho Chehab static int cx24123_read_ber(struct dvb_frontend *fe, u32 *ber) 8599a0bf528SMauro Carvalho Chehab { 8609a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 8619a0bf528SMauro Carvalho Chehab 8629a0bf528SMauro Carvalho Chehab /* The true bit error rate is this value divided by 8639a0bf528SMauro Carvalho Chehab the window size (set as 256 * 255) */ 8649a0bf528SMauro Carvalho Chehab *ber = ((cx24123_readreg(state, 0x1c) & 0x3f) << 16) | 8659a0bf528SMauro Carvalho Chehab (cx24123_readreg(state, 0x1d) << 8 | 8669a0bf528SMauro Carvalho Chehab cx24123_readreg(state, 0x1e)); 8679a0bf528SMauro Carvalho Chehab 8689a0bf528SMauro Carvalho Chehab dprintk("BER = %d\n", *ber); 8699a0bf528SMauro Carvalho Chehab 8709a0bf528SMauro Carvalho Chehab return 0; 8719a0bf528SMauro Carvalho Chehab } 8729a0bf528SMauro Carvalho Chehab 8739a0bf528SMauro Carvalho Chehab static int cx24123_read_signal_strength(struct dvb_frontend *fe, 8749a0bf528SMauro Carvalho Chehab u16 *signal_strength) 8759a0bf528SMauro Carvalho Chehab { 8769a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 8779a0bf528SMauro Carvalho Chehab 8789a0bf528SMauro Carvalho Chehab /* larger = better */ 8799a0bf528SMauro Carvalho Chehab *signal_strength = cx24123_readreg(state, 0x3b) << 8; 8809a0bf528SMauro Carvalho Chehab 8819a0bf528SMauro Carvalho Chehab dprintk("Signal strength = %d\n", *signal_strength); 8829a0bf528SMauro Carvalho Chehab 8839a0bf528SMauro Carvalho Chehab return 0; 8849a0bf528SMauro Carvalho Chehab } 8859a0bf528SMauro Carvalho Chehab 8869a0bf528SMauro Carvalho Chehab static int cx24123_read_snr(struct dvb_frontend *fe, u16 *snr) 8879a0bf528SMauro Carvalho Chehab { 8889a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 8899a0bf528SMauro Carvalho Chehab 8909a0bf528SMauro Carvalho Chehab /* Inverted raw Es/N0 count, totally bogus but better than the 8919a0bf528SMauro Carvalho Chehab BER threshold. */ 8929a0bf528SMauro Carvalho Chehab *snr = 65535 - (((u16)cx24123_readreg(state, 0x18) << 8) | 8939a0bf528SMauro Carvalho Chehab (u16)cx24123_readreg(state, 0x19)); 8949a0bf528SMauro Carvalho Chehab 8959a0bf528SMauro Carvalho Chehab dprintk("read S/N index = %d\n", *snr); 8969a0bf528SMauro Carvalho Chehab 8979a0bf528SMauro Carvalho Chehab return 0; 8989a0bf528SMauro Carvalho Chehab } 8999a0bf528SMauro Carvalho Chehab 9009a0bf528SMauro Carvalho Chehab static int cx24123_set_frontend(struct dvb_frontend *fe) 9019a0bf528SMauro Carvalho Chehab { 9029a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 9039a0bf528SMauro Carvalho Chehab struct dtv_frontend_properties *p = &fe->dtv_property_cache; 9049a0bf528SMauro Carvalho Chehab 9059a0bf528SMauro Carvalho Chehab dprintk("\n"); 9069a0bf528SMauro Carvalho Chehab 9079a0bf528SMauro Carvalho Chehab if (state->config->set_ts_params) 9089a0bf528SMauro Carvalho Chehab state->config->set_ts_params(fe, 0); 9099a0bf528SMauro Carvalho Chehab 9109a0bf528SMauro Carvalho Chehab state->currentfreq = p->frequency; 9119a0bf528SMauro Carvalho Chehab state->currentsymbolrate = p->symbol_rate; 9129a0bf528SMauro Carvalho Chehab 9139a0bf528SMauro Carvalho Chehab cx24123_set_inversion(state, p->inversion); 9149a0bf528SMauro Carvalho Chehab cx24123_set_fec(state, p->fec_inner); 9159a0bf528SMauro Carvalho Chehab cx24123_set_symbolrate(state, p->symbol_rate); 9169a0bf528SMauro Carvalho Chehab 9179a0bf528SMauro Carvalho Chehab if (!state->config->dont_use_pll) 9189a0bf528SMauro Carvalho Chehab cx24123_pll_tune(fe); 9199a0bf528SMauro Carvalho Chehab else if (fe->ops.tuner_ops.set_params) 9209a0bf528SMauro Carvalho Chehab fe->ops.tuner_ops.set_params(fe); 9219a0bf528SMauro Carvalho Chehab else 9229a0bf528SMauro Carvalho Chehab err("it seems I don't have a tuner..."); 9239a0bf528SMauro Carvalho Chehab 9249a0bf528SMauro Carvalho Chehab /* Enable automatic acquisition and reset cycle */ 9259a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x03, (cx24123_readreg(state, 0x03) | 0x07)); 9269a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x00, 0x10); 9279a0bf528SMauro Carvalho Chehab cx24123_writereg(state, 0x00, 0); 9289a0bf528SMauro Carvalho Chehab 9299a0bf528SMauro Carvalho Chehab if (state->config->agc_callback) 9309a0bf528SMauro Carvalho Chehab state->config->agc_callback(fe); 9319a0bf528SMauro Carvalho Chehab 9329a0bf528SMauro Carvalho Chehab return 0; 9339a0bf528SMauro Carvalho Chehab } 9349a0bf528SMauro Carvalho Chehab 9357e3e68bcSMauro Carvalho Chehab static int cx24123_get_frontend(struct dvb_frontend *fe, 9367e3e68bcSMauro Carvalho Chehab struct dtv_frontend_properties *p) 9379a0bf528SMauro Carvalho Chehab { 9389a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 9399a0bf528SMauro Carvalho Chehab 9409a0bf528SMauro Carvalho Chehab dprintk("\n"); 9419a0bf528SMauro Carvalho Chehab 9429a0bf528SMauro Carvalho Chehab if (cx24123_get_inversion(state, &p->inversion) != 0) { 9439a0bf528SMauro Carvalho Chehab err("%s: Failed to get inversion status\n", __func__); 9449a0bf528SMauro Carvalho Chehab return -EREMOTEIO; 9459a0bf528SMauro Carvalho Chehab } 9469a0bf528SMauro Carvalho Chehab if (cx24123_get_fec(state, &p->fec_inner) != 0) { 9479a0bf528SMauro Carvalho Chehab err("%s: Failed to get fec status\n", __func__); 9489a0bf528SMauro Carvalho Chehab return -EREMOTEIO; 9499a0bf528SMauro Carvalho Chehab } 9509a0bf528SMauro Carvalho Chehab p->frequency = state->currentfreq; 9519a0bf528SMauro Carvalho Chehab p->symbol_rate = state->currentsymbolrate; 9529a0bf528SMauro Carvalho Chehab 9539a0bf528SMauro Carvalho Chehab return 0; 9549a0bf528SMauro Carvalho Chehab } 9559a0bf528SMauro Carvalho Chehab 9560df289a2SMauro Carvalho Chehab static int cx24123_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone) 9579a0bf528SMauro Carvalho Chehab { 9589a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 9599a0bf528SMauro Carvalho Chehab u8 val; 9609a0bf528SMauro Carvalho Chehab 9619a0bf528SMauro Carvalho Chehab /* wait for diseqc queue ready */ 9629a0bf528SMauro Carvalho Chehab cx24123_wait_for_diseqc(state); 9639a0bf528SMauro Carvalho Chehab 9649a0bf528SMauro Carvalho Chehab val = cx24123_readreg(state, 0x29) & ~0x40; 9659a0bf528SMauro Carvalho Chehab 9669a0bf528SMauro Carvalho Chehab switch (tone) { 9679a0bf528SMauro Carvalho Chehab case SEC_TONE_ON: 9689a0bf528SMauro Carvalho Chehab dprintk("setting tone on\n"); 9699a0bf528SMauro Carvalho Chehab return cx24123_writereg(state, 0x29, val | 0x10); 9709a0bf528SMauro Carvalho Chehab case SEC_TONE_OFF: 9719a0bf528SMauro Carvalho Chehab dprintk("setting tone off\n"); 9729a0bf528SMauro Carvalho Chehab return cx24123_writereg(state, 0x29, val & 0xef); 9739a0bf528SMauro Carvalho Chehab default: 9749a0bf528SMauro Carvalho Chehab err("CASE reached default with tone=%d\n", tone); 9759a0bf528SMauro Carvalho Chehab return -EINVAL; 9769a0bf528SMauro Carvalho Chehab } 9779a0bf528SMauro Carvalho Chehab 9789a0bf528SMauro Carvalho Chehab return 0; 9799a0bf528SMauro Carvalho Chehab } 9809a0bf528SMauro Carvalho Chehab 9819a0bf528SMauro Carvalho Chehab static int cx24123_tune(struct dvb_frontend *fe, 9829a0bf528SMauro Carvalho Chehab bool re_tune, 9839a0bf528SMauro Carvalho Chehab unsigned int mode_flags, 9849a0bf528SMauro Carvalho Chehab unsigned int *delay, 9850df289a2SMauro Carvalho Chehab enum fe_status *status) 9869a0bf528SMauro Carvalho Chehab { 9879a0bf528SMauro Carvalho Chehab int retval = 0; 9889a0bf528SMauro Carvalho Chehab 9899a0bf528SMauro Carvalho Chehab if (re_tune) 9909a0bf528SMauro Carvalho Chehab retval = cx24123_set_frontend(fe); 9919a0bf528SMauro Carvalho Chehab 9929a0bf528SMauro Carvalho Chehab if (!(mode_flags & FE_TUNE_MODE_ONESHOT)) 9939a0bf528SMauro Carvalho Chehab cx24123_read_status(fe, status); 9949a0bf528SMauro Carvalho Chehab *delay = HZ/10; 9959a0bf528SMauro Carvalho Chehab 9969a0bf528SMauro Carvalho Chehab return retval; 9979a0bf528SMauro Carvalho Chehab } 9989a0bf528SMauro Carvalho Chehab 9998d718e53SLuc Van Oostenryck static enum dvbfe_algo cx24123_get_algo(struct dvb_frontend *fe) 10009a0bf528SMauro Carvalho Chehab { 100127460adcSMauro Carvalho Chehab return DVBFE_ALGO_HW; 10029a0bf528SMauro Carvalho Chehab } 10039a0bf528SMauro Carvalho Chehab 10049a0bf528SMauro Carvalho Chehab static void cx24123_release(struct dvb_frontend *fe) 10059a0bf528SMauro Carvalho Chehab { 10069a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 10079a0bf528SMauro Carvalho Chehab dprintk("\n"); 10089a0bf528SMauro Carvalho Chehab i2c_del_adapter(&state->tuner_i2c_adapter); 10099a0bf528SMauro Carvalho Chehab kfree(state); 10109a0bf528SMauro Carvalho Chehab } 10119a0bf528SMauro Carvalho Chehab 10129a0bf528SMauro Carvalho Chehab static int cx24123_tuner_i2c_tuner_xfer(struct i2c_adapter *i2c_adap, 10139a0bf528SMauro Carvalho Chehab struct i2c_msg msg[], int num) 10149a0bf528SMauro Carvalho Chehab { 10159a0bf528SMauro Carvalho Chehab struct cx24123_state *state = i2c_get_adapdata(i2c_adap); 10169a0bf528SMauro Carvalho Chehab /* this repeater closes after the first stop */ 10179a0bf528SMauro Carvalho Chehab cx24123_repeater_mode(state, 1, 1); 10189a0bf528SMauro Carvalho Chehab return i2c_transfer(state->i2c, msg, num); 10199a0bf528SMauro Carvalho Chehab } 10209a0bf528SMauro Carvalho Chehab 10219a0bf528SMauro Carvalho Chehab static u32 cx24123_tuner_i2c_func(struct i2c_adapter *adapter) 10229a0bf528SMauro Carvalho Chehab { 10239a0bf528SMauro Carvalho Chehab return I2C_FUNC_I2C; 10249a0bf528SMauro Carvalho Chehab } 10259a0bf528SMauro Carvalho Chehab 10266ac8b81eSGustavo A. R. Silva static const struct i2c_algorithm cx24123_tuner_i2c_algo = { 10279a0bf528SMauro Carvalho Chehab .master_xfer = cx24123_tuner_i2c_tuner_xfer, 10289a0bf528SMauro Carvalho Chehab .functionality = cx24123_tuner_i2c_func, 10299a0bf528SMauro Carvalho Chehab }; 10309a0bf528SMauro Carvalho Chehab 10319a0bf528SMauro Carvalho Chehab struct i2c_adapter * 10329a0bf528SMauro Carvalho Chehab cx24123_get_tuner_i2c_adapter(struct dvb_frontend *fe) 10339a0bf528SMauro Carvalho Chehab { 10349a0bf528SMauro Carvalho Chehab struct cx24123_state *state = fe->demodulator_priv; 10359a0bf528SMauro Carvalho Chehab return &state->tuner_i2c_adapter; 10369a0bf528SMauro Carvalho Chehab } 10379a0bf528SMauro Carvalho Chehab EXPORT_SYMBOL(cx24123_get_tuner_i2c_adapter); 10389a0bf528SMauro Carvalho Chehab 1039bd336e63SMax Kellermann static const struct dvb_frontend_ops cx24123_ops; 10409a0bf528SMauro Carvalho Chehab 10419a0bf528SMauro Carvalho Chehab struct dvb_frontend *cx24123_attach(const struct cx24123_config *config, 10429a0bf528SMauro Carvalho Chehab struct i2c_adapter *i2c) 10439a0bf528SMauro Carvalho Chehab { 10449a0bf528SMauro Carvalho Chehab /* allocate memory for the internal state */ 10459a0bf528SMauro Carvalho Chehab struct cx24123_state *state = 10469a0bf528SMauro Carvalho Chehab kzalloc(sizeof(struct cx24123_state), GFP_KERNEL); 10479a0bf528SMauro Carvalho Chehab 10489a0bf528SMauro Carvalho Chehab dprintk("\n"); 10499a0bf528SMauro Carvalho Chehab if (state == NULL) { 10509a0bf528SMauro Carvalho Chehab err("Unable to kzalloc\n"); 10519a0bf528SMauro Carvalho Chehab goto error; 10529a0bf528SMauro Carvalho Chehab } 10539a0bf528SMauro Carvalho Chehab 10549a0bf528SMauro Carvalho Chehab /* setup the state */ 10559a0bf528SMauro Carvalho Chehab state->config = config; 10569a0bf528SMauro Carvalho Chehab state->i2c = i2c; 10579a0bf528SMauro Carvalho Chehab 10589a0bf528SMauro Carvalho Chehab /* check if the demod is there */ 10599a0bf528SMauro Carvalho Chehab state->demod_rev = cx24123_readreg(state, 0x00); 10609a0bf528SMauro Carvalho Chehab switch (state->demod_rev) { 10619a0bf528SMauro Carvalho Chehab case 0xe1: 10629a0bf528SMauro Carvalho Chehab info("detected CX24123C\n"); 10639a0bf528SMauro Carvalho Chehab break; 10649a0bf528SMauro Carvalho Chehab case 0xd1: 10659a0bf528SMauro Carvalho Chehab info("detected CX24123\n"); 10669a0bf528SMauro Carvalho Chehab break; 10679a0bf528SMauro Carvalho Chehab default: 10689a0bf528SMauro Carvalho Chehab err("wrong demod revision: %x\n", state->demod_rev); 10699a0bf528SMauro Carvalho Chehab goto error; 10709a0bf528SMauro Carvalho Chehab } 10719a0bf528SMauro Carvalho Chehab 10729a0bf528SMauro Carvalho Chehab /* create dvb_frontend */ 10739a0bf528SMauro Carvalho Chehab memcpy(&state->frontend.ops, &cx24123_ops, 10749a0bf528SMauro Carvalho Chehab sizeof(struct dvb_frontend_ops)); 10759a0bf528SMauro Carvalho Chehab state->frontend.demodulator_priv = state; 10769a0bf528SMauro Carvalho Chehab 10779a0bf528SMauro Carvalho Chehab /* create tuner i2c adapter */ 10789a0bf528SMauro Carvalho Chehab if (config->dont_use_pll) 10799a0bf528SMauro Carvalho Chehab cx24123_repeater_mode(state, 1, 0); 10809a0bf528SMauro Carvalho Chehab 1081c0decac1SMauro Carvalho Chehab strscpy(state->tuner_i2c_adapter.name, "CX24123 tuner I2C bus", 10829a0bf528SMauro Carvalho Chehab sizeof(state->tuner_i2c_adapter.name)); 10839a0bf528SMauro Carvalho Chehab state->tuner_i2c_adapter.algo = &cx24123_tuner_i2c_algo; 10849a0bf528SMauro Carvalho Chehab state->tuner_i2c_adapter.algo_data = NULL; 1085fdc6b388SHans Verkuil state->tuner_i2c_adapter.dev.parent = i2c->dev.parent; 10869a0bf528SMauro Carvalho Chehab i2c_set_adapdata(&state->tuner_i2c_adapter, state); 10879a0bf528SMauro Carvalho Chehab if (i2c_add_adapter(&state->tuner_i2c_adapter) < 0) { 10889a0bf528SMauro Carvalho Chehab err("tuner i2c bus could not be initialized\n"); 10899a0bf528SMauro Carvalho Chehab goto error; 10909a0bf528SMauro Carvalho Chehab } 10919a0bf528SMauro Carvalho Chehab 10929a0bf528SMauro Carvalho Chehab return &state->frontend; 10939a0bf528SMauro Carvalho Chehab 10949a0bf528SMauro Carvalho Chehab error: 10959a0bf528SMauro Carvalho Chehab kfree(state); 10969a0bf528SMauro Carvalho Chehab 10979a0bf528SMauro Carvalho Chehab return NULL; 10989a0bf528SMauro Carvalho Chehab } 10999a0bf528SMauro Carvalho Chehab EXPORT_SYMBOL(cx24123_attach); 11009a0bf528SMauro Carvalho Chehab 1101bd336e63SMax Kellermann static const struct dvb_frontend_ops cx24123_ops = { 11029a0bf528SMauro Carvalho Chehab .delsys = { SYS_DVBS }, 11039a0bf528SMauro Carvalho Chehab .info = { 11049a0bf528SMauro Carvalho Chehab .name = "Conexant CX24123/CX24109", 1105f1b1eabfSMauro Carvalho Chehab .frequency_min_hz = 950 * MHz, 1106f1b1eabfSMauro Carvalho Chehab .frequency_max_hz = 2150 * MHz, 1107f1b1eabfSMauro Carvalho Chehab .frequency_stepsize_hz = 1011 * kHz, 1108f1b1eabfSMauro Carvalho Chehab .frequency_tolerance_hz = 5 * MHz, 11099a0bf528SMauro Carvalho Chehab .symbol_rate_min = 1000000, 11109a0bf528SMauro Carvalho Chehab .symbol_rate_max = 45000000, 11119a0bf528SMauro Carvalho Chehab .caps = FE_CAN_INVERSION_AUTO | 11129a0bf528SMauro Carvalho Chehab FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 11139a0bf528SMauro Carvalho Chehab FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | 11149a0bf528SMauro Carvalho Chehab FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 11159a0bf528SMauro Carvalho Chehab FE_CAN_QPSK | FE_CAN_RECOVER 11169a0bf528SMauro Carvalho Chehab }, 11179a0bf528SMauro Carvalho Chehab 11189a0bf528SMauro Carvalho Chehab .release = cx24123_release, 11199a0bf528SMauro Carvalho Chehab 11209a0bf528SMauro Carvalho Chehab .init = cx24123_initfe, 11219a0bf528SMauro Carvalho Chehab .set_frontend = cx24123_set_frontend, 11229a0bf528SMauro Carvalho Chehab .get_frontend = cx24123_get_frontend, 11239a0bf528SMauro Carvalho Chehab .read_status = cx24123_read_status, 11249a0bf528SMauro Carvalho Chehab .read_ber = cx24123_read_ber, 11259a0bf528SMauro Carvalho Chehab .read_signal_strength = cx24123_read_signal_strength, 11269a0bf528SMauro Carvalho Chehab .read_snr = cx24123_read_snr, 11279a0bf528SMauro Carvalho Chehab .diseqc_send_master_cmd = cx24123_send_diseqc_msg, 11289a0bf528SMauro Carvalho Chehab .diseqc_send_burst = cx24123_diseqc_send_burst, 11299a0bf528SMauro Carvalho Chehab .set_tone = cx24123_set_tone, 11309a0bf528SMauro Carvalho Chehab .set_voltage = cx24123_set_voltage, 11319a0bf528SMauro Carvalho Chehab .tune = cx24123_tune, 11329a0bf528SMauro Carvalho Chehab .get_frontend_algo = cx24123_get_algo, 11339a0bf528SMauro Carvalho Chehab }; 11349a0bf528SMauro Carvalho Chehab 11359a0bf528SMauro Carvalho Chehab MODULE_DESCRIPTION("DVB Frontend module for Conexant " \ 11369a0bf528SMauro Carvalho Chehab "CX24123/CX24109/CX24113 hardware"); 11379a0bf528SMauro Carvalho Chehab MODULE_AUTHOR("Steven Toth"); 11389a0bf528SMauro Carvalho Chehab MODULE_LICENSE("GPL"); 11399a0bf528SMauro Carvalho Chehab 1140