1 /* 2 Conexant cx24116/cx24118 - DVBS/S2 Satellite demod/tuner driver 3 4 Copyright (C) 2006-2008 Steven Toth <stoth@hauppauge.com> 5 Copyright (C) 2006-2007 Georg Acher 6 Copyright (C) 2007-2008 Darron Broad 7 March 2007 8 Fixed some bugs. 9 Added diseqc support. 10 Added corrected signal strength support. 11 August 2007 12 Sync with legacy version. 13 Some clean ups. 14 Copyright (C) 2008 Igor Liplianin 15 September, 9th 2008 16 Fixed locking on high symbol rates (>30000). 17 Implement MPEG initialization parameter. 18 January, 17th 2009 19 Fill set_voltage with actually control voltage code. 20 Correct set tone to not affect voltage. 21 22 This program is free software; you can redistribute it and/or modify 23 it under the terms of the GNU General Public License as published by 24 the Free Software Foundation; either version 2 of the License, or 25 (at your option) any later version. 26 27 This program is distributed in the hope that it will be useful, 28 but WITHOUT ANY WARRANTY; without even the implied warranty of 29 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 30 GNU General Public License for more details. 31 32 You should have received a copy of the GNU General Public License 33 along with this program; if not, write to the Free Software 34 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 35 */ 36 37 #include <linux/slab.h> 38 #include <linux/kernel.h> 39 #include <linux/module.h> 40 #include <linux/moduleparam.h> 41 #include <linux/init.h> 42 #include <linux/firmware.h> 43 44 #include <media/dvb_frontend.h> 45 #include "cx24116.h" 46 47 static int debug; 48 module_param(debug, int, 0644); 49 MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); 50 51 #define dprintk(args...) \ 52 do { \ 53 if (debug) \ 54 printk(KERN_INFO "cx24116: " args); \ 55 } while (0) 56 57 #define CX24116_DEFAULT_FIRMWARE "dvb-fe-cx24116.fw" 58 #define CX24116_SEARCH_RANGE_KHZ 5000 59 60 /* known registers */ 61 #define CX24116_REG_COMMAND (0x00) /* command args 0x00..0x1e */ 62 #define CX24116_REG_EXECUTE (0x1f) /* execute command */ 63 #define CX24116_REG_MAILBOX (0x96) /* FW or multipurpose mailbox? */ 64 #define CX24116_REG_RESET (0x20) /* reset status > 0 */ 65 #define CX24116_REG_SIGNAL (0x9e) /* signal low */ 66 #define CX24116_REG_SSTATUS (0x9d) /* signal high / status */ 67 #define CX24116_REG_QUALITY8 (0xa3) 68 #define CX24116_REG_QSTATUS (0xbc) 69 #define CX24116_REG_QUALITY0 (0xd5) 70 #define CX24116_REG_BER0 (0xc9) 71 #define CX24116_REG_BER8 (0xc8) 72 #define CX24116_REG_BER16 (0xc7) 73 #define CX24116_REG_BER24 (0xc6) 74 #define CX24116_REG_UCB0 (0xcb) 75 #define CX24116_REG_UCB8 (0xca) 76 #define CX24116_REG_CLKDIV (0xf3) 77 #define CX24116_REG_RATEDIV (0xf9) 78 79 /* configured fec (not tuned) or actual FEC (tuned) 1=1/2 2=2/3 etc */ 80 #define CX24116_REG_FECSTATUS (0x9c) 81 82 /* FECSTATUS bits */ 83 /* mask to determine configured fec (not tuned) or actual fec (tuned) */ 84 #define CX24116_FEC_FECMASK (0x1f) 85 86 /* Select DVB-S demodulator, else DVB-S2 */ 87 #define CX24116_FEC_DVBS (0x20) 88 #define CX24116_FEC_UNKNOWN (0x40) /* Unknown/unused */ 89 90 /* Pilot mode requested when tuning else always reset when tuned */ 91 #define CX24116_FEC_PILOT (0x80) 92 93 /* arg buffer size */ 94 #define CX24116_ARGLEN (0x1e) 95 96 /* rolloff */ 97 #define CX24116_ROLLOFF_020 (0x00) 98 #define CX24116_ROLLOFF_025 (0x01) 99 #define CX24116_ROLLOFF_035 (0x02) 100 101 /* pilot bit */ 102 #define CX24116_PILOT_OFF (0x00) 103 #define CX24116_PILOT_ON (0x40) 104 105 /* signal status */ 106 #define CX24116_HAS_SIGNAL (0x01) 107 #define CX24116_HAS_CARRIER (0x02) 108 #define CX24116_HAS_VITERBI (0x04) 109 #define CX24116_HAS_SYNCLOCK (0x08) 110 #define CX24116_HAS_UNKNOWN1 (0x10) 111 #define CX24116_HAS_UNKNOWN2 (0x20) 112 #define CX24116_STATUS_MASK (0x0f) 113 #define CX24116_SIGNAL_MASK (0xc0) 114 115 #define CX24116_DISEQC_TONEOFF (0) /* toneburst never sent */ 116 #define CX24116_DISEQC_TONECACHE (1) /* toneburst cached */ 117 #define CX24116_DISEQC_MESGCACHE (2) /* message cached */ 118 119 /* arg offset for DiSEqC */ 120 #define CX24116_DISEQC_BURST (1) 121 #define CX24116_DISEQC_ARG2_2 (2) /* unknown value=2 */ 122 #define CX24116_DISEQC_ARG3_0 (3) /* unknown value=0 */ 123 #define CX24116_DISEQC_ARG4_0 (4) /* unknown value=0 */ 124 #define CX24116_DISEQC_MSGLEN (5) 125 #define CX24116_DISEQC_MSGOFS (6) 126 127 /* DiSEqC burst */ 128 #define CX24116_DISEQC_MINI_A (0) 129 #define CX24116_DISEQC_MINI_B (1) 130 131 /* DiSEqC tone burst */ 132 static int toneburst = 1; 133 module_param(toneburst, int, 0644); 134 MODULE_PARM_DESC(toneburst, "DiSEqC toneburst 0=OFF, 1=TONE CACHE, "\ 135 "2=MESSAGE CACHE (default:1)"); 136 137 /* SNR measurements */ 138 static int esno_snr; 139 module_param(esno_snr, int, 0644); 140 MODULE_PARM_DESC(esno_snr, "SNR return units, 0=PERCENTAGE 0-100, "\ 141 "1=ESNO(db * 10) (default:0)"); 142 143 enum cmds { 144 CMD_SET_VCO = 0x10, 145 CMD_TUNEREQUEST = 0x11, 146 CMD_MPEGCONFIG = 0x13, 147 CMD_TUNERINIT = 0x14, 148 CMD_BANDWIDTH = 0x15, 149 CMD_GETAGC = 0x19, 150 CMD_LNBCONFIG = 0x20, 151 CMD_LNBSEND = 0x21, /* Formerly CMD_SEND_DISEQC */ 152 CMD_LNBDCLEVEL = 0x22, 153 CMD_SET_TONE = 0x23, 154 CMD_UPDFWVERS = 0x35, 155 CMD_TUNERSLEEP = 0x36, 156 CMD_AGCCONTROL = 0x3b, /* Unknown */ 157 }; 158 159 /* The Demod/Tuner can't easily provide these, we cache them */ 160 struct cx24116_tuning { 161 u32 frequency; 162 u32 symbol_rate; 163 enum fe_spectral_inversion inversion; 164 enum fe_code_rate fec; 165 166 enum fe_delivery_system delsys; 167 enum fe_modulation modulation; 168 enum fe_pilot pilot; 169 enum fe_rolloff rolloff; 170 171 /* Demod values */ 172 u8 fec_val; 173 u8 fec_mask; 174 u8 inversion_val; 175 u8 pilot_val; 176 u8 rolloff_val; 177 }; 178 179 /* Basic commands that are sent to the firmware */ 180 struct cx24116_cmd { 181 u8 len; 182 u8 args[CX24116_ARGLEN]; 183 }; 184 185 struct cx24116_state { 186 struct i2c_adapter *i2c; 187 const struct cx24116_config *config; 188 189 struct dvb_frontend frontend; 190 191 struct cx24116_tuning dcur; 192 struct cx24116_tuning dnxt; 193 194 u8 skip_fw_load; 195 u8 burst; 196 struct cx24116_cmd dsec_cmd; 197 }; 198 199 static int cx24116_writereg(struct cx24116_state *state, int reg, int data) 200 { 201 u8 buf[] = { reg, data }; 202 struct i2c_msg msg = { .addr = state->config->demod_address, 203 .flags = 0, .buf = buf, .len = 2 }; 204 int err; 205 206 if (debug > 1) 207 printk("cx24116: %s: write reg 0x%02x, value 0x%02x\n", 208 __func__, reg, data); 209 210 err = i2c_transfer(state->i2c, &msg, 1); 211 if (err != 1) { 212 printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x, value == 0x%02x)\n", 213 __func__, err, reg, data); 214 return -EREMOTEIO; 215 } 216 217 return 0; 218 } 219 220 /* Bulk byte writes to a single I2C address, for 32k firmware load */ 221 static int cx24116_writeregN(struct cx24116_state *state, int reg, 222 const u8 *data, u16 len) 223 { 224 int ret; 225 struct i2c_msg msg; 226 u8 *buf; 227 228 buf = kmalloc(len + 1, GFP_KERNEL); 229 if (!buf) 230 return -ENOMEM; 231 232 *(buf) = reg; 233 memcpy(buf + 1, data, len); 234 235 msg.addr = state->config->demod_address; 236 msg.flags = 0; 237 msg.buf = buf; 238 msg.len = len + 1; 239 240 if (debug > 1) 241 printk(KERN_INFO "cx24116: %s: write regN 0x%02x, len = %d\n", 242 __func__, reg, len); 243 244 ret = i2c_transfer(state->i2c, &msg, 1); 245 if (ret != 1) { 246 printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x\n", 247 __func__, ret, reg); 248 ret = -EREMOTEIO; 249 } 250 251 kfree(buf); 252 253 return ret; 254 } 255 256 static int cx24116_readreg(struct cx24116_state *state, u8 reg) 257 { 258 int ret; 259 u8 b0[] = { reg }; 260 u8 b1[] = { 0 }; 261 struct i2c_msg msg[] = { 262 { .addr = state->config->demod_address, .flags = 0, 263 .buf = b0, .len = 1 }, 264 { .addr = state->config->demod_address, .flags = I2C_M_RD, 265 .buf = b1, .len = 1 } 266 }; 267 268 ret = i2c_transfer(state->i2c, msg, 2); 269 270 if (ret != 2) { 271 printk(KERN_ERR "%s: reg=0x%x (error=%d)\n", 272 __func__, reg, ret); 273 return ret; 274 } 275 276 if (debug > 1) 277 printk(KERN_INFO "cx24116: read reg 0x%02x, value 0x%02x\n", 278 reg, b1[0]); 279 280 return b1[0]; 281 } 282 283 static int cx24116_set_inversion(struct cx24116_state *state, 284 enum fe_spectral_inversion inversion) 285 { 286 dprintk("%s(%d)\n", __func__, inversion); 287 288 switch (inversion) { 289 case INVERSION_OFF: 290 state->dnxt.inversion_val = 0x00; 291 break; 292 case INVERSION_ON: 293 state->dnxt.inversion_val = 0x04; 294 break; 295 case INVERSION_AUTO: 296 state->dnxt.inversion_val = 0x0C; 297 break; 298 default: 299 return -EINVAL; 300 } 301 302 state->dnxt.inversion = inversion; 303 304 return 0; 305 } 306 307 /* 308 * modfec (modulation and FEC) 309 * =========================== 310 * 311 * MOD FEC mask/val standard 312 * ---- -------- ----------- -------- 313 * QPSK FEC_1_2 0x02 0x02+X DVB-S 314 * QPSK FEC_2_3 0x04 0x02+X DVB-S 315 * QPSK FEC_3_4 0x08 0x02+X DVB-S 316 * QPSK FEC_4_5 0x10 0x02+X DVB-S (?) 317 * QPSK FEC_5_6 0x20 0x02+X DVB-S 318 * QPSK FEC_6_7 0x40 0x02+X DVB-S 319 * QPSK FEC_7_8 0x80 0x02+X DVB-S 320 * QPSK FEC_8_9 0x01 0x02+X DVB-S (?) (NOT SUPPORTED?) 321 * QPSK AUTO 0xff 0x02+X DVB-S 322 * 323 * For DVB-S high byte probably represents FEC 324 * and low byte selects the modulator. The high 325 * byte is search range mask. Bit 5 may turn 326 * on DVB-S and remaining bits represent some 327 * kind of calibration (how/what i do not know). 328 * 329 * Eg.(2/3) szap "Zone Horror" 330 * 331 * mask/val = 0x04, 0x20 332 * status 1f | signal c3c0 | snr a333 | ber 00000098 | unc 0 | FE_HAS_LOCK 333 * 334 * mask/val = 0x04, 0x30 335 * status 1f | signal c3c0 | snr a333 | ber 00000000 | unc 0 | FE_HAS_LOCK 336 * 337 * After tuning FECSTATUS contains actual FEC 338 * in use numbered 1 through to 8 for 1/2 .. 2/3 etc 339 * 340 * NBC=NOT/NON BACKWARD COMPATIBLE WITH DVB-S (DVB-S2 only) 341 * 342 * NBC-QPSK FEC_1_2 0x00, 0x04 DVB-S2 343 * NBC-QPSK FEC_3_5 0x00, 0x05 DVB-S2 344 * NBC-QPSK FEC_2_3 0x00, 0x06 DVB-S2 345 * NBC-QPSK FEC_3_4 0x00, 0x07 DVB-S2 346 * NBC-QPSK FEC_4_5 0x00, 0x08 DVB-S2 347 * NBC-QPSK FEC_5_6 0x00, 0x09 DVB-S2 348 * NBC-QPSK FEC_8_9 0x00, 0x0a DVB-S2 349 * NBC-QPSK FEC_9_10 0x00, 0x0b DVB-S2 350 * 351 * NBC-8PSK FEC_3_5 0x00, 0x0c DVB-S2 352 * NBC-8PSK FEC_2_3 0x00, 0x0d DVB-S2 353 * NBC-8PSK FEC_3_4 0x00, 0x0e DVB-S2 354 * NBC-8PSK FEC_5_6 0x00, 0x0f DVB-S2 355 * NBC-8PSK FEC_8_9 0x00, 0x10 DVB-S2 356 * NBC-8PSK FEC_9_10 0x00, 0x11 DVB-S2 357 * 358 * For DVB-S2 low bytes selects both modulator 359 * and FEC. High byte is meaningless here. To 360 * set pilot, bit 6 (0x40) is set. When inspecting 361 * FECSTATUS bit 7 (0x80) represents the pilot 362 * selection whilst not tuned. When tuned, actual FEC 363 * in use is found in FECSTATUS as per above. Pilot 364 * value is reset. 365 */ 366 367 /* A table of modulation, fec and configuration bytes for the demod. 368 * Not all S2 mmodulation schemes are support and not all rates with 369 * a scheme are support. Especially, no auto detect when in S2 mode. 370 */ 371 static struct cx24116_modfec { 372 enum fe_delivery_system delivery_system; 373 enum fe_modulation modulation; 374 enum fe_code_rate fec; 375 u8 mask; /* In DVBS mode this is used to autodetect */ 376 u8 val; /* Passed to the firmware to indicate mode selection */ 377 } CX24116_MODFEC_MODES[] = { 378 /* QPSK. For unknown rates we set hardware to auto detect 0xfe 0x30 */ 379 380 /*mod fec mask val */ 381 { SYS_DVBS, QPSK, FEC_NONE, 0xfe, 0x30 }, 382 { SYS_DVBS, QPSK, FEC_1_2, 0x02, 0x2e }, /* 00000010 00101110 */ 383 { SYS_DVBS, QPSK, FEC_2_3, 0x04, 0x2f }, /* 00000100 00101111 */ 384 { SYS_DVBS, QPSK, FEC_3_4, 0x08, 0x30 }, /* 00001000 00110000 */ 385 { SYS_DVBS, QPSK, FEC_4_5, 0xfe, 0x30 }, /* 000?0000 ? */ 386 { SYS_DVBS, QPSK, FEC_5_6, 0x20, 0x31 }, /* 00100000 00110001 */ 387 { SYS_DVBS, QPSK, FEC_6_7, 0xfe, 0x30 }, /* 0?000000 ? */ 388 { SYS_DVBS, QPSK, FEC_7_8, 0x80, 0x32 }, /* 10000000 00110010 */ 389 { SYS_DVBS, QPSK, FEC_8_9, 0xfe, 0x30 }, /* 0000000? ? */ 390 { SYS_DVBS, QPSK, FEC_AUTO, 0xfe, 0x30 }, 391 /* NBC-QPSK */ 392 { SYS_DVBS2, QPSK, FEC_1_2, 0x00, 0x04 }, 393 { SYS_DVBS2, QPSK, FEC_3_5, 0x00, 0x05 }, 394 { SYS_DVBS2, QPSK, FEC_2_3, 0x00, 0x06 }, 395 { SYS_DVBS2, QPSK, FEC_3_4, 0x00, 0x07 }, 396 { SYS_DVBS2, QPSK, FEC_4_5, 0x00, 0x08 }, 397 { SYS_DVBS2, QPSK, FEC_5_6, 0x00, 0x09 }, 398 { SYS_DVBS2, QPSK, FEC_8_9, 0x00, 0x0a }, 399 { SYS_DVBS2, QPSK, FEC_9_10, 0x00, 0x0b }, 400 /* 8PSK */ 401 { SYS_DVBS2, PSK_8, FEC_3_5, 0x00, 0x0c }, 402 { SYS_DVBS2, PSK_8, FEC_2_3, 0x00, 0x0d }, 403 { SYS_DVBS2, PSK_8, FEC_3_4, 0x00, 0x0e }, 404 { SYS_DVBS2, PSK_8, FEC_5_6, 0x00, 0x0f }, 405 { SYS_DVBS2, PSK_8, FEC_8_9, 0x00, 0x10 }, 406 { SYS_DVBS2, PSK_8, FEC_9_10, 0x00, 0x11 }, 407 /* 408 * `val' can be found in the FECSTATUS register when tuning. 409 * FECSTATUS will give the actual FEC in use if tuning was successful. 410 */ 411 }; 412 413 static int cx24116_lookup_fecmod(struct cx24116_state *state, 414 enum fe_delivery_system d, enum fe_modulation m, enum fe_code_rate f) 415 { 416 int i, ret = -EOPNOTSUPP; 417 418 dprintk("%s(0x%02x,0x%02x)\n", __func__, m, f); 419 420 for (i = 0; i < ARRAY_SIZE(CX24116_MODFEC_MODES); i++) { 421 if ((d == CX24116_MODFEC_MODES[i].delivery_system) && 422 (m == CX24116_MODFEC_MODES[i].modulation) && 423 (f == CX24116_MODFEC_MODES[i].fec)) { 424 ret = i; 425 break; 426 } 427 } 428 429 return ret; 430 } 431 432 static int cx24116_set_fec(struct cx24116_state *state, 433 enum fe_delivery_system delsys, 434 enum fe_modulation mod, 435 enum fe_code_rate fec) 436 { 437 int ret = 0; 438 439 dprintk("%s(0x%02x,0x%02x)\n", __func__, mod, fec); 440 441 ret = cx24116_lookup_fecmod(state, delsys, mod, fec); 442 443 if (ret < 0) 444 return ret; 445 446 state->dnxt.fec = fec; 447 state->dnxt.fec_val = CX24116_MODFEC_MODES[ret].val; 448 state->dnxt.fec_mask = CX24116_MODFEC_MODES[ret].mask; 449 dprintk("%s() mask/val = 0x%02x/0x%02x\n", __func__, 450 state->dnxt.fec_mask, state->dnxt.fec_val); 451 452 return 0; 453 } 454 455 static int cx24116_set_symbolrate(struct cx24116_state *state, u32 rate) 456 { 457 dprintk("%s(%d)\n", __func__, rate); 458 459 /* check if symbol rate is within limits */ 460 if ((rate > state->frontend.ops.info.symbol_rate_max) || 461 (rate < state->frontend.ops.info.symbol_rate_min)) { 462 dprintk("%s() unsupported symbol_rate = %d\n", __func__, rate); 463 return -EOPNOTSUPP; 464 } 465 466 state->dnxt.symbol_rate = rate; 467 dprintk("%s() symbol_rate = %d\n", __func__, rate); 468 469 return 0; 470 } 471 472 static int cx24116_load_firmware(struct dvb_frontend *fe, 473 const struct firmware *fw); 474 475 static int cx24116_firmware_ondemand(struct dvb_frontend *fe) 476 { 477 struct cx24116_state *state = fe->demodulator_priv; 478 const struct firmware *fw; 479 int ret = 0; 480 481 dprintk("%s()\n", __func__); 482 483 if (cx24116_readreg(state, 0x20) > 0) { 484 485 if (state->skip_fw_load) 486 return 0; 487 488 /* Load firmware */ 489 /* request the firmware, this will block until loaded */ 490 printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", 491 __func__, CX24116_DEFAULT_FIRMWARE); 492 ret = request_firmware(&fw, CX24116_DEFAULT_FIRMWARE, 493 state->i2c->dev.parent); 494 printk(KERN_INFO "%s: Waiting for firmware upload(2)...\n", 495 __func__); 496 if (ret) { 497 printk(KERN_ERR "%s: No firmware uploaded (timeout or file not found?)\n", 498 __func__); 499 return ret; 500 } 501 502 /* Make sure we don't recurse back through here 503 * during loading */ 504 state->skip_fw_load = 1; 505 506 ret = cx24116_load_firmware(fe, fw); 507 if (ret) 508 printk(KERN_ERR "%s: Writing firmware to device failed\n", 509 __func__); 510 511 release_firmware(fw); 512 513 printk(KERN_INFO "%s: Firmware upload %s\n", __func__, 514 ret == 0 ? "complete" : "failed"); 515 516 /* Ensure firmware is always loaded if required */ 517 state->skip_fw_load = 0; 518 } 519 520 return ret; 521 } 522 523 /* Take a basic firmware command structure, format it 524 * and forward it for processing 525 */ 526 static int cx24116_cmd_execute(struct dvb_frontend *fe, struct cx24116_cmd *cmd) 527 { 528 struct cx24116_state *state = fe->demodulator_priv; 529 int i, ret; 530 531 dprintk("%s()\n", __func__); 532 533 /* Load the firmware if required */ 534 ret = cx24116_firmware_ondemand(fe); 535 if (ret != 0) { 536 printk(KERN_ERR "%s(): Unable initialise the firmware\n", 537 __func__); 538 return ret; 539 } 540 541 /* Write the command */ 542 for (i = 0; i < cmd->len ; i++) { 543 dprintk("%s: 0x%02x == 0x%02x\n", __func__, i, cmd->args[i]); 544 cx24116_writereg(state, i, cmd->args[i]); 545 } 546 547 /* Start execution and wait for cmd to terminate */ 548 cx24116_writereg(state, CX24116_REG_EXECUTE, 0x01); 549 while (cx24116_readreg(state, CX24116_REG_EXECUTE)) { 550 msleep(10); 551 if (i++ > 64) { 552 /* Avoid looping forever if the firmware does 553 not respond */ 554 printk(KERN_WARNING "%s() Firmware not responding\n", 555 __func__); 556 return -EREMOTEIO; 557 } 558 } 559 return 0; 560 } 561 562 static int cx24116_load_firmware(struct dvb_frontend *fe, 563 const struct firmware *fw) 564 { 565 struct cx24116_state *state = fe->demodulator_priv; 566 struct cx24116_cmd cmd; 567 int i, ret, len, max, remaining; 568 unsigned char vers[4]; 569 570 dprintk("%s\n", __func__); 571 dprintk("Firmware is %zu bytes (%02x %02x .. %02x %02x)\n", 572 fw->size, 573 fw->data[0], 574 fw->data[1], 575 fw->data[fw->size-2], 576 fw->data[fw->size-1]); 577 578 /* Toggle 88x SRST pin to reset demod */ 579 if (state->config->reset_device) 580 state->config->reset_device(fe); 581 582 /* Begin the firmware load process */ 583 /* Prepare the demod, load the firmware, cleanup after load */ 584 585 /* Init PLL */ 586 cx24116_writereg(state, 0xE5, 0x00); 587 cx24116_writereg(state, 0xF1, 0x08); 588 cx24116_writereg(state, 0xF2, 0x13); 589 590 /* Start PLL */ 591 cx24116_writereg(state, 0xe0, 0x03); 592 cx24116_writereg(state, 0xe0, 0x00); 593 594 /* Unknown */ 595 cx24116_writereg(state, CX24116_REG_CLKDIV, 0x46); 596 cx24116_writereg(state, CX24116_REG_RATEDIV, 0x00); 597 598 /* Unknown */ 599 cx24116_writereg(state, 0xF0, 0x03); 600 cx24116_writereg(state, 0xF4, 0x81); 601 cx24116_writereg(state, 0xF5, 0x00); 602 cx24116_writereg(state, 0xF6, 0x00); 603 604 /* Split firmware to the max I2C write len and write. 605 * Writes whole firmware as one write when i2c_wr_max is set to 0. */ 606 if (state->config->i2c_wr_max) 607 max = state->config->i2c_wr_max; 608 else 609 max = INT_MAX; /* enough for 32k firmware */ 610 611 for (remaining = fw->size; remaining > 0; remaining -= max - 1) { 612 len = remaining; 613 if (len > max - 1) 614 len = max - 1; 615 616 cx24116_writeregN(state, 0xF7, &fw->data[fw->size - remaining], 617 len); 618 } 619 620 cx24116_writereg(state, 0xF4, 0x10); 621 cx24116_writereg(state, 0xF0, 0x00); 622 cx24116_writereg(state, 0xF8, 0x06); 623 624 /* Firmware CMD 10: VCO config */ 625 cmd.args[0x00] = CMD_SET_VCO; 626 cmd.args[0x01] = 0x05; 627 cmd.args[0x02] = 0xdc; 628 cmd.args[0x03] = 0xda; 629 cmd.args[0x04] = 0xae; 630 cmd.args[0x05] = 0xaa; 631 cmd.args[0x06] = 0x04; 632 cmd.args[0x07] = 0x9d; 633 cmd.args[0x08] = 0xfc; 634 cmd.args[0x09] = 0x06; 635 cmd.len = 0x0a; 636 ret = cx24116_cmd_execute(fe, &cmd); 637 if (ret != 0) 638 return ret; 639 640 cx24116_writereg(state, CX24116_REG_SSTATUS, 0x00); 641 642 /* Firmware CMD 14: Tuner config */ 643 cmd.args[0x00] = CMD_TUNERINIT; 644 cmd.args[0x01] = 0x00; 645 cmd.args[0x02] = 0x00; 646 cmd.len = 0x03; 647 ret = cx24116_cmd_execute(fe, &cmd); 648 if (ret != 0) 649 return ret; 650 651 cx24116_writereg(state, 0xe5, 0x00); 652 653 /* Firmware CMD 13: MPEG config */ 654 cmd.args[0x00] = CMD_MPEGCONFIG; 655 cmd.args[0x01] = 0x01; 656 cmd.args[0x02] = 0x75; 657 cmd.args[0x03] = 0x00; 658 if (state->config->mpg_clk_pos_pol) 659 cmd.args[0x04] = state->config->mpg_clk_pos_pol; 660 else 661 cmd.args[0x04] = 0x02; 662 cmd.args[0x05] = 0x00; 663 cmd.len = 0x06; 664 ret = cx24116_cmd_execute(fe, &cmd); 665 if (ret != 0) 666 return ret; 667 668 /* Firmware CMD 35: Get firmware version */ 669 cmd.args[0x00] = CMD_UPDFWVERS; 670 cmd.len = 0x02; 671 for (i = 0; i < 4; i++) { 672 cmd.args[0x01] = i; 673 ret = cx24116_cmd_execute(fe, &cmd); 674 if (ret != 0) 675 return ret; 676 vers[i] = cx24116_readreg(state, CX24116_REG_MAILBOX); 677 } 678 printk(KERN_INFO "%s: FW version %i.%i.%i.%i\n", __func__, 679 vers[0], vers[1], vers[2], vers[3]); 680 681 return 0; 682 } 683 684 static int cx24116_read_status(struct dvb_frontend *fe, enum fe_status *status) 685 { 686 struct cx24116_state *state = fe->demodulator_priv; 687 688 int lock = cx24116_readreg(state, CX24116_REG_SSTATUS) & 689 CX24116_STATUS_MASK; 690 691 dprintk("%s: status = 0x%02x\n", __func__, lock); 692 693 *status = 0; 694 695 if (lock & CX24116_HAS_SIGNAL) 696 *status |= FE_HAS_SIGNAL; 697 if (lock & CX24116_HAS_CARRIER) 698 *status |= FE_HAS_CARRIER; 699 if (lock & CX24116_HAS_VITERBI) 700 *status |= FE_HAS_VITERBI; 701 if (lock & CX24116_HAS_SYNCLOCK) 702 *status |= FE_HAS_SYNC | FE_HAS_LOCK; 703 704 return 0; 705 } 706 707 static int cx24116_read_ber(struct dvb_frontend *fe, u32 *ber) 708 { 709 struct cx24116_state *state = fe->demodulator_priv; 710 711 dprintk("%s()\n", __func__); 712 713 *ber = (cx24116_readreg(state, CX24116_REG_BER24) << 24) | 714 (cx24116_readreg(state, CX24116_REG_BER16) << 16) | 715 (cx24116_readreg(state, CX24116_REG_BER8) << 8) | 716 cx24116_readreg(state, CX24116_REG_BER0); 717 718 return 0; 719 } 720 721 /* TODO Determine function and scale appropriately */ 722 static int cx24116_read_signal_strength(struct dvb_frontend *fe, 723 u16 *signal_strength) 724 { 725 struct cx24116_state *state = fe->demodulator_priv; 726 struct cx24116_cmd cmd; 727 int ret; 728 u16 sig_reading; 729 730 dprintk("%s()\n", __func__); 731 732 /* Firmware CMD 19: Get AGC */ 733 cmd.args[0x00] = CMD_GETAGC; 734 cmd.len = 0x01; 735 ret = cx24116_cmd_execute(fe, &cmd); 736 if (ret != 0) 737 return ret; 738 739 sig_reading = 740 (cx24116_readreg(state, 741 CX24116_REG_SSTATUS) & CX24116_SIGNAL_MASK) | 742 (cx24116_readreg(state, CX24116_REG_SIGNAL) << 6); 743 *signal_strength = 0 - sig_reading; 744 745 dprintk("%s: raw / cooked = 0x%04x / 0x%04x\n", 746 __func__, sig_reading, *signal_strength); 747 748 return 0; 749 } 750 751 /* SNR (0..100)% = (sig & 0xf0) * 10 + (sig & 0x0f) * 10 / 16 */ 752 static int cx24116_read_snr_pct(struct dvb_frontend *fe, u16 *snr) 753 { 754 struct cx24116_state *state = fe->demodulator_priv; 755 u8 snr_reading; 756 static const u32 snr_tab[] = { /* 10 x Table (rounded up) */ 757 0x00000, 0x0199A, 0x03333, 0x04ccD, 0x06667, 758 0x08000, 0x0999A, 0x0b333, 0x0cccD, 0x0e667, 759 0x10000, 0x1199A, 0x13333, 0x14ccD, 0x16667, 760 0x18000 }; 761 762 dprintk("%s()\n", __func__); 763 764 snr_reading = cx24116_readreg(state, CX24116_REG_QUALITY0); 765 766 if (snr_reading >= 0xa0 /* 100% */) 767 *snr = 0xffff; 768 else 769 *snr = snr_tab[(snr_reading & 0xf0) >> 4] + 770 (snr_tab[(snr_reading & 0x0f)] >> 4); 771 772 dprintk("%s: raw / cooked = 0x%02x / 0x%04x\n", __func__, 773 snr_reading, *snr); 774 775 return 0; 776 } 777 778 /* The reelbox patches show the value in the registers represents 779 * ESNO, from 0->30db (values 0->300). We provide this value by 780 * default. 781 */ 782 static int cx24116_read_snr_esno(struct dvb_frontend *fe, u16 *snr) 783 { 784 struct cx24116_state *state = fe->demodulator_priv; 785 786 dprintk("%s()\n", __func__); 787 788 *snr = cx24116_readreg(state, CX24116_REG_QUALITY8) << 8 | 789 cx24116_readreg(state, CX24116_REG_QUALITY0); 790 791 dprintk("%s: raw 0x%04x\n", __func__, *snr); 792 793 return 0; 794 } 795 796 static int cx24116_read_snr(struct dvb_frontend *fe, u16 *snr) 797 { 798 if (esno_snr == 1) 799 return cx24116_read_snr_esno(fe, snr); 800 else 801 return cx24116_read_snr_pct(fe, snr); 802 } 803 804 static int cx24116_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 805 { 806 struct cx24116_state *state = fe->demodulator_priv; 807 808 dprintk("%s()\n", __func__); 809 810 *ucblocks = (cx24116_readreg(state, CX24116_REG_UCB8) << 8) | 811 cx24116_readreg(state, CX24116_REG_UCB0); 812 813 return 0; 814 } 815 816 /* Overwrite the current tuning params, we are about to tune */ 817 static void cx24116_clone_params(struct dvb_frontend *fe) 818 { 819 struct cx24116_state *state = fe->demodulator_priv; 820 state->dcur = state->dnxt; 821 } 822 823 /* Wait for LNB */ 824 static int cx24116_wait_for_lnb(struct dvb_frontend *fe) 825 { 826 struct cx24116_state *state = fe->demodulator_priv; 827 int i; 828 829 dprintk("%s() qstatus = 0x%02x\n", __func__, 830 cx24116_readreg(state, CX24116_REG_QSTATUS)); 831 832 /* Wait for up to 300 ms */ 833 for (i = 0; i < 30 ; i++) { 834 if (cx24116_readreg(state, CX24116_REG_QSTATUS) & 0x20) 835 return 0; 836 msleep(10); 837 } 838 839 dprintk("%s(): LNB not ready\n", __func__); 840 841 return -ETIMEDOUT; /* -EBUSY ? */ 842 } 843 844 static int cx24116_set_voltage(struct dvb_frontend *fe, 845 enum fe_sec_voltage voltage) 846 { 847 struct cx24116_cmd cmd; 848 int ret; 849 850 dprintk("%s: %s\n", __func__, 851 voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" : 852 voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : "??"); 853 854 /* Wait for LNB ready */ 855 ret = cx24116_wait_for_lnb(fe); 856 if (ret != 0) 857 return ret; 858 859 /* Wait for voltage/min repeat delay */ 860 msleep(100); 861 862 cmd.args[0x00] = CMD_LNBDCLEVEL; 863 cmd.args[0x01] = (voltage == SEC_VOLTAGE_18 ? 0x01 : 0x00); 864 cmd.len = 0x02; 865 866 /* Min delay time before DiSEqC send */ 867 msleep(15); 868 869 return cx24116_cmd_execute(fe, &cmd); 870 } 871 872 static int cx24116_set_tone(struct dvb_frontend *fe, 873 enum fe_sec_tone_mode tone) 874 { 875 struct cx24116_cmd cmd; 876 int ret; 877 878 dprintk("%s(%d)\n", __func__, tone); 879 if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) { 880 printk(KERN_ERR "%s: Invalid, tone=%d\n", __func__, tone); 881 return -EINVAL; 882 } 883 884 /* Wait for LNB ready */ 885 ret = cx24116_wait_for_lnb(fe); 886 if (ret != 0) 887 return ret; 888 889 /* Min delay time after DiSEqC send */ 890 msleep(15); /* XXX determine is FW does this, see send_diseqc/burst */ 891 892 /* Now we set the tone */ 893 cmd.args[0x00] = CMD_SET_TONE; 894 cmd.args[0x01] = 0x00; 895 cmd.args[0x02] = 0x00; 896 897 switch (tone) { 898 case SEC_TONE_ON: 899 dprintk("%s: setting tone on\n", __func__); 900 cmd.args[0x03] = 0x01; 901 break; 902 case SEC_TONE_OFF: 903 dprintk("%s: setting tone off\n", __func__); 904 cmd.args[0x03] = 0x00; 905 break; 906 } 907 cmd.len = 0x04; 908 909 /* Min delay time before DiSEqC send */ 910 msleep(15); /* XXX determine is FW does this, see send_diseqc/burst */ 911 912 return cx24116_cmd_execute(fe, &cmd); 913 } 914 915 /* Initialise DiSEqC */ 916 static int cx24116_diseqc_init(struct dvb_frontend *fe) 917 { 918 struct cx24116_state *state = fe->demodulator_priv; 919 struct cx24116_cmd cmd; 920 int ret; 921 922 /* Firmware CMD 20: LNB/DiSEqC config */ 923 cmd.args[0x00] = CMD_LNBCONFIG; 924 cmd.args[0x01] = 0x00; 925 cmd.args[0x02] = 0x10; 926 cmd.args[0x03] = 0x00; 927 cmd.args[0x04] = 0x8f; 928 cmd.args[0x05] = 0x28; 929 cmd.args[0x06] = (toneburst == CX24116_DISEQC_TONEOFF) ? 0x00 : 0x01; 930 cmd.args[0x07] = 0x01; 931 cmd.len = 0x08; 932 ret = cx24116_cmd_execute(fe, &cmd); 933 if (ret != 0) 934 return ret; 935 936 /* Prepare a DiSEqC command */ 937 state->dsec_cmd.args[0x00] = CMD_LNBSEND; 938 939 /* DiSEqC burst */ 940 state->dsec_cmd.args[CX24116_DISEQC_BURST] = CX24116_DISEQC_MINI_A; 941 942 /* Unknown */ 943 state->dsec_cmd.args[CX24116_DISEQC_ARG2_2] = 0x02; 944 state->dsec_cmd.args[CX24116_DISEQC_ARG3_0] = 0x00; 945 /* Continuation flag? */ 946 state->dsec_cmd.args[CX24116_DISEQC_ARG4_0] = 0x00; 947 948 /* DiSEqC message length */ 949 state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] = 0x00; 950 951 /* Command length */ 952 state->dsec_cmd.len = CX24116_DISEQC_MSGOFS; 953 954 return 0; 955 } 956 957 /* Send DiSEqC message with derived burst (hack) || previous burst */ 958 static int cx24116_send_diseqc_msg(struct dvb_frontend *fe, 959 struct dvb_diseqc_master_cmd *d) 960 { 961 struct cx24116_state *state = fe->demodulator_priv; 962 int i, ret; 963 964 /* Validate length */ 965 if (d->msg_len > sizeof(d->msg)) 966 return -EINVAL; 967 968 /* Dump DiSEqC message */ 969 if (debug) { 970 printk(KERN_INFO "cx24116: %s(", __func__); 971 for (i = 0 ; i < d->msg_len ;) { 972 printk(KERN_INFO "0x%02x", d->msg[i]); 973 if (++i < d->msg_len) 974 printk(KERN_INFO ", "); 975 } 976 printk(") toneburst=%d\n", toneburst); 977 } 978 979 /* DiSEqC message */ 980 for (i = 0; i < d->msg_len; i++) 981 state->dsec_cmd.args[CX24116_DISEQC_MSGOFS + i] = d->msg[i]; 982 983 /* DiSEqC message length */ 984 state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] = d->msg_len; 985 986 /* Command length */ 987 state->dsec_cmd.len = CX24116_DISEQC_MSGOFS + 988 state->dsec_cmd.args[CX24116_DISEQC_MSGLEN]; 989 990 /* DiSEqC toneburst */ 991 if (toneburst == CX24116_DISEQC_MESGCACHE) 992 /* Message is cached */ 993 return 0; 994 995 else if (toneburst == CX24116_DISEQC_TONEOFF) 996 /* Message is sent without burst */ 997 state->dsec_cmd.args[CX24116_DISEQC_BURST] = 0; 998 999 else if (toneburst == CX24116_DISEQC_TONECACHE) { 1000 /* 1001 * Message is sent with derived else cached burst 1002 * 1003 * WRITE PORT GROUP COMMAND 38 1004 * 1005 * 0/A/A: E0 10 38 F0..F3 1006 * 1/B/B: E0 10 38 F4..F7 1007 * 2/C/A: E0 10 38 F8..FB 1008 * 3/D/B: E0 10 38 FC..FF 1009 * 1010 * databyte[3]= 8421:8421 1011 * ABCD:WXYZ 1012 * CLR :SET 1013 * 1014 * WX= PORT SELECT 0..3 (X=TONEBURST) 1015 * Y = VOLTAGE (0=13V, 1=18V) 1016 * Z = BAND (0=LOW, 1=HIGH(22K)) 1017 */ 1018 if (d->msg_len >= 4 && d->msg[2] == 0x38) 1019 state->dsec_cmd.args[CX24116_DISEQC_BURST] = 1020 ((d->msg[3] & 4) >> 2); 1021 if (debug) 1022 dprintk("%s burst=%d\n", __func__, 1023 state->dsec_cmd.args[CX24116_DISEQC_BURST]); 1024 } 1025 1026 /* Wait for LNB ready */ 1027 ret = cx24116_wait_for_lnb(fe); 1028 if (ret != 0) 1029 return ret; 1030 1031 /* Wait for voltage/min repeat delay */ 1032 msleep(100); 1033 1034 /* Command */ 1035 ret = cx24116_cmd_execute(fe, &state->dsec_cmd); 1036 if (ret != 0) 1037 return ret; 1038 /* 1039 * Wait for send 1040 * 1041 * Eutelsat spec: 1042 * >15ms delay + (XXX determine if FW does this, see set_tone) 1043 * 13.5ms per byte + 1044 * >15ms delay + 1045 * 12.5ms burst + 1046 * >15ms delay (XXX determine if FW does this, see set_tone) 1047 */ 1048 msleep((state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] << 4) + 1049 ((toneburst == CX24116_DISEQC_TONEOFF) ? 30 : 60)); 1050 1051 return 0; 1052 } 1053 1054 /* Send DiSEqC burst */ 1055 static int cx24116_diseqc_send_burst(struct dvb_frontend *fe, 1056 enum fe_sec_mini_cmd burst) 1057 { 1058 struct cx24116_state *state = fe->demodulator_priv; 1059 int ret; 1060 1061 dprintk("%s(%d) toneburst=%d\n", __func__, burst, toneburst); 1062 1063 /* DiSEqC burst */ 1064 if (burst == SEC_MINI_A) 1065 state->dsec_cmd.args[CX24116_DISEQC_BURST] = 1066 CX24116_DISEQC_MINI_A; 1067 else if (burst == SEC_MINI_B) 1068 state->dsec_cmd.args[CX24116_DISEQC_BURST] = 1069 CX24116_DISEQC_MINI_B; 1070 else 1071 return -EINVAL; 1072 1073 /* DiSEqC toneburst */ 1074 if (toneburst != CX24116_DISEQC_MESGCACHE) 1075 /* Burst is cached */ 1076 return 0; 1077 1078 /* Burst is to be sent with cached message */ 1079 1080 /* Wait for LNB ready */ 1081 ret = cx24116_wait_for_lnb(fe); 1082 if (ret != 0) 1083 return ret; 1084 1085 /* Wait for voltage/min repeat delay */ 1086 msleep(100); 1087 1088 /* Command */ 1089 ret = cx24116_cmd_execute(fe, &state->dsec_cmd); 1090 if (ret != 0) 1091 return ret; 1092 1093 /* 1094 * Wait for send 1095 * 1096 * Eutelsat spec: 1097 * >15ms delay + (XXX determine if FW does this, see set_tone) 1098 * 13.5ms per byte + 1099 * >15ms delay + 1100 * 12.5ms burst + 1101 * >15ms delay (XXX determine if FW does this, see set_tone) 1102 */ 1103 msleep((state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] << 4) + 60); 1104 1105 return 0; 1106 } 1107 1108 static void cx24116_release(struct dvb_frontend *fe) 1109 { 1110 struct cx24116_state *state = fe->demodulator_priv; 1111 dprintk("%s\n", __func__); 1112 kfree(state); 1113 } 1114 1115 static const struct dvb_frontend_ops cx24116_ops; 1116 1117 struct dvb_frontend *cx24116_attach(const struct cx24116_config *config, 1118 struct i2c_adapter *i2c) 1119 { 1120 struct cx24116_state *state; 1121 int ret; 1122 1123 dprintk("%s\n", __func__); 1124 1125 /* allocate memory for the internal state */ 1126 state = kzalloc(sizeof(*state), GFP_KERNEL); 1127 if (state == NULL) 1128 return NULL; 1129 1130 state->config = config; 1131 state->i2c = i2c; 1132 1133 /* check if the demod is present */ 1134 ret = (cx24116_readreg(state, 0xFF) << 8) | 1135 cx24116_readreg(state, 0xFE); 1136 if (ret != 0x0501) { 1137 kfree(state); 1138 printk(KERN_INFO "Invalid probe, probably not a CX24116 device\n"); 1139 return NULL; 1140 } 1141 1142 /* create dvb_frontend */ 1143 memcpy(&state->frontend.ops, &cx24116_ops, 1144 sizeof(struct dvb_frontend_ops)); 1145 state->frontend.demodulator_priv = state; 1146 return &state->frontend; 1147 } 1148 EXPORT_SYMBOL(cx24116_attach); 1149 1150 /* 1151 * Initialise or wake up device 1152 * 1153 * Power config will reset and load initial firmware if required 1154 */ 1155 static int cx24116_initfe(struct dvb_frontend *fe) 1156 { 1157 struct cx24116_state *state = fe->demodulator_priv; 1158 struct cx24116_cmd cmd; 1159 int ret; 1160 1161 dprintk("%s()\n", __func__); 1162 1163 /* Power on */ 1164 cx24116_writereg(state, 0xe0, 0); 1165 cx24116_writereg(state, 0xe1, 0); 1166 cx24116_writereg(state, 0xea, 0); 1167 1168 /* Firmware CMD 36: Power config */ 1169 cmd.args[0x00] = CMD_TUNERSLEEP; 1170 cmd.args[0x01] = 0; 1171 cmd.len = 0x02; 1172 ret = cx24116_cmd_execute(fe, &cmd); 1173 if (ret != 0) 1174 return ret; 1175 1176 ret = cx24116_diseqc_init(fe); 1177 if (ret != 0) 1178 return ret; 1179 1180 /* HVR-4000 needs this */ 1181 return cx24116_set_voltage(fe, SEC_VOLTAGE_13); 1182 } 1183 1184 /* 1185 * Put device to sleep 1186 */ 1187 static int cx24116_sleep(struct dvb_frontend *fe) 1188 { 1189 struct cx24116_state *state = fe->demodulator_priv; 1190 struct cx24116_cmd cmd; 1191 int ret; 1192 1193 dprintk("%s()\n", __func__); 1194 1195 /* Firmware CMD 36: Power config */ 1196 cmd.args[0x00] = CMD_TUNERSLEEP; 1197 cmd.args[0x01] = 1; 1198 cmd.len = 0x02; 1199 ret = cx24116_cmd_execute(fe, &cmd); 1200 if (ret != 0) 1201 return ret; 1202 1203 /* Power off (Shutdown clocks) */ 1204 cx24116_writereg(state, 0xea, 0xff); 1205 cx24116_writereg(state, 0xe1, 1); 1206 cx24116_writereg(state, 0xe0, 1); 1207 1208 return 0; 1209 } 1210 1211 /* dvb-core told us to tune, the tv property cache will be complete, 1212 * it's safe for is to pull values and use them for tuning purposes. 1213 */ 1214 static int cx24116_set_frontend(struct dvb_frontend *fe) 1215 { 1216 struct cx24116_state *state = fe->demodulator_priv; 1217 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 1218 struct cx24116_cmd cmd; 1219 enum fe_status tunerstat; 1220 int i, status, ret, retune = 1; 1221 1222 dprintk("%s()\n", __func__); 1223 1224 switch (c->delivery_system) { 1225 case SYS_DVBS: 1226 dprintk("%s: DVB-S delivery system selected\n", __func__); 1227 1228 /* Only QPSK is supported for DVB-S */ 1229 if (c->modulation != QPSK) { 1230 dprintk("%s: unsupported modulation selected (%d)\n", 1231 __func__, c->modulation); 1232 return -EOPNOTSUPP; 1233 } 1234 1235 /* Pilot doesn't exist in DVB-S, turn bit off */ 1236 state->dnxt.pilot_val = CX24116_PILOT_OFF; 1237 1238 /* DVB-S only supports 0.35 */ 1239 if (c->rolloff != ROLLOFF_35) { 1240 dprintk("%s: unsupported rolloff selected (%d)\n", 1241 __func__, c->rolloff); 1242 return -EOPNOTSUPP; 1243 } 1244 state->dnxt.rolloff_val = CX24116_ROLLOFF_035; 1245 break; 1246 1247 case SYS_DVBS2: 1248 dprintk("%s: DVB-S2 delivery system selected\n", __func__); 1249 1250 /* 1251 * NBC 8PSK/QPSK with DVB-S is supported for DVB-S2, 1252 * but not hardware auto detection 1253 */ 1254 if (c->modulation != PSK_8 && c->modulation != QPSK) { 1255 dprintk("%s: unsupported modulation selected (%d)\n", 1256 __func__, c->modulation); 1257 return -EOPNOTSUPP; 1258 } 1259 1260 switch (c->pilot) { 1261 case PILOT_AUTO: /* Not supported but emulated */ 1262 state->dnxt.pilot_val = (c->modulation == QPSK) 1263 ? CX24116_PILOT_OFF : CX24116_PILOT_ON; 1264 retune++; 1265 break; 1266 case PILOT_OFF: 1267 state->dnxt.pilot_val = CX24116_PILOT_OFF; 1268 break; 1269 case PILOT_ON: 1270 state->dnxt.pilot_val = CX24116_PILOT_ON; 1271 break; 1272 default: 1273 dprintk("%s: unsupported pilot mode selected (%d)\n", 1274 __func__, c->pilot); 1275 return -EOPNOTSUPP; 1276 } 1277 1278 switch (c->rolloff) { 1279 case ROLLOFF_20: 1280 state->dnxt.rolloff_val = CX24116_ROLLOFF_020; 1281 break; 1282 case ROLLOFF_25: 1283 state->dnxt.rolloff_val = CX24116_ROLLOFF_025; 1284 break; 1285 case ROLLOFF_35: 1286 state->dnxt.rolloff_val = CX24116_ROLLOFF_035; 1287 break; 1288 case ROLLOFF_AUTO: /* Rolloff must be explicit */ 1289 default: 1290 dprintk("%s: unsupported rolloff selected (%d)\n", 1291 __func__, c->rolloff); 1292 return -EOPNOTSUPP; 1293 } 1294 break; 1295 1296 default: 1297 dprintk("%s: unsupported delivery system selected (%d)\n", 1298 __func__, c->delivery_system); 1299 return -EOPNOTSUPP; 1300 } 1301 state->dnxt.delsys = c->delivery_system; 1302 state->dnxt.modulation = c->modulation; 1303 state->dnxt.frequency = c->frequency; 1304 state->dnxt.pilot = c->pilot; 1305 state->dnxt.rolloff = c->rolloff; 1306 1307 ret = cx24116_set_inversion(state, c->inversion); 1308 if (ret != 0) 1309 return ret; 1310 1311 /* FEC_NONE/AUTO for DVB-S2 is not supported and detected here */ 1312 ret = cx24116_set_fec(state, c->delivery_system, c->modulation, c->fec_inner); 1313 if (ret != 0) 1314 return ret; 1315 1316 ret = cx24116_set_symbolrate(state, c->symbol_rate); 1317 if (ret != 0) 1318 return ret; 1319 1320 /* discard the 'current' tuning parameters and prepare to tune */ 1321 cx24116_clone_params(fe); 1322 1323 dprintk("%s: delsys = %d\n", __func__, state->dcur.delsys); 1324 dprintk("%s: modulation = %d\n", __func__, state->dcur.modulation); 1325 dprintk("%s: frequency = %d\n", __func__, state->dcur.frequency); 1326 dprintk("%s: pilot = %d (val = 0x%02x)\n", __func__, 1327 state->dcur.pilot, state->dcur.pilot_val); 1328 dprintk("%s: retune = %d\n", __func__, retune); 1329 dprintk("%s: rolloff = %d (val = 0x%02x)\n", __func__, 1330 state->dcur.rolloff, state->dcur.rolloff_val); 1331 dprintk("%s: symbol_rate = %d\n", __func__, state->dcur.symbol_rate); 1332 dprintk("%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__, 1333 state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val); 1334 dprintk("%s: Inversion = %d (val = 0x%02x)\n", __func__, 1335 state->dcur.inversion, state->dcur.inversion_val); 1336 1337 /* This is also done in advise/acquire on HVR4000 but not on LITE */ 1338 if (state->config->set_ts_params) 1339 state->config->set_ts_params(fe, 0); 1340 1341 /* Set/Reset B/W */ 1342 cmd.args[0x00] = CMD_BANDWIDTH; 1343 cmd.args[0x01] = 0x01; 1344 cmd.len = 0x02; 1345 ret = cx24116_cmd_execute(fe, &cmd); 1346 if (ret != 0) 1347 return ret; 1348 1349 /* Prepare a tune request */ 1350 cmd.args[0x00] = CMD_TUNEREQUEST; 1351 1352 /* Frequency */ 1353 cmd.args[0x01] = (state->dcur.frequency & 0xff0000) >> 16; 1354 cmd.args[0x02] = (state->dcur.frequency & 0x00ff00) >> 8; 1355 cmd.args[0x03] = (state->dcur.frequency & 0x0000ff); 1356 1357 /* Symbol Rate */ 1358 cmd.args[0x04] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8; 1359 cmd.args[0x05] = ((state->dcur.symbol_rate / 1000) & 0x00ff); 1360 1361 /* Automatic Inversion */ 1362 cmd.args[0x06] = state->dcur.inversion_val; 1363 1364 /* Modulation / FEC / Pilot */ 1365 cmd.args[0x07] = state->dcur.fec_val | state->dcur.pilot_val; 1366 1367 cmd.args[0x08] = CX24116_SEARCH_RANGE_KHZ >> 8; 1368 cmd.args[0x09] = CX24116_SEARCH_RANGE_KHZ & 0xff; 1369 cmd.args[0x0a] = 0x00; 1370 cmd.args[0x0b] = 0x00; 1371 cmd.args[0x0c] = state->dcur.rolloff_val; 1372 cmd.args[0x0d] = state->dcur.fec_mask; 1373 1374 if (state->dcur.symbol_rate > 30000000) { 1375 cmd.args[0x0e] = 0x04; 1376 cmd.args[0x0f] = 0x00; 1377 cmd.args[0x10] = 0x01; 1378 cmd.args[0x11] = 0x77; 1379 cmd.args[0x12] = 0x36; 1380 cx24116_writereg(state, CX24116_REG_CLKDIV, 0x44); 1381 cx24116_writereg(state, CX24116_REG_RATEDIV, 0x01); 1382 } else { 1383 cmd.args[0x0e] = 0x06; 1384 cmd.args[0x0f] = 0x00; 1385 cmd.args[0x10] = 0x00; 1386 cmd.args[0x11] = 0xFA; 1387 cmd.args[0x12] = 0x24; 1388 cx24116_writereg(state, CX24116_REG_CLKDIV, 0x46); 1389 cx24116_writereg(state, CX24116_REG_RATEDIV, 0x00); 1390 } 1391 1392 cmd.len = 0x13; 1393 1394 /* We need to support pilot and non-pilot tuning in the 1395 * driver automatically. This is a workaround for because 1396 * the demod does not support autodetect. 1397 */ 1398 do { 1399 /* Reset status register */ 1400 status = cx24116_readreg(state, CX24116_REG_SSTATUS) 1401 & CX24116_SIGNAL_MASK; 1402 cx24116_writereg(state, CX24116_REG_SSTATUS, status); 1403 1404 /* Tune */ 1405 ret = cx24116_cmd_execute(fe, &cmd); 1406 if (ret != 0) 1407 break; 1408 1409 /* 1410 * Wait for up to 500 ms before retrying 1411 * 1412 * If we are able to tune then generally it occurs within 100ms. 1413 * If it takes longer, try a different toneburst setting. 1414 */ 1415 for (i = 0; i < 50 ; i++) { 1416 cx24116_read_status(fe, &tunerstat); 1417 status = tunerstat & (FE_HAS_SIGNAL | FE_HAS_SYNC); 1418 if (status == (FE_HAS_SIGNAL | FE_HAS_SYNC)) { 1419 dprintk("%s: Tuned\n", __func__); 1420 goto tuned; 1421 } 1422 msleep(10); 1423 } 1424 1425 dprintk("%s: Not tuned\n", __func__); 1426 1427 /* Toggle pilot bit when in auto-pilot */ 1428 if (state->dcur.pilot == PILOT_AUTO) 1429 cmd.args[0x07] ^= CX24116_PILOT_ON; 1430 } while (--retune); 1431 1432 tuned: /* Set/Reset B/W */ 1433 cmd.args[0x00] = CMD_BANDWIDTH; 1434 cmd.args[0x01] = 0x00; 1435 cmd.len = 0x02; 1436 return cx24116_cmd_execute(fe, &cmd); 1437 } 1438 1439 static int cx24116_tune(struct dvb_frontend *fe, bool re_tune, 1440 unsigned int mode_flags, unsigned int *delay, enum fe_status *status) 1441 { 1442 /* 1443 * It is safe to discard "params" here, as the DVB core will sync 1444 * fe->dtv_property_cache with fepriv->parameters_in, where the 1445 * DVBv3 params are stored. The only practical usage for it indicate 1446 * that re-tuning is needed, e. g. (fepriv->state & FESTATE_RETUNE) is 1447 * true. 1448 */ 1449 1450 *delay = HZ / 5; 1451 if (re_tune) { 1452 int ret = cx24116_set_frontend(fe); 1453 if (ret) 1454 return ret; 1455 } 1456 return cx24116_read_status(fe, status); 1457 } 1458 1459 static enum dvbfe_algo cx24116_get_algo(struct dvb_frontend *fe) 1460 { 1461 return DVBFE_ALGO_HW; 1462 } 1463 1464 static const struct dvb_frontend_ops cx24116_ops = { 1465 .delsys = { SYS_DVBS, SYS_DVBS2 }, 1466 .info = { 1467 .name = "Conexant CX24116/CX24118", 1468 .frequency_min_hz = 950 * MHz, 1469 .frequency_max_hz = 2150 * MHz, 1470 .frequency_stepsize_hz = 1011 * kHz, 1471 .frequency_tolerance_hz = 5 * MHz, 1472 .symbol_rate_min = 1000000, 1473 .symbol_rate_max = 45000000, 1474 .caps = FE_CAN_INVERSION_AUTO | 1475 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 1476 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | 1477 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 1478 FE_CAN_2G_MODULATION | 1479 FE_CAN_QPSK | FE_CAN_RECOVER 1480 }, 1481 1482 .release = cx24116_release, 1483 1484 .init = cx24116_initfe, 1485 .sleep = cx24116_sleep, 1486 .read_status = cx24116_read_status, 1487 .read_ber = cx24116_read_ber, 1488 .read_signal_strength = cx24116_read_signal_strength, 1489 .read_snr = cx24116_read_snr, 1490 .read_ucblocks = cx24116_read_ucblocks, 1491 .set_tone = cx24116_set_tone, 1492 .set_voltage = cx24116_set_voltage, 1493 .diseqc_send_master_cmd = cx24116_send_diseqc_msg, 1494 .diseqc_send_burst = cx24116_diseqc_send_burst, 1495 .get_frontend_algo = cx24116_get_algo, 1496 .tune = cx24116_tune, 1497 1498 .set_frontend = cx24116_set_frontend, 1499 }; 1500 1501 MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24116/cx24118 hardware"); 1502 MODULE_AUTHOR("Steven Toth"); 1503 MODULE_LICENSE("GPL"); 1504 1505